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This commit is contained in:
1196
Customer/MOBIS/PRK3_(ADAS_Parking3)/0_MTG/20260312_Mobis.txt
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1196
Customer/MOBIS/PRK3_(ADAS_Parking3)/0_MTG/20260312_Mobis.txt
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9
Customer/MOBIS/PRK3_(ADAS_Parking3)/0_MTG/20260318.txt
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9
Customer/MOBIS/PRK3_(ADAS_Parking3)/0_MTG/20260318.txt
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<EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>Ʈ <20>켱<EFBFBD><ECBCB1><EFBFBD><EFBFBD>
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PMIC <20><><EFBFBD><EFBFBD> <20>ƿ<EFBFBD>Dz <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ٷ<EFBFBD> <20><><EFBFBD><EFBFBD>. <20>̰<EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD>ϴ<EFBFBD> <20><><EFBFBD><EFBFBD> <20>ִ°<D6B4>?
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CVM <20>ڵ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ®<><C2AE><EFBFBD><EFBFBD>?
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I2C <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>̰<EFBFBD> <20><>Ʈ<EFBFBD><C6AE>.
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<EFBFBD>ھ <20><>Ű<EFBFBD><C5B0><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20>ڷ<EFBFBD><DAB7>ۼ<EFBFBD>
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Customer/MOBIS/PRK3_(ADAS_Parking3)/0_MTG/20260320.txt
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Customer/MOBIS/PRK3_(ADAS_Parking3)/0_MTG/20260320.txt
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PMIC <20><><EFBFBD><EFBFBD> <20>ƿ<EFBFBD>Dz <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ٷ<EFBFBD> <20><><EFBFBD><EFBFBD>. <20>̰<EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD>ϴ<EFBFBD> <20><><EFBFBD><EFBFBD> <20>ִ°<D6B4>?
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CVM <20>ڵ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ®<><C2AE><EFBFBD><EFBFBD>?
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<EFBFBD>ھ <20><>Ű<EFBFBD><C5B0><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20>ڷ<EFBFBD><DAB7>ۼ<EFBFBD> -> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> å<>Ӵ<EFBFBD><D3B4><EFBFBD> <20>ǵ<EFBFBD><C7B5><EFBFBD> <20><> Q&A <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ʿ<EFBFBD>
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CVM <20>ڵ<EFBFBD> <20>м<EFBFBD>
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I2C
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- MCAL <20><> <20><><EFBFBD><EFBFBD> Test -> <20>ǵ<EFBFBD><C7B5><EFBFBD><EFBFBD><EFBFBD>.
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<EFBFBD>߰<EFBFBD> <20>̰<EFBFBD> <20><><EFBFBD><EFBFBD> Test<73>شٶ<D8B4><D9B6>µ<EFBFBD> <20><><EFBFBD><EFBFBD> <20>ٽ<EFBFBD> <20>ؼ<EFBFBD> Test<73>ұ<EFBFBD>?
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For your reference, the code is as follows:
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I2C <20><><EFBFBD><EFBFBD><EFBFBD>ϴµ<CFB4> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD>°<EFBFBD> ? <20><> Ȯ<><C8AE><EFBFBD><EFBFBD> <20>ؾߤ<D8BE><DFA4>ϴ°<CFB4>?
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>? Ŭ<><C5AC>? MPU? <20><><EFBFBD><EFBFBD>.??
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@@ -0,0 +1,31 @@
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THS -> V4H<34><48> 4<><34><EFBFBD><EFBFBD> THS Placed point<6E><74> <20>ִ<EFBFBD>.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4<><34><EFBFBD><EFBFBD> TSC<53><43> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ִ<EFBFBD>.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> MCAL<41><4C> 4<><34> <20>߿<EFBFBD><DFBF><EFBFBD> 1<><31><EFBFBD><EFBFBD> TSC<53><43> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20>ִ<EFBFBD> <20><> <20><><EFBFBD><EFBFBD>?
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20>´°<C2B4>?
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4<EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD>°<EFBFBD>?
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CddThsPtat1~CddThsPtat3<74><33> CddThsThcode1~CddThsThcode3<65><33> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ǹ<EFBFBD><C7B9>ϴ°<CFB4>?
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1<><31><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>Ѵٸ<D1B4>, TSC1<43><31> THS1<53>ΰ<EFBFBD>? Placed point 1
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CVM -><3E>̰<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ؾ<EFBFBD><D8BE>ϳ<EFBFBD>? Autosar? IPL? -> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>
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<EFBFBD><EFBFBD>ť<EFBFBD><EFBFBD>Ż
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CR-Core Issue
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1. I2C -> <20><>ũ<EFBFBD><C5A9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>. <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ī<EFBFBD><C4AB><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.
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EVB<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>Ǿ<EFBFBD><C7BE>µ<EFBFBD>. <20><> <20>ذ<EFBFBD><D8B0><EFBFBD> <20>ȵ<EFBFBD><C8B5><EFBFBD>?
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<EFBFBD><EFBFBD> <20>ٸ<EFBFBD><D9B8><EFBFBD>?
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2. CVM -> <20><><EFBFBD><EFBFBD><EFBFBD>翡<EFBFBD><E7BFA1> <20><><EFBFBD>ƾ<EFBFBD> <20>ϳ<EFBFBD>? <20><>Ȯ<EFBFBD>ϰ<EFBFBD> <20><><EFBFBD><EFBFBD>?
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3. <20><><EFBFBD>ͷ<EFBFBD>Ʈ <20><>
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4. PMIC OTP26.68 <20><> <20><> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20>ʴ<EFBFBD> <20><> <20><><EFBFBD><EFBFBD>.
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OTP26.69 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>̹<EFBFBD><CCB9><EFBFBD> Mobis<69><73> <20><EFBFBD><D4B0><EFBFBD> <20><><EFBFBD><EFBFBD>.
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AUTOSAR <20><><EFBFBD><EFBFBD> <20>̽<EFBFBD><CCBD><EFBFBD><EFBFBD><EFBFBD>Ʈ <20><><EFBFBD><EFBFBD>
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986<EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD>ϵ<EFBFBD> <20>̽<EFBFBD>.
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921<EFBFBD><EFBFBD> ī<><EFBFBD> <20>ʱ<EFBFBD>ȭ I2C.
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<EFBFBD><EFBFBD><EFBFBD>ɾ<EFBFBD><EFBFBD><EFBFBD> <20>̽<EFBFBD>(Fusa)<29><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> å<>Ӵ<EFBFBD>
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@@ -0,0 +1,30 @@
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CR-Core Issue
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1. I2C(<28><>ũ<EFBFBD><C5A9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>)
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> å<><C3A5><EFBFBD>ʿ<EFBFBD><CABF><EFBFBD> <20><>ũ<EFBFBD><C5A9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.
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<EFBFBD><EFBFBD>Ʈ<EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ڰ<EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ľǿ<C4BE><C7BF><EFBFBD>
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2. CVM(<28>켱<EFBFBD><ECBCB1><EFBFBD><EFBFBD>)
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3. <20><><EFBFBD>ͷ<EFBFBD>Ʈ <20><>
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4. PMIC OTP26.68
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<EFBFBD>ϴ<EFBFBD>
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4<EFBFBD><EFBFBD> 10<31><30> 26.69 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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<EFBFBD>̹<EFBFBD><EFBFBD><EFBFBD> 26.68<EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20>߰<EFBFBD> <20><><EFBFBD><EFBFBD>
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DV2<EFBFBD><EFBFBD><EFBFBD><EFBFBD> 5<><35> <20><EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD>. <20><><EFBFBD><EFBFBD> P1<50><31><EFBFBD>
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26.68 <20><><EFBFBD><EFBFBD>
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>&<26><><EFBFBD><EFBFBD> OTP
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20260331 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Meeting
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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26.65(8<><38><EFBFBD><EFBFBD><EFBFBD><EFBFBD>), <20><><EFBFBD>¿<EFBFBD><C2BF><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ϴµ<CFB4> IPL <20><> DDR<44><52> <20><> <20><> <20><>Ʈ<EFBFBD><C6AE> <20>ϰ<EFBFBD> <20>ִ<EFBFBD> <20><> <20><><EFBFBD><EFBFBD>.
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CVM <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>
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26.68 <20><><EFBFBD><EFBFBD>
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>&<26><><EFBFBD><EFBFBD> OTP
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PMIC<EFBFBD><EFBFBD> <20>ļ<EFBFBD><C4BC><EFBFBD>
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Customer/MOBIS/PRK3_(ADAS_Parking3)/0_MTG/20260407.txt
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Customer/MOBIS/PRK3_(ADAS_Parking3)/0_MTG/20260407.txt
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SMA <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, MCAL <20><><EFBFBD><EFBFBD>Ʈ<EFBFBD><C6AE> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>Ǵ<EFBFBD><C7B4><EFBFBD> Ȯ<><C8AE>.
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I2C Test<73><74>û<EFBFBD>Ϸ<EFBFBD>
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<EFBFBD>߰<EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>罺 MCAL Ÿ <20><><EFBFBD><EFBFBD>(Emm, Iccom, Rfso, Dio, Gpt, Mcu, Port, Spi, Wdg) <20><> <20><><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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EVB<EFBFBD><EFBFBD> <20><><EFBFBD>ͷ<EFBFBD>Ʈ Ȯ<><C8AE> <20>ʿ<EFBFBD>
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2. SAN, 6.24.2 =>
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Start up THS Test -> CR-Core52
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4.19.1.6 Fault Detection of Safety Mechanism / 6.24.2 Start-up Test for THS
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EMM
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THS
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1. <20><><EFBFBD>ͷ<EFBFBD>Ʈ
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2. SAN, 6.24.2 =>
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Start up THS Test -> CR-Core52
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3. PMIC IPL Test
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4. SoC CVM Test : <20>̰<EFBFBD> <20><><EFBFBD><EFBFBD> <20>κи<CEBA> <20><> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> å<>Ӵ<EFBFBD><D3B4><EFBFBD> <20><><EFBFBD><EFBFBD> <20>ʿ<EFBFBD>.<2E><>.
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48
Customer/MOBIS/PRK3_(ADAS_Parking3)/0_MTG/20260409.txt
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48
Customer/MOBIS/PRK3_(ADAS_Parking3)/0_MTG/20260409.txt
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@@ -0,0 +1,48 @@
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> å<><C3A5>
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CVM/Thermal Error Ȯ<><C8AE><EFBFBD><EFBFBD>(Woody)
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1. IPL TEST(Close)
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<EFBFBD><EFBFBD>ġ<EFBFBD><EFBFBD> disable
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3. I2C.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.(<28><><EFBFBD><EFBFBD> <20><><EFBFBD>뺸<EFBFBD><EBBAB8><EFBFBD><EFBFBD> OTP26.65)
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>¡.(Test Start)
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3. <20><><EFBFBD>ͷ<EFBFBD>Ʈ
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IRQ0 -> <20>۾<EFBFBD>
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4. ICUMX
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MCAL<EFBFBD><EFBFBD> <20>ȵ<EFBFBD>.
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5. EMM
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<EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>Ʈ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ȵ<EFBFBD>.
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ISR_common <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Ŭ<><C5AC><EFBFBD> <20>ϴµ<CFB4>
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>κп<CEBA><D0BF><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><EFBFBD><DFBB>ϰ<EFBFBD> <20><><EFBFBD><EFBFBD>.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> ISR_common <20><><EFBFBD><EFBFBD> Ŭ<><C5AC><EFBFBD><EFBFBD><EEB8A6>.
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<EFBFBD><EFBFBD><EFBFBD>÷δ<EFBFBD> <20>˷<EFBFBD><CBB7><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> -> <20><EFBFBD><EEB6BB> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>?
|
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||||||
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<EFBFBD>Ǵٽ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><EFBFBD><DFBB>ؼ<EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>.
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6.SPI
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<EFBFBD>ھ<EFBFBD>2<EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.
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0 eep <20><>û<EFBFBD><C3BB> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>
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core0 1 adc 10ms Task, <20>̰<EFBFBD> <20><><EFBFBD><EFBFBD> core2 <20>ε尡 <20>پ<EFBFBD><D9BE><EFBFBD>. <20>ε尡 50~60%
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core2 5 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2<><32><EFBFBD><EFBFBD>ũ<EFBFBD><C5A9> <20><EFBFBD>ũ -> <20><><EFBFBD>ͷ<EFBFBD>Ʈ <20>켱<EFBFBD><ECBCB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>, cpu<70>ε尡 <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>. DDR<44><52><EFBFBD><EFBFBD><EFBFBD><EFBFBD> AP<41><50> <20><><EFBFBD><EFBFBD><EFBFBD>Ǿ<EFBFBD> <20><><EFBFBD><EFBFBD>.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ؼ<EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ɶ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.
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MCAL SPI<50><49><EFBFBD><EFBFBD>
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD>, <20>溸<EFBFBD><E6BAB8><EFBFBD><EFBFBD>
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||||||
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<EFBFBD>߰<EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>͵<EFBFBD> <20>̽<EFBFBD><CCBD><EFBFBD>.
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Ÿ<EFBFBD>̹<EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݸ<EFBFBD> Ʋ<><C6B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ȵ<EFBFBD>. <20>̽<EFBFBD><CCBD><EFBFBD>.
|
||||||
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ȵǴ<C8B5> <20><><EFBFBD><EFBFBD> <20>ȵ<EFBFBD>. <20>ھ<EFBFBD> <20>ε尡 95% -> 90% <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ؾ<EFBFBD><D8BE><EFBFBD>.
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||||||
|
T1 Tool, <20>ھ<DABE><EEBAB0> <20>ε<EFBFBD><CEB5><EFBFBD><EFBFBD><EFBFBD> Task(10msTask<73>ִµ<D6B4>, 20ms<6D><73> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>), <20><><EFBFBD>ͷ<EFBFBD>Ʈ,
|
||||||
|
70%~80%<25><> <20>Ǿ<EFBFBD><C7BE><EFBFBD><EFBFBD><EFBFBD>.
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʿ<EFBFBD> <20>ε带 <20><><EFBFBD><EFBFBD> <20><> <20>ִ<EFBFBD> <20><><EFBFBD><EFBFBD>. <20>ε<EFBFBD>
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>Ͱ<EFBFBD> <20>ν<EFBFBD> <20>ǰų<C7B0> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>Ǹ<EFBFBD> <20>ȵ<EFBFBD>.
|
||||||
|
SPI <20><>Ƽ <20>ھ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>Ǿ<EFBFBD><C7BE><EFBFBD><EFBFBD><EFBFBD>.(<28><><EFBFBD>ɶ<EFBFBD>, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ν<EFBFBD>, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>) -> <20><><EFBFBD><EFBFBD> <20>Ұ<EFBFBD>.
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD>ݾ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><EFBFBD>.
|
||||||
|
|
||||||
|
7.QOS <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>
|
||||||
|
(<28><><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>),
|
||||||
56
Customer/MOBIS/PRK3_(ADAS_Parking3)/0_MTG/20260413_eng.txt
Normal file
56
Customer/MOBIS/PRK3_(ADAS_Parking3)/0_MTG/20260413_eng.txt
Normal file
@@ -0,0 +1,56 @@
|
|||||||
|
We are currently discussing the mass production of five upcoming models (including Korea<65><61>s top-tier premium flagship) based on the Hyundai Mobis V4H solution.
|
||||||
|
To ensure a successful SOP, the following CR-Core issues must be resolved and closed with the highest priority.
|
||||||
|
I have summarized the current CR-Core issues, including the I2C Stuck case, as follows.
|
||||||
|
To ensure smooth mass production, these issues must be closed.
|
||||||
|
The list is categorized by priority (1: Top).
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD> Ultrasonic sensor SPI communication issue (Jira#270), Priority 1
|
||||||
|
Current Status:
|
||||||
|
Excessive CPU load (90-95%) on Core 2 and loss of ultrasonic data.
|
||||||
|
Cause:
|
||||||
|
Core 2<><32>s ultrasonic sensor interrupt has the highest priority and takes up a large portion of processing.
|
||||||
|
Communication delays and disconnections occur due to spinlock application during inter-core SPI communication.
|
||||||
|
Performance constraints exist due to the DDR and AP connection structure.
|
||||||
|
Goal:
|
||||||
|
Achieve core load of 70-80% and ensure data integrity based on the customer<65><72>s performance measurement tool.
|
||||||
|
Customer Requirement:
|
||||||
|
Implementation of SPI multi-core support is mandatory to prevent ultrasonic data loss/delay. (Mass production is impossible if unresolved)
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD> Inquiry regarding Cortex-R52 Memory Mapping and BAR-based RAM Mirroring for SC3 Environment (Jira#1011), Priority 2
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD> I2C Communication with PMIC (Jira#943, 957), Priority 3
|
||||||
|
Status:
|
||||||
|
I have been testing with my own board for 3 days, but the issue was not reproduced.
|
||||||
|
Therefore, I started an aging test on the customer's reproduction board last Friday evening (April 10th).
|
||||||
|
I plan to visit the customer site on Tuesday afternoon (April 14th) to check the results.
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD> Functional Safety Verification on CR-Core (Jira#925)
|
||||||
|
Status:
|
||||||
|
1. CVM (4.19.2 Core Voltage Monitor, 6.24.3 Start-up Test for CVM): Woody needs debugging support for this issue.
|
||||||
|
2. THS (Thermal Sensor): Woody needs debugging support for this issue.
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD> Query regarding User-defined Notification/Callback for ECM Interrupts in CDD EMM (Jira#1000)
|
||||||
|
Status:
|
||||||
|
Checking with the MCAL team if the interrupt can be received in a wrapper function.
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD> Request for guidance on External Interrupt (IRQ) implementation without ICU MCAL module (Jira#965)
|
||||||
|
Status:
|
||||||
|
MCAL Team will provide another sample code which does not modify the driver for the customer to consider.
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD> Interface Guidance between CR-Core and ICUMX (Jira#997)
|
||||||
|
Status:
|
||||||
|
Waiting for a response from Renesas on Jira.
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD> AUTOSAR Architecture Review for CR-Core (Jira#942)
|
||||||
|
Status:
|
||||||
|
Customer review and Renesas review required.
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD> Documentation regarding QoS, such as an explanation of the operational logic (Jira#998)
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD> PMIC OTP26.68<EFBFBD><EFBFBD><EFBFBD><EFBFBD> Soc Reset <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><EFBFBD>
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȭ å<>Ӵ<EFBFBD> IPL FW<46><57> <20><><EFBFBD><EFBFBD>Ȯ<EFBFBD><C8AE> <20>ʿ<EFBFBD>.
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
95
Customer/MOBIS/PRK3_(ADAS_Parking3)/0_MTG/20260413_kr.txt
Normal file
95
Customer/MOBIS/PRK3_(ADAS_Parking3)/0_MTG/20260413_kr.txt
Normal file
@@ -0,0 +1,95 @@
|
|||||||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ʈ<EFBFBD><EFBFBD> <20>ʾ<EFBFBD> <20>̾<EFBFBD><CCBE>ϴ<EFBFBD>.
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> V4H <20>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ѱ<EFBFBD> <20><> <20>ְ<EFBFBD><D6B0><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 5 <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ϰ<EFBFBD> <20>ִ<EFBFBD>.
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD> I2C Stuck <20><> <20><><EFBFBD><EFBFBD><EFBFBD>ؼ<EFBFBD>, CR-Core<72><65> <20>̽<EFBFBD><CCBD><EFBFBD> <20>Ʒ<EFBFBD><C6B7><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ϰ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ߴ<EFBFBD>.
|
||||||
|
<EFBFBD><EFBFBD>Ȱ<EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD> <20><><EFBFBD><EFBFBD> <20>Ʒ<EFBFBD><C6B7><EFBFBD> <20>̽<EFBFBD><CCBD><EFBFBD> Close <20>ؾ<EFBFBD><D8BE>Ѵ<EFBFBD>.
|
||||||
|
<EFBFBD>켱 <20><><EFBFBD><EFBFBD>(1:Top) <20><><EFBFBD>Ʒ<EFBFBD><C6B7><EFBFBD> <20><><EFBFBD><EFBFBD>.
|
||||||
|
|
||||||
|
I am sorry for the late update.
|
||||||
|
We are currently discussing the mass production of five models, including Korea<65><61>s most premium vehicle, using Hyundai Mobis's V4H solution.
|
||||||
|
I have briefly summarized the CR-Core issues, including the I2C Stuck case, as follows.
|
||||||
|
To ensure smooth mass production, these issues must be closed.
|
||||||
|
The list is as follows, categorized by priority (1: Top).
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD> Ultrasonic sensor SPI communication issue.(Jira#270), Priority 1
|
||||||
|
<EFBFBD>ھ<EFBFBD>2<EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.
|
||||||
|
0 eep <20><>û<EFBFBD><C3BB> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>
|
||||||
|
Core0- MSIOF5, ADC IC 10ms Task, <20>̰<EFBFBD> <20><><EFBFBD><EFBFBD> core2 <20>ε尡 <20>پ<EFBFBD><D9BE><EFBFBD>. <20>ε尡 50~60%
|
||||||
|
MSIOF4, EEPROM
|
||||||
|
Core2- <20><>MSIOF1, <20><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD> 2<><32><EFBFBD><EFBFBD>ũ<EFBFBD><C5A9> <20><EFBFBD>ũ -> <20><><EFBFBD>ͷ<EFBFBD>Ʈ <20>켱<EFBFBD><ECBCB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>, cpu<70>ε尡 <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>. DDR<44><52><EFBFBD><EFBFBD><EFBFBD><EFBFBD> AP<41><50> <20><><EFBFBD><EFBFBD><EFBFBD>Ǿ<EFBFBD> <20><><EFBFBD><EFBFBD>.
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ؼ<EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ɶ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.
|
||||||
|
MCAL SPI<50><49><EFBFBD><EFBFBD>
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD>, <20>溸<EFBFBD><E6BAB8><EFBFBD><EFBFBD>
|
||||||
|
<EFBFBD>߰<EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>͵<EFBFBD> <20>̽<EFBFBD><CCBD><EFBFBD>.
|
||||||
|
Ÿ<EFBFBD>̹<EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݸ<EFBFBD> Ʋ<><C6B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ȵ<EFBFBD>. <20>̽<EFBFBD><CCBD><EFBFBD>.
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ȵǴ<C8B5> <20><><EFBFBD><EFBFBD> <20>ȵ<EFBFBD>. <20>ھ<EFBFBD> <20>ε尡 95% -> 90% <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ؾ<EFBFBD><D8BE><EFBFBD>.
|
||||||
|
T1 Tool, <20>ھ<DABE><EEBAB0> <20>ε<EFBFBD><CEB5><EFBFBD><EFBFBD><EFBFBD> Task(10msTask<73>ִµ<D6B4>, 20ms<6D><73> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>), <20><><EFBFBD>ͷ<EFBFBD>Ʈ,
|
||||||
|
70%~80%<25><> <20>Ǿ<EFBFBD><C7BE><EFBFBD><EFBFBD><EFBFBD>.
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʿ<EFBFBD> <20>ε带 <20><><EFBFBD><EFBFBD> <20><> <20>ִ<EFBFBD> <20><><EFBFBD><EFBFBD>. <20>ε<EFBFBD>
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>Ͱ<EFBFBD> <20>ν<EFBFBD> <20>ǰų<C7B0> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>Ǹ<EFBFBD> <20>ȵ<EFBFBD>.
|
||||||
|
SPI <20><>Ƽ <20>ھ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>Ǿ<EFBFBD><C7BE><EFBFBD><EFBFBD><EFBFBD>.(<28><><EFBFBD>ɶ<EFBFBD>, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ν<EFBFBD>, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>) -> <20><><EFBFBD><EFBFBD> <20>Ұ<EFBFBD>.
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD>ݾ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><EFBFBD>.
|
||||||
|
<EFBFBD>ᱹ <20><> <20>ھ<DABE><EEBFA1> SPI <20><><EFBFBD><EFBFBD><EFBFBD>ϴ<EFBFBD><CFB4><EFBFBD> <20>־<EFBFBD>, <20><><EFBFBD>ɶ<EFBFBD><C9B6><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>Ǿ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> SPI<50><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD>ų<EFBFBD>, <20><><EFBFBD><EFBFBD><EFBFBD>ų<EFBFBD> <20>ϴ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><EFBFBD><DFBB><EFBFBD> <20><> <20>ִ<EFBFBD>.
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20>ٸ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>, SPI<50><49> <20><>Ƽ<EFBFBD>ھ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>Ǿ<EFBFBD><C7BE>ߵȴٰ<C8B4> <20>Ѵ<EFBFBD>.
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> SPI <20><><EFBFBD><EFBFBD> <20>̽<EFBFBD>
|
||||||
|
<EFBFBD><EFBFBD>Ȳ: Core 2 CPU <20>ε<EFBFBD> <20><><EFBFBD><EFBFBD>(90~95%) <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><EFBFBD>.
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Core 2<><32> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD>ͷ<EFBFBD>Ʈ <20>켱<EFBFBD><ECBCB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> ó<><C3B3> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ŭ.
|
||||||
|
<EFBFBD>ھ<EFBFBD> <20><> SPI <20><><EFBFBD><EFBFBD> <20><> <20><><EFBFBD>ɶ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><EFBFBD>.
|
||||||
|
DDR <20><> AP <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>.
|
||||||
|
<EFBFBD><EFBFBD>ǥ: <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> Tool <20><><EFBFBD><EFBFBD>, <20>ھ<EFBFBD> <20>ε<EFBFBD> 70~80% <20><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>Ἲ Ȯ<><C8AE>.
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>䱸<EFBFBD><E4B1B8><EFBFBD><EFBFBD>: <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ν<EFBFBD>/<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> SPI <20><>Ƽ<EFBFBD>ھ<EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20>ʼ<EFBFBD>. (<28><><EFBFBD>ذ<EFBFBD> <20><> <20><><EFBFBD><EFBFBD> <20>Ұ<EFBFBD>)
|
||||||
|
|
||||||
|
Current Status: Excessive CPU load (90-95%) on Core 2 and loss of ultrasonic data.
|
||||||
|
Cause: Core 2<><32>s ultrasonic sensor interrupt has the highest priority and takes up a large portion of processing. Communication delays and disconnections occur due to spinlock application during inter-core SPI communication. Performance constraints exist due to the DDR and AP connection structure.
|
||||||
|
Goal: Achieve core load of 70-80% and ensure data integrity based on the customer<65><72>s performance measurement tool.
|
||||||
|
Customer Requirement: Implementation of SPI multi-core support is mandatory to prevent ultrasonic data loss/delay. (Mass production is impossible if unresolved)
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD> Inquiry regarding Cortex-R52 Memory Mapping and BAR-based RAM Mirroring for SC3 Environment(Jira#1011), Priority 2
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD> I2C Communication with PMIC (Jira#943,957), Priority 3
|
||||||
|
[Status description]
|
||||||
|
I have been testing with my own board for 3 days, but the issue was not reproduced.
|
||||||
|
Therefore, I started an aging test on the customer's reproduction board last Friday evening (April 10th).
|
||||||
|
I plan to visit the customer site on Tuesday afternoon (April 14th) to check the results.
|
||||||
|
|
||||||
|
Woody <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ִ<EFBFBD> <20><><EFBFBD>忡<EFBFBD><E5BFA1><EFBFBD><EFBFBD> 3<><33> <20><><EFBFBD><EFBFBD> Test <20>ߴµ<DFB4> <20><><EFBFBD><EFBFBD> <20>ȵ<EFBFBD>.
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ִ<EFBFBD> <20><><EFBFBD><EFBFBD> <20>ߵǴ<DFB5> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4<><34> 10<31><30>(<28><>) <20><><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD>¡ Test Start, 4<><34> 14(ȭ) PM<50><4D> <20>湮<EFBFBD>ؼ<EFBFBD> <20><><EFBFBD><EFBFBD> Ȯ<><C8AE> <20><><EFBFBD><EFBFBD>.
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD> Functional Safety Verification on CR-Core (Jira#925)
|
||||||
|
1. CVM(4.19.2 Core Voltage Monitor, 6.24.3 Start-up Test for CVM) : Woody needs debugging support for this issue.
|
||||||
|
2. THS (Thermal Sensor): Woody needs debugging support for this issue.
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD> Query regarding User-defined Notification/Callback for ECM Interrupts in CDD EMM (Jira#1000)
|
||||||
|
[Status description]
|
||||||
|
20260413 - Checking with the MCAL team if the interrupt can be received in a wrapper function.
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>Ʈ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ȵ<EFBFBD>.
|
||||||
|
ISR_common <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Ŭ<><C5AC><EFBFBD> <20>ϴµ<CFB4>
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>κп<CEBA><D0BF><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><EFBFBD><DFBB>ϰ<EFBFBD> <20><><EFBFBD><EFBFBD>.
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> ISR_common <20><><EFBFBD><EFBFBD> Ŭ<><C5AC><EFBFBD><EFBFBD><EEB8A6>.
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD>÷δ<EFBFBD> <20>˷<EFBFBD><CBB7><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> -> <20><EFBFBD><EEB6BB> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>?
|
||||||
|
|
||||||
|
<EFBFBD>Ǵٽ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><EFBFBD><DFBB>ؼ<EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>.
|
||||||
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|
||||||
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|
||||||
|
<EFBFBD><EFBFBD> Request for guidance on External Interrupt (IRQ) implementation without ICU MCAL module (Jira#965)
|
||||||
|
[Status description]
|
||||||
|
GP4_16, GP1_20(Y34)<29><> Function1<6E><31> IRQ0 <20><><EFBFBD>밡<EFBFBD><EBB0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Ȯ<><C8AE>.
|
||||||
|
MCAL Team will provide an other sample code which not modify driver for customer to consider.
|
||||||
|
20260413 - MCAL Team will provide an other sample code which not modify driver for customer to consider.
|
||||||
|
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD> Interface Guidance between CR-Core and ICUMX (Jira#997)
|
||||||
|
Waiting for a response from Renesas on Jira.
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD> AUTOSAR Architecture Review for CR-Core (Jira#942)
|
||||||
|
[Status description]
|
||||||
|
Customer review and Renesas review required.
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><> Renesas <20><><EFBFBD><EFBFBD> <20>ʿ<EFBFBD>
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD> Documentation regarding QoS, such as an explanation of the operational logic.(Jira#998)
|
||||||
|
|
||||||
|
|
||||||
|
<EFBFBD><EFBFBD> PMIC OTP26.68<EFBFBD><EFBFBD><EFBFBD><EFBFBD> Soc Reset <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><EFBFBD>
|
||||||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȭ å<>Ӵ<EFBFBD> IPL FW<46><57> <20><><EFBFBD><EFBFBD>Ȯ<EFBFBD><C8AE> <20>ʿ<EFBFBD>.
|
||||||
Reference in New Issue
Block a user