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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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<AUTOSAR xmlns="http://autosar.org/schema/r4.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://autosar.org/schema/r4.0 AUTOSAR_00049.xsd">
|
||||
<AR-PACKAGES>
|
||||
<AR-PACKAGE>
|
||||
<SHORT-NAME>ActiveEcuC</SHORT-NAME>
|
||||
<ELEMENTS>
|
||||
<ECUC-MODULE-CONFIGURATION-VALUES UUID="4d74860a-9c22-4cbf-b7ea-fcc9fba237a1">
|
||||
<SHORT-NAME>Port</SHORT-NAME>
|
||||
<ADMIN-DATA>
|
||||
<SDGS>
|
||||
<SDG GID="DV:CfgPostBuild">
|
||||
<SD GID="DV:postBuildVariantSupport">false</SD>
|
||||
</SDG>
|
||||
</SDGS>
|
||||
</ADMIN-DATA>
|
||||
<DEFINITION-REF DEST="ECUC-MODULE-DEF">/Renesas/EcucDefs_Port/Port</DEFINITION-REF>
|
||||
<IMPLEMENTATION-CONFIG-VARIANT>VARIANT-POST-BUILD</IMPLEMENTATION-CONFIG-VARIANT>
|
||||
<MODULE-DESCRIPTION-REF DEST="BSW-IMPLEMENTATION">/Renesas/BswModuleDescriptions_Port/Port_Impl</MODULE-DESCRIPTION-REF>
|
||||
<CONTAINERS>
|
||||
<ECUC-CONTAINER-VALUE UUID="7e241d0f-1928-474a-9485-0f4f186c31a5">
|
||||
<SHORT-NAME>PortGeneral</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortCriticalSectionProtection</DEFINITION-REF>
|
||||
<VALUE>true</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortDevErrorDetect</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortDeviceName</DEFINITION-REF>
|
||||
<VALUE>V4H</VALUE>
|
||||
</ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortMaxMode</DEFINITION-REF>
|
||||
<VALUE>5</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortSetPinDefaultDirectionApi</DEFINITION-REF>
|
||||
<VALUE>true</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortSetPinDirectionApi</DEFINITION-REF>
|
||||
<VALUE>true</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortSetPinModeApi</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortSetToDioAltModeApi</DEFINITION-REF>
|
||||
<VALUE>true</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
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||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortVersionCheckExternalModules</DEFINITION-REF>
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||||
<VALUE>true</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortVersionInfoApi</DEFINITION-REF>
|
||||
<VALUE>true</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortFUSEMonitoringApi</DEFINITION-REF>
|
||||
<VALUE>true</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortUnintendedModuleStopCheck</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortExclusiveControl</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortExclusiveSelection</DEFINITION-REF>
|
||||
<VALUE>MFISLCKR0</VALUE>
|
||||
</ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortExclusiveTimeout</DEFINITION-REF>
|
||||
<VALUE>256410</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortDomainId</DEFINITION-REF>
|
||||
<VALUE>0</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortOTPMON0ExpectedValue</DEFINITION-REF>
|
||||
<VALUE>0</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortOTPMON3ExpectedValue</DEFINITION-REF>
|
||||
<VALUE>0</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
</PARAMETER-VALUES>
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||||
</ECUC-CONTAINER-VALUE>
|
||||
<ECUC-CONTAINER-VALUE UUID="46776dce-83b4-4d47-b826-08eec7bdef39">
|
||||
<SHORT-NAME>PortConfigSet</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet</DEFINITION-REF>
|
||||
<SUB-CONTAINERS>
|
||||
<ECUC-CONTAINER-VALUE UUID="612993b3-c328-4a3b-aa19-73717b79f672">
|
||||
<SHORT-NAME>PortContainer</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortNumberOfPortPins</DEFINITION-REF>
|
||||
<VALUE>1</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
</PARAMETER-VALUES>
|
||||
<SUB-CONTAINERS>
|
||||
<ECUC-CONTAINER-VALUE UUID="04860047-0150-4c29-841a-837dd1340114">
|
||||
<SHORT-NAME>PortPin</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
<ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>
|
||||
<VALUE>PORT_PIN_IN</VALUE>
|
||||
</ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>
|
||||
<VALUE>1</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinInitialMode</DEFINITION-REF>
|
||||
<VALUE>PORT_PIN_MODE_DIO</VALUE>
|
||||
</ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>
|
||||
<VALUE>PORT_PIN_LEVEL_LOW</VALUE>
|
||||
</ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>
|
||||
<VALUE>PORT_PIN_MODE_DIO</VALUE>
|
||||
</ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinModeChangeable</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
</PARAMETER-VALUES>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
</SUB-CONTAINERS>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
<ECUC-CONTAINER-VALUE UUID="54b516a1-6b36-43ac-a927-ee66a37f5aca">
|
||||
<SHORT-NAME>PortFilterGroupConfig</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig</DEFINITION-REF>
|
||||
<SUB-CONTAINERS>
|
||||
<ECUC-CONTAINER-VALUE UUID="1b7e2b5a-9d2f-4bdc-898d-e1764999e363">
|
||||
<SHORT-NAME>PortChatteringFilterGroup7</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortFilterClockFrequency</DEFINITION-REF>
|
||||
<VALUE>0</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
</PARAMETER-VALUES>
|
||||
<SUB-CONTAINERS>
|
||||
<ECUC-CONTAINER-VALUE UUID="2375d5f9-65a5-4048-9d31-247dda319abc">
|
||||
<SHORT-NAME>PortChatteringFilterInput0</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput0</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput0/PortChatteringFilterInputOption</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
</PARAMETER-VALUES>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
<ECUC-CONTAINER-VALUE UUID="f847a1e5-2ee7-4120-9b16-cfa76827c783">
|
||||
<SHORT-NAME>PortChatteringFilterInput1</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput1</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput1/PortChatteringFilterInputOption</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
</PARAMETER-VALUES>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
<ECUC-CONTAINER-VALUE UUID="21c1bba4-70aa-4815-a1d0-8fbe4638ea9d">
|
||||
<SHORT-NAME>PortChatteringFilterInput2</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput2</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput2/PortChatteringFilterInputOption</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
</PARAMETER-VALUES>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
<ECUC-CONTAINER-VALUE UUID="eb662a9d-f105-4830-b90e-2af81bc3d989">
|
||||
<SHORT-NAME>PortChatteringFilterInput3</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput3</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput3/PortChatteringFilterInputOption</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
</PARAMETER-VALUES>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
<ECUC-CONTAINER-VALUE UUID="3588012e-d2bf-4362-8171-48cad94fb4d3">
|
||||
<SHORT-NAME>PortChatteringFilterInput4</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput4</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput4/PortChatteringFilterInputOption</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
</PARAMETER-VALUES>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
<ECUC-CONTAINER-VALUE UUID="5e1c0b27-2537-49c3-baee-0ef532c1bd9c">
|
||||
<SHORT-NAME>PortChatteringFilterInput5</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput5</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput5/PortChatteringFilterInputOption</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
</PARAMETER-VALUES>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
<ECUC-CONTAINER-VALUE UUID="c3be051c-ded0-4607-920c-2af367ee7643">
|
||||
<SHORT-NAME>PortChatteringFilterInput6</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput6</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput6/PortChatteringFilterInputOption</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
</PARAMETER-VALUES>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
<ECUC-CONTAINER-VALUE UUID="e1d9a21a-cf68-42af-8a8e-dfbce2b1ee81">
|
||||
<SHORT-NAME>PortChatteringFilterInput7</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput7</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput7/PortChatteringFilterInputOption</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
</PARAMETER-VALUES>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
<ECUC-CONTAINER-VALUE UUID="23c07741-1127-43d2-bece-a27102ef0cfd">
|
||||
<SHORT-NAME>PortChatteringFilterInput8</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput8</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput8/PortChatteringFilterInputOption</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
</PARAMETER-VALUES>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
<ECUC-CONTAINER-VALUE UUID="2c91c30b-374b-48cc-a851-520a4ff05f30">
|
||||
<SHORT-NAME>PortChatteringFilterInput9</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput9</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput9/PortChatteringFilterInputOption</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
</PARAMETER-VALUES>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
<ECUC-CONTAINER-VALUE UUID="50191ce8-2c2d-423e-9d18-71f58a233c23">
|
||||
<SHORT-NAME>PortChatteringFilterInput10</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput10</DEFINITION-REF>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<SHORT-NAME>PortChatteringFilterInput11</SHORT-NAME>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<SHORT-NAME>PortChatteringFilterInput12</SHORT-NAME>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<SHORT-NAME>PortChatteringFilterInput13</SHORT-NAME>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<SHORT-NAME>PortChatteringFilterInput14</SHORT-NAME>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<SHORT-NAME>PortChatteringFilterInput15</SHORT-NAME>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<VALUE>false</VALUE>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<SHORT-NAME>PortChatteringFilterInput16</SHORT-NAME>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<SHORT-NAME>PortChatteringFilterInput17</SHORT-NAME>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<VALUE>false</VALUE>
|
||||
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|
||||
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|
||||
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|
||||
<ECUC-CONTAINER-VALUE UUID="269e8bb0-d6bb-494f-9213-6aeff3e654a8">
|
||||
<SHORT-NAME>PortChatteringFilterInput18</SHORT-NAME>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<VALUE>false</VALUE>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<SHORT-NAME>PortChatteringFilterInput19</SHORT-NAME>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<VALUE>false</VALUE>
|
||||
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|
||||
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|
||||
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|
||||
<ECUC-CONTAINER-VALUE UUID="47df979f-b22d-4596-a909-3ed5a5136e83">
|
||||
<SHORT-NAME>PortChatteringFilterInput20</SHORT-NAME>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<VALUE>false</VALUE>
|
||||
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|
||||
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|
||||
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|
||||
<ECUC-CONTAINER-VALUE UUID="e12676c8-d783-492f-9f17-61f95a107ce7">
|
||||
<SHORT-NAME>PortChatteringFilterInput21</SHORT-NAME>
|
||||
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|
||||
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|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
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|
||||
<VALUE>false</VALUE>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<SHORT-NAME>PortChatteringFilterInput22</SHORT-NAME>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<VALUE>false</VALUE>
|
||||
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|
||||
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|
||||
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|
||||
<ECUC-CONTAINER-VALUE UUID="dcdb0390-10dc-47ec-bdc9-439fcff1410a">
|
||||
<SHORT-NAME>PortChatteringFilterInput23</SHORT-NAME>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<VALUE>false</VALUE>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<SHORT-NAME>PortChatteringFilterInput24</SHORT-NAME>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<VALUE>false</VALUE>
|
||||
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|
||||
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|
||||
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|
||||
<ECUC-CONTAINER-VALUE UUID="a44a91c7-4dca-4844-becc-ce273b6f879e">
|
||||
<SHORT-NAME>PortChatteringFilterInput25</SHORT-NAME>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<VALUE>false</VALUE>
|
||||
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|
||||
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|
||||
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|
||||
<ECUC-CONTAINER-VALUE UUID="e800ff55-ee56-44d9-a82d-e5b449e8bfe1">
|
||||
<SHORT-NAME>PortChatteringFilterInput26</SHORT-NAME>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<VALUE>false</VALUE>
|
||||
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|
||||
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|
||||
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|
||||
<ECUC-CONTAINER-VALUE UUID="85c78e2d-6462-4841-be3d-b1650365155b">
|
||||
<SHORT-NAME>PortChatteringFilterInput27</SHORT-NAME>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<VALUE>false</VALUE>
|
||||
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|
||||
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|
||||
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|
||||
<ECUC-CONTAINER-VALUE UUID="33687cb6-e9f3-4386-afb0-2de179ee04c6">
|
||||
<SHORT-NAME>PortChatteringFilterInput28</SHORT-NAME>
|
||||
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|
||||
<PARAMETER-VALUES>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput28/PortChatteringFilterInputOption</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
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|
||||
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|
||||
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|
||||
<ECUC-CONTAINER-VALUE UUID="8b8c8382-4093-4e88-bb60-c2455f79089e">
|
||||
<SHORT-NAME>PortChatteringFilterInput29</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput29</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
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|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput29/PortChatteringFilterInputOption</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
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|
||||
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|
||||
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|
||||
<ECUC-CONTAINER-VALUE UUID="341aa1d5-d736-49c8-86aa-e682bd8d32e7">
|
||||
<SHORT-NAME>PortChatteringFilterInput30</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput30</DEFINITION-REF>
|
||||
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|
||||
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|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput30/PortChatteringFilterInputOption</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
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|
||||
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|
||||
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|
||||
<ECUC-CONTAINER-VALUE UUID="a627aafb-5026-4207-b0df-0c51086429d5">
|
||||
<SHORT-NAME>PortChatteringFilterInput31</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput31</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
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|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput31/PortChatteringFilterInputOption</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
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|
||||
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|
||||
</ECUC-CONTAINER-VALUE>
|
||||
</SUB-CONTAINERS>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
<ECUC-CONTAINER-VALUE UUID="a7196c2e-5737-4832-810e-e6aa61218897">
|
||||
<SHORT-NAME>PortChatteringFilterGroup1</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup1</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup1/PortFilterClockFrequency</DEFINITION-REF>
|
||||
<VALUE>0</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
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|
||||
<SUB-CONTAINERS>
|
||||
<ECUC-CONTAINER-VALUE UUID="f2e737a6-418b-44d9-a5e2-398d16094e9d">
|
||||
<SHORT-NAME>PortChatteringFilterInput24</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup1/PortChatteringFilterInput24</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup1/PortChatteringFilterInput24/PortChatteringFilterInputOption</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
</PARAMETER-VALUES>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
<ECUC-CONTAINER-VALUE UUID="95884e04-d78f-4bcb-962c-d0f8272581a8">
|
||||
<SHORT-NAME>PortChatteringFilterInput25</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup1/PortChatteringFilterInput25</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup1/PortChatteringFilterInput25/PortChatteringFilterInputOption</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
</PARAMETER-VALUES>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
</SUB-CONTAINERS>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
</SUB-CONTAINERS>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
<ECUC-CONTAINER-VALUE UUID="b007c727-1d4d-4a45-8c83-ec9e26c6d7a5">
|
||||
<SHORT-NAME>PortGroup1</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1</DEFINITION-REF>
|
||||
<SUB-CONTAINERS>
|
||||
<ECUC-CONTAINER-VALUE UUID="cc5ae25d-29b0-437c-ab89-dc1c829a191c">
|
||||
<SHORT-NAME>PortPin24</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinDioAltModeChangeable</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinDirection</DEFINITION-REF>
|
||||
<VALUE>PORT_PIN_IN</VALUE>
|
||||
</ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinDirectionChangeable</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinInitialMode</DEFINITION-REF>
|
||||
<VALUE>INTERRUPT</VALUE>
|
||||
</ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinLevelValue</DEFINITION-REF>
|
||||
<VALUE>PORT_PIN_LEVEL_LOW</VALUE>
|
||||
</ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinModeChangeable</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinPullOption</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinPullControl</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinPolaritySelect</DEFINITION-REF>
|
||||
<VALUE>PORT_PIN_NEGATIVE_LOGIC</VALUE>
|
||||
</ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinSensitiveInterrupt</DEFINITION-REF>
|
||||
<VALUE>PORT_PIN_EDGE_SENSITIVE</VALUE>
|
||||
</ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinDetectionInterrupt</DEFINITION-REF>
|
||||
<VALUE>PORT_PIN_ONE_EDGE</VALUE>
|
||||
</ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinOutDataSelect</DEFINITION-REF>
|
||||
<VALUE>PORT_PIN_OUTDT</VALUE>
|
||||
</ECUC-TEXTUAL-PARAM-VALUE>
|
||||
</PARAMETER-VALUES>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
<ECUC-CONTAINER-VALUE UUID="c638466a-3e06-4543-b2ad-2d61195ce8e8">
|
||||
<SHORT-NAME>PortPin25</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25</DEFINITION-REF>
|
||||
<PARAMETER-VALUES>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinDioAltModeChangeable</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinDirection</DEFINITION-REF>
|
||||
<VALUE>PORT_PIN_IN</VALUE>
|
||||
</ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinDirectionChangeable</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinInitialMode</DEFINITION-REF>
|
||||
<VALUE>INTERRUPT</VALUE>
|
||||
</ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinLevelValue</DEFINITION-REF>
|
||||
<VALUE>PORT_PIN_LEVEL_LOW</VALUE>
|
||||
</ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinModeChangeable</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinPullOption</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinPullControl</DEFINITION-REF>
|
||||
<VALUE>false</VALUE>
|
||||
</ECUC-NUMERICAL-PARAM-VALUE>
|
||||
<ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinPolaritySelect</DEFINITION-REF>
|
||||
<VALUE>PORT_PIN_POSITIVE_LOGIC</VALUE>
|
||||
</ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinSensitiveInterrupt</DEFINITION-REF>
|
||||
<VALUE>PORT_PIN_EDGE_SENSITIVE</VALUE>
|
||||
</ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinDetectionInterrupt</DEFINITION-REF>
|
||||
<VALUE>PORT_PIN_ONE_EDGE</VALUE>
|
||||
</ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<ECUC-TEXTUAL-PARAM-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinOutDataSelect</DEFINITION-REF>
|
||||
<VALUE>PORT_PIN_OUTDT</VALUE>
|
||||
</ECUC-TEXTUAL-PARAM-VALUE>
|
||||
</PARAMETER-VALUES>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
</SUB-CONTAINERS>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
</SUB-CONTAINERS>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
<ECUC-CONTAINER-VALUE UUID="f2637182-3b6e-4973-99b5-96df189734f5">
|
||||
<SHORT-NAME>PortDemEventParameterRefs</SHORT-NAME>
|
||||
<DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortDemEventParameterRefs</DEFINITION-REF>
|
||||
<REFERENCE-VALUES>
|
||||
<ECUC-REFERENCE-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-REFERENCE-DEF">/Renesas/EcucDefs_Port/Port/PortDemEventParameterRefs/PORT_E_FUSE_MONITORING_FAILURE</DEFINITION-REF>
|
||||
<VALUE-REF DEST="ECUC-CONTAINER-VALUE">/ActiveEcuC/Dem/DemConfigSet/DemEventParameter</VALUE-REF>
|
||||
</ECUC-REFERENCE-VALUE>
|
||||
<ECUC-REFERENCE-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-REFERENCE-DEF">/Renesas/EcucDefs_Port/Port/PortDemEventParameterRefs/PORT_E_UNINTENDED_MODULE_STOP_FAILURE</DEFINITION-REF>
|
||||
<VALUE-REF DEST="ECUC-CONTAINER-VALUE">/ActiveEcuC/Dem/DemConfigSet/DemEventParameter_001</VALUE-REF>
|
||||
</ECUC-REFERENCE-VALUE>
|
||||
<ECUC-REFERENCE-VALUE>
|
||||
<DEFINITION-REF DEST="ECUC-REFERENCE-DEF">/Renesas/EcucDefs_Port/Port/PortDemEventParameterRefs/PORT_E_GET_CONTROL_FAILURE</DEFINITION-REF>
|
||||
<VALUE-REF DEST="ECUC-CONTAINER-VALUE">/ActiveEcuC/Dem/DemConfigSet/DemEventParameter_002</VALUE-REF>
|
||||
</ECUC-REFERENCE-VALUE>
|
||||
</REFERENCE-VALUES>
|
||||
</ECUC-CONTAINER-VALUE>
|
||||
</CONTAINERS>
|
||||
</ECUC-MODULE-CONFIGURATION-VALUES>
|
||||
</ELEMENTS>
|
||||
</AR-PACKAGE>
|
||||
</AR-PACKAGES>
|
||||
</AUTOSAR>
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,306 @@
|
||||
/*============================================================================*/
|
||||
/* Project = AUTOSAR Renesas MCAL Components */
|
||||
/* Module = Port_Cfg.h */
|
||||
/*============================================================================*/
|
||||
/* COPYRIGHT */
|
||||
/*============================================================================*/
|
||||
/* Copyright(c) 2026 Renesas Electronics Corporation. */
|
||||
/*============================================================================*/
|
||||
/* Purpose: */
|
||||
/* This file contains pre-compile time parameters. */
|
||||
/* AUTOMATICALLY GENERATED FILE - DO NOT EDIT */
|
||||
/* */
|
||||
/*============================================================================*/
|
||||
/* */
|
||||
/* Unless otherwise agreed upon in writing between your company and */
|
||||
/* Renesas Electronics Corporation the following shall apply! */
|
||||
/* */
|
||||
/* Warranty Disclaimer */
|
||||
/* */
|
||||
/* There is no warranty of any kind whatsoever granted by Renesas. Any */
|
||||
/* warranty is expressly disclaimed and excluded by Renesas, either expressed */
|
||||
/* or implied, including but not limited to those for non-infringement of */
|
||||
/* intellectual property, merchantability and/or fitness for the particular */
|
||||
/* purpose. */
|
||||
/* */
|
||||
/* Renesas shall not have any obligation to maintain, service or provide bug */
|
||||
/* fixes for the supplied Product(s) and/or the Application. */
|
||||
/* */
|
||||
/* Each User is solely responsible for determining the appropriateness of */
|
||||
/* using the Product(s) and assumes all risks associated with its exercise */
|
||||
/* of rights under this Agreement, including, but not limited to the risks */
|
||||
/* and costs of program errors, compliance with applicable laws, damage to */
|
||||
/* or loss of data, programs or equipment, and unavailability or */
|
||||
/* interruption of operations. */
|
||||
/* */
|
||||
/* Limitation of Liability */
|
||||
/* */
|
||||
/* In no event shall Renesas be liable to the User for any incidental, */
|
||||
/* consequential, indirect, or punitive damage (including but not limited */
|
||||
/* to lost profits) regardless of whether such liability is based on breach */
|
||||
/* of contract, tort, strict liability, breach of warranties, failure of */
|
||||
/* essential purpose or otherwise and even if advised of the possibility of */
|
||||
/* such damages. Renesas shall not be liable for any services or products */
|
||||
/* provided by third party vendors, developers or consultants identified or */
|
||||
/* referred to the User by Renesas in connection with the Product(s) and/or */
|
||||
/* the Application. */
|
||||
/* */
|
||||
/*============================================================================*/
|
||||
/* Environment: */
|
||||
/* Devices: V4H */
|
||||
/*============================================================================*/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** Revision Control History **
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** Generation Tool Version **
|
||||
*******************************************************************************/
|
||||
/* */
|
||||
/* TOOL VERSION: PortRCAR.dll version: 1.0.16, MCALConfGen.exe version: 1.2.3 */
|
||||
/* */
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** Input File **
|
||||
*******************************************************************************/
|
||||
/*
|
||||
* INPUT FILE: C:\Users\a5162358\Documents\V4H\20250829_V4H_MCAL_training\RTM8RC779GCMCL5DA0JCDRE\rel\modules\port\sample_application\V4H\19_11\config\App_PORT_V4H_Sample.arxml
|
||||
* C:\Users\a5162358\Documents\V4H\20250829_V4H_MCAL_training\RTM8RC779GCMCL5DA0JCDRE\rel\modules\port\generator\V4H\R1911_PORT_V4H_BSWMDT.arxml
|
||||
* C:\Users\a5162358\Documents\V4H\20250829_V4H_MCAL_training\RTM8RC779GCMCL5DA0JCDRE\rel\common\generic\stubs\19_11\Dem\xml\Dem_Port.arxml
|
||||
* C:\Users\a5162358\Documents\V4H\20250829_V4H_MCAL_training\RTM8RC779GCMCL5DA0JCDRE\rel\V4H\common_family\generator\arm\Sample_Application_V4H.trxml
|
||||
* GENERATED ON: 14 Apr 2026 - 03:10:33
|
||||
*/
|
||||
|
||||
|
||||
#ifndef PORT_CFG_H
|
||||
#define PORT_CFG_H
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** Include Section **
|
||||
*******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
** MISRA C Rule Violations **
|
||||
*******************************************************************************/
|
||||
/* 1. MISRA C RULE VIOLATION: */
|
||||
/* Message : (7:0791) [U] Macro identifier does not differ from other */
|
||||
/* macro identifier(s) (e.g. '') within the specified */
|
||||
/* number of significant characters. */
|
||||
/* Rule : MISRA-C:2012 Rule-5.4 */
|
||||
/* Justification : This macro identifier is following AUTOSAR standard rule */
|
||||
/* (Symbolic Name or Published Macro's name), */
|
||||
/* so this is accepted. */
|
||||
/* Verification : However, part of the code is verified manually */
|
||||
/* and it is not having any impact. */
|
||||
/* Reference : Look for START Msg(7:0791)-1 and */
|
||||
/* END Msg(7:0791)-1 tags in the code. */
|
||||
/******************************************************************************/
|
||||
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** Version Information **
|
||||
*******************************************************************************/
|
||||
#define PORT_CFG_AR_RELEASE_MAJOR_VERSION 4U
|
||||
#define PORT_CFG_AR_RELEASE_MINOR_VERSION 5U
|
||||
#define PORT_CFG_AR_RELEASE_REVISION_VERSION 0U
|
||||
#define PORT_CFG_SW_MAJOR_VERSION 1U
|
||||
#define PORT_CFG_SW_MINOR_VERSION 1U
|
||||
|
||||
/*******************************************************************************
|
||||
** Common Published Information **
|
||||
*******************************************************************************/
|
||||
#define PORT_AR_RELEASE_MAJOR_VERSION_VALUE 4U
|
||||
#define PORT_AR_RELEASE_MINOR_VERSION_VALUE 5U
|
||||
#define PORT_AR_RELEASE_REVISION_VERSION_VALUE 0U
|
||||
#define PORT_SW_MAJOR_VERSION_VALUE 1U
|
||||
#define PORT_SW_MINOR_VERSION_VALUE 1U
|
||||
#define PORT_SW_PATCH_VERSION_VALUE 12U
|
||||
#define PORT_VENDOR_ID_VALUE 59U
|
||||
#define PORT_MODULE_ID_VALUE 124U
|
||||
|
||||
/*******************************************************************************
|
||||
** Global Symbols **
|
||||
*******************************************************************************/
|
||||
/* The address of FILCLKSEL8 register to implement Unintended Module Stop */
|
||||
/* Check */
|
||||
#define PORT_FILCLKSEL8_REG_ADDR (uint32)0xE60681ACUL
|
||||
|
||||
/* The address of MODSEL8 register to implement Unintended Module Stop Check */
|
||||
#define PORT_MODSEL8_REG_ADDR (uint32)0xE6068100UL
|
||||
|
||||
/* Instance ID of the PORT Driver Component */
|
||||
#define PORT_INSTANCE_ID_VALUE 0U
|
||||
|
||||
/* The DEM failure of Port_ExclusiveControl API */
|
||||
#define PORT_E_GET_CONTROL_FAILURE \
|
||||
DemConf_DemEventParameter_DemEventParameter_002
|
||||
|
||||
/* The DEM failure of Port_FUSEMonitoring API */
|
||||
#define PORT_E_FUSE_MONITORING_FAILURE \
|
||||
DemConf_DemEventParameter_DemEventParameter
|
||||
|
||||
/* The DEM failure of Port_UnintendedModuleStopCheck API */
|
||||
#define PORT_E_UNINTENDED_MODULE_STOP_FAILURE \
|
||||
DemConf_DemEventParameter_DemEventParameter_001
|
||||
|
||||
/* Enables/Disables Port_GetVersionInfo API */
|
||||
#define PORT_VERSION_INFO_API STD_ON
|
||||
|
||||
/* Enables/Disables Port_SetPinDirection API */
|
||||
#define PORT_SET_PIN_DIRECTION_API STD_ON
|
||||
|
||||
/* Enables/Disables Port_SetPinDefaultDirection API */
|
||||
#define PORT_SET_PIN_DEFAULT_DIRECTION_API STD_ON
|
||||
|
||||
/* Enables/Disables Port_SetToDioMode and Port_SetToAlternateMode API */
|
||||
#define PORT_SET_TO_DIO_ALT_MODE_API STD_ON
|
||||
|
||||
/* Enables/Disables Port_SetPinMode API */
|
||||
#define PORT_SET_PIN_MODE_API STD_OFF
|
||||
|
||||
/* Enables/Disables PortFUSEMonitoringApi */
|
||||
#define PORT_FUSE_MONITORING_API STD_ON
|
||||
|
||||
/* Enables/Disables Port_UnintendedModuleStopCheck API */
|
||||
#define PORT_UNINTENDED_MODULE_STOP_CHECK STD_OFF
|
||||
|
||||
/* Enables/Disables Development error detect */
|
||||
#define PORT_DEV_ERROR_DETECT STD_OFF
|
||||
|
||||
/* Enable/Disable the enter/exit critical section functionality */
|
||||
#define PORT_CRITICAL_SECTION_PROTECTION STD_ON
|
||||
|
||||
/* Pre-compile option to enable or disable version check of inter-module */
|
||||
/* dependencies */
|
||||
#define PORT_VERSION_CHECK_EXT_MODULES STD_ON
|
||||
|
||||
/* Enables/Disables Dem error detect */
|
||||
#define PORT_DEM_ERROR_DETECT STD_ON
|
||||
|
||||
/* Indicates the number of Alternative Modes */
|
||||
#define PORT_MAX_MODE (uint8)0x05
|
||||
|
||||
/* Enables/Disables Port_ExclusiveControl */
|
||||
#define PORT_EXCLUSIVE_CONTROL STD_OFF
|
||||
|
||||
/* Availability of numeric port groups */
|
||||
#define PORT_NUM_PORT_GROUPS_AVAILABLE STD_ON
|
||||
|
||||
/* Availability of numeric chattering filter groups */
|
||||
#define PORT_FILONOFF_REG_CONFIG STD_ON
|
||||
|
||||
/* Availability of numeric port safe state groups */
|
||||
#define PORT_SFS_REG_CONFIG STD_OFF
|
||||
|
||||
/* Availability of numeric module select register */
|
||||
#define PORT_MODSEL_REG_CONFIG STD_OFF
|
||||
|
||||
/* Availability of numeric bus domain protection */
|
||||
#define PORT_DMPR_REGS_AVAILABLE STD_OFF
|
||||
|
||||
/* Enables/Disables Port_Ecm API */
|
||||
#define PORT_SUPPORT_ECM STD_OFF
|
||||
|
||||
/* Enables/Disables feautre DNF */
|
||||
#define PORT_DNF_GROUPS_AVAILABLE STD_OFF
|
||||
|
||||
/* Address of MFISLCKR registers to implement exclusive control for PFC/GPIO */
|
||||
/* Module register */
|
||||
#define PORT_MFISLCKR_REG_ADDR (uint32)0xE62600C0UL
|
||||
|
||||
/* The User Base Address of PFC/GPIO module which configured */
|
||||
#define PORT_USER_BASE_ADDRESS1 (uint32)0xE6050000UL
|
||||
|
||||
/* The User Base Address of PFC/GPIO module which configured */
|
||||
#define PORT_USER_BASE_ADDRESS2 (uint32)0xE6060000UL
|
||||
|
||||
/* Timeout Value for exclusive control */
|
||||
#define PORT_EXCLUSIVE_CONTROL_TIMEOUT (uint32)0x0003E99AUL
|
||||
|
||||
/* The Total number of FILONOFF registers configured */
|
||||
#define PORT_NUM_FILONOFF_REGS (uint8)0x02U
|
||||
|
||||
/* The Total number of PSER registers configured */
|
||||
#define PORT_NUM_SFS_REGS (uint8)0x00U
|
||||
|
||||
/* The Total number of Groups which configured */
|
||||
#define PORT_NUM_GROUP_REGS (uint8)0x01U
|
||||
|
||||
/* The Total number of function PFC registers configured */
|
||||
#define PORT_NUM_PFC_REGS (uint8)0x03U
|
||||
|
||||
/* The Total number of DMPR registers configured */
|
||||
#define PORT_NUM_DMPR_REGS (uint8)0x00U
|
||||
|
||||
/* The Total number of IPSR registers configured */
|
||||
#define PORT_NUM_IPSR_REGS (uint8)0x00U
|
||||
|
||||
/* The Total number of GPIO registers configured */
|
||||
#define PORT_NUM_GPIO_REGS (uint8)0x09U
|
||||
|
||||
/* The Total number of INOUTSEL registers configured */
|
||||
#define PORT_NUM_INOUTSEL_REGS (uint8)0x01U
|
||||
|
||||
/* The Total number of MODSEL registers configured */
|
||||
#define PORT_NUM_MODSEL_REGS (uint8)0x00U
|
||||
|
||||
/* The Total number of Pin Direction Changeable configured */
|
||||
#define PORT_NUM_PINS_DIR_CHANGEABLE (uint8)0x00U
|
||||
|
||||
/* The Total number of Pin Dio Alt Changeable configured */
|
||||
#define PORT_NUM_PINS_DIO_ALT_CHANGEABLE (uint8)0x00U
|
||||
|
||||
/* The Total number of Pin mode changeable configured */
|
||||
#define PORT_NUM_PINS_MODE_CHANGEABLE (uint8)0x00U
|
||||
|
||||
/* The following constant contains total number of pins configured */
|
||||
#define PORT_TOTAL_NUMBER_OF_PINS (uint8)0x02U
|
||||
|
||||
/* The total number register of API Port_FUSEMonitoring */
|
||||
#define PORT_MAX_NO_FUSE_REG (uint8)0x02U
|
||||
|
||||
|
||||
/* Port Pin Handles */
|
||||
#define PortConf_PortGroup1_PortPin24 (Port_PinType)0
|
||||
/* MISRA Violation: START Msg(7:0791)-1 */
|
||||
#define PortConf_PortGroup1_PortPin25 (Port_PinType)1
|
||||
/* END Msg(7:0791)-1 */
|
||||
|
||||
|
||||
|
||||
/* Configuration Set Handles */
|
||||
#define PortConfigSet \
|
||||
(&Port_GstConfiguration[0])
|
||||
|
||||
/*******************************************************************************
|
||||
** Global Data Types **
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** Global Data **
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** Function Prototypes **
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
|
||||
#endif /* PORT_CFG_H */
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** End of File **
|
||||
*******************************************************************************/
|
||||
|
||||
@@ -0,0 +1,527 @@
|
||||
/*============================================================================*/
|
||||
/* Project = AUTOSAR Renesas MCAL Components */
|
||||
/* Module = Port_PBcfg.c */
|
||||
/*============================================================================*/
|
||||
/* COPYRIGHT */
|
||||
/*============================================================================*/
|
||||
/* Copyright(c) 2026 Renesas Electronics Corporation. */
|
||||
/*============================================================================*/
|
||||
/* Purpose: */
|
||||
/* This file contains post-build time parameters. */
|
||||
/* AUTOMATICALLY GENERATED FILE - DO NOT EDIT */
|
||||
/* */
|
||||
/*============================================================================*/
|
||||
/* */
|
||||
/* Unless otherwise agreed upon in writing between your company and */
|
||||
/* Renesas Electronics Corporation the following shall apply! */
|
||||
/* */
|
||||
/* Warranty Disclaimer */
|
||||
/* */
|
||||
/* There is no warranty of any kind whatsoever granted by Renesas. Any */
|
||||
/* warranty is expressly disclaimed and excluded by Renesas, either expressed */
|
||||
/* or implied, including but not limited to those for non-infringement of */
|
||||
/* intellectual property, merchantability and/or fitness for the particular */
|
||||
/* purpose. */
|
||||
/* */
|
||||
/* Renesas shall not have any obligation to maintain, service or provide bug */
|
||||
/* fixes for the supplied Product(s) and/or the Application. */
|
||||
/* */
|
||||
/* Each User is solely responsible for determining the appropriateness of */
|
||||
/* using the Product(s) and assumes all risks associated with its exercise */
|
||||
/* of rights under this Agreement, including, but not limited to the risks */
|
||||
/* and costs of program errors, compliance with applicable laws, damage to */
|
||||
/* or loss of data, programs or equipment, and unavailability or */
|
||||
/* interruption of operations. */
|
||||
/* */
|
||||
/* Limitation of Liability */
|
||||
/* */
|
||||
/* In no event shall Renesas be liable to the User for any incidental, */
|
||||
/* consequential, indirect, or punitive damage (including but not limited */
|
||||
/* to lost profits) regardless of whether such liability is based on breach */
|
||||
/* of contract, tort, strict liability, breach of warranties, failure of */
|
||||
/* essential purpose or otherwise and even if advised of the possibility of */
|
||||
/* such damages. Renesas shall not be liable for any services or products */
|
||||
/* provided by third party vendors, developers or consultants identified or */
|
||||
/* referred to the User by Renesas in connection with the Product(s) and/or */
|
||||
/* the Application. */
|
||||
/* */
|
||||
/*============================================================================*/
|
||||
/* Environment: */
|
||||
/* Devices: V4H */
|
||||
/*============================================================================*/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** Revision Control History **
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** Generation Tool Version **
|
||||
*******************************************************************************/
|
||||
/* */
|
||||
/* TOOL VERSION: PortRCAR.dll version: 1.0.16, MCALConfGen.exe version: 1.2.3 */
|
||||
/* */
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** Input File **
|
||||
*******************************************************************************/
|
||||
/*
|
||||
* INPUT FILE: C:\Users\a5162358\Documents\V4H\20250829_V4H_MCAL_training\RTM8RC779GCMCL5DA0JCDRE\rel\modules\port\sample_application\V4H\19_11\config\App_PORT_V4H_Sample.arxml
|
||||
* C:\Users\a5162358\Documents\V4H\20250829_V4H_MCAL_training\RTM8RC779GCMCL5DA0JCDRE\rel\modules\port\generator\V4H\R1911_PORT_V4H_BSWMDT.arxml
|
||||
* C:\Users\a5162358\Documents\V4H\20250829_V4H_MCAL_training\RTM8RC779GCMCL5DA0JCDRE\rel\common\generic\stubs\19_11\Dem\xml\Dem_Port.arxml
|
||||
* C:\Users\a5162358\Documents\V4H\20250829_V4H_MCAL_training\RTM8RC779GCMCL5DA0JCDRE\rel\V4H\common_family\generator\arm\Sample_Application_V4H.trxml
|
||||
* GENERATED ON: 14 Apr 2026 - 03:10:33
|
||||
*/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** Instance Index **
|
||||
*******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
** Include Section **
|
||||
*******************************************************************************/
|
||||
/* MISRA Violation: START Msg(2:0857)-2 */
|
||||
#include "Port.h"
|
||||
/* END Msg(2:0857)-2 */
|
||||
/* MISRA Violation: START Msg(2:0857)-2 */
|
||||
#include "Port_PBTypes.h"
|
||||
/* END Msg(2:0857)-2 */
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** QAC Warning **
|
||||
*******************************************************************************/
|
||||
/* 1. QAC Warning: */
|
||||
/* Message : (1:1504) The object '%s' is only referenced in the */
|
||||
/* translation unit where it is defined. */
|
||||
/* Rule : MISRA-C:2012 Rule-8.7 */
|
||||
/* Justification : This is accepted, due to following coding rule, internal */
|
||||
/* function can be defined in other C source files */
|
||||
/* Verification : However, part of the code is verified manually */
|
||||
/* and it is not having any impact. */
|
||||
/* Reference : Look for START Msg(1:1504)-1 and */
|
||||
/* END Msg(1:1504)-1 tags in the code. */
|
||||
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** MISRA C Rule Violations **
|
||||
*******************************************************************************/
|
||||
/* 1. MISRA C RULE VIOLATION: */
|
||||
/* Message : (4:5087) Use of #include directive after code fragment. */
|
||||
/* Rule : MISRA-C:2012 Rule-20.1 */
|
||||
/* Justification : This is done as per Memory Requirement, (MEMMAP003 - */
|
||||
/* Specification of Memory Mapping). */
|
||||
/* Verification : However, part of the code is verified manually */
|
||||
/* and it is not having any impact. */
|
||||
/* Reference : Look for START Msg(4:5087)-1 and */
|
||||
/* END Msg(4:5087)-1 tags in the code. */
|
||||
/******************************************************************************/
|
||||
/* 2. MISRA C RULE VIOLATION: */
|
||||
/* Message : (2:0857) [L] Number of macro definitions exceeds 1024 - */
|
||||
/* program does not conform strictly to ISO:C90. */
|
||||
/* Rule : MISRA-C:2012 Dir-1.1 */
|
||||
/* Justification : The number of macro depend on module code size. There is */
|
||||
/* no issue when number of macro is over 1024. */
|
||||
/* Verification : However, part of the code is verified manually and it is */
|
||||
/* not having any impact. */
|
||||
/* Reference : Look for START Msg(2:0857)-2 and */
|
||||
/* END Msg(2:0857)-2 tags in the code. */
|
||||
/******************************************************************************/
|
||||
/* 3. MISRA C RULE VIOLATION: */
|
||||
/* Message : (1:1504) The object '%s' is only referenced in the */
|
||||
/* translation unit where it is defined. */
|
||||
/* Rule : MISRA-C:2012 Rule-8.7, CWE-398, CWE-569 */
|
||||
/* Justification : This is accepted, due to following coding rule, internal */
|
||||
/* function can be defined in other C source files */
|
||||
/* Verification : However, part of the code is verified manually */
|
||||
/* and it is not having any impact. */
|
||||
/* Reference : Look for START Msg(1:1504)-3 and */
|
||||
/* END Msg(1:1504)-3 tags in the code. */
|
||||
/******************************************************************************/
|
||||
/* 4. MISRA C RULE VIOLATION: */
|
||||
/* Message : (1:1533) The object '%1s' is only referenced by function */
|
||||
/* '%2s'. */
|
||||
/* Rule : MISRA-C:2012 Rule-8.9, CWE-398, CWE-569 */
|
||||
/* Justification : This is accepted, due to the object is defined in */
|
||||
/* separated source C file to followed coding rule */
|
||||
/* Verification : However, part of the code is verified manually */
|
||||
/* and it is not having any impact. */
|
||||
/* Reference : Look for START Msg(1:1533)-4 and */
|
||||
/* END Msg(1:1533)-4 tags in the code. */
|
||||
/******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** Version Information **
|
||||
*******************************************************************************/
|
||||
#define PORT_PBCFG_C_AR_RELEASE_MAJOR_VERSION 4U
|
||||
#define PORT_PBCFG_C_AR_RELEASE_MINOR_VERSION 5U
|
||||
#define PORT_PBCFG_C_AR_RELEASE_REVISION_VERSION 0U
|
||||
#define PORT_PBCFG_C_SW_MAJOR_VERSION 1U
|
||||
/* MISRA Violation: START Msg(2:0857)-2 */
|
||||
#define PORT_PBCFG_C_SW_MINOR_VERSION 1U
|
||||
/* END Msg(2:0857)-2 */
|
||||
|
||||
/*******************************************************************************
|
||||
** Version Check **
|
||||
*******************************************************************************/
|
||||
|
||||
#if (PORT_PBTYPES_AR_RELEASE_MAJOR_VERSION != \
|
||||
PORT_PBCFG_C_AR_RELEASE_MAJOR_VERSION)
|
||||
#error "Port_PBcfg.c : Mismatch in Release Major Version"
|
||||
#endif
|
||||
|
||||
#if (PORT_PBTYPES_AR_RELEASE_MINOR_VERSION != \
|
||||
PORT_PBCFG_C_AR_RELEASE_MINOR_VERSION)
|
||||
#error "Port_PBcfg.c : Mismatch in Release Minor Version"
|
||||
#endif
|
||||
|
||||
#if (PORT_PBTYPES_AR_RELEASE_REVISION_VERSION != \
|
||||
PORT_PBCFG_C_AR_RELEASE_REVISION_VERSION)
|
||||
#error "Port_PBcfg.c : Mismatch in Release Revision Version"
|
||||
#endif
|
||||
|
||||
#if (PORT_PBTYPES_SW_MAJOR_VERSION != \
|
||||
PORT_PBCFG_C_SW_MAJOR_VERSION)
|
||||
#error "Port_PBcfg.c : Mismatch in Software Major Version"
|
||||
#endif
|
||||
|
||||
#if (PORT_PBTYPES_SW_MINOR_VERSION != \
|
||||
PORT_PBCFG_C_SW_MINOR_VERSION)
|
||||
#error "Port_PBcfg.c : Mismatch in Software Minor Version"
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** Global Data Types **
|
||||
*******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
** Global Data **
|
||||
*******************************************************************************/
|
||||
|
||||
#define PORT_START_SEC_DBTOC_DATA_UNSPECIFIED
|
||||
/* MISRA Violation: START Msg(4:5087)-1 */
|
||||
#include "Port_MemMap.h"
|
||||
/* END Msg(4:5087)-1 */
|
||||
|
||||
|
||||
/* The following structure indicates the starting point of database */
|
||||
CONST(Port_ConfigType, PORT_CONFIG_DATA) Port_GstConfiguration[] =
|
||||
{
|
||||
/* Index: 0 - Global Data */
|
||||
{
|
||||
/* ulStartOfDbToc */
|
||||
0x0EDF0108UL,
|
||||
|
||||
/* pPortNumRegs */
|
||||
&Port_GstNumRegs[0],
|
||||
|
||||
/* pPortNumFuncCtrlRegs */
|
||||
&Port_GstNumFuncCtrlRegs[0],
|
||||
|
||||
/* pPortNumINOUTSELRegs */
|
||||
&Port_GstNumINOUTSELRegs[0],
|
||||
|
||||
/* pPortFILONOFFRegs */
|
||||
&Port_GstFILONOFFRegs[0],
|
||||
|
||||
/* pPinDirChangeable */
|
||||
NULL_PTR,
|
||||
|
||||
/* pPinDioAltModeDetails */
|
||||
NULL_PTR
|
||||
}
|
||||
};
|
||||
|
||||
#define PORT_STOP_SEC_DBTOC_DATA_UNSPECIFIED
|
||||
/* MISRA Violation: START Msg(4:5087)-1 */
|
||||
#include "Port_MemMap.h"
|
||||
/* END Msg(4:5087)-1 */
|
||||
|
||||
|
||||
|
||||
#define PORT_START_SEC_CONFIG_DATA_UNSPECIFIED
|
||||
/* MISRA Violation: START Msg(4:5087)-1 */
|
||||
#include "Port_MemMap.h"
|
||||
/* END Msg(4:5087)-1 */
|
||||
|
||||
|
||||
/* Array of structures of all port group registers in the sequence of GPIO */
|
||||
/* Registers. */
|
||||
/* MISRA Violation: START Msg(1:1504)-3 */
|
||||
CONST(Port_Regs, PORT_CONFIG_DATA) Port_GstNumRegs[] =
|
||||
{
|
||||
/* Index: 0 - PortConfigSet_PortGroup1_POSNEG_Register_1 */
|
||||
{
|
||||
/* usRegAddrOffset */
|
||||
0x09A0U,
|
||||
|
||||
/* ulInitModeRegVal */
|
||||
0x01000000UL,
|
||||
|
||||
/* ulAndMaskVal */
|
||||
0xFCFFFFFFUL
|
||||
},
|
||||
/* Index: 1 - PortConfigSet_PortGroup1_EDGLEVEL_Register_1 */
|
||||
{
|
||||
/* usRegAddrOffset */
|
||||
0x09A4U,
|
||||
|
||||
/* ulInitModeRegVal */
|
||||
0x03000000UL,
|
||||
|
||||
/* ulAndMaskVal */
|
||||
0xFCFFFFFFUL
|
||||
},
|
||||
/* Index: 2 - PortConfigSet_PortGroup1_BOTHEDGE_Register_1 */
|
||||
{
|
||||
/* usRegAddrOffset */
|
||||
0x09CCU,
|
||||
|
||||
/* ulInitModeRegVal */
|
||||
0x00000000UL,
|
||||
|
||||
/* ulAndMaskVal */
|
||||
0xFCFFFFFFUL
|
||||
},
|
||||
/* Index: 3 - PortConfigSet_PortGroup1_IOINTSEL_Register_1 */
|
||||
{
|
||||
/* usRegAddrOffset */
|
||||
0x0980U,
|
||||
|
||||
/* ulInitModeRegVal */
|
||||
0x03000000UL,
|
||||
|
||||
/* ulAndMaskVal */
|
||||
0xFCFFFFFFUL
|
||||
},
|
||||
/* Index: 4 - PortConfigSet_PortGroup1_OUTDTSEL_Register_1 */
|
||||
{
|
||||
/* usRegAddrOffset */
|
||||
0x09C0U,
|
||||
|
||||
/* ulInitModeRegVal */
|
||||
0x00000000UL,
|
||||
|
||||
/* ulAndMaskVal */
|
||||
0xFCFFFFFFUL
|
||||
},
|
||||
/* Index: 5 - PortConfigSet_PortGroup1_OUTDT_Register_1 */
|
||||
{
|
||||
/* usRegAddrOffset */
|
||||
0x0988U,
|
||||
|
||||
/* ulInitModeRegVal */
|
||||
0x01000000UL,
|
||||
|
||||
/* ulAndMaskVal */
|
||||
0xFCFFFFFFUL
|
||||
},
|
||||
/* Index: 6 - PortConfigSet_PortGroup1_OUTDTH_Register_1 */
|
||||
{
|
||||
/* usRegAddrOffset */
|
||||
0x09C4U,
|
||||
|
||||
/* ulInitModeRegVal */
|
||||
0x01000000UL,
|
||||
|
||||
/* ulAndMaskVal */
|
||||
0xFCFFFFFFUL
|
||||
},
|
||||
/* Index: 7 - PortConfigSet_PortGroup1_OUTDTL_Register_1 */
|
||||
{
|
||||
/* usRegAddrOffset */
|
||||
0x09C8U,
|
||||
|
||||
/* ulInitModeRegVal */
|
||||
0x01000000UL,
|
||||
|
||||
/* ulAndMaskVal */
|
||||
0xFCFFFFFFUL
|
||||
},
|
||||
/* Index: 8 - PortConfigSet_PortGroup1_INEN_Register_1 */
|
||||
{
|
||||
/* usRegAddrOffset */
|
||||
0x09D0U,
|
||||
|
||||
/* ulInitModeRegVal */
|
||||
0x03000000UL,
|
||||
|
||||
/* ulAndMaskVal */
|
||||
0xFCFFFFFFUL
|
||||
}
|
||||
};
|
||||
/* END Msg(1:1504)-3 */
|
||||
|
||||
|
||||
/* Array of structures of all function control port group registers, in the */
|
||||
/* sequence of PFC Registers. */
|
||||
/* MISRA Violation: START Msg(1:1504)-3 */
|
||||
CONST(Port_FuncCtrlRegs, PORT_CONFIG_DATA) Port_GstNumFuncCtrlRegs[] =
|
||||
{
|
||||
/* Index: 0 - PortConfigSet_PortGroup1_GPSR_Register_1 */
|
||||
{
|
||||
/* usRegAddrOffset */
|
||||
0x0840U,
|
||||
|
||||
/* ulInitModeRegVal */
|
||||
0x00000000UL,
|
||||
|
||||
/* ulAndMaskVal */
|
||||
0xFCFFFFFFUL
|
||||
},
|
||||
/* Index: 1 - PortConfigSet_PortGroup1_PUD_Register_1 */
|
||||
{
|
||||
/* usRegAddrOffset */
|
||||
0x08E0U,
|
||||
|
||||
/* ulInitModeRegVal */
|
||||
0x00000000UL,
|
||||
|
||||
/* ulAndMaskVal */
|
||||
0xFCFFFFFFUL
|
||||
},
|
||||
/* Index: 2 - PortConfigSet_PortGroup1_PUEN_Register_1 */
|
||||
{
|
||||
/* usRegAddrOffset */
|
||||
0x08C0U,
|
||||
|
||||
/* ulInitModeRegVal */
|
||||
0x00000000UL,
|
||||
|
||||
/* ulAndMaskVal */
|
||||
0xFCFFFFFFUL
|
||||
}
|
||||
};
|
||||
/* END Msg(1:1504)-3 */
|
||||
|
||||
|
||||
/* Array of structures for 32-Bit INOUTSEL Registers */
|
||||
/* MISRA Violation: START Msg(1:1504)-3 */
|
||||
CONST(Port_INOUTSELRegs, PORT_CONFIG_DATA) Port_GstNumINOUTSELRegs[] =
|
||||
{
|
||||
/* Index: 0 - PortConfigSet_PortGroup1_INOUTSEL_Register_1 */
|
||||
{
|
||||
/* ulChangeableStatus */
|
||||
0x00000000UL,
|
||||
|
||||
/* usRegAddrOffset */
|
||||
0x0984U,
|
||||
|
||||
/* ulInitModeRegVal */
|
||||
0x00000000UL,
|
||||
|
||||
/* ulAndMaskVal */
|
||||
0xFCFFFFFFUL
|
||||
}
|
||||
};
|
||||
/* END Msg(1:1504)-3 */
|
||||
|
||||
|
||||
/* Array of structures for Chattering Filter registers */
|
||||
/* MISRA Violation: START Msg(1:1504)-3 */
|
||||
CONST(Port_FILONOFFRegs, PORT_CONFIG_DATA) Port_GstFILONOFFRegs[] =
|
||||
{
|
||||
/* Index: 0 - PortConfigSet_PortChatteringFilterGroup1_FILONOFF_FILCLKSEL_1 */
|
||||
{
|
||||
/* usFILONOFFRegAddrOffset */
|
||||
0x09A8U,
|
||||
|
||||
/* ulFILONOFF */
|
||||
0x00000000UL,
|
||||
|
||||
/* ulFILONOFFMaskVal */
|
||||
0xFCFFFFFFUL,
|
||||
|
||||
/* usFILCLKSELRegAddrOffset */
|
||||
0x09ACU,
|
||||
|
||||
/* usFILCLKSEL */
|
||||
0x0000U,
|
||||
|
||||
/* ulFILCLKSELMaskVal */
|
||||
0xFFFF0000UL
|
||||
},
|
||||
/* Index: 1 - PortConfigSet_PortChatteringFilterGroup7_FILONOFF_FILCLKSEL_7 */
|
||||
{
|
||||
/* usFILONOFFRegAddrOffset */
|
||||
0x59A8U,
|
||||
|
||||
/* ulFILONOFF */
|
||||
0x00000000UL,
|
||||
|
||||
/* ulFILONOFFMaskVal */
|
||||
0x00000000UL,
|
||||
|
||||
/* usFILCLKSELRegAddrOffset */
|
||||
0x59ACU,
|
||||
|
||||
/* usFILCLKSEL */
|
||||
0x0000U,
|
||||
|
||||
/* ulFILCLKSELMaskVal */
|
||||
0xFFFF0000UL
|
||||
}
|
||||
};
|
||||
/* END Msg(1:1504)-3 */
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* Array of structures for FuSe Info */
|
||||
/* MISRA Violation: START Msg(1:1533)-4 */
|
||||
CONST(Port_FUSEInfo, PORT_CONFIG_DATA) Port_GstFUSEInfo[] =
|
||||
{
|
||||
/* Index: 0 - OTPMONITOR0 */
|
||||
{
|
||||
/* ulAddressRegisterFuSe */
|
||||
(uint32)0xE61BF100UL,
|
||||
|
||||
/* ulFuSeMaskRegister */
|
||||
(uint32)0x000003FFUL,
|
||||
|
||||
/* ulFuSeValueExpected */
|
||||
(uint32)0x00000000UL
|
||||
},
|
||||
/* Index: 1 - OTPMONITOR3 */
|
||||
{
|
||||
/* ulAddressRegisterFuSe */
|
||||
(uint32)0xE61BF10CUL,
|
||||
|
||||
/* ulFuSeMaskRegister */
|
||||
(uint32)0x0000003FUL,
|
||||
|
||||
/* ulFuSeValueExpected */
|
||||
(uint32)0x00000000UL
|
||||
}
|
||||
};
|
||||
/* END Msg(1:1533)-4 */
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
** Function Definitions **
|
||||
*******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
** End of File **
|
||||
*******************************************************************************/
|
||||
|
||||
@@ -0,0 +1,385 @@
|
||||
/*============================================================================*/
|
||||
/* Project = AUTOSAR Renesas MCAL Components */
|
||||
/* Module = App_PORT_V4H_Sample.h */
|
||||
/* SW-VERSION = 1.1.12 */
|
||||
/*============================================================================*/
|
||||
/* COPYRIGHT */
|
||||
/*============================================================================*/
|
||||
/* Copyright(c) 2021-2025 Renesas Electronics Corporation. */
|
||||
/*============================================================================*/
|
||||
/* Purpose: */
|
||||
/* Header file information for application. */
|
||||
/* */
|
||||
/*============================================================================*/
|
||||
/* */
|
||||
/* Unless otherwise agreed upon in writing between your company and */
|
||||
/* Renesas Electronics Corporation the following shall apply! */
|
||||
/* */
|
||||
/* Warranty Disclaimer */
|
||||
/* */
|
||||
/* There is no warranty of any kind whatsoever granted by Renesas. Any */
|
||||
/* warranty is expressly disclaimed and excluded by Renesas, either expressed */
|
||||
/* or implied, including but not limited to those for non-infringement of */
|
||||
/* intellectual property, merchantability and/or fitness for the particular */
|
||||
/* purpose. */
|
||||
/* */
|
||||
/* Renesas shall not have any obligation to maintain, service or provide bug */
|
||||
/* fixes for the supplied Product(s) and/or the Application. */
|
||||
/* */
|
||||
/* Each User is solely responsible for determining the appropriateness of */
|
||||
/* using the Product(s) and assumes all risks associated with its exercise */
|
||||
/* of rights under this Agreement, including, but not limited to the risks */
|
||||
/* and costs of program errors, compliance with applicable laws, damage to */
|
||||
/* or loss of data, programs or equipment, and unavailability or */
|
||||
/* interruption of operations. */
|
||||
/* */
|
||||
/* Limitation of Liability */
|
||||
/* */
|
||||
/* In no event shall Renesas be liable to the User for any incidental, */
|
||||
/* consequential, indirect, or punitive damage (including but not limited */
|
||||
/* to lost profits) regardless of whether such liability is based on breach */
|
||||
/* of contract, tort, strict liability, breach of warranties, failure of */
|
||||
/* essential purpose or otherwise and even if advised of the possibility of */
|
||||
/* such damages. Renesas shall not be liable for any services or products */
|
||||
/* provided by third party vendors, developers or consultants identified or */
|
||||
/* referred to the User by Renesas in connection with the Product(s) and/or */
|
||||
/* the Application. */
|
||||
/* */
|
||||
/*============================================================================*/
|
||||
/* Environment: */
|
||||
/* Devices: V4H */
|
||||
/*============================================================================*/
|
||||
|
||||
/*******************************************************************************
|
||||
** Revision Control History **
|
||||
*******************************************************************************/
|
||||
/*
|
||||
* 1.1.13: 28/02/2025 : Increase SW-VERSION 1.1.12
|
||||
* 1.1.12: 25/07/2023 : Remove address of register MODSEL4,5,6,7
|
||||
* 1.1.11: 27/04/2023 : Update address of register OTPMONITOR3
|
||||
* 1.1.10: 22/12/2022 : Remove definition of MSTPSR9 register
|
||||
* 1.0.6: 03/11/2022 : Add define for MFISWPCNTR register and declaration for
|
||||
* Disable_MFIS_Protection().
|
||||
* 1.0.5: 07/07/2022 : Add declaration of Port_UnintendedModuleStopCheck_Clock
|
||||
* 1.0.4: 02/06/2022 : Define for registers: OTPMONITOR0, OTPMONITOR3
|
||||
* 1.0.3: 06/05/2022 : Add new feature Port Pin Mode Setting.
|
||||
* 1.0.2: 12/04/2022 : 1. Add new feature Port Pin Alternate Mode Setting,
|
||||
* Port Pin DIO Mode Setting.
|
||||
* 2. Change Wdg_59_Rwdt_Init() to Wdg_Init()
|
||||
* 1.0.1: 21/03/2022 : Add new feature Port Pin Direction Refreshing
|
||||
* 1.0.0: 01/12/2021 : Initial Version
|
||||
*/
|
||||
/******************************************************************************/
|
||||
|
||||
#ifndef APP_PORT_V4H_SAMPLE_H
|
||||
#define APP_PORT_V4H_SAMPLE_H
|
||||
|
||||
/*******************************************************************************
|
||||
** Include Section **
|
||||
*******************************************************************************/
|
||||
|
||||
#include "Port.h"
|
||||
#include "Interrupt.h"
|
||||
|
||||
/*******************************************************************************
|
||||
** Version Information **
|
||||
*******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
** Global Symbols **
|
||||
*******************************************************************************/
|
||||
#define PORT_FAIL 0
|
||||
#define PORT_PASS 1
|
||||
|
||||
/* MFIS registers */
|
||||
#define MFISLCKR0 *((volatile uint32 *)(0xE62600C0UL))
|
||||
#define MFISLCKR1 *((volatile uint32 *)(0xE62600C4UL))
|
||||
#define MFISLCKR2 *((volatile uint32 *)(0xE62600C8UL))
|
||||
#define MFISLCKR3 *((volatile uint32 *)(0xE62600CCUL))
|
||||
#define MFISLCKR4 *((volatile uint32 *)(0xE62600D0UL))
|
||||
#define MFISLCKR5 *((volatile uint32 *)(0xE62600D4UL))
|
||||
#define MFISLCKR6 *((volatile uint32 *)(0xE62600D8UL))
|
||||
#define MFISLCKR7 *((volatile uint32 *)(0xE62600DCUL))
|
||||
#define MFISWPCNTR *((volatile uint32 *)(0xE6260900UL))
|
||||
#define MFIS_DISABLE_PROTECTION (uint32)(0xACCE0001UL)
|
||||
|
||||
/* PFC registers */
|
||||
#define PMMR0 *((volatile uint32 *)(0xE6050000UL))
|
||||
#define PMMR1 *((volatile uint32 *)(0xE6050800UL))
|
||||
#define PMMR2 *((volatile uint32 *)(0xE6058000UL))
|
||||
#define PMMR3 *((volatile uint32 *)(0xE6058800UL))
|
||||
#define PMMR4 *((volatile uint32 *)(0xE6060000UL))
|
||||
#define PMMR5 *((volatile uint32 *)(0xE6060800UL))
|
||||
#define PMMR6 *((volatile uint32 *)(0xE6061000UL))
|
||||
#define PMMR7 *((volatile uint32 *)(0xE6061800UL))
|
||||
#define PMMR8 *((volatile uint32 *)(0xE6068000UL))
|
||||
|
||||
#define GPSR0 *((volatile uint32 *)(0xE6050040UL))
|
||||
#define GPSR1 *((volatile uint32 *)(0xE6050840UL))
|
||||
#define GPSR2 *((volatile uint32 *)(0xE6058040UL))
|
||||
#define GPSR3 *((volatile uint32 *)(0xE6058840UL))
|
||||
#define GPSR4 *((volatile uint32 *)(0xE6060040UL))
|
||||
#define GPSR5 *((volatile uint32 *)(0xE6060840UL))
|
||||
#define GPSR6 *((volatile uint32 *)(0xE6061040UL))
|
||||
#define GPSR7 *((volatile uint32 *)(0xE6061840UL))
|
||||
#define GPSR8 *((volatile uint32 *)(0xE6068040UL))
|
||||
|
||||
#define IP0SR0 *((volatile uint32 *)(0xE6050060UL))
|
||||
#define IP1SR0 *((volatile uint32 *)(0xE6050064UL))
|
||||
#define IP2SR0 *((volatile uint32 *)(0xE6050068UL))
|
||||
#define IP0SR1 *((volatile uint32 *)(0xE6050860UL))
|
||||
#define IP1SR1 *((volatile uint32 *)(0xE6050864UL))
|
||||
#define IP2SR1 *((volatile uint32 *)(0xE6050868UL))
|
||||
#define IP3SR1 *((volatile uint32 *)(0xE605086CUL))
|
||||
#define IP0SR2 *((volatile uint32 *)(0xE6058060UL))
|
||||
#define IP1SR2 *((volatile uint32 *)(0xE6058064UL))
|
||||
#define IP2SR2 *((volatile uint32 *)(0xE6058068UL))
|
||||
#define IP0SR3 *((volatile uint32 *)(0xE6058860UL))
|
||||
#define IP1SR3 *((volatile uint32 *)(0xE6058864UL))
|
||||
#define IP2SR3 *((volatile uint32 *)(0xE6058868UL))
|
||||
#define IP3SR3 *((volatile uint32 *)(0xE605886CUL))
|
||||
#define IP0SR6 *((volatile uint32 *)(0xE6061060UL))
|
||||
#define IP1SR6 *((volatile uint32 *)(0xE6061064UL))
|
||||
#define IP2SR6 *((volatile uint32 *)(0xE6061068UL))
|
||||
#define IP0SR7 *((volatile uint32 *)(0xE6061860UL))
|
||||
#define IP1SR7 *((volatile uint32 *)(0xE6061864UL))
|
||||
#define IP2SR7 *((volatile uint32 *)(0xE6061868UL))
|
||||
#define IP0SR8 *((volatile uint32 *)(0xE6068060UL))
|
||||
#define IP1SR8 *((volatile uint32 *)(0xE6068064UL))
|
||||
|
||||
#define PUEN0 *((volatile uint32 *)(0xE60500C0UL))
|
||||
#define PUEN1 *((volatile uint32 *)(0xE60508C0UL))
|
||||
#define PUEN2 *((volatile uint32 *)(0xE60580C0UL))
|
||||
#define PUEN3 *((volatile uint32 *)(0xE60588C0UL))
|
||||
#define PUEN4 *((volatile uint32 *)(0xE60600C0UL))
|
||||
#define PUEN5 *((volatile uint32 *)(0xE60608C0UL))
|
||||
#define PUEN6 *((volatile uint32 *)(0xE60610C0UL))
|
||||
#define PUEN7 *((volatile uint32 *)(0xE60618C0UL))
|
||||
#define PUEN8 *((volatile uint32 *)(0xE60680C0UL))
|
||||
|
||||
#define PUD0 *((volatile uint32 *)(0xE60500E0UL))
|
||||
#define PUD1 *((volatile uint32 *)(0xE60508E0UL))
|
||||
#define PUD2 *((volatile uint32 *)(0xE60580E0UL))
|
||||
#define PUD3 *((volatile uint32 *)(0xE60588E0UL))
|
||||
#define PUD4 *((volatile uint32 *)(0xE60600E0UL))
|
||||
#define PUD5 *((volatile uint32 *)(0xE60608E0UL))
|
||||
#define PUD6 *((volatile uint32 *)(0xE60610E0UL))
|
||||
#define PUD7 *((volatile uint32 *)(0xE60618E0UL))
|
||||
#define PUD8 *((volatile uint32 *)(0xE60680E0UL))
|
||||
|
||||
#define MODSEL8 *((volatile uint32 *)(0xE6068100UL))
|
||||
|
||||
/* GPIO registers */
|
||||
#define OUTDT0 *((volatile uint32 *)(0xE6050188UL))
|
||||
#define OUTDT1 *((volatile uint32 *)(0xE6050988UL))
|
||||
#define OUTDT2 *((volatile uint32 *)(0xE6058188UL))
|
||||
#define OUTDT3 *((volatile uint32 *)(0xE6058988UL))
|
||||
#define OUTDT4 *((volatile uint32 *)(0xE6060188UL))
|
||||
#define OUTDT5 *((volatile uint32 *)(0xE6060988UL))
|
||||
#define OUTDT6 *((volatile uint32 *)(0xE6061188UL))
|
||||
#define OUTDT7 *((volatile uint32 *)(0xE6061988UL))
|
||||
#define OUTDT8 *((volatile uint32 *)(0xE6068188UL))
|
||||
|
||||
#define POSNEG0 *((volatile uint32 *)(0xE60501A0UL))
|
||||
#define POSNEG1 *((volatile uint32 *)(0xE60509A0UL))
|
||||
#define POSNEG2 *((volatile uint32 *)(0xE60581A0UL))
|
||||
#define POSNEG3 *((volatile uint32 *)(0xE60589A0UL))
|
||||
#define POSNEG4 *((volatile uint32 *)(0xE60601A0UL))
|
||||
#define POSNEG5 *((volatile uint32 *)(0xE60609A0UL))
|
||||
#define POSNEG6 *((volatile uint32 *)(0xE60611A0UL))
|
||||
#define POSNEG7 *((volatile uint32 *)(0xE60619A0UL))
|
||||
#define POSNEG8 *((volatile uint32 *)(0xE60681A0UL))
|
||||
|
||||
#define INOUTSEL0 *((volatile uint32 *)(0xE6050184UL))
|
||||
#define INOUTSEL1 *((volatile uint32 *)(0xE6050984UL))
|
||||
#define INOUTSEL2 *((volatile uint32 *)(0xE6058184UL))
|
||||
#define INOUTSEL3 *((volatile uint32 *)(0xE6058984UL))
|
||||
#define INOUTSEL4 *((volatile uint32 *)(0xE6060184UL))
|
||||
#define INOUTSEL5 *((volatile uint32 *)(0xE6060984UL))
|
||||
#define INOUTSEL6 *((volatile uint32 *)(0xE6061184UL))
|
||||
#define INOUTSEL7 *((volatile uint32 *)(0xE6061984UL))
|
||||
#define INOUTSEL8 *((volatile uint32 *)(0xE6068184UL))
|
||||
|
||||
#define IOINTSEL0 *((volatile uint32 *)(0xE6050180UL))
|
||||
#define IOINTSEL1 *((volatile uint32 *)(0xE6050980UL))
|
||||
#define IOINTSEL2 *((volatile uint32 *)(0xE6058180UL))
|
||||
#define IOINTSEL3 *((volatile uint32 *)(0xE6058980UL))
|
||||
#define IOINTSEL4 *((volatile uint32 *)(0xE6060180UL))
|
||||
#define IOINTSEL5 *((volatile uint32 *)(0xE6060980UL))
|
||||
#define IOINTSEL6 *((volatile uint32 *)(0xE6061180UL))
|
||||
#define IOINTSEL7 *((volatile uint32 *)(0xE6061980UL))
|
||||
#define IOINTSEL8 *((volatile uint32 *)(0xE6068180UL))
|
||||
|
||||
#define EDGLEVEL0 *((volatile uint32 *)(0xE60501A4UL))
|
||||
#define EDGLEVEL1 *((volatile uint32 *)(0xE60509A4UL))
|
||||
#define EDGLEVEL2 *((volatile uint32 *)(0xE60581A4UL))
|
||||
#define EDGLEVEL3 *((volatile uint32 *)(0xE60589A4UL))
|
||||
#define EDGLEVEL4 *((volatile uint32 *)(0xE60601A4UL))
|
||||
#define EDGLEVEL5 *((volatile uint32 *)(0xE60609A4UL))
|
||||
#define EDGLEVEL6 *((volatile uint32 *)(0xE60611A4UL))
|
||||
#define EDGLEVEL7 *((volatile uint32 *)(0xE60619A4UL))
|
||||
#define EDGLEVEL8 *((volatile uint32 *)(0xE60681A4UL))
|
||||
|
||||
#define FILONOFF0 *((volatile uint32 *)(0xE60501A8UL))
|
||||
#define FILONOFF1 *((volatile uint32 *)(0xE60509A8UL))
|
||||
#define FILONOFF2 *((volatile uint32 *)(0xE60581A8UL))
|
||||
#define FILONOFF3 *((volatile uint32 *)(0xE60589A8UL))
|
||||
#define FILONOFF4 *((volatile uint32 *)(0xE60601A8UL))
|
||||
#define FILONOFF5 *((volatile uint32 *)(0xE60609A8UL))
|
||||
#define FILONOFF6 *((volatile uint32 *)(0xE60611A8UL))
|
||||
#define FILONOFF7 *((volatile uint32 *)(0xE60619A8UL))
|
||||
#define FILONOFF8 *((volatile uint32 *)(0xE60681A8UL))
|
||||
|
||||
#define FILCLKSEL0 *((volatile uint32 *)(0xE60501ACUL))
|
||||
#define FILCLKSEL1 *((volatile uint32 *)(0xE60509ACUL))
|
||||
#define FILCLKSEL2 *((volatile uint32 *)(0xE60581ACUL))
|
||||
#define FILCLKSEL3 *((volatile uint32 *)(0xE60589ACUL))
|
||||
#define FILCLKSEL4 *((volatile uint32 *)(0xE60601ACUL))
|
||||
#define FILCLKSEL5 *((volatile uint32 *)(0xE60609ACUL))
|
||||
#define FILCLKSEL6 *((volatile uint32 *)(0xE60611ACUL))
|
||||
#define FILCLKSEL7 *((volatile uint32 *)(0xE60619ACUL))
|
||||
#define FILCLKSEL8 *((volatile uint32 *)(0xE60681ACUL))
|
||||
|
||||
#define OUTDTSEL0 *((volatile uint32 *)(0xE60501C0UL))
|
||||
#define OUTDTSEL1 *((volatile uint32 *)(0xE60509C0UL))
|
||||
#define OUTDTSEL2 *((volatile uint32 *)(0xE60581C0UL))
|
||||
#define OUTDTSEL3 *((volatile uint32 *)(0xE60589C0UL))
|
||||
#define OUTDTSEL4 *((volatile uint32 *)(0xE60601C0UL))
|
||||
#define OUTDTSEL5 *((volatile uint32 *)(0xE60609C0UL))
|
||||
#define OUTDTSEL6 *((volatile uint32 *)(0xE60611C0UL))
|
||||
#define OUTDTSEL7 *((volatile uint32 *)(0xE60619C0UL))
|
||||
#define OUTDTSEL8 *((volatile uint32 *)(0xE60681C0UL))
|
||||
|
||||
#define OUTDTH0 *((volatile uint32 *)(0xE60501C4UL))
|
||||
#define OUTDTH1 *((volatile uint32 *)(0xE60509C4UL))
|
||||
#define OUTDTH2 *((volatile uint32 *)(0xE60581C4UL))
|
||||
#define OUTDTH3 *((volatile uint32 *)(0xE60589C4UL))
|
||||
#define OUTDTH4 *((volatile uint32 *)(0xE60601C4UL))
|
||||
#define OUTDTH5 *((volatile uint32 *)(0xE60609C4UL))
|
||||
#define OUTDTH6 *((volatile uint32 *)(0xE60611C4UL))
|
||||
#define OUTDTH7 *((volatile uint32 *)(0xE60619C4UL))
|
||||
#define OUTDTH8 *((volatile uint32 *)(0xE60681C4UL))
|
||||
|
||||
#define OUTDTL0 *((volatile uint32 *)(0xE60501C8UL))
|
||||
#define OUTDTL1 *((volatile uint32 *)(0xE60509C8UL))
|
||||
#define OUTDTL2 *((volatile uint32 *)(0xE60581C8UL))
|
||||
#define OUTDTL3 *((volatile uint32 *)(0xE60589C8UL))
|
||||
#define OUTDTL4 *((volatile uint32 *)(0xE60601C8UL))
|
||||
#define OUTDTL5 *((volatile uint32 *)(0xE60609C8UL))
|
||||
#define OUTDTL6 *((volatile uint32 *)(0xE60611C8UL))
|
||||
#define OUTDTL7 *((volatile uint32 *)(0xE60619C8UL))
|
||||
#define OUTDTL8 *((volatile uint32 *)(0xE60681C8UL))
|
||||
|
||||
#define BOTHEDGE0 *((volatile uint32 *)(0xE60501CCUL))
|
||||
#define BOTHEDGE1 *((volatile uint32 *)(0xE60509CCUL))
|
||||
#define BOTHEDGE2 *((volatile uint32 *)(0xE60581CCUL))
|
||||
#define BOTHEDGE3 *((volatile uint32 *)(0xE60589CCUL))
|
||||
#define BOTHEDGE4 *((volatile uint32 *)(0xE60601CCUL))
|
||||
#define BOTHEDGE5 *((volatile uint32 *)(0xE60609CCUL))
|
||||
#define BOTHEDGE6 *((volatile uint32 *)(0xE60611CCUL))
|
||||
#define BOTHEDGE7 *((volatile uint32 *)(0xE60619CCUL))
|
||||
#define BOTHEDGE8 *((volatile uint32 *)(0xE60681CCUL))
|
||||
|
||||
#define INEN0 *((volatile uint32 *)(0xE60501D0UL))
|
||||
#define INEN1 *((volatile uint32 *)(0xE60509D0UL))
|
||||
#define INEN2 *((volatile uint32 *)(0xE60581D0UL))
|
||||
#define INEN3 *((volatile uint32 *)(0xE60589D0UL))
|
||||
#define INEN4 *((volatile uint32 *)(0xE60601D0UL))
|
||||
#define INEN5 *((volatile uint32 *)(0xE60609D0UL))
|
||||
#define INEN6 *((volatile uint32 *)(0xE60611D0UL))
|
||||
#define INEN7 *((volatile uint32 *)(0xE60619D0UL))
|
||||
#define INEN8 *((volatile uint32 *)(0xE60681D0UL))
|
||||
|
||||
#define OTPMONITOR0 *((volatile uint32 *)(0xE61BF100UL))
|
||||
#define OTPMONITOR3 *((volatile uint32 *)(0xE61BF10CUL))
|
||||
|
||||
/* Address Module Start Control Register */
|
||||
#define REG_RMSTPCR9_ADDR 0xE6152D24UL
|
||||
#define REG_RMSTPCR9 *((volatile uint32 *)(0xE6152D24UL))
|
||||
|
||||
/* CPG Write Protect Register */
|
||||
#define REG_CPGWPR *((volatile uint32 *)(0xE6150000UL))
|
||||
#define REG_CPGWPCR *((volatile uint32 *)(0xE6150004UL))
|
||||
#define CPG_CPGWPCR_KEYCODE (uint32)(0xA5A50000UL)
|
||||
#define CPG_DISABLE_PROTECTION (uint32)(CPG_CPGWPCR_KEYCODE | 0x0UL)
|
||||
#define CPG_ENABLE_PROTECTION (uint32)(CPG_CPGWPCR_KEYCODE | 0x1UL)
|
||||
|
||||
/* Code Enable/Disable when access to Clock Controller */
|
||||
#define DISABLE_WRITE_KEY_CODE (0xA5A5A500UL)
|
||||
#define ENABLE_WRITE_KEY_CODE (0xA5A5A501UL)
|
||||
|
||||
typedef struct Stag_PortReg_t {
|
||||
uint32 PMMRn; /* 000 LSI Multiplexed Pin Setting Mask Register */
|
||||
uint32 PMMERn; /* 004 LSI Multiplexed Pin Setting Mask Enable Register */
|
||||
uint32 Reverse1[6]; /* 008 + (4 * 6) */
|
||||
uint32 DM0PRn; /* 020 Domain protection register 0 */
|
||||
uint32 DM1PRn; /* 024 Domain protection register 1 */
|
||||
uint32 DM2PRn; /* 028 Domain protection register 2 */
|
||||
uint32 DM3PRn; /* 02C Domain protection register 3 */
|
||||
uint32 Reverse2[4]; /* 030 + (4 * 4) */
|
||||
uint32 GPSRn; /* 040 GPIO/Peripheral Function Select register */
|
||||
uint32 Reverse3[7]; /* 044 + (4 * 7) */
|
||||
uint32 IP0SRn; /* 060 Peripheral Function Select register 0 */
|
||||
uint32 IP1SRn; /* 064 Peripheral Function Select register 1 */
|
||||
uint32 IP2SRn; /* 068 Peripheral Function Select register 2 */
|
||||
uint32 IP3SRn; /* 06C Peripheral Function Select register 3 */
|
||||
uint32 Reverse4[4]; /* 070 + (4 * 4) */
|
||||
uint32 DRV0CTRLn; /* 080 DRV control register 0 */
|
||||
uint32 DRV1CTRLn; /* 084 DRV control register 1 */
|
||||
uint32 DRV2CTRLn; /* 088 DRV control register 2 */
|
||||
uint32 DRV3CTRLn; /* 08C DRV control register 3 */
|
||||
uint32 Reverse5[4]; /* 090 + (4 * 4) */
|
||||
uint32 POCn; /* 0A0 POC control register */
|
||||
uint32 Reverse6[7]; /* 0A4 + (4 * 7) */
|
||||
uint32 PUENn; /* 0C0 LSI pin pull-enable register */
|
||||
uint32 Reverse7[7]; /* 0C4 + (4 * 7) */
|
||||
uint32 PUDn; /* 0E0 LSI pin pull-up/down control register */
|
||||
uint32 Reverse8[7]; /* 0E4 + (4 * 7) */
|
||||
uint32 MODSELn; /* 100 Module select register */
|
||||
uint32 Reverse9[7]; /* 104 + (4 * 7) */
|
||||
uint32 TD0SELn; /* 120 TDSEL Control Register 0 */
|
||||
uint32 TD1SELn; /* 124 TDSEL Control Register 1 */
|
||||
uint32 Reverse10[14]; /* 128 + (4 * 14) */
|
||||
uint32 PSERn; /* 160 Port Safe state Enable Register */
|
||||
uint32 PS0SRn; /* 164 Port Safe state Enable Register 0 */
|
||||
uint32 PS1SRn; /* 168 Port Safe state Enable Register 0 */
|
||||
uint32 Reverse11[5]; /* 16C + (4 * 5) */
|
||||
uint32 IOINTSELn; /* 180 General IO/interrupt switching register */
|
||||
uint32 INOUTSELn; /* 184 General input/output switching register */
|
||||
uint32 OUTDTn; /* 188 General output register */
|
||||
uint32 INDTn; /* 18C General input register */
|
||||
uint32 INTDTn; /* 190 Interrupt display register */
|
||||
uint32 INTCLRn; /* 194 Interrupt clear register */
|
||||
uint32 INTMSKn; /* 198 Interrupt mask register */
|
||||
uint32 MSKCLRn; /* 19C Interrupt Mask Clear Register */
|
||||
uint32 POSNEGn; /* 1A0 Positive/negative logic select register */
|
||||
uint32 EDGLEVELn; /* 1A4 Edge/level select register 0 */
|
||||
uint32 FILONOFFn; /* 1A8 Chattering prevention on/off register */
|
||||
uint32 FILCLKSELn; /* 1AC Chattering prevention clock select register */
|
||||
uint32 Reverse12[4]; /* 1B0 + (4 * 4) */
|
||||
uint32 OUTDTSELn; /* 1C0 Output data select register */
|
||||
uint32 OUTDTHn; /* 1C4 Output data high register */
|
||||
uint32 OUTDTLn; /* 1C8 Output data low register */
|
||||
uint32 BOTHEDGEn; /* 1CC One edge/both edge select register */
|
||||
uint32 INENn; /* 1D0 General input enable register */
|
||||
} PortReg_t;
|
||||
|
||||
/*******************************************************************************
|
||||
** Function Prototypes **
|
||||
*******************************************************************************/
|
||||
void Disable_CPG_Protection(void);
|
||||
void Write_CPGRegister(uint32 address, uint32 value);
|
||||
void GPIO_Start_Module(void);
|
||||
void Mcu_Init(void);
|
||||
void Wdg_Init(void);
|
||||
void Interrupt_Init(void);
|
||||
void Disable_MFIS_Protection(void);
|
||||
void Port_PostInitGpioIntClearSequence(uint32 portBaseAddr, uint32 pinMask);
|
||||
|
||||
extern void PORT1_IRQHandler(void);
|
||||
|
||||
#endif /* APP_PORT_V4H_SAMPLE_H */
|
||||
|
||||
/*******************************************************************************
|
||||
** End of File **
|
||||
*******************************************************************************/
|
||||
@@ -0,0 +1,274 @@
|
||||
/*============================================================================*/
|
||||
/* Project = AUTOSAR Renesas MCAL Components */
|
||||
/* Module = App_PORT_V4H_Sample.c */
|
||||
/* SW-VERSION = 1.1.12 */
|
||||
/*============================================================================*/
|
||||
/* COPYRIGHT */
|
||||
/*============================================================================*/
|
||||
/* Copyright(c) 2021-2025 Renesas Electronics Corporation. */
|
||||
/*============================================================================*/
|
||||
/* Purpose: */
|
||||
/* This file contains sample application for PORT Driver Component */
|
||||
/* */
|
||||
/*============================================================================*/
|
||||
/* */
|
||||
/* Unless otherwise agreed upon in writing between your company and */
|
||||
/* Renesas Electronics Corporation the following shall apply! */
|
||||
/* */
|
||||
/* Warranty Disclaimer */
|
||||
/* */
|
||||
/* There is no warranty of any kind whatsoever granted by Renesas. Any */
|
||||
/* warranty is expressly disclaimed and excluded by Renesas, either expressed */
|
||||
/* or implied, including but not limited to those for non-infringement of */
|
||||
/* intellectual property, merchantability and/or fitness for the particular */
|
||||
/* purpose. */
|
||||
/* */
|
||||
/* Renesas shall not have any obligation to maintain, service or provide bug */
|
||||
/* fixes for the supplied Product(s) and/or the Application. */
|
||||
/* */
|
||||
/* Each User is solely responsible for determining the appropriateness of */
|
||||
/* using the Product(s) and assumes all risks associated with its exercise */
|
||||
/* of rights under this Agreement, including, but not limited to the risks */
|
||||
/* and costs of program errors, compliance with applicable laws, damage to */
|
||||
/* or loss of data, programs or equipment, and unavailability or */
|
||||
/* interruption of operations. */
|
||||
/* */
|
||||
/* Limitation of Liability */
|
||||
/* */
|
||||
/* In no event shall Renesas be liable to the User for any incidental, */
|
||||
/* consequential, indirect, or punitive damage (including but not limited */
|
||||
/* to lost profits) regardless of whether such liability is based on breach */
|
||||
/* of contract, tort, strict liability, breach of warranties, failure of */
|
||||
/* essential purpose or otherwise and even if advised of the possibility of */
|
||||
/* such damages. Renesas shall not be liable for any services or products */
|
||||
/* provided by third party vendors, developers or consultants identified or */
|
||||
/* referred to the User by Renesas in connection with the Product(s) and/or */
|
||||
/* the Application. */
|
||||
/* */
|
||||
/*============================================================================*/
|
||||
/* Environment: */
|
||||
/* Devices: V4H */
|
||||
/*============================================================================*/
|
||||
|
||||
/*******************************************************************************
|
||||
** Revision Control History **
|
||||
*******************************************************************************/
|
||||
/*
|
||||
* 1.1.13: 28/02/2025 : Increase SW-VERSION 1.1.12
|
||||
* 1.1.12: 25/07/2023 : Remove checkpoint for MODSEL4,6 in Port_SetPinMode_Check
|
||||
* 1.1.11: 05/07/2023 : Change Port_Config to PortConf in arguments of functions
|
||||
* 1.1.10: 22/12/2022 : Remove the write access code of MSTPSR9 register
|
||||
* in GPIO_Start_Module().
|
||||
* 1.0.8: 15/11/2022 : Update the input value of MSTPCR9 and MSTPSR9 registers
|
||||
* in GPIO_Start_Module().
|
||||
* 08/11/2022 : Update checkpoint checking value of OUTDTH8 and OUTDTL8
|
||||
* Update checkpoint checking value of FILCLKSEL8 register
|
||||
* 1.0.7: 07/10/2022 : Add checkpoint to check for GP3_14 in Port_SetPinMode()
|
||||
* In Port_SetPinMode_Check(), update checkpoint of MODSELn
|
||||
* register and add checkpoint to check registers of GP3_14.
|
||||
* 1.0.6: 13/09/2022 : Update the condition of checking value MODSELn in
|
||||
* Port_SetPinMode_Check().
|
||||
* 1.0.5: 07/07/2022 : Add new feature Unintended Module Stop Check.
|
||||
* 1.0.4: 02/06/2022 : Add new feature FUSE Monitoring.
|
||||
* 1.0.3: 06/05/2022 : Add new feature Port Pin Mode Setting.
|
||||
* 1.0.2: 12/04/2022 : 1. Add new feature Port Pin Alternate Mode Setting,
|
||||
* Port Pin DIO Mode Setting.
|
||||
* 2. Change Wdg_59_Rwdt_Init() to Wdg_Init()
|
||||
* 1.0.1: 21/03/2022 : Add new feature Port Pin Direction Refreshing
|
||||
* 1.0.0: 01/12/2021 : Initial Version
|
||||
*/
|
||||
/******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
** Include Section **
|
||||
*******************************************************************************/
|
||||
|
||||
#include "App_PORT_V4H_Sample.h"
|
||||
#include "scif.h"
|
||||
#include "log.h"
|
||||
#if (PORT_CRITICAL_SECTION_PROTECTION == STD_ON)
|
||||
#include "SchM_Port.h"
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
** Defines **
|
||||
*******************************************************************************/
|
||||
#define PORT1_BASE_ADDR (uint32)0xE6050800UL
|
||||
#define GP1_24_BIT (0x1U << 24)
|
||||
#define GP1_25_BIT (0x1U << 25)
|
||||
#define GP1_INTERRUPT_SPI (623)
|
||||
/*******************************************************************************
|
||||
** Global Variables **
|
||||
*******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
** Function Definitions **
|
||||
*******************************************************************************/
|
||||
void cpuirq_disable (void)
|
||||
{
|
||||
__asm("cpsid i\n\t");
|
||||
}
|
||||
|
||||
void cpuirq_enable (void)
|
||||
{
|
||||
__asm("cpsie i\n\t");
|
||||
}
|
||||
|
||||
|
||||
uint8 GaaTestResult[11];
|
||||
|
||||
int main(void)
|
||||
{
|
||||
Std_VersionInfoType LddversionInfo;
|
||||
|
||||
/* Invoke Mcu_Init to supply clock for GPIO */
|
||||
Mcu_Init();
|
||||
|
||||
/* Invoke Wdg_Init */
|
||||
Wdg_Init();
|
||||
|
||||
/* Invoke Disable_MFIS_Protection to access MFISLCKRn register */
|
||||
Disable_MFIS_Protection();
|
||||
|
||||
Interrupt_Init();
|
||||
|
||||
/* Invoking the Port_GetVersionInfo API */
|
||||
Port_GetVersionInfo(&LddversionInfo);
|
||||
if (LddversionInfo.vendorID == PORT_VENDOR_ID &&
|
||||
LddversionInfo.moduleID == PORT_MODULE_ID &&
|
||||
LddversionInfo.sw_major_version == (uint8)PORT_SW_MAJOR_VERSION &&
|
||||
LddversionInfo.sw_minor_version == (uint8)PORT_SW_MINOR_VERSION &&
|
||||
LddversionInfo.sw_patch_version == (uint8)PORT_SW_PATCH_VERSION)
|
||||
{
|
||||
GaaTestResult[0] = (uint8)PORT_PASS;
|
||||
}
|
||||
else
|
||||
{
|
||||
GaaTestResult[0] = (uint8)PORT_FAIL;
|
||||
}
|
||||
|
||||
/* This API will initialize all the registers to the initial values */
|
||||
Port_Init(PortConfigSet);
|
||||
Port_PostInitGpioIntClearSequence(PORT1_BASE_ADDR ,GP1_24_BIT);
|
||||
Port_PostInitGpioIntClearSequence(PORT1_BASE_ADDR ,GP1_25_BIT);
|
||||
|
||||
/* Initialize SCIF module */
|
||||
Scif_Init();
|
||||
/* Start program */
|
||||
Console_Print("PROGRAM START\r\n");
|
||||
|
||||
/* Stop program */
|
||||
Console_Print("PROGRAM STOP\r\n");
|
||||
|
||||
while (1)
|
||||
{
|
||||
/* code */
|
||||
}
|
||||
|
||||
return (0);
|
||||
} /* End of main() function */
|
||||
|
||||
|
||||
void Port_PostInitGpioIntClearSequence(uint32 portBaseAddr, uint32 pinMask)
|
||||
{
|
||||
volatile PortReg_t* pPortRegs;
|
||||
|
||||
if (portBaseAddr == (uint32)0u)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
pPortRegs = (volatile PortReg_t*)portBaseAddr;
|
||||
|
||||
/* Clear interrupt pending bits */
|
||||
pPortRegs->INTCLRn = pinMask;
|
||||
|
||||
/* Clear interrupt mask bits */
|
||||
pPortRegs->MSKCLRn = pinMask;
|
||||
}
|
||||
|
||||
|
||||
void PORT1_IRQHandler(void)
|
||||
{
|
||||
volatile PortReg_t* pPORT1;
|
||||
pPORT1 = (volatile PortReg_t*)PORT1_BASE_ADDR;
|
||||
if (pPORT1->INTDTn & GP1_24_BIT)
|
||||
{
|
||||
/* Clear first */
|
||||
pPORT1->INTCLRn = GP1_24_BIT;
|
||||
Console_Print("[PORT1_IRQHandler] [GP1_24 IRQ] \r\n");
|
||||
}
|
||||
else if (pPORT1->INTDTn & GP1_25_BIT)
|
||||
{
|
||||
/* Clear first */
|
||||
pPORT1->INTCLRn = GP1_25_BIT;
|
||||
Console_Print("[PORT1_IRQHandler] [GP1_25 IRQ] \r\n");
|
||||
}
|
||||
}
|
||||
|
||||
void Enable_CPG_Protection(void)
|
||||
{
|
||||
/* Set inverted writing value of CPGWPCR to CPGWPR */
|
||||
REG_CPGWPR = (uint32)(~CPG_ENABLE_PROTECTION);
|
||||
/* Disable CPG protection */
|
||||
REG_CPGWPCR = CPG_ENABLE_PROTECTION;
|
||||
return;
|
||||
}
|
||||
|
||||
void Disable_CPG_Protection(void)
|
||||
{
|
||||
/* Set inverted writing value of CPGWPCR to CPGWPR */
|
||||
REG_CPGWPR = (uint32)(~CPG_DISABLE_PROTECTION);
|
||||
/* Disable CPG protection */
|
||||
REG_CPGWPCR = CPG_DISABLE_PROTECTION;
|
||||
return;
|
||||
}
|
||||
|
||||
void Write_CPGRegister(uint32 address, uint32 value)
|
||||
{
|
||||
volatile uint32 *reg = (volatile uint32 *)address;
|
||||
REG_CPGWPR = ~(value);
|
||||
*reg = value;
|
||||
return;
|
||||
}
|
||||
|
||||
void GPIO_Start_Module(void)
|
||||
{
|
||||
Write_CPGRegister(REG_RMSTPCR9_ADDR, REG_RMSTPCR9 & (uint32)(~(0xF << 15)));
|
||||
}
|
||||
|
||||
void Mcu_Init(void)
|
||||
{
|
||||
Disable_CPG_Protection();
|
||||
GPIO_Start_Module();
|
||||
return;
|
||||
}
|
||||
|
||||
void Interrupt_Init(void)
|
||||
{
|
||||
/* disable interrupts in the CR processor */
|
||||
cpuirq_disable();
|
||||
|
||||
Interrupt_Config();
|
||||
|
||||
/* Enable interrupt*/
|
||||
Interrupt_Enable(GP1_INTERRUPT_SPI + 32UL);
|
||||
|
||||
/* enable interrupts in the CR processor */
|
||||
cpuirq_enable();
|
||||
}
|
||||
|
||||
void Wdg_Init(void)
|
||||
{
|
||||
/* Do nothing */
|
||||
return;
|
||||
}
|
||||
|
||||
void Disable_MFIS_Protection(void)
|
||||
{
|
||||
MFISWPCNTR = MFIS_DISABLE_PROTECTION;
|
||||
return;
|
||||
}
|
||||
/*******************************************************************************
|
||||
** End of File **
|
||||
*******************************************************************************/
|
||||
Binary file not shown.
@@ -0,0 +1,261 @@
|
||||
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|
||||
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||||
|
||||
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|
||||
|
||||
|
||||
|
||||
#include "Platform_Types.h"
|
||||
|
||||
#ifndef RENESAS_TEMP_H
|
||||
#define RENESAS_TEMP_H
|
||||
/*******************************************************************************
|
||||
** Global Symbols **
|
||||
*******************************************************************************/
|
||||
typedef struct Stag_PortReg_t {
|
||||
uint32 PMMRn; /* 000 LSI Multiplexed Pin Setting Mask Register */
|
||||
uint32 PMMERn; /* 004 LSI Multiplexed Pin Setting Mask Enable Register */
|
||||
uint32 Reverse1[6]; /* 008 + (4 * 6) */
|
||||
uint32 DM0PRn; /* 020 Domain protection register 0 */
|
||||
uint32 DM1PRn; /* 024 Domain protection register 1 */
|
||||
uint32 DM2PRn; /* 028 Domain protection register 2 */
|
||||
uint32 DM3PRn; /* 02C Domain protection register 3 */
|
||||
uint32 Reverse2[4]; /* 030 + (4 * 4) */
|
||||
uint32 GPSRn; /* 040 GPIO/Peripheral Function Select register */
|
||||
uint32 Reverse3[7]; /* 044 + (4 * 7) */
|
||||
uint32 IP0SRn; /* 060 Peripheral Function Select register 0 */
|
||||
uint32 IP1SRn; /* 064 Peripheral Function Select register 1 */
|
||||
uint32 IP2SRn; /* 068 Peripheral Function Select register 2 */
|
||||
uint32 IP3SRn; /* 06C Peripheral Function Select register 3 */
|
||||
uint32 Reverse4[4]; /* 070 + (4 * 4) */
|
||||
uint32 DRV0CTRLn; /* 080 DRV control register 0 */
|
||||
uint32 DRV1CTRLn; /* 084 DRV control register 1 */
|
||||
uint32 DRV2CTRLn; /* 088 DRV control register 2 */
|
||||
uint32 DRV3CTRLn; /* 08C DRV control register 3 */
|
||||
uint32 Reverse5[4]; /* 090 + (4 * 4) */
|
||||
uint32 POCn; /* 0A0 POC control register */
|
||||
uint32 Reverse6[7]; /* 0A4 + (4 * 7) */
|
||||
uint32 PUENn; /* 0C0 LSI pin pull-enable register */
|
||||
uint32 Reverse7[7]; /* 0C4 + (4 * 7) */
|
||||
uint32 PUDn; /* 0E0 LSI pin pull-up/down control register */
|
||||
uint32 Reverse8[7]; /* 0E4 + (4 * 7) */
|
||||
uint32 MODSELn; /* 100 Module select register */
|
||||
uint32 Reverse9[7]; /* 104 + (4 * 7) */
|
||||
uint32 TD0SELn; /* 120 TDSEL Control Register 0 */
|
||||
uint32 TD1SELn; /* 124 TDSEL Control Register 1 */
|
||||
uint32 Reverse10[14]; /* 128 + (4 * 14) */
|
||||
uint32 PSERn; /* 160 Port Safe state Enable Register */
|
||||
uint32 PS0SRn; /* 164 Port Safe state Enable Register 0 */
|
||||
uint32 PS1SRn; /* 168 Port Safe state Enable Register 0 */
|
||||
uint32 Reverse11[5]; /* 16C + (4 * 5) */
|
||||
uint32 IOINTSELn; /* 180 General IO/interrupt switching register */
|
||||
uint32 INOUTSELn; /* 184 General input/output switching register */
|
||||
uint32 OUTDTn; /* 188 General output register */
|
||||
uint32 INDTn; /* 18C General input register */
|
||||
uint32 INTDTn; /* 190 Interrupt display register */
|
||||
uint32 INTCLRn; /* 194 Interrupt clear register */
|
||||
uint32 INTMSKn; /* 198 Interrupt mask register */
|
||||
uint32 MSKCLRn; /* 19C Interrupt Mask Clear Register */
|
||||
uint32 POSNEGn; /* 1A0 Positive/negative logic select register */
|
||||
uint32 EDGLEVELn; /* 1A4 Edge/level select register 0 */
|
||||
uint32 FILONOFFn; /* 1A8 Chattering prevention on/off register */
|
||||
uint32 FILCLKSELn; /* 1AC Chattering prevention clock select register */
|
||||
uint32 Reverse12[4]; /* 1B0 + (4 * 4) */
|
||||
uint32 OUTDTSELn; /* 1C0 Output data select register */
|
||||
uint32 OUTDTHn; /* 1C4 Output data high register */
|
||||
uint32 OUTDTLn; /* 1C8 Output data low register */
|
||||
uint32 BOTHEDGEn; /* 1CC One edge/both edge select register */
|
||||
uint32 INENn; /* 1D0 General input enable register */
|
||||
} PortReg_t;
|
||||
|
||||
#define PORT0_BASE_ADDR (uint32)0xE6050000UL
|
||||
#define PORT1_BASE_ADDR (uint32)0xE6050800UL
|
||||
#define PORT4_BASE_ADDR (uint32)0xE6060000UL
|
||||
#define PORT8_BASE_ADDR (uint32)0xE6068000UL
|
||||
|
||||
#define GP1_20_BIT (0x1U << 20)
|
||||
#define GP0_6_BIT (0x1U << 6)
|
||||
#define GP4_16_BIT (0x1U << 16)
|
||||
#define GP8_6_BIT (0x1U << 6)
|
||||
#define GP8_7_BIT (0x1U << 7)
|
||||
|
||||
// STD_ON STD_OFF
|
||||
#define PMIC_IRQ_GP1_20_BIT STD_ON
|
||||
#define PMIC_IRQ_GP1_20_BI1_DIO STD_OFF
|
||||
|
||||
void Port_PostInitGpioIntClearSequence(uint32 portBaseAddr, uint32 pinMask);
|
||||
void PMIC_HW_ISR_CAT2_ISR(void);
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
void CtCdSDL_Init(void)
|
||||
{
|
||||
/**********************************************************************************************************************
|
||||
* DO NOT CHANGE THIS COMMENT! << Start of runnable implementation >> DO NOT CHANGE THIS COMMENT!
|
||||
* Symbol: CtCdSDL_Smmgr_Init
|
||||
*********************************************************************************************************************/
|
||||
|
||||
#if (PMIC_IRQ_GP1_20_BIT == STD_ON)
|
||||
Interrupt_Enable(623+32);
|
||||
#endif
|
||||
|
||||
extern void CtCdSDL_Smmgr_Init(void);
|
||||
CtCdSDL_Smmgr_Init();
|
||||
/**********************************************************************************************************************
|
||||
* DO NOT CHANGE THIS COMMENT! << End of runnable implementation >> DO NOT CHANGE THIS COMMENT!
|
||||
*********************************************************************************************************************/
|
||||
}
|
||||
|
||||
#if(PMIC_QnA_WDG == STD_ON)
|
||||
//RAA271005_WDG_Disable();
|
||||
//RAA271005_MDF_Mode();
|
||||
RAA271005_Fault_Mask(); 012c-> 0xFF??
|
||||
Pmic_RAA271005_Main(); /* Initialize PMIC Watchdog - Tharun*/
|
||||
|
||||
RAA271005_Flult_Register_Clear();
|
||||
|
||||
#if (PMIC_IRQ_GP1_20_BIT == STD_ON)
|
||||
|
||||
Port_PostInitGpioIntClearSequence(PORT1_BASE_ADDR ,GP1_20_BIT);
|
||||
|
||||
#endif
|
||||
|
||||
if(test_pmic_clrear==1)
|
||||
{
|
||||
RAA271005_Flult_Register_Clear();
|
||||
|
||||
test_pmic_clrear=0;
|
||||
}
|
||||
|
||||
|
||||
uint8 RAA271005_Flult_Register_Clear(void)
|
||||
{
|
||||
uint8 retVal = PMIC_RETVAL_FAIL;
|
||||
uint8 read_reg_retval = 0;
|
||||
|
||||
#if 0
|
||||
/*0x107 - WDT_CFG0 Enable WDG*/
|
||||
LucSendData[0] = PMIC_REG_IO_PAGE_8_BIT_REG;
|
||||
LucSendData[1] = PMIC_REG_GET_PAGE(PMIC_REG_WDT_CFG0);
|
||||
LucSendData[2] = PMIC_REG_GET_ADDR(PMIC_REG_WDT_CFG0);
|
||||
LucSendData[3] = PMIC_REG_WDT_CFG0_WWDT_EN_Disable | PMIC_REG_WDT_CFG0_WWDT_ADV_4Q | PMIC_REG_WDT_CFG0_ADV_MODE; //0x05
|
||||
|
||||
read_reg_retval = IIC_CRC_WritetoProtReg_operation(LucSendData);
|
||||
#endif
|
||||
/* Regulation Part Register Read Slave Address 0x54*/
|
||||
LucSendData[0] = 0x00;
|
||||
LucSendData[1] = 0x00;
|
||||
IIC_CRC_WritetoReguReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x00;
|
||||
LucSendData[1] = 0x00;
|
||||
IIC_CRC_WritetoReguReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x00;
|
||||
IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x40;
|
||||
IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x41;
|
||||
IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x42;
|
||||
IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x43;
|
||||
IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x44;
|
||||
IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x45;
|
||||
IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x46;
|
||||
IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x47;
|
||||
IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x48;
|
||||
IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x49;
|
||||
IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
|
||||
|
||||
/* Protection Part Register Read Slave Address 0x55*/
|
||||
LucSendData[0] = 0x00;
|
||||
LucSendData[1] = 0x00;
|
||||
IIC_CRC_WritetoProtReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x00;
|
||||
LucSendData[1] = 0x00;
|
||||
IIC_CRC_WritetoProtReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x14;
|
||||
IIC_ReadFromProtReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x19;
|
||||
IIC_ReadFromProtReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x1A;
|
||||
IIC_ReadFromProtReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x1B;
|
||||
IIC_ReadFromProtReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x1C;
|
||||
IIC_ReadFromProtReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x1D;
|
||||
IIC_ReadFromProtReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x1E;
|
||||
IIC_ReadFromProtReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x1F;
|
||||
IIC_ReadFromProtReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x20;
|
||||
IIC_ReadFromProtReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x21;
|
||||
IIC_ReadFromProtReg_operation_1Byte(LucSendData);
|
||||
|
||||
LucSendData[0] = 0x2A;
|
||||
IIC_ReadFromProtReg_operation_1Byte(LucSendData);
|
||||
#if 0
|
||||
LucSendData[0] = 0x00;
|
||||
LucSendData[1] = 0x01;
|
||||
LucSendData[2] = 0x02;
|
||||
LucSendData[3] = 0x65;
|
||||
|
||||
read_reg_retval = IIC_CRC_WritetoProtReg_operation(LucSendData);
|
||||
#endif
|
||||
return retVal;
|
||||
}
|
||||
|
||||
|
||||
ISR(PMIC_HW_ISR_CAT2_ISR)
|
||||
//void PMIC_HW_ISR_CAT2_ISR(void)
|
||||
{
|
||||
volatile PortReg_t* pPORT;
|
||||
|
||||
u32_PMIC_IRQ_Count_flag++;
|
||||
|
||||
#if (PMIC_IRQ_GP1_20_BIT == STD_ON)
|
||||
pPORT = (volatile PortReg_t*)PORT1_BASE_ADDR;
|
||||
if (pPORT->INTDTn & GP1_20_BIT)
|
||||
{
|
||||
u32_PMIC_IRQ_Count++;
|
||||
|
||||
pPORT->INTCLRn = GP1_20_BIT;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
||||
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Reference in New Issue
Block a user