add

Customer/MOBIS/PRK3_(ADAS_Parking3)/Code/build_config/mobis/Makefile.project.part.defines.txt

@@ -0,0 +1,856 @@
+
+
+###############################################################################
+
+#  Makefile.project.part.defines
+
+###############################################################################
+
+# MakeSupport type: AUTOSAR
+
+# Derived product: Microsar4
+
+# Folder structure: ComponentBased
+ 
+#------------------------------------------------------------------------------
+
+#------------------------- MUST be filled out ---------------------------------
+
+# Root of the project (dir where the additionally used components reside) from
+
+# the scope of the makefile location.
+
+# E.g. makefile is located under
+
+#    d:\usr\develop\can\PAG\HC08\COSMIC\testsuit\appl
+
+# and the components like drv, il reside under
+
+#    d:\usr\develop\can\PAG\HC08\COSMIC
+
+# The root is given (relative to the Makefile)
+
+#    ROOT = ..\..
+
+#------------------------------------------------------------------------------
+
+ROOT ?= ..\..\CBD2400501_D01_RCarX4x
+ 
+#------------------------------------------------------------------------------
+
+#------------------------- OPTIONAL -------------------------------------------
+
+# $(PRJROOT) specifies the path to the root directory of your project
+
+# Set the variable if source or header files outside of $(ROOT)/.. are used
+
+#------------------------------------------------------------------------------
+
+# PRJROOT =
+ 
+#------------------------------------------------------------------------------
+
+#------------------------- MUST be filled out ---------------------------------
+
+# $(GENTOOL_DIR) contains the path to your version.info file
+
+# E.g.:    GENTOOL_DIR = $(ROOT)\Generators\Components
+
+#------------------------------------------------------------------------------
+
+GENTOOL_DIR = $(ROOT)\Doc\DeliveryInformation
+ 
+#------------------------------------------------------------------------------
+
+#------------------------- MUST be filled out ---------------------------------
+
+# Version of Makefile.project.part.defines
+
+#------------------------------------------------------------------------------
+
+MPPD_VERSION = 32
+ 
+#------------------------------------------------------------------------------
+
+#------------------------- MUST be filled out ---------------------------------
+
+# Path to which *.obj, *.err, *.lst will be moved/generated
+
+#------------------------------------------------------------------------------
+
+OBJ_PATH = obj
+
+ERR_PATH = err
+
+LST_PATH = lst
+
+LOG_PATH = log
+
+LIB_PATH = lib
+ 
+#------------------------------------------------------------------------------
+
+#------------------------- MUST be filled out ---------------------------------
+
+# $(GENDATA_DIR) contains the directory into which the ecu specific data is
+
+# generated
+
+# E.g.: GENDATA_DIR = GenData
+
+#------------------------------------------------------------------------------
+
+GENDATA_DIR = GenData
+ 
+#------------------------------------------------------------------------------
+
+#------------------------- MUST be filled out ---------------------------------
+
+# $(GENDATA_OS_DIR) contains the directory into which the ecu osspecific data is
+
+# generated
+
+# E.g.: GENDATA_OS_DIR = GenDataOs
+
+#------------------------------------------------------------------------------
+
+GENDATA_OS_DIR = $(GENDATA_DIR)
+ 
+#------------------------------------------------------------------------------
+
+# Use Autosar Makefiles
+
+#------------------------------------------------------------------------------
+
+USE_AUTOSAR_MAKE = 1
+ 
+#------------------------------------------------------------------------------
+
+# Subfolder of BSW components (mandatory BSW with konStruct 1.7.xx or newer)
+
+#------------------------------------------------------------------------------
+
+GLOBAL_COMP_DIR = Components
+ 
+#------------------------------------------------------------------------------
+
+# Subfolder of ASR software components
+
+# Relative to $(ROOT)\$(GLOBAL_COMP_DIR)
+
+#------------------------------------------------------------------------------
+
+GLOBAL_SWC_DIR = ..\Components
+ 
+#------------------------------------------------------------------------------
+
+# Subfolder of Third Party components (e.g. Third Party MCAL)
+
+# Relative to $(ROOT)\$(GLOBAL_COMP_DIR)
+
+#------------------------------------------------------------------------------
+
+GLOBAL_THIRDPARTY_DIR = ..\ThirdParty
+ 
+#------------------------------------------------------------------------------
+
+#------------------------- MUST be filled out ---------------------------------
+
+# Define usage of the generated RTE makefile
+
+# $(RTE_MAKEFILE_DIR) contains the directory into which RTE makefile is generated
+
+# Please note: If you are using RTE 4.11 or lower (MSR4 R15 and lower), the
+
+# generated RTE makefile will not work with the Vector MakeSupport. Add the 
+
+# RTE source files manually in this case and comment out RTE_MAKEFILE_DIR
+
+#------------------------------------------------------------------------------
+
+RTE_MAKEFILE_DIR = $(GENDATA_DIR)/mak
+ 
+ifneq ($(RTE_MAKEFILE_DIR),)
+
+include $(RTE_MAKEFILE_DIR)/Rte_rules.mak
+
+include $(RTE_MAKEFILE_DIR)/Rte_defs.mak
+
+include $(RTE_MAKEFILE_DIR)/Rte_check.mak
+
+endif
+ 
+#------------------------------------------------------------------------------
+
+#------------------------- MUST be filled out ---------------------------------
+
+# Define usage of the generated ComXf Transformer makefile
+
+# $(COMXF_MAKEFILE_DIR) contains the directory into which ComXf Transformer makefile is generated
+
+#------------------------------------------------------------------------------
+
+COMXF_MAKEFILE_DIR = $(GENDATA_DIR)/mak
+ 
+ifneq ($(COMXF_MAKEFILE_DIR),)
+
+include $(COMXF_MAKEFILE_DIR)/ComXf_rules.mak
+
+include $(COMXF_MAKEFILE_DIR)/ComXf_defs.mak
+
+include $(COMXF_MAKEFILE_DIR)/ComXf_check.mak
+
+endif
+ 
+#------------------------------------------------------------------------------
+
+#------------------------- MUST be filled out ---------------------------------
+
+# Define usage of the generated E2EXf Transformer makefile
+
+# $(E2EXF_MAKEFILE_DIR) contains the directory into which E2EXf Transformer makefile is generated
+
+#------------------------------------------------------------------------------
+
+E2EXF_MAKEFILE_DIR = $(GENDATA_DIR)/mak
+ 
+ifneq ($(E2EXF_MAKEFILE_DIR),)
+
+include $(E2EXF_MAKEFILE_DIR)/E2EXf_rules.mak
+
+include $(E2EXF_MAKEFILE_DIR)/E2EXf_defs.mak
+
+include $(E2EXF_MAKEFILE_DIR)/E2EXf_check.mak
+
+endif
+ 
+# Define MCAL modules that shall be excluded from build
+
+#------------------------------------------------------------------------------
+
+MCAL_EXCLUDE_ADC    = 1
+
+MCAL_EXCLUDE_CRC    = 1
+
+MCAL_EXCLUDE_DIO    = 0
+
+MCAL_EXCLUDE_EEP    = 0
+
+MCAL_EXCLUDE_FLS    = 1
+
+MCAL_EXCLUDE_GPT    = 0
+
+MCAL_EXCLUDE_ICU    = 1
+
+MCAL_EXCLUDE_MCU    = 0
+
+MCAL_EXCLUDE_OCU    = 1
+
+MCAL_EXCLUDE_PORT   = 0
+
+MCAL_EXCLUDE_PWM    = 1
+
+MCAL_EXCLUDE_SPI    = 0
+
+MCAL_EXCLUDE_WDG    = 0
+
+MCAL_EXCLUDE_FEE    = 1
+
+MCAL_EXCLUDE_CRY    = 1
+
+MCAL_EXCLUDE_FLSTST = 1
+
+MCAL_EXCLUDE_RAMTST = 1
+
+MCAL_EXCLUDE_CORTST = 1
+
+MCAL_EXCLUDE_ETH    = 1
+
+MCAL_EXCLUDE_CDDICCOM = 0
+
+MCAL_EXCLUDE_CDDIPMMU = 1
+
+MCAL_EXCLUDE_CDDRFSO = 0
+
+MCAL_EXCLUDE_CDDEMM = 0
+
+MCAL_EXCLUDE_CDDIIC = 0
+
+MCAL_EXCLUDE_COMMONSAMPLESOURCES = 1
+ 
+#------------------------------------------------------------------------------
+
+#------------------------- MUST be filled out ---------------------------------
+
+# Define the E2E Library Profiles that shall be used
+
+#------------------------------------------------------------------------------
+ 
+E2E_USE_PROFILE_01 = 0
+
+E2E_USE_PROFILE_02 = 0
+
+E2E_USE_PROFILE_04 = 0
+
+E2E_USE_PROFILE_05 = 1
+
+E2E_USE_PROFILE_06 = 0
+
+E2E_USE_PROFILE_07 = 0
+
+E2E_USE_PROFILE_08 = 0
+
+E2E_USE_PROFILE_11 = 1
+
+E2E_USE_PROFILE_22 = 0
+
+E2E_USE_PROFILE_44 = 0
+
+E2E_USE_PROFILE_JLR = 0
+ 
+###############################################################################
+
+#  Modules
+
+###############################################################################
+
+MODULE_LIST_PROJECT                                              += ARTI
+
+MODULE_LIST_PROJECT                                              += BSWM
+
+MODULE_LIST_PROJECT                                              += CANIF
+
+MODULE_LIST_PROJECT                                              += CANNM
+
+MODULE_LIST_PROJECT                                              += CANSM
+
+MODULE_LIST_PROJECT                                              += CANTSYN
+
+MODULE_LIST_PROJECT                                              += CANTP
+
+MODULE_LIST_PROJECT                                              += CANTRCV_30_TJA1043
+
+MODULE_LIST_PROJECT                                              += CANXCP
+
+MODULE_LIST_PROJECT                                              += CAN_30_CORE
+
+MODULE_LIST_PROJECT                                              += COM
+
+MODULE_LIST_PROJECT                                              += COMM
+
+MODULE_LIST_PROJECT                                              += CRC
+
+MODULE_LIST_PROJECT                                              += CRYIF
+
+MODULE_LIST_PROJECT                                              += CRYPTO_30_LIBCV
+
+MODULE_LIST_PROJECT                                              += CSM
+
+MODULE_LIST_PROJECT                                              += DBG
+
+MODULE_LIST_PROJECT                                              += DCM
+
+MODULE_LIST_PROJECT                                              += DEM
+
+MODULE_LIST_PROJECT                                              += DET
+
+MODULE_LIST_PROJECT                                              += DLT
+
+MODULE_LIST_PROJECT                                              += E2E
+
+MODULE_LIST_PROJECT                                              += EA
+
+MODULE_LIST_PROJECT                                              += ECUM
+
+MODULE_LIST_PROJECT                                              += EEP_30_XXSPI01
+
+MODULE_LIST_PROJECT                                              += EEP_30_VMEMACCM
+
+MODULE_LIST_PROJECT                                              += FIM
+
+MODULE_LIST_PROJECT                                              += I2C
+
+MODULE_LIST_PROJECT                                              += IOHWAB
+
+MODULE_LIST_PROJECT                                              += IPDUM
+
+MODULE_LIST_PROJECT                                              += KEYM
+
+MODULE_LIST_PROJECT                                              += MCAL_RCARX4X
+
+MODULE_LIST_PROJECT                                              += MEMIF
+
+MODULE_LIST_PROJECT                                              += NM
+
+MODULE_LIST_PROJECT                                              += NMOSEK
+
+MODULE_LIST_PROJECT                                              += NVM
+
+MODULE_LIST_PROJECT                                              += OS
+
+MODULE_LIST_PROJECT                                              += PDUR
+
+MODULE_LIST_PROJECT                                              += RAMTST
+
+MODULE_LIST_PROJECT                                              += RTM
+
+MODULE_LIST_PROJECT                                              += STBM
+
+MODULE_LIST_PROJECT                                              += VSTDLIB
+
+MODULE_LIST_PROJECT                                              += WDGIF
+
+MODULE_LIST_PROJECT                                              += WDGM
+
+MODULE_LIST_PROJECT                                              += XCP
+
+MODULE_LIST_PROJECT                                              += VCAN_30_RSCANFD
+
+MODULE_LIST_PROJECT                                              += VDEM42
+
+MODULE_LIST_PROJECT                                              += VITAHLP
+
+MODULE_LIST_PROJECT                                              += VLINKGEN
+
+MODULE_LIST_PROJECT                                              += VMEMACCM
+
+MODULE_LIST_PROJECT                                              += VMEM_30_EEP
+
+MODULE_LIST_PROJECT                                              += VSECPRIM
+ 
+ARTI_USED                                                        = 0
+
+BSWM_USED                                                        = 1
+
+CANIF_USED                                                       = 1
+
+CANNM_USED                                                       = 0
+
+CANSM_USED                                                       = 1
+
+CANTSYN_USED                                                     = 0
+
+CANTP_USED                                                       = 1
+
+CANTRCV_30_TJA1043_USED                                          = 0
+
+CANXCP_USED                                                      = 1
+
+CAN_30_CORE_USED                                                 = 1
+
+COM_USED                                                         = 1
+
+COMM_USED                                                        = 1
+
+CRC_USED                                                         = 1
+
+CRYIF_USED                                                       = 0
+
+CRYPTO_30_LIBCV_USED                                             = 0
+
+CSM_USED                                                         = 0
+
+DBG_USED                                                         = 0
+
+DCM_USED                                                         = 1
+
+DEM_USED                                                         = 1
+
+DET_USED                                                         = 1
+
+DLT_USED                                                         = 0
+
+E2E_USED                                                         = 1
+
+EA_USED                                                          = 1
+
+ECUM_USED                                                        = 1
+
+EEP_30_XXSPI01_USED                                              = 1
+
+EEP_30_VMEMACCM_USED                                             = 0
+
+FIM_USED                                                         = 0
+
+I2C_USED                                                         = 0
+
+IOHWAB_USED                                                      = 1
+
+IPDUM_USED                                                       = 0
+
+KEYM_USED                                                        = 0
+
+MCAL_RCARX4X_USED                                                = 1
+
+MEMIF_USED                                                       = 1
+
+NM_USED                                                          = 0
+
+NMOSEK_USED                                                      = 0
+
+NVM_USED                                                         = 1
+
+OS_USED                                                          = 1
+
+PDUR_USED                                                        = 1
+
+RAMTST_USED                                                      = 0
+
+RTM_USED                                                         = 0
+
+STBM_USED                                                        = 0
+
+VSTDLIB_USED                                                     = 1
+
+WDGIF_USED                                                       = 1
+
+WDGM_USED                                                        = 1
+
+XCP_USED                                                         = 1
+
+VCAN_30_RSCANFD_USED                                             = 1
+
+VDEM42_USED                                                      = 0
+
+VITAHLP_USED                                                     = 0
+
+VLINKGEN_USED                                                    = 1
+
+VMEMACCM_USED                                                    = 0
+
+VMEM_30_EEP_USED                                                 = 0
+
+VSECPRIM_USED                                                    = 0
+ 
+ARTI_PATH                                                        = Components\Arti
+
+BSWM_PATH                                                        = Components\BswM
+
+CANIF_PATH                                                       = Components\CanIf
+
+CANNM_PATH                                                       = Components\CanNm
+
+CANSM_PATH                                                       = Components\CanSM
+
+CANTSYN_PATH                                                     = Components\CanTSyn
+
+CANTP_PATH                                                       = Components\CanTp
+
+CANTRCV_30_TJA1043_PATH                                          = Components\CanTrcv_30_Tja1043
+
+CANXCP_PATH                                                      = Components\CanXcp
+
+CAN_30_CORE_PATH                                                 = Components\Can_30_Core
+
+COM_PATH                                                         = Components\Com
+
+COMM_PATH                                                        = Components\ComM
+
+CRC_PATH                                                         = Components\Crc
+
+CRYIF_PATH                                                       = Components\CryIf
+
+CRYPTO_30_LIBCV_PATH                                             = Components\Crypto_30_LibCv
+
+CSM_PATH                                                         = Components\Csm
+
+DBG_PATH                                                         = Components\Dbg
+
+DCM_PATH                                                         = Components\Dcm
+
+DEM_PATH                                                         = Components\Dem
+
+DET_PATH                                                         = Components\Det
+
+DLT_PATH                                                         = Components\Dlt
+
+E2E_PATH                                                         = Components\E2E
+
+EA_PATH                                                          = Components\Ea
+
+ECUM_PATH                                                        = Components\EcuM
+
+EEP_30_XXSPI01_PATH                                              = Components\Eep_30_XXspi01
+
+EEP_30_VMEMACCM_PATH                                             = Components\Eep_30_vMemAccM
+
+FIM_PATH                                                         = Components\FiM
+
+I2C_PATH                                                         = Components\I2c
+
+IOHWAB_PATH                                                      = Components\IoHwAb
+
+IPDUM_PATH                                                       = Components\IpduM
+
+KEYM_PATH                                                        = Components\KeyM
+
+MCAL_RCARX4X_PATH                                                = Components\Mcal_RCarX4x
+
+MEMIF_PATH                                                       = Components\MemIf
+
+NM_PATH                                                          = Components\Nm
+
+NMOSEK_PATH                                                      = Components\NmOsek
+
+NVM_PATH                                                         = Components\NvM
+
+OS_PATH                                                          = Components\Os
+
+PDUR_PATH                                                        = Components\PduR
+
+RAMTST_PATH                                                      = Components\RamTst
+
+RTM_PATH                                                         = Components\Rtm
+
+STBM_PATH                                                        = Components\StbM
+
+VSTDLIB_PATH                                                     = Components\VStdLib
+
+WDGIF_PATH                                                       = Components\WdgIf
+
+WDGM_PATH                                                        = Components\WdgM
+
+XCP_PATH                                                         = Components\Xcp
+
+VCAN_30_RSCANFD_PATH                                             = Components\vCan_30_Rscanfd
+
+VDEM42_PATH                                                      = Components\vDem42
+
+VITAHLP_PATH                                                     = DemoComponents\vItaHlp
+
+VLINKGEN_PATH                                                    = DemoComponents\vLinkGen
+
+VMEMACCM_PATH                                                    = Components\vMemAccM
+
+VMEM_30_EEP_PATH                                                 = Components\vMem_30_Eep
+
+VSECPRIM_PATH                                                    = Components\vSecPrim
+ 
+ 
+###############################################################################
+
+#  Application
+
+###############################################################################
+
+# additional application include directories
+ 
+COMPONENTS = CtApDCM CtApDEM CtApHWIOP CtApIVC_P CtApNVM CtApMiddleware CtApCOM
+
+SEPERATED_BY_VEH = CtApUISP
+
+COMPONENTS_CDD = CtCdIccom CtCdLog
+ 
+ADDITIONAL_INCLUDES += Include
+
+ADDITIONAL_INCLUDES += GenData/include
+
+ADDITIONAL_INCLUDES += T1/interface
+
+ADDITIONAL_INCLUDES += T1/src
+
+ADDITIONAL_INCLUDES += ../ASW/_Proprietary_MOBIS/_SystemCFG
+
+ADDITIONAL_INCLUDES += ../ASW/_Proprietary_MOBIS/CtApDEM
+
+ADDITIONAL_INCLUDES += ../ASW/_Proprietary_MOBIS/CtApDEM/*
+
+ADDITIONAL_INCLUDES += ../ASW/_Proprietary_MOBIS/CtApHWIOP
+
+ADDITIONAL_INCLUDES += ../ASW/_Proprietary_MOBIS/CtApHWIOP/*
+
+ADDITIONAL_INCLUDES += ../ASW/_Proprietary_MOBIS/CtApCOM
+
+ADDITIONAL_INCLUDES += ../ASW/_Proprietary_MOBIS/CtApDCM
+
+ADDITIONAL_INCLUDES += ../ASW/_Proprietary_MOBIS/CtApDCM/*
+
+ADDITIONAL_INCLUDES += ../ASW/_Proprietary_MOBIS/CtApDCM/Interface/*
+
+ADDITIONAL_INCLUDES += ../ASW/_Proprietary_MOBIS/CtApNVM
+
+ADDITIONAL_INCLUDES += ../ASW/_Proprietary_MOBIS/CtApNVM/*
+
+ADDITIONAL_INCLUDES += ../ASW/_Proprietary_MOBIS/CtApMiddleware
+
+ADDITIONAL_INCLUDES += ../ASW/_Proprietary_MOBIS/CtApMiddleware/*
+
+ADDITIONAL_INCLUDES += ../ASW/_Proprietary_MOBIS/CtApMiddleware/generated_interhost_headers/*
+
+ADDITIONAL_INCLUDES += ../ASW/_Proprietary_MOBIS/CtApIVC_P
+
+ADDITIONAL_INCLUDES += ../ASW/_Proprietary_MOBIS/CtApIVC_P/*
+
+ADDITIONAL_INCLUDES += ../ASW/CtApCOM
+
+ADDITIONAL_INCLUDES += ../ASW/CtApUISP_FreeRunning
+
+# for Valoe UISP :  when actvate valoe Lib, below include path have to be enabled 
+
+ADDITIONAL_INCLUDES += ../CDD/_Proprietary_MOBIS/*
+
+ADDITIONAL_INCLUDES += ../CDD/_Proprietary_MTCI/*
+
+ADDITIONAL_INCLUDES += ../CDD/CDD_Iccom
+
+ADDITIONAL_INCLUDES += ../CDD/CDD_Ipmmu
+
+ADDITIONAL_INCLUDES += ../CDD/CDD_Iic
+
+ADDITIONAL_INCLUDES += ../CDD/CtCdSDL
+
+ADDITIONAL_INCLUDES += ../CDD/CtCdLog
+
+ADDITIONAL_INCLUDES += ../CDD/_Proprietary_MOBIS/CtCdSDL
+
+ADDITIONAL_INCLUDES += ../CDD/_Proprietary_MTCI/Smmgr
+
+ADDITIONAL_INCLUDES += ../CDD/_Proprietary_MOBIS/CtCdLog
+
+ADDITIONAL_INCLUDES += ../CDD/_Proprietary_MOBIS/CtCdGTS
+
+ADDITIONAL_INCLUDES += ../CDD/_Proprietary_MOBIS/CtCdIic
+
+ADDITIONAL_INCLUDES += ../CDD/_Proprietary_MOBIS/_SystemTI/OS
+ 
+# application library
+
+ADDITIONAL_OBJECTS += Library/libCtApPDW.lib                   # Not ready yet
+
+# for Valoe UISP :  when actvate valoe Lib, below include path have to be enabled 
+
+# ADDITIONAL_OBJECTS += Library/libCtApUISP_FreeRunning.lib     # Not ready yet
+
+ADDITIONAL_OBJECTS += Library/HKMC_ASK_Server.a           
+
+APP_SOURCE_LST += T1/src/*.c
+
+ADDITIONAL_OBJECTS += T1/lib/*.a    
+ 
+# application source files
+
+APP_SOURCE_LST += IntegrationCode/EcuM_Callout_Stubs.c
+
+APP_SOURCE_LST += IntegrationCode/BswM_Callout_Stubs.c
+
+APP_SOURCE_LST += IntegrationCode/Os_Callout_Stubs.c
+
+APP_SOURCE_LST += IntegrationCode/Spi_User_Cbk.c
+
+APP_SOURCE_LST += IntegrationCode/Gpt_Cbk.c
+
+APP_SOURCE_LST += IntegrationCode/IoHwAb.c
+
+# APP_SOURCE_LST += Source/XcpAppl.c
+
+APP_SOURCE_LST += Source/BrsMain.c
+
+APP_SOURCE_LST += Source/BrsMainStartup.c
+
+APP_SOURCE_LST += Source/BrsMain_Appl.c
+
+APP_SOURCE_LST += Source/BrsMain_Callout_Stubs.c
+
+APP_SOURCE_LST += Source/Mcu_Callout_Stubs.c
+
+APP_SOURCE_LST += Source/Dcm_Callout_Stubs.c
+
+APP_SOURCE_LST += Source/Can_Callout_Stubs.c
+
+APP_SOURCE_LST += Source/WdgM_Callout_Stubs.c
+
+APP_SOURCE_LST += Source/ARMBrsHwIntTb_CortexR52.c
+
+APP_SOURCE_LST += Source/ARMBrsHw_CortexR52.c
+
+APP_SOURCE_LST += Source/ARMStartup_CortexR52.c
+
+APP_SOURCE_LST += Source/BrsHw.c
+
+APP_SOURCE_LST += Source/Cache.c
+
+# APP_SOURCE_LST += Source/TscFwHlp.c
+
+APP_SOURCE_LST += ../ASW/CtApDCM.c
+
+APP_SOURCE_LST += ../ASW/CtApDEM.c
+
+APP_SOURCE_LST += ../ASW/CtApHWIOP_P.c
+
+APP_SOURCE_LST += ../ASW/CtApIVC_P.c
+
+APP_SOURCE_LST += ../ASW/CtApMiddleware.c
+
+APP_SOURCE_LST += ../ASW/CtApNVM.c
+
+APP_SOURCE_LST += ../ASW/CtApPDW.c
+
+APP_SOURCE_LST += ../ASW/CtApUISP_FreeRunning.c
+
+APP_SOURCE_LST += ../ASW/XcpAppl.c
+
+APP_SOURCE_LST += ../ASW/CtApCOM.c
+
+APP_SOURCE_LST += ../ASW/_Proprietary_MOBIS/_SystemCFG/cfg_global_func.c
+
+APP_SOURCE_LST += $(foreach component, $(COMPONENTS), ../ASW/_Proprietary_MOBIS/$(component)/*/*.c)
+
+APP_SOURCE_LST += $(foreach component, $(COMPONENTS), ../ASW/_Proprietary_MOBIS/$(component)/*.c)
+ 
+# for UISP Add
+
+ifeq ($(BLD_TARGET_VEH),RS4)
+
+ADDITIONAL_INCLUDES += ../ASW/_Proprietary_MOBIS/CtApUISP/RS4/UISP_sharedutils
+
+APP_SOURCE_LST += $(foreach component, $(SEPERATED_BY_VEH), ../ASW/_Proprietary_MOBIS/$(component)/RS4/*/*.c)
+
+APP_SOURCE_LST += $(foreach component, $(SEPERATED_BY_VEH), ../ASW/_Proprietary_MOBIS/$(component)/RS4/*.c)
+
+endif
+ 
+APP_SOURCE_LST += ../CDD/CtCdSDL.c
+
+APP_SOURCE_LST += ../CDD/CDD_Iccom.c
+
+APP_SOURCE_LST += ../CDD/CDD_Iccom_Stub.c
+
+APP_SOURCE_LST += ../CDD/CDD_Iic.c
+
+APP_SOURCE_LST += ../CDD/CDD_Ipmmu_Stub.c
+
+APP_SOURCE_LST += ../CDD/RCar_FuSa.c
+
+APP_SOURCE_LST += ../CDD/CtCdLog.c
+
+APP_SOURCE_LST += ../CDD/_Proprietary_MOBIS/CtCdIic/CtCdIic_main.c
+
+APP_SOURCE_LST += ../CDD/_Proprietary_MOBIS/CtCdIic/CDD_Iic_Interface.c
+
+APP_SOURCE_LST += ../CDD/_Proprietary_MOBIS/_SystemTI/OS/OsTrapHandler.c
+
+APP_SOURCE_LST += ../CDD/_Proprietary_MOBIS/CtCdGTS/scmt.c
+
+APP_SOURCE_LST += ../CDD/_Proprietary_MOBIS/CtCdGTS/scmt_checkpoint.c
+
+APP_SOURCE_LST += ../CDD/_Proprietary_MOBIS/CtCdSDL/CtCdSDL_main.c
+
+APP_SOURCE_LST += ../CDD/_Proprietary_MTCI/Smmgr/Smmgr_main.c
+
+APP_SOURCE_LST += ../CDD/_Proprietary_MTCI/Smmgr/Cdd_PMIC.c
+
+APP_SOURCE_LST += ../CDD/_Proprietary_MTCI/Smmgr/smmgr.c
+
+APP_SOURCE_LST += ../CDD/_Proprietary_MTCI/Smmgr/smmgr_pmic.c
+
+APP_SOURCE_LST += ../CDD/_Proprietary_MTCI/Smmgr/ecmerr_generic.c
+
+APP_SOURCE_LST += ../CDD/_Proprietary_MTCI/Smmgr/Fault_Injection_SafetyMechanism.c
+
+APP_SOURCE_LST += ../CDD/_Proprietary_MTCI/Smmgr/Renesas_Temp.c
+
+APP_SOURCE_LST += $(foreach component, $(COMPONENTS_CDD), ../CDD/_Proprietary_MOBIS/$(component)/*.c)
+
+APP_SOURCE_LST += $(foreach component, $(COMPONENTS_CDD), ../CDD/_Proprietary_MTCI/$(component)/*.c)
+
+ 

Customer/MOBIS/PRK3_(ADAS_Parking3)/Issue/External IRQ/20260414_port_sample/port_sample_application/sample_application/V4H/19_11/config/App_PORT_V4H_Sample.arxml

@@ -0,0 +1,657 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<AUTOSAR xmlns="http://autosar.org/schema/r4.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://autosar.org/schema/r4.0 AUTOSAR_00049.xsd">
+  <AR-PACKAGES>
+    <AR-PACKAGE>
+      <SHORT-NAME>ActiveEcuC</SHORT-NAME>
+      <ELEMENTS>
+        <ECUC-MODULE-CONFIGURATION-VALUES UUID="4d74860a-9c22-4cbf-b7ea-fcc9fba237a1">
+          <SHORT-NAME>Port</SHORT-NAME>
+          <ADMIN-DATA>
+            <SDGS>
+              <SDG GID="DV:CfgPostBuild">
+                <SD GID="DV:postBuildVariantSupport">false</SD>
+              </SDG>
+            </SDGS>
+          </ADMIN-DATA>
+          <DEFINITION-REF DEST="ECUC-MODULE-DEF">/Renesas/EcucDefs_Port/Port</DEFINITION-REF>
+          <IMPLEMENTATION-CONFIG-VARIANT>VARIANT-POST-BUILD</IMPLEMENTATION-CONFIG-VARIANT>
+          <MODULE-DESCRIPTION-REF DEST="BSW-IMPLEMENTATION">/Renesas/BswModuleDescriptions_Port/Port_Impl</MODULE-DESCRIPTION-REF>
+          <CONTAINERS>
+            <ECUC-CONTAINER-VALUE UUID="7e241d0f-1928-474a-9485-0f4f186c31a5">
+              <SHORT-NAME>PortGeneral</SHORT-NAME>
+              <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral</DEFINITION-REF>
+              <PARAMETER-VALUES>
+                <ECUC-NUMERICAL-PARAM-VALUE>
+                  <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortCriticalSectionProtection</DEFINITION-REF>
+                  <VALUE>true</VALUE>
+                </ECUC-NUMERICAL-PARAM-VALUE>
+                <ECUC-NUMERICAL-PARAM-VALUE>
+                  <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortDevErrorDetect</DEFINITION-REF>
+                  <VALUE>false</VALUE>
+                </ECUC-NUMERICAL-PARAM-VALUE>
+                <ECUC-TEXTUAL-PARAM-VALUE>
+                  <DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortDeviceName</DEFINITION-REF>
+                  <VALUE>V4H</VALUE>
+                </ECUC-TEXTUAL-PARAM-VALUE>
+                <ECUC-NUMERICAL-PARAM-VALUE>
+                  <DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortMaxMode</DEFINITION-REF>
+                  <VALUE>5</VALUE>
+                </ECUC-NUMERICAL-PARAM-VALUE>
+                <ECUC-NUMERICAL-PARAM-VALUE>
+                  <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortSetPinDefaultDirectionApi</DEFINITION-REF>
+                  <VALUE>true</VALUE>
+                </ECUC-NUMERICAL-PARAM-VALUE>
+                <ECUC-NUMERICAL-PARAM-VALUE>
+                  <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortSetPinDirectionApi</DEFINITION-REF>
+                  <VALUE>true</VALUE>
+                </ECUC-NUMERICAL-PARAM-VALUE>
+                <ECUC-NUMERICAL-PARAM-VALUE>
+                  <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortSetPinModeApi</DEFINITION-REF>
+                  <VALUE>false</VALUE>
+                </ECUC-NUMERICAL-PARAM-VALUE>
+                <ECUC-NUMERICAL-PARAM-VALUE>
+                  <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortSetToDioAltModeApi</DEFINITION-REF>
+                  <VALUE>true</VALUE>
+                </ECUC-NUMERICAL-PARAM-VALUE>
+                <ECUC-NUMERICAL-PARAM-VALUE>
+                  <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortVersionCheckExternalModules</DEFINITION-REF>
+                  <VALUE>true</VALUE>
+                </ECUC-NUMERICAL-PARAM-VALUE>
+                <ECUC-NUMERICAL-PARAM-VALUE>
+                  <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortVersionInfoApi</DEFINITION-REF>
+                  <VALUE>true</VALUE>
+                </ECUC-NUMERICAL-PARAM-VALUE>
+                <ECUC-NUMERICAL-PARAM-VALUE>
+                  <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortFUSEMonitoringApi</DEFINITION-REF>
+                  <VALUE>true</VALUE>
+                </ECUC-NUMERICAL-PARAM-VALUE>
+                <ECUC-NUMERICAL-PARAM-VALUE>
+                  <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortUnintendedModuleStopCheck</DEFINITION-REF>
+                  <VALUE>false</VALUE>
+                </ECUC-NUMERICAL-PARAM-VALUE>
+                <ECUC-NUMERICAL-PARAM-VALUE>
+                  <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortExclusiveControl</DEFINITION-REF>
+                  <VALUE>false</VALUE>
+                </ECUC-NUMERICAL-PARAM-VALUE>
+                <ECUC-TEXTUAL-PARAM-VALUE>
+                  <DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortExclusiveSelection</DEFINITION-REF>
+                  <VALUE>MFISLCKR0</VALUE>
+                </ECUC-TEXTUAL-PARAM-VALUE>
+                <ECUC-NUMERICAL-PARAM-VALUE>
+                  <DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortExclusiveTimeout</DEFINITION-REF>
+                  <VALUE>256410</VALUE>
+                </ECUC-NUMERICAL-PARAM-VALUE>
+                <ECUC-NUMERICAL-PARAM-VALUE>
+                  <DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortDomainId</DEFINITION-REF>
+                  <VALUE>0</VALUE>
+                </ECUC-NUMERICAL-PARAM-VALUE>
+                <ECUC-NUMERICAL-PARAM-VALUE>
+                  <DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortOTPMON0ExpectedValue</DEFINITION-REF>
+                  <VALUE>0</VALUE>
+                </ECUC-NUMERICAL-PARAM-VALUE>
+                <ECUC-NUMERICAL-PARAM-VALUE>
+                  <DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortGeneral/PortOTPMON3ExpectedValue</DEFINITION-REF>
+                  <VALUE>0</VALUE>
+                </ECUC-NUMERICAL-PARAM-VALUE>
+              </PARAMETER-VALUES>
+            </ECUC-CONTAINER-VALUE>
+            <ECUC-CONTAINER-VALUE UUID="46776dce-83b4-4d47-b826-08eec7bdef39">
+              <SHORT-NAME>PortConfigSet</SHORT-NAME>
+              <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet</DEFINITION-REF>
+              <SUB-CONTAINERS>
+                <ECUC-CONTAINER-VALUE UUID="612993b3-c328-4a3b-aa19-73717b79f672">
+                  <SHORT-NAME>PortContainer</SHORT-NAME>
+                  <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer</DEFINITION-REF>
+                  <PARAMETER-VALUES>
+                    <ECUC-NUMERICAL-PARAM-VALUE>
+                      <DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortNumberOfPortPins</DEFINITION-REF>
+                      <VALUE>1</VALUE>
+                    </ECUC-NUMERICAL-PARAM-VALUE>
+                  </PARAMETER-VALUES>
+                  <SUB-CONTAINERS>
+                    <ECUC-CONTAINER-VALUE UUID="04860047-0150-4c29-841a-837dd1340114">
+                      <SHORT-NAME>PortPin</SHORT-NAME>
+                      <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>
+                      <PARAMETER-VALUES>
+                        <ECUC-TEXTUAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>
+                          <VALUE>PORT_PIN_IN</VALUE>
+                        </ECUC-TEXTUAL-PARAM-VALUE>
+                        <ECUC-NUMERICAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>
+                          <VALUE>false</VALUE>
+                        </ECUC-NUMERICAL-PARAM-VALUE>
+                        <ECUC-NUMERICAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>
+                          <VALUE>1</VALUE>
+                        </ECUC-NUMERICAL-PARAM-VALUE>
+                        <ECUC-TEXTUAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinInitialMode</DEFINITION-REF>
+                          <VALUE>PORT_PIN_MODE_DIO</VALUE>
+                        </ECUC-TEXTUAL-PARAM-VALUE>
+                        <ECUC-TEXTUAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>
+                          <VALUE>PORT_PIN_LEVEL_LOW</VALUE>
+                        </ECUC-TEXTUAL-PARAM-VALUE>
+                        <ECUC-TEXTUAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>
+                          <VALUE>PORT_PIN_MODE_DIO</VALUE>
+                        </ECUC-TEXTUAL-PARAM-VALUE>
+                        <ECUC-NUMERICAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortContainer/PortPin/PortPinModeChangeable</DEFINITION-REF>
+                          <VALUE>false</VALUE>
+                        </ECUC-NUMERICAL-PARAM-VALUE>
+                      </PARAMETER-VALUES>
+                    </ECUC-CONTAINER-VALUE>
+                  </SUB-CONTAINERS>
+                </ECUC-CONTAINER-VALUE>
+                <ECUC-CONTAINER-VALUE UUID="54b516a1-6b36-43ac-a927-ee66a37f5aca">
+                  <SHORT-NAME>PortFilterGroupConfig</SHORT-NAME>
+                  <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig</DEFINITION-REF>
+                  <SUB-CONTAINERS>
+                    <ECUC-CONTAINER-VALUE UUID="1b7e2b5a-9d2f-4bdc-898d-e1764999e363">
+                      <SHORT-NAME>PortChatteringFilterGroup7</SHORT-NAME>
+                      <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7</DEFINITION-REF>
+                      <PARAMETER-VALUES>
+                        <ECUC-NUMERICAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortFilterClockFrequency</DEFINITION-REF>
+                          <VALUE>0</VALUE>
+                        </ECUC-NUMERICAL-PARAM-VALUE>
+                      </PARAMETER-VALUES>
+                      <SUB-CONTAINERS>
+                        <ECUC-CONTAINER-VALUE UUID="2375d5f9-65a5-4048-9d31-247dda319abc">
+                          <SHORT-NAME>PortChatteringFilterInput0</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput0</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput0/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="f847a1e5-2ee7-4120-9b16-cfa76827c783">
+                          <SHORT-NAME>PortChatteringFilterInput1</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput1</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput1/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="21c1bba4-70aa-4815-a1d0-8fbe4638ea9d">
+                          <SHORT-NAME>PortChatteringFilterInput2</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput2</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput2/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="eb662a9d-f105-4830-b90e-2af81bc3d989">
+                          <SHORT-NAME>PortChatteringFilterInput3</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput3</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput3/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="3588012e-d2bf-4362-8171-48cad94fb4d3">
+                          <SHORT-NAME>PortChatteringFilterInput4</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput4</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput4/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="5e1c0b27-2537-49c3-baee-0ef532c1bd9c">
+                          <SHORT-NAME>PortChatteringFilterInput5</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput5</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput5/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="c3be051c-ded0-4607-920c-2af367ee7643">
+                          <SHORT-NAME>PortChatteringFilterInput6</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput6</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput6/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="e1d9a21a-cf68-42af-8a8e-dfbce2b1ee81">
+                          <SHORT-NAME>PortChatteringFilterInput7</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput7</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput7/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="23c07741-1127-43d2-bece-a27102ef0cfd">
+                          <SHORT-NAME>PortChatteringFilterInput8</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput8</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput8/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="2c91c30b-374b-48cc-a851-520a4ff05f30">
+                          <SHORT-NAME>PortChatteringFilterInput9</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput9</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput9/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="50191ce8-2c2d-423e-9d18-71f58a233c23">
+                          <SHORT-NAME>PortChatteringFilterInput10</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput10</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput10/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="a4c08f19-29f2-4ca8-9172-56ab68b3065b">
+                          <SHORT-NAME>PortChatteringFilterInput11</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput11</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput11/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="cd1badf4-9316-4473-b5cd-21fe5b23f5a0">
+                          <SHORT-NAME>PortChatteringFilterInput12</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput12</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput12/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="4f53a519-95c3-4ff9-8b08-913c3dc9ae4d">
+                          <SHORT-NAME>PortChatteringFilterInput13</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput13</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput13/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="150f23eb-d250-4ba4-99a9-ca5450ac1c4d">
+                          <SHORT-NAME>PortChatteringFilterInput14</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput14</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput14/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="d215d6bd-3985-48ff-8859-e3e9703867ad">
+                          <SHORT-NAME>PortChatteringFilterInput15</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput15</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput15/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="e271b573-425a-414d-baa8-8b66410eccbc">
+                          <SHORT-NAME>PortChatteringFilterInput16</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput16</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput16/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="8986d85d-7225-4335-bb6d-d043d07f45cc">
+                          <SHORT-NAME>PortChatteringFilterInput17</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput17</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput17/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="269e8bb0-d6bb-494f-9213-6aeff3e654a8">
+                          <SHORT-NAME>PortChatteringFilterInput18</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput18</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput18/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="9fc0aaba-569b-411b-a4da-962a39dd51d8">
+                          <SHORT-NAME>PortChatteringFilterInput19</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput19</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput19/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="47df979f-b22d-4596-a909-3ed5a5136e83">
+                          <SHORT-NAME>PortChatteringFilterInput20</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput20</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput20/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="e12676c8-d783-492f-9f17-61f95a107ce7">
+                          <SHORT-NAME>PortChatteringFilterInput21</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput21</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput21/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="250a86e7-c6ec-4c72-a34e-6305f7df989c">
+                          <SHORT-NAME>PortChatteringFilterInput22</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput22</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput22/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="dcdb0390-10dc-47ec-bdc9-439fcff1410a">
+                          <SHORT-NAME>PortChatteringFilterInput23</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput23</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput23/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="53f0ae29-fcd9-448c-afc5-613c9f4efb76">
+                          <SHORT-NAME>PortChatteringFilterInput24</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput24</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput24/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="a44a91c7-4dca-4844-becc-ce273b6f879e">
+                          <SHORT-NAME>PortChatteringFilterInput25</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput25</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput25/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="e800ff55-ee56-44d9-a82d-e5b449e8bfe1">
+                          <SHORT-NAME>PortChatteringFilterInput26</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput26</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput26/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="85c78e2d-6462-4841-be3d-b1650365155b">
+                          <SHORT-NAME>PortChatteringFilterInput27</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput27</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput27/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="33687cb6-e9f3-4386-afb0-2de179ee04c6">
+                          <SHORT-NAME>PortChatteringFilterInput28</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput28</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput28/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="8b8c8382-4093-4e88-bb60-c2455f79089e">
+                          <SHORT-NAME>PortChatteringFilterInput29</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput29</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput29/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="341aa1d5-d736-49c8-86aa-e682bd8d32e7">
+                          <SHORT-NAME>PortChatteringFilterInput30</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput30</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput30/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="a627aafb-5026-4207-b0df-0c51086429d5">
+                          <SHORT-NAME>PortChatteringFilterInput31</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput31</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup7/PortChatteringFilterInput31/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                      </SUB-CONTAINERS>
+                    </ECUC-CONTAINER-VALUE>
+                    <ECUC-CONTAINER-VALUE UUID="a7196c2e-5737-4832-810e-e6aa61218897">
+                      <SHORT-NAME>PortChatteringFilterGroup1</SHORT-NAME>
+                      <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup1</DEFINITION-REF>
+                      <PARAMETER-VALUES>
+                        <ECUC-NUMERICAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-INTEGER-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup1/PortFilterClockFrequency</DEFINITION-REF>
+                          <VALUE>0</VALUE>
+                        </ECUC-NUMERICAL-PARAM-VALUE>
+                      </PARAMETER-VALUES>
+                      <SUB-CONTAINERS>
+                        <ECUC-CONTAINER-VALUE UUID="f2e737a6-418b-44d9-a5e2-398d16094e9d">
+                          <SHORT-NAME>PortChatteringFilterInput24</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup1/PortChatteringFilterInput24</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup1/PortChatteringFilterInput24/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                        <ECUC-CONTAINER-VALUE UUID="95884e04-d78f-4bcb-962c-d0f8272581a8">
+                          <SHORT-NAME>PortChatteringFilterInput25</SHORT-NAME>
+                          <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup1/PortChatteringFilterInput25</DEFINITION-REF>
+                          <PARAMETER-VALUES>
+                            <ECUC-NUMERICAL-PARAM-VALUE>
+                              <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortFilterGroupConfig/PortChatteringFilterGroup1/PortChatteringFilterInput25/PortChatteringFilterInputOption</DEFINITION-REF>
+                              <VALUE>false</VALUE>
+                            </ECUC-NUMERICAL-PARAM-VALUE>
+                          </PARAMETER-VALUES>
+                        </ECUC-CONTAINER-VALUE>
+                      </SUB-CONTAINERS>
+                    </ECUC-CONTAINER-VALUE>
+                  </SUB-CONTAINERS>
+                </ECUC-CONTAINER-VALUE>
+                <ECUC-CONTAINER-VALUE UUID="b007c727-1d4d-4a45-8c83-ec9e26c6d7a5">
+                  <SHORT-NAME>PortGroup1</SHORT-NAME>
+                  <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1</DEFINITION-REF>
+                  <SUB-CONTAINERS>
+                    <ECUC-CONTAINER-VALUE UUID="cc5ae25d-29b0-437c-ab89-dc1c829a191c">
+                      <SHORT-NAME>PortPin24</SHORT-NAME>
+                      <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24</DEFINITION-REF>
+                      <PARAMETER-VALUES>
+                        <ECUC-NUMERICAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinDioAltModeChangeable</DEFINITION-REF>
+                          <VALUE>false</VALUE>
+                        </ECUC-NUMERICAL-PARAM-VALUE>
+                        <ECUC-TEXTUAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinDirection</DEFINITION-REF>
+                          <VALUE>PORT_PIN_IN</VALUE>
+                        </ECUC-TEXTUAL-PARAM-VALUE>
+                        <ECUC-NUMERICAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinDirectionChangeable</DEFINITION-REF>
+                          <VALUE>false</VALUE>
+                        </ECUC-NUMERICAL-PARAM-VALUE>
+                        <ECUC-TEXTUAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinInitialMode</DEFINITION-REF>
+                          <VALUE>INTERRUPT</VALUE>
+                        </ECUC-TEXTUAL-PARAM-VALUE>
+                        <ECUC-TEXTUAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinLevelValue</DEFINITION-REF>
+                          <VALUE>PORT_PIN_LEVEL_LOW</VALUE>
+                        </ECUC-TEXTUAL-PARAM-VALUE>
+                        <ECUC-NUMERICAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinModeChangeable</DEFINITION-REF>
+                          <VALUE>false</VALUE>
+                        </ECUC-NUMERICAL-PARAM-VALUE>
+                        <ECUC-NUMERICAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinPullOption</DEFINITION-REF>
+                          <VALUE>false</VALUE>
+                        </ECUC-NUMERICAL-PARAM-VALUE>
+                        <ECUC-NUMERICAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinPullControl</DEFINITION-REF>
+                          <VALUE>false</VALUE>
+                        </ECUC-NUMERICAL-PARAM-VALUE>
+                        <ECUC-TEXTUAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinPolaritySelect</DEFINITION-REF>
+                          <VALUE>PORT_PIN_NEGATIVE_LOGIC</VALUE>
+                        </ECUC-TEXTUAL-PARAM-VALUE>
+                        <ECUC-TEXTUAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinSensitiveInterrupt</DEFINITION-REF>
+                          <VALUE>PORT_PIN_EDGE_SENSITIVE</VALUE>
+                        </ECUC-TEXTUAL-PARAM-VALUE>
+                        <ECUC-TEXTUAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinDetectionInterrupt</DEFINITION-REF>
+                          <VALUE>PORT_PIN_ONE_EDGE</VALUE>
+                        </ECUC-TEXTUAL-PARAM-VALUE>
+                        <ECUC-TEXTUAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin24/PortPinOutDataSelect</DEFINITION-REF>
+                          <VALUE>PORT_PIN_OUTDT</VALUE>
+                        </ECUC-TEXTUAL-PARAM-VALUE>
+                      </PARAMETER-VALUES>
+                    </ECUC-CONTAINER-VALUE>
+                    <ECUC-CONTAINER-VALUE UUID="c638466a-3e06-4543-b2ad-2d61195ce8e8">
+                      <SHORT-NAME>PortPin25</SHORT-NAME>
+                      <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25</DEFINITION-REF>
+                      <PARAMETER-VALUES>
+                        <ECUC-NUMERICAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinDioAltModeChangeable</DEFINITION-REF>
+                          <VALUE>false</VALUE>
+                        </ECUC-NUMERICAL-PARAM-VALUE>
+                        <ECUC-TEXTUAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinDirection</DEFINITION-REF>
+                          <VALUE>PORT_PIN_IN</VALUE>
+                        </ECUC-TEXTUAL-PARAM-VALUE>
+                        <ECUC-NUMERICAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinDirectionChangeable</DEFINITION-REF>
+                          <VALUE>false</VALUE>
+                        </ECUC-NUMERICAL-PARAM-VALUE>
+                        <ECUC-TEXTUAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinInitialMode</DEFINITION-REF>
+                          <VALUE>INTERRUPT</VALUE>
+                        </ECUC-TEXTUAL-PARAM-VALUE>
+                        <ECUC-TEXTUAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinLevelValue</DEFINITION-REF>
+                          <VALUE>PORT_PIN_LEVEL_LOW</VALUE>
+                        </ECUC-TEXTUAL-PARAM-VALUE>
+                        <ECUC-NUMERICAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinModeChangeable</DEFINITION-REF>
+                          <VALUE>false</VALUE>
+                        </ECUC-NUMERICAL-PARAM-VALUE>
+                        <ECUC-NUMERICAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinPullOption</DEFINITION-REF>
+                          <VALUE>false</VALUE>
+                        </ECUC-NUMERICAL-PARAM-VALUE>
+                        <ECUC-NUMERICAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-BOOLEAN-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinPullControl</DEFINITION-REF>
+                          <VALUE>false</VALUE>
+                        </ECUC-NUMERICAL-PARAM-VALUE>
+                        <ECUC-TEXTUAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinPolaritySelect</DEFINITION-REF>
+                          <VALUE>PORT_PIN_POSITIVE_LOGIC</VALUE>
+                        </ECUC-TEXTUAL-PARAM-VALUE>
+                        <ECUC-TEXTUAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinSensitiveInterrupt</DEFINITION-REF>
+                          <VALUE>PORT_PIN_EDGE_SENSITIVE</VALUE>
+                        </ECUC-TEXTUAL-PARAM-VALUE>
+                        <ECUC-TEXTUAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinDetectionInterrupt</DEFINITION-REF>
+                          <VALUE>PORT_PIN_ONE_EDGE</VALUE>
+                        </ECUC-TEXTUAL-PARAM-VALUE>
+                        <ECUC-TEXTUAL-PARAM-VALUE>
+                          <DEFINITION-REF DEST="ECUC-ENUMERATION-PARAM-DEF">/Renesas/EcucDefs_Port/Port/PortConfigSet/PortGroup1/PortPin25/PortPinOutDataSelect</DEFINITION-REF>
+                          <VALUE>PORT_PIN_OUTDT</VALUE>
+                        </ECUC-TEXTUAL-PARAM-VALUE>
+                      </PARAMETER-VALUES>
+                    </ECUC-CONTAINER-VALUE>
+                  </SUB-CONTAINERS>
+                </ECUC-CONTAINER-VALUE>
+              </SUB-CONTAINERS>
+            </ECUC-CONTAINER-VALUE>
+            <ECUC-CONTAINER-VALUE UUID="f2637182-3b6e-4973-99b5-96df189734f5">
+              <SHORT-NAME>PortDemEventParameterRefs</SHORT-NAME>
+              <DEFINITION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/Renesas/EcucDefs_Port/Port/PortDemEventParameterRefs</DEFINITION-REF>
+              <REFERENCE-VALUES>
+                <ECUC-REFERENCE-VALUE>
+                  <DEFINITION-REF DEST="ECUC-REFERENCE-DEF">/Renesas/EcucDefs_Port/Port/PortDemEventParameterRefs/PORT_E_FUSE_MONITORING_FAILURE</DEFINITION-REF>
+                  <VALUE-REF DEST="ECUC-CONTAINER-VALUE">/ActiveEcuC/Dem/DemConfigSet/DemEventParameter</VALUE-REF>
+                </ECUC-REFERENCE-VALUE>
+                <ECUC-REFERENCE-VALUE>
+                  <DEFINITION-REF DEST="ECUC-REFERENCE-DEF">/Renesas/EcucDefs_Port/Port/PortDemEventParameterRefs/PORT_E_UNINTENDED_MODULE_STOP_FAILURE</DEFINITION-REF>
+                  <VALUE-REF DEST="ECUC-CONTAINER-VALUE">/ActiveEcuC/Dem/DemConfigSet/DemEventParameter_001</VALUE-REF>
+                </ECUC-REFERENCE-VALUE>
+                <ECUC-REFERENCE-VALUE>
+                  <DEFINITION-REF DEST="ECUC-REFERENCE-DEF">/Renesas/EcucDefs_Port/Port/PortDemEventParameterRefs/PORT_E_GET_CONTROL_FAILURE</DEFINITION-REF>
+                  <VALUE-REF DEST="ECUC-CONTAINER-VALUE">/ActiveEcuC/Dem/DemConfigSet/DemEventParameter_002</VALUE-REF>
+                </ECUC-REFERENCE-VALUE>
+              </REFERENCE-VALUES>
+            </ECUC-CONTAINER-VALUE>
+          </CONTAINERS>
+        </ECUC-MODULE-CONFIGURATION-VALUES>
+      </ELEMENTS>
+    </AR-PACKAGE>
+  </AR-PACKAGES>
+</AUTOSAR>

Customer/MOBIS/PRK3_(ADAS_Parking3)/Issue/External IRQ/20260414_port_sample/port_sample_application/sample_application/V4H/19_11/include/Port_Cfg.h

@@ -0,0 +1,306 @@
+/*============================================================================*/
+/* Project      = AUTOSAR Renesas MCAL Components                             */
+/* Module       = Port_Cfg.h                                                  */
+/*============================================================================*/
+/*                                  COPYRIGHT                                 */
+/*============================================================================*/
+/* Copyright(c) 2026 Renesas Electronics Corporation.                         */
+/*============================================================================*/
+/* Purpose:                                                                   */
+/* This file contains pre-compile time parameters.                            */
+/* AUTOMATICALLY GENERATED FILE - DO NOT EDIT                                 */
+/*                                                                            */
+/*============================================================================*/
+/*                                                                            */
+/* Unless otherwise agreed upon in writing between your company and           */
+/* Renesas Electronics Corporation the following shall apply!                 */
+/*                                                                            */
+/* Warranty Disclaimer                                                        */
+/*                                                                            */
+/* There is no warranty of any kind whatsoever granted by Renesas. Any        */
+/* warranty is expressly disclaimed and excluded by Renesas, either expressed */
+/* or implied, including but not limited to those for non-infringement of     */
+/* intellectual property, merchantability and/or fitness for the particular   */
+/* purpose.                                                                   */
+/*                                                                            */
+/* Renesas shall not have any obligation to maintain, service or provide bug  */
+/* fixes for the supplied Product(s) and/or the Application.                  */
+/*                                                                            */
+/* Each User is solely responsible for determining the appropriateness of     */
+/* using the Product(s) and assumes all risks associated with its exercise    */
+/* of rights under this Agreement, including, but not limited to the risks    */
+/* and costs of program errors, compliance with applicable laws, damage to    */
+/* or loss of data, programs or equipment, and unavailability or              */
+/* interruption of operations.                                                */
+/*                                                                            */
+/* Limitation of Liability                                                    */
+/*                                                                            */
+/* In no event shall Renesas be liable to the User for any incidental,        */
+/* consequential, indirect, or punitive damage (including but not limited     */
+/* to lost profits) regardless of whether such liability is based on breach   */
+/* of contract, tort, strict liability, breach of warranties, failure of      */
+/* essential purpose or otherwise and even if advised of the possibility of   */
+/* such damages. Renesas shall not be liable for any services or products     */
+/* provided by third party vendors, developers or consultants identified or   */
+/* referred to the User by Renesas in connection with the Product(s) and/or   */
+/* the Application.                                                           */
+/*                                                                            */
+/*============================================================================*/
+/* Environment:                                                               */
+/*              Devices:        V4H                                           */
+/*============================================================================*/
+
+
+/*******************************************************************************
+**                      Revision Control History                              **
+*******************************************************************************/
+
+
+
+/*******************************************************************************
+**                      Generation Tool Version                               **
+*******************************************************************************/
+/*                                                                            */
+/* TOOL VERSION:  PortRCAR.dll version: 1.0.16, MCALConfGen.exe version: 1.2.3 */
+/*                                                                            */
+
+
+/*******************************************************************************
+**                      Input File                                            **
+*******************************************************************************/
+/*
+ * INPUT FILE:    C:\Users\a5162358\Documents\V4H\20250829_V4H_MCAL_training\RTM8RC779GCMCL5DA0JCDRE\rel\modules\port\sample_application\V4H\19_11\config\App_PORT_V4H_Sample.arxml
+ *                C:\Users\a5162358\Documents\V4H\20250829_V4H_MCAL_training\RTM8RC779GCMCL5DA0JCDRE\rel\modules\port\generator\V4H\R1911_PORT_V4H_BSWMDT.arxml
+ *                C:\Users\a5162358\Documents\V4H\20250829_V4H_MCAL_training\RTM8RC779GCMCL5DA0JCDRE\rel\common\generic\stubs\19_11\Dem\xml\Dem_Port.arxml
+ *                C:\Users\a5162358\Documents\V4H\20250829_V4H_MCAL_training\RTM8RC779GCMCL5DA0JCDRE\rel\V4H\common_family\generator\arm\Sample_Application_V4H.trxml
+ * GENERATED ON:  14 Apr 2026 - 03:10:33
+ */
+
+
+#ifndef PORT_CFG_H
+#define PORT_CFG_H
+
+
+/*******************************************************************************
+**                      Include Section                                       **
+*******************************************************************************/
+
+/*******************************************************************************
+**                      MISRA C Rule Violations                               **
+*******************************************************************************/
+/* 1. MISRA C RULE VIOLATION:                                                 */
+/* Message       : (7:0791) [U] Macro identifier does not differ from other   */
+/*                 macro identifier(s) (e.g. '') within the specified         */
+/*                 number of significant characters.                          */
+/* Rule          : MISRA-C:2012 Rule-5.4                                      */
+/* Justification : This macro identifier is following AUTOSAR standard rule   */
+/*                 (Symbolic Name or Published Macro's name),                 */
+/*                 so this is accepted.                                       */
+/* Verification  : However, part of the code is verified manually             */
+/*                 and it is not having any impact.                           */
+/* Reference     : Look for START Msg(7:0791)-1 and                           */
+/*                 END Msg(7:0791)-1 tags in the code.                        */
+/******************************************************************************/
+
+
+
+/*******************************************************************************
+**                      Version Information                                   **
+*******************************************************************************/
+#define PORT_CFG_AR_RELEASE_MAJOR_VERSION               4U
+#define PORT_CFG_AR_RELEASE_MINOR_VERSION               5U
+#define PORT_CFG_AR_RELEASE_REVISION_VERSION            0U
+#define PORT_CFG_SW_MAJOR_VERSION                       1U
+#define PORT_CFG_SW_MINOR_VERSION                       1U
+
+/*******************************************************************************
+**                      Common Published Information                          **
+*******************************************************************************/
+#define PORT_AR_RELEASE_MAJOR_VERSION_VALUE             4U
+#define PORT_AR_RELEASE_MINOR_VERSION_VALUE             5U
+#define PORT_AR_RELEASE_REVISION_VERSION_VALUE          0U
+#define PORT_SW_MAJOR_VERSION_VALUE                     1U
+#define PORT_SW_MINOR_VERSION_VALUE                     1U
+#define PORT_SW_PATCH_VERSION_VALUE                     12U
+#define PORT_VENDOR_ID_VALUE                            59U
+#define PORT_MODULE_ID_VALUE                            124U
+
+/*******************************************************************************
+**                      Global Symbols                                        **
+*******************************************************************************/
+/* The address of FILCLKSEL8 register to implement Unintended Module Stop     */
+/*   Check                                                                    */
+#define PORT_FILCLKSEL8_REG_ADDR                        (uint32)0xE60681ACUL
+
+/* The address of MODSEL8 register to implement Unintended Module Stop Check */
+#define PORT_MODSEL8_REG_ADDR                           (uint32)0xE6068100UL
+
+/* Instance ID of the PORT Driver Component */
+#define PORT_INSTANCE_ID_VALUE                          0U
+
+/* The DEM failure of Port_ExclusiveControl API */
+#define PORT_E_GET_CONTROL_FAILURE                      \
+                                 DemConf_DemEventParameter_DemEventParameter_002
+
+/* The DEM failure of Port_FUSEMonitoring API */
+#define PORT_E_FUSE_MONITORING_FAILURE                  \
+                                     DemConf_DemEventParameter_DemEventParameter
+
+/* The DEM failure of Port_UnintendedModuleStopCheck API */
+#define PORT_E_UNINTENDED_MODULE_STOP_FAILURE           \
+                                 DemConf_DemEventParameter_DemEventParameter_001
+
+/* Enables/Disables Port_GetVersionInfo API */
+#define PORT_VERSION_INFO_API                           STD_ON
+
+/* Enables/Disables Port_SetPinDirection API */
+#define PORT_SET_PIN_DIRECTION_API                      STD_ON
+
+/* Enables/Disables Port_SetPinDefaultDirection API */
+#define PORT_SET_PIN_DEFAULT_DIRECTION_API              STD_ON
+
+/* Enables/Disables Port_SetToDioMode and Port_SetToAlternateMode API */
+#define PORT_SET_TO_DIO_ALT_MODE_API                    STD_ON
+
+/* Enables/Disables Port_SetPinMode API */
+#define PORT_SET_PIN_MODE_API                           STD_OFF
+
+/* Enables/Disables PortFUSEMonitoringApi */
+#define PORT_FUSE_MONITORING_API                        STD_ON
+
+/* Enables/Disables Port_UnintendedModuleStopCheck API */
+#define PORT_UNINTENDED_MODULE_STOP_CHECK               STD_OFF
+
+/* Enables/Disables Development error detect */
+#define PORT_DEV_ERROR_DETECT                           STD_OFF
+
+/* Enable/Disable the enter/exit critical section functionality */
+#define PORT_CRITICAL_SECTION_PROTECTION                STD_ON
+
+/* Pre-compile option to enable or disable version check of inter-module      */
+/*   dependencies                                                             */
+#define PORT_VERSION_CHECK_EXT_MODULES                  STD_ON
+
+/* Enables/Disables Dem error detect */
+#define PORT_DEM_ERROR_DETECT                           STD_ON
+
+/* Indicates the number of Alternative Modes */
+#define PORT_MAX_MODE                                   (uint8)0x05
+
+/* Enables/Disables Port_ExclusiveControl */
+#define PORT_EXCLUSIVE_CONTROL                          STD_OFF
+
+/* Availability of numeric port groups */
+#define PORT_NUM_PORT_GROUPS_AVAILABLE                  STD_ON
+
+/* Availability of numeric chattering filter groups */
+#define PORT_FILONOFF_REG_CONFIG                        STD_ON
+
+/* Availability of numeric port safe state groups */
+#define PORT_SFS_REG_CONFIG                             STD_OFF
+
+/* Availability of numeric module select register */
+#define PORT_MODSEL_REG_CONFIG                          STD_OFF
+
+/* Availability of numeric bus domain protection */
+#define PORT_DMPR_REGS_AVAILABLE                        STD_OFF
+
+/* Enables/Disables Port_Ecm API */
+#define PORT_SUPPORT_ECM                                STD_OFF
+
+/* Enables/Disables feautre DNF */
+#define PORT_DNF_GROUPS_AVAILABLE                       STD_OFF
+
+/* Address of MFISLCKR registers to implement exclusive control for PFC/GPIO  */
+/*   Module register                                                          */
+#define PORT_MFISLCKR_REG_ADDR                          (uint32)0xE62600C0UL
+
+/* The User Base Address of PFC/GPIO module which configured */
+#define PORT_USER_BASE_ADDRESS1                         (uint32)0xE6050000UL
+
+/* The User Base Address of PFC/GPIO module which configured */
+#define PORT_USER_BASE_ADDRESS2                         (uint32)0xE6060000UL
+
+/* Timeout Value for exclusive control */
+#define PORT_EXCLUSIVE_CONTROL_TIMEOUT                  (uint32)0x0003E99AUL
+
+/* The Total number of FILONOFF registers configured */
+#define PORT_NUM_FILONOFF_REGS                          (uint8)0x02U
+
+/* The Total number of PSER registers configured */
+#define PORT_NUM_SFS_REGS                               (uint8)0x00U
+
+/* The Total number of Groups which configured */
+#define PORT_NUM_GROUP_REGS                             (uint8)0x01U
+
+/* The Total number of function PFC registers configured */
+#define PORT_NUM_PFC_REGS                               (uint8)0x03U
+
+/* The Total number of DMPR registers configured */
+#define PORT_NUM_DMPR_REGS                              (uint8)0x00U
+
+/* The Total number of IPSR registers configured */
+#define PORT_NUM_IPSR_REGS                              (uint8)0x00U
+
+/* The Total number of GPIO registers configured */
+#define PORT_NUM_GPIO_REGS                              (uint8)0x09U
+
+/* The Total number of INOUTSEL registers configured */
+#define PORT_NUM_INOUTSEL_REGS                          (uint8)0x01U
+
+/* The Total number of MODSEL registers configured */
+#define PORT_NUM_MODSEL_REGS                            (uint8)0x00U
+
+/* The Total number of Pin Direction Changeable configured */
+#define PORT_NUM_PINS_DIR_CHANGEABLE                    (uint8)0x00U
+
+/* The Total number of Pin Dio Alt Changeable configured */
+#define PORT_NUM_PINS_DIO_ALT_CHANGEABLE                (uint8)0x00U
+
+/* The Total number of Pin mode changeable configured */
+#define PORT_NUM_PINS_MODE_CHANGEABLE                   (uint8)0x00U
+
+/* The following constant contains total number of pins configured */
+#define PORT_TOTAL_NUMBER_OF_PINS                       (uint8)0x02U
+
+/* The total number register of API Port_FUSEMonitoring */
+#define PORT_MAX_NO_FUSE_REG                            (uint8)0x02U
+
+
+/* Port Pin Handles */
+#define PortConf_PortGroup1_PortPin24                   (Port_PinType)0
+/* MISRA Violation: START Msg(7:0791)-1 */
+#define PortConf_PortGroup1_PortPin25                   (Port_PinType)1
+/* END Msg(7:0791)-1 */
+
+
+
+/* Configuration Set Handles */
+#define PortConfigSet                                   \
+                                                     (&Port_GstConfiguration[0])
+
+/*******************************************************************************
+**                      Global Data Types                                     **
+*******************************************************************************/
+
+
+
+/*******************************************************************************
+**                      Global Data                                           **
+*******************************************************************************/
+
+
+
+/*******************************************************************************
+**                      Function Prototypes                                   **
+*******************************************************************************/
+
+
+
+#endif /* PORT_CFG_H */
+
+
+/*******************************************************************************
+**                      End of File                                           **
+*******************************************************************************/
+

Customer/MOBIS/PRK3_(ADAS_Parking3)/Issue/External IRQ/20260414_port_sample/port_sample_application/sample_application/V4H/19_11/src/Port_PBcfg.c

@@ -0,0 +1,527 @@
+/*============================================================================*/
+/* Project      = AUTOSAR Renesas MCAL Components                             */
+/* Module       = Port_PBcfg.c                                                */
+/*============================================================================*/
+/*                                  COPYRIGHT                                 */
+/*============================================================================*/
+/* Copyright(c) 2026 Renesas Electronics Corporation.                         */
+/*============================================================================*/
+/* Purpose:                                                                   */
+/* This file contains post-build time parameters.                             */
+/* AUTOMATICALLY GENERATED FILE - DO NOT EDIT                                 */
+/*                                                                            */
+/*============================================================================*/
+/*                                                                            */
+/* Unless otherwise agreed upon in writing between your company and           */
+/* Renesas Electronics Corporation the following shall apply!                 */
+/*                                                                            */
+/* Warranty Disclaimer                                                        */
+/*                                                                            */
+/* There is no warranty of any kind whatsoever granted by Renesas. Any        */
+/* warranty is expressly disclaimed and excluded by Renesas, either expressed */
+/* or implied, including but not limited to those for non-infringement of     */
+/* intellectual property, merchantability and/or fitness for the particular   */
+/* purpose.                                                                   */
+/*                                                                            */
+/* Renesas shall not have any obligation to maintain, service or provide bug  */
+/* fixes for the supplied Product(s) and/or the Application.                  */
+/*                                                                            */
+/* Each User is solely responsible for determining the appropriateness of     */
+/* using the Product(s) and assumes all risks associated with its exercise    */
+/* of rights under this Agreement, including, but not limited to the risks    */
+/* and costs of program errors, compliance with applicable laws, damage to    */
+/* or loss of data, programs or equipment, and unavailability or              */
+/* interruption of operations.                                                */
+/*                                                                            */
+/* Limitation of Liability                                                    */
+/*                                                                            */
+/* In no event shall Renesas be liable to the User for any incidental,        */
+/* consequential, indirect, or punitive damage (including but not limited     */
+/* to lost profits) regardless of whether such liability is based on breach   */
+/* of contract, tort, strict liability, breach of warranties, failure of      */
+/* essential purpose or otherwise and even if advised of the possibility of   */
+/* such damages. Renesas shall not be liable for any services or products     */
+/* provided by third party vendors, developers or consultants identified or   */
+/* referred to the User by Renesas in connection with the Product(s) and/or   */
+/* the Application.                                                           */
+/*                                                                            */
+/*============================================================================*/
+/* Environment:                                                               */
+/*              Devices:        V4H                                           */
+/*============================================================================*/
+
+
+/*******************************************************************************
+**                      Revision Control History                              **
+*******************************************************************************/
+
+
+
+/*******************************************************************************
+**                      Generation Tool Version                               **
+*******************************************************************************/
+/*                                                                            */
+/* TOOL VERSION:  PortRCAR.dll version: 1.0.16, MCALConfGen.exe version: 1.2.3 */
+/*                                                                            */
+
+
+/*******************************************************************************
+**                      Input File                                            **
+*******************************************************************************/
+/*
+ * INPUT FILE:    C:\Users\a5162358\Documents\V4H\20250829_V4H_MCAL_training\RTM8RC779GCMCL5DA0JCDRE\rel\modules\port\sample_application\V4H\19_11\config\App_PORT_V4H_Sample.arxml
+ *                C:\Users\a5162358\Documents\V4H\20250829_V4H_MCAL_training\RTM8RC779GCMCL5DA0JCDRE\rel\modules\port\generator\V4H\R1911_PORT_V4H_BSWMDT.arxml
+ *                C:\Users\a5162358\Documents\V4H\20250829_V4H_MCAL_training\RTM8RC779GCMCL5DA0JCDRE\rel\common\generic\stubs\19_11\Dem\xml\Dem_Port.arxml
+ *                C:\Users\a5162358\Documents\V4H\20250829_V4H_MCAL_training\RTM8RC779GCMCL5DA0JCDRE\rel\V4H\common_family\generator\arm\Sample_Application_V4H.trxml
+ * GENERATED ON:  14 Apr 2026 - 03:10:33
+ */
+
+
+/*******************************************************************************
+**                      Instance Index                                        **
+*******************************************************************************/
+
+/*******************************************************************************
+**                      Include Section                                       **
+*******************************************************************************/
+/* MISRA Violation: START Msg(2:0857)-2 */
+#include "Port.h"
+/* END Msg(2:0857)-2 */
+/* MISRA Violation: START Msg(2:0857)-2 */
+#include "Port_PBTypes.h"
+/* END Msg(2:0857)-2 */
+
+
+/*******************************************************************************
+**                      QAC Warning                                           **
+*******************************************************************************/
+/* 1. QAC Warning:                                                            */
+/* Message       : (1:1504) The object '%s' is only referenced  in the        */
+/*                 translation unit where it is defined.                      */
+/* Rule          : MISRA-C:2012 Rule-8.7                                      */
+/* Justification : This is accepted, due to following coding rule, internal   */
+/*                 function can be defined in other C source files            */
+/* Verification  : However, part of the code is verified manually             */
+/*                 and it is not having any impact.                           */
+/* Reference     : Look for START Msg(1:1504)-1 and                           */
+/*                 END Msg(1:1504)-1 tags in the code.                        */
+
+
+
+/*******************************************************************************
+**                      MISRA C Rule Violations                               **
+*******************************************************************************/
+/* 1. MISRA C RULE VIOLATION:                                                 */
+/* Message       : (4:5087) Use of #include directive after code fragment.    */
+/* Rule          : MISRA-C:2012 Rule-20.1                                     */
+/* Justification : This is done as per Memory Requirement, (MEMMAP003 -       */
+/*                 Specification of Memory Mapping).                          */
+/* Verification  : However, part of the code is verified manually             */
+/*                 and it is not having any impact.                           */
+/* Reference     : Look for START Msg(4:5087)-1 and                           */
+/*                 END Msg(4:5087)-1 tags in the code.                        */
+/******************************************************************************/
+/* 2. MISRA C RULE VIOLATION:                                                 */
+/* Message       : (2:0857) [L] Number of macro definitions exceeds 1024 -    */
+/*                 program does not conform strictly to ISO:C90.              */
+/* Rule          : MISRA-C:2012 Dir-1.1                                       */
+/* Justification : The number of macro depend on module code size. There is   */
+/*                 no issue when number of macro is over 1024.                */
+/* Verification  : However, part of the code is verified manually and it is   */
+/*                 not having any impact.                                     */
+/* Reference     : Look for START Msg(2:0857)-2 and                           */
+/*                 END Msg(2:0857)-2 tags in the code.                        */
+/******************************************************************************/
+/* 3. MISRA C RULE VIOLATION:                                                 */
+/* Message       : (1:1504) The object '%s' is only referenced  in the        */
+/*                 translation unit where it is defined.                      */
+/* Rule          : MISRA-C:2012 Rule-8.7, CWE-398, CWE-569                    */
+/* Justification : This is accepted, due to following coding rule, internal   */
+/*                 function can be defined in other C source files            */
+/* Verification  : However, part of the code is verified manually             */
+/*                 and it is not having any impact.                           */
+/* Reference     : Look for START Msg(1:1504)-3 and                           */
+/*                 END Msg(1:1504)-3 tags in the code.                        */
+/******************************************************************************/
+/* 4. MISRA C RULE VIOLATION:                                                 */
+/* Message       : (1:1533) The object '%1s' is only referenced by function   */
+/*                 '%2s'.                                                     */
+/* Rule          : MISRA-C:2012 Rule-8.9, CWE-398, CWE-569                    */
+/* Justification : This is accepted, due to the object is defined in          */
+/*                 separated source C file to followed coding rule            */
+/* Verification  : However, part of the code is verified manually             */
+/*                 and it is not having any impact.                           */
+/* Reference     : Look for START Msg(1:1533)-4 and                           */
+/*                 END Msg(1:1533)-4 tags in the code.                        */
+/******************************************************************************/
+
+
+/*******************************************************************************
+**                      Version Information                                   **
+*******************************************************************************/
+#define PORT_PBCFG_C_AR_RELEASE_MAJOR_VERSION           4U
+#define PORT_PBCFG_C_AR_RELEASE_MINOR_VERSION           5U
+#define PORT_PBCFG_C_AR_RELEASE_REVISION_VERSION        0U
+#define PORT_PBCFG_C_SW_MAJOR_VERSION                   1U
+/* MISRA Violation: START Msg(2:0857)-2 */
+#define PORT_PBCFG_C_SW_MINOR_VERSION                   1U
+/* END Msg(2:0857)-2 */
+
+/*******************************************************************************
+**                      Version Check                                         **
+*******************************************************************************/
+
+#if (PORT_PBTYPES_AR_RELEASE_MAJOR_VERSION != \
+  PORT_PBCFG_C_AR_RELEASE_MAJOR_VERSION)
+  #error "Port_PBcfg.c : Mismatch in Release Major Version"
+#endif
+
+#if (PORT_PBTYPES_AR_RELEASE_MINOR_VERSION != \
+  PORT_PBCFG_C_AR_RELEASE_MINOR_VERSION)
+  #error "Port_PBcfg.c : Mismatch in Release Minor Version"
+#endif
+
+#if (PORT_PBTYPES_AR_RELEASE_REVISION_VERSION != \
+  PORT_PBCFG_C_AR_RELEASE_REVISION_VERSION)
+  #error "Port_PBcfg.c : Mismatch in Release Revision Version"
+#endif
+
+#if (PORT_PBTYPES_SW_MAJOR_VERSION != \
+  PORT_PBCFG_C_SW_MAJOR_VERSION)
+  #error "Port_PBcfg.c : Mismatch in Software Major Version"
+#endif
+
+#if (PORT_PBTYPES_SW_MINOR_VERSION != \
+  PORT_PBCFG_C_SW_MINOR_VERSION)
+  #error "Port_PBcfg.c : Mismatch in Software Minor Version"
+#endif
+
+
+
+/*******************************************************************************
+**                      Global Data Types                                     **
+*******************************************************************************/
+
+/*******************************************************************************
+**                      Global Data                                           **
+*******************************************************************************/
+
+#define PORT_START_SEC_DBTOC_DATA_UNSPECIFIED
+/* MISRA Violation: START Msg(4:5087)-1 */
+#include "Port_MemMap.h"
+/* END Msg(4:5087)-1 */
+
+
+/* The following structure indicates the starting point of database */
+CONST(Port_ConfigType, PORT_CONFIG_DATA) Port_GstConfiguration[] =
+{
+  /* Index: 0 - Global Data */
+  {
+    /* ulStartOfDbToc */
+    0x0EDF0108UL,
+
+    /* pPortNumRegs */
+    &Port_GstNumRegs[0],
+
+    /* pPortNumFuncCtrlRegs */
+    &Port_GstNumFuncCtrlRegs[0],
+
+    /* pPortNumINOUTSELRegs */
+    &Port_GstNumINOUTSELRegs[0],
+
+    /* pPortFILONOFFRegs */
+    &Port_GstFILONOFFRegs[0],
+
+    /* pPinDirChangeable */
+    NULL_PTR,
+
+    /* pPinDioAltModeDetails */
+    NULL_PTR
+  }
+};
+
+#define PORT_STOP_SEC_DBTOC_DATA_UNSPECIFIED
+/* MISRA Violation: START Msg(4:5087)-1 */
+#include "Port_MemMap.h"
+/* END Msg(4:5087)-1 */
+
+
+
+#define PORT_START_SEC_CONFIG_DATA_UNSPECIFIED
+/* MISRA Violation: START Msg(4:5087)-1 */
+#include "Port_MemMap.h"
+/* END Msg(4:5087)-1 */
+
+
+/* Array of structures of all port group registers in the sequence of GPIO    */
+/*   Registers.                                                               */
+/* MISRA Violation: START Msg(1:1504)-3 */
+CONST(Port_Regs, PORT_CONFIG_DATA) Port_GstNumRegs[] =
+{
+  /* Index: 0 - PortConfigSet_PortGroup1_POSNEG_Register_1 */
+  {
+    /* usRegAddrOffset */
+    0x09A0U,
+
+    /* ulInitModeRegVal */
+    0x01000000UL,
+
+    /* ulAndMaskVal */
+    0xFCFFFFFFUL
+  },
+  /* Index: 1 - PortConfigSet_PortGroup1_EDGLEVEL_Register_1 */
+  {
+    /* usRegAddrOffset */
+    0x09A4U,
+
+    /* ulInitModeRegVal */
+    0x03000000UL,
+
+    /* ulAndMaskVal */
+    0xFCFFFFFFUL
+  },
+  /* Index: 2 - PortConfigSet_PortGroup1_BOTHEDGE_Register_1 */
+  {
+    /* usRegAddrOffset */
+    0x09CCU,
+
+    /* ulInitModeRegVal */
+    0x00000000UL,
+
+    /* ulAndMaskVal */
+    0xFCFFFFFFUL
+  },
+  /* Index: 3 - PortConfigSet_PortGroup1_IOINTSEL_Register_1 */
+  {
+    /* usRegAddrOffset */
+    0x0980U,
+
+    /* ulInitModeRegVal */
+    0x03000000UL,
+
+    /* ulAndMaskVal */
+    0xFCFFFFFFUL
+  },
+  /* Index: 4 - PortConfigSet_PortGroup1_OUTDTSEL_Register_1 */
+  {
+    /* usRegAddrOffset */
+    0x09C0U,
+
+    /* ulInitModeRegVal */
+    0x00000000UL,
+
+    /* ulAndMaskVal */
+    0xFCFFFFFFUL
+  },
+  /* Index: 5 - PortConfigSet_PortGroup1_OUTDT_Register_1 */
+  {
+    /* usRegAddrOffset */
+    0x0988U,
+
+    /* ulInitModeRegVal */
+    0x01000000UL,
+
+    /* ulAndMaskVal */
+    0xFCFFFFFFUL
+  },
+  /* Index: 6 - PortConfigSet_PortGroup1_OUTDTH_Register_1 */
+  {
+    /* usRegAddrOffset */
+    0x09C4U,
+
+    /* ulInitModeRegVal */
+    0x01000000UL,
+
+    /* ulAndMaskVal */
+    0xFCFFFFFFUL
+  },
+  /* Index: 7 - PortConfigSet_PortGroup1_OUTDTL_Register_1 */
+  {
+    /* usRegAddrOffset */
+    0x09C8U,
+
+    /* ulInitModeRegVal */
+    0x01000000UL,
+
+    /* ulAndMaskVal */
+    0xFCFFFFFFUL
+  },
+  /* Index: 8 - PortConfigSet_PortGroup1_INEN_Register_1 */
+  {
+    /* usRegAddrOffset */
+    0x09D0U,
+
+    /* ulInitModeRegVal */
+    0x03000000UL,
+
+    /* ulAndMaskVal */
+    0xFCFFFFFFUL
+  }
+};
+/* END Msg(1:1504)-3 */
+
+
+/* Array of structures of all function control port group registers, in the   */
+/*   sequence of PFC Registers.                                               */
+/* MISRA Violation: START Msg(1:1504)-3 */
+CONST(Port_FuncCtrlRegs, PORT_CONFIG_DATA) Port_GstNumFuncCtrlRegs[] =
+{
+  /* Index: 0 - PortConfigSet_PortGroup1_GPSR_Register_1 */
+  {
+    /* usRegAddrOffset */
+    0x0840U,
+
+    /* ulInitModeRegVal */
+    0x00000000UL,
+
+    /* ulAndMaskVal */
+    0xFCFFFFFFUL
+  },
+  /* Index: 1 - PortConfigSet_PortGroup1_PUD_Register_1 */
+  {
+    /* usRegAddrOffset */
+    0x08E0U,
+
+    /* ulInitModeRegVal */
+    0x00000000UL,
+
+    /* ulAndMaskVal */
+    0xFCFFFFFFUL
+  },
+  /* Index: 2 - PortConfigSet_PortGroup1_PUEN_Register_1 */
+  {
+    /* usRegAddrOffset */
+    0x08C0U,
+
+    /* ulInitModeRegVal */
+    0x00000000UL,
+
+    /* ulAndMaskVal */
+    0xFCFFFFFFUL
+  }
+};
+/* END Msg(1:1504)-3 */
+
+
+/* Array of structures for 32-Bit INOUTSEL Registers */
+/* MISRA Violation: START Msg(1:1504)-3 */
+CONST(Port_INOUTSELRegs, PORT_CONFIG_DATA) Port_GstNumINOUTSELRegs[] =
+{
+  /* Index: 0 - PortConfigSet_PortGroup1_INOUTSEL_Register_1 */
+  {
+    /* ulChangeableStatus */
+    0x00000000UL,
+
+    /* usRegAddrOffset */
+    0x0984U,
+
+    /* ulInitModeRegVal */
+    0x00000000UL,
+
+    /* ulAndMaskVal */
+    0xFCFFFFFFUL
+  }
+};
+/* END Msg(1:1504)-3 */
+
+
+/* Array of structures for Chattering Filter registers */
+/* MISRA Violation: START Msg(1:1504)-3 */
+CONST(Port_FILONOFFRegs, PORT_CONFIG_DATA) Port_GstFILONOFFRegs[] =
+{
+  /* Index: 0 - PortConfigSet_PortChatteringFilterGroup1_FILONOFF_FILCLKSEL_1 */
+  {
+    /* usFILONOFFRegAddrOffset */
+    0x09A8U,
+
+    /* ulFILONOFF */
+    0x00000000UL,
+
+    /* ulFILONOFFMaskVal */
+    0xFCFFFFFFUL,
+
+    /* usFILCLKSELRegAddrOffset */
+    0x09ACU,
+
+    /* usFILCLKSEL */
+    0x0000U,
+
+    /* ulFILCLKSELMaskVal */
+    0xFFFF0000UL
+  },
+  /* Index: 1 - PortConfigSet_PortChatteringFilterGroup7_FILONOFF_FILCLKSEL_7 */
+  {
+    /* usFILONOFFRegAddrOffset */
+    0x59A8U,
+
+    /* ulFILONOFF */
+    0x00000000UL,
+
+    /* ulFILONOFFMaskVal */
+    0x00000000UL,
+
+    /* usFILCLKSELRegAddrOffset */
+    0x59ACU,
+
+    /* usFILCLKSEL */
+    0x0000U,
+
+    /* ulFILCLKSELMaskVal */
+    0xFFFF0000UL
+  }
+};
+/* END Msg(1:1504)-3 */
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+/* Array of structures for FuSe Info */
+/* MISRA Violation: START Msg(1:1533)-4 */
+CONST(Port_FUSEInfo, PORT_CONFIG_DATA) Port_GstFUSEInfo[] =
+{
+  /* Index: 0 - OTPMONITOR0 */
+  {
+    /* ulAddressRegisterFuSe */
+    (uint32)0xE61BF100UL,
+
+    /* ulFuSeMaskRegister */
+    (uint32)0x000003FFUL,
+
+    /* ulFuSeValueExpected */
+    (uint32)0x00000000UL
+  },
+  /* Index: 1 - OTPMONITOR3 */
+  {
+    /* ulAddressRegisterFuSe */
+    (uint32)0xE61BF10CUL,
+
+    /* ulFuSeMaskRegister */
+    (uint32)0x0000003FUL,
+
+    /* ulFuSeValueExpected */
+    (uint32)0x00000000UL
+  }
+};
+/* END Msg(1:1533)-4 */
+
+
+/*******************************************************************************
+**                      Function Definitions                                  **
+*******************************************************************************/
+
+/*******************************************************************************
+**                      End of File                                           **
+*******************************************************************************/
+

Customer/MOBIS/PRK3_(ADAS_Parking3)/Issue/External IRQ/20260414_port_sample/port_sample_application/sample_application/V4H/include/arm/App_PORT_V4H_Sample.h

@@ -0,0 +1,385 @@
+/*============================================================================*/
+/* Project      = AUTOSAR Renesas MCAL Components                             */
+/* Module       = App_PORT_V4H_Sample.h                                       */
+/* SW-VERSION   = 1.1.12                                                      */
+/*============================================================================*/
+/*                                  COPYRIGHT                                 */
+/*============================================================================*/
+/* Copyright(c) 2021-2025 Renesas Electronics Corporation.                    */
+/*============================================================================*/
+/* Purpose:                                                                   */
+/* Header file information for application.                                   */
+/*                                                                            */
+/*============================================================================*/
+/*                                                                            */
+/* Unless otherwise agreed upon in writing between your company and           */
+/* Renesas Electronics Corporation the following shall apply!                 */
+/*                                                                            */
+/* Warranty Disclaimer                                                        */
+/*                                                                            */
+/* There is no warranty of any kind whatsoever granted by Renesas. Any        */
+/* warranty is expressly disclaimed and excluded by Renesas, either expressed */
+/* or implied, including but not limited to those for non-infringement of     */
+/* intellectual property, merchantability and/or fitness for the particular   */
+/* purpose.                                                                   */
+/*                                                                            */
+/* Renesas shall not have any obligation to maintain, service or provide bug  */
+/* fixes for the supplied Product(s) and/or the Application.                  */
+/*                                                                            */
+/* Each User is solely responsible for determining the appropriateness of     */
+/* using the Product(s) and assumes all risks associated with its exercise    */
+/* of rights under this Agreement, including, but not limited to the risks    */
+/* and costs of program errors, compliance with applicable laws, damage to    */
+/* or loss of data, programs or equipment, and unavailability or              */
+/* interruption of operations.                                                */
+/*                                                                            */
+/* Limitation of Liability                                                    */
+/*                                                                            */
+/* In no event shall Renesas be liable to the User for any incidental,        */
+/* consequential, indirect, or punitive damage (including but not limited     */
+/* to lost profits) regardless of whether such liability is based on breach   */
+/* of contract, tort, strict liability, breach of warranties, failure of      */
+/* essential purpose or otherwise and even if advised of the possibility of   */
+/* such damages. Renesas shall not be liable for any services or products     */
+/* provided by third party vendors, developers or consultants identified or   */
+/* referred to the User by Renesas in connection with the Product(s) and/or   */
+/* the Application.                                                           */
+/*                                                                            */
+/*============================================================================*/
+/* Environment:                                                               */
+/*              Devices:        V4H                                           */
+/*============================================================================*/
+
+/*******************************************************************************
+**                      Revision Control History                              **
+*******************************************************************************/
+/*
+ * 1.1.13: 28/02/2025 : Increase SW-VERSION 1.1.12
+ * 1.1.12: 25/07/2023 : Remove address of register MODSEL4,5,6,7
+ * 1.1.11: 27/04/2023 : Update address of register OTPMONITOR3
+ * 1.1.10: 22/12/2022 : Remove definition of MSTPSR9 register
+ * 1.0.6:  03/11/2022 : Add define for MFISWPCNTR register and declaration for
+ *                     Disable_MFIS_Protection().
+ * 1.0.5:  07/07/2022 : Add declaration of Port_UnintendedModuleStopCheck_Clock
+ * 1.0.4:  02/06/2022 : Define for registers: OTPMONITOR0, OTPMONITOR3
+ * 1.0.3:  06/05/2022 : Add new feature Port Pin Mode Setting.
+ * 1.0.2:  12/04/2022 : 1. Add new feature Port Pin Alternate Mode Setting,
+ *                        Port Pin DIO Mode Setting.
+ *                      2. Change Wdg_59_Rwdt_Init() to Wdg_Init()
+ * 1.0.1:  21/03/2022 : Add new feature Port Pin Direction Refreshing
+ * 1.0.0:  01/12/2021 : Initial Version
+ */
+/******************************************************************************/
+
+#ifndef APP_PORT_V4H_SAMPLE_H
+#define APP_PORT_V4H_SAMPLE_H
+
+/*******************************************************************************
+**                      Include Section                                       **
+*******************************************************************************/
+
+#include "Port.h"
+#include "Interrupt.h"
+
+/*******************************************************************************
+**                      Version Information                                   **
+*******************************************************************************/
+
+/*******************************************************************************
+**                      Global Symbols                                        **
+*******************************************************************************/
+#define PORT_FAIL                           0
+#define PORT_PASS                           1
+
+/* MFIS registers */
+#define MFISLCKR0                           *((volatile uint32 *)(0xE62600C0UL))
+#define MFISLCKR1                           *((volatile uint32 *)(0xE62600C4UL))
+#define MFISLCKR2                           *((volatile uint32 *)(0xE62600C8UL))
+#define MFISLCKR3                           *((volatile uint32 *)(0xE62600CCUL))
+#define MFISLCKR4                           *((volatile uint32 *)(0xE62600D0UL))
+#define MFISLCKR5                           *((volatile uint32 *)(0xE62600D4UL))
+#define MFISLCKR6                           *((volatile uint32 *)(0xE62600D8UL))
+#define MFISLCKR7                           *((volatile uint32 *)(0xE62600DCUL))
+#define MFISWPCNTR                          *((volatile uint32 *)(0xE6260900UL))
+#define MFIS_DISABLE_PROTECTION             (uint32)(0xACCE0001UL)
+
+/* PFC registers */
+#define PMMR0                               *((volatile uint32 *)(0xE6050000UL))
+#define PMMR1                               *((volatile uint32 *)(0xE6050800UL))
+#define PMMR2                               *((volatile uint32 *)(0xE6058000UL))
+#define PMMR3                               *((volatile uint32 *)(0xE6058800UL))
+#define PMMR4                               *((volatile uint32 *)(0xE6060000UL))
+#define PMMR5                               *((volatile uint32 *)(0xE6060800UL))
+#define PMMR6                               *((volatile uint32 *)(0xE6061000UL))
+#define PMMR7                               *((volatile uint32 *)(0xE6061800UL))
+#define PMMR8                               *((volatile uint32 *)(0xE6068000UL))
+
+#define GPSR0                               *((volatile uint32 *)(0xE6050040UL))
+#define GPSR1                               *((volatile uint32 *)(0xE6050840UL))
+#define GPSR2                               *((volatile uint32 *)(0xE6058040UL))
+#define GPSR3                               *((volatile uint32 *)(0xE6058840UL))
+#define GPSR4                               *((volatile uint32 *)(0xE6060040UL))
+#define GPSR5                               *((volatile uint32 *)(0xE6060840UL))
+#define GPSR6                               *((volatile uint32 *)(0xE6061040UL))
+#define GPSR7                               *((volatile uint32 *)(0xE6061840UL))
+#define GPSR8                               *((volatile uint32 *)(0xE6068040UL))
+
+#define IP0SR0                              *((volatile uint32 *)(0xE6050060UL))
+#define IP1SR0                              *((volatile uint32 *)(0xE6050064UL))
+#define IP2SR0                              *((volatile uint32 *)(0xE6050068UL))
+#define IP0SR1                              *((volatile uint32 *)(0xE6050860UL))
+#define IP1SR1                              *((volatile uint32 *)(0xE6050864UL))
+#define IP2SR1                              *((volatile uint32 *)(0xE6050868UL))
+#define IP3SR1                              *((volatile uint32 *)(0xE605086CUL))
+#define IP0SR2                              *((volatile uint32 *)(0xE6058060UL))
+#define IP1SR2                              *((volatile uint32 *)(0xE6058064UL))
+#define IP2SR2                              *((volatile uint32 *)(0xE6058068UL))
+#define IP0SR3                              *((volatile uint32 *)(0xE6058860UL))
+#define IP1SR3                              *((volatile uint32 *)(0xE6058864UL))
+#define IP2SR3                              *((volatile uint32 *)(0xE6058868UL))
+#define IP3SR3                              *((volatile uint32 *)(0xE605886CUL))
+#define IP0SR6                              *((volatile uint32 *)(0xE6061060UL))
+#define IP1SR6                              *((volatile uint32 *)(0xE6061064UL))
+#define IP2SR6                              *((volatile uint32 *)(0xE6061068UL))
+#define IP0SR7                              *((volatile uint32 *)(0xE6061860UL))
+#define IP1SR7                              *((volatile uint32 *)(0xE6061864UL))
+#define IP2SR7                              *((volatile uint32 *)(0xE6061868UL))
+#define IP0SR8                              *((volatile uint32 *)(0xE6068060UL))
+#define IP1SR8                              *((volatile uint32 *)(0xE6068064UL))
+
+#define PUEN0                               *((volatile uint32 *)(0xE60500C0UL))
+#define PUEN1                               *((volatile uint32 *)(0xE60508C0UL))
+#define PUEN2                               *((volatile uint32 *)(0xE60580C0UL))
+#define PUEN3                               *((volatile uint32 *)(0xE60588C0UL))
+#define PUEN4                               *((volatile uint32 *)(0xE60600C0UL))
+#define PUEN5                               *((volatile uint32 *)(0xE60608C0UL))
+#define PUEN6                               *((volatile uint32 *)(0xE60610C0UL))
+#define PUEN7                               *((volatile uint32 *)(0xE60618C0UL))
+#define PUEN8                               *((volatile uint32 *)(0xE60680C0UL))
+
+#define PUD0                                *((volatile uint32 *)(0xE60500E0UL))
+#define PUD1                                *((volatile uint32 *)(0xE60508E0UL))
+#define PUD2                                *((volatile uint32 *)(0xE60580E0UL))
+#define PUD3                                *((volatile uint32 *)(0xE60588E0UL))
+#define PUD4                                *((volatile uint32 *)(0xE60600E0UL))
+#define PUD5                                *((volatile uint32 *)(0xE60608E0UL))
+#define PUD6                                *((volatile uint32 *)(0xE60610E0UL))
+#define PUD7                                *((volatile uint32 *)(0xE60618E0UL))
+#define PUD8                                *((volatile uint32 *)(0xE60680E0UL))
+
+#define MODSEL8                             *((volatile uint32 *)(0xE6068100UL))
+
+/* GPIO registers */
+#define OUTDT0                              *((volatile uint32 *)(0xE6050188UL))
+#define OUTDT1                              *((volatile uint32 *)(0xE6050988UL))
+#define OUTDT2                              *((volatile uint32 *)(0xE6058188UL))
+#define OUTDT3                              *((volatile uint32 *)(0xE6058988UL))
+#define OUTDT4                              *((volatile uint32 *)(0xE6060188UL))
+#define OUTDT5                              *((volatile uint32 *)(0xE6060988UL))
+#define OUTDT6                              *((volatile uint32 *)(0xE6061188UL))
+#define OUTDT7                              *((volatile uint32 *)(0xE6061988UL))
+#define OUTDT8                              *((volatile uint32 *)(0xE6068188UL))
+
+#define POSNEG0                             *((volatile uint32 *)(0xE60501A0UL))
+#define POSNEG1                             *((volatile uint32 *)(0xE60509A0UL))
+#define POSNEG2                             *((volatile uint32 *)(0xE60581A0UL))
+#define POSNEG3                             *((volatile uint32 *)(0xE60589A0UL))
+#define POSNEG4                             *((volatile uint32 *)(0xE60601A0UL))
+#define POSNEG5                             *((volatile uint32 *)(0xE60609A0UL))
+#define POSNEG6                             *((volatile uint32 *)(0xE60611A0UL))
+#define POSNEG7                             *((volatile uint32 *)(0xE60619A0UL))
+#define POSNEG8                             *((volatile uint32 *)(0xE60681A0UL))
+
+#define INOUTSEL0                           *((volatile uint32 *)(0xE6050184UL))
+#define INOUTSEL1                           *((volatile uint32 *)(0xE6050984UL))
+#define INOUTSEL2                           *((volatile uint32 *)(0xE6058184UL))
+#define INOUTSEL3                           *((volatile uint32 *)(0xE6058984UL))
+#define INOUTSEL4                           *((volatile uint32 *)(0xE6060184UL))
+#define INOUTSEL5                           *((volatile uint32 *)(0xE6060984UL))
+#define INOUTSEL6                           *((volatile uint32 *)(0xE6061184UL))
+#define INOUTSEL7                           *((volatile uint32 *)(0xE6061984UL))
+#define INOUTSEL8                           *((volatile uint32 *)(0xE6068184UL))
+
+#define IOINTSEL0                           *((volatile uint32 *)(0xE6050180UL))
+#define IOINTSEL1                           *((volatile uint32 *)(0xE6050980UL))
+#define IOINTSEL2                           *((volatile uint32 *)(0xE6058180UL))
+#define IOINTSEL3                           *((volatile uint32 *)(0xE6058980UL))
+#define IOINTSEL4                           *((volatile uint32 *)(0xE6060180UL))
+#define IOINTSEL5                           *((volatile uint32 *)(0xE6060980UL))
+#define IOINTSEL6                           *((volatile uint32 *)(0xE6061180UL))
+#define IOINTSEL7                           *((volatile uint32 *)(0xE6061980UL))
+#define IOINTSEL8                           *((volatile uint32 *)(0xE6068180UL))
+
+#define EDGLEVEL0                           *((volatile uint32 *)(0xE60501A4UL))
+#define EDGLEVEL1                           *((volatile uint32 *)(0xE60509A4UL))
+#define EDGLEVEL2                           *((volatile uint32 *)(0xE60581A4UL))
+#define EDGLEVEL3                           *((volatile uint32 *)(0xE60589A4UL))
+#define EDGLEVEL4                           *((volatile uint32 *)(0xE60601A4UL))
+#define EDGLEVEL5                           *((volatile uint32 *)(0xE60609A4UL))
+#define EDGLEVEL6                           *((volatile uint32 *)(0xE60611A4UL))
+#define EDGLEVEL7                           *((volatile uint32 *)(0xE60619A4UL))
+#define EDGLEVEL8                           *((volatile uint32 *)(0xE60681A4UL))
+
+#define FILONOFF0                           *((volatile uint32 *)(0xE60501A8UL))
+#define FILONOFF1                           *((volatile uint32 *)(0xE60509A8UL))
+#define FILONOFF2                           *((volatile uint32 *)(0xE60581A8UL))
+#define FILONOFF3                           *((volatile uint32 *)(0xE60589A8UL))
+#define FILONOFF4                           *((volatile uint32 *)(0xE60601A8UL))
+#define FILONOFF5                           *((volatile uint32 *)(0xE60609A8UL))
+#define FILONOFF6                           *((volatile uint32 *)(0xE60611A8UL))
+#define FILONOFF7                           *((volatile uint32 *)(0xE60619A8UL))
+#define FILONOFF8                           *((volatile uint32 *)(0xE60681A8UL))
+
+#define FILCLKSEL0                          *((volatile uint32 *)(0xE60501ACUL))
+#define FILCLKSEL1                          *((volatile uint32 *)(0xE60509ACUL))
+#define FILCLKSEL2                          *((volatile uint32 *)(0xE60581ACUL))
+#define FILCLKSEL3                          *((volatile uint32 *)(0xE60589ACUL))
+#define FILCLKSEL4                          *((volatile uint32 *)(0xE60601ACUL))
+#define FILCLKSEL5                          *((volatile uint32 *)(0xE60609ACUL))
+#define FILCLKSEL6                          *((volatile uint32 *)(0xE60611ACUL))
+#define FILCLKSEL7                          *((volatile uint32 *)(0xE60619ACUL))
+#define FILCLKSEL8                          *((volatile uint32 *)(0xE60681ACUL))
+
+#define OUTDTSEL0                           *((volatile uint32 *)(0xE60501C0UL))
+#define OUTDTSEL1                           *((volatile uint32 *)(0xE60509C0UL))
+#define OUTDTSEL2                           *((volatile uint32 *)(0xE60581C0UL))
+#define OUTDTSEL3                           *((volatile uint32 *)(0xE60589C0UL))
+#define OUTDTSEL4                           *((volatile uint32 *)(0xE60601C0UL))
+#define OUTDTSEL5                           *((volatile uint32 *)(0xE60609C0UL))
+#define OUTDTSEL6                           *((volatile uint32 *)(0xE60611C0UL))
+#define OUTDTSEL7                           *((volatile uint32 *)(0xE60619C0UL))
+#define OUTDTSEL8                           *((volatile uint32 *)(0xE60681C0UL))
+
+#define OUTDTH0                             *((volatile uint32 *)(0xE60501C4UL))
+#define OUTDTH1                             *((volatile uint32 *)(0xE60509C4UL))
+#define OUTDTH2                             *((volatile uint32 *)(0xE60581C4UL))
+#define OUTDTH3                             *((volatile uint32 *)(0xE60589C4UL))
+#define OUTDTH4                             *((volatile uint32 *)(0xE60601C4UL))
+#define OUTDTH5                             *((volatile uint32 *)(0xE60609C4UL))
+#define OUTDTH6                             *((volatile uint32 *)(0xE60611C4UL))
+#define OUTDTH7                             *((volatile uint32 *)(0xE60619C4UL))
+#define OUTDTH8                             *((volatile uint32 *)(0xE60681C4UL))
+
+#define OUTDTL0                             *((volatile uint32 *)(0xE60501C8UL))
+#define OUTDTL1                             *((volatile uint32 *)(0xE60509C8UL))
+#define OUTDTL2                             *((volatile uint32 *)(0xE60581C8UL))
+#define OUTDTL3                             *((volatile uint32 *)(0xE60589C8UL))
+#define OUTDTL4                             *((volatile uint32 *)(0xE60601C8UL))
+#define OUTDTL5                             *((volatile uint32 *)(0xE60609C8UL))
+#define OUTDTL6                             *((volatile uint32 *)(0xE60611C8UL))
+#define OUTDTL7                             *((volatile uint32 *)(0xE60619C8UL))
+#define OUTDTL8                             *((volatile uint32 *)(0xE60681C8UL))
+
+#define BOTHEDGE0                           *((volatile uint32 *)(0xE60501CCUL))
+#define BOTHEDGE1                           *((volatile uint32 *)(0xE60509CCUL))
+#define BOTHEDGE2                           *((volatile uint32 *)(0xE60581CCUL))
+#define BOTHEDGE3                           *((volatile uint32 *)(0xE60589CCUL))
+#define BOTHEDGE4                           *((volatile uint32 *)(0xE60601CCUL))
+#define BOTHEDGE5                           *((volatile uint32 *)(0xE60609CCUL))
+#define BOTHEDGE6                           *((volatile uint32 *)(0xE60611CCUL))
+#define BOTHEDGE7                           *((volatile uint32 *)(0xE60619CCUL))
+#define BOTHEDGE8                           *((volatile uint32 *)(0xE60681CCUL))
+
+#define INEN0                               *((volatile uint32 *)(0xE60501D0UL))
+#define INEN1                               *((volatile uint32 *)(0xE60509D0UL))
+#define INEN2                               *((volatile uint32 *)(0xE60581D0UL))
+#define INEN3                               *((volatile uint32 *)(0xE60589D0UL))
+#define INEN4                               *((volatile uint32 *)(0xE60601D0UL))
+#define INEN5                               *((volatile uint32 *)(0xE60609D0UL))
+#define INEN6                               *((volatile uint32 *)(0xE60611D0UL))
+#define INEN7                               *((volatile uint32 *)(0xE60619D0UL))
+#define INEN8                               *((volatile uint32 *)(0xE60681D0UL))
+
+#define OTPMONITOR0                         *((volatile uint32 *)(0xE61BF100UL))
+#define OTPMONITOR3                         *((volatile uint32 *)(0xE61BF10CUL))
+
+/* Address  Module Start Control Register */
+#define REG_RMSTPCR9_ADDR              0xE6152D24UL
+#define REG_RMSTPCR9                   *((volatile uint32 *)(0xE6152D24UL))
+
+/* CPG Write Protect Register */
+#define REG_CPGWPR                    *((volatile uint32 *)(0xE6150000UL))
+#define REG_CPGWPCR                   *((volatile uint32 *)(0xE6150004UL))
+#define CPG_CPGWPCR_KEYCODE           (uint32)(0xA5A50000UL)
+#define CPG_DISABLE_PROTECTION        (uint32)(CPG_CPGWPCR_KEYCODE | 0x0UL)
+#define CPG_ENABLE_PROTECTION         (uint32)(CPG_CPGWPCR_KEYCODE | 0x1UL)
+
+/* Code Enable/Disable when access to Clock Controller */
+#define DISABLE_WRITE_KEY_CODE        (0xA5A5A500UL)
+#define ENABLE_WRITE_KEY_CODE         (0xA5A5A501UL)
+
+typedef struct Stag_PortReg_t {
+  uint32 PMMRn;           /* 000  LSI Multiplexed Pin Setting Mask Register */
+  uint32 PMMERn;          /* 004  LSI Multiplexed Pin Setting Mask Enable Register */
+  uint32 Reverse1[6];     /* 008 + (4 * 6) */
+  uint32 DM0PRn;          /* 020  Domain protection register 0 */
+  uint32 DM1PRn;          /* 024  Domain protection register 1 */
+  uint32 DM2PRn;          /* 028  Domain protection register 2 */
+  uint32 DM3PRn;          /* 02C  Domain protection register 3 */
+  uint32 Reverse2[4];     /* 030 + (4 * 4) */
+  uint32 GPSRn;           /* 040  GPIO/Peripheral Function Select register */
+  uint32 Reverse3[7];     /* 044 + (4 * 7) */
+  uint32 IP0SRn;          /* 060  Peripheral Function Select register 0 */
+  uint32 IP1SRn;          /* 064  Peripheral Function Select register 1 */
+  uint32 IP2SRn;          /* 068  Peripheral Function Select register 2 */
+  uint32 IP3SRn;          /* 06C  Peripheral Function Select register 3 */
+  uint32 Reverse4[4];     /* 070 + (4 * 4) */
+  uint32 DRV0CTRLn;       /* 080  DRV control register 0 */
+  uint32 DRV1CTRLn;       /* 084  DRV control register 1 */
+  uint32 DRV2CTRLn;       /* 088  DRV control register 2 */
+  uint32 DRV3CTRLn;       /* 08C  DRV control register 3 */
+  uint32 Reverse5[4];     /* 090 + (4 * 4) */
+  uint32 POCn;            /* 0A0  POC control register */
+  uint32 Reverse6[7];     /* 0A4 + (4 * 7) */
+  uint32 PUENn;           /* 0C0  LSI pin pull-enable register */
+  uint32 Reverse7[7];     /* 0C4 + (4 * 7) */
+  uint32 PUDn;            /* 0E0  LSI pin pull-up/down control register */
+  uint32 Reverse8[7];     /* 0E4 + (4 * 7) */
+  uint32 MODSELn;         /* 100  Module select register */
+  uint32 Reverse9[7];     /* 104 + (4 * 7) */
+  uint32 TD0SELn;         /* 120  TDSEL Control Register 0 */
+  uint32 TD1SELn;         /* 124  TDSEL Control Register 1 */
+  uint32 Reverse10[14];   /* 128 + (4 * 14) */
+  uint32 PSERn;           /* 160  Port Safe state Enable Register */
+  uint32 PS0SRn;          /* 164  Port Safe state Enable Register 0 */
+  uint32 PS1SRn;          /* 168  Port Safe state Enable Register 0 */
+  uint32 Reverse11[5];    /* 16C + (4 * 5) */
+  uint32 IOINTSELn;       /* 180  General IO/interrupt switching register */
+  uint32 INOUTSELn;       /* 184  General input/output switching register */
+  uint32 OUTDTn;          /* 188  General output register */
+  uint32 INDTn;           /* 18C  General input register */
+  uint32 INTDTn;          /* 190  Interrupt display register */
+  uint32 INTCLRn;         /* 194  Interrupt clear register */
+  uint32 INTMSKn;         /* 198  Interrupt mask register */
+  uint32 MSKCLRn;         /* 19C  Interrupt Mask Clear Register */
+  uint32 POSNEGn;         /* 1A0  Positive/negative logic select register */
+  uint32 EDGLEVELn;       /* 1A4  Edge/level select register 0 */
+  uint32 FILONOFFn;       /* 1A8  Chattering prevention on/off register */
+  uint32 FILCLKSELn;      /* 1AC  Chattering prevention clock select register */
+  uint32 Reverse12[4];    /* 1B0 + (4 * 4) */
+  uint32 OUTDTSELn;       /* 1C0  Output data select register */
+  uint32 OUTDTHn;         /* 1C4  Output data high register */
+  uint32 OUTDTLn;         /* 1C8  Output data low register */
+  uint32 BOTHEDGEn;       /* 1CC  One edge/both edge select register */
+  uint32 INENn;           /* 1D0  General input enable register */
+} PortReg_t;
+
+/*******************************************************************************
+**                       Function Prototypes                                  **
+*******************************************************************************/
+void Disable_CPG_Protection(void);
+void Write_CPGRegister(uint32 address, uint32 value);
+void GPIO_Start_Module(void);
+void Mcu_Init(void);
+void Wdg_Init(void);
+void Interrupt_Init(void);
+void Disable_MFIS_Protection(void);
+void Port_PostInitGpioIntClearSequence(uint32 portBaseAddr, uint32 pinMask);
+
+extern void PORT1_IRQHandler(void);
+
+#endif /* APP_PORT_V4H_SAMPLE_H */
+
+/*******************************************************************************
+**                      End of File                                           **
+*******************************************************************************/

Customer/MOBIS/PRK3_(ADAS_Parking3)/Issue/External IRQ/20260414_port_sample/port_sample_application/sample_application/V4H/src/arm/App_PORT_V4H_Sample.c

@@ -0,0 +1,274 @@
+/*============================================================================*/
+/* Project      = AUTOSAR Renesas MCAL Components                             */
+/* Module       = App_PORT_V4H_Sample.c                                       */
+/* SW-VERSION   = 1.1.12                                                      */
+/*============================================================================*/
+/*                                  COPYRIGHT                                 */
+/*============================================================================*/
+/* Copyright(c) 2021-2025 Renesas Electronics Corporation.                    */
+/*============================================================================*/
+/* Purpose:                                                                   */
+/* This file contains sample application for PORT Driver Component            */
+/*                                                                            */
+/*============================================================================*/
+/*                                                                            */
+/* Unless otherwise agreed upon in writing between your company and           */
+/* Renesas Electronics Corporation the following shall apply!                 */
+/*                                                                            */
+/* Warranty Disclaimer                                                        */
+/*                                                                            */
+/* There is no warranty of any kind whatsoever granted by Renesas. Any        */
+/* warranty is expressly disclaimed and excluded by Renesas, either expressed */
+/* or implied, including but not limited to those for non-infringement of     */
+/* intellectual property, merchantability and/or fitness for the particular   */
+/* purpose.                                                                   */
+/*                                                                            */
+/* Renesas shall not have any obligation to maintain, service or provide bug  */
+/* fixes for the supplied Product(s) and/or the Application.                  */
+/*                                                                            */
+/* Each User is solely responsible for determining the appropriateness of     */
+/* using the Product(s) and assumes all risks associated with its exercise    */
+/* of rights under this Agreement, including, but not limited to the risks    */
+/* and costs of program errors, compliance with applicable laws, damage to    */
+/* or loss of data, programs or equipment, and unavailability or              */
+/* interruption of operations.                                                */
+/*                                                                            */
+/* Limitation of Liability                                                    */
+/*                                                                            */
+/* In no event shall Renesas be liable to the User for any incidental,        */
+/* consequential, indirect, or punitive damage (including but not limited     */
+/* to lost profits) regardless of whether such liability is based on breach   */
+/* of contract, tort, strict liability, breach of warranties, failure of      */
+/* essential purpose or otherwise and even if advised of the possibility of   */
+/* such damages. Renesas shall not be liable for any services or products     */
+/* provided by third party vendors, developers or consultants identified or   */
+/* referred to the User by Renesas in connection with the Product(s) and/or   */
+/* the Application.                                                           */
+/*                                                                            */
+/*============================================================================*/
+/* Environment:                                                               */
+/*              Devices:        V4H                                           */
+/*============================================================================*/
+
+/*******************************************************************************
+**                      Revision Control History                              **
+*******************************************************************************/
+/*
+ * 1.1.13: 28/02/2025 : Increase SW-VERSION 1.1.12
+ * 1.1.12: 25/07/2023 : Remove checkpoint for MODSEL4,6 in Port_SetPinMode_Check
+ * 1.1.11: 05/07/2023 : Change Port_Config to PortConf in arguments of functions
+ * 1.1.10: 22/12/2022 : Remove the write access code of MSTPSR9 register
+ *                       in GPIO_Start_Module().
+ * 1.0.8:  15/11/2022 : Update the input value of MSTPCR9 and MSTPSR9 registers
+ *                      in GPIO_Start_Module().
+ *         08/11/2022 : Update checkpoint checking value of OUTDTH8 and OUTDTL8
+ *                      Update checkpoint checking value of FILCLKSEL8 register
+ * 1.0.7:  07/10/2022 : Add checkpoint to check for GP3_14 in Port_SetPinMode()
+ *                      In Port_SetPinMode_Check(), update checkpoint of MODSELn
+ *                      register and add checkpoint to check registers of GP3_14.
+ * 1.0.6:  13/09/2022 : Update the condition of checking value MODSELn in 
+ *                      Port_SetPinMode_Check().
+ * 1.0.5:  07/07/2022 : Add new feature Unintended Module Stop Check.
+ * 1.0.4:  02/06/2022 : Add new feature FUSE Monitoring.
+ * 1.0.3:  06/05/2022 : Add new feature Port Pin Mode Setting.
+ * 1.0.2:  12/04/2022 : 1. Add new feature Port Pin Alternate Mode Setting,
+ *                        Port Pin DIO Mode Setting.
+ *                      2. Change Wdg_59_Rwdt_Init() to Wdg_Init()
+ * 1.0.1:  21/03/2022 : Add new feature Port Pin Direction Refreshing
+ * 1.0.0:  01/12/2021 : Initial Version
+ */
+/******************************************************************************/
+
+/*******************************************************************************
+**                      Include Section                                       **
+*******************************************************************************/
+
+#include "App_PORT_V4H_Sample.h"
+#include "scif.h"
+#include "log.h"
+#if (PORT_CRITICAL_SECTION_PROTECTION == STD_ON)
+#include "SchM_Port.h"
+#endif
+
+/*******************************************************************************
+**                      Defines                                               **
+*******************************************************************************/
+#define PORT1_BASE_ADDR       (uint32)0xE6050800UL
+#define GP1_24_BIT 			      (0x1U << 24)
+#define GP1_25_BIT 			      (0x1U << 25)
+#define GP1_INTERRUPT_SPI     (623)
+/*******************************************************************************
+**                      Global Variables                                      **
+*******************************************************************************/
+
+/*******************************************************************************
+**                      Function Definitions                                  **
+*******************************************************************************/
+void cpuirq_disable (void)
+{
+  __asm("cpsid i\n\t");
+}
+
+void cpuirq_enable (void)
+{
+  __asm("cpsie i\n\t");
+}
+
+
+uint8 GaaTestResult[11];
+
+int main(void)
+{
+  Std_VersionInfoType LddversionInfo;
+
+  /* Invoke Mcu_Init to supply clock for GPIO */
+  Mcu_Init();
+
+  /* Invoke Wdg_Init */
+  Wdg_Init();
+
+  /* Invoke Disable_MFIS_Protection to access MFISLCKRn register */
+  Disable_MFIS_Protection();
+
+  Interrupt_Init();
+
+  /* Invoking the Port_GetVersionInfo API */
+  Port_GetVersionInfo(&LddversionInfo);
+  if (LddversionInfo.vendorID == PORT_VENDOR_ID &&
+      LddversionInfo.moduleID == PORT_MODULE_ID &&
+      LddversionInfo.sw_major_version == (uint8)PORT_SW_MAJOR_VERSION &&
+      LddversionInfo.sw_minor_version == (uint8)PORT_SW_MINOR_VERSION &&
+      LddversionInfo.sw_patch_version == (uint8)PORT_SW_PATCH_VERSION)
+  {
+    GaaTestResult[0] = (uint8)PORT_PASS;
+  }
+  else
+  {
+    GaaTestResult[0] = (uint8)PORT_FAIL;
+  }
+  
+  /* This API will initialize all the registers to the initial values */
+  Port_Init(PortConfigSet);
+  Port_PostInitGpioIntClearSequence(PORT1_BASE_ADDR ,GP1_24_BIT);
+  Port_PostInitGpioIntClearSequence(PORT1_BASE_ADDR ,GP1_25_BIT);
+  
+  /* Initialize SCIF module */
+  Scif_Init();
+  /* Start program */
+  Console_Print("PROGRAM START\r\n");
+
+  /* Stop program */
+  Console_Print("PROGRAM STOP\r\n");
+
+  while (1)
+  {
+    /* code */
+  }
+  
+  return (0);
+} /* End of main() function */
+
+
+void Port_PostInitGpioIntClearSequence(uint32 portBaseAddr, uint32 pinMask)
+{
+    volatile PortReg_t* pPortRegs;
+
+    if (portBaseAddr == (uint32)0u)
+    {
+        return;
+    }
+
+    pPortRegs = (volatile PortReg_t*)portBaseAddr;
+
+    /* Clear interrupt pending bits */
+    pPortRegs->INTCLRn = pinMask;
+
+    /* Clear interrupt mask bits */
+    pPortRegs->MSKCLRn = pinMask;
+}
+
+
+void PORT1_IRQHandler(void)
+{
+  volatile PortReg_t* pPORT1;
+  pPORT1 = (volatile PortReg_t*)PORT1_BASE_ADDR;
+  if (pPORT1->INTDTn & GP1_24_BIT)
+  {
+      /* Clear first */
+      pPORT1->INTCLRn = GP1_24_BIT;
+      Console_Print("[PORT1_IRQHandler] [GP1_24 IRQ] \r\n");
+  }
+  else if (pPORT1->INTDTn & GP1_25_BIT)
+  {
+      /* Clear first */
+      pPORT1->INTCLRn = GP1_25_BIT;
+      Console_Print("[PORT1_IRQHandler] [GP1_25 IRQ] \r\n");
+  }
+}
+
+void Enable_CPG_Protection(void)
+{
+  /* Set inverted writing value of CPGWPCR to CPGWPR */
+  REG_CPGWPR = (uint32)(~CPG_ENABLE_PROTECTION);
+  /* Disable CPG protection */
+  REG_CPGWPCR = CPG_ENABLE_PROTECTION;
+  return;
+}
+
+void Disable_CPG_Protection(void)
+{
+  /* Set inverted writing value of CPGWPCR to CPGWPR */
+  REG_CPGWPR = (uint32)(~CPG_DISABLE_PROTECTION);
+  /* Disable CPG protection */
+  REG_CPGWPCR = CPG_DISABLE_PROTECTION;
+  return;
+}
+
+void Write_CPGRegister(uint32 address, uint32 value)
+{
+  volatile uint32 *reg = (volatile uint32 *)address;
+  REG_CPGWPR = ~(value);
+  *reg = value;
+  return;
+}
+
+void GPIO_Start_Module(void)
+{
+  Write_CPGRegister(REG_RMSTPCR9_ADDR, REG_RMSTPCR9 & (uint32)(~(0xF << 15)));
+}
+
+void Mcu_Init(void)
+{
+  Disable_CPG_Protection();
+  GPIO_Start_Module();
+  return;
+}
+
+void Interrupt_Init(void)
+{
+  /* disable interrupts in the CR processor */
+  cpuirq_disable();
+
+  Interrupt_Config();
+
+  /* Enable interrupt*/
+  Interrupt_Enable(GP1_INTERRUPT_SPI + 32UL);
+
+  /* enable interrupts in the CR processor */
+  cpuirq_enable();
+}
+
+void Wdg_Init(void)
+{
+  /* Do nothing */
+  return;
+}
+
+void Disable_MFIS_Protection(void)
+{
+  MFISWPCNTR = MFIS_DISABLE_PROTECTION;
+  return;
+}
+/*******************************************************************************
+**                      End of File                                           **
+*******************************************************************************/

Customer/MOBIS/PRK3_(ADAS_Parking3)/Issue/External IRQ/20260605_debug_code/Code.txt

@@ -0,0 +1,261 @@
+<EFBFBD><EFBFBD><EFBFBD><EFBFBD> Tool<6F><6C><EFBFBD><EFBFBD> OS<4F>ʿ<EFBFBD><CABF><EFBFBD> <20><><EFBFBD>ͷ<EFBFBD>Ʈ <20><>ȣ<EFBFBD><C8A3> <20><><EFBFBD><EFBFBD><EFBFBD>ϰ<EFBFBD> 
+OS<EFBFBD><EFBFBD><EFBFBD>ÿ<EFBFBD> <20><><EFBFBD>ͷ<EFBFBD>Ʈ <20>Լ<EFBFBD><D4BC><EFBFBD> <20><><EFBFBD><EFBFBD> <20>ؾ<EFBFBD><D8BE>Ѵ<EFBFBD>.
+
+<EFBFBD>׸<EFBFBD><EFBFBD><EFBFBD> <20>ڵ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>Ʒ<EFBFBD><C6B7><EFBFBD> <20><><EFBFBD><EFBFBD> <20>ߴ<EFBFBD>.
+
+
+
+#include "Platform_Types.h"
+ 
+#ifndef RENESAS_TEMP_H
+#define RENESAS_TEMP_H
+/*******************************************************************************
+**                      Global Symbols                                        **
+*******************************************************************************/
+typedef struct Stag_PortReg_t {
+  uint32 PMMRn;           /* 000  LSI Multiplexed Pin Setting Mask Register */
+  uint32 PMMERn;          /* 004  LSI Multiplexed Pin Setting Mask Enable Register */
+  uint32 Reverse1[6];     /* 008 + (4 * 6) */
+  uint32 DM0PRn;          /* 020  Domain protection register 0 */
+  uint32 DM1PRn;          /* 024  Domain protection register 1 */
+  uint32 DM2PRn;          /* 028  Domain protection register 2 */
+  uint32 DM3PRn;          /* 02C  Domain protection register 3 */
+  uint32 Reverse2[4];     /* 030 + (4 * 4) */
+  uint32 GPSRn;           /* 040  GPIO/Peripheral Function Select register */
+  uint32 Reverse3[7];     /* 044 + (4 * 7) */
+  uint32 IP0SRn;          /* 060  Peripheral Function Select register 0 */
+  uint32 IP1SRn;          /* 064  Peripheral Function Select register 1 */
+  uint32 IP2SRn;          /* 068  Peripheral Function Select register 2 */
+  uint32 IP3SRn;          /* 06C  Peripheral Function Select register 3 */
+  uint32 Reverse4[4];     /* 070 + (4 * 4) */
+  uint32 DRV0CTRLn;       /* 080  DRV control register 0 */
+  uint32 DRV1CTRLn;       /* 084  DRV control register 1 */
+  uint32 DRV2CTRLn;       /* 088  DRV control register 2 */
+  uint32 DRV3CTRLn;       /* 08C  DRV control register 3 */
+  uint32 Reverse5[4];     /* 090 + (4 * 4) */
+  uint32 POCn;            /* 0A0  POC control register */
+  uint32 Reverse6[7];     /* 0A4 + (4 * 7) */
+  uint32 PUENn;           /* 0C0  LSI pin pull-enable register */
+  uint32 Reverse7[7];     /* 0C4 + (4 * 7) */
+  uint32 PUDn;            /* 0E0  LSI pin pull-up/down control register */
+  uint32 Reverse8[7];     /* 0E4 + (4 * 7) */
+  uint32 MODSELn;         /* 100  Module select register */
+  uint32 Reverse9[7];     /* 104 + (4 * 7) */
+  uint32 TD0SELn;         /* 120  TDSEL Control Register 0 */
+  uint32 TD1SELn;         /* 124  TDSEL Control Register 1 */
+  uint32 Reverse10[14];   /* 128 + (4 * 14) */
+  uint32 PSERn;           /* 160  Port Safe state Enable Register */
+  uint32 PS0SRn;          /* 164  Port Safe state Enable Register 0 */
+  uint32 PS1SRn;          /* 168  Port Safe state Enable Register 0 */
+  uint32 Reverse11[5];    /* 16C + (4 * 5) */
+  uint32 IOINTSELn;       /* 180  General IO/interrupt switching register */
+  uint32 INOUTSELn;       /* 184  General input/output switching register */
+  uint32 OUTDTn;          /* 188  General output register */
+  uint32 INDTn;           /* 18C  General input register */
+  uint32 INTDTn;          /* 190  Interrupt display register */
+  uint32 INTCLRn;         /* 194  Interrupt clear register */
+  uint32 INTMSKn;         /* 198  Interrupt mask register */
+  uint32 MSKCLRn;         /* 19C  Interrupt Mask Clear Register */
+  uint32 POSNEGn;         /* 1A0  Positive/negative logic select register */
+  uint32 EDGLEVELn;       /* 1A4  Edge/level select register 0 */
+  uint32 FILONOFFn;       /* 1A8  Chattering prevention on/off register */
+  uint32 FILCLKSELn;      /* 1AC  Chattering prevention clock select register */
+  uint32 Reverse12[4];    /* 1B0 + (4 * 4) */
+  uint32 OUTDTSELn;       /* 1C0  Output data select register */
+  uint32 OUTDTHn;         /* 1C4  Output data high register */
+  uint32 OUTDTLn;         /* 1C8  Output data low register */
+  uint32 BOTHEDGEn;       /* 1CC  One edge/both edge select register */
+  uint32 INENn;           /* 1D0  General input enable register */
+} PortReg_t;
+ 
+#define PORT0_BASE_ADDR (uint32)0xE6050000UL
+#define PORT1_BASE_ADDR (uint32)0xE6050800UL
+#define PORT4_BASE_ADDR (uint32)0xE6060000UL
+#define PORT8_BASE_ADDR (uint32)0xE6068000UL
+ 
+#define GP1_20_BIT (0x1U << 20)
+#define GP0_6_BIT (0x1U << 6)
+#define GP4_16_BIT (0x1U << 16)
+#define GP8_6_BIT (0x1U << 6)
+#define GP8_7_BIT (0x1U << 7)
+ 
+// STD_ON STD_OFF
+#define PMIC_IRQ_GP1_20_BIT      STD_ON
+#define PMIC_IRQ_GP1_20_BI1_DIO  STD_OFF
+ 
+void Port_PostInitGpioIntClearSequence(uint32 portBaseAddr, uint32 pinMask);
+void PMIC_HW_ISR_CAT2_ISR(void);
+ 
+ 
+ 
+#endif
+ 
+ void CtCdSDL_Init(void)
+{
+  /**********************************************************************************************************************
+   * DO NOT CHANGE THIS COMMENT!           << Start of runnable implementation >>             DO NOT CHANGE THIS COMMENT!
+   * Symbol: CtCdSDL_Smmgr_Init
+   *********************************************************************************************************************/
+ 
+  #if (PMIC_IRQ_GP1_20_BIT == STD_ON)
+    Interrupt_Enable(623+32);
+  #endif
+ 
+   extern void CtCdSDL_Smmgr_Init(void);
+   CtCdSDL_Smmgr_Init();
+  /**********************************************************************************************************************
+   * DO NOT CHANGE THIS COMMENT!           << End of runnable implementation >>               DO NOT CHANGE THIS COMMENT!
+   *********************************************************************************************************************/
+}
+ 
+  #if(PMIC_QnA_WDG == STD_ON)
+    //RAA271005_WDG_Disable();
+    //RAA271005_MDF_Mode();
+    RAA271005_Fault_Mask(); 012c-> 0xFF??
+    Pmic_RAA271005_Main(); /* Initialize PMIC Watchdog - Tharun*/
+ 
+    RAA271005_Flult_Register_Clear();
+ 
+    #if (PMIC_IRQ_GP1_20_BIT == STD_ON)
+ 
+      Port_PostInitGpioIntClearSequence(PORT1_BASE_ADDR ,GP1_20_BIT);
+ 
+    #endif
+ 
+  if(test_pmic_clrear==1)
+  {
+    RAA271005_Flult_Register_Clear();
+ 
+    test_pmic_clrear=0;
+  }  
+ 
+ 
+uint8 RAA271005_Flult_Register_Clear(void)
+{
+        uint8 retVal = PMIC_RETVAL_FAIL;
+        uint8 read_reg_retval = 0;
+ 
+        #if 0
+         /*0x107 - WDT_CFG0 Enable WDG*/
+        LucSendData[0] = PMIC_REG_IO_PAGE_8_BIT_REG;
+        LucSendData[1] = PMIC_REG_GET_PAGE(PMIC_REG_WDT_CFG0);
+        LucSendData[2] = PMIC_REG_GET_ADDR(PMIC_REG_WDT_CFG0);
+        LucSendData[3] = PMIC_REG_WDT_CFG0_WWDT_EN_Disable | PMIC_REG_WDT_CFG0_WWDT_ADV_4Q | PMIC_REG_WDT_CFG0_ADV_MODE; //0x05
+ 
+        read_reg_retval = IIC_CRC_WritetoProtReg_operation(LucSendData);
+#endif
+        /* Regulation Part Register Read Slave Address 0x54*/
+        LucSendData[0] =    0x00;
+        LucSendData[1] =    0x00;
+        IIC_CRC_WritetoReguReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x00;
+        LucSendData[1] =    0x00;
+        IIC_CRC_WritetoReguReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x00;
+        IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
+       
+        LucSendData[0] =    0x40;
+        IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
+       
+        LucSendData[0] =    0x41;
+        IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x42;
+        IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x43;
+        IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x44;
+        IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x45;
+        IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x46;
+        IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x47;
+        IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x48;
+        IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x49;
+        IIC_CRC_ReadFromReguReg_operation_1Byte(LucSendData);
+ 
+       /* Protection Part Register Read Slave Address 0x55*/
+        LucSendData[0] =    0x00;
+        LucSendData[1] =    0x00;
+        IIC_CRC_WritetoProtReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x00;
+        LucSendData[1] =    0x00;
+        IIC_CRC_WritetoProtReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x14;
+        IIC_ReadFromProtReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x19;
+        IIC_ReadFromProtReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x1A;
+        IIC_ReadFromProtReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x1B;
+        IIC_ReadFromProtReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x1C;
+        IIC_ReadFromProtReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x1D;
+        IIC_ReadFromProtReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x1E;
+        IIC_ReadFromProtReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x1F;
+        IIC_ReadFromProtReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x20;
+        IIC_ReadFromProtReg_operation_1Byte(LucSendData);
+ 
+        LucSendData[0] =    0x21;
+        IIC_ReadFromProtReg_operation_1Byte(LucSendData);
+       
+        LucSendData[0] =    0x2A;
+        IIC_ReadFromProtReg_operation_1Byte(LucSendData);
+    #if 0
+        LucSendData[0] = 0x00;
+        LucSendData[1] = 0x01;
+        LucSendData[2] = 0x02;
+        LucSendData[3] = 0x65;
+       
+        read_reg_retval = IIC_CRC_WritetoProtReg_operation(LucSendData);
+    #endif
+        return retVal;
+}
+ 
+ 
+ISR(PMIC_HW_ISR_CAT2_ISR)
+//void PMIC_HW_ISR_CAT2_ISR(void)
+{
+  volatile PortReg_t* pPORT;
+ 
+  u32_PMIC_IRQ_Count_flag++;
+ 
+#if (PMIC_IRQ_GP1_20_BIT == STD_ON)
+    pPORT = (volatile PortReg_t*)PORT1_BASE_ADDR;
+    if (pPORT->INTDTn & GP1_20_BIT)
+    {
+        u32_PMIC_IRQ_Count++;
+ 
+        pPORT->INTCLRn = GP1_20_BIT;
+    }
+#endif
+}
+ 
+ 
+

Customer/MOBIS/PRK3_(ADAS_Parking3)/Issue/SPI_Multi_Core/Patch_MCAL_Ver_19.4.0/Multi_Core_SPI_Patch_20260521/spi_patch_v2_19_4_0.patch

@@ -0,0 +1,863 @@
+diff --git a/rel/modules/spi/include/Spi_Ram.h b/rel/modules/spi/include/Spi_Ram.h
+index 8a37e48a36..cdaafc3c7e 100644
+--- a/rel/modules/spi/include/Spi_Ram.h
++++ b/rel/modules/spi/include/Spi_Ram.h
+@@ -205,6 +205,31 @@ extern volatile VAR(Spi_EBDataType, SPI_VAR_NO_INIT)
+ #define SPI_START_SEC_VAR_NO_INIT_32
+ #include "Spi_MemMap.h"
+ 
++#if (SPI_SUPPORT_CONCURRENT_ASYNC_TRANSMIT == STD_ON)
++/* Phase 02: per-HW-unit arrays replacing the packed scalar bitmask.
++ * Each element stores 0U (inactive) or 1U (active) for that HW unit index.
++ * No cache-line padding <20> SchM critical sections remain the cross-core guard.
++ * Precedent: Spi_GaaHWStatus uses the same volatile VAR(uint32,...) pattern. */
++
++/* Per-HW-unit sync-active flags (index = ucHWUnitIndex) */
++extern volatile VAR(uint32, SPI_VAR_NO_INIT) Spi_GaaSyncActiveHWUnits[SPI_MAX_HWUNIT];
++/* Per-HW-unit async-active flags (index = ucHWUnitIndex) */
++extern volatile VAR(uint32, SPI_VAR_NO_INIT) Spi_GaaAsyncActiveHWUnits[SPI_MAX_HWUNIT];
++
++#if ((SPI_LEVEL_DELIVERED == SPI_LEVEL_1) || (SPI_LEVEL_DELIVERED == SPI_LEVEL_2))
++/* Per-queue active flags (index = queue index; slot 0 is reserved, never read/written) */
++extern volatile VAR(uint32, SPI_VAR_NO_INIT) Spi_GaaAllQueueSts[SPI_MAX_QUEUE];
++#endif
++
++#if ((SPI_LEVEL_DELIVERED == SPI_LEVEL_2) && (SPI_FORCE_CANCEL_API == STD_ON))
++/* Per-HW-unit cancel flags */
++extern volatile VAR(uint32, SPI_VAR_NO_INIT) Spi_GaaCancelingHWUnits[SPI_MAX_HWUNIT];
++#endif
++
++#else /* SPI_SUPPORT_CONCURRENT_ASYNC_TRANSMIT == STD_OFF */
++/* Legacy scalar bitmask storage <20> byte-identical to pre-Phase-02 behaviour.
++ * Bit layout: lower 16 bits = sync-active per HW unit, upper 16 bits = async-active. */
++
+ /* Bit array indicates active HW unit index
+ - The lower 16-bits are for synchronous transmission
+ - The upper 16-bits are for asynchronous transmission */
+@@ -214,10 +239,26 @@ extern volatile VAR(uint32, SPI_VAR_NO_INIT) Spi_GulActiveHWUnits;
+   (SPI_LEVEL_DELIVERED == SPI_LEVEL_2))
+ /* Bit array indicates active Queues */
+ extern volatile VAR(uint32, SPI_VAR_NO_INIT) Spi_GulAllQueueSts;
++#endif
++
++#if ((SPI_LEVEL_DELIVERED == SPI_LEVEL_2) && (SPI_FORCE_CANCEL_API == STD_ON))
++/* Bit array indicates HWUnits is being canceled by Spi_ForceCacel */
++extern volatile VAR(uint32, SPI_VAR_NO_INIT) Spi_GulCancelingHWUnits;
++#endif
++
++#endif /* SPI_SUPPORT_CONCURRENT_ASYNC_TRANSMIT */
++
+ /* Bit array indicates active Sequences */
++#if ((SPI_LEVEL_DELIVERED == SPI_LEVEL_1) || \
++  (SPI_LEVEL_DELIVERED == SPI_LEVEL_2))
++#if (SPI_SUPPORT_CONCURRENT_ASYNC_TRANSMIT == STD_ON)
++extern volatile VAR(uint32, SPI_VAR_NO_INIT)
++  Spi_GaaActiveSequence[SPI_MAX_HWUNIT][SPI_BITS_TO_WORDS(SPI_MAX_SEQUENCE)];
++#else
+ extern volatile VAR(uint32, SPI_VAR_NO_INIT)
+   Spi_GaaActiveSequence[SPI_BITS_TO_WORDS(SPI_MAX_SEQUENCE)];
+ #endif
++#endif
+ 
+ #if (SPI_MAX_CHANNEL_BUFFER_SIZE > 0U)
+ /* Channel buffer, includes all tx and rx buffers for all channels
+@@ -231,14 +272,379 @@ extern volatile VAR(uint32, SPI_VAR_NO_INIT)
+ extern volatile VAR(uint32, SPI_VAR_NO_INIT) Spi_GulDmaRxData;
+ #endif
+ 
+-#if ((SPI_LEVEL_DELIVERED == SPI_LEVEL_2) && (SPI_FORCE_CANCEL_API == STD_ON))
+-/* Bit array indicates HWUnits is being canceled by Spi_ForceCacel */
+-extern volatile VAR(uint32, SPI_VAR_NO_INIT) Spi_GulCancelingHWUnits;
+-#endif
+-
++/*===========================================================================*/
++/* CRITICAL FIX: Close the VAR_NO_INIT_32 section HERE <20> before any inline  */
++/* function definitions. Inline functions must NOT be inside a MemMap        */
++/* section, as they are code, not data. Placing SPI_STOP_SEC_VAR_NO_INIT_32  */
++/* inside a conditional #if block (as in the broken version) causes the      */
++/* section to remain open when that condition is false, which puts the        */
++/* static inline functions into the data section and triggers the            */
++/* "section type conflict" error from the compiler.                          */
++/*===========================================================================*/
+ #define SPI_STOP_SEC_VAR_NO_INIT_32
+ #include "Spi_MemMap.h"
+ 
++/*******************************************************************************
++**  Phase 02: Macro abstraction layer <20> diverges on SPI_SUPPORT_CONCURRENT_   **
++**  ASYNC_TRANSMIT. STD_ON uses per-HW-unit arrays; STD_OFF uses the legacy   **
++**  packed scalar bitmask. Call sites are identical in both configurations.   **
++**                                                                            **
++**  NOTE: All inline functions and macros below are intentionally placed      **
++**  OUTSIDE any MemMap section bracket.                                       **
++*******************************************************************************/
++
++#define SPI_START_SEC_PRIVATE_CODE
++#include "Spi_MemMap.h"
++#if (SPI_SUPPORT_CONCURRENT_ASYNC_TRANSMIT == STD_ON)
++
++/* ---- Inline helper functions (STD_ON only) --------------------------------
++ * Placed here (header) so they are available to all TUs that include Spi_Ram.h.
++ * Using 'static' since LOCAL_INLINE is not defined in this module's headers.
++ * Each helper is O(SPI_MAX_HWUNIT) <20> bounded small N; used in MainFunction-class
++ * paths only. */
++
++/* Returns TRUE if any element of Spi_GaaSyncActiveHWUnits is non-zero. */
++static inline FUNC(boolean, SPI_PRIVATE_CODE) Spi_AnySyncActive(void)
++{
++  uint32 LulIdx;
++  boolean LboResult = FALSE;
++  for (LulIdx = 0U; LulIdx < (uint32)SPI_MAX_HWUNIT; LulIdx++)
++  {
++    if (Spi_GaaSyncActiveHWUnits[LulIdx] != 0U)
++    {
++      LboResult = TRUE;
++      break;
++    }
++  }
++  return LboResult;
++}
++
++/* Returns TRUE if any HW unit set in LulMask (HW-unit bitmask) is sync-active. */
++static inline FUNC(boolean, SPI_PRIVATE_CODE) Spi_AnySyncActiveIn(uint32 LulMask)
++{
++  uint32 LulIdx;
++  boolean LboResult = FALSE;
++  for (LulIdx = 0U; LulIdx < (uint32)SPI_MAX_HWUNIT; LulIdx++)
++  {
++    if ((LulMask & (1UL << LulIdx)) != 0UL)
++    {
++      if (Spi_GaaSyncActiveHWUnits[LulIdx] != 0U)
++      {
++        LboResult = TRUE;
++        break;
++      }
++    }
++  }
++  return LboResult;
++}
++
++/* Sets sync-active flag for every HW unit set in LulMask. */
++static inline FUNC(void, SPI_PRIVATE_CODE) Spi_ApplySyncMaskSet(uint32 LulMask)
++{
++  uint32 LulIdx;
++  for (LulIdx = 0U; LulIdx < (uint32)SPI_MAX_HWUNIT; LulIdx++)
++  {
++    if ((LulMask & (1UL << LulIdx)) != 0UL)
++    {
++      Spi_GaaSyncActiveHWUnits[LulIdx] = 1U;
++    }
++  }
++}
++
++/* Clears sync-active flag for every HW unit set in LulMask. */
++static inline FUNC(void, SPI_PRIVATE_CODE) Spi_ApplySyncMaskClr(uint32 LulMask)
++{
++  uint32 LulIdx;
++  for (LulIdx = 0U; LulIdx < (uint32)SPI_MAX_HWUNIT; LulIdx++)
++  {
++    if ((LulMask & (1UL << LulIdx)) != 0UL)
++    {
++      Spi_GaaSyncActiveHWUnits[LulIdx] = 0U;
++    }
++  }
++}
++
++/* Returns TRUE if any element of Spi_GaaAsyncActiveHWUnits is non-zero. */
++static inline FUNC(boolean, SPI_PRIVATE_CODE) Spi_AnyAsyncActive(void)
++{
++  uint32 LulIdx;
++  boolean LboResult = FALSE;
++  for (LulIdx = 0U; LulIdx < (uint32)SPI_MAX_HWUNIT; LulIdx++)
++  {
++    if (Spi_GaaAsyncActiveHWUnits[LulIdx] != 0U)
++    {
++      LboResult = TRUE;
++      break;
++    }
++  }
++  return LboResult;
++}
++
++/* Returns TRUE if any HW unit set in LulMask (HW-unit bitmask) is async-active. */
++static inline FUNC(boolean, SPI_PRIVATE_CODE) Spi_AnyAsyncActiveIn(uint32 LulMask)
++{
++  uint32 LulIdx;
++  boolean LboResult = FALSE;
++  for (LulIdx = 0U; LulIdx < (uint32)SPI_MAX_HWUNIT; LulIdx++)
++  {
++    if ((LulMask & (1UL << LulIdx)) != 0UL)
++    {
++      if (Spi_GaaAsyncActiveHWUnits[LulIdx] != 0U)
++      {
++        LboResult = TRUE;
++        break;
++      }
++    }
++  }
++  return LboResult;
++}
++
++#if ((SPI_LEVEL_DELIVERED == SPI_LEVEL_1) || (SPI_LEVEL_DELIVERED == SPI_LEVEL_2))
++/* Returns TRUE if any queue slot [1..SPI_MAX_QUEUE) is active.
++ * Slot 0 is reserved/unused and intentionally skipped. */
++static inline FUNC(boolean, SPI_PRIVATE_CODE) Spi_AnyQueueActive(void)
++{
++  uint32 LulIdx;
++  boolean LboResult = FALSE;
++  for (LulIdx = 1U; LulIdx < (uint32)SPI_MAX_QUEUE; LulIdx++)
++  {
++    if (Spi_GaaAllQueueSts[LulIdx] != 0U)
++    {
++      LboResult = TRUE;
++      break;
++    }
++  }
++  return LboResult;
++}
++#endif /* (SPI_LEVEL_DELIVERED == SPI_LEVEL_1) || (SPI_LEVEL_DELIVERED == SPI_LEVEL_2) */
++
++#if ((SPI_LEVEL_DELIVERED == SPI_LEVEL_2) && (SPI_FORCE_CANCEL_API == STD_ON))
++/* Returns TRUE if any element of Spi_GaaCancelingHWUnits is non-zero. */
++static inline FUNC(boolean, SPI_PRIVATE_CODE) Spi_AnyCancelHW(void)
++{
++  uint32 LulIdx;
++  boolean LboResult = FALSE;
++  for (LulIdx = 0U; LulIdx < (uint32)SPI_MAX_HWUNIT; LulIdx++)
++  {
++    if (Spi_GaaCancelingHWUnits[LulIdx] != 0U)
++    {
++      LboResult = TRUE;
++      break;
++    }
++  }
++  return LboResult;
++}
++
++/* Sets cancel flag for every HW unit set in LulMask. */
++static inline FUNC(void, SPI_PRIVATE_CODE) Spi_ApplyCancelMaskSet(uint32 LulMask)
++{
++  uint32 LulIdx;
++  for (LulIdx = 0U; LulIdx < (uint32)SPI_MAX_HWUNIT; LulIdx++)
++  {
++    if ((LulMask & (1UL << LulIdx)) != 0UL)
++    {
++      Spi_GaaCancelingHWUnits[LulIdx] = 1U;
++    }
++  }
++}
++
++/* Clears cancel flag for every HW unit set in LulMask. */
++static inline FUNC(void, SPI_PRIVATE_CODE) Spi_ApplyCancelMaskClr(uint32 LulMask)
++{
++  uint32 LulIdx;
++  for (LulIdx = 0U; LulIdx < (uint32)SPI_MAX_HWUNIT; LulIdx++)
++  {
++    if ((LulMask & (1UL << LulIdx)) != 0UL)
++    {
++      Spi_GaaCancelingHWUnits[LulIdx] = 0U;
++    }
++  }
++}
++#endif /* (SPI_LEVEL_DELIVERED == SPI_LEVEL_2) && (SPI_FORCE_CANCEL_API == STD_ON) */
++
++#if ((SPI_LEVEL_DELIVERED == SPI_LEVEL_1) || (SPI_LEVEL_DELIVERED == SPI_LEVEL_2))
++/* Returns the index of the primary (lowest-bit) HW unit assigned to a
++ * sequence in Spi_GpFirstSeq[seq].ulUsingHWUnits. Used to pick the row
++ * for set/clear so they target the SAME storage word.
++ * Caller guarantees ulUsingHWUnits != 0 (generator output). */
++static inline FUNC(uint32, SPI_PRIVATE_CODE)
++  Spi_SeqPrimaryHwUnit(uint32 LulSeqIndex)
++{
++  uint32 LulMask = Spi_GpFirstSeq[LulSeqIndex].ulUsingHWUnits;
++  uint32 LulIdx = 0U;
++  while (0U == (LulMask & 1UL))
++  {
++    LulMask >>= 1;
++    LulIdx++;
++  }
++  return LulIdx;
++}
++
++/* Returns the OR of word LulWordIdx across all HW-unit rows. Read path
++ * for the active-sequence bitmask. */
++static inline FUNC(uint32, SPI_PRIVATE_CODE)
++  Spi_GetActiveSeqWord(uint32 LulWordIdx)
++{
++  uint32 LulHw;
++  uint32 LulOr = 0U;
++  for (LulHw = 0U; LulHw < (uint32)SPI_MAX_HWUNIT; LulHw++)
++  {
++    LulOr |= Spi_GaaActiveSequence[LulHw][LulWordIdx];
++  }
++  return LulOr;
++}
++#endif /* (SPI_LEVEL_DELIVERED == SPI_LEVEL_1) || (SPI_LEVEL_DELIVERED == SPI_LEVEL_2) */
++
++/* ---- Macro layer (STD_ON) <20> per-cell direct access + helper calls --------- */
++
++/* SYNC active HW units */
++#define SPI_GET_SYNC_ACTIVE(hw)         (Spi_GaaSyncActiveHWUnits[(hw)])
++#define SPI_SET_SYNC_ACTIVE(hw)         (Spi_GaaSyncActiveHWUnits[(hw)] = 1U)
++#define SPI_CLR_SYNC_ACTIVE(hw)         (Spi_GaaSyncActiveHWUnits[(hw)] = 0U)
++#define SPI_APPLY_SYNC_MASK_SET(mask)   Spi_ApplySyncMaskSet(mask)
++#define SPI_APPLY_SYNC_MASK_CLR(mask)   Spi_ApplySyncMaskClr(mask)
++#define SPI_ANY_SYNC_ACTIVE()           Spi_AnySyncActive()
++#define SPI_ANY_SYNC_ACTIVE_IN(mask)    Spi_AnySyncActiveIn(mask)
++
++/* ASYNC active HW units */
++#define SPI_GET_ASYNC_ACTIVE(hw)        (Spi_GaaAsyncActiveHWUnits[(hw)])
++#define SPI_SET_ASYNC_ACTIVE(hw)        (Spi_GaaAsyncActiveHWUnits[(hw)] = 1U)
++#define SPI_CLR_ASYNC_ACTIVE(hw)        (Spi_GaaAsyncActiveHWUnits[(hw)] = 0U)
++#define SPI_ANY_ASYNC_ACTIVE()          Spi_AnyAsyncActive()
++#define SPI_ANY_ASYNC_ACTIVE_IN(mask)   Spi_AnyAsyncActiveIn(mask)
++
++/* Combined: any HW unit active (sync or async) */
++#define SPI_ANY_HW_ACTIVE()             (Spi_AnySyncActive() || Spi_AnyAsyncActive())
++
++/* Queue status (per-queue-index; slot 0 is reserved <20> callers must use index >= 1) */
++#define SPI_GET_QUEUE_STATUS(q)         (Spi_GaaAllQueueSts[(q)])
++#define SPI_SET_QUEUE_STATUS(q)         (Spi_GaaAllQueueSts[(q)] = 1U)
++#define SPI_CLR_QUEUE_STATUS(q)         (Spi_GaaAllQueueSts[(q)] = 0U)
++#define SPI_ANY_QUEUE_ACTIVE()          Spi_AnyQueueActive()
++
++/* Canceling HW units */
++#define SPI_GET_CANCEL_HW(hw)           (Spi_GaaCancelingHWUnits[(hw)])
++#define SPI_APPLY_CANCEL_MASK_SET(mask) Spi_ApplyCancelMaskSet(mask)
++#define SPI_APPLY_CANCEL_MASK_CLR(mask) Spi_ApplyCancelMaskClr(mask)
++#define SPI_ANY_CANCEL_HW()             Spi_AnyCancelHW()
++
++/* Init macros (STD_ON) <20> zero-fill all cells including reserved slot 0 of queue array */
++#define SPI_INIT_ACTIVE_HWUNITS() \
++  do { \
++    uint32 LulInitIdx; \
++    for (LulInitIdx = 0U; LulInitIdx < (uint32)SPI_MAX_HWUNIT; LulInitIdx++) \
++    { \
++      Spi_GaaSyncActiveHWUnits[LulInitIdx] = 0U; \
++      Spi_GaaAsyncActiveHWUnits[LulInitIdx] = 0U; \
++    } \
++  } while (0)
++
++#define SPI_INIT_ALLQUEUE_STS() \
++  do { \
++    uint32 LulInitIdx; \
++    for (LulInitIdx = 0U; LulInitIdx < (uint32)SPI_MAX_QUEUE; LulInitIdx++) \
++    { \
++      Spi_GaaAllQueueSts[LulInitIdx] = 0U; \
++    } \
++  } while (0)
++
++#define SPI_INIT_CANCEL_HWUNITS() \
++  do { \
++    uint32 LulInitIdx; \
++    for (LulInitIdx = 0U; LulInitIdx < (uint32)SPI_MAX_HWUNIT; LulInitIdx++) \
++    { \
++      Spi_GaaCancelingHWUnits[LulInitIdx] = 0U; \
++    } \
++  } while (0)
++
++/* Active sequence bitmask <20> per-HW-unit rows (STD_ON).
++ * Read merges across rows; set/clear target the primary HW-unit row so
++ * a sequence's bit lives in exactly one row, eliminating bit leaks for
++ * sequences whose ulUsingHWUnits spans multiple HW units. */
++#define SPI_ACTIVE_SEQ_WORD(w)          Spi_GetActiveSeqWord(w)
++#define SPI_SET_ACTIVE_SEQ(seq) \
++  (Spi_GaaActiveSequence[Spi_SeqPrimaryHwUnit((uint32)(seq))] \
++    [(uint32)(seq) / (uint32)SPI_UINT32_BITS] |= \
++    (1UL << ((uint32)(seq) & ((uint32)SPI_UINT32_BITS - 1U))))
++#define SPI_CLR_ACTIVE_SEQ(seq) \
++  (Spi_GaaActiveSequence[Spi_SeqPrimaryHwUnit((uint32)(seq))] \
++    [(uint32)(seq) / (uint32)SPI_UINT32_BITS] &= \
++    ~(1UL << ((uint32)(seq) & ((uint32)SPI_UINT32_BITS - 1U))))
++#define SPI_INIT_ACTIVE_SEQ() \
++  do { \
++    uint32 LulHw; \
++    uint32 LulW; \
++    for (LulHw = 0U; LulHw < (uint32)SPI_MAX_HWUNIT; LulHw++) \
++    { \
++      for (LulW = 0U; LulW < SPI_BITS_TO_WORDS(SPI_MAX_SEQUENCE); LulW++) \
++      { \
++        Spi_GaaActiveSequence[LulHw][LulW] = 0U; \
++      } \
++    } \
++  } while (0)
++
++#else /* SPI_SUPPORT_CONCURRENT_ASYNC_TRANSMIT == STD_OFF */
++/* Legacy scalar bitmask macro layer <20> byte-identical to pre-Phase-01 behaviour. */
++
++/* SYNC active HW units (low 16 bits of Spi_GulActiveHWUnits) */
++#define SPI_GET_SYNC_ACTIVE(hw)         (Spi_GulActiveHWUnits & (1UL << (hw)))
++#define SPI_SET_SYNC_ACTIVE(hw)         (Spi_GulActiveHWUnits |= (1UL << (hw)))
++#define SPI_CLR_SYNC_ACTIVE(hw)         (Spi_GulActiveHWUnits &= ~(1UL << (hw)))
++#define SPI_APPLY_SYNC_MASK_SET(mask)   (Spi_GulActiveHWUnits |= (mask))
++#define SPI_APPLY_SYNC_MASK_CLR(mask)   (Spi_GulActiveHWUnits &= ~(mask))
++#define SPI_ANY_SYNC_ACTIVE()           ((Spi_GulActiveHWUnits & 0x0000FFFFUL) != 0UL)
++/* Test whether any HW unit in mask (HW-unit bitmask) is currently sync-active. */
++#define SPI_ANY_SYNC_ACTIVE_IN(mask)    ((Spi_GulActiveHWUnits & (mask)) != 0UL)
++
++/* ASYNC active HW units (high 16 bits of Spi_GulActiveHWUnits via SPI_ACTIVE_HW_BITS shift) */
++#define SPI_GET_ASYNC_ACTIVE(hw)        (Spi_GulActiveHWUnits & ((1UL << (hw)) << SPI_ACTIVE_HW_BITS))
++#define SPI_SET_ASYNC_ACTIVE(hw)        (Spi_GulActiveHWUnits |= ((1UL << (hw)) << SPI_ACTIVE_HW_BITS))
++#define SPI_CLR_ASYNC_ACTIVE(hw)        (Spi_GulActiveHWUnits &= ~((1UL << (hw)) << SPI_ACTIVE_HW_BITS))
++#define SPI_ANY_ASYNC_ACTIVE()          ((Spi_GulActiveHWUnits & 0xFFFF0000UL) != 0UL)
++/* Symmetric helper for the async half (mask is the HW-unit bitmask, NOT pre-shifted). */
++#define SPI_ANY_ASYNC_ACTIVE_IN(mask)   ((Spi_GulActiveHWUnits & ((mask) << SPI_ACTIVE_HW_BITS)) != 0UL)
++
++/* Combined: any HW unit active (sync or async) */
++#define SPI_ANY_HW_ACTIVE()             (Spi_GulActiveHWUnits != 0UL)
++
++/* Queue status (per-queue-index, range [1, SPI_MAX_QUEUE)) */
++#define SPI_GET_QUEUE_STATUS(q)         (Spi_GulAllQueueSts & (1UL << (q)))
++#define SPI_SET_QUEUE_STATUS(q)         (Spi_GulAllQueueSts |= (1UL << (q)))
++#define SPI_CLR_QUEUE_STATUS(q)         (Spi_GulAllQueueSts &= ~(1UL << (q)))
++#define SPI_ANY_QUEUE_ACTIVE()          (Spi_GulAllQueueSts != 0UL)
++
++/* Canceling HW units (per-HW-unit) */
++#define SPI_GET_CANCEL_HW(hw)           (Spi_GulCancelingHWUnits & (1UL << (hw)))
++#define SPI_APPLY_CANCEL_MASK_SET(mask) (Spi_GulCancelingHWUnits |= (mask))
++#define SPI_APPLY_CANCEL_MASK_CLR(mask) (Spi_GulCancelingHWUnits &= ~(mask))
++#define SPI_ANY_CANCEL_HW()             (Spi_GulCancelingHWUnits != 0UL)
++
++/* Init macros (STD_OFF) <20> scalar zero-assignment, byte-identical to original init code */
++#define SPI_INIT_ACTIVE_HWUNITS()       (Spi_GulActiveHWUnits = 0U)
++#define SPI_INIT_ALLQUEUE_STS()         (Spi_GulAllQueueSts = 0U)
++#define SPI_INIT_CANCEL_HWUNITS()       (Spi_GulCancelingHWUnits = 0UL)
++
++/* Active sequence bitmask <20> legacy single-row layout (STD_OFF). */
++#define SPI_ACTIVE_SEQ_WORD(w)          (Spi_GaaActiveSequence[(w)])
++#define SPI_SET_ACTIVE_SEQ(seq) \
++  (Spi_GaaActiveSequence[(uint32)(seq) / (uint32)SPI_UINT32_BITS] |= \
++    (1UL << ((uint32)(seq) & ((uint32)SPI_UINT32_BITS - 1U))))
++#define SPI_CLR_ACTIVE_SEQ(seq) \
++  (Spi_GaaActiveSequence[(uint32)(seq) / (uint32)SPI_UINT32_BITS] &= \
++    ~(1UL << ((uint32)(seq) & ((uint32)SPI_UINT32_BITS - 1U))))
++#define SPI_INIT_ACTIVE_SEQ() \
++  do { \
++    uint32 LulW; \
++    for (LulW = 0U; LulW < SPI_BITS_TO_WORDS(SPI_MAX_SEQUENCE); LulW++) \
++    { \
++      Spi_GaaActiveSequence[LulW] = 0U; \
++    } \
++  } while (0)
++
++#endif /* SPI_SUPPORT_CONCURRENT_ASYNC_TRANSMIT */
++#define SPI_STOP_SEC_PRIVATE_CODE
++#include "Spi_MemMap.h"
++
+ /*******************************************************************************
+ **                      Function Prototypes                                   **
+ *******************************************************************************/
+diff --git a/rel/modules/spi/src/MSIOF/Spi_MSIOF_LLDriver.c b/rel/modules/spi/src/MSIOF/Spi_MSIOF_LLDriver.c
+index 9188b8441e..21d321a215 100644
+--- a/rel/modules/spi/src/MSIOF/Spi_MSIOF_LLDriver.c
++++ b/rel/modules/spi/src/MSIOF/Spi_MSIOF_LLDriver.c
+@@ -2666,7 +2666,7 @@ STATIC FUNC(void, SPI_PRIVATE_CODE) Spi_MSIOFProcessEndJob(
+ 
+ #if (SPI_LEVEL_DELIVERED == SPI_LEVEL_2)
+   /* QAC Warning: START Msg(2:2814)-7 */
+-  if (0UL != (Spi_GulActiveHWUnits & (1UL << LpJobConfig->ucHWUnitIndex)))
++  if (SPI_GET_SYNC_ACTIVE(LpJobConfig->ucHWUnitIndex))
+   /* END Msg(2:2814)-7 */
+   {
+     /* When SyncTransmit, scheduling is done by Spi_SyncTransmit */
+@@ -2980,9 +2980,7 @@ STATIC FUNC(void, SPI_PRIVATE_CODE) Spi_MSIOFMainFunction_Handling(void)
+   /* MISRA Violation: START Msg(2:3432)-6 */
+   P2CONST(Spi_JobConfigType, AUTOMATIC, SPI_CONFIG_DATA) LpJobConfig;
+   /* END Msg(2:3432)-6 */
+-  /* MISRA Violation: START Msg(1:1710)-3 */
+   uint32 LulDmaIndex;
+-  /* END Msg(1:1710)-3 */
+   uint32 LulDmaIntFlag;
+   uint32 LulJobIndex;
+ #endif
+@@ -3008,8 +3006,7 @@ STATIC FUNC(void, SPI_PRIVATE_CODE) Spi_MSIOFMainFunction_Handling(void)
+       /* END Msg(2:3469)-12 */
+       if (
+ #if (SPI_FORCE_CANCEL_API == STD_ON)
+-        (0UL ==
+-          (Spi_GulCancelingHWUnits & (1UL << LpDmaConfig->ucSPIHWUnit))) &&
++        (!SPI_GET_CANCEL_HW(LpDmaConfig->ucSPIHWUnit)) &&
+ #endif
+         (0UL != LulDmaIntFlag))
+       {
+@@ -3056,7 +3053,7 @@ STATIC FUNC(void, SPI_PRIVATE_CODE) Spi_MSIOFMainFunction_Handling(void)
+      *  modifying Spi_GulActiveHWUnits. Therefore the re-entrancy between
+      *  Spi_AsyncTransmit and Spi_MainFunction_Handling is not affected.
+      */
+-    if ((0UL == (Spi_GulActiveHWUnits & (1UL << LulHWUnitIndex)))
++    if ((!SPI_GET_SYNC_ACTIVE(LulHWUnitIndex))
+ #if (SPI_FORCE_CANCEL_API == STD_ON)
+     /*
+      *Spi_GulCancelingHWUnits is modified by Spi_ForceCancel,
+@@ -3067,7 +3064,7 @@ STATIC FUNC(void, SPI_PRIVATE_CODE) Spi_MSIOFMainFunction_Handling(void)
+      *Spi_MainFunction_Handling, so Spi_GulCancelHWUnits is never changed
+      *while this function is executing.
+      */
+-      && (0UL == (Spi_GulCancelingHWUnits & (1UL << LulHWUnitIndex)))
++      && (!SPI_GET_CANCEL_HW(LulHWUnitIndex))
+ #endif
+ #if (SPI_DMA_CONFIGURED == STD_ON)
+       /* Check if HW unit is not configured with DMA */
+diff --git a/rel/modules/spi/src/Spi.c b/rel/modules/spi/src/Spi.c
+index 6302eeccc2..d11e66961a 100644
+--- a/rel/modules/spi/src/Spi.c
++++ b/rel/modules/spi/src/Spi.c
+@@ -541,11 +541,11 @@ FUNC(void, SPI_PUBLIC_CODE) Spi_Init(
+ #endif
+ 
+     /* Global variable for active HW unit indexes used by a request transmission */
+-    Spi_GulActiveHWUnits = 0U;
++    SPI_INIT_ACTIVE_HWUNITS();
+ 
+ #if ((SPI_LEVEL_DELIVERED == SPI_LEVEL_1) || (SPI_LEVEL_DELIVERED == SPI_LEVEL_2))
+     /* Initialize Queues */
+-    Spi_GulAllQueueSts = 0U;
++    SPI_INIT_ALLQUEUE_STS();
+     /* MISRA Violation: START Msg(6:2877)-6 */
+     for (LulIndex = 0U; (uint32)SPI_MAX_QUEUE > LulIndex; LulIndex++)
+     /* END Msg(6:2877)-6 */
+@@ -563,15 +563,9 @@ FUNC(void, SPI_PUBLIC_CODE) Spi_Init(
+       }
+     }
+ 
+-    /* MISRA Violation: START Msg(6:2877)-6 */
+-    /* MISRA Violation: START Msg(2:3469)-8 */
+-    for (LulIndex = 0U;
+-      SPI_BITS_TO_WORDS(SPI_MAX_SEQUENCE) > LulIndex; LulIndex++)
+-    /* END Msg(2:3469)-8 */
+-    /* END Msg(6:2877)-6 */
+-    {
+-      Spi_GaaActiveSequence[LulIndex] = 0U;
+-    }
++    /* Active-sequence bitmask init: STD_ON zeros all per-HW rows; STD_OFF
++     * zeros the single legacy row. */
++    SPI_INIT_ACTIVE_SEQ();
+ #endif
+ 
+     /* Initialize HW status */
+@@ -698,7 +692,7 @@ FUNC(void, SPI_PUBLIC_CODE) Spi_Init(
+ 
+ #if ((SPI_LEVEL_DELIVERED == SPI_LEVEL_2) && (SPI_FORCE_CANCEL_API == STD_ON))
+     /* HWUnits under processing by Spi_ForceCancel */
+-    Spi_GulCancelingHWUnits = 0UL;
++    SPI_INIT_CANCEL_HWUNITS();
+ #endif
+ 
+     /* Set Initialized flag */
+@@ -762,7 +756,7 @@ FUNC(Std_ReturnType, SPI_PUBLIC_CODE) Spi_DeInit(void)
+ #endif
+   /* QAC Warning: START Msg(3:3416)-5 */
+   /* Check if there is no HW unit activated */
+-  if (0UL == Spi_GulActiveHWUnits)
++  if (!SPI_ANY_HW_ACTIVE())
+   /* END Msg(3:3416)-5 */
+   {
+     /* Update the SPI driver status as uninitialized */
+@@ -985,10 +979,7 @@ FUNC(Std_ReturnType, SPI_PUBLIC_CODE) Spi_AsyncTransmit(
+   (SPI_AR_VERSION == SPI_AR_1911_VERSION)) && \
+   (SPI_LEVEL_DELIVERED == SPI_LEVEL_2))
+     /* Check if sequence is already used for sync transmission */
+-    /* MISRA Violation: START Msg(7:0404)-9 */
+-    if (0UL != (Spi_GulActiveHWUnits &
+-      Spi_GpFirstSeq[Sequence].ulUsingHWUnits))
+-    /* END Msg(7:0404)-9 */
++    if (SPI_ANY_SYNC_ACTIVE_IN(Spi_GpFirstSeq[Sequence].ulUsingHWUnits))
+     {
+       /* This function shall return with value E_NOT_OK */
+       LucReturnValue = E_NOT_OK;
+@@ -1013,10 +1004,8 @@ FUNC(Std_ReturnType, SPI_PUBLIC_CODE) Spi_AsyncTransmit(
+       /* END Msg(2:3469)-8 */
+       /* END Msg(6:2877)-6 */
+       {
+-        /* MISRA Violation: START Msg(7:0404)-9 */
+-        if (0UL != (Spi_GaaActiveSequence[LulCount] &
++        if (0UL != (SPI_ACTIVE_SEQ_WORD(LulCount) &
+           Spi_GpFirstSeq[Sequence].aaJobSharedSequences[LulCount]))
+-        /* END Msg(7:0404)-9 */
+         {
+           LucReturnValue = E_NOT_OK;
+         }
+@@ -1031,8 +1020,7 @@ FUNC(Std_ReturnType, SPI_PUBLIC_CODE) Spi_AsyncTransmit(
+       {
+         /* QAC Warning: START Msg(2:2844)-1 */
+         /* Set active sequence bit for check shared job in a sub-sequence */
+-        Spi_GaaActiveSequence[(uint32)Sequence / (uint32)SPI_UINT32_BITS] |=
+-          (1UL << ((uint32)Sequence & (uint32)(SPI_UINT32_BITS - 1U)));
++        SPI_SET_ACTIVE_SEQ(Sequence);
+         /* Set sequence status as pending */
+         Spi_GaaSeqStatus[Sequence].enResult = SPI_SEQ_PENDING;
+ #if (SPI_CANCEL_API == STD_ON)
+@@ -1343,7 +1331,7 @@ FUNC(Spi_StatusType, SPI_PUBLIC_CODE) Spi_GetStatus(void)
+     LenRetValue = SPI_UNINIT;
+   }
+   /* QAC Warning: START Msg(3:3416)-5 */
+-  else if (0UL != Spi_GulActiveHWUnits)
++  else if (SPI_ANY_HW_ACTIVE())
+   /* END Msg(3:3416)-5 */
+   {
+     LenRetValue = SPI_BUSY;
+@@ -1639,6 +1627,51 @@ FUNC(Std_ReturnType, SPI_PUBLIC_CODE) Spi_SyncTransmit(
+     SPI_ENTER_CRITICAL_SECTION(SPI_RAM_DATA_PROTECTION);
+     /* QAC Warning: START Msg(2:2814)-2 */
+     /* QAC Warning: START Msg(2:2844)-1 */
++#if (SPI_SUPPORT_CONCURRENT_ASYNC_TRANSMIT == STD_ON)
++    {
++      boolean LboBlocked = FALSE;
++#if (SPI_SUPPORT_CONCURRENT_SYNC_TRANSMIT == STD_ON)
++      /* Check if any HW unit used by this sequence is on-going in a sync transmission */
++      if (SPI_ANY_SYNC_ACTIVE_IN(LpSeqConfig->ulUsingHWUnits))
++      {
++        LboBlocked = TRUE;
++      }
++#else
++      /* Check if any sync transmission is on-going (no per-HW filtering) */
++      if (SPI_ANY_SYNC_ACTIVE())
++      {
++        LboBlocked = TRUE;
++      }
++#endif
++#if (((SPI_AR_VERSION == SPI_AR_431_VERSION) || \
++  (SPI_AR_VERSION == SPI_AR_1911_VERSION)) && \
++  (SPI_LEVEL_DELIVERED == SPI_LEVEL_2))
++      /* Check if any HW unit used by this sequence is on-going in an async transmission */
++      if (SPI_ANY_ASYNC_ACTIVE_IN(LpSeqConfig->ulUsingHWUnits))
++      {
++        LboBlocked = TRUE;
++      }
++#endif
++      if ((FALSE == LboBlocked)
++#if (((SPI_AR_VERSION == SPI_AR_431_VERSION) || \
++  (SPI_AR_VERSION == SPI_AR_1911_VERSION)) && \
++  (SPI_LEVEL_DELIVERED == SPI_LEVEL_2))
++        /* Check if a sequence status is not pending */
++        && (SPI_SEQ_PENDING != Spi_GaaSeqStatus[Sequence].enResult)
++#endif
++        )
++      /* END Msg(2:2844)-1 */
++      /* END Msg(2:2814)-2 */
++      {
++        SPI_APPLY_SYNC_MASK_SET(LpSeqConfig->ulUsingHWUnits);
++        LucReturnValue = E_OK;
++      }
++      else
++      {
++        LucReturnValue = E_NOT_OK;
++      }
++    }
++#else /* SPI_SUPPORT_CONCURRENT_ASYNC_TRANSMIT == STD_OFF */
+     if ((0UL == (Spi_GulActiveHWUnits &
+ #if (SPI_SUPPORT_CONCURRENT_SYNC_TRANSMIT == STD_ON)
+       /* Check if a HW unit in the sequence is on-going in a sync transmission */
+@@ -1664,13 +1697,14 @@ FUNC(Std_ReturnType, SPI_PUBLIC_CODE) Spi_SyncTransmit(
+     /* END Msg(2:2844)-1 */
+     /* END Msg(2:2814)-2 */
+     {
+-      Spi_GulActiveHWUnits |= LpSeqConfig->ulUsingHWUnits;
++      SPI_APPLY_SYNC_MASK_SET(LpSeqConfig->ulUsingHWUnits);
+       LucReturnValue = E_OK;
+     }
+     else
+     {
+       LucReturnValue = E_NOT_OK;
+     }
++#endif /* SPI_SUPPORT_CONCURRENT_ASYNC_TRANSMIT */
+     SPI_EXIT_CRITICAL_SECTION(SPI_RAM_DATA_PROTECTION);
+ 
+     if (E_OK != LucReturnValue)
+@@ -1689,7 +1723,7 @@ FUNC(Std_ReturnType, SPI_PUBLIC_CODE) Spi_SyncTransmit(
+ 
+       /* Release locked HWUnits */
+       SPI_ENTER_CRITICAL_SECTION(SPI_RAM_DATA_PROTECTION);
+-      Spi_GulActiveHWUnits &= ~(LpSeqConfig->ulUsingHWUnits);
++      SPI_APPLY_SYNC_MASK_CLR(LpSeqConfig->ulUsingHWUnits);
+       SPI_EXIT_CRITICAL_SECTION(SPI_RAM_DATA_PROTECTION);
+     }
+   }
+@@ -1860,10 +1894,7 @@ FUNC(void, SPI_PUBLIC_CODE) Spi_Cancel(Spi_SequenceType Sequence)
+ #if ((SPI_AR_VERSION == SPI_AR_431_VERSION) || \
+   (SPI_AR_VERSION == SPI_AR_1911_VERSION))
+     /* Check if sequence is already used for sync transmission */
+-    /* MISRA Violation: START Msg(7:0404)-9 */
+-    if (0UL != (Spi_GulActiveHWUnits &
+-      Spi_GpFirstSeq[Sequence].ulUsingHWUnits))
+-    /* END Msg(7:0404)-9 */
++    if (SPI_ANY_SYNC_ACTIVE_IN(Spi_GpFirstSeq[Sequence].ulUsingHWUnits))
+     {
+       /* Report to DET */
+       SPI_DET_REPORT_RUNTIME_ERROR(SPI_MODULE_ID, SPI_INSTANCE_ID,
+@@ -1939,7 +1970,7 @@ FUNC(Std_ReturnType, SPI_PUBLIC_CODE) Spi_SetAsyncMode(Spi_AsyncModeType Mode)
+   {
+     /* QAC Warning: START Msg(3:3416)-5 */
+     /* Confirm no async task is operating */
+-    if (0UL != Spi_GulAllQueueSts)
++    if (SPI_ANY_QUEUE_ACTIVE())
+     /* END Msg(3:3416)-5 */
+     {
+       LucReturnValue = E_NOT_OK;
+@@ -2130,10 +2161,7 @@ FUNC(void, SPI_PUBLIC_CODE) Spi_ForceCancel(const Spi_SequenceType LucSequence)
+ #if ((SPI_AR_VERSION == SPI_AR_431_VERSION)|| \
+   (SPI_AR_VERSION == SPI_AR_1911_VERSION))
+     /* Check if sequence is already used for sync transmission */
+-  /* MISRA Violation: START Msg(7:0404)-9 */
+-  if (0UL != (Spi_GulActiveHWUnits &
+-    Spi_GpFirstSeq[LucSequence].ulUsingHWUnits))
+-  /* END Msg(7:0404)-9 */
++  if (SPI_ANY_SYNC_ACTIVE_IN(Spi_GpFirstSeq[LucSequence].ulUsingHWUnits))
+   {
+     /* Report to DET */
+     SPI_DET_REPORT_RUNTIME_ERROR(SPI_MODULE_ID, SPI_INSTANCE_ID,
+diff --git a/rel/modules/spi/src/Spi_Ram.c b/rel/modules/spi/src/Spi_Ram.c
+index 7d95b77ef6..b9ea5748a6 100644
+--- a/rel/modules/spi/src/Spi_Ram.c
++++ b/rel/modules/spi/src/Spi_Ram.c
+@@ -293,6 +293,37 @@ volatile VAR(Spi_EBDataType, SPI_VAR_NO_INIT)
+ #include "Spi_MemMap.h"
+ /* END Msg(4:5087)-2 */
+ 
++#if (SPI_SUPPORT_CONCURRENT_ASYNC_TRANSMIT == STD_ON)
++/* Phase 02: per-HW-unit arrays replacing the packed scalar bitmask.
++ * Each element stores 0U (inactive) or 1U (active) for that HW unit index. */
++
++/* Per-HW-unit sync-active flags */
++/* MISRA Violation: START Msg(1:1531)-1 */
++volatile VAR(uint32, SPI_VAR_NO_INIT) Spi_GaaSyncActiveHWUnits[SPI_MAX_HWUNIT];
++/* END Msg(1:1531)-1 */
++
++/* Per-HW-unit async-active flags */
++/* MISRA Violation: START Msg(1:1531)-1 */
++volatile VAR(uint32, SPI_VAR_NO_INIT) Spi_GaaAsyncActiveHWUnits[SPI_MAX_HWUNIT];
++/* END Msg(1:1531)-1 */
++
++#if ((SPI_LEVEL_DELIVERED == SPI_LEVEL_1) || (SPI_LEVEL_DELIVERED == SPI_LEVEL_2))
++/* Per-queue active flags (slot 0 is reserved/unused) */
++/* MISRA Violation: START Msg(1:1531)-1 */
++volatile VAR(uint32, SPI_VAR_NO_INIT) Spi_GaaAllQueueSts[SPI_MAX_QUEUE];
++/* END Msg(1:1531)-1 */
++#endif
++
++#if ((SPI_LEVEL_DELIVERED == SPI_LEVEL_2) && (SPI_FORCE_CANCEL_API == STD_ON))
++/* Per-HW-unit cancel flags */
++/* MISRA Violation: START Msg(1:1531)-1 */
++volatile VAR(uint32, SPI_VAR_NO_INIT) Spi_GaaCancelingHWUnits[SPI_MAX_HWUNIT];
++/* END Msg(1:1531)-1 */
++#endif
++
++#else /* SPI_SUPPORT_CONCURRENT_ASYNC_TRANSMIT == STD_OFF */
++/* Legacy scalar bitmask storage <20> byte-identical to pre-Phase-02 behaviour. */
++
+ /* Bit array indicates active HW unit index
+ - The lower 16-bits are for synchronous transmission
+ - The upper 16-bits are for asynchronous transmission */
+@@ -304,10 +335,26 @@ volatile VAR(uint32, SPI_VAR_NO_INIT) Spi_GulActiveHWUnits;
+   (SPI_LEVEL_DELIVERED == SPI_LEVEL_2))
+ /* Bit array indicates active Queues */
+ volatile VAR(uint32, SPI_VAR_NO_INIT) Spi_GulAllQueueSts;
+-/* Bit array indicates active Sequences */
++#endif
++
++#if ((SPI_LEVEL_DELIVERED == SPI_LEVEL_2) && (SPI_FORCE_CANCEL_API == STD_ON))
++
++volatile VAR(uint32, SPI_VAR_NO_INIT) Spi_GulCancelingHWUnits;
++#endif
++
++#endif /* SPI_SUPPORT_CONCURRENT_ASYNC_TRANSMIT */
++
++/* Bit array indicates active Sequences <20> shared between both legs */
++#if ((SPI_LEVEL_DELIVERED == SPI_LEVEL_1) || \
++  (SPI_LEVEL_DELIVERED == SPI_LEVEL_2))
++#if (SPI_SUPPORT_CONCURRENT_ASYNC_TRANSMIT == STD_ON)
++volatile VAR(uint32, SPI_VAR_NO_INIT)
++  Spi_GaaActiveSequence[SPI_MAX_HWUNIT][SPI_BITS_TO_WORDS(SPI_MAX_SEQUENCE)];
++#else
+ volatile VAR(uint32, SPI_VAR_NO_INIT)
+   Spi_GaaActiveSequence[SPI_BITS_TO_WORDS(SPI_MAX_SEQUENCE)];
+ #endif
++#endif
+ 
+ #if (SPI_MAX_CHANNEL_BUFFER_SIZE > 0U)
+ /* Channel buffer, includes all tx and rx buffers for all channels
+@@ -325,11 +372,6 @@ volatile VAR(uint32, SPI_VAR_NO_INIT) Spi_GulDmaRxData;
+ /* END Msg(1:1533)-4 */
+ #endif
+ 
+-#if ((SPI_LEVEL_DELIVERED == SPI_LEVEL_2) && (SPI_FORCE_CANCEL_API == STD_ON))
+-/* Bit array indicates HWUnits is being canceled by Spi_ForceCancel */
+-volatile VAR(uint32, SPI_VAR_NO_INIT) Spi_GulCancelingHWUnits;
+-#endif
+-
+ #define SPI_STOP_SEC_VAR_NO_INIT_32
+ /* MISRA Violation: START Msg(4:5087)-2 */
+ #include "Spi_MemMap.h"
+diff --git a/rel/modules/spi/src/Spi_Scheduler.c b/rel/modules/spi/src/Spi_Scheduler.c
+index ee7f993096..1abee88e7e 100644
+--- a/rel/modules/spi/src/Spi_Scheduler.c
++++ b/rel/modules/spi/src/Spi_Scheduler.c
+@@ -1144,11 +1144,11 @@ FUNC(void, SPI_PRIVATE_CODE) Spi_StartTransmission(uint32 LulSeqIndex)
+       {
+         /* Push this sequence to the queue */
+         Spi_PushToQueue(LulQueueIndex, LulSeqIndex);
+-        if (0UL == (Spi_GulAllQueueSts & (1UL << LulQueueIndex)))
++        if (!SPI_GET_QUEUE_STATUS(LulQueueIndex))
+         {
+           /* If queue is not running, initiation is required */
+           LblNeedToInitiate = SPI_TRUE;
+-          Spi_GulAllQueueSts |= (1UL << LulQueueIndex);
++          SPI_SET_QUEUE_STATUS(LulQueueIndex);
+           /* Pop the first job */
+           /* MISRA Violation: START Msg(2:1339)-3 */
+           (void)Spi_PopFromQueue(LulQueueIndex, &LulSeqIndex, &LulJobIndex);
+@@ -1169,7 +1169,7 @@ FUNC(void, SPI_PRIVATE_CODE) Spi_StartTransmission(uint32 LulSeqIndex)
+             (Spi_JobType)LulJobIndex;
+           /* END Msg(2:2814)-5 */
+           /* END Msg(2:2844)-6 */
+-          Spi_GulActiveHWUnits |= (1UL << LpJobConfig->ucHWUnitIndex) << SPI_ACTIVE_HW_BITS;
++          SPI_SET_ASYNC_ACTIVE(LpJobConfig->ucHWUnitIndex);
+           /* QAC Warning: START Msg(2:2844)-6 */
+ #if (SPI_HW_STATUS_API == STD_ON)
+           Spi_GaaHWStatus[LpJobConfig->ucHWUnitIndex].blActive = SPI_TRUE;
+@@ -1380,9 +1380,9 @@ FUNC(void, SPI_PRIVATE_CODE) Spi_ProcessSequence(const uint32 LulHWUnitIndex)
+   else
+   {
+     /* If the Queue is empty, clear the active flag of this Queue */
+-    Spi_GulAllQueueSts &= ~(1UL << LulQueueIndex);
++    SPI_CLR_QUEUE_STATUS(LulQueueIndex);
+     /* De-active HW unit bit */
+-    Spi_GulActiveHWUnits &= ~((1UL << LulHWUnitIndex) << SPI_ACTIVE_HW_BITS);
++    SPI_CLR_ASYNC_ACTIVE(LulHWUnitIndex);
+ #if (SPI_HW_STATUS_API == STD_ON)
+     /* Set HW unit status bit as False */
+     /* QAC Warning: START Msg(2:2844)-6 */
+@@ -1652,8 +1652,7 @@ FUNC(void, SPI_PRIVATE_CODE) Spi_CancelSequence(
+       LblRequireSeqEndNotification = SPI_TRUE;
+       /* Clear sequence active bit for checking job sharing */
+       /* QAC Warning: START Msg(2:2844)-6 */
+-      Spi_GaaActiveSequence[LulSeqIndex / (uint32)SPI_UINT32_BITS] &=
+-        ~(1UL << (LulSeqIndex & (SPI_UINT32_BITS - 1U)));
++      SPI_CLR_ACTIVE_SEQ(LulSeqIndex);
+       /* END Msg(2:2844)-6 */
+     }
+     else
+@@ -1782,12 +1781,12 @@ STATIC FUNC(void, SPI_PRIVATE_CODE) Spi_MaskSequenceInterrupts(
+     if (SPI_TRUE == LblMask)
+     {
+       /* QAC Warning: START Msg(2:2814)-5 */
+-      Spi_GulCancelingHWUnits |= LpSeqConfig->ulUsingHWUnits;
++      SPI_APPLY_CANCEL_MASK_SET(LpSeqConfig->ulUsingHWUnits);
+       /* END Msg(2:2814)-5 */
+     }
+     else
+     {
+-      Spi_GulCancelingHWUnits &= ~LpSeqConfig->ulUsingHWUnits;
++      SPI_APPLY_CANCEL_MASK_CLR(LpSeqConfig->ulUsingHWUnits);
+     }
+     SPI_EXIT_CRITICAL_SECTION(SPI_INTERRUPT_CONTROL_PROTECTION);
+   }
+@@ -2069,8 +2068,7 @@ STATIC FUNC(boolean, SPI_PRIVATE_CODE) Spi_CheckSeqFinish(
+       LblSeqFinished = SPI_TRUE;
+       /* Clear Sequence active bit */
+       /* QAC Warning: START Msg(2:2844)-6 */
+-      Spi_GaaActiveSequence[LulSeqIndex / (uint32)SPI_UINT32_BITS] &=
+-        ~(1UL << (LulSeqIndex & (SPI_UINT32_BITS - 1U)));
++      SPI_CLR_ACTIVE_SEQ(LulSeqIndex);
+       /* END Msg(2:2844)-6 */
+       /* Update Sequence Result */
+       /* QAC Warning: START Msg(2:2844)-6 */