66 lines
2.7 KiB
C
66 lines
2.7 KiB
C
/*******************************************************************************
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* DISCLAIMER
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* This software is supplied by Renesas Electronics Corporation and is only
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* intended for use with Renesas products. No other uses are authorized. This
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* software is owned by Renesas Electronics Corporation and is protected under
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* all applicable laws, including copyright laws.
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* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
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* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
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* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
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* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
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* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
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* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
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* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
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* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
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* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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* Renesas reserves the right, without notice, to make changes to this software
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* and to discontinue the availability of this software. By using this software,
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* you agree to the additional terms and conditions found by accessing the
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* following link:
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* http://www.renesas.com/disclaimer
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* Copyright 2023 Renesas Electronics Corporation All rights reserved.
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*******************************************************************************/
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/*******************************************************************************
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* DESCRIPTION : RT-SRAM register header
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******************************************************************************/
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#ifndef RTSRAM_REGISTER_H__
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#define RTSRAM_REGISTER_H__
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#include <stdint.h>
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/* RT-SRAM register base address */
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#define RTSRAM_REG_BASE (0xFFE90000U)
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#define RTSRAM_SECDIVD (RTSRAM_REG_BASE + 0x0000U)
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#define RTSRAM_SECCTRRD (RTSRAM_REG_BASE + 0x0040U)
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#define RTSRAM_SECCTRWD (RTSRAM_REG_BASE + 0x0340U)
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#if (RCAR_LSI == RCAR_S4)
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#define RTSRAM_SECDIVD_DIVADDR_MASK (0x000000FFU)
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#else
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#define RTSRAM_SECDIVD_DIVADDR_MASK (0x000FFFFFU)
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#endif
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#define RTSRAM_SECCTRRD_SECGRP_MASK (0x000F0000U)
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#define RTSRAM_SECCTRRD_SAFGRP_MASK (0x0000FFFFU)
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#define RTSRAM_SECCTRWD_SECGRP_MASK (0x000F0000U)
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#define RTSRAM_SECCTRWD_SAFGRP_MASK (0x0000FFFFU)
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static inline uint32_t get_rtsram_secdivd_addr(uint32_t num)
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{
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return ((RTSRAM_SECDIVD + (num * 4U)));
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}
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static inline uint32_t get_rtsram_secctrrd_addr(uint32_t num)
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{
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return ((RTSRAM_SECCTRRD + (num * 4U)));
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}
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static inline uint32_t get_rtsram_secctrwd_addr(uint32_t num)
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{
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return ((RTSRAM_SECCTRWD + (num * 4U)));
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}
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#endif /* RTSRAM_REGISTER_H__ */
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