46 lines
2.4 KiB
C
46 lines
2.4 KiB
C
/*******************************************************************************
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* DISCLAIMER
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* This software is supplied by Renesas Electronics Corporation and is only
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* intended for use with Renesas products. No other uses are authorized. This
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* software is owned by Renesas Electronics Corporation and is protected under
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* all applicable laws, including copyright laws.
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* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
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* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
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* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
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* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
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* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
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* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
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* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
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* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
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* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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* Renesas reserves the right, without notice, to make changes to this software
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* and to discontinue the availability of this software. By using this software,
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* you agree to the additional terms and conditions found by accessing the
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* following link:
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* http://www.renesas.com/disclaimer
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* Copyright 2022 Renesas Electronics Corporation All rights reserved.
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*******************************************************************************/
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/*******************************************************************************
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* DESCRIPTION : MFIS register header
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******************************************************************************/
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#ifndef MFIS_REGISTER_H__
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#define MFIS_REGISTER_H__
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#include <remap_register.h>
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/* The Base is remapped in the IPL, and the address is calculated and accessed
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* by adding the offset to the remapped address. */
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#define MFIS_BASE (BASE_MFIS_ADDR)
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#define MFISLCKR_ADDRESS (0x0800U) /* MFISLCKR[j] Address 0x724 +(4U*(63U-8U)) */
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/* Register Definition */
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#define MFIS_LCKR (MFIS_BASE + MFISLCKR_ADDRESS) /* MFIS Lock Register */
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#define MFIS_WPCNTR (MFIS_BASE + 0x0900U) /* Write Protection Control Register */
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#define MFIS_WACNTR (MFIS_BASE + 0x0904U) /* Write Access Control Register */
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#endif /* MFIS_REGISTER_H__ */
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