/******************************************************************************* * DISCLAIMER * This software is supplied by Renesas Electronics Corporation and is only * intended for use with Renesas products. No other uses are authorized. This * software is owned by Renesas Electronics Corporation and is protected under * all applicable laws, including copyright laws. * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. * Renesas reserves the right, without notice, to make changes to this software * and to discontinue the availability of this software. By using this software, * you agree to the additional terms and conditions found by accessing the * following link: * http://www.renesas.com/disclaimer * Copyright 2022 Renesas Electronics Corporation All rights reserved. *******************************************************************************/ /******************************************************************************* * DESCRIPTION : MFIS register header ******************************************************************************/ #ifndef MFIS_REGISTER_H__ #define MFIS_REGISTER_H__ #include /* The Base is remapped in the IPL, and the address is calculated and accessed * by adding the offset to the remapped address. */ #define MFIS_BASE (BASE_MFIS_ADDR) #define MFISLCKR_ADDRESS (0x0800U) /* MFISLCKR[j] Address 0x724 +(4U*(63U-8U)) */ /* Register Definition */ #define MFIS_LCKR (MFIS_BASE + MFISLCKR_ADDRESS) /* MFIS Lock Register */ #define MFIS_WPCNTR (MFIS_BASE + 0x0900U) /* Write Protection Control Register */ #define MFIS_WACNTR (MFIS_BASE + 0x0904U) /* Write Access Control Register */ #endif /* MFIS_REGISTER_H__ */