75 lines
3.1 KiB
C
75 lines
3.1 KiB
C
/*******************************************************************************
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* DISCLAIMER
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* This software is supplied by Renesas Electronics Corporation and is only
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* intended for use with Renesas products. No other uses are authorized. This
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* software is owned by Renesas Electronics Corporation and is protected under
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* all applicable laws, including copyright laws.
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* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
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* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
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* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
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* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
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* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
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* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
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* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
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* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
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* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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* Renesas reserves the right, without notice, to make changes to this software
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* and to discontinue the availability of this software. By using this software,
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* you agree to the additional terms and conditions found by accessing the
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* following link:
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* http://www.renesas.com/disclaimer
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* Copyright 2021-2022 Renesas Electronics Corporation All rights reserved.
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*******************************************************************************/
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/*******************************************************************************
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* DESCRIPTION : RPC driver header
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******************************************************************************/
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#ifndef RPC_H__
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#define RPC_H__
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#include <stdint.h>
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// #include <rpc_register.h>
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/* If user customizes for another vendor's QSPI Flash, set to 1. */
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#define USER_ADDED_QSPI (1U) /* 0:Disable 1:Enable */
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/* For return value */
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#define QSPI_CMD_INIT_SUCCESS (0x00000000U)
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#define QSPI_CMD_INIT_ERROR (0xFFFFFFFFU)
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/* Common command for QSPI Flash */
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#define FLASH_CMD_READ_ID (0x9FU)
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/* Device ID mask for QSPI Flash */
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#define DEVICE_ID_MASK (0x00FFFFFFU)
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/* QSPI Flash device ID */
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#define DEVID_MT25QU01GB (0x0021BB20U) /* MT25QU01GB for PRK3 rev3 */
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#if USER_ADDED_QSPI == 1
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#define DEVID_XXXXXXXXX (0x003B25C2U) /* MX66U1G45G for PRK3 rev4 */
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#endif /* USER_ADDED_QSPI == 1 */
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typedef struct {
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uint32_t read_fast;
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uint32_t sector_erase_4byte_addr;
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uint32_t parameter_4kbyte_erase;
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uint32_t pp_4byte_addr;
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uint32_t read_any_register;
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uint32_t read_stts_register;
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uint32_t write_enable;
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uint32_t read_32bit_addr;
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uint32_t ddr_quad_io_read_32bit_addr;
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} st_qspi_cmd_tbl_t;
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extern const st_qspi_cmd_tbl_t* gp_qspi_cmd_tbl;
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extern uint8_t prk3_rev;
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void rpc_init(void);
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void rpc_release(void);
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void rpc_end_state_check(void);
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void qspi_flash_rw_init(void);
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int check_Erase_Fail(uint32_t status);
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void qspi_ddr_transfer_mode(uint32_t command);
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void qspi_sdr_transfer_mode(uint32_t command);
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#endif /* RPC_H__ */
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