63 lines
3.0 KiB
C
63 lines
3.0 KiB
C
/*******************************************************************************
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* DISCLAIMER
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* This software is supplied by Renesas Electronics Corporation and is only
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* intended for use with Renesas products. No other uses are authorized. This
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* software is owned by Renesas Electronics Corporation and is protected under
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* all applicable laws, including copyright laws.
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* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
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* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
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* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
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* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
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* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
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* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
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* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
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* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
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* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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* Renesas reserves the right, without notice, to make changes to this software
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* and to discontinue the availability of this software. By using this software,
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* you agree to the additional terms and conditions found by accessing the
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* following link:
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* http://www.renesas.com/disclaimer
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* Copyright 2021-2024 Renesas Electronics Corporation All rights reserved.
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*******************************************************************************/
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/*******************************************************************************
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* DESCRIPTION : Power management driver header
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******************************************************************************/
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#ifndef CPU_ON_H__
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#define CPU_ON_H__
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#include "remap_register.h"
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#define RCAR_PWR_TARGET_CR (0U)
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#define RCAR_PWR_TARGET_CA (1U)
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#define AP_CORE_APSREG_AP_CLUSTER_N_AUX0_ACTDIS1 (0x00000001U << 1U)
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#define AP_CORE_APSREG_AP_CLUSTER_N_AUX0_ACTDIS0 (0x00000001U << 0U)
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#define AP_CORE_APSREG_CCI500_AUX_ACTDIS (0x00000001U << 0U)
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#define AP_CORE_APSREG_AP_CLUSTER_N_AUX0_INIT (AP_CORE_APSREG_AP_CLUSTER_N_AUX0_ACTDIS1 | AP_CORE_APSREG_AP_CLUSTER_N_AUX0_ACTDIS0)
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#define OTP_MEM_1_BASE (BASE_OTP_MEM_ADDR)
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#define OTP_MEM_OTPMONITOR17 (OTP_MEM_1_BASE + 0x0144U)
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#define OTP_MEM_PRODUCT_MASK (0x000000FFU)
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#if (RCAR_LSI == RCAR_V4H)
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#define VARIANT_V4H_7 (0x00U)
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#define VARIANT_V4H_5 (0x01U)
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#define VARIANT_V4H_3 (0x02U)
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#elif (RCAR_LSI == RCAR_V4M)
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#define VARIANT_V4M_7 (0x00U)
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#define VARIANT_V4M_5 (0x01U)
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#define VARIANT_V4M_3 (0x02U)
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#define VARIANT_V4M_2 (0x04U)
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#endif /* RCAR_LSI == RCAR_V4H */
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/*******************************************************************************
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* Function & variable prototypes
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******************************************************************************/
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void arm_cpu_on(uint32_t target, uint32_t boot_addr);
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void adj_cr_variant_freq(void);
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#endif /* CPU_ON_H__ */
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