add IPL
This commit is contained in:
236
IPL/Customer/Mobis/V4H_Cx_Loader/secure/ICUMXB_modifed.diff
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236
IPL/Customer/Mobis/V4H_Cx_Loader/secure/ICUMXB_modifed.diff
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@@ -0,0 +1,236 @@
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diff --git b/V4H_Cx_Loader/secure/icumif/renesas_types.h a/V4H_Cx_Loader/secure/icumif/renesas_types.h
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index 4c63220..5d28109 100644
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--- b/V4H_Cx_Loader/secure/icumif/renesas_types.h
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+++ a/V4H_Cx_Loader/secure/icumif/renesas_types.h
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@@ -18,28 +18,7 @@
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#if !defined (R_TYPEDEFS_H)
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#define R_TYPEDEFS_H
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-#ifdef __cplusplus
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-extern "C" {
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-#endif /* __cplusplus */
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-
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-typedef signed char int8_t;
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-typedef unsigned char uint8_t;
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-typedef signed short int16_t;
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-typedef unsigned short uint16_t;
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-typedef signed int int32_t;
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-typedef unsigned int uint32_t;
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-typedef signed long long int64_t;
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-typedef unsigned long long uint64_t;
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-typedef unsigned long uintptr_t;
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-
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-#define bool _Bool
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-#define false (0)
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-#define true (1)
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-
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-#define NULL ((void*)0)
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-
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-#ifdef __cplusplus
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-}
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-#endif /* __cplusplus */
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+#include <stddef.h>
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+#include <stdint.h>
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#endif /* R_TYPEDEFS_H */
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diff --git b/V4H_Cx_Loader/secure/shared/src/mem_info_def.c a/V4H_Cx_Loader/secure/shared/src/mem_info_def.c
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index dea5c7b..34ccc7e 100644
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--- b/V4H_Cx_Loader/secure/shared/src/mem_info_def.c
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+++ a/V4H_Cx_Loader/secure/shared/src/mem_info_def.c
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@@ -25,8 +25,8 @@
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#define ICUM_SHAREDMEMORY_1_SIZE (2097152u -1152u)
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#define ICUM_SHAREDMEMORY_2_ADDR (0x41E00000u)
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#define ICUM_SHAREDMEMORY_2_SIZE (2097152u)
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-#define ICUM_SHAREDMEMORY_3_ADDR (0xE2100000u)
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-#define ICUM_SHAREDMEMORY_3_SIZE (1048576u)
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+#define ICUM_SHAREDMEMORY_3_ADDR (0xEB231000u)
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+#define ICUM_SHAREDMEMORY_3_SIZE (0xD000u)
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#define ICUM_EXPORT_DATA_ADDR (0x41C20000u)
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#define ICUM_EXPORT_DATA_SIZE (114688u)
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#define ICUM_DATA_WORKAREA_ADDR (0xEB2E0000u)
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@@ -172,42 +172,9 @@ const uint32_t memory_information[ICUM_MEMORY_CONFIG_NUM] __attribute__((aligned
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/*******************************************************************************/
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/*******************************************************************************/
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-/* ISD request & response queue */
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+/* Communication buffer between host and ICU-M */
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/*******************************************************************************/
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-uint32_t ICUM_QUEUE[ICUM_SERVICEQUEUE_1_SIZE/sizeof(uint32_t)] __attribute__((aligned(32), section(".bss.SHARED_TOP")));
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-
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-/*******************************************************************************/
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-/* Output buffer */
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-/*******************************************************************************/
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-uint8_t strbin[20096] __attribute__((aligned(32), section(".bss.SHARED_TOP")));
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-
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-/*******************************************************************************/
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-/* Big buffers for tests */
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-/*******************************************************************************/
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-uint8_t BIG_BUFFER[4][SIZE_OF_BIG_BUFFER] __attribute__((aligned(256), section(".bss.SHARED_TOP")));
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-
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-/*******************************************************************************/
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-/* Communication buffer between host and ICU-M */
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-/*******************************************************************************/
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-uint8_t ISD_BUFFER[SIZE_OF_ISD_BUFFER] __attribute__((aligned(32), section(".bss.SHARED_TOP")));
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-
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-/*******************************************************************************/
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-/* Output buffer */
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-/*******************************************************************************/
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-uint8_t COM_BUFFER[SIZE_OF_COM_BUFFER] __attribute__((aligned(32), section(".bss.SHARED_TOP")));
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-
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-/*******************************************************************************/
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-/* Big buffers ( 256 Byte aligned ) for tests */
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-/*******************************************************************************/
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-uint8_t DMAC_BUFFE[1][SIZE_OF_BIG_BUFFER] __attribute__((aligned(256), section(".bss.SHARED_TOP")));
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-uint8_t DMAC_BUFFE_2[1][SIZE_OF_BIG_BUF2] __attribute__((aligned(256), section(".bss.SHARED_TOP")));
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-
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-/*******************************************************************************/
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-/* Big buffers on SDRAM for tests */
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-/*******************************************************************************/
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-uint8_t BIG_BUF_SD[3][SIZE_OF_BIG_BUFFER] __attribute__((aligned(32), section(".bss.SDRAM")));
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-
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-/*******************************************************************************/
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-/* Communication buffer on SDRAM between host and ICU-M */
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-/*******************************************************************************/
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-uint8_t ISD_BUF_SD[SIZE_OF_ISD_BUFFER] __attribute__((aligned(32), section(".bss.SDRAM")));
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+uint8_t ISD_BUFFER[SIZE_OF_ISD_BUFFER] __attribute__((aligned(64), section(".bss.SHARED_TOP")));
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+uint8_t LCS_BUFFER[SIZE_OF_LCS_BUFFER] __attribute__((aligned(64), section(".bss.SHARED_LCS")));
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+uint8_t CMAC_BUFFER[SIZE_OF_CMAC_BUFFER] __attribute__((aligned(64), section(".bss.SHARED_CMAC")));
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+uint8_t HASH_BUFFER[SIZE_OF_HASH_BUFFER] __attribute__((aligned(64), section(".bss.SHARED_HASH")));
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diff --git b/V4H_Cx_Loader/secure/shared/src/shared.h a/V4H_Cx_Loader/secure/shared/src/shared.h
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index b4dec66..5c71428 100644
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--- b/V4H_Cx_Loader/secure/shared/src/shared.h
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+++ a/V4H_Cx_Loader/secure/shared/src/shared.h
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@@ -29,23 +29,13 @@
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/**********************************************************************************
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* Global external references
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***********************************************************************************/
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-/** ISD request & response queue */
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-extern uint32_t ICUM_QUEUE[];
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-/** Big buffers for tests */
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-extern uint8_t BIG_BUFFER[][SIZE_OF_BIG_BUFFER];
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-/** Communication buffer between host and ICU-M */
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-extern uint8_t ISD_BUFFER[SIZE_OF_ISD_BUFFER];
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-/** Extended communication buffer */
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-extern uint8_t COM_BUFFER[SIZE_OF_COM_BUFFER];
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-
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-extern uint8_t DMAC_BUFFE[][SIZE_OF_BIG_BUFFER];
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-extern uint8_t DMAC_BUFFE_2[][SIZE_OF_BIG_BUF2];
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-
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-extern uint8_t BIG_BUF_SD[][SIZE_OF_BIG_BUFFER];
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-extern uint8_t ISD_BUF_SD[SIZE_OF_ISD_BUFFER];
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-
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-#if defined(TARGET_DEVICE_S4X) || defined(TARGET_DEVICE_V4H)
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-extern uint16_t notification_from_cr52[9];
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-#endif
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+#define SIZE_OF_LCS_BUFFER (4U)
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+#define SIZE_OF_CMAC_BUFFER (16U)
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+#define SIZE_OF_HASH_BUFFER (32U * 2U)
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+
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+extern uint8_t ISD_BUFFER[SIZE_OF_ISD_BUFFER];
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+extern uint8_t LCS_BUFFER[SIZE_OF_LCS_BUFFER];
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+extern uint8_t CMAC_BUFFER[SIZE_OF_CMAC_BUFFER];
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+extern uint8_t HASH_BUFFER[SIZE_OF_HASH_BUFFER];
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#endif /* SHARED_H */
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diff --git b/V4H_Cx_Loader/secure/user_api/user_icumif_api.c a/V4H_Cx_Loader/secure/user_api/user_icumif_api.c
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index 4501e8a..a875a20 100644
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--- b/V4H_Cx_Loader/secure/user_api/user_icumif_api.c
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+++ a/V4H_Cx_Loader/secure/user_api/user_icumif_api.c
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@@ -43,90 +43,12 @@ extern void inv_dcache_range(uintptr_t addr, uint32_t size);
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void USER_ICUMIF_FlushDCache(uint32_t addr, uint32_t size)
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{
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- uint32_t cache_line_addr;
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- uint32_t flush_size;
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- uint32_t limit_size;
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-
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-#if defined(TARGET_CORTEX_A) && defined(AARCH64)
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- unsigned long prog_status_reg_64;
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- __asm volatile ("mrs %[result], DAIF" : [result] "=r" (prog_status_reg_64));
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- __asm ("msr DAIFSet, #0x3");
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-#else
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- uint32_t prog_status_reg_32;
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- __asm volatile ("mrs %[result], CPSR" : [result] "=r" (prog_status_reg_32));
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- __asm ("cpsid if");
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-#endif
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-
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- if (D_CACHE_LIMIT_ADDR > addr)
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- {
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- cache_line_addr = addr & D_CACHE_LINE_ADDR_MASK;
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- flush_size = size + (addr - cache_line_addr);
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-
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- /* round to the limit size */
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- limit_size = D_CACHE_LIMIT_ADDR - cache_line_addr;
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- if (flush_size > limit_size)
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- {
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- flush_size = limit_size;
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- }
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-
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- flush_dcache_range((uintptr_t)cache_line_addr, flush_size);
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- }
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-
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-#if defined(TARGET_CORTEX_A) && defined(AARCH64)
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- if (CR52_CPSR_IRQ_DISABLE_STATUS != (prog_status_reg_64 & CR52_CPSR_IRQ_DISABLE_STATUS))
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- {
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- __asm ("msr DAIFClr, #0x3");
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- }
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-#else
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- if (CR52_CPSR_IRQ_DISABLE_STATUS != (prog_status_reg_32 & CR52_CPSR_IRQ_DISABLE_STATUS))
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- {
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- __asm ("cpsie if");
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- }
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-#endif
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+ /* do nothing */
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}
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void USER_ICUMIF_InvalidateDCache(uint32_t addr, uint32_t size)
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{
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- uint32_t cache_line_addr;
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- uint32_t invalidate_size;
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- uint32_t limit_size;
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-
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-#if defined(TARGET_CORTEX_A) && defined(AARCH64)
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- unsigned long prog_status_reg_64;
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- __asm volatile ("mrs %[result], DAIF" : [result] "=r" (prog_status_reg_64));
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- __asm ("msr DAIFSet, #0x3");
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-#else
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- uint32_t prog_status_reg_32;
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- __asm volatile ("mrs %[result], CPSR" : [result] "=r" (prog_status_reg_32));
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- __asm ("cpsid if");
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-#endif
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-
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- if (D_CACHE_LIMIT_ADDR > addr)
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- {
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- cache_line_addr = addr & D_CACHE_LINE_ADDR_MASK;
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- invalidate_size = size + (addr - cache_line_addr);
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-
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- /* round to the limit size */
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- limit_size = D_CACHE_LIMIT_ADDR - cache_line_addr;
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- if (invalidate_size > limit_size)
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- {
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- invalidate_size = limit_size;
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- }
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-
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- inv_dcache_range(cache_line_addr, invalidate_size);
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- }
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-
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-#if defined(TARGET_CORTEX_A) && defined(AARCH64)
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- if (CR52_CPSR_IRQ_DISABLE_STATUS != (prog_status_reg_64 & CR52_CPSR_IRQ_DISABLE_STATUS))
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- {
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- __asm ("msr DAIFClr, #0x3");
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- }
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-#else
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- if (CR52_CPSR_IRQ_DISABLE_STATUS != (prog_status_reg_32 & CR52_CPSR_IRQ_DISABLE_STATUS))
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- {
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- __asm ("cpsie if");
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- }
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-#endif
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+ /* do nothing */
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}
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uint32_t USER_ICUMIF_GetMyPEID(void)
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@@ -179,4 +101,3 @@ void USER_ICUMIF_Sync(void)
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{
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USER_ICUMIF_SYNC();
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}
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-
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