add IPL
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110
IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/sdmac.c
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110
IPL/Customer/Mobis/Gen4_ICUMX_Loader/mcu/sdmac.c
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/*******************************************************************************
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* DISCLAIMER
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* This software is supplied by Renesas Electronics Corporation and is only
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* intended for use with Renesas products. No other uses are authorized. This
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* software is owned by Renesas Electronics Corporation and is protected under
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* all applicable laws, including copyright laws.
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* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
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* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
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* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
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* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
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* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
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* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
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* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
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* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
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* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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* Renesas reserves the right, without notice, to make changes to this software
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* and to discontinue the availability of this software. By using this software,
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* you agree to the additional terms and conditions found by accessing the
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* following link:
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* http://www.renesas.com/disclaimer
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* Copyright 2022 Renesas Electronics Corporation All rights reserved.
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*******************************************************************************/
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/*******************************************************************************
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* DESCRIPTION : Image load function by SDMAC on ICUMX
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******************************************************************************/
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/******************************************************************************
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* @file sdmac.c
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* - Version : 0.01
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* @brief Driver of SCMAC on ICUMX.
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* .
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*****************************************************************************/
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/******************************************************************************
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* History : DD.MM.YYYY Version Description
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* : 21.06.2022 0.01 First Release
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*****************************************************************************/
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/* indelude */
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#include <stdint.h>
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#include <mem_io.h>
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#include <log.h>
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#include <dma.h>
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#include <sdmac.h>
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#include <wdt.h>
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void icu_sdmac_trans_start(const LOAD_INFO *li)
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{
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uint16_t reg;
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uint32_t len = li->image_size;
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/* src_addr and boot_addr must be 64-byte boundary. */
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dma_address_align_check(li->boot_addr, li->src_addr);
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/* If len is not 64-byte boundary, */
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/* round up len to 64-byte boundary. */
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len += SDMAC_FRACTION_MASK_64_BYTE;
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len &= ~(SDMAC_FRACTION_MASK_64_BYTE);
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/* Clear channel 0 registers */
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mem_write32(ICUMX_DMACHRST, ICUMX_DMACHRST_CLR_CH0);
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/* Clear flags */
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mem_write32(ICUMX_DMACHFCR_0, ICUMX_DMACHFCR_INIT);
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/* Round-robin mode / Enable DMA transfer */
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mem_write16(ICUMX_DMAOR, ICUMX_DMAOR_INIT);
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/* DMA Transfer mode *
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* Slow speed mode : Normal mode *
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* Priority setting : Disable *
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* Transfer Request source : Auto Request *
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* Destination Address mode : Fixed *
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* Source address mode : Incremented *
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* DMA destination transaction size : 64byte *
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* DMA source transaction size : 64byte */
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mem_write32(ICUMX_DMATMR_0, ICUMX_DMATMR_0_INIT);
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/* Set destination address */
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mem_write32(ICUMX_DMADAR_0, li->boot_addr);
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/* Set source address */
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mem_write32(ICUMX_DMASAR_0, li->src_addr);
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/* Set transfer size */
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mem_write32(ICUMX_DMATSR_0, len);
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reg = mem_read16(ICUMX_DMACHCR_0);
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/* Enable channel address error notification / Enable DMA */
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reg |= ICUMX_DMACHCR_0_START;
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mem_write16(ICUMX_DMACHCR_0, reg);
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}
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/* End of function icu_sdmac_trans_start(LOAD_INFO *li) */
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void icu_sdmac_trans_end(void)
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{
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uint32_t reg;
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wdt_restart();
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/* Check end of DMA transfer. */
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do
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{
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reg = mem_read32(ICUMX_DMACHSTA_0);
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/* Check error of DMA transfer */
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if ((reg & ICUMX_DMACHSTA_CAE) != DMACHSTA_CAE_BIT_NOERROR)
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{
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ERROR("SDMAC on ICUMX - Channel Address Error\n");
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panic;
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}
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} while ((reg & ICUMX_DMACHSTA_TE) != DMACHSTA_TE_END_DMA);
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/* Clear flags */
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mem_write32(ICUMX_DMACHFCR_0, ICUMX_DMACHFCR_INIT);
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}
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/* End of function icu_sdmac_trans_end(void) */
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