add IPL
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101
IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/wdt/rwdt.c
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101
IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/wdt/rwdt.c
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/*******************************************************************************
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* DESCRIPTION : RCLK watchdog timer driver
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******************************************************************************/
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/******************************************************************************
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* @file rwdt.c
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* - Version : 0.014
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* @brief RCLK Watchdog Timer driver
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* .
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*****************************************************************************/
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/******************************************************************************
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* History : DD.MM.YYYY Version Description
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* : 29.04.2025 0.01 First Release
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*****************************************************************************/
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#include <stdint.h>
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#include <wdt.h>
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#include <wdt_register.h>
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#include <mem_io.h>
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#include <intc.h>
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#include <intc_id.h>
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#include <log.h>
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/* Initialization RCLK Watchdog Timer, see 154.1.3 Operation of h/w manual */
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void rwdt_init(int start)
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{
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uint8_t wdta_val;
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wdta_val = mem_read8(RWDT_RWTCSRA);
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if (((wdta_val & RWTCSRA_TME) != 0) && start) {
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wdta_val &= ~(RWTCSRA_TME);
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mem_write32(RWDT_RWTCSRA, RWTCSRA_UPPER | wdta_val);
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mem_write32(RWDT_RWTCNT, RWTCNT_UPPER | 0x0U);
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wdta_val = mem_read8(RWDT_RWTCSRA);
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wdta_val &= ~(RWTCSRA_WOVF);
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mem_write32(RWDT_RWTCSRA, RWTCSRA_UPPER | wdta_val);
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/* skip set CKS0, CKS1 */
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}
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do {
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wdta_val = mem_read8(RWDT_RWTCSRA);
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} while ((wdta_val & RWTCSRA_WRFLG) != 0);
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/* start the counting by setting the TME bit in RWTCSRA to 1 */
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/*
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if (start) {
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wdta_val |= RWTCSRA_TME;
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mem_write32(RWDT_RWTCSRA, RWTCSRA_UPPER | wdta_val);
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}
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*/
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}
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/*
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void rwdt_update(void)
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{
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mem_write32(RWDT_RWTCNT, RWTCNT_UPPER | 0U);
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}
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// RWTCNT overflow
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void rwdt_handler(void)
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{
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uint8_t wdta_val;
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wdta_val = mem_read8(RWDT_RWTCSRA);
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if ((wdta_val & RWTCSRA_WOVF) != 0) {
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// it's overflowed.
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}
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// RWTCNT, RWTCSRA, RWTCSRB are initialized.
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// should we run rwdt_init() again?
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}
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*/
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/* Initialization System Watchdog Timer */
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void swdt_init(int start)
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{
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uint8_t wdta_val;
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wdta_val = mem_read8(SWDT_SWTCSRA);
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if (((wdta_val & RWTCSRA_TME) != 0) && start) {
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wdta_val &= ~(RWTCSRA_TME);
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mem_write32(SWDT_SWTCSRA, RWTCSRA_UPPER | wdta_val);
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mem_write32(SWDT_SWTCNT, RWTCNT_UPPER | 0x0U);
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wdta_val = mem_read8(SWDT_SWTCSRA);
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wdta_val &= ~(RWTCSRA_WOVF);
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mem_write32(SWDT_SWTCSRA, RWTCSRA_UPPER | wdta_val);
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/* skip set CKS0, CKS1 */
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}
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do {
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wdta_val = mem_read8(SWDT_SWTCSRA);
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} while ((wdta_val & RWTCSRA_WRFLG) != 0);
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/* start the counting by setting the TME bit in SWTCSRA to 1 */
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/* do nothing */
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}
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148
IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/wdt/wdt.c
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IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/wdt/wdt.c
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/*******************************************************************************
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* DISCLAIMER
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* This software is supplied by Renesas Electronics Corporation and is only
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* intended for use with Renesas products. No other uses are authorized. This
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* software is owned by Renesas Electronics Corporation and is protected under
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* all applicable laws, including copyright laws.
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* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
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* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
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* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
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* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
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* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
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* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
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* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
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* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
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* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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* Renesas reserves the right, without notice, to make changes to this software
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* and to discontinue the availability of this software. By using this software,
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* you agree to the additional terms and conditions found by accessing the
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* following link:
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* http://www.renesas.com/disclaimer
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* Copyright 2022-2023 Renesas Electronics Corporation All rights reserved.
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*******************************************************************************/
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/*******************************************************************************
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* DESCRIPTION : window watchdog timer driver
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******************************************************************************/
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/******************************************************************************
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* @file wdt.c
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* - Version : 0.04
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* @brief Window Watchdog Timer driver
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* .
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*****************************************************************************/
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/******************************************************************************
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* History : DD.MM.YYYY Version Description
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* : 28.07.2021 0.01 First Release
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* : 06.01.2022 0.02 Add exception handling for ICUMX_WDTA.
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* : 20.01.2022 0.03 Add ICUMX name unification.
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* : 11.01.2023 0.04 Modify activation code writing to
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* : ICUMX_WDTA0EVAC register.
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*****************************************************************************/
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#include <stdint.h>
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#include <wdt.h>
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#include <mem_io.h>
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#include <intc.h>
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#include <intc_id.h>
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#include <log.h>
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#define ICUMX_WDTA0_BASE (0xFFFEE080U) /* Watchdog Timer base */
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#define ICUMX_WDTA0WDTE (ICUMX_WDTA0_BASE)
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#define ICUMX_WDTA0EVAC (ICUMX_WDTA0_BASE+0x0004U)
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#define ICUMX_WDTA0REF (ICUMX_WDTA0_BASE+0x0008U)
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#define ICUMX_WDTA0MD (ICUMX_WDTA0_BASE+0x000CU)
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#define WDTA0MD_WDTA0WIE (1U<<3) /* Enables the 75% interrupt request INTWDTA0 */
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#define WDTA0MD_WDTA0ERM (1U<<2) /* 0:NMI request mode 1:Reset mode */
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#define WDTA0MD_WDTA0WS10 (3U) /* 11B: window-open period is 100% */
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/* overflow time setting */
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#define WDT_11MS (0x0U)
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#define WDT_23MS (0x1U)
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#define WDT_46MS (0x2U)
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#define WDT_93MS (0x3U)
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#define WDT_187MS (0x4U)
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#define WDT_374MS (0x5U)
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#define WDT_749MS (0x6U)
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#define WDT_1498MS (0x7U)
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/* Activation code */
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#define WDT_ACT_CODE (0xACU)
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/* ICUMX Configuration Register */
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#define ICUMX_CFG4 (0xFFFEE270U)
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/* Bit definition for Configuration Register */
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#define ICUMX_CFG4_ICUMOPWDVAC (0x00000020U)
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/* Initialization Window Watchdog Timer */
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void wdt_init(void)
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{
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uint8_t wdta_val;
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/* This API is executed before copying a part of Loader to Local RAM. */
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/* Therefore, this API can not use the Memory mapped I/O API. */
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/* When reading or writing memory, execute the same processing as */
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/* Memory mapped I/O API in this function. */
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wdta_val = WDTA0MD_WDTA0ERM; /* NMI request mode */
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wdta_val |= WDTA0MD_WDTA0WIE; /* Enables the 75% interrupt request INTWDTA0 */
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wdta_val |= WDTA0MD_WDTA0WS10;
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wdta_val |= (WDT_1498MS << 4U); /* overflow interval time */
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mem_write8(ICUMX_WDTA0MD, wdta_val);
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/* set watchdog timer handler */
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intc_set_interrupt(WDT0_INT, 7U, (INT_HANDLER)wdt_handler);
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/* watchdog timer restart */
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wdt_restart();
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}
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/* End of function wdt_init(uint32_t overflow_time) */
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void wdt_restart(void)
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{
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uint8_t reg8;
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uint32_t reg32;
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reg32 = mem_read32(ICUMX_CFG4);
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if((reg32 & ICUMX_CFG4_ICUMOPWDVAC) != 0U)
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{
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reg8 = mem_read8(ICUMX_WDTA0REF);
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reg8 = WDT_ACT_CODE - reg8;
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/* Watchdog Timer restart. */
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/* Subtract ICUMX_WDTA0REF from activation code when VAC(Variable Activation Code) is enabled. */
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mem_write8(ICUMX_WDTA0EVAC, reg8);
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}
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else
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{
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/* Watchdog Timer restart. */
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mem_write8(ICUMX_WDTA0EVAC, WDT_ACT_CODE);
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}
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}
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/* End of function wdt_restart(void) */
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#include <micro_wait.h>
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#include <rst_register.h>
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#define RST_SRESCR0 (RST_BASE + 0x18)
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#define RST_SPRES 0x5AA58000UL
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/* Interrupt handling function */
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void wdt_handler(void)
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{
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intc_disable_interrupt(WDT0_INT);
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ERROR("\n");
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ERROR("ICUMX: System WDT overflow\n");
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#ifdef WDT_RESET
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micro_wait(11*1000U); /* wait 11 miliseconds */
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/* try to reset */
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mem_write32(RST_SRESCR0, RST_SPRES);
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#else
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#warning "WDT_RESET is not defined. System will not reset."
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/* If WDT_RESET is not defined, the system will not reset. */
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/* This is useful for debugging purposes, but in production, */
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/* it is recommended to define WDT_RESET to ensure the system resets on WDT overflow. */
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#endif
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panic;
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}
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/* End of function wdt_handler(void) */
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