add IPL

2025-12-24 17:21:08 +09:00
parent a96323de19
commit 96dc62d8dc
2302 changed files with 455822 additions and 0 deletions
--- a/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/fcpr/fcpr.c
+++ b/IPL/Customer/Mobis/Gen4_ICUMX_Loader/ip/fcpr/fcpr.c
@@ -0,0 +1,79 @@
+/*******************************************************************************
+ * DISCLAIMER
+ * This software is supplied by Renesas Electronics Corporation and is only
+ * intended for use with Renesas products. No other uses are authorized. This
+ * software is owned by Renesas Electronics Corporation and is protected under
+ * all applicable laws, including copyright laws.
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+ * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+ * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+ * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+ * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+ * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+ * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+ * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+ * Renesas reserves the right, without notice, to make changes to this software
+ * and to discontinue the availability of this software. By using this software,
+ * you agree to the additional terms and conditions found by accessing the
+ * following link:
+ * http://www.renesas.com/disclaimer
+ * Copyright 2023 Renesas Electronics Corporation All rights reserved.
+ *******************************************************************************/
+
+/*******************************************************************************
+ * DESCRIPTION   : FCPR initialize
+ ******************************************************************************/
+ /******************************************************************************
+ * @file          fcpr.c
+ * - Version      : 0.04
+ * @brief         Initial setting process of FCPR.
+ * .
+ *****************************************************************************/
+/******************************************************************************
+ * History : DD.MM.YYYY Version  Description
+ *         : 28.10.2022 0.01     First Release
+ *         : 22.11.2022 0.02     Defenition Remap address
+ *         : 14.06.2023 0.03     Update the setting process for FCPR.
+ *         : 21.08.2023 0.04     Add support for V4M.
+ *****************************************************************************/
+
+#include <stdint.h>
+#include <types.h>
+#include <cpg.h>
+#include <fcpr.h>
+#include <remap.h>
+
+#define CPG_MSTPCR_FCPR        (((uint32_t)1U) << 17U)
+
+void fcpr_init(void)
+{
+    /* Register FPCR base address to SIC REMAP14 for V4M.                           */
+    /* There are no problems for V4H because same value had set for V4H in BootROM. */
+    set_sicremap_fcpr();
+
+#if (SET_FCPR_PARAM == FCPR_ENABLE)
+	uint32_t reg;
+
+    /* Enables supply of the clock signal */
+	reg = mem_read32(CPG_MSTPCR28D0);
+    /* If supply of clock to FCPR is stopped */
+    if (FALSE != (CPG_MSTPCR_FCPR & reg))
+    {
+        /* Supply of clock to FCPR is start */
+        reg &= ~(CPG_MSTPCR_FCPR);
+        mem_write32(CPG_MSTPCR28D0, reg);
+    }
+
+	/* Set value to FCPR_CMP_CTRL */
+    mem_write32(FCPR_CMP_CTRL, COMPRESSION_ENABLE);
+    /* Set value to FCPR_CMP_SPACE */
+    mem_write32(FCPR_CMP_SPACE, 0x00000000U);
+    /* Set value to FCPR_CMP_STADR */
+    mem_write32(FCPR_CMP_STADR, COMPRESSION_START_ADDR);
+    /* Set value to FCPR_CMP_EDADR */
+    mem_write32(FCPR_CMP_EDADR, COMPRESSION_END_ADDR);
+
+#endif /* SET_FCPR_PARAM == FCPR_ENABLE */
+}
+/* End of function fcpr_init(void) */