add IPL
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155
IPL/Customer/Mobis/Gen4_ICUMX_Loader/intc/intc.c
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155
IPL/Customer/Mobis/Gen4_ICUMX_Loader/intc/intc.c
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/*******************************************************************************
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* DISCLAIMER
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* This software is supplied by Renesas Electronics Corporation and is only
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* intended for use with Renesas products. No other uses are authorized. This
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* software is owned by Renesas Electronics Corporation and is protected under
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* all applicable laws, including copyright laws.
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* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
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* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
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* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
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* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
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* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
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* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
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* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
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* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
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* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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* Renesas reserves the right, without notice, to make changes to this software
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* and to discontinue the availability of this software. By using this software,
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* you agree to the additional terms and conditions found by accessing the
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* following link:
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* http://www.renesas.com/disclaimer
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* Copyright 2022-2023 Renesas Electronics Corporation All rights reserved.
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*******************************************************************************/
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/*******************************************************************************
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* DESCRIPTION : Interrupt controler driver
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******************************************************************************/
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/******************************************************************************
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* @file intc.c
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* - Version : 0.02
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* @brief Interrupt controler driver.
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* .
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*****************************************************************************/
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/******************************************************************************
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* History : DD.MM.YYYY Version Description
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* : 06.01.2022 0.01 First Release
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* : 05,04.2023 0.02 Remove string.h
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*****************************************************************************/
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#include <v800_ghs.h>
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#include <stdint.h>
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#include <mem_io.h>
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#include <rst_register.h>
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#include <intc.h>
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#include <log.h>
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#include <cpu.h>
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#include <intc.h>
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#define INTC_EI_MAX (64U)
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#define INTC_EI_ID_MASK (0xFFU)
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#define ICUMX_IC_MK_BIT (0x0080U) /* Interrupt request mask */
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#define ICUMX_IC_TB_BIT (0x0040U) /* Vector table selection system */
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#define ICUMX_IC_PRIORITY_MASK (0x0007U)
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#define INT_FLG_ENABLE (0x10U)
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#define INT_FLG_DISABLE (0x00U)
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#define EXCEPTION_SOURCE_CODE_BIT (0x1000U)
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typedef struct {
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INT_HANDLER handler;
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uint32_t arg;
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uint32_t flg;
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} INTC_HDR_TBL;
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static INTC_HDR_TBL s_intc_tbl[INTC_EI_MAX];
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void intc_set_interrupt(uint32_t int_no, uint32_t level, INT_HANDLER cb)
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{
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uint16_t reg;
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__DI();
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/* check Exception Source code */
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if (INTC_EI_MAX <= int_no)
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{
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ERROR("Undefined Exception Source code error.(0x%x)\n", int_no);
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panic;
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}
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/* set interrupt handler */
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s_intc_tbl[int_no].handler = cb;
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s_intc_tbl[int_no].flg = INT_FLG_ENABLE;
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/* the interrupt enable */
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reg = mem_read16(get_icumx_ic_addr(int_no));
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reg &= (~(ICUMX_IC_MK_BIT) | ICUMX_IC_PRIORITY_MASK);
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reg |= (ICUMX_IC_TB_BIT | (level & ICUMX_IC_PRIORITY_MASK));
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mem_write16(get_icumx_ic_addr(int_no), reg);
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__EI();
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}
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/* End of function intc_set_interrupt(uint32_t int_no, uint32_t level, INT_HANDLER cb) */
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void intc_disable_interrupt(uint32_t int_no)
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{
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uint16_t reg;
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__DI();
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/* check Exception Source code */
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if (INTC_EI_MAX <= int_no)
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{
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ERROR("Undefined Exception Source code error.(0x%x)\n", int_no);
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panic;
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}
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/* check interrupt enable flag */
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if (INT_FLG_DISABLE == (s_intc_tbl[int_no].flg & INT_FLG_ENABLE))
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{
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ERROR("Execption disabled.(0x%x)\n", int_no);
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panic;
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}
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/* the interrupt disable */
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s_intc_tbl[int_no].flg &= ~INT_FLG_ENABLE;
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reg = mem_read16(get_icumx_ic_addr(int_no));
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reg &= ~(ICUMX_IC_TB_BIT);
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reg |= ICUMX_IC_MK_BIT;
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mem_write16(get_icumx_ic_addr(int_no), reg);
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__EI();
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}
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/* End of function intc_disable_interrupt(uint32_t int_no) */
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#pragma ghs interrupt(nonreentrant)
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void intc_handler(void)
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{
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uint32_t reg;
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uint32_t int_no;
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reg = __STSR(EIIC);
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/* check Exception Source code */
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if ((reg & EXCEPTION_SOURCE_CODE_BIT) == 0U)
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{
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ERROR("Undefined Exception Source code error.(0x%x)\n", reg);
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panic;
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}
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int_no = reg & INTC_EI_ID_MASK;
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if (INTC_EI_MAX <= int_no)
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{
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ERROR("Undefined Exception Source code error.(0x%x)\n", int_no);
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panic;
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}
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/* check interrupt enable flag */
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if (INT_FLG_DISABLE == (s_intc_tbl[int_no].flg & INT_FLG_ENABLE))
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{
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ERROR("Execption disabled.(0x%x)\n", int_no);
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panic;
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}
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/* execute interrupt handler */
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s_intc_tbl[int_no].handler(int_no, s_intc_tbl[int_no].arg);
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}
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/* End of function intc_handler(void) */
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