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/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
* Copyright 2021-2023 Renesas Electronics Corporation All rights reserved.
*******************************************************************************/
/*******************************************************************************
* DESCRIPTION : RT-VRAM register header
******************************************************************************/
#ifndef RTVRAM_REGISTER_H__
#define RTVRAM_REGISTER_H__
#include <stdint.h>
/* RT-VRAM register base address */
#define RTVRAM_REG_BASE (0xFFEC0000U)
#define RTVRAM_SECDIVD (RTVRAM_REG_BASE + 0x0000U)
#define RTVRAM_SECCTRRD (RTVRAM_REG_BASE + 0x0040U)
#define RTVRAM_SECCTRWD (RTVRAM_REG_BASE + 0x0340U)
#define RTVRAM_EXT_MODE (RTVRAM_REG_BASE + 0x8500U)
#define RTVRAM_VBUF_CFG (RTVRAM_REG_BASE + 0x6504U)
#define RTVRAM_CACHE_FLUSH (RTVRAM_REG_BASE + 0x4530U)
#define RTVRAM_VBUF_BADDR (RTVRAM_REG_BASE + 0xC580U)
#define RTVRAM_SECDIVD_DIVADDR_MASK (0x000FFFFFU)
#define RTVRAM_SECCTRRD_SECGRP_MASK (0x000F0000U)
#define RTVRAM_SECCTRRD_SAFGRP_MASK (0x0000FFFFU)
#define RTVRAM_SECCTRWD_SECGRP_MASK (0x000F0000U)
#define RTVRAM_SECCTRWD_SAFGRP_MASK (0x0000FFFFU)
static inline uint32_t get_rtvram_secdivd_addr(uint32_t num)
{
return ((RTVRAM_SECDIVD + (num * 4U)));
}
static inline uint32_t get_rtvram_secctrrd_addr(uint32_t num)
{
return ((RTVRAM_SECCTRRD + (num * 4U)));
}
static inline uint32_t get_rtvram_secctrwd_addr(uint32_t num)
{
return ((RTVRAM_SECCTRWD + (num * 4U)));
}
static inline uint32_t get_vbuf_baddr_addr(uint32_t num)
{
return ((RTVRAM_VBUF_BADDR + (num * 4U)));
}
#endif /* RTVRAM_REGISTER_H__ */