17300 lines
1.3 MiB
17300 lines
1.3 MiB
; --------------------------------------------------------------------------------
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; @Title: STM32L0 On-Chip Peripherals
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; @Props: Released
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; @Author: KNO, BGA, STR, JAM
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; @Changelog: 2016-11-07 BGA
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; 2017-05-20 STR
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; 2019-01-23 JAM
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; @Manufacturer: STM - ST Microelectronics N.V.
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; @Doc: 13902.pdf
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; 15056.pdf
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; 13259.pdf
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; 14610.pdf
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; 14611.pdf
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; 13587.pdf
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; 13586.pdf
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; 15057.pdf
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; 15058.pdf
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; 15060.pdf
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; 13902.pdf
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; 16188.pdf
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; 13259.pdf
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; 16211.pdf
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; 16455.pdf
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; 17143.pdf
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; 17144.pdf
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; CD00264852.pdf
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; 15274.pdf
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; RM0008_STM32_connectivity_02.pdf
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; CD00161561.pdf (2011-04)
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; CD00161566.pdf (2011-04)
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; CD00171190.pdf (2011-10)
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; CD00212417.pdf (2012-06)
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; CD00246267.pdf (2012-07)
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; @Core: Cortex-M0+
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; @Chip: STM32L011D3, STM32L011D4, STM32L011E3, STM32L011E4, STM32L011F3,
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; STM32L011F4, STM32L011G3, STM32L011G4, STM32L011K3, STM32L011K4,
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; STM32L021D4, STM32L021F4, STM32L021G4, STM32L021K4, STM32L031C4,
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; STM32L031C6, STM32L031E4, STM32L031E6, STM32L031F4, STM32L031F6,
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; STM32L031G4, STM32L031G6, STM32L031K4, STM32L031K6, STM32L041C6,
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; STM32L041F6, STM32L041G6, STM32L041K6, STM32L071C8, STM32L071CB,
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; STM32L071CZ, STM32L071K8, STM32L071KB, STM32L071KZ, STM32L071RB,
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; STM32L071RZ, STM32L071V8, STM32L071VB, STM32L071VZ, STM32L072CB,
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; STM32L072KB, STM32L072KZ, STM32L072RB, STM32L072RZ, STM32L072V8,
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; STM32L072VB, STM32L072VZ, STM32L073CB, STM32L073CZ, STM32L073RB,
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; STM32L073RZ, STM32L073V8, STM32L073VB, STM32L073VZ, STM32L081CZ,
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; STM32L081KZ, STM32L082KB, STM32L082KZ, STM32L083CB, STM32L083CZ,
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; STM32L083RB, STM32L083RZ
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; @Copyright: (C) 1989-2019 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perstm32l0.per 10148 2019-01-31 15:57:05Z mkolodziejczyk $
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; Known problems:
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; MODULE REGISTER DESCRIPTION
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; COMP Missing BASEADRESS - module commented
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; GPIO A Pin number differences, depending on chip package. Unable to define completely due to limited chip number. Highest possible number of pins listed.
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; GPIO B Pin number differences, depending on chip package. Unable to define completely due to limited chip number. Highest possible number of pins listed
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; TSC No convinient information about number of channels. Highest possible number listed
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config 16. 8.
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tree.close "Core Registers (Cortex-M0+)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 0x8
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if (CORENAME()=="CORTEXM1")
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group.long 0x10++0x0b
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line.long 0x00 "STCSR,SysTick Control and Status Register"
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bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
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bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "No effect,Processor clock"
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textline " "
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bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
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bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
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line.long 0x04 "STRVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
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line.long 0x08 "STCVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
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else
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group.long 0x10++0x0b
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line.long 0x00 "STCSR,SysTick Control and Status Register"
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bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
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bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "External clock,Processor clock"
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textline " "
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bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
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bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
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line.long 0x04 "STRVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
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line.long 0x08 "STCVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
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endif
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if (CORENAME()=="CORTEXM1")
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rgroup.long 0x1c++0x03
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line.long 0x00 "STCR,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Reads as one" "0,1"
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bitfld.long 0x00 30. " SKEW ,Reads as zero" "0,1"
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textline " "
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Indicates calibration value is not known"
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else
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rgroup.long 0x1c++0x03
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line.long 0x00 "STCR,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the IMPL_DEF reference clock is provided" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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textline " "
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing subject to system clock skew errors"
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endif
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rgroup.long 0xd00++0x03
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line.long 0x00 "CPUID,CPU ID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer code"
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hexmask.long.byte 0x00 20.--23. 1. " VARIANT ,Implementation defined variant number"
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textline " "
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hexmask.long.byte 0x00 4.--15. 1. " PARTNO ,Number of processor within family"
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hexmask.long.byte 0x00 0.--3. 1. " REVISION ,Implementation defined revision number"
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group.long 0xd04++0x03
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line.long 0x00 "ICSR,Interrupt Control State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,Setting this bit will activate an NMI" "No effect,Set pending"
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bitfld.long 0x00 28. " PENDSVSET ,Set a pending PendSV interrupt" "No effect,Set pending"
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textline " "
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bitfld.long 0x00 27. " PENDSVCLR ,Clear a pending PendSV interrupt" "No effect,Clear pending"
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bitfld.long 0x00 26. " PENDSTSET ,Set a pending SysTick" "No effect,Set pending"
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textline " "
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bitfld.long 0x00 25. " PENDSVCLR ,Clear a pending SysTick" "No effect,Clear pending"
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bitfld.long 0x00 23. " ISRPREEMPT ,Pending exception service" "No service,Service"
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textline " "
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bitfld.long 0x00 22. " ISRPENDING ,External interrupt pending flag" "No interrupt,Interrupt"
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hexmask.long.byte 0x00 12.--17. 1. " VECTPENDING ,Active exception number field"
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textline " "
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hexmask.long.byte 0x00 0.--5. 1. " VECTACTIVET ,Active exception number field"
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if (CORENAME()=="CORTEXM0+")
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group.long 0xd08++0x03
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line.long 0x00 "VTOR,Vector Table Offset Register"
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hexmask.long 0x00 7.--31. 0x80 " TBLOFF ,Vector table address"
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else
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textline " "
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endif
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group.long 0xd0c++0x03
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line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x00 16.--31. 1. " VECTKEY ,Vector Key"
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bitfld.long 0x00 15. " ENDIANNESS ,Data endianness bit" "Little-endian,Big-endian"
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textline " "
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bitfld.long 0x00 2. " SYSRESETREQ ,System reset setup request" "No effect,Reset"
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bitfld.long 0x00 1. " VECTCLRACTIVE ,Clears all active state information" "No clear,Clear"
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group.long 0xd10++0x03
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line.long 0x00 "SCR,System Control Register"
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bitfld.long 0x00 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x00 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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textline " "
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bitfld.long 0x00 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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rgroup.long 0xd14++0x03
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line.long 0x00 "CCR,Configuration and Control Register"
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bitfld.long 0x00 9. " STKALIGN ,Indicates whether on exception entry all exceptions are entered with 8-byte stack alignment and the context to restore it is saved" "Reserved,Aligned"
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bitfld.long 0x00 3. " UNALIGN_TRP ,Indicates that all unaligned accesses results in a Hard Fault" "Reserved,Trapped"
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group.long 0xd1c++0x0b
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line.long 0x00 "SHPR2,System Handler Priority Register 2"
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bitfld.long 0x00 30.--31. " PRI_11 ,Priority of system handler 11-SVCall" "00,01,10,11"
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line.long 0x04 "SHPR3,System Handler Priority Register 3"
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bitfld.long 0x04 30.--31. " PRI_15 ,Priority of system handler 15-SysTick" "00,01,10,11"
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bitfld.long 0x04 22.--23. " PRI_14 ,Priority of system handler 14- PendSV" "00,01,10,11"
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line.long 0x08 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x08 15. " SVCALLPENDED ,Reads as 1 if SVCall is pending" "Not pending,Pending"
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if (CORENAME()=="CORTEXM0+")
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hgroup.long 0x08++0x03
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hide.long 0x00 "ACTLR,Auxiliary Control Register"
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else
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textline " "
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endif
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else
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newline
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textline "COREDEBUG component base address not specified"
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newline
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endif
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tree.end
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tree "Memory Protection Unit (MPU)"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 15.
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rgroup.long 0xD90++0x03
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line.long 0x00 "MPU_TYPE,MPU Type Register"
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bitfld.long 0x00 8.--15. 1. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,?..."
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group.long 0xD94++0x03
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line.long 0x00 "MPU_CTRL,MPU Control Register"
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bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
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bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
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bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
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group.long 0xD98++0x03
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line.long 0x00 "MPU_RNR,MPU Region Number Register"
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hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
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tree.close "MPU regions"
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if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
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group.long 0xD9C++0x03 "Region 0"
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saveout 0xD98 %l 0x0
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line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
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hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
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group.long 0xDA0++0x03
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saveout 0xD98 %l 0x0
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line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
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bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
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bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
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bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
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textline " "
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bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
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bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
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bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
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textline " "
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bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
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bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
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bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
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bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
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bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
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bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
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bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
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bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
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bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
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bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
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else
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hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
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saveout 0xD98 %l 0x0
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hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
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hgroup.long 0xDA0++0x03
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saveout 0xD98 %l 0x0
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hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
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textline " "
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textline " "
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endif
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if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
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group.long 0xD9C++0x03 "Region 1"
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saveout 0xD98 %l 0x1
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line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
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hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
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group.long 0xDA0++0x03
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saveout 0xD98 %l 0x1
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line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
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bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
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bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
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bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
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textline " "
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bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
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bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
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bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
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textline " "
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bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
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bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
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bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
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bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
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bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
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bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
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bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
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bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
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bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
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bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
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else
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hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
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saveout 0xD98 %l 0x1
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hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
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hgroup.long 0xDA0++0x03
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saveout 0xD98 %l 0x1
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hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
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textline " "
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textline " "
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|
endif
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|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
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group.long 0xD9C++0x03 "Region 2"
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saveout 0xD98 %l 0x2
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|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
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|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
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group.long 0xDA0++0x03
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saveout 0xD98 %l 0x2
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|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
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|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
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bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
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|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
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|
textline " "
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|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
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|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
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|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
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|
textline " "
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bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
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bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
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|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
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|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
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bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
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bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
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bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
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|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
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|
hgroup.long 0xDA0++0x03
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|
saveout 0xD98 %l 0x2
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|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller (NVIC)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 12.
|
|
tree "Interrupt Enable Registers"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "SET/CLREN,Interrupt Set/Clear Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "SET/CLRPEN,Interrupt Set/Clear Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
tree.end
|
|
width 6.
|
|
tree "Interrupt Priority Registers"
|
|
group.long 0x400++0x1F
|
|
line.long 0x00 "INT0,Interrupt Priority Register"
|
|
bitfld.long 0x00 30.--31. " IP_3 ,Priority of interrupt 3" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. " IP_2 ,Priority of interrupt 2" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. " IP_1 ,Priority of interrupt 1" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " IP_0 ,Priority of interrupt 0" "0,1,2,3"
|
|
line.long 0x04 "INT1,Interrupt Priority Register"
|
|
bitfld.long 0x04 30.--31. " IP_7 ,Priority of interrupt 7" "0,1,2,3"
|
|
bitfld.long 0x04 22.--23. " IP_6 ,Priority of interrupt 6" "0,1,2,3"
|
|
bitfld.long 0x04 14.--15. " IP_5 ,Priority of interrupt 5" "0,1,2,3"
|
|
bitfld.long 0x04 6.--7. " IP_4 ,Priority of interrupt 4" "0,1,2,3"
|
|
line.long 0x08 "INT2,Interrupt Priority Register"
|
|
bitfld.long 0x08 30.--31. " IP_11 ,Priority of interrupt 11" "0,1,2,3"
|
|
bitfld.long 0x08 22.--23. " IP_10 ,Priority of interrupt 10" "0,1,2,3"
|
|
bitfld.long 0x08 14.--15. " IP_9 ,Priority of interrupt 9" "0,1,2,3"
|
|
bitfld.long 0x08 6.--7. " IP_8 ,Priority of interrupt 8" "0,1,2,3"
|
|
line.long 0x0C "INT3,Interrupt Priority Register"
|
|
bitfld.long 0x0C 30.--31. " IP_15 ,Priority of interrupt 15" "0,1,2,3"
|
|
bitfld.long 0x0C 22.--23. " IP_14 ,Priority of interrupt 14" "0,1,2,3"
|
|
bitfld.long 0x0C 14.--15. " IP_13 ,Priority of interrupt 13" "0,1,2,3"
|
|
bitfld.long 0x0C 6.--7. " IP_12 ,Priority of interrupt 12" "0,1,2,3"
|
|
line.long 0x10 "INT4,Interrupt Priority Register"
|
|
bitfld.long 0x10 30.--31. " IP_19 ,Priority of interrupt 19" "0,1,2,3"
|
|
bitfld.long 0x10 22.--23. " IP_18 ,Priority of interrupt 18" "0,1,2,3"
|
|
bitfld.long 0x10 14.--15. " IP_17 ,Priority of interrupt 17" "0,1,2,3"
|
|
bitfld.long 0x10 6.--7. " IP_16 ,Priority of interrupt 16" "0,1,2,3"
|
|
line.long 0x14 "INT5,Interrupt Priority Register"
|
|
bitfld.long 0x14 30.--31. " IP_23 ,Priority of interrupt 23" "0,1,2,3"
|
|
bitfld.long 0x14 22.--23. " IP_22 ,Priority of interrupt 22" "0,1,2,3"
|
|
bitfld.long 0x14 14.--15. " IP_21 ,Priority of interrupt 21" "0,1,2,3"
|
|
bitfld.long 0x14 6.--7. " IP_20 ,Priority of interrupt 20" "0,1,2,3"
|
|
line.long 0x18 "INT6,Interrupt Priority Register"
|
|
bitfld.long 0x18 30.--31. " IP_27 ,Priority of interrupt 27" "0,1,2,3"
|
|
bitfld.long 0x18 22.--23. " IP_26 ,Priority of interrupt 26" "0,1,2,3"
|
|
bitfld.long 0x18 14.--15. " IP_25 ,Priority of interrupt 25" "0,1,2,3"
|
|
bitfld.long 0x18 6.--7. " IP_24 ,Priority of interrupt 24" "0,1,2,3"
|
|
line.long 0x1C "INT7,Interrupt Priority Register"
|
|
bitfld.long 0x1C 30.--31. " IP_31 ,Priority of interrupt 31" "0,1,2,3"
|
|
bitfld.long 0x1C 22.--23. " IP_30 ,Priority of interrupt 30" "0,1,2,3"
|
|
bitfld.long 0x1C 14.--15. " IP_29 ,Priority of interrupt 29" "0,1,2,3"
|
|
bitfld.long 0x1C 6.--7. " IP_28 ,Priority of interrupt 28" "0,1,2,3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 0xA
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,External debug request flag" "No occurred,Occurred"
|
|
eventfld.long 0x00 3. " VCATCH ,Vector catch flag" "No occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 2. " DWTRAP ,Data Watchpoint flag" "No match,Match"
|
|
textline " "
|
|
eventfld.long 0x00 1. " BKPT ,BKPT flag" "No match,Match"
|
|
eventfld.long 0x00 0. " HALTED ,Halt request flag" "No request,Request"
|
|
if (CORENAME()=="CORTEXM1")
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Selector Register"
|
|
bitfld.long 0x00 16. " REGWnR ,Register Read/Write" "Read,Write"
|
|
bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,Current SP,LR,DebugReturnAddress,xPSR Flags,MSP,PSP,Reserved,CONTROL[1]/PRIMASK[0],?..."
|
|
group.long 0xDF8++0x07
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Data for reading and writing registers to and from the processor"
|
|
line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x04 24. " DWTENA ,Global enable or disable for the DW unit" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " VC_HARDERR ,Debug trap on a Hard Fault" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 0. " VC_CORERESET ,Reset Vector Catch" "No reset,Reset"
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Breakpoint Unit (BPU)"
|
|
sif COMPonent.AVAILABLE("BPU")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BPU",-1))
|
|
width 8.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "BP_CTRL,Breakpoint Control Register"
|
|
bitfld.long 0x00 4.--7. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " KEY ,Key field" "No write,Write"
|
|
bitfld.long 0x00 0. " ENABLE ,Breakpoint unit enable bit" "Disabled,Enabled"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "B_COMP0,Breakpoint Comparator Registers 0"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 0" "Disabled,Enabled"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "B_COMP1,Breakpoint Comparator Registers 1"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 1" "Disabled,Enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "B_COMP2,Breakpoint Comparator Registers 2"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 2" "Disabled,Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "B_COMP3,Breakpoint Comparator Registers 3"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 3" "Disabled,Enabled"
|
|
else
|
|
newline
|
|
textline "BPU component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 14.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "DW_CTRL,DW Control Register "
|
|
bitfld.long 0x00 28.--31. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "DW_PCSR,DW Program Counter Sample Register"
|
|
hexmask.long 0x00 0.--31. 1. " EIASAMPLE ,Execution instruction address sample or 0xFFFFFFFF"
|
|
group.long 0x20++0x0b
|
|
line.long 0x00 "DW_COMP0,DW Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " COMP1 ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK0,DW Mask Register 0"
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION0,DW Function Register 0"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
group.long 0x30++0x0b
|
|
line.long 0x00 "DW_COMP1,DW Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " COMP ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK1,DW Mask Register 1 "
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION1,DW Function Register 1"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
tree "FLASH (Flash Memory and data EEPROM)"
|
|
base ad:0x40022000
|
|
width 15.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "FLASH_ACR,Flash access control register"
|
|
bitfld.long 0x00 6. " PRE_READ ,Memory interface stores the last address read as data and tries to read the next one when no other read or write or prefetch operation is ongoing" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DISAB_BUF ,Buffers used as cache during a read disable" "No,Yes"
|
|
bitfld.long 0x00 4. " RUN_PD ,NVM working mode when device is in run mode" "Idle,Power-down"
|
|
bitfld.long 0x00 3. " SLEEP_PD ,NVM working mode when device is in sleep mode" "Idle,Power-down"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PRFTEN ,Prefetch" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " LATENCY ,Latency" "Zero wait state,One wait state"
|
|
if ((per.l(ad:0x40022000+0x04)&0x05)==0x00)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "FLASH_PECR,Program and erase control register"
|
|
sif ((!cpuis("STM32L051*"))&&(!cpuis("STM32L052*"))&&(!cpuis("STM32L053*"))&&(!cpuis("STM32L062*"))&&(!cpuis("STM32L063*")))
|
|
bitfld.long 0x00 23. " NZDISABLE ,Non-Zero check notification disable" "No,Yes"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 18. " OBL_LAUNCH ,Option byte loading" "Completed,Not completed"
|
|
bitfld.long 0x00 17. " ERRIE ,Error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EOPIE ,End of programming interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif ((cpuis("STM32L07*"))||(cpuis("STM32L08*")))
|
|
bitfld.long 0x00 15. " PARALLELBANK ,Parallel bank programming mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 10. " FPRG ,Half Page programming mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " ERASE ,Erase operation request" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " FIX ,Erase phase" "When necessary,Always"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DATA ,Data EEPROM" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " PROG ,The Flash program memory" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " OPT_LOCK ,The write and erase operations in the Option bytes area" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PRG_LOCK ,The write and erase operations in the Flash program memory" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PE_LOCK ,FLASH_PECR lock" "Unlocked,Locked"
|
|
elif ((per.l(ad:0x40022000+0x04)&0x05)==0x04)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "FLASH_PECR,Program and erase control register"
|
|
sif ((!cpuis("STM32L051*"))&&(!cpuis("STM32L052*"))&&(!cpuis("STM32L053*"))&&(!cpuis("STM32L062*"))&&(!cpuis("STM32L063*")))
|
|
bitfld.long 0x00 23. " NZDISABLE ,Non-Zero check notification disable" "No,Yes"
|
|
textline " "
|
|
endif
|
|
rbitfld.long 0x00 18. " OBL_LAUNCH ,Option byte loading" "Completed,Not completed"
|
|
bitfld.long 0x00 17. " ERRIE ,Error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EOPIE ,End of programming interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif ((cpuis("STM32L07*"))||(cpuis("STM32L08*")))
|
|
bitfld.long 0x00 15. " PARALLELBANK ,Parallel bank programming mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 10. " FPRG ,Half Page programming mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " ERASE ,Erase operation request" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " FIX ,Erase phase" "When necessary,Always"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DATA ,Data EEPROM" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " PROG ,The Flash program memory" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " OPT_LOCK ,The write and erase operations in the Option bytes area" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PRG_LOCK ,The write and erase operations in the Flash program memory" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PE_LOCK ,FLASH_PECR lock" "Unlocked,Locked"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "FLASH_PECR,Program and erase control register"
|
|
sif ((!cpuis("STM32L051*"))&&(!cpuis("STM32L052*"))&&(!cpuis("STM32L053*"))&&(!cpuis("STM32L062*"))&&(!cpuis("STM32L063*")))
|
|
rbitfld.long 0x00 23. " NZDISABLE ,Non-Zero check notification disable" "No,Yes"
|
|
textline " "
|
|
endif
|
|
rbitfld.long 0x00 18. " OBL_LAUNCH ,Option byte loading" "Completed,Not completed"
|
|
rbitfld.long 0x00 17. " ERRIE ,Error interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16. " EOPIE ,End of programming interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif ((cpuis("STM32L07*"))||(cpuis("STM32L08*")))
|
|
bitfld.long 0x00 15. " PARALLELBANK ,Parallel bank programming mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
rbitfld.long 0x00 10. " FPRG ,Half Page programming mode" "Disabled,Enabled"
|
|
rbitfld.long 0x00 9. " ERASE ,Erase operation request" "Not requested,Requested"
|
|
rbitfld.long 0x00 8. " FIX ,Erase phase" "When necessary,Always"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " DATA ,Data EEPROM" "Not selected,Selected"
|
|
rbitfld.long 0x00 3. " PROG ,The Flash program memory" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " OPT_LOCK ,The write and erase operations in the Option bytes area" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PRG_LOCK ,The write and erase operations in the Flash program memory" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PE_LOCK ,FLASH_PECR lock" "Unlocked,Locked"
|
|
endif
|
|
wgroup.long 0x08++0x0F
|
|
line.long 0x00 "FLASH_PDKEYR,Power-down key register"
|
|
line.long 0x04 "FLASH_PEKEYR,PECR unlock key register"
|
|
line.long 0x08 "FLASH_PRGKEYR,Program and erase key register"
|
|
line.long 0x0C "FLASH_OPTKEYR,Option bytes unlock key register"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FLASH_SR,Status register"
|
|
eventfld.long 0x00 17. " FWWERR ,Write/Erase operation abort to perform a fetch" "Disabled,Enabled"
|
|
eventfld.long 0x00 16. " NOTZEROERR ,Region of memory where write operation is performed" "In erased region,In not erased region"
|
|
eventfld.long 0x00 13. " RDERR ,Read protection error" "Not occurred,One occurred"
|
|
eventfld.long 0x00 12. " OPTVERRUSR ,Error during the Option byte User loading" "Not occurred,At least one occurred"
|
|
eventfld.long 0x00 11. " OPTVERR ,Error during the Option bytes loading" "Not occurred,At least one occurred"
|
|
textline " "
|
|
eventfld.long 0x00 10. " SIZERR ,Size error" "Not occurred,Occurred"
|
|
eventfld.long 0x00 9. " PGAERR ,Programming alignment error" "Not occurred,Occurred"
|
|
eventfld.long 0x00 8. " WRPERR ,Write protection error" "Not occurred,One occurred"
|
|
rbitfld.long 0x00 3. " READY ,NVM readiness for read and write/erase operations" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " ENDHV ,High voltage for write/erase operations execution" "On,Off"
|
|
eventfld.long 0x00 1. " EOP ,End of program" "Not occurred,One occurred"
|
|
rbitfld.long 0x00 0. " BSY ,Memory interface busy" "Not busy,Busy"
|
|
sif ((cpuis("STM32L011*"))||cpuis("STM32L021*"))
|
|
if (((per.l(ad:0x40022000+0x1C))&0x20000000)==0x20000000)
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "FLASH_OPTR,Option bytes register"
|
|
bitfld.long 0x00 30.--31. " NBOOT ,Memory boot source" "Embedded SRAM,Flash,System memory,Flash"
|
|
bitfld.long 0x00 29. " NBOOT_SEL ,BOOT0 Signal Definition Selcection" "BOOT0 pin,nBOOT"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BFB2 ,BOOT Source Selection" "User flash memory,System memory"
|
|
bitfld.long 0x00 22. " NRST_STDBY ,Reset generation" "Standby enter,No reset"
|
|
bitfld.long 0x00 21. " NRST_STOP ,Reset generation" "Stop mode enter,No reset"
|
|
bitfld.long 0x00 20. " WDG_SW ,Watchdog Configuration" "Hardware,Software"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " BOR_LEV ,Brown out reset threshold level" "Off,Off,Off,Off,Off,Off,Off,Off,Level 0,Level 1,Level 2,Level 3,Level 4,?..."
|
|
bitfld.long 0x00 8. " WPRMOD ,Write and read protection of Flash program memory sectors" "Write protection,Read protection"
|
|
hexmask.long.byte 0x00 0.--7. 0x01 " RDPROT ,Read protection"
|
|
else
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "FLASH_OPTR,Option bytes register"
|
|
bitfld.long 0x00 31. " NBOOT1 ,Memory boot source [BOOT0 pin == 0/BOOT0 pin == 1]" "Flash/Embedded SRAM,Flash/System memory"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BFB2 ,BOOT Source Selection" "User flash memory,System memory"
|
|
bitfld.long 0x00 22. " NRST_STDBY ,Reset generation" "Standby enter,No reset"
|
|
bitfld.long 0x00 21. " NRST_STOP ,Reset generation" "Stop mode enter,No reset"
|
|
bitfld.long 0x00 20. " WDG_SW ,Watchdog Configuration" "Hardware,Software"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " BOR_LEV ,Brown out reset threshold level" "Off,Off,Off,Off,Off,Off,Off,Off,Level 0,Level 1,Level 2,Level 3,Level 4,?..."
|
|
bitfld.long 0x00 8. " WPRMOD ,Write and read protection of Flash program memory sectors" "Write protection,Read protection"
|
|
hexmask.long.byte 0x00 0.--7. 0x01 " RDPROT ,Read protection"
|
|
endif
|
|
else
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "FLASH_OPTR,Option bytes register"
|
|
bitfld.long 0x00 31. " NBOOT1 ,Memory boot source [BOOT0 pin == 0/BOOT0 pin == 1]" "Flash/Embedded SRAM,Flash/System memory"
|
|
sif ((cpuis("STM32L07*"))||(cpuis("STM32L08*")))
|
|
bitfld.long 0x00 23. " BFB2 ,BOOT Source Selection" "Bank 1,System memory"
|
|
else
|
|
bitfld.long 0x00 23. " BFB2 ,BOOT Source Selection" "USER flash memory,System memory"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 22. " NRST_STDBY ,Reset generation" "Standby enter,No reset"
|
|
bitfld.long 0x00 21. " NRST_STOP ,Reset generation" "Stop mode enter,No reset"
|
|
bitfld.long 0x00 20. " WDG_SW ,Watchdog Configuration" "Hardware,Software"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " BOR_LEV ,Brown out reset threshold level" "Off,Off,Off,Off,Off,Off,Off,Off,Level 0,Level 1,Level 2,Level 3,Level 4,?..."
|
|
bitfld.long 0x00 8. " WPRMOD ,Write and read protection of Flash program memory sectors" "Write protection,Read protection"
|
|
hexmask.long.byte 0x00 0.--7. 0x01 " RDPROT ,Read protection"
|
|
endif
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "FLASH_WRPROT1,Write protection register 1"
|
|
rgroup.long 0x80++0x03
|
|
line.long 0x00 "FLASH_WRPROT1,Write protection register 2"
|
|
width 0x0B
|
|
tree.end
|
|
tree "CRC (Cyclic redundancy check calculation unit)"
|
|
base ad:0x40023000
|
|
width 10.
|
|
group.long 0x00++0x0B
|
|
line.long 0x00 "CRC_DR, Data register"
|
|
line.long 0x04 "CRC_IDR, Independent data register"
|
|
hexmask.byte 0x04 0.--7. 0x01 " IDR[7:0] ,General-purpose 8-bit data register bits"
|
|
line.long 0x08 "CRC_CR, Control register"
|
|
bitfld.long 0x08 7. " REV_OUT ,Reverse output data" "Not affected,Reversed"
|
|
bitfld.long 0x08 5.--6. " REV_IN[1:0] ,Reverse input data" "Not affected,By byte,By half-word,By word"
|
|
bitfld.long 0x08 3.--4. " POLYSIZE[1:0] ,Polynomial size" "32 bit,16-bit,8-bit,7-bit"
|
|
bitfld.long 0x08 0. " RESET , Reset CRC bit" "No reset,Reset"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "CRC_INIT,Initial CRC value"
|
|
line.long 0x04 "CRC_POL,CRC polynomial"
|
|
width 0xB
|
|
tree.end
|
|
sif ((cpuis("STM32L051*"))||(cpuis("STM32L052*"))||(cpuis("STM32L053*"))||(cpuis("STM32L062*"))||(cpuis("STM32L063*"))||(cpuis("STM32L07*"))||(cpuis("STM32L08*")))
|
|
tree "FW (Firewall)"
|
|
base ad:0x40011C00
|
|
width 10.
|
|
group.long 0x00++0x17
|
|
line.long 0x00 "FW_CSSA,Code segment start address"
|
|
hexmask.long.word 0x00 8.--23. 0x01 " ADD[23:8] ,Code segment start address"
|
|
line.long 0x04 "FW_CSL,Code segment length"
|
|
hexmask.long.word 0x04 8.--21. 0x01 " LENG[23:8] ,Code segment length"
|
|
line.long 0x08 "FW_NVDSSA,Non-volatile data segment start address"
|
|
hexmask.long.word 0x08 8.--23. 0x01 " ADD[23:8] ,Non-volatile data segment start address"
|
|
line.long 0x0C "FW_NVDSL,Non-volatile data segment length"
|
|
hexmask.long.word 0x0C 8.--23. 0x01 " LENG[21:8] ,Non-volatile data segment length"
|
|
line.long 0x10 "FW_VDSSA,Volatile data segment start address"
|
|
hexmask.long.word 0x10 6.--15. 0x40 " ADD[15:6] ,Volatile data segment start address"
|
|
line.long 0x14 "FW_VDSL,Volatile data segment length"
|
|
hexmask.long.word 0x14 6.--15. 0x40 " LENG[15:6] ,Non-volatile data segment length"
|
|
if ((per.l(ad:0x40011C00+0x20))&0x02)==0x02
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FW_CR,Configuration register"
|
|
bitfld.long 0x00 1. " VDS ,Volatile data shared" "Not shared,Shared"
|
|
bitfld.long 0x00 0. " FPA ,Firewall pre alarm" "Disabled(Reset),Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FW_CR,Configuration register"
|
|
bitfld.long 0x00 2. " VDE ,Volatile data execution enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " VDS ,Volatile data shared" "Not shared,Shared"
|
|
bitfld.long 0x00 0. " FPA ,Firewall pre alarm" "Disabled(Reset),Enabled"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree "PWR (Power Control Register)"
|
|
base ad:0x40007000
|
|
width 9.
|
|
sif CPUIS("STM32L0?1*")
|
|
if ((per.l(ad:0x40007000))&0x01)==0x01
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PWR_CR,Power control register"
|
|
textline " "
|
|
bitfld.long 0x00 14. " LPRUN ,Voltage regulator low power run mode" "Main mode,Low power mode"
|
|
bitfld.long 0x00 13. " DS_EE_KOFF ,Deep-sleep mode with Flash memory kept off" "Disabled,Enabled"
|
|
bitfld.long 0x00 11.--12. " VOS[1:0] ,Voltage scaling range selection" ",1.8V,1.5V,1.2V"
|
|
bitfld.long 0x00 10. " FWU ,Fast wakeup" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ULP ,Ultralow power mode" "VREFINT on,VREFINT off"
|
|
bitfld.long 0x00 8. " DBP ,Backup Domain write protection" "Enabled,Disabled"
|
|
bitfld.long 0x00 5.--7. " PLS ,PVD Level Selection" "1.9 V,2.1 V,2.3 V,2.5 V,2.7 V,2.9 V,3.1 V,External"
|
|
bitfld.long 0x00 4. " PVDE ,Power Voltage Detector Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 3. " CSBF ,Clear STANDBY Flag" "No effect,Clear"
|
|
eventfld.long 0x00 2. " CWUF ,Clear Wake-up Flag" "No effect,Clear"
|
|
bitfld.long 0x00 1. " PDDS ,Power Down Deepsleep" "Stop,Standby"
|
|
bitfld.long 0x00 0. " LPSDSR ,Low-power deepsleep/sleep/low power run" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PWR_CR,Power control register"
|
|
bitfld.long 0x00 16. " LPDS ,Low-power deepsleep regulator mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " LPRUN ,Voltage regulator low power run mode" "Main mode,Low power mode"
|
|
bitfld.long 0x00 13. " DS_EE_KOFF ,Deep-sleep mode with Flash memory kept off" "Disabled,Enabled"
|
|
bitfld.long 0x00 11.--12. " VOS[1:0] ,Voltage scaling range selection" ",1.8V,1.5V,1.2V"
|
|
bitfld.long 0x00 10. " FWU ,Fast wakeup" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ULP ,Ultralow power mode" "VREFINT on,VREFINT off"
|
|
bitfld.long 0x00 8. " DBP ,Backup Domain write protection" "Enabled,Disabled"
|
|
bitfld.long 0x00 5.--7. " PLS ,PVD Level Selection" "1.9 V,2.1 V,2.3 V,2.5 V,2.7 V,2.9 V,3.1 V,External"
|
|
bitfld.long 0x00 4. " PVDE ,Power Voltage Detector Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 3. " CSBF ,Clear STANDBY Flag" "No effect,Clear"
|
|
eventfld.long 0x00 2. " CWUF ,Clear Wake-up Flag" "No effect,Clear"
|
|
bitfld.long 0x00 1. " PDDS ,Power Down Deepsleep" "Stop,Standby"
|
|
bitfld.long 0x00 0. " LPSDSR ,Low-power deepsleep/sleep/low power run" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PWR_CR,Power control register"
|
|
bitfld.long 0x00 14. " LPRUN ,Voltage regulator low power run mode" "Main mode,Low power mode"
|
|
bitfld.long 0x00 13. " DS_EE_KOFF ,Deep-sleep mode with Flash memory kept off" "Disabled,Enabled"
|
|
bitfld.long 0x00 11.--12. " VOS[1:0] ,Voltage scaling range selection" ",1.8V,1.5V,1.2V"
|
|
bitfld.long 0x00 10. " FWU ,Fast wakeup" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ULP ,Ultralow power mode" "VREFINT on,VREFINT off"
|
|
bitfld.long 0x00 8. " DBP ,Backup Domain write protection" "Enabled,Disabled"
|
|
bitfld.long 0x00 5.--7. " PLS ,PVD Level Selection" "1.9 V,2.1 V,2.3 V,2.5 V,2.7 V,2.9 V,3.1 V,External"
|
|
bitfld.long 0x00 4. " PVDE ,Power Voltage Detector Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 3. " CSBF ,Clear STANDBY Flag" "No effect,Clear"
|
|
eventfld.long 0x00 2. " CWUF ,Clear Wake-up Flag" "No effect,Clear"
|
|
bitfld.long 0x00 1. " PDDS ,Power Down Deepsleep" "Stop,Standby"
|
|
bitfld.long 0x00 0. " LPSDSR ,Low-power deepsleep/sleep/low power run" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PWR_CSR,Power control/status register"
|
|
bitfld.long 0x00 10. " EWUP3 ,WKUP pin 3 purpose" "GPIO,Wake-up"
|
|
bitfld.long 0x00 9. " EWUP2 ,Enable WKUP pin 2 purpose" "GPIO,Wake-up"
|
|
bitfld.long 0x00 8. " EWUP1 ,Enable WKUP pin 1 purpose" "GPIO,Wake-up"
|
|
rbitfld.long 0x00 5. " REGLPF ,Regulator LP flag" "Main mode,Low-power mode"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " VOSF ,Voltage Scaling select flag" "Ready,Changing"
|
|
rbitfld.long 0x00 3. " VREFINTRDYF ,Internal voltage reference" "OFF,Ready"
|
|
rbitfld.long 0x00 2. " PVDO ,PVD Output" "VDD>PVD threshold,VDD<PVD threshold"
|
|
rbitfld.long 0x00 1. " SBF ,STANDBY Flag" "No standby,Standby"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " WUF ,Wake-Up Flag" "No wake-up,Wake-up"
|
|
width 0xB
|
|
tree.end
|
|
tree "RCC (Reset and Clock Control)"
|
|
base ad:0x40021000
|
|
width 14.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "RCC_CR,Clock control register"
|
|
rbitfld.long 0x00 25. " PLLRDY ,PLL clock ready flag" "Unlocked,Locked"
|
|
bitfld.long 0x00 24. " PLLON ,PLL enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20.--21. " RTCPRE ,RTC prescaler" "/2,/4,/8,/16"
|
|
bitfld.long 0x00 19. " CSSHSEON ,Clock security system on HSE enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " HSEBYP ,HSE clock bypass bit" "Not bypassed,Bypassed"
|
|
rbitfld.long 0x00 17. " HSERDY ,External High Speed clock ready flag" "Not ready,Ready"
|
|
bitfld.long 0x00 16. " HSEON ,HSE clock enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 9. " MSIRDY ,MSI clock ready flag" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MSION ,MSI clock enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4. " HSI16DIVF ,HSI16 divider flag" "/1,/4"
|
|
bitfld.long 0x00 3. " HSI16DIVEN ,HSI16 divider enable" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " HSI16RDYF ,Internal high-speed clock ready flag" "Not ready,Ready"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " HSI16KERON ,High-speed internal clock enable bit for some IP kernels" "Not forced,Forced"
|
|
bitfld.long 0x00 0. " HSI16ON ,16 MHz high-speed internal clock" "Disabled,Enabled"
|
|
line.long 0x04 "RCC_ICSCR,Internal clock sources calibration register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " MSITRIM ,MSI clock trimming"
|
|
hexmask.long.byte 0x04 16.--23. 1. " MSICAL ,MSI clock calibration"
|
|
bitfld.long 0x04 13.--15. " MSIRANGE ,MSI clock ranges" "65.536 kHz,131.072 kHz,262.144 kHz,524.288 kHz,1.048 MHz,2.097 MHz,4.194 MHz,"
|
|
bitfld.long 0x04 8.--12. " HSI16TRIM , High speed internal clock trimming" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " HSI16CAL ,Internal high speed clock calibration"
|
|
sif !cpuis("STM32L0?1*")
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "RCC_CRRCR,Clock recovery RC register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " HSI48CAL ,48 MHz HSI clock calibration"
|
|
bitfld.long 0x00 2. " HSI48DIV6EN ,48 MHz HSI clock divided by 6 output enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 1. " HSI48RDY ,48MHz HSI clock ready flag" "Not ready,Ready"
|
|
bitfld.long 0x00 0. " HSI48ON ,48MHz HSI clock enable" "Disabled,Enabled"
|
|
endif
|
|
if ((((per.l((ad:0x40021000+0x00)))&0x1000000)==0x0000000))
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "RCC_CFGR,Clock configuration register"
|
|
sif !cpuis("STM32L0?1*")
|
|
bitfld.long 0x00 28.--30. " MCOPRE ,Microcontroller clock output prescaler" "/1,/2,/4,/8,/16,..."
|
|
bitfld.long 0x00 24.--27. " MCOSEL ,Microcontroller clock output selection" "Disabled,SYSCLK,HSI16,MSI,HSE,PLL,LSI,LSE,HSI48,..."
|
|
bitfld.long 0x00 22.--23. " PLLDIV ,PLL output division" "Disabled,PLLVCO/2,PLLVCO/3,PLLVCO/4"
|
|
bitfld.long 0x00 18.--21. " PLLMUL ,PLL multiplication factor" "x3,x4,x6,x8,x12,x16,x24,x32,x48,..."
|
|
else
|
|
bitfld.long 0x00 28.--30. " MCOPRE ,Microcontroller clock output prescaler" "/1,/2,/4,/8,/16,..."
|
|
bitfld.long 0x00 24.--27. " MCOSEL ,Microcontroller clock output selection" "Disabled,SYSCLK,HSI16,MSI,HSE,PLL,LSI,LSE,..."
|
|
bitfld.long 0x00 22.--23. " PLLDIV ,PLL output division" "Disabled,PLLVCO/2,PLLVCO/3,PLLVCO/4"
|
|
bitfld.long 0x00 18.--21. " PLLMUL ,PLL multiplication factor" "x3,x4,x6,x8,x12,x16,x24,x32,x48,..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 16. " PLLSRC ,PLL entry clock source" "HSI16,HSE"
|
|
bitfld.long 0x00 15. " STOPWUCK ,Wake-up from stop clock selection" "MSI,HSI16 or HSI16/4"
|
|
bitfld.long 0x00 11.--13. " PPRE2 ,APB high-speed prescaler" "HCLK,HCLK,HCLK,HCLK,HCLK/2,HCLK/4,HCLK/8,HCLK/16"
|
|
bitfld.long 0x00 8.--10. " PPRE1 ,APB Low speed prescaler" "HCLK,HCLK,HCLK,HCLK,HCLK/2,HCLK/4,HCLK/8,HCLK/16"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " HPRE ,AHB prescaler" "SYSCLK,SYSCLK,SYSCLK,SYSCLK,SYSCLK,SYSCLK,SYSCLK,SYSCLK,SYSCLK/2,SYSCLK/4,SYSCLK/8,SYSCLK/16,SYSCLK/64,SYSCLK/128,SYSCLK/256,SYSCLK/512"
|
|
rbitfld.long 0x00 2.--3. " SWS ,System Clock Switch Status" "MSI,HSI16,HSE,PLL"
|
|
bitfld.long 0x0 0.--1. " SW ,System clock Switch" "MSI,HSI16,HSE,PLL"
|
|
elif ((((per.l((ad:0x40021000+0x00)))&0x1000000)==0x1000000))
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "RCC_CFGR,Clock configuration register"
|
|
sif !cpuis("STM32L0?1*")
|
|
bitfld.long 0x00 28.--30. " MCOPRE ,Microcontroller clock output prescaler" "/1,/2,/4,/8,/16,..."
|
|
bitfld.long 0x00 24.--27. " MCOSEL ,Microcontroller clock output selection" "Disabled,SYSCLK,HSI16,MSI,HSE,PLL,LSI,LSE,HSI48,..."
|
|
rbitfld.long 0x00 22.--23. " PLLDIV ,PLL output division" "Disabled,PLLVCO/2,PLLVCO/3,PLLVCO/4"
|
|
rbitfld.long 0x00 18.--21. " PLLMUL ,PLL multiplication factor" "x3,x4,x6,x8,x12,x16,x24,x32,x48,..."
|
|
else
|
|
bitfld.long 0x00 28.--30. " MCOPRE ,Microcontroller clock output prescaler" "/1,/2,/4,/8,/16,..."
|
|
bitfld.long 0x00 24.--27. " MCOSEL ,Microcontroller clock output selection" "Disabled,SYSCLK,HSI16,MSI,HSE,PLL,LSI,LSE,..."
|
|
rbitfld.long 0x00 22.--23. " PLLDIV ,PLL output division" "Disabled,PLLVCO/2,PLLVCO/3,PLLVCO/4"
|
|
rbitfld.long 0x00 18.--21. " PLLMUL ,PLL multiplication factor" "x3,x4,x6,x8,x12,x16,x24,x32,x48,..."
|
|
endif
|
|
textline " "
|
|
rbitfld.long 0x00 16. " PLLSRC ,PLL entry clock source" "HSI16,HSE"
|
|
bitfld.long 0x00 15. " STOPWUCK ,Wake-up from stop clock selection" "MSI,HSI16 or HSI16/4"
|
|
bitfld.long 0x00 11.--13. " PPRE2 ,APB high-speed prescaler" "HCLK,HCLK,HCLK,HCLK,HCLK/2,HCLK/4,HCLK/8,HCLK/16"
|
|
bitfld.long 0x00 8.--10. " PPRE1 ,APB Low speed prescaler" "HCLK,HCLK,HCLK,HCLK,HCLK/2,HCLK/4,HCLK/8,HCLK/16"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " HPRE ,AHB prescaler" "SYSCLK,SYSCLK,SYSCLK,SYSCLK,SYSCLK,SYSCLK,SYSCLK,SYSCLK,SYSCLK/2,SYSCLK/4,SYSCLK/8,SYSCLK/16,SYSCLK/64,SYSCLK/128,SYSCLK/256,SYSCLK/512"
|
|
rbitfld.long 0x00 2.--3. " SWS ,System Clock Switch Status" "MSI,HSI16,HSE,PLL"
|
|
bitfld.long 0x0 0.--1. " SW ,System clock Switch" "MSI,HSI16,HSE,PLL"
|
|
endif
|
|
rgroup.long 0x10++0x0B
|
|
line.long 0x00 "RCC_CIER,Clock interrupt register"
|
|
bitfld.long 0x00 7. " CSSLSE ,LSE CSS interrupt flag" "Disabled,Enabled"
|
|
textline " "
|
|
sif !cpuis("STM32L0?1*")
|
|
bitfld.long 0x00 6. " HSI48RDYIE ,HSI48 ready interrupt flag" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " MSIRDYIE ,MSI ready interrupt flag" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 5. " MSIRDYIE ,MSI ready interrupt flag" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 4. " PLLRDYIE ,PLL ready interrupt flag" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " HSERDYIE ,HSE ready interrupt flag" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HSI16RDYIE ,HSI16 ready interrupt flag" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " LSERDYIE ,LSE ready interrupt flag" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LSIRDYIE ,LSI ready interrupt flag" "Disabled,Enabled"
|
|
line.long 0x04 "RCC_CIFR,Clock interrupt flag register"
|
|
bitfld.long 0x04 8. " CSSHSEF ,Clock Security System Interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 7. " CSSLSEF ,LSE Clock Security System Interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
sif !cpuis("STM32L0?1*")
|
|
bitfld.long 0x04 6. " HSI48RDYF ,HSI48 ready interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " MSIRDYF ,MSI ready interrupt flag" "No interrupt,Interrupt"
|
|
else
|
|
bitfld.long 0x04 5. " MSIRDYF ,MSI ready interrupt flag" "No interrupt,Interrupt"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x04 4. " PLLRDYF ,PLL ready interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 3. " HSERDYF ,HSE ready interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " HSI16RDYF ,HSI16 ready interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 1. " LSERDYF ,LSE ready interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 0. " LSIRDYF ,LSI ready interrupt flag" "No interrupt,Interrupt"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "RCC_CICR,Clock interrupt clear register"
|
|
bitfld.long 0x00 8. " CSSHSEC ,Clock Security System Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 7. " CSSLSEC ,LSE Clock Security System Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
sif !cpuis("STM32L0?1*")
|
|
bitfld.long 0x00 6. " HSI48RDYC ,HSI48 ready Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " MSIRDYC ,MSI ready interrupt clear" "No effect,Clear"
|
|
else
|
|
bitfld.long 0x00 5. " MSIRDYC ,MSI ready interrupt clear" "No effect,Clear"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 4. " PLLRDYC ,PLL ready interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 3. " HSERDYC ,HSE ready interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " HSI16RDYC ,HSI16 ready interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 1. " LSERDYIC ,LSE ready interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LSIRDYC ,LSI ready interrupt clear" "No effect,Clear"
|
|
group.long 0x1C++0x37
|
|
line.long 0x00 "RCC_IOPRSTR,GPIO reset register"
|
|
bitfld.long 0x00 7. " IOPHRST ,I/O port H reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " IOPERST ,I/O port E reset" "No effect,Reset"
|
|
bitfld.long 0x00 3. " IOPDRST ,I/O port D reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " IOPCRST ,I/O port C reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IOPBRST ,I/O port B reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " IOPARST ,I/O port A reset" "No effect,Reset"
|
|
sif cpuis("STM32L0?2*")
|
|
line.long 0x04 "RCC_AHBRSTR,GPIO reset register"
|
|
bitfld.long 0x04 24. " CRYPTRST ,Crypto module reset" "No effect,Reset"
|
|
bitfld.long 0x04 20. " RNGRST ,Random Number Generator module reset" "No effect,Reset"
|
|
bitfld.long 0x04 12. " CRCRST ,Test integration module reset" "No effect,Reset"
|
|
bitfld.long 0x04 8. " MIFRST ,Memory interface reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x04 0. " DMARST ,DMA reset" "No effect,Reset"
|
|
elif cpuis("STM32L0?3*")
|
|
line.long 0x04 "RCC_AHBRSTR,GPIO reset register"
|
|
bitfld.long 0x04 24. " CRYPTRST ,Crypto module reset" "No effect,Reset"
|
|
bitfld.long 0x04 20. " RNGRST ,Random Number Generator module reset" "No effect,Reset"
|
|
bitfld.long 0x04 16. " TSCRST ,Touch Sensing reset" "No effect,Reset"
|
|
bitfld.long 0x04 12. " CRCRST ,Test integration module reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x04 8. " MIFRST ,Memory interface reset" "No effect,Reset"
|
|
bitfld.long 0x04 0. " DMARST ,DMA reset" "No effect,Reset"
|
|
else
|
|
line.long 0x04 "RCC_AHBRSTR,GPIO reset register"
|
|
bitfld.long 0x04 24. " CRYPTRST ,Crypto module reset" "No effect,Reset"
|
|
bitfld.long 0x04 12. " CRCRST ,Test integration module reset" "No effect,Reset"
|
|
bitfld.long 0x04 8. " MIFRST ,Memory interface reset" "No effect,Reset"
|
|
bitfld.long 0x04 0. " DMARST ,DMA reset" "No effect,Reset"
|
|
endif
|
|
line.long 0x08 "RCC_APB2RSTR,APB2 peripheral reset register"
|
|
bitfld.long 0x08 22. " DBGRST ,DBG reset" "No effect,Reset"
|
|
textline " "
|
|
sif ((!cpuis("STM32L011*"))&&(!cpuis("STM32L021*"))&&(!cpuis("STM32L031*"))&&(!cpuis("STM32L041*")))
|
|
bitfld.long 0x08 14. " USART1RST ,USART1 reset" "No effect,Reset"
|
|
textline " "
|
|
endif
|
|
sif (!cpuis("STM32L051K*"))&&(!cpuis("STM32L052T*"))&&(!cpuis("STM32L052R6"))
|
|
bitfld.long 0x08 12. " SPI1RST ,SPI 1 reset" "No effect,Reset"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 9. " ADCRST ,ADC interface reset" "No effect,Reset"
|
|
textline " "
|
|
sif ((cpu()!="STM32L011D3")&&(cpu()!="STM32L011D4")&&(cpu()!="STM32L011E3")&&(cpu()!="STM32L011E4")&&(cpu()!="STM32L011F3")&&(cpu()!="STM32L011F4")&&(cpu()!="STM32L011G3")&&(cpu()!="STM32L011G4")&&(cpu()!="STM32L011K3")&&(cpu()!="STM32L011K4")&&(cpu()!="STM32L021D4")&&(cpu()!="STM32L021F4")&&(cpu()!="STM32L021G4")&&(cpu()!="STM32L021K4"))
|
|
bitfld.long 0x08 5. " TIM22RST ,TIM22 timer reset" "No effect,Reset"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 2. " TIM21RST ,TIM21 timer reset" "No effect,Reset"
|
|
bitfld.long 0x08 0. " SYSCFGRST ,System configuration controller reset" "No effect,Reset"
|
|
line.long 0x0C "RCC_APB1RSTR,APB1 peripheral reset register"
|
|
bitfld.long 0x0C 31. " LPTIM1RST ,Low power timer reset" "No effect,Reset"
|
|
textline " "
|
|
sif ((!cpuis("STM32L051K*"))&&(!cpuis("STM32L052K*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L021*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L031*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L041*"))&&(!cpuis("STM32L07?K*"))&&(!cpuis("STM32L08?K*")))
|
|
bitfld.long 0x0C 30. " I2C3RST ,I2C3 reset" "No effect,Reset"
|
|
textline " "
|
|
endif
|
|
sif (!cpuis("STM32L0?1*"))
|
|
bitfld.long 0x0C 29. " DACRST , DAC interface reset" "No effect,Reset"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x0C 28. " PWRRST ,Power interface reset" "No effect,Reset"
|
|
textline " "
|
|
sif (!cpuis("STM32L0?1*"))
|
|
bitfld.long 0x0C 27. " CRSRST , Clock recovery system reset" "No effect,Reset"
|
|
textline " "
|
|
endif
|
|
sif (cpuis("STM32L052*"))||(cpuis("STM32L053*"))||(cpuis("STM32L062*"))||(cpuis("STM32L063*"))||(cpuis("STM32L072*"))||(cpuis("STM32L073*"))||(cpuis("STM32L082*"))||(cpuis("STM32L083*"))
|
|
bitfld.long 0x0C 23. " USBRST , USB reset" "No effect,Reset"
|
|
textline " "
|
|
endif
|
|
sif ((!cpuis("STM32L051K*"))&&(!cpuis("STM32L052K*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L021*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L031*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L041*")))
|
|
bitfld.long 0x0C 22. " I2C2RST ,I2C2 reset" "No effect,Reset"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x0C 21. " I2C1RST ,I2C1 reset" "No effect,Reset"
|
|
textline " "
|
|
sif ((cpuis("STM32L07*"))||(cpuis("STM32L08*")))
|
|
sif ((!cpuis("STM32L071K*"))&&(!cpuis("STM32L072K*"))&&(!cpuis("STM32L081K*"))&&(!cpuis("STM32L082K*")))
|
|
bitfld.long 0x0C 20. " USART5RST ,USART5 reset" "No effect,Reset"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x0C 19. " USART4RST ,USART4 reset" "No effect,Reset"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x0C 18. " LPUART1RST ,LPUART1 reset" "No effect,Reset"
|
|
bitfld.long 0x0C 17. " USART2RST ,USART2 reset" "No effect,Reset"
|
|
textline " "
|
|
sif ((!cpuis("STM32L011*"))&&(!cpuis("STM32L021*"))&&(!cpuis("STM32L031*"))&&(!cpuis("STM32L041*"))&&(!cpuis("STM32L071K*"))&&(!cpuis("STM32L072K*"))&&(!cpuis("STM32L081K*"))&&(!cpuis("STM32L082K*")))
|
|
bitfld.long 0x0C 14. " SPI2RST ,SPI2 reset" "No effect,Reset"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x0C 11. " WWDGRST ,Window watchdog reset" "No effect,Reset"
|
|
textline " "
|
|
sif (cpuis("STM32L0?3*"))
|
|
bitfld.long 0x0C 9. " LCDRST ,LCD reset" "No effect,Reset"
|
|
textline " "
|
|
endif
|
|
sif ((cpu()=="STM32L071C8")||(cpu()=="STM32L071CB")||(cpu()=="STM32L071CZ")||(cpu()=="STM32L071K8")||(cpu()=="STM32L071KB")||(cpu()=="STM32L071KZ")||(cpu()=="STM32L071RB")||(cpu()=="STM32L071RZ")||(cpu()=="STM32L071V8")||(cpu()=="STM32L071VB")||(cpu()=="STM32L071VZ")||(cpu()=="STM32L072CB")||(cpu()=="STM32L072KB")||(cpu()=="STM32L072KZ")||(cpu()=="STM32L072RB")||(cpu()=="STM32L072RZ")||(cpu()=="STM32L072V8")||(cpu()=="STM32L072VB")||(cpu()=="STM32L072VZ")||(cpu()=="STM32L073CB")||(cpu()=="STM32L073CZ")||(cpu()=="STM32L073RB")||(cpu()=="STM32L073RZ")||(cpu()=="STM32L073V8")||(cpu()=="STM32L073VB")||(cpu()=="STM32L073VZ")||(cpu()=="STM32L081CZ")||(cpu()=="STM32L081KZ")||(cpu()=="STM32L082KB")||(cpu()=="STM32L082KZ")||(cpu()=="STM32L083CB")||(cpu()=="STM32L083CZ")||(cpu()=="STM32L083RB")||(cpu()=="STM32L083RZ"))
|
|
bitfld.long 0x0C 5. " TIM7RST ,Timer 7 reset" "No effect,Reset"
|
|
textline " "
|
|
endif
|
|
sif ((cpu()!="STM32L011D3")&&(cpu()!="STM32L011D4")&&(cpu()!="STM32L011E3")&&(cpu()!="STM32L011E4")&&(cpu()!="STM32L011F3")&&(cpu()!="STM32L011F4")&&(cpu()!="STM32L011G3")&&(cpu()!="STM32L011G4")&&(cpu()!="STM32L011K3")&&(cpu()!="STM32L011K4")&&(cpu()!="STM32L021D4")&&(cpu()!="STM32L021F4")&&(cpu()!="STM32L021G4")&&(cpu()!="STM32L021K4")&&(cpu()!="STM32L031C4")&&(cpu()!="STM32L031C6")&&(cpu()!="STM32L031E4")&&(cpu()!="STM32L031E6")&&(cpu()!="STM32L031F4")&&(cpu()!="STM32L031F6")&&(cpu()!="STM32L031G4")&&(cpu()!="STM32L031G6")&&(cpu()!="STM32L031K4")&&(cpu()!="STM32L031K6")&&(cpu()!="STM32L041C6")&&(cpu()!="STM32L041F6")&&(cpu()!="STM32L041G6")&&(cpu()!="STM32L041K6"))
|
|
bitfld.long 0x0C 4. " TIM6RST ,Timer 6 reset" "No effect,Reset"
|
|
textline " "
|
|
endif
|
|
sif ((cpu()=="STM32L071C8")||(cpu()=="STM32L071CB")||(cpu()=="STM32L071CZ")||(cpu()=="STM32L071K8")||(cpu()=="STM32L071KB")||(cpu()=="STM32L071KZ")||(cpu()=="STM32L071RB")||(cpu()=="STM32L071RZ")||(cpu()=="STM32L071V8")||(cpu()=="STM32L071VB")||(cpu()=="STM32L071VZ")||(cpu()=="STM32L072CB")||(cpu()=="STM32L072KB")||(cpu()=="STM32L072KZ")||(cpu()=="STM32L072RB")||(cpu()=="STM32L072RZ")||(cpu()=="STM32L072V8")||(cpu()=="STM32L072VB")||(cpu()=="STM32L072VZ")||(cpu()=="STM32L073CB")||(cpu()=="STM32L073CZ")||(cpu()=="STM32L073RB")||(cpu()=="STM32L073RZ")||(cpu()=="STM32L073V8")||(cpu()=="STM32L073VB")||(cpu()=="STM32L073VZ")||(cpu()=="STM32L081CZ")||(cpu()=="STM32L081KZ")||(cpu()=="STM32L082KB")||(cpu()=="STM32L082KZ")||(cpu()=="STM32L083CB")||(cpu()=="STM32L083CZ")||(cpu()=="STM32L083RB")||(cpu()=="STM32L083RZ"))
|
|
bitfld.long 0x0C 1. " TIM3RST ,Timer 3 reset" "No effect,Reset"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x0C 0. " TIM2RST ,Timer 2 reset" "No effect,Reset"
|
|
line.long 0x10 "RCC_IOPENR,GPIO clock enable register"
|
|
bitfld.long 0x10 7. " IOPHEN ,I/O port H clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 3. " IOPDEN ,I/O port D clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " IOPCEN ,I/O port C clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " IOPBEN ,I/O port B clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 0. " IOPAEN ,I/O port A clock enable" "Disabled,Enabled"
|
|
line.long 0x14 "RCC_AHBENR,AHB peripheral clock enable register"
|
|
bitfld.long 0x14 24. " CRYPEN ,Crypto clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif !cpuis("STM32L0?1*")
|
|
bitfld.long 0x14 20. " RNGEN ,Random Number Generator clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 16. " TSCEN ,Touch Sensing clock enable" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x14 12. " CRCEN ,CRC clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 8. " MIFEN ,NVM interface clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 0. " DMAEN ,DMA clock enable" "Disabled,Enabled"
|
|
line.long 0x18 "RCC_APB2ENR,APB2 peripheral clock enable register"
|
|
bitfld.long 0x18 22. " DBGEN ,DBG clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif ((!cpuis("STM32L011*"))&&(!cpuis("STM32L021*"))&&(!cpuis("STM32L031*"))&&(!cpuis("STM32L041*")))
|
|
bitfld.long 0x18 14. " USART1EN ,USART1 clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (!cpuis("STM32L051K*"))&&(!cpuis("STM32L052T*"))&&(!cpuis("STM32L052R6"))
|
|
bitfld.long 0x18 12. " SPI1EN ,SPI1 clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x18 9. " ADCEN ,ADC clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif ((cpuis("STM32L051*"))||(cpuis("STM32L052*"))||(cpuis("STM32L053*"))||(cpuis("STM32L062*"))||(cpuis("STM32L063*"))||(cpuis("STM32L07*"))||(cpuis("STM32L08*")))
|
|
bitfld.long 0x18 7. " FWEN ,Firewall clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif ((cpu()!="STM32L011D3")&&(cpu()!="STM32L011D4")&&(cpu()!="STM32L011E3")&&(cpu()!="STM32L011E4")&&(cpu()!="STM32L011F3")&&(cpu()!="STM32L011F4")&&(cpu()!="STM32L011G3")&&(cpu()!="STM32L011G4")&&(cpu()!="STM32L011K3")&&(cpu()!="STM32L011K4")&&(cpu()!="STM32L021D4")&&(cpu()!="STM32L021F4")&&(cpu()!="STM32L021G4")&&(cpu()!="STM32L021K4"))
|
|
bitfld.long 0x18 5. " TIM22EN ,TIM22 timer clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x18 2. " TIM21EN ,TIM21 timer clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 0. " SYSCFGEN ,System configuration controller clock enable" "Disabled,Enabled"
|
|
line.long 0x1C "RCC_APB1ENR,APB1 peripheral clock enable register"
|
|
bitfld.long 0x1C 31. " LPTIM1EN ,Low power timer clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif ((!cpuis("STM32L051K*"))&&(!cpuis("STM32L052K*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L021*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L031*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L041*"))&&(!cpuis("STM32L07?K*"))&&(!cpuis("STM32L08?K*")))
|
|
bitfld.long 0x1C 30. " I2C3EN ,I2C3 clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (!cpuis("STM32L0?1*"))
|
|
bitfld.long 0x1C 29. " DACEN , DAC interface clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x1C 28. " PWREN ,Power interface clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (!cpuis("STM32L0?1*"))
|
|
bitfld.long 0x1C 27. " CRSEN , Clock recovery system clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (cpuis("STM32L052*"))||(cpuis("STM32L053*"))||(cpuis("STM32L062*"))||(cpuis("STM32L063*"))||(cpuis("STM32L072*"))||(cpuis("STM32L073*"))||(cpuis("STM32L082*"))||(cpuis("STM32L083*"))
|
|
bitfld.long 0x1C 23. " USBEN , USB clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif ((!cpuis("STM32L051K*"))&&(!cpuis("STM32L052K*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L021*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L031*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L041*")))
|
|
bitfld.long 0x1C 22. " I2C2EN ,I2C2 clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x1C 21. " I2C1EN ,I2C1 clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif ((cpuis("STM32L07*"))||(cpuis("STM32L08*")))
|
|
sif ((!cpuis("STM32L071K*"))&&(!cpuis("STM32L072K*"))&&(!cpuis("STM32L081K*"))&&(!cpuis("STM32L082K*")))
|
|
bitfld.long 0x1C 20. " USART5EN ,USART5 clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x1C 19. " USART4EN ,USART4 clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x1C 18. " LPUART1EN ,LPUART1 clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 17. " USART2EN ,USART2 clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif ((!cpuis("STM32L011*"))&&(!cpuis("STM32L021*"))&&(!cpuis("STM32L031*"))&&(!cpuis("STM32L041*"))&&(!cpuis("STM32L071K*"))&&(!cpuis("STM32L072K*"))&&(!cpuis("STM32L081K*"))&&(!cpuis("STM32L082K*")))
|
|
bitfld.long 0x1C 14. " SPI2EN ,SPI2 clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x1C 11. " WWDGEN ,Window watchdog clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpuis("STM32L0?3*"))
|
|
bitfld.long 0x1C 9. " LCDEN ,LCD clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif ((cpu()=="STM32L071C8")||(cpu()=="STM32L071CB")||(cpu()=="STM32L071CZ")||(cpu()=="STM32L071K8")||(cpu()=="STM32L071KB")||(cpu()=="STM32L071KZ")||(cpu()=="STM32L071RB")||(cpu()=="STM32L071RZ")||(cpu()=="STM32L071V8")||(cpu()=="STM32L071VB")||(cpu()=="STM32L071VZ")||(cpu()=="STM32L072CB")||(cpu()=="STM32L072KB")||(cpu()=="STM32L072KZ")||(cpu()=="STM32L072RB")||(cpu()=="STM32L072RZ")||(cpu()=="STM32L072V8")||(cpu()=="STM32L072VB")||(cpu()=="STM32L072VZ")||(cpu()=="STM32L073CB")||(cpu()=="STM32L073CZ")||(cpu()=="STM32L073RB")||(cpu()=="STM32L073RZ")||(cpu()=="STM32L073V8")||(cpu()=="STM32L073VB")||(cpu()=="STM32L073VZ")||(cpu()=="STM32L081CZ")||(cpu()=="STM32L081KZ")||(cpu()=="STM32L082KB")||(cpu()=="STM32L082KZ")||(cpu()=="STM32L083CB")||(cpu()=="STM32L083CZ")||(cpu()=="STM32L083RB")||(cpu()=="STM32L083RZ"))
|
|
bitfld.long 0x1C 5. " TIM7EN ,Timer 7 clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif ((cpu()!="STM32L011D3")&&(cpu()!="STM32L011D4")&&(cpu()!="STM32L011E3")&&(cpu()!="STM32L011E4")&&(cpu()!="STM32L011F3")&&(cpu()!="STM32L011F4")&&(cpu()!="STM32L011G3")&&(cpu()!="STM32L011G4")&&(cpu()!="STM32L011K3")&&(cpu()!="STM32L011K4")&&(cpu()!="STM32L021D4")&&(cpu()!="STM32L021F4")&&(cpu()!="STM32L021G4")&&(cpu()!="STM32L021K4")&&(cpu()!="STM32L031C4")&&(cpu()!="STM32L031C6")&&(cpu()!="STM32L031E4")&&(cpu()!="STM32L031E6")&&(cpu()!="STM32L031F4")&&(cpu()!="STM32L031F6")&&(cpu()!="STM32L031G4")&&(cpu()!="STM32L031G6")&&(cpu()!="STM32L031K4")&&(cpu()!="STM32L031K6")&&(cpu()!="STM32L041C6")&&(cpu()!="STM32L041F6")&&(cpu()!="STM32L041G6")&&(cpu()!="STM32L041K6"))
|
|
bitfld.long 0x1C 4. " TIM6EN ,Timer 6 clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif ((cpu()=="STM32L071C8")||(cpu()=="STM32L071CB")||(cpu()=="STM32L071CZ")||(cpu()=="STM32L071K8")||(cpu()=="STM32L071KB")||(cpu()=="STM32L071KZ")||(cpu()=="STM32L071RB")||(cpu()=="STM32L071RZ")||(cpu()=="STM32L071V8")||(cpu()=="STM32L071VB")||(cpu()=="STM32L071VZ")||(cpu()=="STM32L072CB")||(cpu()=="STM32L072KB")||(cpu()=="STM32L072KZ")||(cpu()=="STM32L072RB")||(cpu()=="STM32L072RZ")||(cpu()=="STM32L072V8")||(cpu()=="STM32L072VB")||(cpu()=="STM32L072VZ")||(cpu()=="STM32L073CB")||(cpu()=="STM32L073CZ")||(cpu()=="STM32L073RB")||(cpu()=="STM32L073RZ")||(cpu()=="STM32L073V8")||(cpu()=="STM32L073VB")||(cpu()=="STM32L073VZ")||(cpu()=="STM32L081CZ")||(cpu()=="STM32L081KZ")||(cpu()=="STM32L082KB")||(cpu()=="STM32L082KZ")||(cpu()=="STM32L083CB")||(cpu()=="STM32L083CZ")||(cpu()=="STM32L083RB")||(cpu()=="STM32L083RZ"))
|
|
bitfld.long 0x1C 1. " TIM3EN ,Timer 3 clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x1C 0. " TIM2EN ,Timer 2 clock enable" "Disabled,Enabled"
|
|
line.long 0x20 "RCC_IOPSMENR,GPIO clock enable in sleep mode register"
|
|
bitfld.long 0x20 7. " IOPHSMEN ,Port H clock during sleep mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 4. " IOPESMEN ,Port E clock during sleep mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 3. " IOPDSMEN ,Port D clock during sleep mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 2. " IOPCSMEN ,Port C clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 1. " IOPBSMEN ,Port B clock during sleep mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 0. " IOPASMEN ,Port A clock during sleep mode enable" "Disabled,Enabled"
|
|
line.long 0x24 "RCC_AHBSMENR,AHB peripheral clock enable in sleep mode register"
|
|
bitfld.long 0x24 24. " CRYPSMEN ,Crypto clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif !cpuis("STM32L0?2*")
|
|
bitfld.long 0x24 20. " RNGSMEN ,Random Number Generator clock during sleep mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 16. " TSCSMEN ,Touch Sensing clock during sleep mode enable" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x24 12. " CRCSMEN ,CRC clock during sleep mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 9. " SRAMSMEN ,SRAM interface clock during sleep mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 8. " MIFSMEN ,NVM interface clock during sleep mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 0. " DMASMEN ,DMA clock during sleep mode enable" "Disabled,Enabled"
|
|
line.long 0x28 "RCC_APB2SMENR,APB2 peripheral clock enable in sleep mode register"
|
|
bitfld.long 0x28 22. " DBGSMEN ,DBG clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif ((!cpuis("STM32L011*"))&&(!cpuis("STM32L021*"))&&(!cpuis("STM32L031*"))&&(!cpuis("STM32L041*")))
|
|
bitfld.long 0x28 14. " USART1SMEN ,USART1 clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (!cpuis("STM32L051K*"))&&(!cpuis("STM32L052T*"))&&(!cpuis("STM32L052R6"))
|
|
bitfld.long 0x28 12. " SPI1SMEN ,SPI1 clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x28 9. " ADCSMEN ,ADC clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif ((cpu()!="STM32L011D3")&&(cpu()!="STM32L011D4")&&(cpu()!="STM32L011E3")&&(cpu()!="STM32L011E4")&&(cpu()!="STM32L011F3")&&(cpu()!="STM32L011F4")&&(cpu()!="STM32L011G3")&&(cpu()!="STM32L011G4")&&(cpu()!="STM32L011K3")&&(cpu()!="STM32L011K4")&&(cpu()!="STM32L021D4")&&(cpu()!="STM32L021F4")&&(cpu()!="STM32L021G4")&&(cpu()!="STM32L021K4"))
|
|
bitfld.long 0x28 5. " TIM22SMEN ,TIM22 timer clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x28 2. " TIM21SMEN ,TIM21 timer clock during sleep mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 0. " SYSCFGSMEN ,System configuration controller clock during sleep mode enable" "Disabled,Enabled"
|
|
line.long 0x2C "RCC_APB1SMENR,APB1 peripheral clock enable in sleep mode register"
|
|
bitfld.long 0x2C 31. " LPTIM1SMEN ,Low power timer clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif ((!cpuis("STM32L051K*"))&&(!cpuis("STM32L052K*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L021*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L031*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L041*"))&&(!cpuis("STM32L07?K*"))&&(!cpuis("STM32L08?K*")))
|
|
bitfld.long 0x2C 30. " I2C3SMEN ,I2C3 clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (!cpuis("STM32L0?1*"))
|
|
bitfld.long 0x2C 29. " DACSMEN , DAC interface clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x2C 28. " PWRSMEN ,Power interface clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (!cpuis("STM32L0?1*"))
|
|
bitfld.long 0x2C 27. " CRSSMEN , Clock recovery system clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (cpuis("STM32L052*"))||(cpuis("STM32L053*"))||(cpuis("STM32L062*"))||(cpuis("STM32L063*"))||(cpuis("STM32L072*"))||(cpuis("STM32L073*"))||(cpuis("STM32L082*"))||(cpuis("STM32L083*"))
|
|
bitfld.long 0x2C 23. " USBSMEN , USB clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif ((!cpuis("STM32L051K*"))&&(!cpuis("STM32L052K*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L021*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L031*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L041*")))
|
|
bitfld.long 0x2C 22. " I2C2SMEN ,I2C2 clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x2C 21. " I2C1SMEN ,I2C1 clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif ((cpuis("STM32L07*"))||(cpuis("STM32L08*")))
|
|
sif ((!cpuis("STM32L071K*"))&&(!cpuis("STM32L072K*"))&&(!cpuis("STM32L081K*"))&&(!cpuis("STM32L082K*")))
|
|
bitfld.long 0x2C 20. " USART5SMEN ,USART5 clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x2C 19. " USART4SMEN ,USART4 clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x2C 18. " LPUART1SMEN ,LPUART1 clock during sleep mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 17. " USART2SMEN ,USART2 clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif ((!cpuis("STM32L011*"))&&(!cpuis("STM32L021*"))&&(!cpuis("STM32L031*"))&&(!cpuis("STM32L041*"))&&(!cpuis("STM32L071K*"))&&(!cpuis("STM32L072K*"))&&(!cpuis("STM32L081K*"))&&(!cpuis("STM32L082K*")))
|
|
bitfld.long 0x2C 14. " SPI2SMEN ,SPI2 clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x2C 11. " WWDGSMEN ,Window watchdog clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpuis("STM32L0?3*"))
|
|
bitfld.long 0x2C 9. " LCDSMEN ,LCD clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif ((cpu()=="STM32L071C8")||(cpu()=="STM32L071CB")||(cpu()=="STM32L071CZ")||(cpu()=="STM32L071K8")||(cpu()=="STM32L071KB")||(cpu()=="STM32L071KZ")||(cpu()=="STM32L071RB")||(cpu()=="STM32L071RZ")||(cpu()=="STM32L071V8")||(cpu()=="STM32L071VB")||(cpu()=="STM32L071VZ")||(cpu()=="STM32L072CB")||(cpu()=="STM32L072KB")||(cpu()=="STM32L072KZ")||(cpu()=="STM32L072RB")||(cpu()=="STM32L072RZ")||(cpu()=="STM32L072V8")||(cpu()=="STM32L072VB")||(cpu()=="STM32L072VZ")||(cpu()=="STM32L073CB")||(cpu()=="STM32L073CZ")||(cpu()=="STM32L073RB")||(cpu()=="STM32L073RZ")||(cpu()=="STM32L073V8")||(cpu()=="STM32L073VB")||(cpu()=="STM32L073VZ")||(cpu()=="STM32L081CZ")||(cpu()=="STM32L081KZ")||(cpu()=="STM32L082KB")||(cpu()=="STM32L082KZ")||(cpu()=="STM32L083CB")||(cpu()=="STM32L083CZ")||(cpu()=="STM32L083RB")||(cpu()=="STM32L083RZ"))
|
|
bitfld.long 0x2C 5. " TIM7SMEN ,Timer 7 clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif ((cpu()!="STM32L011D3")&&(cpu()!="STM32L011D4")&&(cpu()!="STM32L011E3")&&(cpu()!="STM32L011E4")&&(cpu()!="STM32L011F3")&&(cpu()!="STM32L011F4")&&(cpu()!="STM32L011G3")&&(cpu()!="STM32L011G4")&&(cpu()!="STM32L011K3")&&(cpu()!="STM32L011K4")&&(cpu()!="STM32L021D4")&&(cpu()!="STM32L021F4")&&(cpu()!="STM32L021G4")&&(cpu()!="STM32L021K4")&&(cpu()!="STM32L031C4")&&(cpu()!="STM32L031C6")&&(cpu()!="STM32L031E4")&&(cpu()!="STM32L031E6")&&(cpu()!="STM32L031F4")&&(cpu()!="STM32L031F6")&&(cpu()!="STM32L031G4")&&(cpu()!="STM32L031G6")&&(cpu()!="STM32L031K4")&&(cpu()!="STM32L031K6")&&(cpu()!="STM32L041C6")&&(cpu()!="STM32L041F6")&&(cpu()!="STM32L041G6")&&(cpu()!="STM32L041K6"))
|
|
bitfld.long 0x2C 4. " TIM6SMEN ,Timer 6 clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif ((cpu()=="STM32L071C8")||(cpu()=="STM32L071CB")||(cpu()=="STM32L071CZ")||(cpu()=="STM32L071K8")||(cpu()=="STM32L071KB")||(cpu()=="STM32L071KZ")||(cpu()=="STM32L071RB")||(cpu()=="STM32L071RZ")||(cpu()=="STM32L071V8")||(cpu()=="STM32L071VB")||(cpu()=="STM32L071VZ")||(cpu()=="STM32L072CB")||(cpu()=="STM32L072KB")||(cpu()=="STM32L072KZ")||(cpu()=="STM32L072RB")||(cpu()=="STM32L072RZ")||(cpu()=="STM32L072V8")||(cpu()=="STM32L072VB")||(cpu()=="STM32L072VZ")||(cpu()=="STM32L073CB")||(cpu()=="STM32L073CZ")||(cpu()=="STM32L073RB")||(cpu()=="STM32L073RZ")||(cpu()=="STM32L073V8")||(cpu()=="STM32L073VB")||(cpu()=="STM32L073VZ")||(cpu()=="STM32L081CZ")||(cpu()=="STM32L081KZ")||(cpu()=="STM32L082KB")||(cpu()=="STM32L082KZ")||(cpu()=="STM32L083CB")||(cpu()=="STM32L083CZ")||(cpu()=="STM32L083RB")||(cpu()=="STM32L083RZ"))
|
|
bitfld.long 0x2C 1. " TIM3SMEN ,Timer 3 clock during sleep mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x2C 0. " TIM2SMEN ,Timer 2 clock during sleep mode enable" "Disabled,Enabled"
|
|
line.long 0x30 "RCC_CCIPR,Clock configuration register"
|
|
sif !cpuis("STM32L0?1*")
|
|
bitfld.long 0x30 26. " HSI48SEL ,48 MHz HSI48 clock source selection" "PLL USB,RC48"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x30 18.--19. " LPTIM1SEL ,Low Power Timer clock source selection" "APB,LSI,HSI16,LSE"
|
|
sif ((!cpuis("STM32L051K*"))&&(!cpuis("STM32L052K*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L021*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L031*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L041*"))&&(!cpuis("STM32L07?K*"))&&(!cpuis("STM32L08?K*")))
|
|
bitfld.long 0x30 16.--17. " I2C3SEL ,I2C3 clock source selection" "APB,System,HSI16,"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x30 12.--13. " I2C1SEL ,I2C1 clock source selection" "APB,System,HSI16,"
|
|
bitfld.long 0x30 10.--11. " LPUART1SEL ,LPUART1 clock source selection" "APB,System,HSI16,LSE"
|
|
textline " "
|
|
bitfld.long 0x30 2.--3. " USART2SEL ,USART2 clock source selection" "APB,System,HSI16,LSE"
|
|
sif ((!cpuis("STM32L011*"))&&(!cpuis("STM32L021*"))&&(!cpuis("STM32L031*"))&&(!cpuis("STM32L041*")))
|
|
textline " "
|
|
bitfld.long 0x30 0.--1. " USART1SEL ,USART1 clock source selection" "APB,System,HSI16,LSE"
|
|
endif
|
|
line.long 0x34 "RCC_CSR,Control/status register"
|
|
bitfld.long 0x34 31. " LPWRRSTF ,Low-power reset flag" "No reset,Reset"
|
|
bitfld.long 0x34 30. " WWDGRSTF ,Window watchdog reset flag" "No reset,Reset"
|
|
bitfld.long 0x34 29. " IWDGRSTF ,Independent watchdog reset flag" "No reset,Reset"
|
|
bitfld.long 0x34 28. " SFTRSTF ,Software reset flag" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x34 27. " PORRSTF ,POR/PDR reset flag" "No reset,Reset"
|
|
bitfld.long 0x34 26. " PINRSTF ,PIN reset flag" "No reset,Reset"
|
|
bitfld.long 0x34 25. " OBLRSTF ,Options bytes loading reset flag" "No reset,Reset"
|
|
sif (cpuis("STM32L051*"))||(cpuis("STM32L052*"))||(cpuis("STM32L053*"))||(cpuis("STM32L062*"))||(cpuis("STM32L063*"))||(cpuis("STM32L07*"))||(cpuis("STM32L08*"))
|
|
textline " "
|
|
bitfld.long 0x34 24. " FWRSTF ,Firewall reset flag" "No reset,Reset"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x34 23. " RMVF ,Remove reset flag" "No reset,Reset"
|
|
bitfld.long 0x34 19. " RTCRST ,RTC software reset" "No reset,Reset"
|
|
bitfld.long 0x34 18. " RTCEN ,RTC clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 16.--17. " RTCSEL[1:0] ,RTC clock source selection" "No clock,LSE,LSI,HSE"
|
|
textline " "
|
|
bitfld.long 0x34 14. " CSSLSED ,CSS on LSE failure detection flag" "Not detected,Detected"
|
|
bitfld.long 0x34 13. " CSSLSEON ,CSS on LSE enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 11.--12. " LSEDRV ,LSE oscillator Driving capability" "Lowest,Medium low,Medium high,Highest"
|
|
bitfld.long 0x34 10. " LSEBYP ,External low-speed oscillator bypass" "Not bypassed,Bypassed"
|
|
textline " "
|
|
rbitfld.long 0x34 9. " LSERDY ,External low-speed oscillator ready" "Not ready,Ready"
|
|
bitfld.long 0x34 8. " LSEON ,External low-speed oscillator enable" "Disabled,Enabled"
|
|
rbitfld.long 0x34 1. " LSIRDY ,Internal low-speed oscillator ready" "Not ready,Ready"
|
|
bitfld.long 0x34 0. " LSION ,Internal low-speed oscillator enable" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
sif !CPUIS("STM32L0?1*")
|
|
tree "CRS (Clock recovery system)"
|
|
base ad:0x40006C00
|
|
width 14.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CRS_CR,CRS Control Register"
|
|
sif (!CPUIS("STM32F038*")&&!CPUIS("STM32F058*"))
|
|
hexmask.long.byte 0x00 8.--13. 0x01 " TRIM[5:0] ,HSI48 oscillator smooth trimming"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 7. " SWSYNC ,Generate software SYNC event" "Not occurred,Occurred"
|
|
textline " "
|
|
sif (!CPUIS("STM32F038*")&&!CPUIS("STM32F058*"))
|
|
bitfld.long 0x00 6. " AUTOTRIMEN ,Automatic trimming enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 5. " CEN ,Frequency error counter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ESYNCIE ,Expected SYNC interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ERRIE ,Synchronization or trimming error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SYNCWARNIE ,SYNC warning interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SYNCOKIE ,SYNC event OK interrupt enable" "Disabled,Enabled"
|
|
sif (CPUIS("STM32F048?6"))||(CPUIS("STM32F078?B"))||(CPUIS("STM32F091?B"))||(CPUIS("STM32F091?C"))||(CPUIS("STM32F098?C"))||(CPUIS("STM32L0?2*"))||(CPUIS("STM32L0?3*"))||(cpuis("STM32H743*")||cpuis("STM32H753*"))
|
|
if (((per.l(ad:0x40006C00))&0x20)==0x20)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CRS_CFGR,CRS Configuration Register"
|
|
bitfld.long 0x00 31. " SYNCPOL ,SYNC polarity selection" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 28.--29. " SYNCSRC ,SYNC signal source selection" "GPIO,LSE,USB SOF,?..."
|
|
bitfld.long 0x00 24.--26. " SYNCDIV ,SYNC divider" "Not divided,/2,/4,/8,/16,/32,/64,/128"
|
|
hexmask.long.byte 0x00 16.--23. 0x01 " FELIM[7:0] ,Frequency error limit"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 0x01 " RELOAD[15:0] ,Counter reload value"
|
|
else
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "CRS_CFGR,CRS Configuration Register"
|
|
bitfld.long 0x00 31. " SYNCPOL ,SYNC polarity selection" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 28.--29. " SYNCSRC ,SYNC signal source selection" "GPIO,LSE,USB SOF,?..."
|
|
bitfld.long 0x00 24.--26. " SYNCDIV ,SYNC divider" "Not divided,/2,/4,/8,/16,/32,/64,/128"
|
|
hexmask.long.byte 0x00 16.--23. 0x01 " FELIM[7:0] ,Frequency error limit"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 0x01 " RELOAD[15:0] ,Counter reload value"
|
|
endif
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CRS_CFGR,CRS Configuration Register"
|
|
bitfld.long 0x00 31. " SYNCPOL ,SYNC polarity selection" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 28.--29. " SYNCSRC ,SYNC signal source selection" "GPIO,LSE,USB SOF,?..."
|
|
bitfld.long 0x00 24.--26. " SYNCDIV ,SYNC divider" "Not divided,/2,/4,/8,/16,/32,/64,/128"
|
|
hexmask.long.byte 0x00 16.--23. 0x01 " FELIM[7:0] ,Frequency error limit"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 0x01 " RELOAD[15:0] ,Counter reload value"
|
|
endif
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "CRS_ISR,CRS Interrupt And Status Register"
|
|
hexmask.long.word 0x00 16.--31. 0x01 " FECAP[15:0] ,Frequency error capture"
|
|
bitfld.long 0x00 15. " FEDIR ,Frequency error direction" "Upcounting,Downcounting"
|
|
bitfld.long 0x00 10. " TRIMOVF ,Trimming overflow or underflow" "Not detected,Detected"
|
|
bitfld.long 0x00 9. " SYNCMISS ,SYNC missed" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SYNCERR ,SYNC error" "Not detected,Detected"
|
|
bitfld.long 0x00 3. " ESYNCF ,Expected SYNC flag" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " ERRF ,Error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 1. " SYNCWARNF ,SYNC warning flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SYNCOKF ,SYNC event OK flag" "Not detected,Detected"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CRS_ICR,CRS Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 3. " ESYNCC ,Expected SYNC clear flag" "Not affected,Cleared"
|
|
bitfld.long 0x00 2. " ERRC ,Error clear flag" "Not affected,Cleared"
|
|
bitfld.long 0x00 1. " SYNCWARNC ,SYNC warning clear flag" "Not affected,Cleared"
|
|
bitfld.long 0x00 0. " SYNCOKC ,SYNC event OK clear flag" "Not affected,Cleared"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree.open "GPIO (General Port Inputs and Outputs)"
|
|
tree "GPIO A"
|
|
base ad:0x50000000
|
|
sif CPUIS("STM32L0?2*")
|
|
width 15.
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "GPIOA_MODER,GPIO_A port mode register"
|
|
bitfld.long 0x00 30.--31. " MODE15 ,Port A Pin 15 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port A Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port A Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 24.--25. " MODE12 ,Port A Pin 12 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " MODE11 ,Port A Pin 11 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 20.--21. " MODE10 ,Port A Pin 10 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port A Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 16.--17. " MODE8 ,Port A Pin 8 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port A Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port A Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port A Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port A Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port A Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port A Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port A Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port A Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
line.long 0x04 "GPIOA_OTYPER,GPIO_A port output type register"
|
|
bitfld.long 0x04 15. " OT15 ,Port A Pin 15 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 14. " OT14 ,Port A Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port A Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 12. " OT12 ,Port A Pin 12 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 11. " OT11 ,Port A Pin 11 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 10. " OT10 ,Port A Pin 10 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 9. " OT9 ,Port A Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 8. " OT8 ,Port A Pin 8 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 7. " OT7 ,Port A Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port A Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port A Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port A Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 3. " OT3 ,Port A Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 2. " OT2 ,Port A Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port A Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port A Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
line.long 0x08 "GPIOA_OSPEEDR,GPIO_A port output speed register"
|
|
bitfld.long 0x08 30.--31. " OSPEED15 ,Port A Pin 15 I/O output speed configuration" "Very low,Low,Medium,High"
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port A Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port A Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 24.--25. " OSPEED12 ,Port A Pin 12 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " OSPEED11 ,Port A Pin 11 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 20.--21. " OSPEED10 ,Port A Pin 10 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port A Pin 9 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 16.--17. " OSPEED8 ,Port A Pin 8 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port A Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port A Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port A Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port A Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port A Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port A Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port A Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port A Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
line.long 0x0C "GPIOA_PUPDR,GPIO_A port pull-up/pull-down register"
|
|
bitfld.long 0x0C 30.--31. " PUPD15 ,Port A Pin 15 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port A Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port A Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 24.--25. " PUPD12 ,Port A Pin 12 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 22.--23. " PUPD11 ,Port A Pin 11 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 20.--21. " PUPD10 ,Port A Pin 10 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port A Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 16.--17. " PUPD8 ,Port A Pin 8 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port A Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port A Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port A Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port A Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port A Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port A Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port A Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port A Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOA_IDR,GPIO_A port input data register"
|
|
bitfld.long 0x00 15. " ID15 ,Port A Pin 15 input data" "0,1"
|
|
bitfld.long 0x00 14. " ID14 ,Port A Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port A Pin 13 input data" "0,1"
|
|
bitfld.long 0x00 12. " ID12 ,Port A Pin 12 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ID11 ,Port A Pin 11 input data" "0,1"
|
|
bitfld.long 0x00 10. " ID10 ,Port A Pin 10 input data" "0,1"
|
|
bitfld.long 0x00 9. " ID9 ,Port A Pin 9 input data" "0,1"
|
|
bitfld.long 0x00 8. " ID8 ,Port A Pin 8 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ID7 ,Port A Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port A Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port A Pin 5 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port A Pin 4 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ID3 ,Port A Pin 3 input data" "0,1"
|
|
bitfld.long 0x00 2. " ID2 ,Port A Pin 2 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port A Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port A Pin 0 input data" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOA_ODR,GPIO_A port output bit set/reset register"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x04 31. " ODR15_set/clr , Port A pin 15 output data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr , Port A pin 14 output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr , Port A pin 13 output data" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x04 28. " ODR12_set/clr , Port A pin 12 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x04 27. " ODR11_set/clr , Port A pin 11 output data" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x04 26. " ODR10_set/clr , Port A pin 10 output data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr , Port A pin 9 output data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x04 24. " ODR8_set/clr , Port A Pin 8 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port A pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port A pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr , Port A pin 5 output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr , Port A pin 4 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port A pin 3 output data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr , Port A pin 2 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port A pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port A pin 0 output data" "Low,High"
|
|
if ((per.l(ad:0x50000000+0x1C))&0x10000)==0x00
|
|
// GPIOA_LCKR.LCKK = 0 [Not active]
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOA_LCKR,GPIO_A port configuration lock register"
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LCK15 ,Port A Pin 15 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 14. " LCK14 ,Port A Pin 14 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port A Pin 13 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 12. " LCK12 ,Port A Pin 12 lock bit" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LCK11 ,Port A Pin 11 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 10. " LCK10 ,Port A Pin 10 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 9. " LCK9 ,Port A Pin 9 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 8. " LCK8 ,Port A Pin 8 lock bit" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LCK7 ,Port A Pin 7 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port A Pin 6 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port A Pin 5 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port A Pin 4 lock bit" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LCK3 ,Port A Pin 3 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 2. " LCK2 ,Port A Pin 2 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port A Pin 1 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port A Pin 0 lock bit" "Not locked,Locked"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOA_LCKR,GPIO_A port configuration lock register"
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " LCK15 ,Port A Pin 15 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 14. " LCK14 ,Port A Pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port A Pin 13 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 12. " LCK12 ,Port A Pin 12 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " LCK11 ,Port A Pin 11 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 10. " LCK10 ,Port A Pin 10 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 9. " LCK9 ,Port A Pin 9 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 8. " LCK8 ,Port A Pin 8 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " LCK7 ,Port A Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port A Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port A Pin 5 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port A Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 3. " LCK3 ,Port A Pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 2. " LCK2 ,Port A Pin 2 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port A Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port A Pin 0 lock" "Not locked,Locked"
|
|
endif
|
|
textline " "
|
|
group.long 0x20++0x07
|
|
sif CPUIS("STM32L05*")||CPUIS("STM32L06*")
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A Pin 7 alternate function configuration" "SPI1_MOSI,,,TSC_G2_IO4,,TIM22_CH2,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A Pin 6 alternate function configuration" "SPI1_MISO,,,TSC_G2_IO3,LPUART_CTS,TIM22_CH1,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A Pin 5 alternate function configuration" "SPI1_SCK,,TIM2_ETR,TSC_G2_IO2,,TIM2_CH1,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A Pin 4 alternate function configuration" "SPI1_NSS,,,TSC_G2_IO1,USART2_CK,TIM22_ETR,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A Pin 3 alternate function configuration" "TIM21_CH2,,TIM2_CH4,TSC_G1_IO4,USART2_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A Pin 2 alternate function configuration" "TIM21_CH1,,TIM2_CH3,TSC_G1_IO3,USART2_TX,,,COMP2_OUT,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A Pin 1 alternate function configuration" "EVENTOUT,,TIM2_CH2,TSC_G1_IO2,USART2_RTS_DE,TIM21_ETR,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A Pin 0 alternate function configuration" ",,TIM2_CH1,TSC_G1_IO1,USART2_CTS,TIM2_ETR,,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port A Pin 15 alternate function configuration" "SPI1_NSS,,TIM2_ETR,EVENTOUT,USART2_RX,TIM2_CH1,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A Pin 14 alternate function configuration" "SWCLK,,,,USART2_TX,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A Pin 13 alternate function configuration" "SWDIO,,USB_OE,?..."
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port A Pin 12 alternate function configuration" "SPI1_MOSI,,EVENTOUT,TSC_G4_IO4,USART1_RTS_DE,,,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port A Pin 11 alternate function configuration" "SPI1_MISO,,EVENTOUT,TSC_G4_IO3,USART1_CTS,,,COMP1_OUT,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A Pin 10 alternate function configuration" ",,,TSC_G4_IO2,USART1_RX,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A Pin 9 alternate function configuration" "MCO,,,TSC_G4_IO1,USART1_TX,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port A Pin 8 alternate function configuration" "MCO,,USB_CRS_SYNC,EVENTOUT,USART1_CK,?..."
|
|
else
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A Pin 7 alternate function configuration" "SPI1_MOSI,,TIM3_CH2,TSC_G2_IO4,,TIM22_CH2,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A Pin 6 alternate function configuration" "SPI1_MISO,,TIM3_CH1,TSC_G2_IO3,LPUART1_CTS,TIM22_CH1,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A Pin 5 alternate function configuration" "SPI1_SCK,,TIM2_ETR,TSC_G2_IO2,TIM2_CH1,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A Pin 4 alternate function configuration" "SPI1_NSS,,,TSC_G2_IO1,USART2_CK,TIM22_ETR,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A Pin 3 alternate function configuration" "TIM21_CH2,,TIM2_CH4,TSC_G1_IO4,USART2_RX,,LPUART1_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A Pin 2 alternate function configuration" "TIM21_CH1,,TIM2_CH3,TSC_G1_IO3,USART2_TX,,LPUART1_TX,COMP2_OUT,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A Pin 1 alternate function configuration" "EVENTOUT,,TIM2_CH2,TSC_G1_IO2,USART2_RTS_DE,TIM21_ETR,USART4_RX,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A Pin 0 alternate function configuration" ",,TIM2_CH1,TSC_G1_IO1,USART2_CTS,TIM2_ETR,USART4_TX,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port A Pin 15 alternate function configuration" "SPI1_NSS,,TIM2_ETR,EVENTOUT,USART2_RX,TIM2_CH1,USART4_RTS_DE,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A Pin 14 alternate function configuration" "SWCLK,,,,USART2_TX,,LPUART1_TX,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A Pin 13 alternate function configuration" "SWDIO,,USB_OE,,,,LPUART1_RX,?..."
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port A Pin 12 alternate function configuration" "SPI1_MOSI,,EVENTOUT,TSC_G4_IO4,USART1_RTS_DE,,,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port A Pin 11 alternate function configuration" "SPI1_MISO,,EVENTOUT,TSC_G4_IO3,USART1_CTS,,,COMP1_OUT,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A Pin 10 alternate function configuration" ",,,TSC_G4_IO2,USART1_RX,,I2C1_SDA,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A Pin 9 alternate function configuration" "MCO,,,TSC_G4_IO1,USART1_TX,,I2C1_SCL,I2C3_SMBA,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port A Pin 8 alternate function configuration" "MCO,,USB_CRS_SYNC,EVENTOUT,USART1_CK,,,I2C3_SCL,?..."
|
|
endif
|
|
textline " "
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "GPIOA_BRR,GPIO_A port bit reset register"
|
|
bitfld.long 0x00 15. " BRR15 ,Port A pin 15 reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " BRR14 ,Port A pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port A pin 13 reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " BRR12 ,Port A pin 12 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BRR11 ,Port A pin 11 reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " BRR10 ,Port A pin 10 reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " BRR9 ,Port A pin 9 reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " BRR8 ,Port A Pin 8 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BRR7 ,Port A pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port A pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port A pin 5 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port A pin 4 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BRR3 ,Port A pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " BRR2 ,Port A pin 2 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port A pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port A pin 0 reset" "No effect,Reset"
|
|
width 0x0B
|
|
elif CPUIS("STM32L0?1*")
|
|
width 15.
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "GPIOA_MODER,GPIO_A port mode register"
|
|
sif CPUIS("STM32L0??D*")
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port A Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port A Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 20.--21. " MODE10 ,Port A Pin 10 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port A Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port A Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port A Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port A Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port A Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L0??F*")
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port A Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port A Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 20.--21. " MODE10 ,Port A Pin 10 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port A Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port A Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port A Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port A Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port A Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port A Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port A Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port A Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port A Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L0??E*")
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port A Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port A Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 20.--21. " MODE10 ,Port A Pin 10 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port A Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " MODE8 ,Port A Pin 8 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port A Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port A Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port A Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port A Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port A Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port A Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port A Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port A Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L0??G*")
|
|
bitfld.long 0x00 30.--31. " MODE15 ,Port A Pin 15 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port A Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port A Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 20.--21. " MODE10 ,Port A Pin 10 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port A Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 16.--17. " MODE8 ,Port A Pin 8 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port A Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port A Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port A Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port A Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port A Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port A Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port A Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port A Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L0??K8")
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port A Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port A Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 24.--25. " MODE12 ,Port A Pin 12 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 22.--23. " MODE11 ,Port A Pin 11 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " MODE10 ,Port A Pin 10 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port A Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 16.--17. " MODE8 ,Port A Pin 8 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port A Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port A Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port A Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port A Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port A Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port A Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port A Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port A Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
else
|
|
bitfld.long 0x00 30.--31. " MODE15 ,Port A Pin 15 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port A Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port A Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 24.--25. " MODE12 ,Port A Pin 12 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " MODE11 ,Port A Pin 11 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 20.--21. " MODE10 ,Port A Pin 10 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port A Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 16.--17. " MODE8 ,Port A Pin 8 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port A Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port A Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port A Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port A Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port A Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port A Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port A Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port A Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
endif
|
|
line.long 0x04 "GPIOA_OTYPER,GPIO_A port output type register"
|
|
sif CPUIS("STM32L0??D*")
|
|
bitfld.long 0x04 14. " OT14 ,Port A Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port A Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 10. " OT10 ,Port A Pin 10 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 9. " OT9 ,Port A Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 7. " OT7 ,Port A Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port A Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port A Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port A Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L0??F*")
|
|
bitfld.long 0x04 14. " OT14 ,Port A Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port A Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 10. " OT10 ,Port A Pin 10 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 9. " OT9 ,Port A Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 7. " OT7 ,Port A Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port A Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port A Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port A Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 3. " OT3 ,Port A Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 2. " OT2 ,Port A Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port A Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port A Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L0??E*")
|
|
bitfld.long 0x04 14. " OT14 ,Port A Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port A Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 10. " OT10 ,Port A Pin 10 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 9. " OT9 ,Port A Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 8. " OT8 ,Port A Pin 8 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 7. " OT7 ,Port A Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port A Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port A Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 4. " OT4 ,Port A Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 3. " OT3 ,Port A Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 2. " OT2 ,Port A Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port A Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 0. " OT0 ,Port A Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L0??G*")
|
|
bitfld.long 0x04 15. " OT15 ,Port A Pin 15 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 14. " OT14 ,Port A Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port A Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 10. " OT10 ,Port A Pin 10 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 9. " OT9 ,Port A Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 8. " OT8 ,Port A Pin 8 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 7. " OT7 ,Port A Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port A Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 5. " OT5 ,Port A Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port A Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 3. " OT3 ,Port A Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 2. " OT2 ,Port A Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 1. " OT1 ,Port A Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port A Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L0??K8")
|
|
bitfld.long 0x04 14. " OT14 ,Port A Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port A Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 12. " OT12 ,Port A Pin 12 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 11. " OT11 ,Port A Pin 11 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 10. " OT10 ,Port A Pin 10 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 9. " OT9 ,Port A Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 8. " OT8 ,Port A Pin 8 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 7. " OT7 ,Port A Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 6. " OT6 ,Port A Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port A Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port A Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 3. " OT3 ,Port A Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 2. " OT2 ,Port A Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port A Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port A Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
else
|
|
bitfld.long 0x04 15. " OT15 ,Port A Pin 15 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 14. " OT14 ,Port A Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port A Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 12. " OT12 ,Port A Pin 12 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 11. " OT11 ,Port A Pin 11 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 10. " OT10 ,Port A Pin 10 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 9. " OT9 ,Port A Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 8. " OT8 ,Port A Pin 8 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 7. " OT7 ,Port A Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port A Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port A Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port A Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 3. " OT3 ,Port A Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 2. " OT2 ,Port A Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port A Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port A Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
endif
|
|
line.long 0x08 "GPIOA_OSPEEDR,GPIO_A port output speed register"
|
|
sif CPUIS("STM32L0??D*")
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port A Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port A Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 20.--21. " OSPEED10 ,Port A Pin 10 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port A Pin 9 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port A Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port A Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port A Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port A Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L0??F*")
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port A Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port A Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 20.--21. " OSPEED10 ,Port A Pin 10 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port A Pin 9 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port A Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port A Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port A Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port A Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port A Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port A Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port A Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port A Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L0??E*")
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port A Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port A Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 20.--21. " OSPEED10 ,Port A Pin 10 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port A Pin 9 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 16.--17. " OSPEED8 ,Port A Pin 8 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port A Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port A Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port A Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port A Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port A Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port A Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port A Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port A Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L0??G*")
|
|
bitfld.long 0x08 30.--31. " OSPEED15 ,Port A Pin 15 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port A Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port A Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 20.--21. " OSPEED10 ,Port A Pin 10 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port A Pin 9 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 16.--17. " OSPEED8 ,Port A Pin 8 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port A Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port A Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port A Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port A Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port A Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port A Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port A Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port A Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L0??K8")
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port A Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port A Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 24.--25. " OSPEED12 ,Port A Pin 12 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 22.--23. " OSPEED11 ,Port A Pin 11 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 20.--21. " OSPEED10 ,Port A Pin 10 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port A Pin 9 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 16.--17. " OSPEED8 ,Port A Pin 8 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port A Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port A Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port A Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port A Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port A Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port A Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port A Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port A Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
else
|
|
bitfld.long 0x08 30.--31. " OSPEED15 ,Port A Pin 15 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port A Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port A Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 24.--25. " OSPEED12 ,Port A Pin 12 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " OSPEED11 ,Port A Pin 11 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 20.--21. " OSPEED10 ,Port A Pin 10 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port A Pin 9 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 16.--17. " OSPEED8 ,Port A Pin 8 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port A Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port A Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port A Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port A Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port A Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port A Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port A Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port A Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
endif
|
|
line.long 0x0C "GPIOA_PUPDR,GPIO_A port pull-up/pull-down register"
|
|
sif CPUIS("STM32L0??D*")
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port A Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port A Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 20.--21. " PUPD10 ,Port A Pin 10 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port A Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port A Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port A Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port A Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port A Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L0??F*")
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port A Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port A Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 20.--21. " PUPD10 ,Port A Pin 10 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port A Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port A Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port A Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port A Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port A Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port A Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port A Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port A Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port A Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L0??E*")
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port A Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port A Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 20.--21. " PUPD10 ,Port A Pin 10 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port A Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 16.--17. " PUPD8 ,Port A Pin 8 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port A Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port A Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port A Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port A Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port A Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port A Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port A Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port A Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L0??G*")
|
|
bitfld.long 0x0C 30.--31. " PUPD15 ,Port A Pin 15 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port A Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port A Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 20.--21. " PUPD10 ,Port A Pin 10 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port A Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 16.--17. " PUPD8 ,Port A Pin 8 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port A Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port A Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port A Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port A Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port A Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port A Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port A Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port A Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L0??K8")
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port A Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port A Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 24.--25. " PUPD12 ,Port A Pin 12 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 22.--23. " PUPD11 ,Port A Pin 11 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 20.--21. " PUPD10 ,Port A Pin 10 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port A Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 16.--17. " PUPD8 ,Port A Pin 8 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port A Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port A Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port A Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port A Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port A Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port A Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port A Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port A Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
else
|
|
bitfld.long 0x0C 30.--31. " PUPD15 ,Port A Pin 15 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port A Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port A Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 24.--25. " PUPD12 ,Port A Pin 12 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 22.--23. " PUPD11 ,Port A Pin 11 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 20.--21. " PUPD10 ,Port A Pin 10 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port A Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 16.--17. " PUPD8 ,Port A Pin 8 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port A Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port A Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port A Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port A Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port A Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port A Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port A Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port A Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOA_IDR,GPIO_A port input data register"
|
|
sif CPUIS("STM32L0??D*")
|
|
bitfld.long 0x00 14. " ID14 ,Port A Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port A Pin 13 input data" "0,1"
|
|
bitfld.long 0x00 10. " ID10 ,Port A Pin 10 input data" "0,1"
|
|
bitfld.long 0x00 9. " ID9 ,Port A Pin 9 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ID7 ,Port A Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port A Pin 4 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port A Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port A Pin 0 input data" "0,1"
|
|
elif CPUIS("STM32L0??F*")
|
|
bitfld.long 0x00 14. " ID14 ,Port A Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port A Pin 13 input data" "0,1"
|
|
bitfld.long 0x00 10. " ID10 ,Port A Pin 10 input data" "0,1"
|
|
bitfld.long 0x00 9. " ID9 ,Port A Pin 9 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ID7 ,Port A Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port A Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port A Pin 5 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port A Pin 4 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ID3 ,Port A Pin 3 input data" "0,1"
|
|
bitfld.long 0x00 2. " ID2 ,Port A Pin 2 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port A Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port A Pin 0 input data" "0,1"
|
|
elif CPUIS("STM32L0??E*")
|
|
bitfld.long 0x00 14. " ID14 ,Port A Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port A Pin 13 input data" "0,1"
|
|
bitfld.long 0x00 10. " ID10 ,Port A Pin 10 input data" "0,1"
|
|
bitfld.long 0x00 9. " ID9 ,Port A Pin 9 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ID8 ,Port A Pin 8 input data" "0,1"
|
|
bitfld.long 0x00 7. " ID7 ,Port A Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port A Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port A Pin 5 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ID4 ,Port A Pin 4 input data" "0,1"
|
|
bitfld.long 0x00 3. " ID3 ,Port A Pin 3 input data" "0,1"
|
|
bitfld.long 0x00 2. " ID2 ,Port A Pin 2 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port A Pin 1 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ID0 ,Port A Pin 0 input data" "0,1"
|
|
elif CPUIS("STM32L0??G*")
|
|
bitfld.long 0x00 15. " ID15 ,Port A Pin 15 input data" "0,1"
|
|
bitfld.long 0x00 14. " ID14 ,Port A Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port A Pin 13 input data" "0,1"
|
|
bitfld.long 0x00 10. " ID10 ,Port A Pin 10 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ID9 ,Port A Pin 9 input data" "0,1"
|
|
bitfld.long 0x00 8. " ID8 ,Port A Pin 8 input data" "0,1"
|
|
bitfld.long 0x00 7. " ID7 ,Port A Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port A Pin 6 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " ID5 ,Port A Pin 5 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port A Pin 4 input data" "0,1"
|
|
bitfld.long 0x00 3. " ID3 ,Port A Pin 3 input data" "0,1"
|
|
bitfld.long 0x00 2. " ID2 ,Port A Pin 2 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ID1 ,Port A Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port A Pin 0 input data" "0,1"
|
|
elif CPUIS("STM32L0??K8")
|
|
bitfld.long 0x00 14. " ID14 ,Port A Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port A Pin 13 input data" "0,1"
|
|
bitfld.long 0x00 12. " ID12 ,Port A Pin 12 input data" "0,1"
|
|
bitfld.long 0x00 11. " ID11 ,Port A Pin 11 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ID10 ,Port A Pin 10 input data" "0,1"
|
|
bitfld.long 0x00 9. " ID9 ,Port A Pin 9 input data" "0,1"
|
|
bitfld.long 0x00 8. " ID8 ,Port A Pin 8 input data" "0,1"
|
|
bitfld.long 0x00 7. " ID7 ,Port A Pin 7 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ID6 ,Port A Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port A Pin 5 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port A Pin 4 input data" "0,1"
|
|
bitfld.long 0x00 3. " ID3 ,Port A Pin 3 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ID2 ,Port A Pin 2 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port A Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port A Pin 0 input data" "0,1"
|
|
else
|
|
bitfld.long 0x00 15. " ID15 ,Port A Pin 15 input data" "0,1"
|
|
bitfld.long 0x00 14. " ID14 ,Port A Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port A Pin 13 input data" "0,1"
|
|
bitfld.long 0x00 12. " ID12 ,Port A Pin 12 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ID11 ,Port A Pin 11 input data" "0,1"
|
|
bitfld.long 0x00 10. " ID10 ,Port A Pin 10 input data" "0,1"
|
|
bitfld.long 0x00 9. " ID9 ,Port A Pin 9 input data" "0,1"
|
|
bitfld.long 0x00 8. " ID8 ,Port A Pin 8 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ID7 ,Port A Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port A Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port A Pin 5 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port A Pin 4 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ID3 ,Port A Pin 3 input data" "0,1"
|
|
bitfld.long 0x00 2. " ID2 ,Port A Pin 2 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port A Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port A Pin 0 input data" "0,1"
|
|
endif
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOA_ODR,GPIO_A port output bit set/reset register"
|
|
sif CPUIS("STM32L0??D*")
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr ,Port A pin 14 output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr ,Port A pin 13 output data" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x04 26. " ODR10_set/clr ,Port A pin 10 output data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr ,Port A pin 9 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr ,Port A pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr ,Port A pin 4 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr ,Port A pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr ,Port A pin 0 output data" "Low,High"
|
|
elif CPUIS("STM32L0??F*")
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr ,Port A pin 14 output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr ,Port A pin 13 output data" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x04 26. " ODR10_set/clr ,Port A pin 10 output data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr ,Port A pin 9 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr ,Port A pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr ,Port A pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr ,Port A pin 5 output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr ,Port A pin 4 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr ,Port A pin 3 output data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr ,Port A pin 2 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr ,Port A pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr ,Port A pin 0 output data" "Low,High"
|
|
elif CPUIS("STM32L0??E*")
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr ,Port A pin 14 output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr ,Port A pin 13 output data" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x04 26. " ODR10_set/clr ,Port A pin 10 output data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr ,Port A 9 pin output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x04 8. 0x04 24. " ODR8_set/clr ,Port A 8 pin output data" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr ,Port A pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr ,Port A 6 pin output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr ,Port A 5 pin output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr ,Port A 4 pin output data" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr ,Port A pin 3 output data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr ,Port A pin 2 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr ,Port A pin 1 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr ,Port A pin 0 output data" "Low,High"
|
|
elif CPUIS("STM32L0??G*")
|
|
setclrfld.long 0x00 15. 0x04 15. 0x04 31. " ODR15_set/clr ,Port A pin 15 output data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr ,Port A pin 14 output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr ,Port A pin 13 output data" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x04 26. " ODR10_set/clr ,Port A pin 10 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr ,Port A pin 9 output data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x04 24. " ODR8_set/clr ,Port A pin 8 output data" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr ,Port A pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr ,Port A pin 6 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr ,Port A pin 5 output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr ,Port A pin 4 output data" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr ,Port A pin 3 output data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr ,Port A pin 2 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr ,Port A pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr ,Port A pin 0 output data" "Low,High"
|
|
elif CPUIS("STM32L0??K8")
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr ,Port A pin 14 output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr ,Port A pin 13 output data" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x04 28. " ODR12_set/clr ,Port A pin 12 output data" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x04 27. " ODR11_set/clr ,Port A pin 11 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x04 26. " ODR10_set/clr ,Port A pin 10 output data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr ,Port A pin 9 output data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x04 24. " ODR8_set/clr ,Port A pin 8 output data" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr ,Port A pin 7 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr ,Port A pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr ,Port A pin 5 output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr ,Port A pin 4 output data" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr ,Port A pin 3 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr ,Port A pin 2 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr ,Port A pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr ,Port A pin 0 output data" "Low,High"
|
|
else
|
|
setclrfld.long 0x00 15. 0x04 15. 0x04 31. " ODR15_set/clr ,Port A pin 15 output data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr ,Port A pin 14 output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr ,Port A pin 13 output data" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x04 28. " ODR12_set/clr ,Port A pin 12 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x04 27. " ODR11_set/clr ,Port A pin 11 output data" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x04 26. " ODR10_set/clr ,Port A pin 10 output data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr ,Port A pin 9 output data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x04 24. " ODR8_set/clr ,Port A pin 8 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr ,Port A pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr ,Port A pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr ,Port A pin 5 output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr ,Port A pin 4 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr ,Port A pin 3 output data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr ,Port A pin 2 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr ,Port A pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr ,Port A pin 0 output data" "Low,High"
|
|
endif
|
|
if ((per.l(ad:0x50000000+0x1C))&0x10000)==0x00
|
|
// GPIOA_LCKR.LCKK = 0 [Not active]
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOA_LCKR,GPIO_A port configuration lock register"
|
|
sif CPUIS("STM32L0??D*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 14. " LCK14 ,Port A pin 14 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port A pin 13 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 10. " LCK10 ,Port A pin 10 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 9. " LCK9 ,Port A pin 9 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LCK7 ,Port A pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port A pin 4 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port A pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port A pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??F*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 14. " LCK14 ,Port A pin 14 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port A pin 13 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 10. " LCK10 ,Port A pin 10 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 9. " LCK9 ,Port A pin 9 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LCK7 ,Port A pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port A pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port A pin 5 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port A pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LCK3 ,Port A pin 3 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 2. " LCK2 ,Port A pin 2 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port A pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port A pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??E*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 14. " LCK14 ,Port A pin 14 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port A pin 13 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 10. " LCK10 ,Port A pin 10 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 9. " LCK9 ,Port A pin 9 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " LCK8 ,Port A pin 8 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 7. " LCK7 ,Port A pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port A pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port A pin 5 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LCK4 ,Port A pin 4 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 3. " LCK3 ,Port A pin 3 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 2. " LCK2 ,Port A pin 2 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port A pin 1 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LCK0 ,Port A pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??G*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LCK15 ,Port A pin 15 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 14. " LCK14 ,Port A pin 14 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port A pin 13 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 10. " LCK10 ,Port A pin 10 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LCK9 ,Port A pin 9 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 8. " LCK8 ,Port A pin 8 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 7. " LCK7 ,Port A pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port A pin 6 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LCK5 ,Port A pin 5 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port A pin 4 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 3. " LCK3 ,Port A pin 3 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 2. " LCK2 ,Port A pin 2 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LCK1 ,Port A pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port A pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??K8")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 14. " LCK14 ,Port A pin 14 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port A pin 13 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 12. " LCK12 ,Port A pin 12 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 11. " LCK11 ,Port A pin 11 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " LCK10 ,Port A pin 10 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 9. " LCK9 ,Port A pin 9 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 8. " LCK8 ,Port A pin 8 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 7. " LCK7 ,Port A pin 7 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LCK6 ,Port A pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port A pin 5 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port A pin 4 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 3. " LCK3 ,Port A pin 3 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LCK2 ,Port A pin 2 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port A pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port A pin 0 lock" "Not locked,Locked"
|
|
else
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LCK15 ,Port A pin 15 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 14. " LCK14 ,Port A pin 14 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port A pin 13 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 12. " LCK12 ,Port A pin 12 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LCK11 ,Port A pin 11 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 10. " LCK10 ,Port A pin 10 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 9. " LCK9 ,Port A pin 9 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 8. " LCK8 ,Port A pin 8 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LCK7 ,Port A pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port A pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port A pin 5 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port A pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LCK3 ,Port A pin 3 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 2. " LCK2 ,Port A pin 2 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port A pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port A pin 0 lock" "Not locked,Locked"
|
|
endif
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOA_LCKR,GPIO_A Port A pin configuration lock register"
|
|
sif CPUIS("STM32L0??D*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " LCK14 ,Port A pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port A pin 13 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 10. " LCK10 ,Port A pin 10 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 9. " LCK9 ,Port A pin 9 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " LCK7 ,Port A pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port A pin 4 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port A pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port A pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??F*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " LCK14 ,Port A pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port A pin 13 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 10. " LCK10 ,Port A pin 10 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 9. " LCK9 ,Port A pin 9 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 8. " LCK8 ,Port A pin 8 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 7. " LCK7 ,Port A pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port A pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port A pin 5 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " LCK4 ,Port A pin 4 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 3. " LCK3 ,Port A pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 2. " LCK2 ,Port A pin 2 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port A pin 1 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " LCK0 ,Port A pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??E*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " LCK14 ,Port A pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port A pin 13 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 10. " LCK10 ,Port A pin 10 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 9. " LCK9 ,Port A pin 9 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 8. " LCK8 ,Port A pin 8 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 7. " LCK7 ,Port A pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port A pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port A pin 5 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " LCK4 ,Port A pin 4 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 3. " LCK3 ,Port A pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 2. " LCK2 ,Port A pin 2 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port A pin 1 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " LCK0 ,Port A pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??G*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " LCK15 ,Port A pin 15 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 14. " LCK14 ,Port A pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port A pin 13 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 10. " LCK10 ,Port A pin 10 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " LCK9 ,Port A pin 9 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 8. " LCK8 ,Port A pin 8 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 7. " LCK7 ,Port A pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port A pin 6 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 5. " LCK5 ,Port A pin 5 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port A pin 4 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 3. " LCK3 ,Port A pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 2. " LCK2 ,Port A pin 2 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " LCK1 ,Port A pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port A pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??K8")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " LCK14 ,Port A pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port A pin 13 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 12. " LCK12 ,Port A pin 12 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 11. " LCK11 ,Port A pin 11 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 10. " LCK10 ,Port A pin 10 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 9. " LCK9 ,Port A pin 9 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 8. " LCK8 ,Port A pin 8 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 7. " LCK7 ,Port A pin 7 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 6. " LCK6 ,Port A pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port A pin 5 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port A pin 4 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 3. " LCK3 ,Port A pin 3 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " LCK2 ,Port A pin 2 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port A pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port A pin 0 lock" "Not locked,Locked"
|
|
else
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " LCK15 ,Port A pin 15 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 14. " LCK14 ,Port A pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port A pin 13 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 12. " LCK12 ,Port A pin 12 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " LCK11 ,Port A pin 11 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 10. " LCK10 ,Port A pin 10 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 9. " LCK9 ,Port A pin 9 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 8. " LCK8 ,Port A pin 8 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " LCK7 ,Port A pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port A pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port A pin 5 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port A pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 3. " LCK3 ,Port A pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 2. " LCK2 ,Port A pin 2 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port A pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port A pin 0 lock" "Not locked,Locked"
|
|
endif
|
|
endif
|
|
textline " "
|
|
group.long 0x20++0x07
|
|
sif CPUIS("STM32L01*")||CPUIS("STM32L02*")
|
|
sif CPUIS("STM32L0??D*")
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,LPTIM1_OUT,,,USART2_CTS,TIM21_ETR,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,LPTIM1_IN1,LPTIM1_ETR,I2C1_SCL,USART2_CK,TIM2_ETR,LPUART1_TX,COMP2_OUT,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,LPTIM1_IN2,TIM2_CH2,I2C1_SMBA,USART2_RTS,TIM21_ETR,LPUART1_TX,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" "USART2_RX,LPTIM1_IN1,TIM2_CH1,,USART2_CTS,TIM2_ETR,LPUART1_RX,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,LPTIM1_OUT,,I2C1_SMBA,USART2_TX,SPI1_MISO,LPUART1_TX,COMP2_OUT,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,LPTIM1_ETR,,I2C1_SDA,,SPI1_SCK,LPUART1_RX,COMP1_OUT,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" "TIM21_CH1,I2C1_SDA,RTC_REFIN,,USART2_RX,TIM2_CH3,,COMP1_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,I2C1_SCL,LPTIM1_OUT,,USART2_TX,TIM21_CH2,,COMP1_OUT,?..."
|
|
elif CPUIS("STM32L0??F*")
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,LPTIM1_OUT,,,USART2_CTS,TIM21_ETR,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A pin 6 alternate function configuration" "SPI1_MISO,LPTIM1_ETR,,,LPUART1_CTS,,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A pin 5 alternate function configuration" "SPI1_SCK,LPTIM1_IN2,TIM2_ETR,,,TIM2_CH1,,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,LPTIM1_IN1,LPTIM1_ETR,I2C1_SCL,USART2_CK,TIM2_ETR,LPUART1_TX,COMP2_OUT,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A pin 3 alternate function configuration" "TIM21_CH2,,TIM2_CH4,,USART2_RX,,LPUART1_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A pin 2 alternate function configuration" "TIM21_CH1,,TIM2_CH3,,USART2_TX,,LPUART1_TX,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,LPTIM1_IN2,TIM2_CH2,I2C1_SMBA,USART2_RTS,TIM21_ETR,LPUART1_TX,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" "USART2_RX,LPTIM1_IN1,TIM2_CH1,,USART2_CTS,TIM2_ETR,LPUART1_RX,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,LPTIM1_OUT,,I2C1_SMBA,USART2_TX,SPI1_MISO,LPUART1_TX,COMP2_OUT,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,LPTIM1_ETR,,I2C1_SDA,,SPI1_SCK,LPUART1_RX,COMP1_OUT,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" "TIM21_CH1,I2C1_SDA,RTC_REFIN,,USART2_RX,TIM2_CH3,,COMP1_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,I2C1_SCL,LPTIM1_OUT,,USART2_TX,TIM21_CH2,,COMP1_OUT,?..."
|
|
elif CPUIS("STM32L0??E*")
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,LPTIM1_OUT,,,USART2_CTS,TIM21_ETR,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A pin 6 alternate function configuration" "SPI1_MISO,LPTIM1_ETR,,,LPUART1_CTS,,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A pin 5 alternate function configuration" "SPI1_SCK,LPTIM1_IN2,TIM2_ETR,,,TIM2_CH1,,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,LPTIM1_IN1,LPTIM1_ETR,I2C1_SCL,USART2_CK,TIM2_ETR,LPUART1_TX,COMP2_OUT,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A pin 3 alternate function configuration" "TIM21_CH2,,TIM2_CH4,,USART2_RX,,LPUART1_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A pin 2 alternate function configuration" "TIM21_CH1,,TIM2_CH3,,USART2_TX,,LPUART1_TX,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,LPTIM1_IN2,TIM2_CH2,I2C1_SMBA,USART2_RTS,TIM21_ETR,LPUART1_TX,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" "USART2_RX,LPTIM1_IN1,TIM2_CH1,,USART2_CTS,TIM2_ETR,LPUART1_RX,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,LPTIM1_OUT,,I2C1_SMBA,USART2_TX,SPI1_MISO,LPUART1_TX,COMP2_OUT,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,LPTIM1_ETR,,I2C1_SDA,,SPI1_SCK,LPUART1_RX,COMP1_OUT,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" "TIM21_CH1,I2C1_SDA,RTC_REFIN,,USART2_RX,TIM2_CH3,,COMP1_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,I2C1_SCL,LPTIM1_OUT,,USART2_TX,TIM21_CH2,,COMP1_OUT,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port A pin 8 alternate function configuration" "MCO,,LPTIM1_IN1,EVENTOUT,USART2_CK,TIM2_CH1,,?..."
|
|
elif CPUIS("STM32L0??G*")
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,LPTIM1_OUT,,,USART2_CTS,TIM21_ETR,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A pin 6 alternate function configuration" "SPI1_MISO,LPTIM1_ETR,,,LPUART1_CTS,,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A pin 5 alternate function configuration" "SPI1_SCK,LPTIM1_IN2,TIM2_ETR,,,TIM2_CH1,,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,LPTIM1_IN1,LPTIM1_ETR,I2C1_SCL,USART2_CK,TIM2_ETR,LPUART1_TX,COMP2_OUT,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A pin 3 alternate function configuration" "TIM21_CH2,,TIM2_CH4,,USART2_RX,,LPUART1_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A pin 2 alternate function configuration" "TIM21_CH1,,TIM2_CH3,,USART2_TX,,LPUART1_TX,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,LPTIM1_IN2,TIM2_CH2,I2C1_SMBA,USART2_RTS,TIM21_ETR,LPUART1_TX,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" "USART2_RX,LPTIM1_IN1,TIM2_CH1,,USART2_CTS,TIM2_ETR,LPUART1_RX,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port A pin 15 alternate function configuration" "SPI1_NSS,,TIM2_ETR,EVENTOUT,USART2_RX,TIM2_CH1,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,LPTIM1_OUT,,I2C1_SMBA,USART2_TX,SPI1_MISO,LPUART1_TX,COMP2_OUT,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,LPTIM1_ETR,,I2C1_SDA,,SPI1_SCK,LPUART1_RX,COMP1_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" "TIM21_CH1,I2C1_SDA,RTC_REFIN,,USART2_RX,TIM2_CH3,,COMP1_OUT,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,I2C1_SCL,LPTIM1_OUT,,USART2_TX,TIM21_CH2,,COMP1_OUT,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port A pin 8 alternate function configuration" "MCO,,LPTIM1_IN1,EVENTOUT,USART2_CK,TIM2_CH1,,?..."
|
|
else
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,LPTIM1_OUT,,,USART2_CTS,TIM21_ETR,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A pin 6 alternate function configuration" "SPI1_MISO,LPTIM1_ETR,,,LPUART1_CTS,,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A pin 5 alternate function configuration" "SPI1_SCK,LPTIM1_IN2,TIM2_ETR,,,TIM2_CH1,,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,LPTIM1_IN1,LPTIM1_ETR,I2C1_SCL,USART2_CK,TIM2_ETR,LPUART1_TX,COMP2_OUT,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A pin 3 alternate function configuration" "TIM21_CH2,,TIM2_CH4,,USART2_RX,,LPUART1_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A pin 2 alternate function configuration" "TIM21_CH1,,TIM2_CH3,,USART2_TX,,LPUART1_TX,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,LPTIM1_IN2,TIM2_CH2,I2C1_SMBA,USART2_RTS,TIM21_ETR,LPUART1_TX,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" "USART2_RX,LPTIM1_IN1,TIM2_CH1,,USART2_CTS,TIM2_ETR,LPUART1_RX,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port A pin 15 alternate function configuration" "SPI1_NSS,,TIM2_ETR,EVENTOUT,USART2_RX,TIM2_CH1,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,LPTIM1_OUT,,I2C1_SMBA,USART2_TX,SPI1_MISO,LPUART1_TX,COMP2_OUT,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,LPTIM1_ETR,,I2C1_SDA,,SPI1_SCK,LPUART1_RX,COMP1_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port A pin 12 alternate function configuration" "SPI1_MOSI,,EVENTOUT,,USART2_RTS,,,COMP2_OUT,?..."
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port A pin 11 alternate function configuration" "SPI1_MISO,LPTIM1_OUT,EVENTOUT,,USART2_CTS,TIM21_CH2,,COMP1_OUT,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" "TIM21_CH1,I2C1_SDA,RTC_REFIN,,USART2_RX,TIM2_CH3,,COMP1_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,I2C1_SCL,LPTIM1_OUT,,USART2_TX,TIM21_CH2,,COMP1_OUT,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port A pin 8 alternate function configuration" "MCO,,LPTIM1_IN1,EVENTOUT,USART2_CK,TIM2_CH1,,?..."
|
|
endif
|
|
elif CPUIS("STM32L03*")||CPUIS("STM32L04*")
|
|
sif CPUIS("STM32L0??F*")
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,LPTIM1_OUT,,,USART2_CTS,TIM22_CH2,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A pin 6 alternate function configuration" "SPI1_MISO,LPTIM1_ETR,,,LPUART1_CTS,TIM22_CH1,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A pin 5 alternate function configuration" "SPI1_SCK,LPTIM1_IN2,TIM2_ETR,,,TIM2_CH1,,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,LPTIM1_IN1,,,USART2_CK,TIM22_ETR,,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A pin 3 alternate function configuration" "TIM21_CH2,,TIM2_CH4,,USART2_RX,,LPUART1_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A pin 2 alternate function configuration" "TIM21_CH1,,TIM2_CH3,,USART2_TX,,LPUART1_TX,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,LPTIM1_IN2,TIM2_CH2,I2C1_SMBA,USART2_RTS,TIM21_ETR,,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" ",LPTIM1_IN1,TIM2_CH1,,USART2_CTS,TIM2_ETR,,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,LPTIM1_OUT,,I2C1_SMBA,USART2_TX,,LPUART1_TX,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,LPTIM1_ETR,,,,,LPUART1_RX,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" ",I2C1_SDA,,,USART2_RX,TIM22_CH2,,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,I2C1_SCL,,,USART2_TX,TIM22_CH1,,?..."
|
|
elif CPUIS("STM32L0??E*")
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,LPTIM1_OUT,,,USART2_CTS,TIM22_CH2,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A pin 6 alternate function configuration" "SPI1_MISO,LPTIM1_ETR,,,LPUART1_CTS,TIM22_CH1,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A pin 5 alternate function configuration" "SPI1_SCK,LPTIM1_IN2,TIM2_ETR,,,TIM2_CH1,,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,LPTIM1_IN1,,,USART2_CK,TIM22_ETR,,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A pin 3 alternate function configuration" "TIM21_CH2,,TIM2_CH4,,USART2_RX,,LPUART1_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A pin 2 alternate function configuration" "TIM21_CH1,,TIM2_CH3,,USART2_TX,,LPUART1_TX,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,LPTIM1_IN2,TIM2_CH2,I2C1_SMBA,USART2_RTS,TIM21_ETR,,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" ",LPTIM1_IN1,TIM2_CH1,,USART2_CTS,TIM2_ETR,,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,LPTIM1_OUT,,I2C1_SMBA,USART2_TX,,LPUART1_TX,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,LPTIM1_ETR,,,,,LPUART1_RX,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" ",I2C1_SDA,,,USART2_RX,TIM22_CH2,,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,I2C1_SCL,,,USART2_TX,TIM22_CH1,,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port A pin 8 alternate function configuration" "MCO,,LPTIM1_IN1,EVENTOUT,USART2_CK,TIM2_CH1,,?..."
|
|
elif CPUIS("STM32L0??G*")
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,LPTIM1_OUT,,,USART2_CTS,TIM22_CH2,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A pin 6 alternate function configuration" "SPI1_MISO,LPTIM1_ETR,,,LPUART1_CTS,TIM22_CH1,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A pin 5 alternate function configuration" "SPI1_SCK,LPTIM1_IN2,TIM2_ETR,,,TIM2_CH1,,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,LPTIM1_IN1,,,USART2_CK,TIM22_ETR,,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A pin 3 alternate function configuration" "TIM21_CH2,,TIM2_CH4,,USART2_RX,,LPUART1_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A pin 2 alternate function configuration" "TIM21_CH1,,TIM2_CH3,,USART2_TX,,LPUART1_TX,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,LPTIM1_IN2,TIM2_CH2,I2C1_SMBA,USART2_RTS,TIM21_ETR,,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" ",LPTIM1_IN1,TIM2_CH1,,USART2_CTS,TIM2_ETR,,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port A pin 15 alternate function configuration" "SPI1_NSS,,TIM2_ETR,EVENTOUT,USART2_RX,TIM2_CH1,,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,LPTIM1_OUT,,I2C1_SMBA,USART2_TX,,LPUART1_TX,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,LPTIM1_ETR,,,,,LPUART1_RX,?..."
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" ",I2C1_SDA,,,USART2_RX,TIM22_CH2,,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,I2C1_SCL,,,USART2_TX,TIM22_CH1,,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port A pin 8 alternate function configuration" "MCO,,LPTIM1_IN1,EVENTOUT,USART2_CK,TIM2_CH1,,?..."
|
|
else
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,LPTIM1_OUT,,,USART2_CTS,TIM22_CH2,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A pin 6 alternate function configuration" "SPI1_MISO,LPTIM1_ETR,,,LPUART1_CTS,TIM22_CH1,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A pin 5 alternate function configuration" "SPI1_SCK,LPTIM1_IN2,TIM2_ETR,,,TIM2_CH1,,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,LPTIM1_IN1,,,USART2_CK,TIM22_ETR,,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A pin 3 alternate function configuration" "TIM21_CH2,,TIM2_CH4,,USART2_RX,,LPUART1_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A pin 2 alternate function configuration" "TIM21_CH1,,TIM2_CH3,,USART2_TX,,LPUART1_TX,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,LPTIM1_IN2,TIM2_CH2,I2C1_SMBA,USART2_RTS,TIM21_ETR,,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" ",LPTIM1_IN1,TIM2_CH1,,USART2_CTS,TIM2_ETR,,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port A pin 15 alternate function configuration" "SPI1_NSS,,TIM2_ETR,EVENTOUT,USART2_RX,TIM2_CH1,,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,LPTIM1_OUT,,I2C1_SMBA,USART2_TX,,LPUART1_TX,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,LPTIM1_ETR,,,,,LPUART1_RX,?..."
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port A pin 12 alternate function configuration" "SPI1_MOSI,,EVENTOUT,,USART2_RTS,,,COMP2_OUT,?..."
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port A pin 11 alternate function configuration" "SPI1_MISO,,EVENTOUT,,USART2_CTS,TIM21_CH2,,COMP1_OUT,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" ",I2C1_SDA,,,USART2_RX,TIM22_CH2,,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,I2C1_SCL,,,USART2_TX,TIM22_CH1,,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port A pin 8 alternate function configuration" "MCO,,LPTIM1_IN1,EVENTOUT,USART2_CK,TIM2_CH1,,?..."
|
|
endif
|
|
elif CPUIS("STM32L05*")
|
|
sif CPUIS("STM32L0??D*")
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,,,,,TIM22_CH2,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,,,,USART2_CK,TIM22_ETR,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,,TIM2_CH2,,USART2_RTS,TIM21_ETR,,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" ",,TIM2_CH1,,USART2_CTS,TIM2_ETR,,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,,,,USART2_TX,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" ",,,,USART1_RX,,,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,,,,USART1_TX,,,?..."
|
|
elif CPUIS("STM32L0??F*")
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,,,,,TIM22_CH2,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A pin 6 alternate function configuration" "SPI1_MISO,,,,LPUART_CTS,TIM22_CH1,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A pin 5 alternate function configuration" "SPI1_SCK,,TIM2_ETR,,,TIM2_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,,,,USART2_CK,TIM22_ETR,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A pin 3 alternate function configuration" "TIM21_CH2,,TIM2_CH4,,USART2_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A pin 2 alternate function configuration" "TIM21_CH1,,TIM2_CH3,,USART2_TX,,,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,,TIM2_CH2,,USART2_RTS,TIM21_ETR,,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" ",,TIM2_CH1,,USART2_CTS,TIM2_ETR,,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,,,,USART2_TX,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" ",,,,USART1_RX,,,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,,,,USART1_TX,,,?..."
|
|
elif CPUIS("STM32L0??E*")
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,,,,,TIM22_CH2,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A pin 6 alternate function configuration" "SPI1_MISO,,,,LPUART_CTS,TIM22_CH1,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A pin 5 alternate function configuration" "SPI1_SCK,,TIM2_ETR,,,TIM2_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,,,,USART2_CK,TIM22_ETR,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A pin 3 alternate function configuration" "TIM21_CH2,,TIM2_CH4,,USART2_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A pin 2 alternate function configuration" "TIM21_CH1,,TIM2_CH3,,USART2_TX,,,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,,TIM2_CH2,,USART2_RTS,TIM21_ETR,,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" ",,TIM2_CH1,,USART2_CTS,TIM2_ETR,,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,,,,USART2_TX,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" ",,,,USART1_RX,,,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,,,,USART1_TX,,,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port A pin 8 alternate function configuration" "MCO,,,EVENTOUT,USART1_CK,,,?..."
|
|
elif CPUIS("STM32L0??G*")
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,,,,,TIM22_CH2,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A pin 6 alternate function configuration" "SPI1_MISO,,,,LPUART_CTS,TIM22_CH1,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A pin 5 alternate function configuration" "SPI1_SCK,,TIM2_ETR,,,TIM2_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,,,,USART2_CK,TIM22_ETR,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A pin 3 alternate function configuration" "TIM21_CH2,,TIM2_CH4,,USART2_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A pin 2 alternate function configuration" "TIM21_CH1,,TIM2_CH3,,USART2_TX,,,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,,TIM2_CH2,,USART2_RTS,TIM21_ETR,,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" ",,TIM2_CH1,,USART2_CTS,TIM2_ETR,,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port A pin 15 alternate function configuration" "SPI1_NSS,,TIM2_ETR,EVENTOUT,USART2_RX,TIM2_CH1,,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,,,,USART2_TX,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,?..."
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" ",,,,USART1_RX,,,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,,,,USART1_TX,,,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port A pin 8 alternate function configuration" "MCO,,,EVENTOUT,USART1_CK,,,?..."
|
|
else
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,,,,,TIM22_CH2,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A pin 6 alternate function configuration" "SPI1_MISO,,,,LPUART_CTS,TIM22_CH1,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A pin 5 alternate function configuration" "SPI1_SCK,,TIM2_ETR,,,TIM2_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,,,,USART2_CK,TIM22_ETR,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A pin 3 alternate function configuration" "TIM21_CH2,,TIM2_CH4,,USART2_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A pin 2 alternate function configuration" "TIM21_CH1,,TIM2_CH3,,USART2_TX,,,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,,TIM2_CH2,,USART2_RTS,TIM21_ETR,,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" ",,TIM2_CH1,,USART2_CTS,TIM2_ETR,,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port A pin 15 alternate function configuration" "SPI1_NSS,,TIM2_ETR,EVENTOUT,USART2_RX,TIM2_CH1,,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,,,,USART2_TX,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,?..."
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port A pin 12 alternate function configuration" "SPI1_MOSI,,EVENTOUT,,USART2_RTS,,,COMP2_OUT,?..."
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port A pin 11 alternate function configuration" "SPI1_MISO,,EVENTOUT,,USART1_CTS,,,COMP1_OUT,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" ",,,,USART1_RX,,,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,,,,USART1_TX,,,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port A pin 8 alternate function configuration" "MCO,,,EVENTOUT,USART1_CK,,,?..."
|
|
endif
|
|
elif (CPUIS("STM32L07*")||CPUIS("STM32L08*"))
|
|
sif CPUIS("STM32L07?K8*")
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,,TIM3_CH2,,,TIM22_CH2,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A pin 6 alternate function configuration" "SPI1_MISO,,TIM3_CH1,,LPUART1_CTS,TIM22_CH1,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A pin 5 alternate function configuration" "SPI1_SCK,,TIM2_ETR,,,TIM2_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,,,,USART2_CK,TIM22_ETR,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A pin 3 alternate function configuration" "TIM21_CH2,,TIM2_CH4,,USART2_RX,,LPUART1_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A pin 2 alternate function configuration" "TIM21_CH1,,TIM2_CH3,,USART2_TX,,LPUART1_TX,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,,TIM2_CH2,,USART2_RTS_DE,TIM21_ETR,USART4_RX,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" ",,TIM2_CH1,,USART2_CTS,TIM2_ETR,USART4_TX,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,,,,USART2_TX,,LPUART1_TX,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,,,,,,LPUART1_RX,?..."
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port A pin 12 alternate function configuration" "SPI1_MOSI,,EVENTOUT,,USART1_RTS_DE,,,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port A pin 11 alternate function configuration" "SPI1_MISO,,EVENTOUT,,USART1_CTS,,,COMP1_OUT,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" ",,,,USART1_RX,,I2C1_SDA,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,,,,USART1_TX,,I2C1_SCL,I2C3_SMBA,?..."
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port A pin 8 alternate function configuration" "MCO,,,EVENTOUT,USART1_CK,,,I2C3_SCL,?..."
|
|
else
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,,TIM3_CH2,,,TIM22_CH2,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A pin 6 alternate function configuration" "SPI1_MISO,,TIM3_CH1,,LPUART1_CTS,TIM22_CH1,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A pin 5 alternate function configuration" "SPI1_SCK,,TIM2_ETR,,,TIM2_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,,,,USART2_CK,TIM22_ETR,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A pin 3 alternate function configuration" "TIM21_CH2,,TIM2_CH4,,USART2_RX,,LPUART1_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A pin 2 alternate function configuration" "TIM21_CH1,,TIM2_CH3,,USART2_TX,,LPUART1_TX,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,,TIM2_CH2,,USART2_RTS_DE,TIM21_ETR,USART4_RX,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" ",,TIM2_CH1,,USART2_CTS,TIM2_ETR,USART4_TX,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port A pin 15 alternate function configuration" "SPI1_NSS,,TIM2_ETR,EVENTOUT,USART2_RX,TIM2_CH1,USART4_RTS_DE,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,,,,USART2_TX,,LPUART1_TX,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,,,,,,LPUART1_RX,?..."
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port A pin 12 alternate function configuration" "SPI1_MOSI,,EVENTOUT,,USART1_RTS_DE,,,COMP2_OUT,?..."
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port A pin 11 alternate function configuration" "SPI1_MISO,,EVENTOUT,,USART1_CTS,,,COMP1_OUT,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" ",,,,USART1_RX,,I2C1_SDA,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,,,,USART1_TX,,I2C1_SCL,I2C3_SMBA,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port A pin 8 alternate function configuration" "MCO,,,EVENTOUT,USART1_CK,,,I2C3_SCL,?..."
|
|
endif
|
|
else
|
|
sif CPUIS("STM32L0??D*")
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,,,,,TIM22_CH2,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,,,,USART2_CK,TIM22_ETR,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,,TIM2_CH2,,USART2_RTS,TIM21_ETR,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" ",,TIM2_CH1,,USART2_CTS,TIM2_ETR,,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,,,,USART2_TX,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" ",,,,USART1_RX,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,,,,USART1_TX,?..."
|
|
elif CPUIS("STM32L0??F*")
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,,,,,TIM22_CH2,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A pin 6 alternate function configuration" "SPI1_MISO,,,,LPUART_CTS,TIM22_CH1,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A pin 5 alternate function configuration" "SPI1_SCK,,TIM2_ETR,,,TIM2_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,,,,USART2_CK,TIM22_ETR,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A pin 3 alternate function configuration" "TIM21_CH2,,TIM2_CH4,,USART2_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A pin 2 alternate function configuration" "TIM21_CH1,,TIM2_CH3,,USART2_TX,,,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,,TIM2_CH2,,USART2_RTS,TIM21_ETR,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" ",,TIM2_CH1,,USART2_CTS,TIM2_ETR,,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,,,,USART2_TX,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" ",,,,USART1_RX,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,,,,USART1_TX,?..."
|
|
elif CPUIS("STM32L0??E*")
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,,,,,TIM22_CH2,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A pin 6 alternate function configuration" "SPI1_MISO,,,,LPUART_CTS,TIM22_CH1,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A pin 5 alternate function configuration" "SPI1_SCK,,TIM2_ETR,,,TIM2_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,,,,USART2_CK,TIM22_ETR,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A pin 3 alternate function configuration" "TIM21_CH2,,TIM2_CH4,,USART2_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A pin 2 alternate function configuration" "TIM21_CH1,,TIM2_CH3,,USART2_TX,,,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,,TIM2_CH2,,USART2_RTS,TIM21_ETR,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" ",,TIM2_CH1,,USART2_CTS,TIM2_ETR,,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,,,,USART2_TX,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" ",,,,USART1_RX,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,,,,USART1_TX,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port A pin 8 alternate function configuration" "MCO,,,EVENTOUT,USART1_CK,?..."
|
|
elif CPUIS("STM32L0??G*")
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,,,,,TIM22_CH2,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A pin 6 alternate function configuration" "SPI1_MISO,,,,LPUART_CTS,TIM22_CH1,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A pin 5 alternate function configuration" "SPI1_SCK,,TIM2_ETR,,,TIM2_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,,,,USART2_CK,TIM22_ETR,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A pin 3 alternate function configuration" "TIM21_CH2,,TIM2_CH4,,USART2_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A pin 2 alternate function configuration" "TIM21_CH1,,TIM2_CH3,,USART2_TX,,,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,,TIM2_CH2,,USART2_RTS,TIM21_ETR,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" ",,TIM2_CH1,,USART2_CTS,TIM2_ETR,,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port A pin 15 alternate function configuration" "SPI1_NSS,,TIM2_ETR,EVENTOUT,USART2_RX,TIM2_CH1,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,,,,USART2_TX,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,?..."
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" ",,,,USART1_RX,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,,,,USART1_TX,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port A pin 8 alternate function configuration" "MCO,,,EVENTOUT,USART1_CK,?..."
|
|
else
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A pin 7 alternate function configuration" "SPI1_MOSI,,,,,TIM22_CH2,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A pin 6 alternate function configuration" "SPI1_MISO,,,,LPUART_CTS,TIM22_CH1,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A pin 5 alternate function configuration" "SPI1_SCK,,TIM2_ETR,,,TIM2_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A pin 4 alternate function configuration" "SPI1_NSS,,,,USART2_CK,TIM22_ETR,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A pin 3 alternate function configuration" "TIM21_CH2,,TIM2_CH4,,USART2_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A pin 2 alternate function configuration" "TIM21_CH1,,TIM2_CH3,,USART2_TX,,,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A pin 1 alternate function configuration" "EVENTOUT,,TIM2_CH2,,USART2_RTS,TIM21_ETR,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A pin 0 alternate function configuration" ",,TIM2_CH1,,USART2_CTS,TIM2_ETR,,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port A pin 15 alternate function configuration" "SPI1_NSS,,TIM2_ETR,EVENTOUT,USART2_RX,TIM2_CH1,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A pin 14 alternate function configuration" "SWCLK,,,,USART2_TX,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A pin 13 alternate function configuration" "SWDIO,?..."
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port A pin 12 alternate function configuration" "SPI1_MOSI,,EVENTOUT,,USART1_RTS,,,COMP2_OUT,?..."
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port A pin 11 alternate function configuration" "SPI1_MISO,,EVENTOUT,,USART1_CTS,,,COMP1_OUT,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A pin 10 alternate function configuration" ",,,,USART1_RX,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A pin 9 alternate function configuration" "MCO,,,,USART1_TX,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port A pin 8 alternate function configuration" "MCO,,,EVENTOUT,USART1_CK,?..."
|
|
endif
|
|
endif
|
|
textline " "
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "GPIOA_BRR,GPIO_A port bit reset register"
|
|
sif CPUIS("STM32L0??D*")
|
|
bitfld.long 0x00 14. " BRR14 ,Port A pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port A pin 13 reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " BRR10 ,Port A pin 10 reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " BRR9 ,Port A pin 9 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BRR7 ,Port A pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port A pin 4 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port A pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port A pin 0 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L0??F*")
|
|
bitfld.long 0x00 14. " BRR14 ,Port A pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port A pin 13 reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " BRR10 ,Port A pin 10 reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " BRR9 ,Port A pin 9 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BRR7 ,Port A pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port A pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port A pin 5 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port A pin 4 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BRR3 ,Port A pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " BRR2 ,Port A pin 2 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port A pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port A pin 0 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L0??E*")
|
|
bitfld.long 0x00 14. " BRR14 ,Port A pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port A pin 13 reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " BRR10 ,Port A pin 10 reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " BRR9 ,Port A pin 9 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 8. " BRR8 ,Port A pin 8 reset" "No effect,Reset"
|
|
bitfld.long 0x00 7. " BRR7 ,Port A pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port A pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port A pin 5 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BRR4 ,Port A pin 4 reset" "No effect,Reset"
|
|
bitfld.long 0x00 3. " BRR3 ,Port A pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " BRR2 ,Port A pin 2 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port A pin 1 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BRR0 ,Port A pin 0 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L0??G*")
|
|
bitfld.long 0x00 15. " BRR15 ,Port A pin 15 reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " BRR14 ,Port A pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port A pin 13 reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " BRR10 ,Port A pin 10 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BRR9 ,Port A pin 9 reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " BRR8 ,Port A pin 8 reset" "No effect,Reset"
|
|
bitfld.long 0x00 7. " BRR7 ,Port A pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port A pin 6 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 5. " BRR5 ,Port A pin 5 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port A pin 4 reset" "No effect,Reset"
|
|
bitfld.long 0x00 3. " BRR3 ,Port A pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " BRR2 ,Port A pin 2 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BRR1 ,Port A pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port A pin 0 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L0??K8")
|
|
bitfld.long 0x00 14. " BRR14 ,Port A pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port A pin 13 reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " BRR12 ,Port A pin 12 reset" "No effect,Reset"
|
|
bitfld.long 0x00 11. " BRR11 ,Port A pin 11 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10. " BRR10 ,Port A pin 10 reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " BRR9 ,Port A pin 9 reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " BRR8 ,Port A pin 8 reset" "No effect,Reset"
|
|
bitfld.long 0x00 7. " BRR7 ,Port A pin 7 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BRR6 ,Port A pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port A pin 5 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port A pin 4 reset" "No effect,Reset"
|
|
bitfld.long 0x00 3. " BRR3 ,Port A pin 3 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 2. " BRR2 ,Port A pin 2 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port A pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port A pin 0 reset" "No effect,Reset"
|
|
else
|
|
bitfld.long 0x00 15. " BRR15 ,Port A pin 15 reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " BRR14 ,Port A pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port A pin 13 reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " BRR12 ,Port A pin 12 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BRR11 ,Port A pin 11 reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " BRR10 ,Port A pin 10 reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " BRR9 ,Port A pin 9 reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " BRR8 ,Port A pin 8 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BRR7 ,Port A pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port A pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port A pin 5 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port A pin 4 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BRR3 ,Port A pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " BRR2 ,Port A pin 2 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port A pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port A pin 0 reset" "No effect,Reset"
|
|
endif
|
|
width 0x0B
|
|
elif CPUIS("STM32L0?3*")
|
|
width 15.
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "GPIOA_MODER,GPIO_A port mode register"
|
|
bitfld.long 0x00 30.--31. " MODE15 ,Port A Pin 15 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port A Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port A Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 24.--25. " MODE12 ,Port A Pin 12 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " MODE11 ,Port A Pin 11 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 20.--21. " MODE10 ,Port A Pin 10 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port A Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 16.--17. " MODE8 ,Port A Pin 8 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port A Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port A Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port A Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port A Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port A Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port A Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port A Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port A Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
line.long 0x04 "GPIOA_OTYPER,GPIO_A port output type register"
|
|
bitfld.long 0x04 15. " OT15 ,Port A Pin 15 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 14. " OT14 ,Port A Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port A Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 12. " OT12 ,Port A Pin 12 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 11. " OT11 ,Port A Pin 11 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 10. " OT10 ,Port A Pin 10 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 9. " OT9 ,Port A Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 8. " OT8 ,Port A Pin 8 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 7. " OT7 ,Port A Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port A Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port A Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port A Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 3. " OT3 ,Port A Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 2. " OT2 ,Port A Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port A Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port A Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
line.long 0x08 "GPIOA_OSPEEDR,GPIO_A port output speed register"
|
|
bitfld.long 0x08 30.--31. " OSPEED15 ,Port A Pin 15 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port A Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port A Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 24.--25. " OSPEED12 ,Port A Pin 12 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " OSPEED11 ,Port A Pin 11 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 20.--21. " OSPEED10 ,Port A Pin 10 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port A Pin 9 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 16.--17. " OSPEED8 ,Port A Pin 8 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port A Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port A Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port A Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port A Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port A Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port A Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port A Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port A Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
line.long 0x0C "GPIOA_PUPDR,GPIO_A port pull-up/pull-down register"
|
|
bitfld.long 0x0C 30.--31. " PUPD15 ,Port A Pin 15 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port A Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port A Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 24.--25. " PUPD12 ,Port A Pin 12 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 22.--23. " PUPD11 ,Port A Pin 11 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 20.--21. " PUPD10 ,Port A Pin 10 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port A Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 16.--17. " PUPD8 ,Port A Pin 8 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port A Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port A Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port A Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port A Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port A Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port A Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port A Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port A Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOA_IDR,GPIO_A port input data register"
|
|
bitfld.long 0x00 15. " ID15 ,Port A Pin 15 input data" "0,1"
|
|
bitfld.long 0x00 14. " ID14 ,Port A Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port A Pin 13 input data" "0,1"
|
|
bitfld.long 0x00 12. " ID12 ,Port A Pin 12 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ID11 ,Port A Pin 11 input data" "0,1"
|
|
bitfld.long 0x00 10. " ID10 ,Port A Pin 10 input data" "0,1"
|
|
bitfld.long 0x00 9. " ID9 ,Port A Pin 9 input data" "0,1"
|
|
bitfld.long 0x00 8. " ID8 ,Port A Pin 8 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ID7 ,Port A Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port A Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port A Pin 5 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port A Pin 4 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ID3 ,Port A Pin 3 input data" "0,1"
|
|
bitfld.long 0x00 2. " ID2 ,Port A Pin 2 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port A Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port A Pin 0 input data" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOA_ODR,GPIO_A port output bit set/reset register"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x04 31. " ODR15_set/clr , Port A pin 10 output data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr , Port A pin 14 output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr , Port A pin 13 output data" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x04 28. " ODR12_set/clr , Port A pin 12 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x04 27. " ODR11_set/clr , Port A pin 11 output data" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x04 26. " ODR10_set/clr , Port A pin 10 output data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr , Port A pin 9 output data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x04 24. " ODR8_set/clr , Port A pin 8 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port A pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port A pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr , Port A pin 5 output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr , Port A pin 4 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port A pin 3 output data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr , Port A pin 2 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port A pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port A pin 0 output data" "Low,High"
|
|
if ((per.l(ad:0x50000000+0x1C))&0x10000)==0x00
|
|
// GPIOA_LCKR.LCKK = 0 [Not active]
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOA_LCKR,GPIO_A port configuration lock register"
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LCK15 ,Port A Pin 15 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 14. " LCK14 ,Port A Pin 14 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port A Pin 13 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 12. " LCK12 ,Port A Pin 12 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LCK11 ,Port A Pin 11 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 10. " LCK10 ,Port A Pin 10 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 9. " LCK9 ,Port A Pin 9 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 8. " LCK8 ,Port A Pin 8 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LCK7 ,Port A Pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port A Pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port A Pin 5 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port A Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LCK3 ,Port A Pin 3 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 2. " LCK2 ,Port A Pin 2 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port A Pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port A Pin 0 lock" "Not locked,Locked"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOA_LCKR,GPIO_A port configuration lock register"
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " LCK15 ,Port A Pin 15 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 14. " LCK14 ,Port A Pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port A Pin 13 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 12. " LCK12 ,Port A Pin 12 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " LCK11 ,Port A Pin 11 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 10. " LCK10 ,Port A Pin 10 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 9. " LCK9 ,Port A Pin 9 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 8. " LCK8 ,Port A Pin 8 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " LCK7 ,Port A Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port A Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port A Pin 5 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port A Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 3. " LCK3 ,Port A Pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 2. " LCK2 ,Port A Pin 2 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port A Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port A Pin 0 lock" "Not locked,Locked"
|
|
endif
|
|
textline " "
|
|
group.long 0x20++0x07
|
|
sif CPUIS("STM32L05*")||CPUIS("STM32L06*")
|
|
line.long 0x00 "AFRL,GPIOA_GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A Pin 7 alternate function configuration" "SPI1_MOSI,LCD_SEG4,,TSC_G2_IO4,,TIM22_CH2,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A Pin 6 alternate function configuration" "SPI1_MISO,LCD_SEG3,,TSC_G2_IO3,LPUART_CTS,TIM22_CH1,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A Pin 5 alternate function configuration" "SPI1_SCK,,TIM2_ETR,TSC_G2_IO2,,TIM2_CH1,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A Pin 4 alternate function configuration" "SPI1_NSS,,,TSC_G2_IO1,USART2_CK,TIM22_ETR,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A Pin 3 alternate function configuration" "TIM21_CH2,LCD_SEG2,TIM2_CH4,TSC_G1_IO4,USART2_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A Pin 2 alternate function configuration" "TIM21_CH1,LCD_SEG1,TIM2_CH3,TSC_G1_IO3,USART2_TX,,,COMP2_OUT,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A Pin 1 alternate function configuration" "EVENTOUT,LCD_SEG0,TIM2_CH2,TSC_G1_IO2,USART2_RTS_DE,TIM21_ETR,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A Pin 0 alternate function configuration" ",,TIM2_CH1,TSC_G1_IO1,USART2_CTS,TIM2_ETR,,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port A Pin 15 alternate function configuration" "SPI1_NSS,LCD_SEG17,TIM2_ETR,EVENTOUT,USART2_RX,TIM2_CH1,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A Pin 14 alternate function configuration" "SWCLK,,,,USART2_TX,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A Pin 13 alternate function configuration" "SWDIO,,USB_OE,?..."
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port A Pin 12 alternate function configuration" "SPI1_MOSI,,EVENTOUT,TSC_G4_IO4,USART1_RTS_DE,,,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port A Pin 11 alternate function configuration" "SPI1_MISO,,EVENTOUT,TSC_G4_IO3,USART1_CTS,,,COMP1_OUT,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A Pin 10 alternate function configuration" ",LCD_COM2,,TSC_G4_IO2,USART1_RX,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A Pin 9 alternate function configuration" "MCO,LCD_COM1,,TSC_G4_IO1,USART1_TX,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port A Pin 8 alternate function configuration" "MCO,LCD_COM0,USB_CRS_SYNC,EVENTOUT,USART1_CK,?..."
|
|
else
|
|
line.long 0x00 "GPIOA_AFRL,GPIO_A alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port A Pin 7 alternate function configuration" "SPI1_MOSI,LCD_SEG4,TIM3_CH2,TSC_G2_IO4,,TIM22_CH2,EVENTOUT,COMP2_OUT,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port A Pin 6 alternate function configuration" "SPI1_MISO,LCD_SEG3,TIM3_CH1,TSC_G2_IO3,LPUART1_CTS,TIM22_CH1,EVENTOUT,COMP1_OUT,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port A Pin 5 alternate function configuration" "SPI1_SCK,,TIM2_ETR,TSC_G2_IO2,,TIM2_CH1,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port A Pin 4 alternate function configuration" "SPI1_NSS,,,TSC_G2_IO1,USART2_CK,TIM22_ETR,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port A Pin 3 alternate function configuration" "TIM21_CH2,LCD_SEG2,TIM2_CH4,TSC_G1_IO4,USART2_RX,,LPUART1_RX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port A Pin 2 alternate function configuration" "TIM21_CH1,LCD_SEG1,TIM2_CH3,TSC_G1_IO3,USART2_TX,,LPUART1_TX,COMP2_OUT,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port A Pin 1 alternate function configuration" "EVENTOUT,LCD_SEG0,TIM2_CH2,TSC_G1_IO2,USART2_RTS_DE,TIM21_ETR,USART4_RX,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port A Pin 0 alternate function configuration" ",,TIM2_CH1,TSC_G1_IO1,USART2_CTS,TIM2_ETR,USART4_TX,COMP1_OUT,?..."
|
|
line.long 0x04 "GPIOA_AFRH,GPIO_A alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port A Pin 15 alternate function configuration" "SPI1_NSS,LCD_SEG17,TIM2_ETR,EVENTOUT,USART2_RX,TIM2_CH1,USART4_RTS_DE,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port A Pin 14 alternate function configuration" "SWCLK,,,,USART2_TX,,LPUART1_TX,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port A Pin 13 alternate function configuration" "SWDIO,,USB_OE,,,,LPUART1_RX,?..."
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port A Pin 12 alternate function configuration" "SPI1_MOSI,,EVENTOUT,TSC_G4_IO4,USART1_RTS_DE,,,COMP2_OUT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port A Pin 11 alternate function configuration" "SPI1_MISO,,EVENTOUT,TSC_G4_IO3,USART1_CTS,,,COMP1_OUT,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port A Pin 10 alternate function configuration" ",LCD_COM2,,TSC_G4_IO2,USART1_RX,,I2C1_SDA,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port A Pin 9 alternate function configuration" "MCO,LCD_COM1,,TSC_G4_IO1,USART1_TX,,I2C1_SCL,I2C3_SMBA,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port A Pin 8 alternate function configuration" "MCO,LCD_COM0,USB_CRS_SYNC,EVENTOUT,USART1_CK,,,I2C3_SCL,?..."
|
|
endif
|
|
textline " "
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "GPIOA_BRR,GPIO_A port bit reset register"
|
|
bitfld.long 0x00 15. " BRR15 ,Port A Pin 15 reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " BRR14 ,Port A Pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port A Pin 13 reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " BRR12 ,Port A Pin 12 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BRR11 ,Port A Pin 11 reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " BRR10 ,Port A Pin 10 reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " BRR9 ,Port A Pin 9 reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " BRR8 ,Port A Pin 8 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BRR7 ,Port A Pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port A Pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port A Pin 5 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port A Pin 4 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BRR3 ,Port A Pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " BRR2 ,Port A Pin 2 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port A Pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port A Pin 0 reset" "No effect,Reset"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
tree "GPIO B"
|
|
base ad:0x50000400
|
|
sif CPUIS("STM32L0?1*")
|
|
width 15.
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "GPIOB_MODER,GPIO_B port mode register"
|
|
sif CPUIS("STM32L0??D*")
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port B Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L031F*")||CPUIS("STM32L041F*")
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port B Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L0??F*")
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port B Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port B Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port B Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port B Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L031E*")
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port B Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port B Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port B Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port B Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port B Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L0??E*")
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port B Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port B Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port B Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port B Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port B Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port B Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L031G*")||CPUIS("STM32L041G*")
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port B Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port B Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port B Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port B Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port B Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port B Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port B Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L0??G*")
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port B Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port B Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port B Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port B Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port B Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port B Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port B Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port B Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L031K*")||CPUIS("STM32L041K*")||CPUIS("STM32L051K*")
|
|
bitfld.long 0x00 16.--17. " MODE8 ,Port B Pin 8 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port B Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port B Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port B Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port B Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port B Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port B Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port B Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port B Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L071KZ*")||CPUIS("STM32L081K*")
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port B Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port B Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port B Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port B Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port B Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port B Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port B Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L071K8*")
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port B Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port B Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port B Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port B Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port B Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port B Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L0??K*")
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port B Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 16.--17. " MODE8 ,Port B Pin 8 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port B Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port B Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port B Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port B Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port B Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port B Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port B Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port B Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L0??T*")
|
|
bitfld.long 0x00 22.--23. " MODE11 ,Port B Pin 11 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 20.--21. " MODE10 ,Port B Pin 10 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 16.--17. " MODE8 ,Port B Pin 8 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port B Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port B Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port B Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port B Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port B Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port B Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port B Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port B Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
else
|
|
bitfld.long 0x00 30.--31. " MODE15 ,Port B Pin 15 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port B Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port B Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 24.--25. " MODE12 ,Port B Pin 12 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " MODE11 ,Port B Pin 11 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 20.--21. " MODE10 ,Port B Pin 10 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port B Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 16.--17. " MODE8 ,Port B Pin 8 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port B Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port B Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port B Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port B Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port B Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port B Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port B Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port B Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
endif
|
|
line.long 0x04 "GPIOB_OTYPER,GPIO_B port output type register"
|
|
sif CPUIS("STM32L0??D*")
|
|
bitfld.long 0x04 9. " OT9 ,Port B Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L031F*")||CPUIS("STM32L041F*")
|
|
bitfld.long 0x04 1. " OT1 ,Port B Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L0??F*")
|
|
bitfld.long 0x04 9. " OT9 ,Port B Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 7. " OT7 ,Port B Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port B Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port B Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L031E*")
|
|
bitfld.long 0x04 7. " OT7 ,Port B Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port B Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 3. " OT3 ,Port B Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port B Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 0. " OT0 ,Port B Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L0??E*")
|
|
bitfld.long 0x04 9. " OT9 ,Port B Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 7. " OT7 ,Port B Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port B Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 3. " OT3 ,Port B Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 1. " OT1 ,Port B Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port B Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L031G*")||CPUIS("STM32L041G*")
|
|
bitfld.long 0x04 7. " OT7 ,Port B Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port B Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port B Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port B Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 3. " OT3 ,Port B Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port B Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port B Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L0??G*")
|
|
bitfld.long 0x04 9. " OT9 ,Port B Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 7. " OT7 ,Port B Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port B Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port B Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 4. " OT4 ,Port B Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 3. " OT3 ,Port B Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port B Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port B Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L031K*")||CPUIS("STM32L041K*")||CPUIS("STM32L051K*")
|
|
bitfld.long 0x04 8. " OT8 ,Port B Pin 8 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 7. " OT7 ,Port B Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port B Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port B Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 4. " OT4 ,Port B Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 3. " OT3 ,Port B Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 2. " OT2 ,Port B Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port B Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 0. " OT0 ,Port B Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L071KZ*")||CPUIS("STM32L081K*")
|
|
bitfld.long 0x04 7. " OT7 ,Port B Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port B Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port B Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port B Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 3. " OT3 ,Port B Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port B Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port B Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L071K8*")
|
|
bitfld.long 0x04 7. " OT7 ,Port B Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port B Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port B Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port B Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 1. " OT1 ,Port B Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port B Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L0??K*")
|
|
bitfld.long 0x04 9. " OT9 ,Port B Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 8. " OT8 ,Port B Pin 8 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 7. " OT7 ,Port B Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port B Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 5. " OT5 ,Port B Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port B Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 3. " OT3 ,Port B Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 2. " OT2 ,Port B Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 1. " OT1 ,Port B Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port B Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L0??T*")
|
|
bitfld.long 0x04 11. " OT11 ,Port B Pin 11 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 10. " OT10 ,Port B Pin 10 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 8. " OT8 ,Port B Pin 8 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 7. " OT7 ,Port B Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 6. " OT6 ,Port B Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port B Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port B Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 3. " OT3 ,Port B Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 2. " OT2 ,Port B Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port B Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port B Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
else
|
|
bitfld.long 0x04 15. " OT15 ,Port B Pin 15 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 14. " OT14 ,Port B Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port B Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 12. " OT12 ,Port B Pin 12 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 11. " OT11 ,Port B Pin 11 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 10. " OT10 ,Port B Pin 10 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 9. " OT9 ,Port B Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 8. " OT8 ,Port B Pin 8 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 7. " OT7 ,Port B Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port B Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port B Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port B Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 3. " OT3 ,Port B Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 2. " OT2 ,Port B Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port B Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port B Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
endif
|
|
line.long 0x08 "GPIOB_OSPEEDR,GPIO_B port output speed register"
|
|
sif CPUIS("STM32L0??D*")
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port B Pin 9 I/O output speed configuration" "Very low,Low,Medium,High"
|
|
elif CPUIS("STM32L031F*")||CPUIS("STM32L041F*")
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port B Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L0??F*")
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port B Pin 9 I/O output speed configuration" "Very low,Low,Medium,High"
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port B Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port B Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port B Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L031E*")
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port B Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port B Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port B Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port B Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port B Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L0??E*")
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port B Pin 9 I/O output speed configuration" "Very low,Low,Medium,High"
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port B Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port B Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port B Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port B Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port B Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L031G*")||CPUIS("STM32L041G*")
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port B Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port B Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port B Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port B Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port B Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port B Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port B Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L0??G*")
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port B Pin 9 I/O output speed configuration" "Very low,Low,Medium,High"
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port B Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port B Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port B Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port B Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port B Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port B Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port B Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L031K*")||CPUIS("STM32L041K*")||CPUIS("STM32L051K*")
|
|
bitfld.long 0x08 16.--17. " OSPEED8 ,Port B Pin 8 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port B Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port B Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port B Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port B Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port B Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port B Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port B Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port B Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L071KZ*")||CPUIS("STM32L081K*")
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port B Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port B Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port B Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port B Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port B Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port B Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port B Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L071K8*")
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port B Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port B Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port B Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port B Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port B Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port B Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L0??K*")
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port B Pin 9 I/O output speed configuration" "Very low,Low,Medium,High"
|
|
bitfld.long 0x08 16.--17. " OSPEED8 ,Port B Pin 8 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port B Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port B Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port B Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port B Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port B Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port B Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port B Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port B Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L0??T*")
|
|
bitfld.long 0x08 22.--23. " OSPEED11 ,Port B Pin 11 I/O output speed configuration" "Very low,Low,Medium,High"
|
|
bitfld.long 0x08 20.--21. " OSPEED10 ,Port B Pin 10 I/O output speed configuration" "Very low,Low,Medium,High"
|
|
bitfld.long 0x08 16.--17. " OSPEED8 ,Port B Pin 8 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port B Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port B Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port B Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port B Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port B Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port B Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port B Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port B Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
else
|
|
bitfld.long 0x08 30.--31. " OSPEED15 ,Port B Pin 15 I/O output speed configuration" "Very low,Low,Medium,High"
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port B Pin 14 I/O output speed configuration" "Very low,Low,Medium,High"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port B Pin 13 I/O output speed configuration" "Very low,Low,Medium,High"
|
|
bitfld.long 0x08 24.--25. " OSPEED12 ,Port B Pin 12 I/O output speed configuration" "Very low,Low,Medium,High"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " OSPEED11 ,Port B Pin 11 I/O output speed configuration" "Very low,Low,Medium,High"
|
|
bitfld.long 0x08 20.--21. " OSPEED10 ,Port B Pin 10 I/O output speed configuration" "Very low,Low,Medium,High"
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port B Pin 9 I/O output speed configuration" "Very low,Low,Medium,High"
|
|
bitfld.long 0x08 16.--17. " OSPEED8 ,Port B Pin 8 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port B Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port B Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port B Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port B Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port B Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port B Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port B Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port B Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
endif
|
|
line.long 0x0C "GPIOB_PUPDR,GPIO_B port pull-up/pull-down register"
|
|
sif CPUIS("STM32L0??D*")
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port B Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L031F*")||CPUIS("STM32L041F*")
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port B Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L0??F*")
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port B Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port B Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port B Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port B Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L031E*")
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port B Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port B Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port B Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port B Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port B Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L0??E*")
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port B Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port B Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port B Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port B Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port B Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port B Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L031G*")||CPUIS("STM32L041G*")
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port B Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port B Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port B Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port B Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port B Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port B Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port B Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L0??G*")
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port B Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port B Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port B Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port B Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port B Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port B Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port B Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port B Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L031K*")||CPUIS("STM32L041K*")||CPUIS("STM32L051K*")
|
|
bitfld.long 0x0C 16.--17. " PUPD8 ,Port B Pin 8 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port B Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port B Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port B Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port B Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port B Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port B Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port B Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port B Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L071KZ*")||CPUIS("STM32L081K*")
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port B Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port B Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port B Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port B Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port B Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port B Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port B Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L071K8*")
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port B Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port B Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port B Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port B Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port B Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port B Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L0??K*")
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port B Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 16.--17. " PUPD8 ,Port B Pin 8 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port B Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port B Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port B Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port B Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port B Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port B Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port B Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port B Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L0??T*")
|
|
bitfld.long 0x0C 22.--23. " PUPD11 ,Port B Pin 11 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 20.--21. " PUPD10 ,Port B Pin 10 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 16.--17. " PUPD8 ,Port B Pin 8 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port B Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port B Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port B Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port B Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port B Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port B Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port B Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port B Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
else
|
|
bitfld.long 0x0C 30.--31. " PUPD15 ,Port B Pin 15 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port B Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port B Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 24.--25. " PUPD12 ,Port B Pin 12 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 22.--23. " PUPD11 ,Port B Pin 11 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 20.--21. " PUPD10 ,Port B Pin 10 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port B Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 16.--17. " PUPD8 ,Port B Pin 8 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port B Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port B Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port B Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port B Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port B Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port B Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port B Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port B Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOB_IDR,GPIO_B port input data register"
|
|
sif CPUIS("STM32L0??D*")
|
|
bitfld.long 0x00 9. " ID9 ,Port B Pin 9 input data" "0,1"
|
|
elif CPUIS("STM32L031F*")||CPUIS("STM32L041F*")
|
|
bitfld.long 0x00 1. " ID1 ,Port B Pin 1 input data" "0,1"
|
|
elif CPUIS("STM32L0??F*")
|
|
bitfld.long 0x00 9. " ID9 ,Port B Pin 9 input data" "0,1"
|
|
bitfld.long 0x00 7. " ID7 ,Port B Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port B Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port B Pin 1 input data" "0,1"
|
|
elif CPUIS("STM32L031E*")
|
|
bitfld.long 0x00 7. " ID7 ,Port B Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port B Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 3. " ID3 ,Port B Pin 3 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port B Pin 1 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ID0 ,Port B Pin 0 input data" "0,1"
|
|
elif CPUIS("STM32L0??E*")
|
|
bitfld.long 0x00 9. " ID9 ,Port B Pin 9 input data" "0,1"
|
|
bitfld.long 0x00 7. " ID7 ,Port B Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port B Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 3. " ID3 ,Port B Pin 3 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ID1 ,Port B Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port B Pin 0 input data" "0,1"
|
|
elif CPUIS("STM32L031G*")||CPUIS("STM32L041G*")
|
|
bitfld.long 0x00 7. " ID7 ,Port B Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port B Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port B Pin 5 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port B Pin 4 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ID3 ,Port B Pin 3 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port B Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port B Pin 0 input data" "0,1"
|
|
elif CPUIS("STM32L0??G*")
|
|
bitfld.long 0x00 9. " ID9 ,Port B Pin 9 input data" "0,1"
|
|
bitfld.long 0x00 7. " ID7 ,Port B Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port B Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port B Pin 5 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ID4 ,Port B Pin 4 input data" "0,1"
|
|
bitfld.long 0x00 3. " ID3 ,Port B Pin 3 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port B Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port B Pin 0 input data" "0,1"
|
|
elif CPUIS("STM32L031K*")||CPUIS("STM32L041K*")||CPUIS("STM32L051K*")
|
|
bitfld.long 0x00 8. " ID8 ,Port B Pin 8 input data" "0,1"
|
|
bitfld.long 0x00 7. " ID7 ,Port B Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port B Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port B Pin 5 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ID4 ,Port B Pin 4 input data" "0,1"
|
|
bitfld.long 0x00 3. " ID3 ,Port B Pin 3 input data" "0,1"
|
|
bitfld.long 0x00 2. " ID2 ,Port B Pin 2 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port B Pin 1 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ID0 ,Port B Pin 0 input data" "0,1"
|
|
elif CPUIS("STM32L071KZ*")||CPUIS("STM32L081K*")
|
|
bitfld.long 0x00 7. " ID7 ,Port B Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port B Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port B Pin 5 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port B Pin 4 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ID3 ,Port B Pin 3 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port B Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port B Pin 0 input data" "0,1"
|
|
elif CPUIS("STM32L071K8*")
|
|
bitfld.long 0x00 7. " ID7 ,Port B Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port B Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port B Pin 5 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port B Pin 4 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ID1 ,Port B Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port B Pin 0 input data" "0,1"
|
|
elif CPUIS("STM32L0??K*")
|
|
bitfld.long 0x00 9. " ID9 ,Port B Pin 9 input data" "0,1"
|
|
bitfld.long 0x00 8. " ID8 ,Port B Pin 8 input data" "0,1"
|
|
bitfld.long 0x00 7. " ID7 ,Port B Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port B Pin 6 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " ID5 ,Port B Pin 5 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port B Pin 4 input data" "0,1"
|
|
bitfld.long 0x00 3. " ID3 ,Port B Pin 3 input data" "0,1"
|
|
bitfld.long 0x00 2. " ID2 ,Port B Pin 2 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ID1 ,Port B Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port B Pin 0 input data" "0,1"
|
|
elif CPUIS("STM32L0??T*")
|
|
bitfld.long 0x00 11. " ID11 ,Port B Pin 11 input data" "0,1"
|
|
bitfld.long 0x00 10. " ID10 ,Port B Pin 10 input data" "0,1"
|
|
bitfld.long 0x00 8. " ID8 ,Port B Pin 8 input data" "0,1"
|
|
bitfld.long 0x00 7. " ID7 ,Port B Pin 7 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ID6 ,Port B Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port B Pin 5 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port B Pin 4 input data" "0,1"
|
|
bitfld.long 0x00 3. " ID3 ,Port B Pin 3 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ID2 ,Port B Pin 2 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port B Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port B Pin 0 input data" "0,1"
|
|
else
|
|
bitfld.long 0x00 15. " ID15 ,Port B Pin 15 input data" "0,1"
|
|
bitfld.long 0x00 14. " ID14 ,Port B Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port B Pin 13 input data" "0,1"
|
|
bitfld.long 0x00 12. " ID12 ,Port B Pin 12 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ID11 ,Port B Pin 11 input data" "0,1"
|
|
bitfld.long 0x00 10. " ID10 ,Port B Pin 10 input data" "0,1"
|
|
bitfld.long 0x00 9. " ID9 ,Port B Pin 9 input data" "0,1"
|
|
bitfld.long 0x00 8. " ID8 ,Port B Pin 8 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ID7 ,Port B Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port B Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port B Pin 5 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port B Pin 4 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ID3 ,Port B Pin 3 input data" "0,1"
|
|
bitfld.long 0x00 2. " ID2 ,Port B Pin 2 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port B Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port B Pin 0 input data" "0,1"
|
|
endif
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOB_ODR,GPIO_B port output bit set/reset register"
|
|
sif CPUIS("STM32L0??D*")
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr , Port B pin 9 output data" "Low,High"
|
|
elif CPUIS("STM32L031F*")||CPUIS("STM32L041F*")
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port B pin 1 output data" "Low,High"
|
|
elif CPUIS("STM32L0??F*")
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr , Port B pin 9 output data" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port B pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port B pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port B pin 1 output data" "Low,High"
|
|
elif CPUIS("STM32L031E*")
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port B pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port B pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port B pin 3 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port B pin 1 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port B pin 0 output data" "Low,High"
|
|
elif CPUIS("STM32L0??E*")
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr , Port B pin 9 output data" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port B pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port B pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port B pin 3 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port B pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port B pin 0 output data" "Low,High"
|
|
elif CPUIS("STM32L031G*")||CPUIS("STM32L041G*")
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port B pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port B pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr , Port B pin 5 output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr , Port B pin 4 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port B pin 3 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port B pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port B pin 0 output data" "Low,High"
|
|
elif CPUIS("STM32L0??G*")
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr , Port B pin 9 output data" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port B pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port B pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr , Port B pin 5 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr , Port B pin 4 output data" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port B pin 3 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port B pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port B pin 0 output data" "Low,High"
|
|
elif CPUIS("STM32L031K*")||CPUIS("STM32L041K*")||CPUIS("STM32L051K*")
|
|
setclrfld.long 0x00 8. 0x04 8. 0x04 24. " ODR8_set/clr , Port B pin 8 output data" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port B pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port B pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr , Port B pin 5 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr , Port B pin 4 output data" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port B pin 3 output data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr , Port B pin 2 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port B pin 1 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port B pin 0 output data" "Low,High"
|
|
elif CPUIS("STM32L071KZ*")||CPUIS("STM32L081K*")
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port B pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port B pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr , Port B pin 5 output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr , Port B pin 4 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port B pin 3 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port B pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port B pin 0 output data" "Low,High"
|
|
elif CPUIS("STM32L071K8*")
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port B pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port B pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr , Port B pin 5 output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr , Port B pin 4 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port B pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port B pin 0 output data" "Low,High"
|
|
elif CPUIS("STM32L0??K*")
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr , Port B pin 9 output data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x04 24. " ODR8_set/clr , Port B pin 8 output data" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port B pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port B pin 6 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr , Port B pin 5 output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr , Port B pin 4 output data" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port B pin 3 output data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr , Port B pin 2 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port B pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port B pin 0 output data" "Low,High"
|
|
elif CPUIS("STM32L0??T*")
|
|
setclrfld.long 0x00 11. 0x04 11. 0x04 27. " ODR11_set/clr , Port B pin 11 output data" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x04 26. " ODR10_set/clr , Port B pin 10 output data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x04 24. " ODR8_set/clr , Port B pin 8 output data" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port B pin 7 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port B pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr , Port B pin 5 output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr , Port B pin 4 output data" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port B pin 3 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr , Port B pin 2 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port B pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port B pin 0 output data" "Low,High"
|
|
else
|
|
setclrfld.long 0x00 15. 0x04 15. 0x04 31. " ODR15_set/clr , Port B pin 15 output data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr , Port B pin 14 output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr , Port B pin 13 output data" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x04 28. " ODR12_set/clr , Port B pin 12 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x04 27. " ODR11_set/clr , Port B pin 11 output data" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x04 26. " ODR10_set/clr , Port B pin 10 output data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr , Port B pin 9 output data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x04 24. " ODR8_set/clr , Port B pin 8 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port B pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port B pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr , Port B pin 5 output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr , Port B pin 4 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port B pin 3 output data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr , Port B pin 2 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port B pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port B pin 0 output data" "Low,High"
|
|
endif
|
|
if ((per.l(ad:0x50000400+0x1C))&0x10000)==0x00
|
|
// GPIOB_LCKR.LCKK = 0 [Not active]
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOB_LCKR,GPIO_B port configuration lock register"
|
|
sif CPUIS("STM32L0??D*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LCK9 ,Port B Pin 9 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L031F*")||CPUIS("STM32L041F*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??F*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LCK9 ,Port B Pin 9 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L031E*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??E*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LCK9 ,Port B Pin 9 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L031G*")||CPUIS("STM32L041G*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??G*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LCK9 ,Port B Pin 9 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L031K*")||CPUIS("STM32L041K*")||CPUIS("STM32L051K*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 8. " LCK8 ,Port B Pin 8 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 2. " LCK2 ,Port B Pin 2 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L071KZ*")||CPUIS("STM32L081K*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L071K8*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??K*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LCK9 ,Port B Pin 9 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 8. " LCK8 ,Port B Pin 8 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 2. " LCK2 ,Port B Pin 2 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??T*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LCK11 ,Port B Pin 11 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 10. " LCK10 ,Port B Pin 10 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 8. " LCK8 ,Port B Pin 8 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LCK2 ,Port B Pin 2 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
else
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LCK15 ,Port B Pin 15 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 14. " LCK14 ,Port B Pin 14 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port B Pin 13 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 12. " LCK12 ,Port B Pin 12 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LCK11 ,Port B Pin 11 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 10. " LCK10 ,Port B Pin 10 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 9. " LCK9 ,Port B Pin 9 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 8. " LCK8 ,Port B Pin 8 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 2. " LCK2 ,Port B Pin 2 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
endif
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOB_LCKR,GPIO_B port configuration lock register"
|
|
sif CPUIS("STM32L0??D*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " LCK9 ,Port B Pin 9 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L031F*")||CPUIS("STM32L041F*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??F*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " LCK9 ,Port B Pin 9 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L031E*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??E*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " LCK9 ,Port B Pin 9 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L031G*")||CPUIS("STM32L041G*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??G*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " LCK9 ,Port B Pin 9 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L031K*")||CPUIS("STM32L041K*")||CPUIS("STM32L051K*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 8. " LCK8 ,Port B Pin 8 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 2. " LCK2 ,Port B Pin 2 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L071KZ*")||CPUIS("STM32L081K*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L071K8*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??K*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " LCK9 ,Port B Pin 9 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 8. " LCK8 ,Port B Pin 8 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 2. " LCK2 ,Port B Pin 2 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??T*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " LCK11 ,Port B Pin 11 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 10. " LCK10 ,Port B Pin 10 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 8. " LCK8 ,Port B Pin 8 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " LCK2 ,Port B Pin 2 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
else
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " LCK15 ,Port B Pin 15 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 14. " LCK14 ,Port B Pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port B Pin 13 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 12. " LCK12 ,Port B Pin 12 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " LCK11 ,Port B Pin 11 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 10. " LCK10 ,Port B Pin 10 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 9. " LCK9 ,Port B Pin 9 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 8. " LCK8 ,Port B Pin 8 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 2. " LCK2 ,Port B Pin 2 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
endif
|
|
endif
|
|
textline " "
|
|
sif CPUIS("STM32L01*")||CPUIS("STM32L02*")
|
|
sif CPUIS("STM32L0??F*")
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B pin 7 alternate function configuration" "USART2_RX,I2C1_SDA,LPTIM1_IN2,,,TIM2_CH4,LPUART1_RX,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B pin 6 alternate function configuration" "USART2_TX,I2C1_SCL,LPTIM1_ETR,,,TIM2_CH3,LPUART1_TX,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B pin 1 alternate function configuration" "USART2_CK,SPI1_MOSI,LPTIM1_IN1,,LPUART1_RTS,TIM2_CH4,?..."
|
|
line.long 0x04 "GPIOB_AFRH,GPIO_B alternate function high register"
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port B Pin 9 alternate function configuration" ",,EVENTOUT,,I2C1_SDA,?..."
|
|
elif CPUIS("STM32L0??E*")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART1_RX,I2C1_SDA,LPTIM1_IN2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART2_TX,I2C1_SCL,LPTIM1_ETR,,,TIM21_CH1,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,,EVENTOUT,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" "USART2_CK,SPI1_MOSI,,,LPUART1_RTS,TIM2_CH4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,SPI1_MISO,,,USART2_RTS,TIM2_CH3,?..."
|
|
hgroup.long 0x24++0x03
|
|
hide.long 0x04 "GPIOB_AFRH,GPIO_B alternate function high register"
|
|
elif CPUIS("STM32L0??G*")
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART1_RX,I2C1_SDA,LPTIM1_IN2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART2_TX,I2C1_SCL,LPTIM1_ETR,,,TIM21_CH1,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM22_CH2,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,,EVENTOUT,,TIM22_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,,EVENTOUT,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" "USART2_CK,SPI1_MOSI,,,LPUART1_RTS,TIM2_CH4,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,SPI1_MISO,,,USART2_RTS,TIM2_CH3,?..."
|
|
line.long 0x04 "GPIOB_AFRH,GPIO_B alternate function high register"
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port B Pin 9 alternate function configuration" ",,EVENTOUT,,I2C1_SDA,?..."
|
|
elif (!CPUIS("STM32L0??D*"))
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART1_RX,I2C1_SDA,LPTIM1_IN2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART2_TX,I2C1_SCL,LPTIM1_ETR,,,TIM21_CH1,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM22_CH2,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,,EVENTOUT,,TIM22_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,,EVENTOUT,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" "USART2_CK,SPI1_MOSI,,,LPUART1_RTS,TIM2_CH4,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,SPI1_MISO,,,USART2_RTS,TIM2_CH3,?..."
|
|
line.long 0x04 "GPIOB_AFRH,GPIO_B alternate function high register"
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port B Pin 9 alternate function configuration" ",,EVENTOUT,,I2C1_SDA,?..."
|
|
endif
|
|
elif CPUIS("STM32L03*")||CPUIS("STM32L04*")
|
|
sif CPUIS("STM32L0??F*")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" "USART2_CK,SPI1_MOSI,,,LPUART1_RTS,TIM2_CH4,?..."
|
|
elif CPUIS("STM32L0??E*")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART2_RX,I2C1_SDA,LPTIM1_IN2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART2_TX,I2C1_SCL,LPTIM1_ETR,,,TIM21_CH1,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,,EVENTOUT,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" "USART2_CK,SPI1_MOSI,,,LPUART1_RTS,TIM2_CH4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,SPI1_MISO,,,USART2_RTS,TIM2_CH3,?..."
|
|
elif CPUIS("STM32L031G*")||CPUIS("STM32L041G*")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART2_RX,I2C1_SDA,LPTIM1_IN2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART2_TX,I2C1_SCL,LPTIM1_ETR,,,TIM21_CH1,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM22_CH2,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,,EVENTOUT,,TIM22_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,,EVENTOUT,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" "USART2_CK,SPI1_MOSI,,,LPUART1_RTS,TIM2_CH4,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,SPI1_MISO,,,USART2_RTS,TIM2_CH3,?..."
|
|
elif CPUIS("STM32L0??G*")
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART2_RX,I2C1_SDA,LPTIM1_IN2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART2_TX,I2C1_SCL,LPTIM1_ETR,,,TIM21_CH1,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM22_CH2,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,,EVENTOUT,,TIM22_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,,EVENTOUT,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" "USART2_CK,SPI1_MOSI,,,LPUART1_RTS,TIM2_CH4,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,SPI1_MISO,,,USART2_RTS,TIM2_CH3,?..."
|
|
line.long 0x04 "GPIOB_AFRH,GPIO_B alternate function high register"
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port B Pin 9 alternate function configuration" ",,EVENTOUT,,I2C1_SDA,?..."
|
|
elif CPUIS("STM32L031K*")||CPUIS("STM32L041K*")||CPUIS("STM32L051K*")
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART2_RX,I2C1_SDA,LPTIM1_IN2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART2_TX,I2C1_SCL,LPTIM1_ETR,,,TIM21_CH1,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM22_CH2,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,,EVENTOUT,,TIM22_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,,EVENTOUT,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port B Pin 2 alternate function configuration" ",,LPTIM1_OUT,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" "USART2_CK,SPI1_MOSI,,,LPUART1_RTS,TIM2_CH4,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,SPI1_MISO,,,USART2_RTS,TIM2_CH3,?..."
|
|
line.long 0x04 "GPIOB_AFRH,GPIO_B alternate function high register"
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port B Pin 8 alternate function configuration" ",,,,I2C1_SCL,?..."
|
|
elif CPUIS("STM32L0??K*")
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART2_RX,I2C1_SDA,LPTIM1_IN2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART2_TX,I2C1_SCL,LPTIM1_ETR,,,TIM21_CH1,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM22_CH2,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,,EVENTOUT,,TIM22_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,,EVENTOUT,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port B Pin 2 alternate function configuration" ",,LPTIM1_OUT,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" "USART2_CK,SPI1_MOSI,,,LPUART1_RTS,TIM2_CH4,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,SPI1_MISO,,,USART2_RTS,TIM2_CH3,?..."
|
|
line.long 0x04 "GPIOB_AFRH,GPIO_B alternate function high register"
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port B Pin 9 alternate function configuration" ",,EVENTOUT,,I2C1_SDA,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port B Pin 8 alternate function configuration" ",,,,I2C1_SCL,?..."
|
|
else
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART2_RX,I2C1_SDA,LPTIM1_IN2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART2_TX,I2C1_SCL,LPTIM1_ETR,,,TIM21_CH1,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM22_CH2,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,,EVENTOUT,,TIM22_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,,EVENTOUT,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port B Pin 2 alternate function configuration" ",,LPTIM1_OUT,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" "USART2_CK,SPI1_MOSI,,,LPUART1_RTS,TIM2_CH4,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,SPI1_MISO,,,USART2_RTS,TIM2_CH3,?..."
|
|
line.long 0x04 "GPIOB_AFRH,GPIO_B alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port B Pin 15 alternate function configuration" "SPI1_MOSI,,RTC_REFIN,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port B Pin 14 alternate function configuration" "SPI1_MISO,,RTC_OUT,,,TIM21_CH2,LPUART1_RTS,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port B Pin 13 alternate function configuration" "SPI1_SCK,,MCO,,,TIM21_CH1,LPUART1_CTS,?..."
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port B Pin 12 alternate function configuration" "SPI1_NSS,,,,,,EVENTOUT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port B Pin 11 alternate function configuration" "EVENTOUT,,TIM2_CH4,,,,LPUART1_RX,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port B Pin 10 alternate function configuration" ",,TIM2_CH3,,,,LPUART1_TX,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port B Pin 9 alternate function configuration" ",,EVENTOUT,,I2C1_SDA,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port B Pin 8 alternate function configuration" ",,,,I2C1_SCL,?..."
|
|
endif
|
|
elif CPUIS("STM32L07*")||CPUIS("STM32L08*")
|
|
sif CPUIS("STM32L071K8")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART1_RX,I2C1_SDA,LPTIM1_IN2,,,,USART4_CTS,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART1_TX,I2C1_SCL,LPTIM1_ETR,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM3_CH2/TIM22_CH2,USART1_CK,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,,TIM3_CH1,,TIM22_CH1,USART1_CTS,I2C3_SDA,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" ",,TIM3_CH4,,LPUART1_RTS_DE,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,,TIM3_CH3,?..."
|
|
elif CPUIS("STM32L0??K*")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART1_RX,I2C1_SDA,LPTIM1_IN2,,,,USART4_CTS,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART1_TX,I2C1_SCL,LPTIM1_ETR,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM3_CH2/TIM22_CH2,USART1_CK,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,,TIM3_CH1,,TIM22_CH1,USART1_CTS,I2C3_SDA,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,,EVENTOUT,USART1_RTS_DE,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" ",,TIM3_CH4,,LPUART1_RTS_DE,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,,TIM3_CH3,?..."
|
|
else
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART1_RX,I2C1_SDA,LPTIM1_IN2,,,,USART4_CTS,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART1_TX,I2C1_SCL,LPTIM1_ETR,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM3_CH2/TIM22_CH2,USART1_CK,USART5_CK/USART5_RTS_DE,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,,TIM3_CH1,,TIM22_CH1,USART1_CTS,USART5_RX,I2C3_SDA,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,,EVENTOUT,USART1_RTS_DE,USART5_TX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port B Pin 2 alternate function configuration" ",,LPTIM1_OUT,,,,,I2C3_SMBA,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" ",,TIM3_CH4,,LPUART1_RTS_DE,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,,TIM3_CH3,?..."
|
|
line.long 0x04 "GPIOB_AFRH,GPIO_B alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port B Pin 15 alternate function configuration" "SPI2_MOSI/I2S2_SD,,RTC_REFIN,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port B Pin 14 alternate function configuration" "SPI2_MISO/I2S2_MCK,,RTC_OUT,,LPUART1_RTS_DE,I2C2_SDA,TIM21_CH2,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port B Pin 13 alternate function configuration" "SPI2_SCK/I2S2_CK,,MCO,,LPUART1_CTS,I2C2_SCL,TIM21_CH1,?..."
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port B Pin 12 alternate function configuration" "SPI2_NSS/I2S2_WS,,LPUART1_RTS_DE,,,I2C2_SMBA,EVENTOUT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port B Pin 11 alternate function configuration" "EVENTOUT,,TIM2_CH4,,LPUART1_RX,,I2C2_SDA,LPUART1_TX,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port B Pin 10 alternate function configuration" ",,TIM2_CH3,,LPUART1_TX,SPI2_SCK,I2C2_SCL,LPUART1_RX,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port B Pin 9 alternate function configuration" ",,EVENTOUT,,I2C1_SDA,SPI2_NSS/I2S2_WS,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port B Pin 8 alternate function configuration" ",,,,I2C1_SCL,?..."
|
|
endif
|
|
else
|
|
sif CPUIS("STM32L0??K*")
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART1_RX,I2C1_SDA,LPTIM1_IN2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART1_TX,I2C1_SCL,LPTIM1_ETR,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM22_CH2,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,,EVENTOUT,,TIM22_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,,EVENTOUT,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port B Pin 2 alternate function configuration" ",,LPTIM1_OUT,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" ",,,,LPUART_RTS,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,?..."
|
|
line.long 0x04 "GPIOB_AFRH,GPIO_B alternate function high register"
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port B Pin 8 alternate function configuration" ",,,,I2C1_SCL,?..."
|
|
elif CPUIS("STM32L0??T*")
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART1_RX,I2C1_SDA,LPTIM1_IN2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART1_TX,I2C1_SCL,LPTIM1_ETR,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM22_CH2,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,,EVENTOUT,,TIM22_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,,EVENTOUT,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port B Pin 2 alternate function configuration" ",,LPTIM1_OUT,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" ",,,,LPUART_RTS,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,?..."
|
|
line.long 0x04 "GPIOB_AFRH,GPIO_B alternate function high register"
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port B Pin 11 alternate function configuration" "EVENTOUT,,TIM2_CH4,,LPUART_RX,,I2C2_SDA,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port B Pin 10 alternate function configuration" ",,TIM2_CH3,,LPUART_TX,SPI2_SCK,I2C2_SCL,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port B Pin 8 alternate function configuration" ",,,,I2C1_SCL,?..."
|
|
else
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART1_RX,I2C1_SDA,LPTIM1_IN2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART1_TX,I2C1_SCL,LPTIM1_ETR,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM22_CH2,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,,EVENTOUT,,TIM22_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,,EVENTOUT,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port B Pin 2 alternate function configuration" ",,LPTIM1_OUT,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" ",,,,LPUART_RTS,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,?..."
|
|
line.long 0x04 "GPIOB_AFRH,GPIO_B alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port B Pin 15 alternate function configuration" "SPI2_MOSI/I2S2_SD,,RTC_REFIN,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port B Pin 14 alternate function configuration" "SPI2_MISO/I2S2_MCK,,RTC_OUT,,LPUART_RTS,I2C2_SDA,TIM21_CH2,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port B Pin 13 alternate function configuration" "SPI2_SCK/I2S2_CK,,,,LPUART_CTS,I2C2_SCL,TIM21_CH1,?..."
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port B Pin 12 alternate function configuration" "SPI2_NSS/I2S2_WS,,LPUART_RTS,,,I2C2_SMBA,EVENTOUT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port B Pin 11 alternate function configuration" "EVENTOUT,,TIM2_CH4,,LPUART_RX,,I2C2_SDA,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port B Pin 10 alternate function configuration" ",,TIM2_CH3,,LPUART_TX,SPI2_SCK,I2C2_SCL,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port B Pin 9 alternate function configuration" ",,EVENTOUT,,I2C1_SDA,SPI2_NSS/I2S2_WS,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port B Pin 8 alternate function configuration" ",,,,I2C1_SCL,?..."
|
|
endif
|
|
endif
|
|
textline " "
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "GPIOB_BRR,GPIO_B port bit reset register"
|
|
sif CPUIS("STM32L0??D*")
|
|
bitfld.long 0x00 9. " BRR9 ,Port B Pin 9 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L031F*")||CPUIS("STM32L041F*")
|
|
bitfld.long 0x00 1. " BRR1 ,Port B Pin 1 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L0??F*")
|
|
bitfld.long 0x00 9. " BRR9 ,Port B Pin 9 reset" "No effect,Reset"
|
|
bitfld.long 0x00 7. " BRR7 ,Port B Pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port B Pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port B Pin 1 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L031E*")
|
|
bitfld.long 0x00 7. " BRR7 ,Port B Pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port B Pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 3. " BRR3 ,Port B Pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port B Pin 1 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BRR0 ,Port B Pin 0 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L0??E*")
|
|
bitfld.long 0x00 9. " BRR9 ,Port B Pin 9 reset" "No effect,Reset"
|
|
bitfld.long 0x00 7. " BRR7 ,Port B Pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port B Pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 3. " BRR3 ,Port B Pin 3 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BRR1 ,Port B Pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port B Pin 0 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L031G*")||CPUIS("STM32L041G*")
|
|
bitfld.long 0x00 7. " BRR7 ,Port B Pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port B Pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port B Pin 5 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port B Pin 4 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BRR3 ,Port B Pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port B Pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port B Pin 0 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L0??G*")
|
|
bitfld.long 0x00 9. " BRR9 ,Port B Pin 9 reset" "No effect,Reset"
|
|
bitfld.long 0x00 7. " BRR7 ,Port B Pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port B Pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port B Pin 5 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BRR4 ,Port B Pin 4 reset" "No effect,Reset"
|
|
bitfld.long 0x00 3. " BRR3 ,Port B Pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port B Pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port B Pin 0 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L031K*")||CPUIS("STM32L041K*")||CPUIS("STM32L051K*")
|
|
bitfld.long 0x00 8. " BRR8 ,Port B Pin 8 reset" "No effect,Reset"
|
|
bitfld.long 0x00 7. " BRR7 ,Port B Pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port B Pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port B Pin 5 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BRR4 ,Port B Pin 4 reset" "No effect,Reset"
|
|
bitfld.long 0x00 3. " BRR3 ,Port B Pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " BRR2 ,Port B Pin 2 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port B Pin 1 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BRR0 ,Port B Pin 0 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L071KZ*")||CPUIS("STM32L081K*")
|
|
bitfld.long 0x00 7. " BRR7 ,Port B Pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port B Pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port B Pin 5 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port B Pin 4 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BRR3 ,Port B Pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port B Pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port B Pin 0 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L071K8*")
|
|
bitfld.long 0x00 7. " BRR7 ,Port B Pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port B Pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port B Pin 5 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port B Pin 4 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BRR1 ,Port B Pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port B Pin 0 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L0??K*")
|
|
bitfld.long 0x00 9. " BRR9 ,Port B Pin 9 reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " BRR8 ,Port B Pin 8 reset" "No effect,Reset"
|
|
bitfld.long 0x00 7. " BRR7 ,Port B Pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port B Pin 6 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 5. " BRR5 ,Port B Pin 5 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port B Pin 4 reset" "No effect,Reset"
|
|
bitfld.long 0x00 3. " BRR3 ,Port B Pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " BRR2 ,Port B Pin 2 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BRR1 ,Port B Pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port B Pin 0 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L0??T*")
|
|
bitfld.long 0x00 11. " BRR11 ,Port B Pin 11 reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " BRR10 ,Port B Pin 10 reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " BRR8 ,Port B Pin 8 reset" "No effect,Reset"
|
|
bitfld.long 0x00 7. " BRR7 ,Port B Pin 7 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BRR6 ,Port B Pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port B Pin 5 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port B Pin 4 reset" "No effect,Reset"
|
|
bitfld.long 0x00 3. " BRR3 ,Port B Pin 3 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 2. " BRR2 ,Port B Pin 2 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port B Pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port B Pin 0 reset" "No effect,Reset"
|
|
else
|
|
bitfld.long 0x00 15. " BRR15 ,Port B Pin 15 reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " BRR14 ,Port B Pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port B Pin 13 reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " BRR12 ,Port B Pin 12 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BRR11 ,Port B Pin 11 reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " BRR10 ,Port B Pin 10 reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " BRR9 ,Port B Pin 9 reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " BRR8 ,Port B Pin 8 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BRR7 ,Port B Pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port B Pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port B Pin 5 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port B Pin 4 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BRR3 ,Port B Pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " BRR2 ,Port B Pin 2 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port B Pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port B Pin 0 reset" "No effect,Reset"
|
|
endif
|
|
width 0x0B
|
|
elif CPUIS("STM32L0?2*")
|
|
width 15.
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "GPIOB_MODER,GPIO_B port mode register"
|
|
sif CPUIS("STM32L072K*")||CPUIS("STM32L082K*")
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port B Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port B Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port B Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port B Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port B Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port B Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port B Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L0??K*")
|
|
bitfld.long 0x00 16.--17. " MODE8 ,Port B Pin 8 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port B Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port B Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port B Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port B Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port B Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port B Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port B Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port B Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L0??T*")
|
|
bitfld.long 0x00 22.--23. " MODE11 ,Port B Pin 11 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 20.--21. " MODE10 ,Port B Pin 10 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 16.--17. " MODE8 ,Port B Pin 8 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port B Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port B Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port B Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port B Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port B Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port B Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port B Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port B Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
else
|
|
bitfld.long 0x00 30.--31. " MODE15 ,Port B Pin 15 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port B Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port B Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 24.--25. " MODE12 ,Port B Pin 12 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " MODE11 ,Port B Pin 11 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 20.--21. " MODE10 ,Port B Pin 10 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port B Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 16.--17. " MODE8 ,Port B Pin 8 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port B Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port B Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port B Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port B Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port B Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port B Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port B Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port B Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
endif
|
|
line.long 0x04 "GPIOB_OTYPER,GPIO_B port output type register"
|
|
sif CPUIS("STM32L072K*")||CPUIS("STM32L082K*")
|
|
bitfld.long 0x04 7. " OT7 ,Port B Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port B Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port B Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port B Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 3. " OT3 ,Port B Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port B Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port B Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L0??K*")
|
|
bitfld.long 0x04 8. " OT8 ,Port B Pin 8 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 7. " OT7 ,Port B Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port B Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port B Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 4. " OT4 ,Port B Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 3. " OT3 ,Port B Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 2. " OT2 ,Port B Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port B Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 0. " OT0 ,Port B Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L0??T*")
|
|
bitfld.long 0x04 11. " OT11 ,Port B Pin 11 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 10. " OT10 ,Port B Pin 10 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 8. " OT8 ,Port B Pin 8 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 7. " OT7 ,Port B Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 6. " OT6 ,Port B Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port B Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port B Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 3. " OT3 ,Port B Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 2. " OT2 ,Port B Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port B Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port B Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
else
|
|
bitfld.long 0x04 15. " OT15 ,Port B Pin 15 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 14. " OT14 ,Port B Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port B Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 12. " OT12 ,Port B Pin 12 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 11. " OT11 ,Port B Pin 11 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 10. " OT10 ,Port B Pin 10 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 9. " OT9 ,Port B Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 8. " OT8 ,Port B Pin 8 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 7. " OT7 ,Port B Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port B Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port B Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port B Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 3. " OT3 ,Port B Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 2. " OT2 ,Port B Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port B Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port B Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
endif
|
|
line.long 0x08 "GPIOB_OSPEEDR,GPIO_B port output speed register"
|
|
sif CPUIS("STM32L072K*")||CPUIS("STM32L082K*")
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port B Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port B Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port B Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port B Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port B Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port B Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port B Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L0??K*")
|
|
bitfld.long 0x08 16.--17. " OSPEED8 ,Port B Pin 8 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port B Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port B Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port B Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port B Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port B Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port B Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port B Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port B Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L0??T*")
|
|
bitfld.long 0x08 22.--23. " OSPEED11 ,Port B Pin 11 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 20.--21. " OSPEED10 ,Port B Pin 10 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 16.--17. " OSPEED8 ,Port B Pin 8 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port B Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port B Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port B Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port B Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port B Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port B Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port B Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port B Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
else
|
|
bitfld.long 0x08 30.--31. " OSPEED15 ,Port B Pin 15 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port B Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port B Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 24.--25. " OSPEED12 ,Port B Pin 12 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " OSPEED11 ,Port B Pin 11 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 20.--21. " OSPEED10 ,Port B Pin 10 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port B Pin 9 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 16.--17. " OSPEED8 ,Port B Pin 8 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port B Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port B Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port B Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port B Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port B Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port B Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port B Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port B Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
endif
|
|
line.long 0x0C "GPIOB_PUPDR,GPIO_B port pull-up/pull-down register"
|
|
sif CPUIS("STM32L072K*")||CPUIS("STM32L082K*")
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port B Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port B Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port B Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port B Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port B Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port B Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port B Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L0??K*")
|
|
bitfld.long 0x0C 16.--17. " PUPD8 ,Port B Pin 8 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port B Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port B Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port B Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port B Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port B Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port B Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port B Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port B Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L0??T*")
|
|
bitfld.long 0x0C 22.--23. " PUPD11 ,Port B Pin 11 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 20.--21. " PUPD10 ,Port B Pin 10 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 16.--17. " PUPD8 ,Port B Pin 8 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port B Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port B Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port B Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port B Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port B Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port B Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port B Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port B Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
else
|
|
bitfld.long 0x0C 30.--31. " PUPD15 ,Port B Pin 15 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port B Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port B Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 24.--25. " PUPD12 ,Port B Pin 12 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 22.--23. " PUPD11 ,Port B Pin 11 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 20.--21. " PUPD10 ,Port B Pin 10 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port B Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 16.--17. " PUPD8 ,Port B Pin 8 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port B Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port B Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port B Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port B Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port B Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port B Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port B Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port B Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOB_IDR,GPIO_B port input data register"
|
|
sif CPUIS("STM32L072K*")||CPUIS("STM32L082K*")
|
|
bitfld.long 0x00 7. " ID7 ,Port B Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port B Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port B Pin 5 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port B Pin 4 input data" "0,1"
|
|
bitfld.long 0x00 3. " ID3 ,Port B Pin 3 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ID1 ,Port B Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port B Pin 0 input data" "0,1"
|
|
elif CPUIS("STM32L0??K*")
|
|
bitfld.long 0x00 8. " ID8 ,Port B Pin 8 input data" "0,1"
|
|
bitfld.long 0x00 7. " ID7 ,Port B Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port B Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port B Pin 5 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ID4 ,Port B Pin 4 input data" "0,1"
|
|
bitfld.long 0x00 3. " ID3 ,Port B Pin 3 input data" "0,1"
|
|
bitfld.long 0x00 2. " ID2 ,Port B Pin 2 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port B Pin 1 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ID0 ,Port B Pin 0 input data" "0,1"
|
|
elif CPUIS("STM32L0??T*")
|
|
bitfld.long 0x00 11. " ID11 ,Port B Pin 11 input data" "0,1"
|
|
bitfld.long 0x00 10. " ID10 ,Port B Pin 10 input data" "0,1"
|
|
bitfld.long 0x00 8. " ID8 ,Port B Pin 8 input data" "0,1"
|
|
bitfld.long 0x00 7. " ID7 ,Port B Pin 7 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ID6 ,Port B Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port B Pin 5 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port B Pin 4 input data" "0,1"
|
|
bitfld.long 0x00 3. " ID3 ,Port B Pin 3 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ID2 ,Port B Pin 2 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port B Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port B Pin 0 input data" "0,1"
|
|
else
|
|
bitfld.long 0x00 15. " ID15 ,Port B Pin 15 input data" "0,1"
|
|
bitfld.long 0x00 14. " ID14 ,Port B Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port B Pin 13 input data" "0,1"
|
|
bitfld.long 0x00 12. " ID12 ,Port B Pin 12 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ID11 ,Port B Pin 11 input data" "0,1"
|
|
bitfld.long 0x00 10. " ID10 ,Port B Pin 10 input data" "0,1"
|
|
bitfld.long 0x00 9. " ID9 ,Port B Pin 9 input data" "0,1"
|
|
bitfld.long 0x00 8. " ID8 ,Port B Pin 8 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ID7 ,Port B Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port B Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port B Pin 5 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port B Pin 4 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ID3 ,Port B Pin 3 input data" "0,1"
|
|
bitfld.long 0x00 2. " ID2 ,Port B Pin 2 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port B Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port B Pin 0 input data" "0,1"
|
|
endif
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOB_ODR,GPIO_B port output bit set/reset register"
|
|
sif CPUIS("STM32L072K*")||CPUIS("STM32L082K*")
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port B pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port B pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr , Port B pin 5 output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr , Port B pin 4 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port B pin 3 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port B pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port B pin 0 output data" "Low,High"
|
|
elif CPUIS("STM32L0??K*")
|
|
setclrfld.long 0x00 8. 0x04 8. 0x04 24. " ODR8_set/clr , Port B pin 8 output data" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port B pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port B pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr , Port B pin 5 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr , Port B pin 4 output data" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port B pin 3 output data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr , Port B pin 2 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port B pin 1 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port B pin 0 output data" "Low,High"
|
|
elif CPUIS("STM32L0??T*")
|
|
setclrfld.long 0x00 11. 0x04 11. 0x04 27. " ODR11_set/clr , Port B pin 11 output data" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x04 26. " ODR10_set/clr , Port B pin 10 output data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x04 24. " ODR8_set/clr , Port B pin 8 output data" "Low,High"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port B pin 7 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port B pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr , Port B pin 5 output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr , Port B pin 4 output data" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port B pin 3 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr , Port B pin 2 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port B pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port B pin 0 output data" "Low,High"
|
|
else
|
|
setclrfld.long 0x00 15. 0x04 15. 0x04 31. " ODR15_set/clr , Port B pin 15 output data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr , Port B pin 14 output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr , Port B pin 13 output data" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x04 28. " ODR12_set/clr , Port B pin 12 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x04 27. " ODR11_set/clr , Port B pin 11 output data" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x04 26. " ODR10_set/clr , Port B pin 10 output data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr , Port B pin 9 output data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x04 24. " ODR8_set/clr , Port B pin 8 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port B pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port B pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr , Port B pin 5 output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr , Port B pin 4 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port B pin 3 output data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr , Port B pin 2 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port B pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port B pin 0 output data" "Low,High"
|
|
endif
|
|
if ((per.l(ad:0x50000400+0x1C))&0x10000)==0x00
|
|
// GPIOB_LCKR.LCKK = 0 [Not active]
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOB_LCKR,GPIO_B port configuration lock register"
|
|
sif CPUIS("STM32L072K*")||CPUIS("STM32L082K*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??K*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 8. " LCK8 ,Port B Pin 8 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 2. " LCK2 ,Port B Pin 2 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??T*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LCK11 ,Port B Pin 11 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 10. " LCK10 ,Port B Pin 10 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 8. " LCK8 ,Port B Pin 8 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LCK2 ,Port B Pin 2 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
else
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LCK15 ,Port B Pin 15 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 14. " LCK14 ,Port B Pin 14 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port B Pin 13 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 12. " LCK12 ,Port B Pin 12 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LCK11 ,Port B Pin 11 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 10. " LCK10 ,Port B Pin 10 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 9. " LCK9 ,Port B Pin 9 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 8. " LCK8 ,Port B Pin 8 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 2. " LCK2 ,Port B Pin 2 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
endif
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOB_LCKR,GPIO_B port configuration lock register"
|
|
sif CPUIS("STM32L072K*")||CPUIS("STM32L082K*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??K*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 8. " LCK8 ,Port B Pin 8 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 2. " LCK2 ,Port B Pin 2 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??T*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " LCK11 ,Port B Pin 11 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 10. " LCK10 ,Port B Pin 10 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 8. " LCK8 ,Port B Pin 8 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 2. " LCK2 ,Port B Pin 2 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
else
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " LCK15 ,Port B Pin 15 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 14. " LCK14 ,Port B Pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port B Pin 13 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 12. " LCK12 ,Port B Pin 12 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " LCK11 ,Port B Pin 11 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 10. " LCK10 ,Port B Pin 10 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 9. " LCK9 ,Port B Pin 9 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 8. " LCK8 ,Port B Pin 8 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 2. " LCK2 ,Port B Pin 2 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
endif
|
|
endif
|
|
textline " "
|
|
sif CPUIS("STM32L05*")
|
|
sif CPUIS("STM32L0??K*")
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART1_RX,I2C1_SDA,LPTIM1_IN2,TSC_G5_IO4,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART1_TX,I2C1_SCL,LPTIM1_ETR,TSC_G5_IO3,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM22_CH2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,,EVENTOUT,TSC_G5_IO2,TIM22_CH1,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,TSC_G5I_O1,EVENTOUT,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port B Pin 2 alternate function configuration" ",,LPTIM1_OUT,TSC_G3_IO4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" ",,,TSC_G3_IO3,LPUART_RTS_DE,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,,,TSC_G3_IO2,?..."
|
|
line.long 0x04 "GPIOB_AFRH,GPIO_B alternate function high register"
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port B Pin 8 alternate function configuration" ",,,TSC_SYNC,I2C1_SCL,?..."
|
|
elif CPUIS("STM32L0??T*")
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART1_RX,I2C1_SDA,LPTIM1_IN2,TSC_G5_IO4,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART1_TX,I2C1_SCL,LPTIM1_ETR,TSC_G5_IO3,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM22_CH2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,,EVENTOUT,TSC_G5_IO2,TIM22_CH1,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,TSC_G5I_O1,EVENTOUT,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port B Pin 2 alternate function configuration" ",,LPTIM1_OUT,TSC_G3_IO4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" ",,,TSC_G3_IO3,LPUART_RTS_DE,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,,,TSC_G3_IO2,?..."
|
|
line.long 0x04 "GPIOB_AFRH,GPIO_B alternate function high register"
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port B Pin 11 alternate function configuration" "EVENTOUT,,TIM2_CH4,TSC_G6_IO1,LPUART1_RX,,I2C2_SDA,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port B Pin 10 alternate function configuration" ",,TIM2_CH3,TSC_SYNC,LPUART1_TX,SPI2_SCK,I2C2_SCL,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port B Pin 8 alternate function configuration" ",,,TSC_SYNC,I2C1_SCL,?..."
|
|
else
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART1_RX,I2C1_SDA,LPTIM1_IN2,TSC_G5_IO4,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART1_TX,I2C1_SCL,LPTIM1_ETR,TSC_G5_IO3,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM22_CH2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,,EVENTOUT,TSC_G5_IO2,TIM22_CH1,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,TSC_G5I_O1,EVENTOUT,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port B Pin 2 alternate function configuration" ",,LPTIM1_OUT,TSC_G3_IO4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" ",,,TSC_G3_IO3,LPUART_RTS_DE,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,,,TSC_G3_IO2,?..."
|
|
line.long 0x04 "GPIOB_AFRH,GPIO_B alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port B Pin 15 alternate function configuration" "SPI2_MOSI/I2S2_SD,,RTC_REFIN,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port B Pin 14 alternate function configuration" "SPI2_MISO/I2S2_MCK,,RTC_OUT,TSC_G6_IO4,LPUART1_RTS_DE,I2C2_SDA,TIM21_CH2,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port B Pin 13 alternate function configuration" "SPI2_SCK/I2S2_CK,,,TSC_G6_IO3,LPUART1_CTS,I2C2_SCL,TIM21_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port B Pin 12 alternate function configuration" "SPI2_NSS/I2S2_WS,,LPUART1_RTS_DE,TSC_G6_IO2,,I2C2_SMBA,EVENTOUT,?..."
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port B Pin 11 alternate function configuration" "EVENTOUT,,TIM2_CH4,TSC_G6_IO1,LPUART1_RX,,I2C2_SDA,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port B Pin 10 alternate function configuration" ",,TIM2_CH3,TSC_SYNC,LPUART1_TX,SPI2_SCK,I2C2_SCL,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port B Pin 9 alternate function configuration" ",,EVENTOUT,,I2C1_SDA,SPI2_NSS/I2S2_WS,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port B Pin 8 alternate function configuration" ",,,TSC_SYNC,I2C1_SCL,?..."
|
|
endif
|
|
elif CPUIS("STM32L07*")||CPUIS("STM32L08*")
|
|
sif CPUIS("STM32L072K*")||CPUIS("STM32L082K*")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART1_RX,I2C1_SDA,LPTIM1_IN2,TSC_G5_IO4,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART1_TX,I2C1_SCL,LPTIM1_ETR,TSC_G5_IO3,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM3_CH2/TIM22_CH2,USART1_CK,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,,TIM3_CH1,TSC_G5_IO2,TIM22_CH1,USART1_CTS,,I2C3_SDA,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,TSC_G5I_O1,EVENTOUT,USART1_RTS_DE,,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" ",,TIM3_CH4,TSC_G3_IO3,LPUART1_RTS_DE,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,,TIM3_CH3,TSC_G3_IO2,?..."
|
|
else
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART1_RX,I2C1_SDA,LPTIM1_IN2,TSC_G5_IO4,,,USART4_CTS,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART1_TX,I2C1_SCL,LPTIM1_ETR,TSC_G5_IO3,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM3_CH2/TIM22_CH2,USART1_CK,USART5_CK/USART5_RTS_DE,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,,TIM3_CH1,TSC_G5_IO2,TIM22_CH1,USART1_CTS,USART5_RX,I2C3_SDA,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,TSC_G5_IO1,EVENTOUT,USART1_RTS_DE,USART5_TX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port B Pin 2 alternate function configuration" ",,LPTIM1_OUT,TSC_G3_IO4,,,,I2C3_SMBA,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" ",,TIM3_CH4,TSC_G3_IO3,LPUART1_RTS_DE,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,,TIM3_CH3,TSC_G3_IO2,?..."
|
|
line.long 0x04 "GPIOB_AFRH,GPIO_B alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port B Pin 15 alternate function configuration" "SPI2_MOSI/I2S2_SD,,RTC_REFIN,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port B Pin 14 alternate function configuration" "SPI2_MISO/I2S2_MCK,,RTC_OUT,TSC_G6_IO4,LPUART1_RTS_DE,I2C2_SDA,TIM21_CH2,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port B Pin 13 alternate function configuration" "SPI2_SCK/I2S2_CK,,MCO,TSC_G6_IO3,LPUART1_CTS,I2C2_SCL,TIM21_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port B Pin 12 alternate function configuration" "SPI2_NSS/I2S2_WS,,LPUART1_RTS_DE,TSC_G6_IO2,,I2C2_SMBA,EVENTOUT,?..."
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port B Pin 11 alternate function configuration" "EVENTOUT,,TIM2_CH4,TSC_G6_IO1,LPUART1_RX,,I2C2_SDA,LPUART1_TX,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port B Pin 10 alternate function configuration" ",,TIM2_CH3,TSC_SYNC,LPUART1_TX,SPI2_SCK,I2C2_SCL,LPUART1_RX,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port B Pin 9 alternate function configuration" ",,EVENTOUT,,I2C1_SDA,SPI2_NSS/I2S2_WS,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port B Pin 8 alternate function configuration" ",,,TSC_SYNC,I2C1_SCL,?..."
|
|
endif
|
|
else
|
|
sif CPUIS("STM32L0??K*")
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART1_RX,I2C1_SDA,LPTIM1_IN2,TSC_G5_IO4,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART1_TX,I2C1_SCL,LPTIM1_ETR,TSC_G5_IO3,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM22_CH2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,,EVENTOUT,TSC_G5_IO2,TIM22_CH1,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,TSC_G5I_O1,EVENTOUT,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port B Pin 2 alternate function configuration" ",,LPTIM1_OUT,TSC_G3_IO4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" ",,,TSC_G3_IO3,LPUART1_RTS_DE,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,,,TSC_G3_IO2,?..."
|
|
line.long 0x04 "GPIOB_AFRH,GPIO_B alternate function high register"
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port B Pin 8 alternate function configuration" ",,,TSC_SYNC,I2C1_SCL,?..."
|
|
else
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART1_RX,I2C1_SDA,LPTIM1_IN2,TSC_G5_IO4,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART1_TX,I2C1_SCL,LPTIM1_ETR,TSC_G5_IO3,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,,LPTIM1_IN1,I2C1_SMBA,TIM22_CH2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,,EVENTOUT,TSC_G5_IO2,TIM22_CH1,?..."
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,,TIM2_CH2,TSC_G5I_O1,EVENTOUT,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port B Pin 2 alternate function configuration" ",,LPTIM1_OUT,TSC_G3_IO4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" ",,,TSC_G3_IO3,LPUART1_RTS_DE,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,,,TSC_G3_IO2,?..."
|
|
line.long 0x04 "GPIOB_AFRH,GPIO_B alternate function high register"
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port B Pin 11 alternate function configuration" "EVENTOUT,,TIM2_CH4,,LPUART1_RX,,I2C2_SDA,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port B Pin 10 alternate function configuration" ",,TIM2_CH3,TSC_SYNC,LPUART1_TX,,I2C2_SCL,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port B Pin 8 alternate function configuration" ",,,TSC_SYNC,I2C1_SCL,?..."
|
|
endif
|
|
endif
|
|
textline " "
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "GPIOB_BRR,GPIO_B port bit reset register"
|
|
sif CPUIS("STM32L0??K*")
|
|
bitfld.long 0x00 8. " BRR8 ,Port B Pin 8 reset" "No effect,Reset"
|
|
bitfld.long 0x00 7. " BRR7 ,Port B Pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port B Pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port B Pin 5 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BRR4 ,Port B Pin 4 reset" "No effect,Reset"
|
|
bitfld.long 0x00 3. " BRR3 ,Port B Pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " BRR2 ,Port B Pin 2 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port B Pin 1 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BRR0 ,Port B Pin 0 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L0??T*")
|
|
bitfld.long 0x00 11. " BRR11 ,Port B Pin 11 reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " BRR10 ,Port B Pin 10 reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " BRR8 ,Port B Pin 8 reset" "No effect,Reset"
|
|
bitfld.long 0x00 7. " BRR7 ,Port B Pin 7 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BRR6 ,Port B Pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port B Pin 5 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port B Pin 4 reset" "No effect,Reset"
|
|
bitfld.long 0x00 3. " BRR3 ,Port B Pin 3 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 2. " BRR2 ,Port B Pin 2 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port B Pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port B Pin 0 reset" "No effect,Reset"
|
|
else
|
|
bitfld.long 0x00 15. " BRR15 ,Port B Pin 15 reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " BRR14 ,Port B Pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port B Pin 13 reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " BRR12 ,Port B Pin 12 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BRR11 ,Port B Pin 11 reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " BRR10 ,Port B Pin 10 reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " BRR9 ,Port B Pin 9 reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " BRR8 ,Port B Pin 8 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BRR7 ,Port B Pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port B Pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port B Pin 5 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port B Pin 4 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BRR3 ,Port B Pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " BRR2 ,Port B Pin 2 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port B Pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port B Pin 0 reset" "No effect,Reset"
|
|
endif
|
|
width 0x0B
|
|
elif CPUIS("STM32L0?3*")
|
|
width 15.
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "GPIOB_MODER,GPIO_B port mode register"
|
|
bitfld.long 0x00 30.--31. " MODE15 ,Port 15 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port B Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port B Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 24.--25. " MODE12 ,Port B Pin 12 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " MODE11 ,Port B Pin 11 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 20.--21. " MODE10 ,Port B Pin 10 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port B Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 16.--17. " MODE8 ,Port B Pin 8 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port B Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port B Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port B Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port B Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port B Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port B Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port B Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port B Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
line.long 0x04 "GPIOB_OTYPER,GPIO_B port output type register"
|
|
bitfld.long 0x04 15. " OT15 ,Port B Pin 15 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 14. " OT14 ,Port B Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port B Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 12. " OT12 ,Port B Pin 12 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 11. " OT11 ,Port B Pin 11 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 10. " OT10 ,Port B Pin 10 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 9. " OT9 ,Port B Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 8. " OT8 ,Port B Pin 8 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 7. " OT7 ,Port B Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port B Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port B Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port B Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 3. " OT3 ,Port B Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 2. " OT2 ,Port B Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port B Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port B Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
line.long 0x08 "GPIOB_OSPEEDR,GPIO_B port output speed register"
|
|
bitfld.long 0x08 30.--31. " OSPEED15 ,Port B Pin 15 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port B Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port B Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 24.--25. " OSPEED12 ,Port B Pin 12 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " OSPEED11 ,Port B Pin 11 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 20.--21. " OSPEED10 ,Port B Pin 10 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port B Pin 9 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 16.--17. " OSPEED8 ,Port B Pin 8 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port B Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port B Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port B Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port B Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port B Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port B Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port B Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port B Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
line.long 0x0C "GPIOB_PUPDR,GPIO_B port pull-up/pull-down register"
|
|
bitfld.long 0x0C 30.--31. " PUPD15 ,Port B Pin 15 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port B Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port B Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 24.--25. " PUPD12 ,Port B Pin 12 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 22.--23. " PUPD11 ,Port B Pin 11 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 20.--21. " PUPD10 ,Port B Pin 10 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port B Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 16.--17. " PUPD8 ,Port B Pin 8 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port B Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port B Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port B Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port B Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port B Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port B Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port B Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port B Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOB_IDR,GPIO_B port input data register"
|
|
bitfld.long 0x00 15. " ID15 ,Port B Pin 15 input data bit" "0,1"
|
|
bitfld.long 0x00 14. " ID14 ,Port B Pin 14 input data bit" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port B Pin 13 input data bit" "0,1"
|
|
bitfld.long 0x00 12. " ID12 ,Port B Pin 12 input data bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ID11 ,Port B Pin 11 input data bit" "0,1"
|
|
bitfld.long 0x00 10. " ID10 ,Port B Pin 10 input data bit" "0,1"
|
|
bitfld.long 0x00 9. " ID9 ,Port B Pin 9 input data bit" "0,1"
|
|
bitfld.long 0x00 8. " ID8 ,Port B Pin 8 input data bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ID7 ,Port B Pin 7 input data bit" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port B Pin 6 input data bit" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port B Pin 5 input data bit" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port B Pin 4 input data bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ID3 ,Port B Pin 3 input data bit" "0,1"
|
|
bitfld.long 0x00 2. " ID2 ,Port B Pin 2 input data bit" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port B Pin 1 input data bit" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port B Pin 0 input data bit" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOB_ODR,GPIO_B port output bit set/reset register"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x04 31. " ODR15_set/clr , Port B pin 15 output data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr , Port B pin 14 output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr , Port B pin 13 output data" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x04 28. " ODR12_set/clr , Port B pin 12 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x04 27. " ODR11_set/clr , Port B pin 11 output data" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x04 26. " ODR10_set/clr , Port B pin 10 output data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr , Port B pin 9 output data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x04 24. " ODR8_set/clr , Port B pin 8 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port B pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port B pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr , Port B pin 5 output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr , Port B pin 4 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port B pin 3 output data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr , Port B pin 2 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port B pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port B pin 0 output data" "Low,High"
|
|
if ((per.l(ad:0x50000400+0x1C))&0x10000)==0x00
|
|
// GPIOB_LCKR.LCKK = 0 [Not active]
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOB_LCKR,GPIO_B port configuration lock register"
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LCK15 ,Port B Pin 15 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 14. " LCK14 ,Port B Pin 14 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port B Pin 13 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 12. " LCK12 ,Port B Pin 12 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LCK11 ,Port B Pin 11 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 10. " LCK10 ,Port B Pin 10 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 9. " LCK9 ,Port B Pin 9 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 8. " LCK8 ,Port B Pin 8 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 2. " LCK2 ,Port B Pin 2 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOB_LCKR,GPIO_B port configuration lock register"
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " LCK15 ,Port B Pin 15 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 14. " LCK14 ,Port B Pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port B Pin 13 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 12. " LCK12 ,Port B Pin 12 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " LCK11 ,Port B Pin 11 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 10. " LCK10 ,Port B Pin 10 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 9. " LCK9 ,Port B Pin 9 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 8. " LCK8 ,Port B Pin 8 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " LCK7 ,Port B Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port B Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port B Pin 5 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port B Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 3. " LCK3 ,Port B Pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 2. " LCK2 ,Port B Pin 2 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port B Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port B Pin 0 lock" "Not locked,Locked"
|
|
endif
|
|
textline " "
|
|
group.long 0x20++0x07
|
|
sif ((cpuis("STM32L07*"))||(cpuis("STM32L08*")))
|
|
line.long 0x00 "GPIOB_AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B pin 7 altarnate function configuration" "USART1_RX,I2C1_SDA,LPTIM1_IN2,TSC_G5_IO4,,,USART4_CTS,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B pin 6 altarnate function configuration" "USART1_TX,I2C1_SCL,LPTIM1_ETR,TSC_G5_IO3,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B pin 5 altarnate function configuration" "SPI1_MOSI,LCD_SEG9,LPTIM1_IN1,I2C1_SMBA,TIM3_CH2/TIM22_CH2,USART1_CK,USART5_CK/USART5_RTS_DE,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B pin 4 altarnate function configuration" "SPI1_MISO,LCD_SEG8,TIM3_CH1,TSC_G5_IO2,TIM22_CH1,USART1_CTS,USART5_RX,I2C3_SDA,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B pin 3 altarnate function configuration" "SPI1_SCK,LCD_SEG7,TIM2_CH2,TSC_G5_IO1,EVENTOUT,USART1_RTS_DE,USART5_TX,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port B pin 2 altarnate function configuration" ",,LPTIM1_OUT,TSC_G3_IO4,,,,I2C3_SMBA,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B pin 1 altarnate function configuration" ",LCD_SEG6,TIM3_CH4,TSC_G3_IO3,LPUART1_RTS_DE,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B pin 0 altarnate function configuration" "EVENTOUT,LCD_SEG5,TIM3_CH3,TSC_G3_IO2,?..."
|
|
line.long 0x04 "GPIOB_AFRH,GPIO_B alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port B pin 15 altarnate function configuration" "SPI2_MOSI/I2S2_SD,LCD_SEG15,RTC_REFIN,,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port B pin 14 altarnate function configuration" "SPI2_MISO/I2S2_MCK,LCD_SEG14,RTC_OUT,TSC_G6_IO4,LPUART1_RTS_DE,I2C2_SDA,TIM21_CH2,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port B pin 13 altarnate function configuration" "SPI2_SCK/I2S2_CK,LCD_SEG13,MCO,TSC_G6_IO3,LPUART1_CTS,I2C2_SCL,TIM21_CH1,?..."
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port B pin 12 altarnate function configuration" "SPI2_NSS/I2S2_WS,LCD_SEG12,LPUART1_RTS_DE,TSC_G6_IO2,,I2C2_SMBA,EVENTOUT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port B pin 11 altarnate function configuration" "EVENTOUT,LCD_SEG11,TIM2_CH4,TSC_G6_IO1,LPUART1_RX,,I2C2_SDA,LPUART1_TX,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port B pin 10 altarnate function configuration" ",LCD_SEG10,TIM2_CH3,TSC_SYNC,LPUART1_TX,SPI2_SCK,I2C2_SCL,LPUART1_RX,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port B pin 9 altarnate function configuration" ",LCD_COM3,EVENTOUT,,I2C1_SDA,SPI2_NSS/I2S2_WS,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port B pin 8 altarnate function configuration" ",LCD_SEG16,,TSC_SYNC,I2C1_SCL,?..."
|
|
else
|
|
line.long 0x00 "AFRL,GPIO_B alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port B Pin 7 alternate function configuration" "USART1_RX,I2C1_SDA,LPTIM1_IN2,TSC_G5_IO4,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port B Pin 6 alternate function configuration" "USART1_TX,I2C1_SCL,LPTIM1_ETR,TSC_G5_IO3,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port B Pin 5 alternate function configuration" "SPI1_MOSI,LCD_SEG9,LPTIM1_IN1,I2C1_SMBA,TIM22_CH1,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port B Pin 4 alternate function configuration" "SPI1_MISO,LCD_SEG8,EVENTOUT,TSC_G5_IO2,TIM22_CH1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port B Pin 3 alternate function configuration" "SPI1_SCK,LCD_SEG7,TIM2_CH2,TSC_G5I_O1,EVENTOUT,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port B Pin 2 alternate function configuration" ",,LPTIM1_OUT,TSC_G3_IO4,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port B Pin 1 alternate function configuration" ",LCD_SEG6,,TSC_G3_IO3,LPUART_RTS,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port B Pin 0 alternate function configuration" "EVENTOUT,LCD_SEG5,,TSC_G3_IO2,?..."
|
|
line.long 0x04 "AFRH,GPIO_B alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port B Pin 15 alternate function configuration" "SPI2_MOSI/I2S2_SD,LCD_SEG15,RTC_REFIN,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port B Pin 14 alternate function configuration" "SPI2_MISO/I2S2_MCK,LCD_SEG14,RTC_OUT,TSC_G6_IO4,LPUART_RTS,I2C2_SDA,TIM21_CH2,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port B Pin 13 alternate function configuration" "SPI2_SCK/I2S2_CK,LCD_SEG13,,TSC_G6_IO3,LPUART_CTS,I2C2_SCL,TIM21_CH1,?..."
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port B Pin 12 alternate function configuration" "SPI2_NSS/I2S2_WS,LCD_SEG12,LPUART_RTS,TSC_G6_IO2,,I2C2_SMBA,EVENTOUT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port B Pin 11 alternate function configuration" "EVENTOUT,LCD_SEG11,TIM2_CH4,TSC_G6_IO1,LPUART_RX,,I2C2_SDA,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port B Pin 10 alternate function configuration" ",LCD_SEG10,TIM2_CH3,TSC_SYNC,LPUART_TX,SPI2_SCK,I2C2_SCL,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port B Pin 9 alternate function configuration" ",LCD_COM3,EVENTOUT,,I2C1_SDA,SPI2_NSS/I2S2_WS,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port B Pin 8 alternate function configuration" ",LCD_SEG16,,TSC_SYNC,I2C1_SCL,?..."
|
|
endif
|
|
textline " "
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "GPIOB_BRR,GPIO_B port bit reset register"
|
|
bitfld.long 0x00 15. " BRR15 ,Port B Pin 15 reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " BRR14 ,Port B Pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port B Pin 13 reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " BRR12 ,Port B Pin 12 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BRR11 ,Port B Pin 11 reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " BRR10 ,Port B Pin 10 reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " BRR9 ,Port B Pin 9 reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " BRR8 ,Port B Pin 8 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BRR7 ,Port B Pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port B Pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port B Pin 5 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port B Pin 4 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BRR3 ,Port B Pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " BRR2 ,Port B Pin 2 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port B Pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port B Pin 0 reset" "No effect,Reset"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
sif CPUIS("STM32L0?1*")
|
|
tree "GPIO C"
|
|
base ad:0x50000800
|
|
width 15.
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "GPIOC_MODER,GPIO_C port mode register"
|
|
sif CPUIS("STM32L0??R*")||CPUIS("STM32L0??V*")
|
|
bitfld.long 0x00 30.--31. " MODE15 ,Port C Pin 15 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port C Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port C Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 24.--25. " MODE12 ,Port C Pin 12 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " MODE11 ,Port C Pin 11 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 20.--21. " MODE10 ,Port C Pin 10 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port C Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 16.--17. " MODE8 ,Port C Pin 8 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port C Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port C Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port C Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port C Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port C Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port C Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port C Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port C Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L031C*")||CPUIS("STM32L041C*")
|
|
bitfld.long 0x00 30.--31. " MODE15 ,Port C Pin 15 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port C Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port C Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port C Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L051C*")||CPUIS("STM32L071C8*")||CPUIS("STM32L081C*")
|
|
bitfld.long 0x00 30.--31. " MODE15 ,Port C Pin 15 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port C Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port C Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x00 30.--31. " MODE15 ,Port C Pin 15 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port C Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port C Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port C Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port C Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port C Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
else
|
|
bitfld.long 0x00 30.--31. " MODE15 ,Port C Pin 15 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port C Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
endif
|
|
line.long 0x04 "GPIOC_OTYPER,GPIO_C port output type register"
|
|
sif CPUIS("STM32L0??R*")||CPUIS("STM32L0??V*")
|
|
bitfld.long 0x04 15. " OT15 ,Port C Pin 15 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 14. " OT14 ,Port C Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port C Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 12. " OT12 ,Port C Pin 12 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 11. " OT11 ,Port C Pin 11 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 10. " OT10 ,Port C Pin 10 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 9. " OT9 ,Port C Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 8. " OT8 ,Port C Pin 8 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 7. " OT7 ,Port C Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port C Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port C Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port C Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 3. " OT3 ,Port C Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 2. " OT2 ,Port C Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port C Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port C Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L031C*")||CPUIS("STM32L041C*")
|
|
bitfld.long 0x04 15. " OT15 ,Port C Pin 15 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 14. " OT14 ,Port C Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port C Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port C Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L051C*")||CPUIS("STM32L071C8*")||CPUIS("STM32L081C*")
|
|
bitfld.long 0x04 15. " OT15 ,Port C Pin 15 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 14. " OT14 ,Port C Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port C Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x04 15. " OT15 ,Port C Pin 15 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 14. " OT14 ,Port C Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port C Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 2. " OT2 ,Port C Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 1. " OT1 ,Port C Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port C Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
else
|
|
bitfld.long 0x04 15. " OT15 ,Port C Pin 15 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 14. " OT14 ,Port C Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
endif
|
|
line.long 0x08 "GPIOC_OSPEEDR,GPIO_C port output speed register"
|
|
sif CPUIS("STM32L0??R*")||CPUIS("STM32L0??V*")
|
|
bitfld.long 0x08 30.--31. " OSPEED15 ,Port C Pin 15 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port C Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port C Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 24.--25. " OSPEED12 ,Port C Pin 12 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " OSPEED11 ,Port C Pin 11 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 20.--21. " OSPEED10 ,Port C Pin 10 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port C Pin 9 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 16.--17. " OSPEED8 ,Port C Pin 8 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port C Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port C Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port C Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port C Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port C Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port C Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port C Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port C Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L031C*")||CPUIS("STM32L041C*")
|
|
bitfld.long 0x08 30.--31. " OSPEED15 ,Port C Pin 15 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port C Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port C Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port C Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L051C*")||CPUIS("STM32L071C8*")||CPUIS("STM32L081C*")
|
|
bitfld.long 0x08 30.--31. " OSPEED15 ,Port C Pin 15 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port C Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port C Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x08 30.--31. " OSPEED15 ,Port C Pin 15 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port C Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port C Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port C Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port C Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port C Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
else
|
|
bitfld.long 0x08 30.--31. " OSPEED15 ,Port C Pin 15 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port C Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
endif
|
|
line.long 0x0C "GPIOC_PUPDR,GPIO_C port pull-up/pull-down register"
|
|
sif CPUIS("STM32L0??R*")||CPUIS("STM32L0??V*")
|
|
bitfld.long 0x0C 30.--31. " PUPD15 ,Port C Pin 15 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port C Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port C Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 24.--25. " PUPD12 ,Port C Pin 12 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 22.--23. " PUPD11 ,Port C Pin 11 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 20.--21. " PUPD10 ,Port C Pin 10 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port C Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 16.--17. " PUPD8 ,Port C Pin 8 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port C Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port C Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port C Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port C Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port C Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port C Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port C Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port C Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L031C*")||CPUIS("STM32L041C*")
|
|
bitfld.long 0x0C 30.--31. " PUPD15 ,Port C Pin 15 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port C Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port C Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port C Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L051C*")||CPUIS("STM32L071C8*")||CPUIS("STM32L081C*")
|
|
bitfld.long 0x0C 30.--31. " PUPD15 ,Port C Pin 15 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port C Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port C Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x0C 30.--31. " PUPD15 ,Port C Pin 15 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port C Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port C Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port C Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port C Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port C Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
else
|
|
bitfld.long 0x0C 30.--31. " PUPD15 ,Port C Pin 15 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port C Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOC_IDR,GPIO_C port input data register"
|
|
sif CPUIS("STM32L0??R*")||CPUIS("STM32L0??V*")
|
|
bitfld.long 0x00 15. " ID15 ,Port C Pin 15 input data" "0,1"
|
|
bitfld.long 0x00 14. " ID14 ,Port C Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port C Pin 13 input data" "0,1"
|
|
bitfld.long 0x00 12. " ID12 ,Port C Pin 12 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ID11 ,Port C Pin 11 input data" "0,1"
|
|
bitfld.long 0x00 10. " ID10 ,Port C Pin 10 input data" "0,1"
|
|
bitfld.long 0x00 9. " ID9 ,Port C Pin 9 input data" "0,1"
|
|
bitfld.long 0x00 8. " ID8 ,Port C Pin 8 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ID7 ,Port C Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port C Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port C Pin 5 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port C Pin 4 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ID3 ,Port C Pin 3 input data" "0,1"
|
|
bitfld.long 0x00 2. " ID2 ,Port C Pin 2 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port C Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port C Pin 0 input data" "0,1"
|
|
elif CPUIS("STM32L031C*")||CPUIS("STM32L041C*")
|
|
bitfld.long 0x00 15. " ID15 ,Port C Pin 15 input data" "0,1"
|
|
bitfld.long 0x00 14. " ID14 ,Port C Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port C Pin 13 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port C Pin 0 input data" "0,1"
|
|
elif CPUIS("STM32L051C*")||CPUIS("STM32L071C8*")||CPUIS("STM32L081C*")
|
|
bitfld.long 0x00 15. " ID15 ,Port C Pin 15 input data" "0,1"
|
|
bitfld.long 0x00 14. " ID14 ,Port C Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port C Pin 13 input data" "0,1"
|
|
elif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x00 15. " ID15 ,Port C Pin 15 input data" "0,1"
|
|
bitfld.long 0x00 14. " ID14 ,Port C Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port C Pin 13 input data" "0,1"
|
|
bitfld.long 0x00 2. " ID2 ,Port C Pin 2 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port C Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port C Pin 0 input data" "0,1"
|
|
else
|
|
bitfld.long 0x00 15. " ID15 ,Port C Pin 15 input data" "0,1"
|
|
bitfld.long 0x00 14. " ID14 ,Port C Pin 14 input data" "0,1"
|
|
endif
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOC_ODR,GPIO_C port output bit set/reset register"
|
|
sif CPUIS("STM32L0??R*")||CPUIS("STM32L0??V*")
|
|
setclrfld.long 0x00 15. 0x04 15. 0x04 31. " ODR15_set/clr , Port C pin 15 output data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr , Port C pin 14 output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr , Port C pin 13 output data" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x04 28. " ODR12_set/clr , Port C pin 12 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x04 27. " ODR11_set/clr , Port C pin 11 output data" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x04 26. " ODR10_set/clr , Port C pin 10 output data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr , Port C pin 9 output data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x04 24. " ODR8_set/clr , Port C pin 8 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port C pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port C pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr , Port C pin 5 output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr , Port C pin 4 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port C pin 3 output data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr , Port C pin 2 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port C pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port C pin 0 output data" "Low,High"
|
|
elif CPUIS("STM32L031C*")||CPUIS("STM32L041C*")
|
|
setclrfld.long 0x00 15. 0x04 15. 0x04 31. " ODR15_set/clr , Port C pin 15 output data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr , Port C pin 14 output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr , Port C pin 13 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port C pin 0 output data" "Low,High"
|
|
elif CPUIS("STM32L051C*")||CPUIS("STM32L071C8*")||CPUIS("STM32L081C*")
|
|
setclrfld.long 0x00 15. 0x04 15. 0x04 31. " ODR15_set/clr , Port C pin 15 output data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr , Port C pin 14 output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr , Port C pin 13 output data" "Low,High"
|
|
elif CPUIS("STM32L0??C*")
|
|
setclrfld.long 0x00 15. 0x04 15. 0x04 31. " ODR15_set/clr , Port C pin 15 output data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr , Port C pin 14 output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr , Port C pin 13 output data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr , Port C pin 2 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port C pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port C pin 0 output data" "Low,High"
|
|
else
|
|
setclrfld.long 0x00 15. 0x04 15. 0x04 31. " ODR15_set/clr , Port C pin 15 output data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr , Port C pin 14 output data" "Low,High"
|
|
endif
|
|
if ((per.l(ad:0x50000800+0x1C))&0x10000)==0x00
|
|
// GPIOC_LCKR.LCKK = 0 [Not active]
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOC_LCKR,GPIO_C port configuration lock register"
|
|
sif CPUIS("STM32L0??R*")||CPUIS("STM32L0??V*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port C Pin 13 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 12. " LCK12 ,Port C Pin 12 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LCK11 ,Port C Pin 11 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 10. " LCK10 ,Port C Pin 10 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 9. " LCK9 ,Port C Pin 9 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 8. " LCK8 ,Port C Pin 8 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LCK7 ,Port C Pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port C Pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port C Pin 5 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port C Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LCK3 ,Port C Pin 3 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 2. " LCK2 ,Port C Pin 2 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port C Pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port C Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L031C*")||CPUIS("STM32L041C*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port C Pin 13 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port C Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L051C*")||CPUIS("STM32L071C8*")||CPUIS("STM32L081C*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port C Pin 13 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port C Pin 13 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 2. " LCK2 ,Port C Pin 2 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LCK1 ,Port C Pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port C Pin 0 lock" "Not locked,Locked"
|
|
else
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
endif
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOC_LCKR,GPIO_C port configuration lock register"
|
|
sif CPUIS("STM32L0??R*")||CPUIS("STM32L0??V*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port C Pin 13 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 12. " LCK12 ,Port C Pin 12 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " LCK11 ,Port C Pin 11 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 10. " LCK10 ,Port C Pin 10 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 9. " LCK9 ,Port C Pin 9 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 8. " LCK8 ,Port C Pin 8 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " LCK7 ,Port C Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port C Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port C Pin 5 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port C Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 3. " LCK3 ,Port C Pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 2. " LCK2 ,Port C Pin 2 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port C Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port C Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L031C*")||CPUIS("STM32L041C*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port C Pin 13 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port C Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L051C*")||CPUIS("STM32L071C8*")||CPUIS("STM32L081C*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port C Pin 13 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port C Pin 13 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 2. " LCK2 ,Port C Pin 2 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " LCK1 ,Port C Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port C Pin 0 lock" "Not locked,Locked"
|
|
else
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
endif
|
|
endif
|
|
textline " "
|
|
sif CPUIS("STM32L031C*")||CPUIS("STM32L041C*")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "GPIOC_AFRL,GPIO_C alternate function low register"
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port C Pin 0 alternate function configuration" "LPTIM1_IN1,,EVENTOUT,,,,LPUART1_RX,?..."
|
|
elif CPUIS("STM32L051R*")
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOC_AFRL,GPIO_C alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port C Pin 7 alternate function configuration" "TIM22_CH2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port C Pin 6 alternate function configuration" "TIM22_CH1,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port C Pin 5 alternate function configuration" ",,LPUART_RX,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port C Pin 4 alternate function configuration" "EVENTOUT,,LPUART_TX,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port C Pin 3 alternate function configuration" "LPTIM1_ETR,,SPI2_MOSI/I2S2_SD,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port C Pin 2 alternate function configuration" "LPTIM1_IN2,,SPI2_MISO/I2S2_MCK,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port C Pin 1 alternate function configuration" "LPTIM1_OUT,,EVENTOUT,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port C Pin 0 alternate function configuration" "LPTIM1_IN1,,EVENTOUT,,,,LPUART1_RX,?..."
|
|
line.long 0x04 "GPIOC_AFRH,GPIO_C alternate function low register"
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port C Pin 11 alternate function configuration" "LPUART_RX,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port C Pin 10 alternate function configuration" "LPUART_TX,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port C Pin 9 alternate function configuration" "TIM21_ETR,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port C Pin 8 alternate function configuration" "TIM22_ETR,?..."
|
|
elif CPUIS("STM32L071R*")||CPUIS("STM32L071V*")
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOC_AFRL,GPIO_C alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port C Pin 7 alternate function configuration" "TIM22_CH2,,TIM3_CH2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port C Pin 6 alternate function configuration" "TIM22_CH1,,TIM3_CH1,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port C Pin 5 alternate function configuration" ",,LPUART1_RX,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port C Pin 4 alternate function configuration" "EVENTOUT,,LPUART1_TX,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port C Pin 3 alternate function configuration" "LPTIM1_ETR,,SPI2_MOSI/I2S2_SD,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port C Pin 2 alternate function configuration" "LPTIM1_IN2,,SPI2_MISO/I2S2_MCK,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port C Pin 1 alternate function configuration" "LPTIM1_OUT,,EVENTOUT,,,,LPUART1_TX,I2C3_SDA,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port C Pin 0 alternate function configuration" "LPTIM1_IN1,,EVENTOUT,,,,LPUART1_RX,I2C3_SCL,?..."
|
|
line.long 0x04 "GPIOC_AFRH,GPIO_C alternate function low register"
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port C Pin 11 alternate function configuration" ",,USART5_TX,,,,,,USART4_CK,?..."
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port C Pin 11 alternate function configuration" "LPUART1_RX,,,,,,USART4_TX,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port C Pin 10 alternate function configuration" "LPUART1_TX,,,,,,USART4_TX,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port C Pin 9 alternate function configuration" "TIM21_ETR,,TIM3_CH4,,,,,I2C3_SDA,?..."
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port C Pin 8 alternate function configuration" "TIM22_ETR,,TIM3_CH3,?..."
|
|
elif CPUIS("STM32L071CZ")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "GPIOC_AFRL,GPIO_C alternate function low register"
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port C Pin 2 alternate function configuration" "LPTIM1_IN2,,SPI2_MISO/I2S2_MCK,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port C Pin 1 alternate function configuration" "LPTIM1_OUT,,EVENTOUT,,,,LPUART1_TX,I2C3_SDA,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port C Pin 0 alternate function configuration" "LPTIM1_IN1,,EVENTOUT,,,,LPUART1_RX,I2C3_SCL,?..."
|
|
endif
|
|
textline " "
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "GPIOC_BRR,GPIO_C port bit reset register"
|
|
sif CPUIS("STM32L0??R*")||CPUIS("STM32L0??V*")
|
|
bitfld.long 0x00 15. " BRR15 ,Port C Pin 15 reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " BRR14 ,Port C Pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port C Pin 13 reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " BRR12 ,Port C Pin 12 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BRR11 ,Port C Pin 11 reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " BRR10 ,Port C Pin 10 reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " BRR9 ,Port C Pin 9 reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " BRR8 ,Port C Pin 8 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BRR7 ,Port C Pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port C Pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port C Pin 5 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port C Pin 4 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BRR3 ,Port C Pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " BRR2 ,Port C Pin 2 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port C Pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port C Pin 0 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L031C*")||CPUIS("STM32L041C*")
|
|
bitfld.long 0x00 15. " BRR15 ,Port C Pin 15 reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " BRR14 ,Port C Pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port C Pin 13 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port C Pin 0 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L051C*")||CPUIS("STM32L071C8*")||CPUIS("STM32L081C*")
|
|
bitfld.long 0x00 15. " BRR15 ,Port C Pin 15 reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " BRR14 ,Port C Pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port C Pin 13 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x00 15. " BRR15 ,Port C Pin 15 reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " BRR14 ,Port C Pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port C Pin 13 reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " BRR2 ,Port C Pin 2 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BRR1 ,Port C Pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port C Pin 0 reset" "No effect,Reset"
|
|
else
|
|
bitfld.long 0x00 15. " BRR15 ,Port C Pin 15 reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " BRR14 ,Port C Pin 14 reset" "No effect,Reset"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
elif CPUIS("STM32L0?2*")
|
|
tree "GPIO C"
|
|
base ad:0x50000800
|
|
width 15.
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "GPIOC_MODER,GPIO_C port mode register"
|
|
sif CPUIS("STM32L0??R*")||CPUIS("STM32L0??V*")
|
|
bitfld.long 0x00 30.--31. " MODE15 ,Port C Pin 15 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port C Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port C Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 24.--25. " MODE12 ,Port C Pin 12 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " MODE11 ,Port C Pin 11 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 20.--21. " MODE10 ,Port C Pin 10 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port C Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 16.--17. " MODE8 ,Port C Pin 8 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port C Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port C Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port C Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port C Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port C Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port C Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port C Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port C Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L052C*")
|
|
bitfld.long 0x00 30.--31. " MODE15 ,Port C Pin 15 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port C Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port C Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
elif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x00 30.--31. " MODE15 ,Port C Pin 15 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port C Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port C Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port C Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port C Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port C Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
else
|
|
bitfld.long 0x00 30.--31. " MODE15 ,Port C Pin 15 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port C Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
endif
|
|
line.long 0x04 "GPIOC_OTYPER,GPIO_C port output type register"
|
|
sif CPUIS("STM32L0??R*")||CPUIS("STM32L0??V*")
|
|
bitfld.long 0x04 15. " OT15 ,Port C Pin 15 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 14. " OT14 ,Port C Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port C Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 12. " OT12 ,Port C Pin 12 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 11. " OT11 ,Port C Pin 11 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 10. " OT10 ,Port C Pin 10 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 9. " OT9 ,Port C Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 8. " OT8 ,Port C Pin 8 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 7. " OT7 ,Port C Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port C Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port C Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port C Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 3. " OT3 ,Port C Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 2. " OT2 ,Port C Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port C Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port C Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L052C*")
|
|
bitfld.long 0x04 15. " OT15 ,Port C Pin 15 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 14. " OT14 ,Port C Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port C Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
elif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x04 15. " OT15 ,Port C Pin 15 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 14. " OT14 ,Port C Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port C Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 2. " OT2 ,Port C Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 1. " OT1 ,Port C Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port C Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
else
|
|
bitfld.long 0x04 15. " OT15 ,Port C Pin 15 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 14. " OT14 ,Port C Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
endif
|
|
line.long 0x08 "GPIOC_OSPEEDR,GPIO_C port output speed register"
|
|
sif CPUIS("STM32L0??R*")||CPUIS("STM32L0??V*")
|
|
bitfld.long 0x08 30.--31. " OSPEED15 ,Port C Pin 15 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port C Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port C Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 24.--25. " OSPEED12 ,Port C Pin 12 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " OSPEED11 ,Port C Pin 11 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 20.--21. " OSPEED10 ,Port C Pin 10 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port C Pin 9 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 16.--17. " OSPEED8 ,Port C Pin 8 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port C Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port C Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port C Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port C Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port C Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port C Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port C Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port C Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L052C*")
|
|
bitfld.long 0x08 30.--31. " OSPEED15 ,Port C Pin 15 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port C Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port C Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
elif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x08 30.--31. " OSPEED15 ,Port C Pin 15 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port C Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port C Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port C Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port C Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port C Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
else
|
|
bitfld.long 0x08 30.--31. " OSPEED15 ,Port C Pin 15 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port C Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
endif
|
|
line.long 0x0C "GPIOC_PUPDR,GPIO_C port pull-up/pull-down register"
|
|
sif CPUIS("STM32L0??R*")||CPUIS("STM32L0??V*")
|
|
bitfld.long 0x0C 30.--31. " PUPD15 ,Port C Pin 15 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port C Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port C Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 24.--25. " PUPD12 ,Port C Pin 12 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 22.--23. " PUPD11 ,Port C Pin 11 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 20.--21. " PUPD10 ,Port C Pin 10 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port C Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 16.--17. " PUPD8 ,Port C Pin 8 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port C Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port C Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port C Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port C Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port C Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port C Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port C Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port C Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L052C*")
|
|
bitfld.long 0x0C 30.--31. " PUPD15 ,Port C Pin 15 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port C Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port C Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
elif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x0C 30.--31. " PUPD15 ,Port C Pin 15 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port C Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port C Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port C Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port C Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port C Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
else
|
|
bitfld.long 0x0C 30.--31. " PUPD15 ,Port C Pin 15 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port C Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOC_IDR,GPIO_C port input data register"
|
|
sif CPUIS("STM32L0??R*")||CPUIS("STM32L0??V*")
|
|
bitfld.long 0x00 15. " ID15 ,Port C Pin 15 input data" "0,1"
|
|
bitfld.long 0x00 14. " ID14 ,Port C Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port C Pin 13 input data" "0,1"
|
|
bitfld.long 0x00 12. " ID12 ,Port C Pin 12 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ID11 ,Port C Pin 11 input data" "0,1"
|
|
bitfld.long 0x00 10. " ID10 ,Port C Pin 10 input data" "0,1"
|
|
bitfld.long 0x00 9. " ID9 ,Port C Pin 9 input data" "0,1"
|
|
bitfld.long 0x00 8. " ID8 ,Port C Pin 8 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ID7 ,Port C Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port C Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port C Pin 5 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port C Pin 4 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ID3 ,Port C Pin 3 input data" "0,1"
|
|
bitfld.long 0x00 2. " ID2 ,Port C Pin 2 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port C Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port C Pin 0 input data" "0,1"
|
|
elif CPUIS("STM32L052C*")
|
|
bitfld.long 0x00 15. " ID15 ,Port C Pin 15 input data" "0,1"
|
|
bitfld.long 0x00 14. " ID14 ,Port C Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port C Pin 13 input data" "0,1"
|
|
elif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x00 15. " ID15 ,Port C Pin 15 input data" "0,1"
|
|
bitfld.long 0x00 14. " ID14 ,Port C Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port C Pin 13 input data" "0,1"
|
|
bitfld.long 0x00 2. " ID2 ,Port C Pin 2 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ID1 ,Port C Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port C Pin 0 input data" "0,1"
|
|
else
|
|
bitfld.long 0x00 15. " ID15 ,Port C Pin 15 input data" "0,1"
|
|
bitfld.long 0x00 14. " ID14 ,Port C Pin 14 input data" "0,1"
|
|
endif
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOC_ODR,GPIO_C port output bit set/reset register"
|
|
sif CPUIS("STM32L0??R*")||CPUIS("STM32L0??V*")
|
|
setclrfld.long 0x00 15. 0x04 15. 0x04 31. " ODR15_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x04 28. " ODR12_set/clr , Port C pin output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x04 27. " ODR11_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x04 26. " ODR10_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x04 24. " ODR8_set/clr , Port C pin output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr , Port C pin output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port C pin output data" "Low,High"
|
|
elif CPUIS("STM32L052C*")
|
|
setclrfld.long 0x00 15. 0x04 15. 0x04 31. " ODR15_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr , Port C pin output data" "Low,High"
|
|
elif CPUIS("STM32L0??C*")
|
|
setclrfld.long 0x00 15. 0x04 15. 0x04 31. " ODR15_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr , Port C pin output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port C pin output data" "Low,High"
|
|
else
|
|
setclrfld.long 0x00 15. 0x04 15. 0x04 31. " ODR15_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr , Port C pin output data" "Low,High"
|
|
endif
|
|
if ((per.l(ad:0x50000800+0x1C))&0x10000)==0x00
|
|
// GPIOC_LCKR.LCKK = 0 [Not active]
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOC_LCKR,GPIO_C port configuration lock register"
|
|
sif CPUIS("STM32L0??R*")||CPUIS("STM32L0??V*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port C Pin 13 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 12. " LCK12 ,Port C Pin 12 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LCK11 ,Port C Pin 11 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 10. " LCK10 ,Port C Pin 10 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 9. " LCK9 ,Port C Pin 9 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 8. " LCK8 ,Port C Pin 8 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LCK7 ,Port C Pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port C Pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port C Pin 5 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port C Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LCK3 ,Port C Pin 3 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 2. " LCK2 ,Port C Pin 2 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port C Pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port C Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L052C*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port C Pin 13 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port C Pin 13 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 2. " LCK2 ,Port C Pin 2 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LCK1 ,Port C Pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port C Pin 0 lock" "Not locked,Locked"
|
|
else
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
endif
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOC_LCKR,GPIO_C port configuration lock register"
|
|
sif CPUIS("STM32L0??R*")||CPUIS("STM32L0??V*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port C Pin 13 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 12. " LCK12 ,Port C Pin 12 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " LCK11 ,Port C Pin 11 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 10. " LCK10 ,Port C Pin 10 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 9. " LCK9 ,Port C Pin 9 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 8. " LCK8 ,Port C Pin 8 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " LCK7 ,Port C Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port C Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port C Pin 5 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port C Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 3. " LCK3 ,Port C Pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 2. " LCK2 ,Port C Pin 2 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port C Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port C Pin 0 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L052C*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port C Pin 13 lock" "Not locked,Locked"
|
|
elif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port C Pin 13 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 2. " LCK2 ,Port C Pin 2 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " LCK1 ,Port C Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port C Pin 0 lock" "Not locked,Locked"
|
|
else
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
endif
|
|
endif
|
|
textline " "
|
|
sif CPUIS("STM32L052R*")
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOC_AFRL,GPIO_C alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port C Pin 7 alternate function configuration" "TIM22_CH2,,,TSC_G8_IO2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port C Pin 6 alternate function configuration" "TIM22_CH1,,,TSC_G8_IO1,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port C Pin 5 alternate function configuration" ",,LPUART_RX,TSC_G3_IO1,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port C Pin 4 alternate function configuration" "EVENTOUT,,LPUART_TX,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port C Pin 3 alternate function configuration" "LPTIM1_ETR,,SPI2_MOSI/I2S2_SD,TSC_G7_IO4,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port C Pin 2 alternate function configuration" "LPTIM1_IN2,,SPI2_MISO/I2S2_MCK,TSC_G7_IO3,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port C Pin 1 alternate function configuration" "LPTIM1_OUT,,EVENTOUT,TSC_G7_IO2,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port C Pin 0 alternate function configuration" "LPTIM1_IN1,,EVENTOUT,TSC_G7_IO1,?..."
|
|
line.long 0x04 "GPIOC_AFRH,GPIO_C alternate function high register"
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port C Pin 11 alternate function configuration" "LPUART_RX,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port C Pin 10 alternate function configuration" "LPUART_TX,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port C Pin 9 alternate function configuration" "TIM21_ETR,,USB_OE,TSC_G8_IO4,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port C Pin 8 alternate function configuration" "TIM22_ETR,,,TSC_G8_IO3,?..."
|
|
elif CPUIS("STM32L072*")
|
|
sif CPUIS("STM32L0??R*")||CPUIS("STM32L0??V*")
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOC_AFRL,GPIO_C alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port C Pin 7 alternate function configuration" "TIM22_CH2,,TIM3_CH2,TSC_G8_IO2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port C Pin 6 alternate function configuration" "TIM22_CH1,,TIM3_CH1,TSC_G8_IO1,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port C Pin 5 alternate function configuration" ",,LPUART_RX,TSC_G3_IO1,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port C Pin 4 alternate function configuration" "EVENTOUT,,LPUART_TX,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port C Pin 3 alternate function configuration" "LPTIM1_ETR,,SPI2_MOSI/I2S2_SD,TSC_G7_IO4,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port C Pin 2 alternate function configuration" "LPTIM1_IN2,,SPI2_MISO/I2S2_MCK,TSC_G7_IO3,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port C Pin 1 alternate function configuration" "LPTIM1_OUT,,EVENTOUT,TSC_G7_IO2,,,LPUART1_TX,I2C3_SDA,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port C Pin 0 alternate function configuration" "LPTIM1_IN1,,EVENTOUT,TSC_G7_IO1,,,LPUART1_RX,I2C3_SCL,?..."
|
|
line.long 0x04 "GPIOC_AFRH,GPIO_C alternate function high register"
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port C Pin 12 alternate function configuration" ",,USART5_TX,,,,USART4_CK,?..."
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port C Pin 11 alternate function configuration" "LPUART1_RX,,,,,,USART4_RX,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port C Pin 10 alternate function configuration" "LPUART1_TX,,,,,,USART4_TX,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port C Pin 9 alternate function configuration" "TIM21_ETR,,USB_OE/TIM3_CH4,TSC_G8_IO4,,,,I2C3_SDA,?..."
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port C Pin 8 alternate function configuration" "TIM22_ETR,,TIM3_CH3,TSC_G8_IO3,?..."
|
|
elif CPUIS("STM32L0??C*")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "GPIOC_AFRL,GPIO_C alternate function low register"
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port C Pin 2 alternate function configuration" "LPTIM1_IN2,,SPI2_MISO/I2S2_MCK,TSC_G7_IO3,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port C Pin 1 alternate function configuration" "LPTIM1_OUT,,EVENTOUT,TSC_G7_IO2,,,LPUART1_TX,I2C3_SDA,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port C Pin 0 alternate function configuration" "LPTIM1_IN1,,EVENTOUT,TSC_G7_IO1,,,LPUART1_RX,I2C3_SCL,?..."
|
|
endif
|
|
elif CPUIS("STM32L082C*")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "GPIOC_AFRL,GPIO_C alternate function low register"
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port C Pin 2 alternate function configuration" "LPTIM1_IN2,,SPI2_MISO/I2S2_MCK,TSC_G7_IO3,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port C Pin 1 alternate function configuration" "LPTIM1_OUT,,EVENTOUT,TSC_G7_IO2,,,LPUART1_TX,I2C3_SDA,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port C Pin 0 alternate function configuration" "LPTIM1_IN1,,EVENTOUT,TSC_G7_IO1,,,LPUART1_RX,I2C3_SCL,?..."
|
|
endif
|
|
textline " "
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "GPIOC_BRR,GPIO_C port bit reset register"
|
|
sif CPUIS("STM32L0??R*")||CPUIS("STM32L0??V*")
|
|
bitfld.long 0x00 15. " BRR15 ,Port C Pin 15 reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " BRR14 ,Port C Pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port C Pin 13 reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " BRR12 ,Port C Pin 12 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BRR11 ,Port C Pin 11 reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " BRR10 ,Port C Pin 10 reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " BRR9 ,Port C Pin 9 reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " BRR8 ,Port C Pin 8 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BRR7 ,Port C Pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port C Pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port C Pin 5 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port C Pin 4 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BRR3 ,Port C Pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " BRR2 ,Port C Pin 2 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port C Pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port C Pin 0 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x00 15. " BRR15 ,Port C Pin 15 reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " BRR14 ,Port C Pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port C Pin 13 reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " BRR2 ,Port C Pin 2 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BRR1 ,Port C Pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port C Pin 0 reset" "No effect,Reset"
|
|
elif (cpuis("STM32L052T*"))||(cpuis("STM32L052K*"))||(cpuis("STM32L062K*"))
|
|
bitfld.long 0x00 15. " BRR15 ,Port C Pin 15 reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " BRR14 ,Port C Pin 14 reset" "No effect,Reset"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
elif CPUIS("STM32L0?3*")
|
|
tree "GPIO C"
|
|
base ad:0x50000800
|
|
width 15.
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "GPIOC_MODER,GPIO_C port mode register"
|
|
sif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x00 30.--31. " MODE15 ,Port C Pin 15 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port C Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port C Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
else
|
|
bitfld.long 0x00 30.--31. " MODE15 ,Port C Pin 15 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port C Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port C Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 24.--25. " MODE12 ,Port C Pin 12 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " MODE11 ,Port C Pin 11 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 20.--21. " MODE10 ,Port C Pin 10 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port C Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 16.--17. " MODE8 ,Port C Pin 8 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port C Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port C Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port C Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port C Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port C Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port C Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port C Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port C Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
endif
|
|
line.long 0x04 "GPIOC_OTYPER,GPIO_C port output type register"
|
|
sif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x04 15. " OT15 ,Port C Pin 15 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 14. " OT14 ,Port C Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port C Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
else
|
|
bitfld.long 0x04 15. " OT15 ,Port C Pin 15 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 14. " OT14 ,Port C Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port C Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 12. " OT12 ,Port C Pin 12 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 11. " OT11 ,Port C Pin 11 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 10. " OT10 ,Port C Pin 10 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 9. " OT9 ,Port C Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 8. " OT8 ,Port C Pin 8 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 7. " OT7 ,Port C Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port C Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port C Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port C Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 3. " OT3 ,Port C Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 2. " OT2 ,Port C Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port C Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port C Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
endif
|
|
line.long 0x08 "GPIOC_OSPEEDR,GPIO_C port output speed register"
|
|
sif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x08 30.--31. " OSPEED15 ,Port C Pin 15 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port C Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port C Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
else
|
|
bitfld.long 0x08 30.--31. " OSPEED15 ,Port C Pin 15 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port C Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port C Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 24.--25. " OSPEED12 ,Port C Pin 12 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " OSPEED11 ,Port C Pin 11 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 20.--21. " OSPEED10 ,Port C Pin 10 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port C Pin 9 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 16.--17. " OSPEED8 ,Port C Pin 8 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port C Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port C Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port C Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port C Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port C Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port C Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port C Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port C Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
endif
|
|
line.long 0x0C "GPIOC_PUPDR,GPIO_C port pull-up/pull-down register"
|
|
sif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x0C 30.--31. " PUPD15 ,Port C Pin 15 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port C Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port C Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
else
|
|
bitfld.long 0x0C 30.--31. " PUPD15 ,Port C Pin 15 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port C Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port C Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 24.--25. " PUPD12 ,Port C Pin 12 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 22.--23. " PUPD11 ,Port C Pin 11 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 20.--21. " PUPD10 ,Port C Pin 10 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port C Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 16.--17. " PUPD8 ,Port C Pin 8 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port C Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port C Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port C Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port C Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port C Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port C Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port C Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port C Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOC_IDR,GPIO_C port input data register"
|
|
sif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x00 15. " ID15 ,Port C Pin 15 input data" "0,1"
|
|
bitfld.long 0x00 14. " ID14 ,Port C Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port C Pin 13 input data" "0,1"
|
|
else
|
|
bitfld.long 0x00 15. " ID15 ,Port C Pin 15 input data" "0,1"
|
|
bitfld.long 0x00 14. " ID14 ,Port C Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port C Pin 13 input data" "0,1"
|
|
bitfld.long 0x00 12. " ID12 ,Port C Pin 12 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ID11 ,Port C Pin 11 input data" "0,1"
|
|
bitfld.long 0x00 10. " ID10 ,Port C Pin 10 input data" "0,1"
|
|
bitfld.long 0x00 9. " ID9 ,Port C Pin 9 input data" "0,1"
|
|
bitfld.long 0x00 8. " ID8 ,Port C Pin 8 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ID7 ,Port C Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port C Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port C Pin 5 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port C Pin 4 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ID3 ,Port C Pin 3 input data" "0,1"
|
|
bitfld.long 0x00 2. " ID2 ,Port C Pin 2 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port C Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port C Pin 0 input data" "0,1"
|
|
endif
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOC_ODR,GPIO_C port output bit set/reset register"
|
|
sif CPUIS("STM32L0??C*")
|
|
setclrfld.long 0x00 15. 0x04 15. 0x04 31. " ODR15_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr , Port C pin output data" "Low,High"
|
|
else
|
|
setclrfld.long 0x00 15. 0x04 15. 0x04 31. " ODR15_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x04 28. " ODR12_set/clr , Port C pin output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x04 27. " ODR11_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x04 26. " ODR10_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x04 24. " ODR8_set/clr , Port C pin output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr , Port C pin output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port C pin output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port C pin output data" "Low,High"
|
|
endif
|
|
if ((per.l(ad:0x50000800+0x1C))&0x10000)==0x00
|
|
// GPIOC_LCKR.LCKK = 0 [Not active]
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOC_LCKR,GPIO_C port configuration lock register"
|
|
sif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port C Pin 13 lock" "Not locked,Locked"
|
|
else
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port C Pin 13 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 12. " LCK12 ,Port C Pin 12 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LCK11 ,Port C Pin 11 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 10. " LCK10 ,Port C Pin 10 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 9. " LCK9 ,Port C Pin 9 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 8. " LCK8 ,Port C Pin 8 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LCK7 ,Port C Pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port C Pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port C Pin 5 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port C Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LCK3 ,Port C Pin 3 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 2. " LCK2 ,Port C Pin 2 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port C Pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port C Pin 0 lock" "Not locked,Locked"
|
|
endif
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOC_LCKR,GPIO_C port configuration lock register"
|
|
sif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port C Pin 13 lock" "Not locked,Locked"
|
|
else
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " LCK15 ,Port C Pin 15 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 14. " LCK14 ,Port C Pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port C Pin 13 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 12. " LCK12 ,Port C Pin 12 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " LCK11 ,Port C Pin 11 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 10. " LCK10 ,Port C Pin 10 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 9. " LCK9 ,Port C Pin 9 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 8. " LCK8 ,Port C Pin 8 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " LCK7 ,Port C Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port C Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port C Pin 5 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port C Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 3. " LCK3 ,Port C Pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 2. " LCK2 ,Port C Pin 2 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port C Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port C Pin 0 lock" "Not locked,Locked"
|
|
endif
|
|
endif
|
|
textline " "
|
|
sif CPUIS("STM32L053*")||CPUIS("STM32L063*")
|
|
sif CPUIS("STM32L0??R*")||CPUIS("STM32L0??V*")
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOC_AFRL,GPIO_C alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port C Pin 7 alternate function configuration" "TIM22_CH2,LCD_SEG25,,TSC_G8_IO2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port C Pin 6 alternate function configuration" "TIM22_CH1,LCD_SEG24,,TSC_G8_IO1,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port C Pin 5 alternate function configuration" ",LCD_SEG23,LPUART1_RX,TSC_G3_IO1,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port C Pin 4 alternate function configuration" "EVENTOUT,LCD_SEG22,LPUART1_TX,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port C Pin 3 alternate function configuration" "LPTIM1_ETR,LCD_SEG21,SPI2_MOSI/I2S2_SD,TSC_G7_IO4,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port C Pin 2 alternate function configuration" "LPTIM1_IN2,LCD_SEG20,SPI2_MISO/I2S2_MCK,TSC_G7_IO3,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port C Pin 1 alternate function configuration" "LPTIM1_OUT,LCD_SEG19,EVENTOUT,TSC_G7_IO2,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port C Pin 0 alternate function configuration" "LPTIM1_IN1,LCD_SEG18,EVENTOUT,TSC_G7_IO1,?..."
|
|
line.long 0x04 "GPIOC_AFRH,GPIO_C alternate function high register"
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port C Pin 12 alternate function configuration" ",LCD_COM6/LCD_SEG30,?..."
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port C Pin 11 alternate function configuration" "LPUART_RX,LCD_COM5/LCD_SEG29,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port C Pin 10 alternate function configuration" "LPUART_TX,LCD_COM4/LCD_SEG28,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port C Pin 9 alternate function configuration" "TIM21_ETR,LCD_SEG27,USB_OE,TSC_G8_IO4,?..."
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port C Pin 8 alternate function configuration" "TIM22_ETR,LCD_SEG26,,TSC_G8_IO3,?..."
|
|
endif
|
|
else
|
|
sif (cpuis("STM32L0?3R*"))
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOC_AFRL,GPIO_C alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port C Pin 7 alternate function configuration" "TIM22_CH2,LCD_SEG25,TIM3_CH2,TSC_G8_IO2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port C Pin 6 alternate function configuration" "TIM22_CH1,LCD_SEG24,TIM3_CH1,TSC_G8_IO1,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port C Pin 5 alternate function configuration" ",LCD_SEG23,LPUART1_RX,TSC_G3_IO1,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port C Pin 4 alternate function configuration" "EVENTOUT,LCD_SEG22,LPUART1_TX,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port C Pin 3 alternate function configuration" "LPTIM1_ETR,LCD_SEG21,SPI2_MOSI/I2S2_SD,TSC_G7_IO4,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port C Pin 2 alternate function configuration" "LPTIM1_IN2,LCD_SEG20,SPI2_MISO/I2S2_MCK,TSC_G7_IO3,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port C Pin 1 alternate function configuration" "LPTIM1_OUT,LCD_SEG19,EVENTOUT,TSC_G7_IO2,,,LPUART1_TX,I2C3_SDA,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port C Pin 0 alternate function configuration" "LPTIM1_IN1,LCD_SEG18,EVENTOUT,TSC_G7_IO1,,,LPUART1_RX,I2C3_SCL,?..."
|
|
line.long 0x04 "GPIOC_AFRH,GPIO_C alternate function high register"
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port C Pin 12 alternate function configuration" ",LCD_COM6/LCD_SEG30/LCD_SEG50,USART5_TX,,,,USART4_CK,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port C Pin 11 alternate function configuration" "LPUART1_RX,LCD_COM5/LCD_SEG29,,,,,USART4_RX,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port C Pin 10 alternate function configuration" "LPUART1_TX,LCD_COM4/LCD_SEG28,,,,,USART4_TX,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port C Pin 9 alternate function configuration" "TIM21_ETR,LCD_SEG27,USB_OE/TIM3_CH4,TSC_G8_IO4,,,,I2C3_SDA,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port C Pin 8 alternate function configuration" "TIM22_ETR,LCD_SEG26,TIM3_CH3,TSC_G8_IO3,?..."
|
|
elif (cpuis("STM32L0?3V*"))
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIOC_AFRL,GPIO_C alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port C Pin 7 alternate function configuration" "TIM22_CH2,LCD_SEG25,TIM3_CH2,TSC_G8_IO2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port C Pin 6 alternate function configuration" "TIM22_CH1,LCD_SEG24,TIM3_CH1,TSC_G8_IO1,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port C Pin 5 alternate function configuration" ",LCD_SEG23,LPUART1_RX,TSC_G3_IO1,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port C Pin 4 alternate function configuration" "EVENTOUT,LCD_SEG22,LPUART1_TX,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port C Pin 3 alternate function configuration" "LPTIM1_ETR,LCD_SEG21,SPI2_MOSI/I2S2_SD,TSC_G7_IO4,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port C Pin 2 alternate function configuration" "LPTIM1_IN2,LCD_SEG20,SPI2_MISO/I2S2_MCK,TSC_G7_IO3,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port C Pin 1 alternate function configuration" "LPTIM1_OUT,LCD_SEG19,EVENTOUT,TSC_G7_IO2,,,LPUART1_TX,I2C3_SDA,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port C Pin 0 alternate function configuration" "LPTIM1_IN1,LCD_SEG18,EVENTOUT,TSC_G7_IO1,,,LPUART1_RX,I2C3_SCL,?..."
|
|
line.long 0x04 "GPIOC_AFRH,GPIO_C alternate function high register"
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port C Pin 12 alternate function configuration" ",LCD_COM6/LCD_SEG30/LCD_SEG50,USART5_TX,,,,USART4_CK,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port C Pin 11 alternate function configuration" "LPUART1_RX,LCD_COM5/LCD_SEG29/LCD_SEG49,,,,,USART4_RX,?..."
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port C Pin 10 alternate function configuration" "LPUART1_TX,LCD_COM4/LCD_SEG28/LCD_SEG48,,,,,USART4_TX,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port C Pin 9 alternate function configuration" "TIM21_ETR,LCD_SEG27,USB_OE/TIM3_CH4,TSC_G8_IO4,,,,I2C3_SDA,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port C Pin 8 alternate function configuration" "TIM22_ETR,LCD_SEG26,TIM3_CH3,TSC_G8_IO3,?..."
|
|
endif
|
|
endif
|
|
textline " "
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "GPIOC_BRR,GPIO_C port bit reset register"
|
|
sif CPUIS("STM32L0??C*")
|
|
bitfld.long 0x00 15. " BRR15 ,Port C Pin 15 reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " BRR14 ,Port C Pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port C Pin 13 reset" "No effect,Reset"
|
|
else
|
|
bitfld.long 0x00 15. " BRR15 ,Port C Pin 15 reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " BRR14 ,Port C Pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port C Pin 13 reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " BRR12 ,Port C Pin 12 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BRR11 ,Port C Pin 11 reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " BRR10 ,Port C Pin 10 reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " BRR9 ,Port C Pin 9 reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " BRR8 ,Port C Pin 8 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BRR7 ,Port C Pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port C Pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port C Pin 5 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port C Pin 4 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BRR3 ,Port C Pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " BRR2 ,Port C Pin 2 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port C Pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port C Pin 0 reset" "No effect,Reset"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
sif CPUIS("STM32L051R*")||CPUIS("STM32L071R*")||CPUIS("STM32L071V*")||CPUIS("STM32L052R*")||CPUIS("STM32L072R*")||CPUIS("STM32L072V*")||CPUIS("STM32L053R*")||CPUIS("STM32L063R*")||CPUIS("STM32L073R*")||CPUIS("STM32L073V*")||CPUIS("STM32L083R*")||CPUIS("STM32L083V*")
|
|
tree "GPIO D"
|
|
base ad:0x50000C00
|
|
width 15.
|
|
sif CPUIS("STM32L0??V*")
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "GPIOD_MODER,GPIO_D port mode register"
|
|
bitfld.long 0x00 30.--31. " MODE15 ,Port D Pin 15 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port D Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port D Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 24.--25. " MODE12 ,Port D Pin 12 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " MODE11 ,Port D Pin 11 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 20.--21. " MODE10 ,Port D Pin 10 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port D Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 16.--17. " MODE8 ,Port D Pin 8 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port D Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port D Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port D Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port D Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port D Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port D Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port D Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port D Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
line.long 0x04 "GPIOD_OTYPER,GPIO_D port output type register"
|
|
bitfld.long 0x04 15. " OT15 ,Port D Pin 15 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 14. " OT14 ,Port D Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port D Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 12. " OT12 ,Port D Pin 12 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 11. " OT11 ,Port D Pin 11 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 10. " OT10 ,Port D Pin 10 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 9. " OT9 ,Port D Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 8. " OT8 ,Port D Pin 8 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 7. " OT7 ,Port D Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port D Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port D Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port D Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 3. " OT3 ,Port D Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 2. " OT2 ,Port D Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port D Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port D Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
line.long 0x08 "GPIOD_OSPEEDR,GPIO_D port output speed register"
|
|
bitfld.long 0x08 30.--31. " OSPEED15 ,Port D Pin 15 I/O output speed configuration" "Very low,Low,Medium,High"
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port D Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port D Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 24.--25. " OSPEED12 ,Port D Pin 12 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " OSPEED11 ,Port D Pin 11 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 20.--21. " OSPEED10 ,Port D Pin 10 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port D Pin 9 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 16.--17. " OSPEED8 ,Port D Pin 8 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port D Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port D Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port D Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port D Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port D Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port D Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port D Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port D Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
line.long 0x0C "GPIOD_PUPDR,GPIO_D port pull-up/pull-down register"
|
|
bitfld.long 0x0C 30.--31. " PUPD15 ,Port D Pin 15 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port D Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port D Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 24.--25. " PUPD12 ,Port D Pin 12 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 22.--23. " PUPD11 ,Port D Pin 11 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 20.--21. " PUPD10 ,Port D Pin 10 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port D Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 16.--17. " PUPD8 ,Port D Pin 8 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port D Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port D Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port D Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port D Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port D Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port D Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port D Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port D Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOD_IDR,GPIO_D port input data register"
|
|
bitfld.long 0x00 15. " ID15 ,Port D Pin 15 input data" "0,1"
|
|
bitfld.long 0x00 14. " ID14 ,Port D Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port D Pin 13 input data" "0,1"
|
|
bitfld.long 0x00 12. " ID12 ,Port D Pin 12 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ID11 ,Port D Pin 11 input data" "0,1"
|
|
bitfld.long 0x00 10. " ID10 ,Port D Pin 10 input data" "0,1"
|
|
bitfld.long 0x00 9. " ID9 ,Port D Pin 9 input data" "0,1"
|
|
bitfld.long 0x00 8. " ID8 ,Port D Pin 8 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ID7 ,Port D Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port D Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port D Pin 5 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port D Pin 4 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ID3 ,Port D Pin 3 input data" "0,1"
|
|
bitfld.long 0x00 2. " ID2 ,Port D Pin 2 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port D Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port D Pin 0 input data" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOD_ODR,GPIO_D port output bit set/reset register"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x04 31. " ODR15_set/clr , Port D pin 15 output data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr , Port D pin 14 output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr , Port D pin 13 output data" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x04 28. " ODR12_set/clr , Port D pin 12 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x04 27. " ODR11_set/clr , Port D pin 11 output data" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x04 26. " ODR10_set/clr , Port D pin 10 output data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr , Port D pin 9 output data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x04 24. " ODR8_set/clr , Port D pin 8 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port D pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port D pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr , Port D pin 5 output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr , Port D pin 4 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port D pin 3 output data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr , Port D pin 2 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port D pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port D pin 0 output data" "Low,High"
|
|
if ((per.l(ad:0x50000C00+0x1C))&0x10000)==0x00
|
|
// GPIOD_LCKR.LCKK = 0 [Not active]
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOD_LCKR,GPIO_D port configuration lock register"
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LCK15 ,Port D Pin 15 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 14. " LCK14 ,Port D Pin 14 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port D Pin 13 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 12. " LCK12 ,Port D Pin 12 lock bit" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LCK11 ,Port D Pin 11 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 10. " LCK10 ,Port D Pin 10 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 9. " LCK9 ,Port D Pin 9 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 8. " LCK8 ,Port D Pin 8 lock bit" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LCK7 ,Port D Pin 7 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port D Pin 6 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port D Pin 5 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port D Pin 4 lock bit" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LCK3 ,Port D Pin 3 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 2. " LCK2 ,Port D Pin 2 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port D Pin 1 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port D Pin 0 lock bit" "Not locked,Locked"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOD_LCKR,GPIO_D port configuration lock register"
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " LCK15 ,Port D Pin 15 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 14. " LCK14 ,Port D Pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port D Pin 13 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 12. " LCK12 ,Port D Pin 12 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " LCK11 ,Port D Pin 11 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 10. " LCK10 ,Port D Pin 10 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 9. " LCK9 ,Port D Pin 9 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 8. " LCK8 ,Port D Pin 8 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " LCK7 ,Port D Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port D Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port D Pin 5 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port D Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 3. " LCK3 ,Port D Pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 2. " LCK2 ,Port D Pin 2 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port D Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port D Pin 0 lock" "Not locked,Locked"
|
|
endif
|
|
textline " "
|
|
group.long 0x20++0x07
|
|
sif CPUIS("STM32L071*")
|
|
line.long 0x00 "GPIOD_AFRL,GPIO_D alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port D Pin 7 alternate function configuration" "USART2_CK,TIM21_CH2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port D Pin 6 alternate function configuration" "USART2_RX,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port D Pin 5 alternate function configuration" "USART2_TX,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port D Pin 4 alternate function configuration" "USART2_RTS_DE,SPI2_MOSI/I2S2_SD,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port D Pin 3 alternate function configuration" "USART2_CTS,,SPI2_MISO/I2S2_MCK,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port D Pin 2 alternate function configuration" "LPUART1_RTS_DE,,TIM3_ETR,,,,USART5_RX,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port D Pin 1 alternate function configuration" ",SPI2_SCK/I2S2_CK,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port D Pin 0 alternate function configuration" "TIM21_CH1,SPI2_NSS/I2S2_WS,?..."
|
|
line.long 0x04 "GPIOD_AFRH,GPIO_D alternate function high register"
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port D Pin 12 alternate function configuration" "LPUART1_RTS_DE,?..."
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port D Pin 11 alternate function configuration" "LPUART1_CTS,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port D Pin 9 alternate function configuration" "LPUART1_RX,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port D Pin D pin 8 alternate function configuration" "LPUART1_TX,?..."
|
|
elif CPUIS("STM32L072*")
|
|
line.long 0x00 "GPIOD_AFRL,GPIO_D alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port D Pin 7 alternate function configuration" "USART2_CK,TIM21_CH2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port D Pin 6 alternate function configuration" "USART2_RX,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port D Pin 5 alternate function configuration" "USART2_TX,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port D Pin 4 alternate function configuration" "USART2_RTS_DE,SPI2_MOSI/I2S2_SD,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port D Pin 3 alternate function configuration" "USART2_CTS,,SPI2_MISO/I2S2_MCK,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port D Pin 2 alternate function configuration" "LPUART1_RTS_DE,,TIM3_ETR,,,,USART5_RX,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port D Pin 1 alternate function configuration" ",SPI2_SCK/I2S2_CK,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port D Pin 0 alternate function configuration" "TIM21_CH1,SPI2_NSS/I2S2_WS,?..."
|
|
line.long 0x04 "GPIOD_AFRH,GPIO_D alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port D Pin 15 alternate function configuration" "USB_CRS_SYNC,?..."
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port D Pin 12 alternate function configuration" "LPUART1_RTS_DE,?..."
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port D Pin 11 alternate function configuration" "LPUART1_CTS,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port D Pin 9 alternate function configuration" "LPUART1_RX,?..."
|
|
textline " "
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port D Pin D pin 8 alternate function configuration" "LPUART1_TX,?..."
|
|
elif CPUIS("STM32L073*")||CPUIS("STM32L083*")
|
|
line.long 0x00 "GPIOD_AFRL,GPIO_D alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port D Pin 7 alternate function configuration" "USART2_CK,TIM21_CH2,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port D Pin 6 alternate function configuration" "USART2_RX,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port D Pin 5 alternate function configuration" "USART2_TX,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port D Pin 4 alternate function configuration" "USART2_RTS_DE,SPI2_MOSI/I2S2_SD,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port D Pin 3 alternate function configuration" "USART2_CTS,LCD_SEG44,SPI2_MISO/I2S2_MCK,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port D Pin 2 alternate function configuration" "LPUART1_RTS_DE,LCD_COM7/LCD_SEG31/LCD_SEG51,TIM3_ETR,,,,USART5_RX,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port D Pin 1 alternate function configuration" ",SPI2_SCK/I2S2_CK,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port D Pin 0 alternate function configuration" "TIM21_CH1,SPI2_NSS/I2S2_WS,?..."
|
|
line.long 0x04 "GPIOD_AFRH,GPIO_D alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port D Pin 15 alternate function configuration" "USB_CRS_SYNC,LCD_SEG35,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port D Pin 12 alternate function configuration" ",LCD_SEG34,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port D Pin 12 alternate function configuration" ",LCD_SEG33,?..."
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port D Pin 12 alternate function configuration" "LPUART1_RTS_DE,LCD_SEG32,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port D Pin 11 alternate function configuration" "LPUART1_CTS,LCD_SEG31,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port D Pin 11 alternate function configuration" ",LCD_SEG30,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port D Pin 9 alternate function configuration" "LPUART1_RX,LCD_SEG29,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port D Pin D pin 8 alternate function configuration" "LPUART1_TX,LCD_SEG28,?..."
|
|
endif
|
|
textline " "
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "GPIOD_BRR,GPIO_D port bit reset register"
|
|
bitfld.long 0x00 15. " BRR15 ,Port D Pin D pin 15 reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " BRR14 ,Port D Pin D pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port D Pin D pin 13 reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " BRR12 ,Port D Pin D pin 12 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BRR11 ,Port D Pin D pin 11 reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " BRR10 ,Port D Pin D pin 10 reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " BRR9 ,Port D Pin D pin 9 reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " BRR8 ,Port D Pin D pin 8 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BRR7 ,Port D Pin D pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port D Pin D pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port D Pin D pin 5 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port D Pin D pin 4 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BRR3 ,Port D Pin D pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " BRR2 ,Port D Pin D pin 2 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port D Pin D pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port D Pin D pin 0 reset" "No effect,Reset"
|
|
elif CPUIS("STM32L0??R*")
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "GPIOD_MODER,GPIO_D port mode register"
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port D Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
line.long 0x04 "GPIOD_OTYPER,GPIO_D port output type register"
|
|
bitfld.long 0x04 2. " OT2 ,Port D Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
line.long 0x08 "GPIOD_OSPEEDR,GPIO_D port output speed register"
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port D Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
line.long 0x0C "GPIOD_PUPDR,GPIO_D port pull-up/pull-down register"
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port D Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOD_IDR,GPIO_D port input data register"
|
|
bitfld.long 0x00 2. " ID2 ,Port D Pin 2 input data" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOD_ODR,GPIO_D port output bit set/reset register"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr , Port D pin output data" "Low,High"
|
|
if ((per.l(ad:0x50000C00+0x1C))&0x10000)==0x00
|
|
// GPIOD_LCKR.LCKK = 0 [Not active]
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOD_LCKR,GPIO_D port configuration lock register"
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LCK2 ,Port D Pin 2 lock" "Not locked,Locked"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOD_LCKR,GPIO_D port configuration lock register"
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " LCK2 ,Port D Pin 2 lock" "Not locked,Locked"
|
|
endif
|
|
group.long 0x20++0x03
|
|
sif CPUIS("STM32L051*")
|
|
line.long 0x00 "GPIOD_AFRL,GPIO_D alternate function low register"
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port D Pin 2 alternate function configuration" "LPUART_RTS,?..."
|
|
elif CPUIS("STM32L071*")
|
|
line.long 0x00 "GPIOD_AFRL,GPIO_D alternate function low register"
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port D Pin 2 alternate function configuration" "LPUART1_RTS_DE,,TIM3_ETR,,,,USART5_RX,?..."
|
|
elif CPUIS("STM32L052*")
|
|
line.long 0x00 "GPIOD_AFRL,GPIO_D alternate function low register"
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port D Pin 2 alternate function configuration" "LPUART_RTS,?..."
|
|
elif CPUIS("STM32L072*")
|
|
line.long 0x00 "GPIOD_AFRL,GPIO_D alternate function low register"
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port D Pin 2 alternate function configuration" "LPUART1_RTS_DE,,TIM3_ETR,,,,USART5_RX,?..."
|
|
elif CPUIS("STM32L053*")||CPUIS("STM32L063*")
|
|
line.long 0x00 "GPIOD_AFRL,GPIO_D alternate function low register"
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port D Pin 2 alternate function configuration" "LPUART_RTS,LCD_COM7/LCD_SEG31,?..."
|
|
elif ((cpuis("STM32L073R*"))||(cpuis("STM32L083R*")))
|
|
line.long 0x00 "GPIOD_AFRL,GPIO_D alternate function low register"
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port D Pin 2 alternate function configuration" "LPUART1_RTS_DE,LCD_COM7/LCD_SEG31,TIM3_ETR,,,,USART5_RX,?..."
|
|
elif CPUIS("STM32L073*")||CPUIS("STM32L083*")
|
|
line.long 0x00 "GPIOD_AFRL,GPIO_D alternate function low register"
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port D Pin 2 alternate function configuration" "LPUART1_RTS_DE,LCD_COM7/LCD_SEG31/LCD_SEG51,TIM3_ETR,,,,USART5_RX,?..."
|
|
endif
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "GPIOD_BRR,GPIO_D port bit reset register"
|
|
bitfld.long 0x00 2. " BRR2 ,Port D Pin 2 reset" "No effect,Reset"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
sif CPUIS("STM32L071V*")||CPUIS("STM32L072V*")||CPUIS("STM32L073V*")||CPUIS("STM32L083V*")
|
|
tree "GPIO E"
|
|
base ad:0x50001000
|
|
width 15.
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "GPIOE_MODER,GPIO_E port mode register"
|
|
bitfld.long 0x00 30.--31. " MODE15 ,Port E Pin 15 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 28.--29. " MODE14 ,Port E Pin 14 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 26.--27. " MODE13 ,Port E Pin 13 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 24.--25. " MODE12 ,Port E Pin 12 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " MODE11 ,Port E Pin 11 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 20.--21. " MODE10 ,Port E Pin 10 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port E Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 16.--17. " MODE8 ,Port E Pin 8 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " MODE7 ,Port E Pin 7 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 12.--13. " MODE6 ,Port E Pin 6 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 10.--11. " MODE5 ,Port E Pin 5 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 8.--9. " MODE4 ,Port E Pin 4 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MODE3 ,Port E Pin 3 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 4.--5. " MODE2 ,Port E Pin 2 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port E Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port E Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
line.long 0x04 "GPIOE_OTYPER,GPIO_E port output type register"
|
|
bitfld.long 0x04 15. " OT15 ,Port E Pin 15 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 14. " OT14 ,Port E Pin 14 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 13. " OT13 ,Port E Pin 13 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 12. " OT12 ,Port E Pin 12 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 11. " OT11 ,Port E Pin 11 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 10. " OT10 ,Port E Pin 10 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 9. " OT9 ,Port E Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 8. " OT8 ,Port E Pin 8 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 7. " OT7 ,Port E Pin 7 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 6. " OT6 ,Port E Pin 6 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 5. " OT5 ,Port E Pin 5 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 4. " OT4 ,Port E Pin 4 I/O output type configuration" "Push-pull,Open-drain"
|
|
textline " "
|
|
bitfld.long 0x04 3. " OT3 ,Port E Pin 3 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 2. " OT2 ,Port E Pin 2 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port E Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port E Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
line.long 0x08 "GPIOE_OSPEEDR,GPIO_E port output speed register"
|
|
bitfld.long 0x08 30.--31. " OSPEED15 ,Port E Pin 15 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 28.--29. " OSPEED14 ,Port E Pin 14 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 26.--27. " OSPEED13 ,Port E Pin 13 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 24.--25. " OSPEED12 ,Port E Pin 12 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " OSPEED11 ,Port E Pin 11 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 20.--21. " OSPEED10 ,Port E Pin 10 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port E Pin 9 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 16.--17. " OSPEED8 ,Port E Pin 8 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " OSPEED7 ,Port E Pin 7 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 12.--13. " OSPEED6 ,Port E Pin 6 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 10.--11. " OSPEED5 ,Port E Pin 5 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 8.--9. " OSPEED4 ,Port E Pin 4 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " OSPEED3 ,Port E Pin 3 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 4.--5. " OSPEED2 ,Port E Pin 2 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port E Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port E Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
line.long 0x0C "GPIOE_PUPDR,GPIO_E port pull-up/pull-down register"
|
|
bitfld.long 0x0C 30.--31. " PUPD15 ,Port E Pin 15 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 28.--29. " PUPD14 ,Port E Pin 14 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 26.--27. " PUPD13 ,Port E Pin 13 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 24.--25. " PUPD12 ,Port E Pin 12 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 22.--23. " PUPD11 ,Port E Pin 11 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 20.--21. " PUPD10 ,Port E Pin 10 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port E Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 16.--17. " PUPD8 ,Port E Pin 8 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 14.--15. " PUPD7 ,Port E Pin 7 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 12.--13. " PUPD6 ,Port E Pin 6 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 10.--11. " PUPD5 ,Port E Pin 5 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 8.--9. " PUPD4 ,Port E Pin 4 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
textline " "
|
|
bitfld.long 0x0C 6.--7. " PUPD3 ,Port E Pin 3 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 4.--5. " PUPD2 ,Port E Pin 2 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port E Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port E Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOE_IDR,GPIO_E port input data register"
|
|
bitfld.long 0x00 15. " ID15 ,Port E Pin 15 input data" "0,1"
|
|
bitfld.long 0x00 14. " ID14 ,Port E Pin 14 input data" "0,1"
|
|
bitfld.long 0x00 13. " ID13 ,Port E Pin 13 input data" "0,1"
|
|
bitfld.long 0x00 12. " ID12 ,Port E Pin 12 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ID11 ,Port E Pin 11 input data" "0,1"
|
|
bitfld.long 0x00 10. " ID10 ,Port E Pin 10 input data" "0,1"
|
|
bitfld.long 0x00 9. " ID9 ,Port E Pin 9 input data" "0,1"
|
|
bitfld.long 0x00 8. " ID8 ,Port E Pin 8 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ID7 ,Port E Pin 7 input data" "0,1"
|
|
bitfld.long 0x00 6. " ID6 ,Port E Pin 6 input data" "0,1"
|
|
bitfld.long 0x00 5. " ID5 ,Port E Pin 5 input data" "0,1"
|
|
bitfld.long 0x00 4. " ID4 ,Port E Pin 4 input data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ID3 ,Port E Pin 3 input data" "0,1"
|
|
bitfld.long 0x00 2. " ID2 ,Port E Pin 2 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port E Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port E Pin 0 input data" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOE_ODR,GPIO_E port output bit set/reset register"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x04 31. " ODR15_set/clr , Port E pin 10 output data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x04 30. " ODR14_set/clr , Port E pin 14 output data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x04 13. 0x04 29. " ODR13_set/clr , Port E pin 13 output data" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x04 28. " ODR12_set/clr , Port E pin 12 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x04 27. " ODR11_set/clr , Port E pin 11 output data" "Low,High"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x04 26. " ODR10_set/clr , Port E pin 10 output data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr , Port E pin 9 output data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x04 24. " ODR8_set/clr , Port E pin 8 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x04 23. " ODR7_set/clr , Port E pin 7 output data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x04 22. " ODR6_set/clr , Port E pin 6 output data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x04 21. " ODR5_set/clr , Port E pin 5 output data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x04 20. " ODR4_set/clr , Port E pin 4 output data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x04 19. " ODR3_set/clr , Port E pin 3 output data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x04 18. " ODR2_set/clr , Port E pin 2 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port E pin 1 output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port E pin 0 output data" "Low,High"
|
|
if ((per.l(ad:0x50001000+0x1C))&0x10000)==0x00
|
|
// GPIOE_LCKR.LCKK = 0 [Not active]
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOE_LCKR,GPIO_E port configuration lock register"
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LCK15 ,Port E Pin 15 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 14. " LCK14 ,Port E Pin 14 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 13. " LCK13 ,Port E Pin 13 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 12. " LCK12 ,Port E Pin 12 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LCK11 ,Port E Pin 11 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 10. " LCK10 ,Port E Pin 10 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 9. " LCK9 ,Port E Pin 9 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 8. " LCK8 ,Port E Pin 8 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LCK7 ,Port E Pin 7 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " LCK6 ,Port E Pin 6 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 5. " LCK5 ,Port E Pin 5 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 4. " LCK4 ,Port E Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LCK3 ,Port E Pin 3 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 2. " LCK2 ,Port E Pin 2 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port E Pin 1 lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port E Pin 0 lock" "Not locked,Locked"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOE_LCKR,GPIO_E port configuration lock register"
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " LCK15 ,Port E Pin 15 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 14. " LCK14 ,Port E Pin 14 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 13. " LCK13 ,Port E Pin 13 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 12. " LCK12 ,Port E Pin 12 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " LCK11 ,Port E Pin 11 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 10. " LCK10 ,Port E Pin 10 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 9. " LCK9 ,Port E Pin 9 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 8. " LCK8 ,Port E Pin 8 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " LCK7 ,Port E Pin 7 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 6. " LCK6 ,Port E Pin 6 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 5. " LCK5 ,Port E Pin 5 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 4. " LCK4 ,Port E Pin 4 lock" "Not locked,Locked"
|
|
textline " "
|
|
rbitfld.long 0x00 3. " LCK3 ,Port E Pin 3 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 2. " LCK2 ,Port E Pin 2 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port E Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port E Pin 0 lock" "Not locked,Locked"
|
|
endif
|
|
textline " "
|
|
group.long 0x20++0x07
|
|
sif CPUIS("STM32L071*")||CPUIS("STM32L072*")
|
|
line.long 0x00 "GPIOE_AFRL,GPIO_E alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port E Pin 7 alternate function configuration" ",,,,,,USART5_CK/USART5_RTS_DE,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port E Pin 6 alternate function configuration" "TIM21_CH2,,TIM3_CH4,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port E Pin 5 alternate function configuration" "TIM21_CH1,,TIM3_CH3,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port E Pin 4 alternate function configuration" "TIM22_CH2,,TIM3_CH2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port E Pin 3 alternate function configuration" "TIM22_CH1,,TIM3_CH1,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port E Pin 2 alternate function configuration" ",,TIM3_ETR,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port E Pin 1 alternate function configuration" ",,EVENTOUT,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port E Pin 0 alternate function configuration" ",,EVENTOUT,?..."
|
|
line.long 0x04 "GPIOE_AFRH,GPIO_E alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port E Pin 15 alternate function configuration" ",,SPI1_MOSI,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port E Pin 14 alternate function configuration" ",,SPI1_MISO,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port E Pin 13 alternate function configuration" ",,SPI1_SCK,?..."
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port E Pin 12 alternate function configuration" "TIM2_CH4,,SPI1_NSS,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port E Pin 11 alternate function configuration" "TIM2_CH3,,,,,,USART5_RX,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port E Pin 10 alternate function configuration" "TIM2_CH2,,,,,,USART5_TX,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port E Pin 9 alternate function configuration" "TIM2_CH1,,TIM2_ETR,,,,USART4_RX,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port E Pin 8 alternate function configuration" ",,,,,,USART4_TX,?..."
|
|
elif CPUIS("STM32L073*")||CPUIS("STM32L083*")
|
|
line.long 0x00 "GPIOE_AFRL,GPIO_E alternate function low register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Port E Pin 7 alternate function configuration" ",LCD_SEG45,,,,,USART5_CK/USART5_RTS_DE,?..."
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Port E Pin 6 alternate function configuration" "TIM21_CH2,,TIM3_CH4,?..."
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Port E Pin 5 alternate function configuration" "TIM21_CH1,,TIM3_CH3,?..."
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Port E Pin 4 alternate function configuration" "TIM22_CH2,,TIM3_CH2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Port E Pin 3 alternate function configuration" "TIM22_CH1,LCD_SEG39,TIM3_CH1,?..."
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Port E Pin 2 alternate function configuration" ",LCD_SEG38,TIM3_ETR,?..."
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Port E Pin 1 alternate function configuration" ",LCD_SEG37,EVENTOUT,?..."
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port E Pin 0 alternate function configuration" ",LCD_SEG36,EVENTOUT,?..."
|
|
line.long 0x04 "GPIOE_AFRH,GPIO_E alternate function high register"
|
|
bitfld.long 0x04 28.--31. " MODE15 ,Port E Pin 15 alternate function configuration" ",LCD_SEG43,SPI1_MOSI,?..."
|
|
bitfld.long 0x04 24.--27. " MODE14 ,Port E Pin 14 alternate function configuration" ",LCD_SEG42,SPI1_MISO,?..."
|
|
bitfld.long 0x04 20.--23. " MODE13 ,Port E Pin 13 alternate function configuration" ",LCD_SEG41,SPI1_SCK,?..."
|
|
bitfld.long 0x04 16.--19. " MODE12 ,Port E Pin 12 alternate function configuration" "TIM2_CH4,,SPI1_NSS,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " MODE11 ,Port E Pin 11 alternate function configuration" "TIM2_CH3,,,,,,USART5_RX,?..."
|
|
bitfld.long 0x04 8.--11. " MODE10 ,Port E Pin 10 alternate function configuration" "TIM2_CH2,LCD_SEG40,,,,,USART5_TX,?..."
|
|
bitfld.long 0x04 4.--7. " MODE9 ,Port E Pin 9 alternate function configuration" "TIM2_CH1,LCD_SEG47,TIM2_ETR,,,,USART4_RX,?..."
|
|
bitfld.long 0x04 0.--3. " MODE8 ,Port E Pin 8 alternate function configuration" ",LCD_SEG46,,,,,USART4_TX,?..."
|
|
endif
|
|
textline " "
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "GPIOE_BRR,GPIO_E port bit reset register"
|
|
bitfld.long 0x00 15. " BRR15 ,Port E Pin 15 reset" "No effect,Reset"
|
|
bitfld.long 0x00 14. " BRR14 ,Port E Pin 14 reset" "No effect,Reset"
|
|
bitfld.long 0x00 13. " BRR13 ,Port E Pin 13 reset" "No effect,Reset"
|
|
bitfld.long 0x00 12. " BRR12 ,Port E Pin 12 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BRR11 ,Port E Pin 11 reset" "No effect,Reset"
|
|
bitfld.long 0x00 10. " BRR10 ,Port E Pin 10 reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " BRR9 ,Port E Pin 9 reset" "No effect,Reset"
|
|
bitfld.long 0x00 8. " BRR8 ,Port E Pin 8 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BRR7 ,Port E Pin 7 reset" "No effect,Reset"
|
|
bitfld.long 0x00 6. " BRR6 ,Port E Pin 6 reset" "No effect,Reset"
|
|
bitfld.long 0x00 5. " BRR5 ,Port E Pin 5 reset" "No effect,Reset"
|
|
bitfld.long 0x00 4. " BRR4 ,Port E Pin 4 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BRR3 ,Port E Pin 3 reset" "No effect,Reset"
|
|
bitfld.long 0x00 2. " BRR2 ,Port E Pin 2 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port E Pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port E Pin 0 reset" "No effect,Reset"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
sif CPUIS("STM32L031C*")||CPUIS("STM32L041C*")||CPUIS("STM32L051C*")||CPUIS("STM32L051R*")||CPUIS("STM32L071C*")||CPUIS("STM32L071R*")||CPUIS("STM32L071V*")||CPUIS("STM32L081C*")||CPUIS("STM32L052C*")||CPUIS("STM32L052R*")||CPUIS("STM32L072C*")||CPUIS("STM32L072R*")||CPUIS("STM32L072V*")||CPUIS("STM32L082C*")||CPUIS("STM32L053C*")||CPUIS("STM32L053R*")||CPUIS("STM32L063C*")||CPUIS("STM32L063R*")||CPUIS("STM32L073C*")||CPUIS("STM32L073R*")||CPUIS("STM32L073V*")||CPUIS("STM32L083C*")||CPUIS("STM32L083R*")||CPUIS("STM32L083V*")
|
|
tree "GPIO H"
|
|
base ad:0x50001C00
|
|
width 15.
|
|
sif CPUIS("STM32L071V*")||CPUIS("STM32L072V*")||CPUIS("STM32L073V*")||CPUIS("STM32L083V*")
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "GPIOH_MODER,GPIO_H port mode register"
|
|
bitfld.long 0x00 20.--21. " MODE10 ,Port H Pin 10 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 18.--19. " MODE9 ,Port H Pin 9 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port H Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port H Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
line.long 0x04 "GPIOH_OTYPER,GPIO_H port output type register"
|
|
bitfld.long 0x04 10. " OT10 ,Port H Pin 10 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 9. " OT9 ,Port H Pin 9 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 1. " OT1 ,Port H Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port H Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
line.long 0x08 "GPIOH_OSPEEDR,GPIO_H port output speed register"
|
|
bitfld.long 0x08 20.--21. " OSPEED10 ,Port H Pin 10 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 18.--19. " OSPEED9 ,Port H Pin 9 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port H Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port H Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
line.long 0x0C "GPIOH_PUPDR,GPIO_H port pull-up/pull-down register"
|
|
bitfld.long 0x0C 20.--21. " PUPD10 ,Port H Pin 10 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 18.--19. " PUPD9 ,Port H Pin 9 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port H Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port H Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOH_IDR,GPIO_H port input data register"
|
|
bitfld.long 0x00 10. " ID10 ,Port H Pin 10 input data" "0,1"
|
|
bitfld.long 0x00 9. " ID9 ,Port H Pin 9 input data" "0,1"
|
|
bitfld.long 0x00 1. " ID1 ,Port H Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port H Pin 0 input data" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOH_ODR,GPIO_H port input data register"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x04 26. " ODR10_set/clr , Port H pin 10 output data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x04 25. " ODR9_set/clr , Port H pin 9 output data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port H pin output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port H pin output data" "Low,High"
|
|
if ((per.l(ad:0x50001C00+0x1C))&0x10000)==0x00
|
|
// GPIOH_LCKR.LCKK = 0 [Not active]
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOH_LCKR,GPIO_H port configuration lock register"
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " LCK10 ,Port H Pin 10 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 9. " LCK9 ,Port H Pin 9 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 1. " LCK1 ,Port H Pin 1 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port H Pin 0 lock bit" "Not locked,Locked"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOH_LCKR,GPIO_H port configuration lock register"
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 10. " LCK10 ,Port H Pin 10 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 9. " LCK9 ,Port H Pin 9 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 1. " LCK1 ,Port H Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port H Pin 0 lock" "Not locked,Locked"
|
|
endif
|
|
sif CPUIS("STM32L072V*")||CPUIS("STM32L083V*")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "GPIOH_AFRL,GPIO_H alternate function low register"
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port H Pin 0 alternate function configuration" "USB_CRS_SYNC,?..."
|
|
endif
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "GPIOH_BRR,GPIO_H port bit reset register"
|
|
bitfld.long 0x00 10. " BRR10 ,Port H Pin H pin 10 reset" "No effect,Reset"
|
|
bitfld.long 0x00 9. " BRR9 ,Port H Pin H pin 9 reset" "No effect,Reset"
|
|
bitfld.long 0x00 1. " BRR1 ,Port H Pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port H Pin 0 reset" "No effect,Reset"
|
|
else
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "GPIOH_MODER,GPIO_H port mode register"
|
|
bitfld.long 0x00 2.--3. " MODE1 ,Port H Pin 1 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
bitfld.long 0x00 0.--1. " MODE0 ,Port H Pin 0 configuration" "Input,General purpose output,Alternate function,Analog mode"
|
|
line.long 0x04 "GPIOH_OTYPER,GPIO_H port output type register"
|
|
bitfld.long 0x04 1. " OT1 ,Port H Pin 1 I/O output type configuration" "Push-pull,Open-drain"
|
|
bitfld.long 0x04 0. " OT0 ,Port H Pin 0 I/O output type configuration" "Push-pull,Open-drain"
|
|
line.long 0x08 "GPIOH_OSPEEDR,GPIO_H port output speed register"
|
|
bitfld.long 0x08 2.--3. " OSPEED1 ,Port H Pin 1 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
bitfld.long 0x08 0.--1. " OSPEED0 ,Port H Pin 0 I/O output speed configuration" "Low,Medium,High,Very high"
|
|
line.long 0x0C "GPIOH_PUPDR,GPIO_H port pull-up/pull-down register"
|
|
bitfld.long 0x0C 2.--3. " PUPD1 ,Port H Pin 1 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
bitfld.long 0x0C 0.--1. " PUPD0 ,Port H Pin 0 I/O pull configuration" "Neither,Pull-up,Pull-down,"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GPIOH_IDR,GPIO_H port input data register"
|
|
bitfld.long 0x00 1. " ID1 ,Port H Pin 1 input data" "0,1"
|
|
bitfld.long 0x00 0. " ID0 ,Port H Pin 0 input data" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "GPIOH_ODR,GPIO_H port input data register"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x04 17. " ODR1_set/clr , Port H pin output data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x04 16. " ODR0_set/clr , Port H pin output data" "Low,High"
|
|
if ((per.l(ad:0x50001C00+0x1C))&0x10000)==0x00
|
|
// GPIOH_LCKR.LCKK = 0 [Not active]
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOH_LCKR,GPIO_H port configuration lock register"
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LCK1 ,Port H Pin 1 lock bit" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LCK0 ,Port H Pin 0 lock bit" "Not locked,Locked"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GPIOH_LCKR,GPIO_H port configuration lock register"
|
|
bitfld.long 0x00 16. " LCKK ,Lock key" "Not active,Active"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " LCK1 ,Port H Pin 1 lock" "Not locked,Locked"
|
|
rbitfld.long 0x00 0. " LCK0 ,Port H Pin 0 lock" "Not locked,Locked"
|
|
endif
|
|
sif CPUIS("STM32L052*")||CPUIS("STM32L072*")||CPUIS("STM32L082*")||CPUIS("STM32L053*")||CPUIS("STM32L073*")||CPUIS("STM32L083*")||CPUIS("STM32L063*")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "GPIOH_AFRL,GPIO_H alternate function low register"
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Port H Pin 0 alternate function configuration" "USB_CRS_SYNC,?..."
|
|
endif
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "GPIOH_BRR,GPIO_H port bit reset register"
|
|
bitfld.long 0x00 1. " BRR1 ,Port H Pin 1 reset" "No effect,Reset"
|
|
bitfld.long 0x00 0. " BRR0 ,Port H Pin 0 reset" "No effect,Reset"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "SYSCFG (System configuration controller)"
|
|
base ad:0x40010000
|
|
width 14.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CFGR1,SYSCFG memory remap register"
|
|
rbitfld.long 0x00 8.--9. " BOOT_MODE ,Boot mode" "Main FLASH,System FLASH,,Embedded SRAM"
|
|
textline " "
|
|
sif (CPUIS("STM32L07*")||CPUIS("STM32L08*"))
|
|
bitfld.long 0x00 3. " UFB ,User Bank Swapping" "Bank1,Bank2"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 0.--1. " MEM_MODE ,Memorys internal mapping at address 0x0000 0000" "Main FLASH,System FLASH,,SRAM"
|
|
line.long 0x04 "CFGR2,Peripheral mode configuration register"
|
|
sif ((!cpuis("STM32L051K*"))&&(!cpuis("STM32L052K*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L021*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L031*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L041*"))&&(!cpuis("STM32L07?K*"))&&(!cpuis("STM32L08?K*")))
|
|
bitfld.long 0x04 14. " I2C3_FMP ,I2C3 Fm+ mode drive capability" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif ((!cpuis("STM32L051K*"))&&(!cpuis("STM32L052K*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L021*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L031*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L041*")))
|
|
bitfld.long 0x04 13. " I2C2_FMP ,I2C2 Fm+ mode drive capability" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x04 12. " I2C1_FMP ,I2C1 Fm+ mode drive capability" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " I2C_PB9_FMP ,Fm+ drive capability on PB9" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " I2C_PB8_FMP ,Fm+ drive capability on PB8" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpuis("STM32L0?3*"))
|
|
bitfld.long 0x04 9. " I2C_PB7_FMP ,Fm+ drive capability on PB7" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " I2C_PB6_FMP ,Fm+ drive capability on PB6" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " CAPA[2] ,PB2 connection to VLCD supply voltage" "Disconnected,Connected"
|
|
bitfld.long 0x04 2. " CAPA[1] ,PB12 connection to VLCD supply voltage" "Disconnected,Connected"
|
|
bitfld.long 0x04 1. " CAPA[0] ,PB0 connection to VLCD supply voltage" "Disconnected,Connected"
|
|
sif ((cpuis("STM32L05*"))||(cpuis("STM32L06*"))||(cpuis("STM32L07*"))||(cpuis("STM32L08*")))
|
|
textline " "
|
|
bitfld.long 0x04 0. " FWDIS ,Firewall disable" "No,Yes"
|
|
endif
|
|
else
|
|
bitfld.long 0x04 9. " I2C_PB7_FMP ,Fm+ drive capability on PB7" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " I2C_PB6_FMP ,Fm+ drive capability on PB6" "Disabled,Enabled"
|
|
sif ((cpuis("STM32L05*"))||(cpuis("STM32L06*"))||(cpuis("STM32L07*"))||(cpuis("STM32L08*")))
|
|
textline " "
|
|
bitfld.long 0x04 0. " FWDIS ,Firewall disable" "No,Yes"
|
|
endif
|
|
endif
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CFGR3,Reference control and status register"
|
|
bitfld.long 0x00 31. " REF_LOCK ,REF_CFGR3 lock" "Read/Write,Read-only"
|
|
rbitfld.long 0x00 30. " VREFINT_RDYF ,VREFINT ready flag" "Not ready,Ready"
|
|
textline " "
|
|
sif (cpuis("STM32L0?1*"))
|
|
bitfld.long 0x00 12. " ENBUF_VREFINT_COMP ,VREFINT reference for comparator 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " ENBUF_SENSOR_ADC ,Temperature sensor reference for ADC enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ENBUF_VREFINT_ADC ,VREFINT reference for ADC enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " SEL_VREF_OUT ,VREFINT_ADC connection" "No pad,PB0,PB1,PB0 and PB1"
|
|
elif (cpuis("STM32L0?2*"))||(cpuis("STM32L0?3*"))
|
|
bitfld.long 0x00 13. " ENREF_HSI48 ,VREFINT reference for HSI48 oscillator enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " ENBUF_VREFINT_COMP ,VREFINT reference for comparator 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ENBUF_SENSOR_ADC ,Temperature sensor reference for ADC enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ENBUF_VREFINT_ADC ,VREFINT reference for ADC enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " SEL_VREF_OUT ,VREFINT_ADC connection" "No pad,PB0,PB1,PB0 and PB1"
|
|
endif
|
|
group.long 0x08++0x0F
|
|
line.long 0x00 "EXTICR1,SYSCFG external interrupt configuration register 1"
|
|
sif (cpuis("STM32L052R*")||CPUIS("STM32L072R*")||CPUIS("STM32L051R*")||CPUIS("STM32L071R*")||CPUIS("STM32L053R*")||CPUIS("STM32L063R*")||CPUIS("STM32L073R*")||CPUIS("STM32L083R*"))
|
|
bitfld.long 0x00 12.--15. " EXTI3[3:0] ,EXTI 3 configuration" "PA3,PB3,PC3,..."
|
|
bitfld.long 0x00 8.--11. " EXTI2[3:0] ,EXTI 2 configuration" "PA2,PB2,PC2,PD2,?..."
|
|
bitfld.long 0x00 4.--7. " EXTI1[3:0] ,EXTI 1 configuration" "PA1,PB1,PC1,,,PH1,?..."
|
|
bitfld.long 0x00 0.--3. " EXTI0[3:0] ,EXTI 0 configuration" "PA0,PB0,PC0,,,PH0,?..."
|
|
elif (cpuis("STM32L052C*")||cpuis("STM32L063C*")||cpuis("STM32L053C*")||CPUIS("STM32L051C*")||CPUIS("STM32L081C*")||CPUIS("STM32L073C*")||CPUIS("STM32L083C*"))
|
|
bitfld.long 0x00 12.--15. " EXTI3[3:0] ,EXTI 3 configuration" "PA3,PB3,?..."
|
|
bitfld.long 0x00 8.--11. " EXTI2[3:0] ,EXTI 2 configuration" "PA2,PB2,?..."
|
|
bitfld.long 0x00 4.--7. " EXTI1[3:0] ,EXTI 1 configuration" "PA1,PB1,,,,PH1,?..."
|
|
bitfld.long 0x00 0.--3. " EXTI0[3:0] ,EXTI 0 configuration" "PA0,PB0,,,,PH0,?..."
|
|
elif ((cpuis("STM32L052K*"))||(cpuis("STM32L062K*"))||CPUIS("STM32L011K*")||CPUIS("STM32L021K*")||CPUIS("STM32L031K*")||CPUIS("STM32L041K*")||CPUIS("STM32L051K*")||CPUIS("STM32L051T*"))
|
|
bitfld.long 0x00 12.--15. " EXTI3[3:0] ,EXTI 3 configuration" "PA3,PB3,?..."
|
|
bitfld.long 0x00 8.--11. " EXTI2[3:0] ,EXTI 2 configuration" "PA2,PB2,?..."
|
|
bitfld.long 0x00 4.--7. " EXTI1[3:0] ,EXTI 1 configuration" "PA1,PB1,?..."
|
|
bitfld.long 0x00 0.--3. " EXTI0[3:0] ,EXTI 0 configuration" "PA0,PB0,?..."
|
|
elif (cpuis("STM32L052T*")||CPUIS("STM32L062T*"))
|
|
bitfld.long 0x00 12.--15. " EXTI3[3:0] ,EXTI 3 configuration" "PA3,PB3,..."
|
|
bitfld.long 0x00 8.--11. " EXTI2[3:0] ,EXTI 2 configuration" "PA2,PB2,?..."
|
|
bitfld.long 0x00 4.--7. " EXTI1[3:0] ,EXTI 1 configuration" "PA1,PB1,?..."
|
|
bitfld.long 0x00 0.--3. " EXTI0[3:0] ,EXTI 0 configuration" "PA0,PB0,?..."
|
|
elif (CPUIS("STM32L071C8*"))
|
|
bitfld.long 0x00 12.--15. " EXTI3[3:0] ,EXTI 3 configuration" "PA3,PB3,..."
|
|
bitfld.long 0x00 8.--11. " EXTI2[3:0] ,EXTI 2 configuration" "PA2,PB2,,?..."
|
|
bitfld.long 0x00 4.--7. " EXTI1[3:0] ,EXTI 1 configuration" "PA1,PB1,,,,PH1,?..."
|
|
bitfld.long 0x00 0.--3. " EXTI0[3:0] ,EXTI 0 configuration" "PA0,PB0,,,,PH0,?..."
|
|
elif (CPUIS("STM32L071CZ*")||CPUIS("STM32L071CB*")||CPUIS("STM32L072C*")||CPUIS("STM32L082C*"))
|
|
bitfld.long 0x00 12.--15. " EXTI3[3:0] ,EXTI 3 configuration" "PA3,PB3,..."
|
|
bitfld.long 0x00 8.--11. " EXTI2[3:0] ,EXTI 2 configuration" "PA2,PB2,PC2,?..."
|
|
bitfld.long 0x00 4.--7. " EXTI1[3:0] ,EXTI 1 configuration" "PA1,PB1,PC1,,,PH1,?..."
|
|
bitfld.long 0x00 0.--3. " EXTI0[3:0] ,EXTI 0 configuration" "PA0,PB0,PC0,,,PH0,?..."
|
|
elif (CPUIS("STM32L072K*")||CPUIS("STM32L082K*")||CPUIS("STM32L011G*")||CPUIS("STM32L021G*")||CPUIS("STM32L031G*")||CPUIS("STM32L041G*")||CPUIS("STM32L011E*")||CPUIS("STM32L031E*")||CPUIS("STM32L071KZ*")||CPUIS("STM32L081K*"))
|
|
bitfld.long 0x00 12.--15. " EXTI3[3:0] ,EXTI 3 configuration" "PA3,PB3,?..."
|
|
bitfld.long 0x00 8.--11. " EXTI2[3:0] ,EXTI 2 configuration" "PA2,?..."
|
|
bitfld.long 0x00 4.--7. " EXTI1[3:0] ,EXTI 1 configuration" "PA1,PB1,?..."
|
|
bitfld.long 0x00 0.--3. " EXTI0[3:0] ,EXTI 0 configuration" "PA0,PB0,?..."
|
|
elif (CPUIS("STM32L071K8*")||CPUIS("STM32L071KB*"))
|
|
bitfld.long 0x00 12.--15. " EXTI3[3:0] ,EXTI 3 configuration" "PA3,?..."
|
|
bitfld.long 0x00 8.--11. " EXTI2[3:0] ,EXTI 2 configuration" "PA2,?..."
|
|
bitfld.long 0x00 4.--7. " EXTI1[3:0] ,EXTI 1 configuration" "PA1,PB1,?..."
|
|
bitfld.long 0x00 0.--3. " EXTI0[3:0] ,EXTI 0 configuration" "PA0,PB0,?..."
|
|
elif (CPUIS("STM32L031C*")||CPUIS("STM32L041C*"))
|
|
bitfld.long 0x00 12.--15. " EXTI3[3:0] ,EXTI 3 configuration" "PA3,PB3,?..."
|
|
bitfld.long 0x00 8.--11. " EXTI2[3:0] ,EXTI 2 configuration" "PA2,PB2,?..."
|
|
bitfld.long 0x00 4.--7. " EXTI1[3:0] ,EXTI 1 configuration" "PA1,PB1,,,,PH1,?..."
|
|
bitfld.long 0x00 0.--3. " EXTI0[3:0] ,EXTI 0 configuration" "PA0,PB0,PC0,,,PH0,?..."
|
|
elif (CPUIS("STM32L011F*")||CPUIS("STM32L021F*")||CPUIS("STM32L031F*")||CPUIS("STM32L041F*"))
|
|
bitfld.long 0x00 12.--15. " EXTI3[3:0] ,EXTI 3 configuration" "PA3,?..."
|
|
bitfld.long 0x00 8.--11. " EXTI2[3:0] ,EXTI 2 configuration" "PA2,?..."
|
|
bitfld.long 0x00 4.--7. " EXTI1[3:0] ,EXTI 1 configuration" "PA1,PB1,?..."
|
|
bitfld.long 0x00 0.--3. " EXTI0[3:0] ,EXTI 0 configuration" "PA0,?..."
|
|
elif (CPUIS("STM32L011D*")||CPUIS("STM32L021D*"))
|
|
bitfld.long 0x00 4.--7. " EXTI1[3:0] ,EXTI 1 configuration" "PA1,?..."
|
|
bitfld.long 0x00 0.--3. " EXTI0[3:0] ,EXTI 0 configuration" "PA0,?..."
|
|
else
|
|
bitfld.long 0x00 12.--15. " EXTI3[3:0] ,EXTI 3 configuration" "PA3,PB3,PC3,PD3,PE3,?..."
|
|
bitfld.long 0x00 8.--11. " EXTI2[3:0] ,EXTI 2 configuration" "PA2,PB2,PC2,PD2,PE2,?..."
|
|
bitfld.long 0x00 4.--7. " EXTI1[3:0] ,EXTI 1 configuration" "PA1,PB1,PC1,PD1,PE1,PH1,?..."
|
|
bitfld.long 0x00 0.--3. " EXTI0[3:0] ,EXTI 0 configuration" "PA0,PB0,PC0,PD0,PE0,PH0,?..."
|
|
endif
|
|
line.long 0x04 "EXTICR2,SYSCFG external interrupt configuration register 2"
|
|
sif ((cpuis("STM32L052R*"))||cpuis("STM32L053R*")||cpuis("STM32L063R*")||CPUIS("STM32L072R*")||CPUIS("STM32L051R*")||CPUIS("STM32L071R*")||CPUIS("STM32L073R*")||CPUIS("STM32L083R*"))
|
|
bitfld.long 0x04 12.--15. " EXTI7[3:0] ,EXTI 7 configuration" "PA7,PB7,PC7,..."
|
|
bitfld.long 0x04 8.--11. " EXTI6[3:0] ,EXTI 6 configuration" "PA6,PB6,PC6,..."
|
|
bitfld.long 0x04 4.--7. " EXTI5[3:0] ,EXTI 5 configuration" "PA5,PB5,PC5,..."
|
|
bitfld.long 0x04 0.--3. " EXTI4[3:0] ,EXTI 4 configuration" "PA4,PB4,PC4,..."
|
|
elif ((cpuis("STM32L052T*"))||(cpuis("STM32L052K*"))||(cpuis("STM32L052C*"))||(cpuis("STM32L062K*"))||cpuis("STM32L063C*")||cpuis("STM32L053C*")||CPUIS("STM32L072C*")||CPUIS("STM32L072K*")||CPUIS("STM32L082K*")||CPUIS("STM32L082C*")||CPUIS("STM32L011K*")||CPUIS("STM32L021K*")||CPUIS("STM32L031C*")||CPUIS("STM32L031K*")||CPUIS("STM32L011G*")||CPUIS("STM32L021G*")||CPUIS("STM32L031G*")||CPUIS("STM32L041C*")||CPUIS("STM32L041K*")||CPUIS("STM32L041G*")||CPUIS("STM32L051C*")||CPUIS("STM32L051T*")||CPUIS("STM32L051K*")||CPUIS("STM32L071C*")||CPUIS("STM32L081C*")||CPUIS("STM32L071K*")||CPUIS("STM32L081K*")||cpuis("STM32L073C*")||cpuis("STM32L083C*"))
|
|
bitfld.long 0x04 12.--15. " EXTI7[3:0] ,EXTI 7 configuration" "PA7,PB7,..."
|
|
bitfld.long 0x04 8.--11. " EXTI6[3:0] ,EXTI 6 configuration" "PA6,PB6,..."
|
|
bitfld.long 0x04 4.--7. " EXTI5[3:0] ,EXTI 5 configuration" "PA5,PB5,..."
|
|
bitfld.long 0x04 0.--3. " EXTI4[3:0] ,EXTI 4 configuration" "PA4,PB4,..."
|
|
elif (CPUIS("STM32L011E*")||CPUIS("STM32L031E*")||CPUIS("STM32L021F*"))
|
|
bitfld.long 0x04 12.--15. " EXTI7[3:0] ,EXTI 7 configuration" "PA7,PB7,?..."
|
|
bitfld.long 0x04 8.--11. " EXTI6[3:0] ,EXTI 6 configuration" "PA6,PB6,?..."
|
|
bitfld.long 0x04 4.--7. " EXTI5[3:0] ,EXTI 5 configuration" "PA5,?..."
|
|
bitfld.long 0x04 0.--3. " EXTI4[3:0] ,EXTI 4 configuration" "PA4,?..."
|
|
elif (CPUIS("STM32L011F*"))
|
|
bitfld.long 0x04 12.--15. " EXTI7[3:0] ,EXTI 7 configuration" "PA7,PB7,?..."
|
|
bitfld.long 0x04 8.--11. " EXTI6[3:0] ,EXTI 6 configuration" "PA6,?..."
|
|
bitfld.long 0x04 4.--7. " EXTI5[3:0] ,EXTI 5 configuration" "PA5,?..."
|
|
bitfld.long 0x04 0.--3. " EXTI4[3:0] ,EXTI 4 configuration" "PA4,?..."
|
|
elif (CPUIS("STM32L031F*")||CPUIS("STM32L041F*"))
|
|
bitfld.long 0x04 12.--15. " EXTI7[3:0] ,EXTI 7 configuration" "PA7,?..."
|
|
bitfld.long 0x04 8.--11. " EXTI6[3:0] ,EXTI 6 configuration" "PA6,?..."
|
|
bitfld.long 0x04 4.--7. " EXTI5[3:0] ,EXTI 5 configuration" "PA5,?..."
|
|
bitfld.long 0x04 0.--3. " EXTI4[3:0] ,EXTI 4 configuration" "PA4,?..."
|
|
elif (CPUIS("STM32L011D*"))
|
|
bitfld.long 0x04 12.--15. " EXTI7[3:0] ,EXTI 7 configuration" "PA7,?..."
|
|
bitfld.long 0x04 0.--3. " EXTI4[3:0] ,EXTI 4 configuration" "PA4,?..."
|
|
else
|
|
bitfld.long 0x04 12.--15. " EXTI7[3:0] ,EXTI 7 configuration" "PA7,PB7,PC7,PD7,PE7,?..."
|
|
bitfld.long 0x04 8.--11. " EXTI6[3:0] ,EXTI 6 configuration" "PA6,PB6,PC6,PD6,PE6,?..."
|
|
bitfld.long 0x04 4.--7. " EXTI5[3:0] ,EXTI 5 configuration" "PA5,PB5,PC5,PD5,PE5,?..."
|
|
bitfld.long 0x04 0.--3. " EXTI4[3:0] ,EXTI 4 configuration" "PA4,PB4,PC4,PD4,PE4,?..."
|
|
endif
|
|
line.long 0x08 "EXTICR3,SYSCFG external interrupt configuration register 3"
|
|
sif ((cpuis("STM32L052R*"))||cpuis("STM32L053R*")||cpuis("STM32L063R*")||CPUIS("STM32L072R*")||CPUIS("STM32L051R*")||CPUIS("STM32L071R*")||CPUIS("STM32L073R*")||CPUIS("STM32L083R*"))
|
|
bitfld.long 0x08 12.--15. " EXTI11[3:0] ,EXTI 11 configuration" "PA11,PB11,PC11,..."
|
|
bitfld.long 0x08 8.--11. " EXTI10[3:0] ,EXTI 10 configuration" "PA10,PB10,PC10,..."
|
|
bitfld.long 0x08 4.--7. " EXTI9[3:0] ,EXTI 9 configuration" "PA9,PB9,PC9,..."
|
|
bitfld.long 0x08 0.--3. " EXTI8[3:0] ,EXTI 8 configuration" "PA8,PB8,PC8,..."
|
|
elif ((cpuis("STM32L052C*"))||(cpuis("STM32L052T*"))||cpuis("STM32L063C*")||cpuis("STM32L053C*")||CPUIS("STM32L072C*")||CPUIS("STM32L082C*")||CPUIS("STM32L031C*")||CPUIS("STM32L041C*")||CPUIS("STM32L051C*")||CPUIS("STM32L071C*")||CPUIS("STM32L081C*")||cpuis("STM32L073C*")||cpuis("STM32L083C*"))
|
|
bitfld.long 0x08 12.--15. " EXTI11[3:0] ,EXTI 11 configuration" "PA11,PB11,..."
|
|
bitfld.long 0x08 8.--11. " EXTI10[3:0] ,EXTI 10 configuration" "PA10,PB10,..."
|
|
bitfld.long 0x08 4.--7. " EXTI9[3:0] ,EXTI 9 configuration" "PA9,PB9,..."
|
|
bitfld.long 0x08 0.--3. " EXTI8[3:0] ,EXTI 8 configuration" "PA8,PB8,..."
|
|
elif (cpuis("STM32L051T*"))
|
|
bitfld.long 0x08 12.--15. " EXTI11[3:0] ,EXTI 11 configuration" "PA11,PB11,..."
|
|
bitfld.long 0x08 8.--11. " EXTI10[3:0] ,EXTI 10 configuration" "PA10,PB10,..."
|
|
bitfld.long 0x08 4.--7. " EXTI9[3:0] ,EXTI 9 configuration" "PA9,..."
|
|
bitfld.long 0x08 0.--3. " EXTI8[3:0] ,EXTI 8 configuration" "PA8,PB8,..."
|
|
elif ((cpuis("STM32L052K*")||cpuis("STM32L062K*")||CPUIS("STM32L031K*")||CPUIS("STM32L041K*")||CPUIS("STM32L051K*")))
|
|
bitfld.long 0x08 12.--15. " EXTI11[3:0] ,EXTI 11 configuration" "PA11,..."
|
|
bitfld.long 0x08 8.--11. " EXTI10[3:0] ,EXTI 10 configuration" "PA10,..."
|
|
bitfld.long 0x08 4.--7. " EXTI9[3:0] ,EXTI 9 configuration" "PA9,..."
|
|
bitfld.long 0x08 0.--3. " EXTI8[3:0] ,EXTI 8 configuration" "PA8,PB8,..."
|
|
elif (CPUIS("STM32L011K*")||CPUIS("STM32L021K*"))
|
|
bitfld.long 0x08 12.--15. " EXTI11[3:0] ,EXTI 11 configuration" "PA11,?..."
|
|
bitfld.long 0x08 8.--11. " EXTI10[3:0] ,EXTI 10 configuration" "PA10,?..."
|
|
bitfld.long 0x08 4.--7. " EXTI9[3:0] ,EXTI 9 configuration" "PA9,PB9,?..."
|
|
bitfld.long 0x08 0.--3. " EXTI8[3:0] ,EXTI 8 configuration" "PA8,PB8,?..."
|
|
elif (CPUIS("STM32L011G*")||CPUIS("STM32L021G*")||CPUIS("STM32L011E*"))
|
|
bitfld.long 0x08 8.--11. " EXTI10[3:0] ,EXTI 10 configuration" "PA10,?..."
|
|
bitfld.long 0x08 4.--7. " EXTI9[3:0] ,EXTI 9 configuration" "PA9,PB9,?..."
|
|
bitfld.long 0x08 0.--3. " EXTI8[3:0] ,EXTI 8 configuration" "PA8,?..."
|
|
elif (CPUIS("STM32L031G*")||CPUIS("STM32L031E*")||CPUIS("STM32L041G*"))
|
|
bitfld.long 0x08 12.--15. " EXTI11[3:0] ,EXTI 11 configuration" "?..."
|
|
bitfld.long 0x08 8.--11. " EXTI10[3:0] ,EXTI 10 configuration" "PA10,?..."
|
|
bitfld.long 0x08 4.--7. " EXTI9[3:0] ,EXTI 9 configuration" "PA9,?..."
|
|
bitfld.long 0x08 0.--3. " EXTI8[3:0] ,EXTI 8 configuration" "PA8,?..."
|
|
elif (CPUIS("STM32L072K*")||CPUIS("STM32L082K*")||CPUIS("STM32L071K*")||CPUIS("STM32L081K*"))
|
|
bitfld.long 0x08 12.--15. " EXTI11[3:0] ,EXTI 11 configuration" "PA11,?..."
|
|
bitfld.long 0x08 8.--11. " EXTI10[3:0] ,EXTI 10 configuration" "PA10,?..."
|
|
bitfld.long 0x08 4.--7. " EXTI9[3:0] ,EXTI 9 configuration" "PA9,?..."
|
|
bitfld.long 0x08 0.--3. " EXTI8[3:0] ,EXTI 8 configuration" "PA8,?..."
|
|
elif (CPUIS("STM32L011F*")||CPUIS("STM32L021F*")||CPUIS("STM32L011D*")||CPUIS("STM32L021D*"))
|
|
bitfld.long 0x08 8.--11. " EXTI10[3:0] ,EXTI 10 configuration" "PA10,?..."
|
|
bitfld.long 0x08 4.--7. " EXTI9[3:0] ,EXTI 9 configuration" "PA9,PB9,?..."
|
|
elif (CPUIS("STM32L031F*")||CPUIS("STM32L041F*"))
|
|
bitfld.long 0x08 8.--11. " EXTI10[3:0] ,EXTI 10 configuration" "PA10,?..."
|
|
bitfld.long 0x08 4.--7. " EXTI9[3:0] ,EXTI 9 configuration" "PA9,?..."
|
|
else
|
|
bitfld.long 0x08 12.--15. " EXTI11[3:0] ,EXTI 11 configuration" "PA11,PB11,PC11,PD11,PE11,?..."
|
|
bitfld.long 0x08 8.--11. " EXTI10[3:0] ,EXTI 10 configuration" "PA10,PB10,PC10,PD10,PE10,PH10,?..."
|
|
bitfld.long 0x08 4.--7. " EXTI9[3:0] ,EXTI 9 configuration" "PA9,PB9,PC9,PD9,PE9,PH9,?..."
|
|
bitfld.long 0x08 0.--3. " EXTI8[3:0] ,EXTI 8 configuration" "PA8,PB8,PC8,PD8,PE8,?..."
|
|
endif
|
|
line.long 0x0C "EXTICR4,SYSCFG external interrupt configuration register 4"
|
|
sif (cpuis("STM32L052R*")||cpuis("STM32L053R*")||cpuis("STM32L063R*")||CPUIS("STM32L072R*")||CPUIS("STM32L071R*")||CPUIS("STM32L051R*")||CPUIS("STM32L073R*")||CPUIS("STM32L083R*"))
|
|
bitfld.long 0x0C 12.--15. " EXTI15[3:0] ,EXTI 15 configuration" "PA15,PB15,PC15,..."
|
|
bitfld.long 0x0C 8.--11. " EXTI14[3:0] ,EXTI 14 configuration" "PA14,PB14,PC14,..."
|
|
bitfld.long 0x0C 4.--7. " EXTI13[3:0] ,EXTI 13 configuration" "PA13,PB13,PC13,..."
|
|
bitfld.long 0x0C 0.--3. " EXTI12[3:0] ,EXTI 12 configuration" "PA12,PB12,PC12,..."
|
|
elif ((cpuis("STM32L052C*")||cpuis("STM32L063C*")||cpuis("STM32L053C*")||CPUIS("STM32L072C*")||CPUIS("STM32L031C*")||CPUIS("STM32L041C*")||CPUIS("STM32L051C*")||CPUIS("STM32L071C*")||CPUIS("STM32L081C*")||cpuis("STM32L073C*")||CPUIS("STM32L083C*")))
|
|
bitfld.long 0x0C 12.--15. " EXTI15[3:0] ,EXTI 15 configuration" "PA15,PB15,PC15,..."
|
|
bitfld.long 0x0C 8.--11. " EXTI14[3:0] ,EXTI 14 configuration" "PA14,PB14,PC14,..."
|
|
bitfld.long 0x0C 4.--7. " EXTI13[3:0] ,EXTI 13 configuration" "PA13,PB13,PC13,..."
|
|
bitfld.long 0x0C 0.--3. " EXTI12[3:0] ,EXTI 12 configuration" "PA12,PB12,..."
|
|
elif ((cpuis("STM32L051T*"))||(cpuis("STM32L052T*"))||(cpuis("STM32L052K*"))||(cpuis("STM32L062K*"))||(CPUIS("STM32L072K*"))||(CPUIS("STM32L082K*"))||(CPUIS("STM32L011K*"))||(CPUIS("STM32L021K*"))||CPUIS("STM32L031K*")||CPUIS("STM32L041K*")||CPUIS("STM32L051K*")||CPUIS("STM32L071KZ*")||(CPUIS("STM32L081K*")))
|
|
bitfld.long 0x0C 12.--15. " EXTI15[3:0] ,EXTI 15 configuration" "PA15,,PC15,..."
|
|
bitfld.long 0x0C 8.--11. " EXTI14[3:0] ,EXTI 14 configuration" "PA14,,PC14,..."
|
|
bitfld.long 0x0C 4.--7. " EXTI13[3:0] ,EXTI 13 configuration" "PA13,..."
|
|
bitfld.long 0x0C 0.--3. " EXTI12[3:0] ,EXTI 12 configuration" "PA12,..."
|
|
elif ((CPUIS("STM32L071K8*"))||(CPUIS("STM32L071KB*")))
|
|
bitfld.long 0x0C 12.--15. " EXTI15[3:0] ,EXTI 15 configuration" ",,PC15,..."
|
|
bitfld.long 0x0C 8.--11. " EXTI14[3:0] ,EXTI 14 configuration" "PA14,,PC14,..."
|
|
bitfld.long 0x0C 4.--7. " EXTI13[3:0] ,EXTI 13 configuration" "PA13,..."
|
|
bitfld.long 0x0C 0.--3. " EXTI12[3:0] ,EXTI 12 configuration" "PA12,..."
|
|
elif (CPUIS("STM32L011E*")||CPUIS("STM32L011F*")||CPUIS("STM32L011D*")||CPUIS("STM32L021F*")||CPUIS("STM32L021D*")||CPUIS("STM32L031E*")||CPUIS("STM32L031F*")||CPUIS("STM32L041F*"))
|
|
bitfld.long 0x0C 12.--15. " EXTI15[3:0] ,EXTI 15 configuration" ",,PC15,?..."
|
|
bitfld.long 0x0C 8.--11. " EXTI14[3:0] ,EXTI 14 configuration" "PA14,,PC14,?..."
|
|
bitfld.long 0x0C 4.--7. " EXTI13[3:0] ,EXTI 13 configuration" "PA13,?..."
|
|
elif (CPUIS("STM32L011G*")||CPUIS("STM32L021G*")||CPUIS("STM32L031G*")||CPUIS("STM32L041G*"))
|
|
bitfld.long 0x0C 12.--15. " EXTI15[3:0] ,EXTI 15 configuration" "PA15,,PC15,?..."
|
|
bitfld.long 0x0C 8.--11. " EXTI14[3:0] ,EXTI 14 configuration" "PA14,,PC14,?..."
|
|
bitfld.long 0x0C 4.--7. " EXTI13[3:0] ,EXTI 13 configuration" "PA13,?..."
|
|
elif (CPUIS("STM32L082C*"))
|
|
bitfld.long 0x0C 12.--15. " EXTI15[3:0] ,EXTI 15 configuration" "PA15,PB15,PC15,..."
|
|
bitfld.long 0x0C 8.--11. " EXTI14[3:0] ,EXTI 14 configuration" "PA14,PB14,PC14,..."
|
|
bitfld.long 0x0C 4.--7. " EXTI13[3:0] ,EXTI 13 configuration" "PA13,,PC13,,PE13,?..."
|
|
bitfld.long 0x0C 0.--3. " EXTI12[3:0] ,EXTI 12 configuration" "PA12,PB12,?..."
|
|
else
|
|
bitfld.long 0x0C 12.--15. " EXTI15[3:0] ,EXTI 15 configuration" "PA15,PB15,PC15,PD15,PE15,?..."
|
|
bitfld.long 0x0C 8.--11. " EXTI14[3:0] ,EXTI 14 configuration" "PA14,PB14,PC14,PD14,PE14,?..."
|
|
bitfld.long 0x0C 4.--7. " EXTI13[3:0] ,EXTI 13 configuration" "PA13,PB13,PC13,PD13,PE13,?..."
|
|
bitfld.long 0x0C 0.--3. " EXTI12[3:0] ,EXTI 12 configuration" "PA12,PB12,PC12,PD12,PE12,?..."
|
|
endif
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "COMP1_CSR,Comparator 1 control and status register"
|
|
bitfld.long 0x00 31. " COMP1LOCK ,COMP1_CSR register lock" "Read/Write,Read-only"
|
|
rbitfld.long 0x00 30. " COMP1VALUE ,Comparator 1 output status" "0,1"
|
|
bitfld.long 0x00 15. " COMP1POLARITY ,Comparator 1 polarity selection" "Not inverted,Inverted"
|
|
bitfld.long 0x00 12. " COMP1LPTIMIN1 ,Comparator 1 LPTIM input propagation bit" "Gated,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 8. " COMP1WM ,Comparator 1 window mode selection" "Connected to PA1,Shorted with + of Comp2"
|
|
bitfld.long 0x00 4.--5. " COMP1INNSEL ,Comparator 1 Input Minus connection configuration" "VREFINT,PA0,PA4,PA5"
|
|
bitfld.long 0x00 0. " COMP1EN ,Comparator 1 enable bit" "Disabled,Enabled"
|
|
line.long 0x04 "COMP2_CSR,Comparator 2 control and status register"
|
|
bitfld.long 0x04 31. " COMP2LOCK ,COMP2_CSR register lock" "Read/Write,Read-only"
|
|
rbitfld.long 0x04 30. " COMP2VALUE ,Comparator 1 output status" "0,1"
|
|
bitfld.long 0x04 15. " COMP2POLARITY ,Comparator 1 polarity selection" "Not inverted,Inverted"
|
|
bitfld.long 0x00 13. " COMP2LPTIMIN1 ,Comparator 2 LPTIM input 1 propagation bit" "Gated,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 12. " COMP2LPTIMIN2 ,Comparator 2 LPTIM input 2 propagation bit" "Gated,Sent"
|
|
bitfld.long 0x04 8.--10. " COMP2INPSEL ,Comparator 2 Input Plus connection configuration" "PA3,PB4,PB5,PB6,PB7,PB7,PB7,PB7"
|
|
bitfld.long 0x04 4.--6. " COMP2INNSEL ,Comparator 2 Input Minus connection configuration" "VREFINT,PA2,PA4,PA5,1/4 VREFINT,1/2 VREFINT,3/4 VREFINT,PB3"
|
|
bitfld.long 0x04 3. " COMP2SPEED ,Comparator 2 power mode selection" "Slow speed,Fast speed"
|
|
textline " "
|
|
bitfld.long 0x04 0. " COMP2EN ,Comparator 2 enable" "Disabled,Enabled"
|
|
width 12.
|
|
tree.end
|
|
tree "DMA (Direct memory access controller)"
|
|
base ad:0x40020000
|
|
width 12.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "DMA_ISR,DMA interrupt status register"
|
|
bitfld.long 0x00 27. " TEIF7 ,Channel 7 Transfer Error flag" "No error,Error"
|
|
bitfld.long 0x00 26. " HTIF7 ,Channel 7 Half Transfer flag" "Not transfered,Transfered"
|
|
bitfld.long 0x00 25. " TCIF7 ,Channel 7 Transfer Complete flag" "Not completed,Completed"
|
|
bitfld.long 0x00 24. " GIF7 ,Channel 7 Global interrupt flag" "No TE/HT/TC,TE/HT/TC occurred"
|
|
textline " "
|
|
bitfld.long 0x00 23. " TEIF6 ,Channel 6 Transfer Error flag" "No error,Error"
|
|
bitfld.long 0x00 22. " HTIF6 ,Channel 6Half Transfer flag" "Not transfered,Transfered"
|
|
bitfld.long 0x00 21. " TCIF6 ,Channel 6 Transfer Complete flag" "Not completed,Completed"
|
|
bitfld.long 0x00 20. " GIF6 ,Channel 6 Global interrupt flag" "No TE/HT/TC,TE/HT/TC occurred"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TEIF5 ,Channel 5 Transfer Error flag" "No error,Error"
|
|
bitfld.long 0x00 18. " HTIF5 ,Channel 5 Half Transfer flag" "Not transfered,Transfered"
|
|
bitfld.long 0x00 17. " TCIF5 ,Channel 5 Transfer Complete flag" "Not completed,Completed"
|
|
bitfld.long 0x00 16. " GIF5 ,Channel 5 Global interrupt flag" "No TE/HT/TC,TE/HT/TC occurred"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TEIF4 ,Channel 4 Transfer Error flag" "No error,Error"
|
|
bitfld.long 0x00 14. " HTIF4 ,Channel 4 Half Transfer flag" "Not transfered,Transfered"
|
|
bitfld.long 0x00 13. " TCIF4 ,Channel 4 Transfer Complete flag" "Not completed,Completed"
|
|
bitfld.long 0x00 12. " GIF4 ,Channel 4 Global interrupt flag" "No TE/HT/TC,TE/HT/TC occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TEIF3 ,Channel 3 Transfer Error flag" "No error,Error"
|
|
bitfld.long 0x00 10. " HTIF3 ,Channel 3 Half Transfer flag" "Not transfered,Transfered"
|
|
bitfld.long 0x00 9. " TCIF3 ,Channel 3 Transfer Complete flag" "Not completed,Completed"
|
|
bitfld.long 0x00 8. " GIF3 ,Channel 3 Global interrupt flag" "No TE/HT/TC,TE/HT/TC occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TEIF2 ,Channel 2 Transfer Error flag" "No error,Error"
|
|
bitfld.long 0x00 6. " HTIF2 ,Channel 2 Half Transfer flag" "Not transfered,Transfered"
|
|
bitfld.long 0x00 5. " TCIF2 ,Channel 2 Transfer Complete flag" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " GIF2 ,Channel 2 Global interrupt flag" "No TE/HT/TC,TE/HT/TC occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TEIF1 ,Channel 1 Transfer Error flag" "No error,Error"
|
|
bitfld.long 0x00 2. " HTIF1 ,Channel 1 Half Transfer flag" "Not transfered,Transfered"
|
|
bitfld.long 0x00 1. " TCIF1 ,Channel 1 Transfer Complete flag" "Not completed,Completed"
|
|
bitfld.long 0x00 0. " GIF1 ,Channel 1 Global interrupt flag" "No TE/HT/TC,TE/HT/TC occurred"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "DMA_IFCR,DMA interrupt flag clear register"
|
|
bitfld.long 0x00 27. " CTEIF7 ,Channel 7 Transfer Error clear" "No effect,Clear"
|
|
bitfld.long 0x00 26. " CHTIF7 ,Channel 7 Half Transfer clear" "No effect,Clear"
|
|
bitfld.long 0x00 25. " CTCIF7 ,Channel 7 Transfer Complete clear" "No effect,Clear"
|
|
bitfld.long 0x00 24. " CGIF7 ,Channel 7 Global interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 23. " CTEIF6 ,Channel 6 Transfer Error clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " CHTIF6 ,Channel 6 Half Transfer clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " CTCIF6 ,Channel 6 Transfer Complete clear" "No effect,Clear"
|
|
bitfld.long 0x00 20. " CGIF6 ,Channel 6 Global interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CTEIF5 ,Channel 5 Transfer Error clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " CHTIF5 ,Channel 5 Half Transfer clear" "No effect,Clear"
|
|
bitfld.long 0x00 17. " CTCIF5 ,Channel 5 Transfer Complete clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " CGIF5 ,Channel 5 Global interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CTEIF4 ,Channel 4 Transfer Error clear" "No effect,Clear"
|
|
bitfld.long 0x00 14. " CHTIF4 ,Channel 4 Half Transfer clear" "No effect,Clear"
|
|
bitfld.long 0x00 13. " CTCIF4 ,Channel 4 Transfer Complete clear" "No effect,Clear"
|
|
bitfld.long 0x00 12. " CGIF4 ,Channel 4 Global interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTEIF3 ,Channel 3 Transfer Error clear" "No effect,Clear"
|
|
bitfld.long 0x00 10. " CHTIF3 ,Channel 3 Half Transfer clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " CTCIF3 ,Channel 3 Transfer Complete clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " CGIF3 ,Channel 3 Global interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CTEIF2 ,Channel 2 Transfer Error clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " CHTIF2 ,Channel 2 Half Transfer clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " CTCIF2 ,Channel 2 Transfer Complete clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " CGIF2 ,Channel 2 Global interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CTEIF1 ,Channel 1 Transfer Error clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CHTIF1 ,Channel 1 Half Transfer clear" "No effect,Clear"
|
|
bitfld.long 0x00 1. " CTCIF1 ,Channel 1 Transfer Complete clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CGIF1 ,Channel 1 Global interrupt clear" "No effect,Clear"
|
|
group.long 0x8++0x0F "Channel 1"
|
|
line.long 0x00 "DMA_CCR1,DMA channel 1 configuration register"
|
|
bitfld.long 0x00 14. " MEM2MEM ,Memory to memory mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " PL ,Channel Priority level" "Low,Medium,High,Very high"
|
|
bitfld.long 0x00 10.--11. " MSIZE ,Memory size" "8,16,32,"
|
|
bitfld.long 0x00 8.--9. " PSIZE ,Peripheral size" "8,16,32,"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MINC ,Memory increment mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PINC ,Peripheral increment mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CIRC ,Circular mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DIR ,Data transfer direction" "Peripheral,Memory"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TEIE ,Transfer error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HTIE ,Half Transfer interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TCIE ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN ,Channel enable" "Disabled,Enabled"
|
|
line.long 0x04 "DMA_CNDTR1,DMA channel 1 number of data register"
|
|
hexmask.long.word 0x04 0.--15. 0x01 " NDT ,Number of data to transfer"
|
|
line.long 0x08 "DMA_CPAR1,DMA channel 1 peripheral address register"
|
|
line.long 0x0C "DMA_CMAR1,DMA channel 1 memory address register"
|
|
group.long 0x1C++0x0F "Channel 2"
|
|
line.long 0x00 "DMA_CCR2,DMA channel 2 configuration register"
|
|
bitfld.long 0x00 14. " MEM2MEM ,Memory to memory mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " PL ,Channel Priority level" "Low,Medium,High,Very high"
|
|
bitfld.long 0x00 10.--11. " MSIZE ,Memory size" "8,16,32,"
|
|
bitfld.long 0x00 8.--9. " PSIZE ,Peripheral size" "8,16,32,"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MINC ,Memory increment mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PINC ,Peripheral increment mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CIRC ,Circular mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DIR ,Data transfer direction" "Peripheral,Memory"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TEIE ,Transfer error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HTIE ,Half Transfer interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TCIE ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN ,Channel enable" "Disabled,Enabled"
|
|
line.long 0x04 "DMA_CNDTR2,DMA channel 2 number of data register"
|
|
hexmask.long.word 0x04 0.--15. 0x01 " NDT ,Number of data to transfer"
|
|
line.long 0x08 "DMA_CPAR2,DMA channel 2 peripheral address register"
|
|
line.long 0x0C "DMA_CMAR2,DMA channel 2 memory address register"
|
|
group.long 0x30++0x0F "Channel 3"
|
|
line.long 0x00 "DMA_CCR3,DMA channel 3 configuration register"
|
|
bitfld.long 0x00 14. " MEM2MEM ,Memory to memory mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " PL ,Channel Priority level" "Low,Medium,High,Very high"
|
|
bitfld.long 0x00 10.--11. " MSIZE ,Memory size" "8,16,32,"
|
|
bitfld.long 0x00 8.--9. " PSIZE ,Peripheral size" "8,16,32,"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MINC ,Memory increment mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PINC ,Peripheral increment mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CIRC ,Circular mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DIR ,Data transfer direction" "Peripheral,Memory"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TEIE ,Transfer error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HTIE ,Half Transfer interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TCIE ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN ,Channel enable" "Disabled,Enabled"
|
|
line.long 0x04 "DMA_CNDTR3,DMA channel 3 number of data register"
|
|
hexmask.long.word 0x04 0.--15. 0x01 " NDT ,Number of data to transfer"
|
|
line.long 0x08 "DMA_CPAR3,DMA channel 3 peripheral address register"
|
|
line.long 0x0C "DMA_CMAR3,DMA channel 3 memory address register"
|
|
group.long 0x44++0x0F "Channel 4"
|
|
line.long 0x00 "DMA_CCR4,DMA channel 4 configuration register"
|
|
bitfld.long 0x00 14. " MEM2MEM ,Memory to memory mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " PL ,Channel Priority level" "Low,Medium,High,Very high"
|
|
bitfld.long 0x00 10.--11. " MSIZE ,Memory size" "8,16,32,"
|
|
bitfld.long 0x00 8.--9. " PSIZE ,Peripheral size" "8,16,32,"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MINC ,Memory increment mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PINC ,Peripheral increment mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CIRC ,Circular mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DIR ,Data transfer direction" "Peripheral,Memory"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TEIE ,Transfer error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HTIE ,Half Transfer interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TCIE ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN ,Channel enable" "Disabled,Enabled"
|
|
line.long 0x04 "DMA_CNDTR4,DMA channel 4 number of data register"
|
|
hexmask.long.word 0x04 0.--15. 0x01 " NDT ,Number of data to transfer"
|
|
line.long 0x08 "DMA_CPAR4,DMA channel 4 peripheral address register"
|
|
line.long 0x0C "DMA_CMAR4,DMA channel 4 memory address register"
|
|
group.long 0x58++0x0F "Channel 5"
|
|
line.long 0x00 "DMA_CCR5,DMA channel 5 configuration register"
|
|
bitfld.long 0x00 14. " MEM2MEM ,Memory to memory mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " PL ,Channel Priority level" "Low,Medium,High,Very high"
|
|
bitfld.long 0x00 10.--11. " MSIZE ,Memory size" "8,16,32,"
|
|
bitfld.long 0x00 8.--9. " PSIZE ,Peripheral size" "8,16,32,"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MINC ,Memory increment mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PINC ,Peripheral increment mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CIRC ,Circular mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DIR ,Data transfer direction" "Peripheral,Memory"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TEIE ,Transfer error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HTIE ,Half Transfer interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TCIE ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN ,Channel enable" "Disabled,Enabled"
|
|
line.long 0x04 "DMA_CNDTR5,DMA channel 5 number of data register"
|
|
hexmask.long.word 0x04 0.--15. 0x01 " NDT ,Number of data to transfer"
|
|
line.long 0x08 "DMA_CPAR5,DMA channel 5 peripheral address register"
|
|
line.long 0x0C "DMA_CMAR5,DMA channel 5 memory address register"
|
|
group.long 0x6C++0x0F "Channel 6"
|
|
line.long 0x00 "DMA_CCR6,DMA channel 6 configuration register"
|
|
bitfld.long 0x00 14. " MEM2MEM ,Memory to memory mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " PL ,Channel Priority level" "Low,Medium,High,Very high"
|
|
bitfld.long 0x00 10.--11. " MSIZE ,Memory size" "8,16,32,"
|
|
bitfld.long 0x00 8.--9. " PSIZE ,Peripheral size" "8,16,32,"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MINC ,Memory increment mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PINC ,Peripheral increment mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CIRC ,Circular mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DIR ,Data transfer direction" "Peripheral,Memory"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TEIE ,Transfer error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HTIE ,Half Transfer interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TCIE ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN ,Channel enable" "Disabled,Enabled"
|
|
line.long 0x04 "DMA_CNDTR6,DMA channel 6 number of data register"
|
|
hexmask.long.word 0x04 0.--15. 0x01 " NDT ,Number of data to transfer"
|
|
line.long 0x08 "DMA_CPAR6,DMA channel 6 peripheral address register"
|
|
line.long 0x0C "DMA_CMAR6,DMA channel 6 memory address register"
|
|
group.long 0x80++0x0F "Channel 7"
|
|
line.long 0x00 "DMA_CCR7,DMA channel 7 configuration register"
|
|
bitfld.long 0x00 14. " MEM2MEM ,Memory to memory mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " PL ,Channel Priority level" "Low,Medium,High,Very high"
|
|
bitfld.long 0x00 10.--11. " MSIZE ,Memory size" "8,16,32,"
|
|
bitfld.long 0x00 8.--9. " PSIZE ,Peripheral size" "8,16,32,"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MINC ,Memory increment mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PINC ,Peripheral increment mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CIRC ,Circular mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DIR ,Data transfer direction" "Peripheral,Memory"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TEIE ,Transfer error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HTIE ,Half Transfer interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TCIE ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN ,Channel enable" "Disabled,Enabled"
|
|
line.long 0x04 "DMA_CNDTR7,DMA channel 7 number of data register"
|
|
hexmask.long.word 0x04 0.--15. 0x01 " NDT ,Number of data to transfer"
|
|
line.long 0x08 "DMA_CPAR7,DMA channel 7 peripheral address register"
|
|
line.long 0x0C "DMA_CMAR7,DMA channel 7 memory address register"
|
|
textline " "
|
|
textline " "
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "DMA_CSELR,DMA channel selection register"
|
|
bitfld.long 0x00 24.--27. " C7S[3:0] ,DMA channel 7 selection" ",,SPI2_TX,,USART2_TX,LPUART1_TX,I2C1_RX,,TIM2_CH2/TIM2_CH4,,,,USART4_TX,USART5_TX,?..."
|
|
bitfld.long 0x00 20.--23. " C6S[3:0] ,DMA channel 6 selection" ",,SPI2_RX,,USART2_RX,LPUART1_RX,I2C1_TX,,,,TIM3_TRIG,,USART4_RX,USART5_RX,?..."
|
|
bitfld.long 0x00 16.--19. " C5S[3:0] ,DMA channel 5 selection" ",,SPI2_TX,USART1_RX,USART2_RX,,,I2C2_RX,TIM2_CH1,,TIM3_CH1,AES_IN,,I2C3_RX,?..."
|
|
bitfld.long 0x00 12.--15. " C4S[3:0] ,DMA channel 4 selection" ",,SPI2_RX,USART1_TX,USART2_TX,,,I2C2_TX,TIM2_CH4,,,,,,I2C3_TX,TIM7_UP"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " C3S[3:0] ,DMA channel 3 selection" ",SPI1_TX,,USART1_RX,,LPUART1_RX,I2C1_RX,,TIM2_CH2,,TIM4_CH4/TIM4_UP,AES_OUT,USART4_TX,USART4_TX,I2C3_RX,?..."
|
|
bitfld.long 0x00 4.--7. " C2S[3:0] ,DMA channel 2 selection" "ADC,SPI1_RX,,USART1_TX,,LPUART1_TX,I2C1_TX,,TIM2_UP,TIM6_UP,TIM3_CH3,AES_OUT,USART4_RX,USART5_RX,I2C3_TX,?..."
|
|
bitfld.long 0x00 0.--3. " C1S[3:0] ,DMA channel 1 selection" "ADC,,,,,,,,TIM2_CH3,,,AES_IN,?..."
|
|
width 0xB
|
|
tree.end
|
|
tree "EXTI (Extended interrupt and event controller)"
|
|
base ad:0x40010400
|
|
width 12.
|
|
group.long 0x00++0x17
|
|
line.long 0x00 "EXTI_IMR,EXTI interrupt mask register"
|
|
bitfld.long 0x00 29. " IM29 , Interrupt mask on line 29" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IM28 , Interrupt mask on line 28" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " IM26 , Interrupt mask on line 26" "Masked,Not masked"
|
|
bitfld.long 0x00 25. " IM25 , Interrupt mask on line 25" "Masked,Not masked"
|
|
bitfld.long 0x00 24. " IM24 , Interrupt mask on line 24" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IM23 , Interrupt mask on line 23" "Masked,Not masked"
|
|
bitfld.long 0x00 22. " IM22 , Interrupt mask on line 22" "Masked,Not masked"
|
|
bitfld.long 0x00 21. " IM21 , Interrupt mask on line 21" "Masked,Not masked"
|
|
bitfld.long 0x00 20. " IM20 , Interrupt mask on line 20" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IM19 , Interrupt mask on line 19" "Masked,Not masked"
|
|
bitfld.long 0x00 18. " IM18 , Interrupt mask on line 18" "Masked,Not masked"
|
|
bitfld.long 0x00 17. " IM17 , Interrupt mask on line 17" "Masked,Not masked"
|
|
bitfld.long 0x00 16. " IM16 , Interrupt mask on line 16" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IM15 , Interrupt mask on line 15" "Masked,Not masked"
|
|
bitfld.long 0x00 14. " IM14 , Interrupt mask on line 14" "Masked,Not masked"
|
|
bitfld.long 0x00 13. " IM13 , Interrupt mask on line 13" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " IM12 , Interrupt mask on line 12" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IM11 , Interrupt mask on line 11" "Masked,Not masked"
|
|
bitfld.long 0x00 10. " IM10 , Interrupt mask on line 10" "Masked,Not masked"
|
|
bitfld.long 0x00 9. " IM9 , Interrupt mask on line 9" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " IM8 , Interrupt mask on line 8" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IM7 , Interrupt mask on line 7" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " IM6 , Interrupt mask on line 6" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " IM5 , Interrupt mask on line 5" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " IM4 , Interrupt mask on line 4" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IM3 , Interrupt mask on line 3" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " IM2 , Interrupt mask on line 2" "Masked,Not masked"
|
|
bitfld.long 0x00 1. " IM1 , Interrupt mask on line 1" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " IM0 , Interrupt mask on line 0" "Masked,Not masked"
|
|
line.long 0x04 "EXTI_EMR,EXTI event mask register"
|
|
bitfld.long 0x04 29. " EM29 ,Event mask on line 29" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 28. " EM28 ,Event mask on line 28" "Masked,Not masked"
|
|
bitfld.long 0x04 26. " EM26 ,Event mask on line 26" "Masked,Not masked"
|
|
bitfld.long 0x04 25. " EM25 ,Event mask on line 25" "Masked,Not masked"
|
|
bitfld.long 0x04 24. " EM24 ,Event mask on line 24" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 23. " EM23 ,Event mask on line 23" "Masked,Not masked"
|
|
bitfld.long 0x04 22. " EM22 ,Event mask on line 22" "Masked,Not masked"
|
|
bitfld.long 0x04 21. " EM21 ,Event mask on line 21" "Masked,Not masked"
|
|
bitfld.long 0x04 20. " EM20 ,Event mask on line 20" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 19. " EM19 ,Event mask on line 19" "Masked,Not masked"
|
|
bitfld.long 0x04 18. " EM18 ,Event mask on line 18" "Masked,Not masked"
|
|
bitfld.long 0x04 17. " EM17 ,Event mask on line 17" "Masked,Not masked"
|
|
bitfld.long 0x04 16. " EM16 ,Event mask on line 16" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 15. " EM15 ,Event mask on line 15" "Masked,Not masked"
|
|
bitfld.long 0x04 14. " EM14 ,Event mask on line 14" "Masked,Not masked"
|
|
bitfld.long 0x04 13. " EM13 ,Event mask on line 13" "Masked,Not masked"
|
|
bitfld.long 0x04 12. " EM12 ,Event mask on line 12" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 11. " EM11 ,Event mask on line 11" "Masked,Not masked"
|
|
bitfld.long 0x04 10. " EM10 ,Event mask on line 10" "Masked,Not masked"
|
|
bitfld.long 0x04 9. " EM9 ,Event mask on line 9" "Masked,Not masked"
|
|
bitfld.long 0x04 8. " EM8 ,Event mask on line 8" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 7. " EM7 ,Event mask on line 7" "Masked,Not masked"
|
|
bitfld.long 0x04 6. " EM6 ,Event mask on line 6" "Masked,Not masked"
|
|
bitfld.long 0x04 5. " EM5 ,Event mask on line 5" "Masked,Not masked"
|
|
bitfld.long 0x04 4. " EM4 ,Event mask on line 4" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " EM3 ,Event mask on line 3" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " EM2 ,Event mask on line 2" "Masked,Not masked"
|
|
bitfld.long 0x04 1. " EM1 ,Event mask on line 1" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " EM0 ,Event mask on line 0" "Masked,Not masked"
|
|
line.long 0x08 "EXTI_RTSR,EXTI rising edge trigger selection register"
|
|
bitfld.long 0x08 22. " RT22 ,Rising edge trigger event configuration bit of line 22" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " RT21 ,Rising edge trigger event configuration bit of line 21" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " RT20 ,Rising edge trigger event configuration bit of line 20" "Disabled,Enabled"
|
|
bitfld.long 0x08 19. " RT19 ,Rising edge trigger event configuration bit of line 19" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 17. " RT17 ,Rising edge trigger event configuration bit of line 17" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " RT16 ,Rising edge trigger event configuration bit of line 16" "Disabled,Enabled"
|
|
bitfld.long 0x08 15. " RT15 ,Rising edge trigger event configuration bit of line 15" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " RT14 ,Rising edge trigger event configuration bit of line 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " RT13 ,Rising edge trigger event configuration bit of line 13" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " RT12 ,Rising edge trigger event configuration bit of line 12" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " RT11 ,Rising edge trigger event configuration bit of line 11" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " RT10 ,Rising edge trigger event configuration bit of line 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 9. " RT9 ,Rising edge trigger event configuration bit of line 9" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " RT8 ,Rising edge trigger event configuration bit of line 8" "Disabled,Enabled"
|
|
bitfld.long 0x08 7. " RT7 ,Rising edge trigger event configuration bit of line 7" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " RT6 ,Rising edge trigger event configuration bit of line 6" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 5. " RT5 ,Rising edge trigger event configuration bit of line 5" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " RT4 ,Rising edge trigger event configuration bit of line 4" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " RT3 ,Rising edge trigger event configuration bit of line 3" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " RT2 ,Rising edge trigger event configuration bit of line 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " RT1 ,Rising edge trigger event configuration bit of line 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " RT0 ,Rising edge trigger event configuration bit of line 0" "Disabled,Enabled"
|
|
line.long 0x0C "EXTI_FTSR,Falling edge trigger selection register"
|
|
bitfld.long 0x0C 22. " FT22 ,Falling edge trigger event configuration bit of line 22" "Disabled,Enabled"
|
|
bitfld.long 0x0C 21. " FT21 ,Falling edge trigger event configuration bit of line 21" "Disabled,Enabled"
|
|
bitfld.long 0x0C 20. " FT20 ,Falling edge trigger event configuration bit of line 20" "Disabled,Enabled"
|
|
bitfld.long 0x0C 19. " FT19 ,Falling edge trigger event configuration bit of line 19" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " FT17 ,Falling edge trigger event configuration bit of line 17" "Disabled,Enabled"
|
|
bitfld.long 0x0C 16. " FT16 ,Falling edge trigger event configuration bit of line 16" "Disabled,Enabled"
|
|
bitfld.long 0x0C 15. " FT15 ,Falling edge trigger event configuration bit of line 15" "Disabled,Enabled"
|
|
bitfld.long 0x0C 14. " FT14 ,Falling edge trigger event configuration bit of line 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " FT13 ,Falling edge trigger event configuration bit of line 13" "Disabled,Enabled"
|
|
bitfld.long 0x0C 12. " FT12 ,Falling edge trigger event configuration bit of line 12" "Disabled,Enabled"
|
|
bitfld.long 0x0C 11. " FT11 ,Falling edge trigger event configuration bit of line 11" "Disabled,Enabled"
|
|
bitfld.long 0x0C 10. " FT10 ,Falling edge trigger event configuration bit of line 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 9. " FT9 ,Falling edge trigger event configuration bit of line 9" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " FT8 ,Falling edge trigger event configuration bit of line 8" "Disabled,Enabled"
|
|
bitfld.long 0x0C 7. " FT7 ,Falling edge trigger event configuration bit of line 7" "Disabled,Enabled"
|
|
bitfld.long 0x0C 6. " FT6 ,Falling edge trigger event configuration bit of line 6" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 5. " FT5 ,Falling edge trigger event configuration bit of line 5" "Disabled,Enabled"
|
|
bitfld.long 0x0C 4. " FT4 ,Falling edge trigger event configuration bit of line 4" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3. " FT3 ,Falling edge trigger event configuration bit of line 3" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " FT2 ,Falling edge trigger event configuration bit of line 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " FT1 ,Falling edge trigger event configuration bit of line 1" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " FT0 ,Falling edge trigger event configuration bit of line 0" "Disabled,Enabled"
|
|
line.long 0x10 "EXTI_SWIER,EXTI software interrupt event register"
|
|
bitfld.long 0x10 22. " SWI22 ,Software interrupt on line 22" "No effect,Interrupt"
|
|
bitfld.long 0x10 21. " SWI21 ,Software interrupt on line 21" "No effect,Interrupt"
|
|
bitfld.long 0x10 20. " SWI20 ,Software interrupt on line 20" "No effect,Interrupt"
|
|
bitfld.long 0x10 19. " SWI19 ,Software interrupt on line 19" "No effect,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 17. " SWI17 ,Software interrupt on line 17" "No effect,Interrupt"
|
|
bitfld.long 0x10 16. " SWI16 ,Software interrupt on line 16" "No effect,Interrupt"
|
|
bitfld.long 0x10 15. " SWI15 ,Software interrupt on line 15" "No effect,Interrupt"
|
|
bitfld.long 0x10 14. " SWI14 ,Software interrupt on line 14" "No effect,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 13. " SWI13 ,Software interrupt on line 13" "No effect,Interrupt"
|
|
bitfld.long 0x10 12. " SWI12 ,Software interrupt on line 12" "No effect,Interrupt"
|
|
bitfld.long 0x10 11. " SWI11 ,Software interrupt on line 11" "No effect,Interrupt"
|
|
bitfld.long 0x10 10. " SWI10 ,Software interrupt on line 10" "No effect,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 9. " SWI9 ,Software interrupt on line 9" "No effect,Interrupt"
|
|
bitfld.long 0x10 8. " SWI8 ,Software interrupt on line 8" "No effect,Interrupt"
|
|
bitfld.long 0x10 7. " SWI7 ,Software interrupt on line 7" "No effect,Interrupt"
|
|
bitfld.long 0x10 6. " SWI6 ,Software interrupt on line 6" "No effect,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 5. " SWI5 ,Software interrupt on line 5" "No effect,Interrupt"
|
|
bitfld.long 0x10 4. " SWI4 ,Software interrupt on line 4" "No effect,Interrupt"
|
|
bitfld.long 0x10 3. " SWI3 ,Software interrupt on line 3" "No effect,Interrupt"
|
|
bitfld.long 0x10 2. " SWI2 ,Software interrupt on line 2" "No effect,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SWI1 ,Software interrupt on line 1" "No effect,Interrupt"
|
|
bitfld.long 0x10 0. " SWI0 ,Software interrupt on line 0" "No effect,Interrupt"
|
|
line.long 0x14 "EXTI_PR,EXTI pending register"
|
|
eventfld.long 0x14 22. " PIF22 ,Pending interrupt flag 22" "Not pending,Pending"
|
|
eventfld.long 0x14 21. " PIF21 ,Pending interrupt flag 21" "Not pending,Pending"
|
|
eventfld.long 0x14 20. " PIF20 ,Pending interrupt flag 20" "Not pending,Pending"
|
|
eventfld.long 0x14 19. " PIF19 ,Pending interrupt flag 19" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 17. " PIF17 ,Pending interrupt flag 17" "Not pending,Pending"
|
|
eventfld.long 0x14 16. " PIF16 ,Pending interrupt flag 16" "Not pending,Pending"
|
|
eventfld.long 0x14 15. " PIF15 ,Pending interrupt flag 15" "Not pending,Pending"
|
|
eventfld.long 0x14 14. " PIF14 ,Pending interrupt flag 14" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 13. " PIF13 ,Pending interrupt flag 13" "Not pending,Pending"
|
|
eventfld.long 0x14 12. " PIF12 ,Pending interrupt flag 12" "Not pending,Pending"
|
|
eventfld.long 0x14 11. " PIF11 ,Pending interrupt flag 11" "Not pending,Pending"
|
|
eventfld.long 0x14 10. " PIF10 ,Pending interrupt flag 10" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 9. " PIF9 ,Pending interrupt flag 9" "Not pending,Pending"
|
|
eventfld.long 0x14 8. " PIF8 ,Pending interrupt flag 8" "Not pending,Pending"
|
|
eventfld.long 0x14 7. " PIF7 ,Pending interrupt flag 7" "Not pending,Pending"
|
|
eventfld.long 0x14 6. " PIF6 ,Peanding bit 6" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 5. " PIF5 ,Pending interrupt flag 5" "Not pending,Pending"
|
|
eventfld.long 0x14 4. " PIF4 ,Pending interrupt flag 4" "Not pending,Pending"
|
|
eventfld.long 0x14 3. " PIF3 ,Pending interrupt flag 3" "Not pending,Pending"
|
|
eventfld.long 0x14 2. " PIF2 ,Pending interrupt flag 2" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 1. " PIF1 ,Pending interrupt flag 1" "Not pending,Pending"
|
|
eventfld.long 0x14 0. " PIF0 ,Pending interrupt flag 0" "Not pending,Pending"
|
|
width 0xB
|
|
tree.end
|
|
tree "ADC (Analog to Digital Converter)"
|
|
base ad:0x40012400
|
|
width 12.
|
|
group.long 0x00++0x0B
|
|
line.long 0x00 "ADC_ISR,ADC interrupt and status register"
|
|
eventfld.long 0x00 11. " EOCAL ,End Of Calibration flag" "Not completed,Completed"
|
|
eventfld.long 0x00 7. " AWD ,Analog watchdog event flag" "Not occurred,Occurred"
|
|
eventfld.long 0x00 4. " OVR ,ADC overrun" "Not occurred,Occurred"
|
|
eventfld.long 0x00 3. " EOSEQ ,End of sequence flag" "Not completed,Completed"
|
|
textline " "
|
|
eventfld.long 0x00 2. " EOC ,End of conversion flag" "Not completed,Completed"
|
|
eventfld.long 0x00 1. " EOSMP ,End of sampling flag" "Not reached,Reached"
|
|
eventfld.long 0x00 0. " ADRDY ,ADC ready" "Not ready,Ready"
|
|
line.long 0x04 "ADC_IER,ADC interrupt enable register"
|
|
bitfld.long 0x04 11. " EOCALIE ,End of calibration interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " AWDIE ,Analog watchdog interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " OVRIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " EOSEQIE ,End of conversion sequence interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " EOCIE ,End of conversion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " EOSMPIE ,End of sampling flag interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " ADRDYIE ,ADC ready interrupt enable" "Disabled,Enabled"
|
|
line.long 0x08 "ADC_CR,ADC control register"
|
|
bitfld.long 0x08 31. " ADCAL ,ADC calibration" "Completed,In progress"
|
|
bitfld.long 0x08 28. " ADVREGEN ,ADC Voltage Regulator Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " ADSTP ,ADC stop conversion command" "No effect,Stop"
|
|
bitfld.long 0x08 2. " ADSTART ,ADC start conversion command" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ADDIS ,ADC disable command" "No,Yes"
|
|
bitfld.long 0x08 0. " ADEN ,ADC enable command" "Disabled,Enabled"
|
|
if ((((per.l((ad:0x40012400+0x0C)))&0x12000)==0x00000))
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "ADC_CFGR1,ADC configuration register 1"
|
|
sif (cpuis("STM32L051R*"))||(cpuis("STM32L062K8"))||(cpuis("STM32L052R*"))||(cpuis("STM32L063R8"))||(cpuis("STM32L053R*"))||(cpuis("STM32L07?R*"))||(cpuis("STM32L07?V*"))||(cpuis("STM32L08?R*"))||(cpuis("STM32L08?V*"))
|
|
bitfld.long 0x00 26.--30. " AWDCH[4:0] ,Analog watchdog channel selection" "Channel 00,Channel 01,Channel 02,Channel 03,Channel 04,Channel 05,Channel 06,Channel 07,Channel 08,Channel 09,Channel 10,Channel 11,Channel 12,Channel 13,Channel 14,Channel 15,?..."
|
|
elif ((cpuis("STM32L071C?"))||(cpuis("STM32L072C?"))||(cpuis("STM32L081C?"))||(cpuis("STM32L082C?")))
|
|
bitfld.long 0x00 26.--30. " AWDCH[4:0] ,Analog watchdog channel selection" "Channel 00,Channel 01,Channel 02,Channel 03,Channel 04,Channel 05,Channel 06,Channel 07,Channel 08,Channel 09,Channel 10,Channel 11,Channel 12,?..."
|
|
elif ((cpuis("STM32L011D?"))||(cpuis("STM32L021D?")))
|
|
bitfld.long 0x00 26.--30. " AWDCH[4:0] ,Analog watchdog channel selection" "Channel 00,Channel 01,,,Channel 04,,,Channel 07,?..."
|
|
elif ((cpuis("STM32L011F?"))||(cpuis("STM32L021F?")))
|
|
bitfld.long 0x00 26.--30. " AWDCH[4:0] ,Analog watchdog channel selection" "Channel 00,Channel 01,Channel 02,Channel 03,Channel 04,Channel 05,Channel 06,Channel 07,,Channel 09,?..."
|
|
else
|
|
bitfld.long 0x00 26.--30. " AWDCH[4:0] ,Analog watchdog channel selection" "Channel 00,Channel 01,Channel 02,Channel 03,Channel 04,Channel 05,Channel 06,Channel 07,Channel 08,Channel 09,?..."
|
|
endif
|
|
bitfld.long 0x00 23. " AWDEN ,Analog watchdog enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " AWDSGL ,Enable the watchdog on a single channel or on all channels" "All,Single"
|
|
bitfld.long 0x00 16. " DISCEN ,Discontinuous mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " AUTOFF ,Auto-off mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " WAIT ,Wait conversion mode" "Off,On"
|
|
bitfld.long 0x00 13. " CONT ,Single/continuous conversion mode" "Single,Continuous"
|
|
bitfld.long 0x00 12. " OVRMOD ,Overrun management mode" "Preserved,Overwritten"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " EXTEN[1:0] ,External trigger enable and polarity selection" "Disabled,Rising edge,Falling edge,Both edges"
|
|
sif ((cpu()=="STM32L011D3")||(cpu()=="STM32L011D4")||(cpu()=="STM32L011E3")||(cpu()=="STM32L011E4")||(cpu()=="STM32L011F3")||(cpu()=="STM32L011F4")||(cpu()=="STM32L011G3")||(cpu()=="STM32L011G4")||(cpu()=="STM32L011K3")||(cpu()=="STM32L011K4")||(cpu()=="STM32L021D4")||(cpu()=="STM32L021F4")||(cpu()=="STM32L021G4")||(cpu()=="STM32L021K4"))
|
|
bitfld.long 0x00 6.--8. " EXTSEL[2:0] ,External trigger selection" ",TIM21_CH2,TIM2_TRGO,TIM2_CH4,,,,EXTI line 11"
|
|
elif ((cpu()=="STM32L031C4")||(cpu()=="STM32L031C6")||(cpu()=="STM32L031E4")||(cpu()=="STM32L031E6")||(cpu()=="STM32L031F4")||(cpu()=="STM32L031F6")||(cpu()=="STM32L031G4")||(cpu()=="STM32L031G6")||(cpu()=="STM32L031K4")||(cpu()=="STM32L031K6")||(cpu()=="STM32L041C6")||(cpu()=="STM32L041F6")||(cpu()=="STM32L041G6")||(cpu()=="STM32L041K6"))
|
|
bitfld.long 0x00 6.--8. " EXTSEL[2:0] ,External trigger selection" ",TIM21_CH2,TIM2_TRGO,TIM2_CH4,TIM22_TRGO,,,EXTI line 11"
|
|
else
|
|
bitfld.long 0x00 6.--8. " EXTSEL[2:0] ,External trigger selection" "TIM6_TRGO,TIM21_CH2,TIM2_TRGO,TIM2_CH4,TIM22_TRGO,,,EXTI line 11"
|
|
endif
|
|
bitfld.long 0x00 5. " ALIGN ,Data alignment" "Right,Left"
|
|
bitfld.long 0x00 3.--4. " RES[1:0] ,Data resolution" "12 bits,10 bits,8 bits,6 bits"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SCANDIR ,Scan sequence direction" "Upward,Backward"
|
|
bitfld.long 0x00 1. " DMACFG ,Direct memory access configuration" "One shot,Circular"
|
|
bitfld.long 0x00 0. " DMAEN ,Direct memory access enable" "Disabled,Enabled"
|
|
elif ((((per.l((ad:0x40012400+0x0C)))&0x12000)==0x02000))
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "ADC_CFGR1,ADC configuration register 1"
|
|
sif (cpuis("STM32L051R*"))||(cpuis("STM32L062K8"))||(cpuis("STM32L052R*"))||(cpuis("STM32L063R8"))||(cpuis("STM32L053R*"))||(cpuis("STM32L07?R*"))||(cpuis("STM32L07?V*"))||(cpuis("STM32L08?R*"))||(cpuis("STM32L08?V*"))
|
|
bitfld.long 0x00 26.--30. " AWDCH[4:0] ,Analog watchdog channel selection" "Channel 00,Channel 01,Channel 02,Channel 03,Channel 04,Channel 05,Channel 06,Channel 07,Channel 08,Channel 09,Channel 10,Channel 11,Channel 12,Channel 13,Channel 14,Channel 15,?..."
|
|
elif ((cpuis("STM32L071C?"))||(cpuis("STM32L072C?"))||(cpuis("STM32L081C?"))||(cpuis("STM32L082C?")))
|
|
bitfld.long 0x00 26.--30. " AWDCH[4:0] ,Analog watchdog channel selection" "Channel 00,Channel 01,Channel 02,Channel 03,Channel 04,Channel 05,Channel 06,Channel 07,Channel 08,Channel 09,Channel 10,Channel 11,Channel 12,?..."
|
|
elif ((cpuis("STM32L011D?"))||(cpuis("STM32L021D?")))
|
|
bitfld.long 0x00 26.--30. " AWDCH[4:0] ,Analog watchdog channel selection" "Channel 00,Channel 01,,,Channel 04,,,Channel 07,?..."
|
|
elif ((cpuis("STM32L011F?"))||(cpuis("STM32L021F?")))
|
|
bitfld.long 0x00 26.--30. " AWDCH[4:0] ,Analog watchdog channel selection" "Channel 00,Channel 01,Channel 02,Channel 03,Channel 04,Channel 05,Channel 06,Channel 07,,Channel 09,?..."
|
|
else
|
|
bitfld.long 0x00 26.--30. " AWDCH[4:0] ,Analog watchdog channel selection" "Channel 00,Channel 01,Channel 02,Channel 03,Channel 04,Channel 05,Channel 06,Channel 07,Channel 08,Channel 09,?..."
|
|
endif
|
|
bitfld.long 0x00 23. " AWDEN ,Analog watchdog enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " AWDSGL ,Enable the watchdog on a single channel or on all channels" "All,Single"
|
|
rbitfld.long 0x00 16. " DISCEN ,Discontinuous mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " AUTOFF ,Auto-off mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " WAIT ,Wait conversion mode" "Off,On"
|
|
bitfld.long 0x00 13. " CONT ,Single/continuous conversion mode" "Single,Continuous"
|
|
bitfld.long 0x00 12. " OVRMOD ,Overrun management mode" "Preserved,Overwritten"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " EXTEN[1:0] ,External trigger enable and polarity selection" "Disabled,Rising edge,Falling edge,Both edges"
|
|
sif ((cpu()=="STM32L011D3")||(cpu()=="STM32L011D4")||(cpu()=="STM32L011E3")||(cpu()=="STM32L011E4")||(cpu()=="STM32L011F3")||(cpu()=="STM32L011F4")||(cpu()=="STM32L011G3")||(cpu()=="STM32L011G4")||(cpu()=="STM32L011K3")||(cpu()=="STM32L011K4")||(cpu()=="STM32L021D4")||(cpu()=="STM32L021F4")||(cpu()=="STM32L021G4")||(cpu()=="STM32L021K4"))
|
|
bitfld.long 0x00 6.--8. " EXTSEL[2:0] ,External trigger selection" ",TIM21_CH2,TIM2_TRGO,TIM2_CH4,,,,EXTI line 11"
|
|
elif ((cpu()=="STM32L031C4")||(cpu()=="STM32L031C6")||(cpu()=="STM32L031E4")||(cpu()=="STM32L031E6")||(cpu()=="STM32L031F4")||(cpu()=="STM32L031F6")||(cpu()=="STM32L031G4")||(cpu()=="STM32L031G6")||(cpu()=="STM32L031K4")||(cpu()=="STM32L031K6")||(cpu()=="STM32L041C6")||(cpu()=="STM32L041F6")||(cpu()=="STM32L041G6")||(cpu()=="STM32L041K6"))
|
|
bitfld.long 0x00 6.--8. " EXTSEL[2:0] ,External trigger selection" ",TIM21_CH2,TIM2_TRGO,TIM2_CH4,TIM22_TRGO,,,EXTI line 11"
|
|
else
|
|
bitfld.long 0x00 6.--8. " EXTSEL[2:0] ,External trigger selection" "TIM6_TRGO,TIM21_CH2,TIM2_TRGO,TIM2_CH4,TIM22_TRGO,,,EXTI line 11"
|
|
endif
|
|
bitfld.long 0x00 5. " ALIGN ,Data alignment" "Right,Left"
|
|
bitfld.long 0x00 3.--4. " RES[1:0] ,Data resolution" "12 bits,10 bits,8 bits,6 bits"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SCANDIR ,Scan sequence direction" "Upward,Backward"
|
|
bitfld.long 0x00 1. " DMACFG ,Direct memory access configuration" "One shot,Circular"
|
|
bitfld.long 0x00 0. " DMAEN ,Direct memory access enable" "Disabled,Enabled"
|
|
elif ((((per.l((ad:0x40012400+0x0C)))&0x12000)==0x10000))
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "ADC_CFGR1,ADC configuration register 1"
|
|
sif (cpuis("STM32L051R*"))||(cpuis("STM32L062K8"))||(cpuis("STM32L052R*"))||(cpuis("STM32L063R8"))||(cpuis("STM32L053R*"))||(cpuis("STM32L07?R*"))||(cpuis("STM32L07?V*"))||(cpuis("STM32L08?R*"))||(cpuis("STM32L08?V*"))
|
|
bitfld.long 0x00 26.--30. " AWDCH[4:0] ,Analog watchdog channel selection" "Channel 00,Channel 01,Channel 02,Channel 03,Channel 04,Channel 05,Channel 06,Channel 07,Channel 08,Channel 09,Channel 10,Channel 11,Channel 12,Channel 13,Channel 14,Channel 15,?..."
|
|
elif ((cpuis("STM32L071C?"))||(cpuis("STM32L072C?"))||(cpuis("STM32L081C?"))||(cpuis("STM32L082C?")))
|
|
bitfld.long 0x00 26.--30. " AWDCH[4:0] ,Analog watchdog channel selection" "Channel 00,Channel 01,Channel 02,Channel 03,Channel 04,Channel 05,Channel 06,Channel 07,Channel 08,Channel 09,Channel 10,Channel 11,Channel 12,?..."
|
|
elif ((cpuis("STM32L011D?"))||(cpuis("STM32L021D?")))
|
|
bitfld.long 0x00 26.--30. " AWDCH[4:0] ,Analog watchdog channel selection" "Channel 00,Channel 01,,,Channel 04,,,Channel 07,?..."
|
|
elif ((cpuis("STM32L011F?"))||(cpuis("STM32L021F?")))
|
|
bitfld.long 0x00 26.--30. " AWDCH[4:0] ,Analog watchdog channel selection" "Channel 00,Channel 01,Channel 02,Channel 03,Channel 04,Channel 05,Channel 06,Channel 07,,Channel 09,?..."
|
|
else
|
|
bitfld.long 0x00 26.--30. " AWDCH[4:0] ,Analog watchdog channel selection" "Channel 00,Channel 01,Channel 02,Channel 03,Channel 04,Channel 05,Channel 06,Channel 07,Channel 08,Channel 09,?..."
|
|
endif
|
|
bitfld.long 0x00 23. " AWDEN ,Analog watchdog enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " AWDSGL ,Enable the watchdog on a single channel or on all channels" "All,Single"
|
|
bitfld.long 0x00 16. " DISCEN ,Discontinuous mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " AUTOFF ,Auto-off mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " WAIT ,Wait conversion mode" "Off,On"
|
|
rbitfld.long 0x00 13. " CONT ,Single/continuous conversion mode" "Single,Continuous"
|
|
bitfld.long 0x00 12. " OVRMOD ,Overrun management mode" "Preserved,Overwritten"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " EXTEN[1:0] ,External trigger enable and polarity selection" "Disabled,Rising edge,Falling edge,Both edges"
|
|
sif ((cpu()=="STM32L011D3")||(cpu()=="STM32L011D4")||(cpu()=="STM32L011E3")||(cpu()=="STM32L011E4")||(cpu()=="STM32L011F3")||(cpu()=="STM32L011F4")||(cpu()=="STM32L011G3")||(cpu()=="STM32L011G4")||(cpu()=="STM32L011K3")||(cpu()=="STM32L011K4")||(cpu()=="STM32L021D4")||(cpu()=="STM32L021F4")||(cpu()=="STM32L021G4")||(cpu()=="STM32L021K4"))
|
|
bitfld.long 0x00 6.--8. " EXTSEL[2:0] ,External trigger selection" ",TIM21_CH2,TIM2_TRGO,TIM2_CH4,,,,EXTI line 11"
|
|
elif ((cpu()=="STM32L031C4")||(cpu()=="STM32L031C6")||(cpu()=="STM32L031E4")||(cpu()=="STM32L031E6")||(cpu()=="STM32L031F4")||(cpu()=="STM32L031F6")||(cpu()=="STM32L031G4")||(cpu()=="STM32L031G6")||(cpu()=="STM32L031K4")||(cpu()=="STM32L031K6")||(cpu()=="STM32L041C6")||(cpu()=="STM32L041F6")||(cpu()=="STM32L041G6")||(cpu()=="STM32L041K6"))
|
|
bitfld.long 0x00 6.--8. " EXTSEL[2:0] ,External trigger selection" ",TIM21_CH2,TIM2_TRGO,TIM2_CH4,TIM22_TRGO,,,EXTI line 11"
|
|
else
|
|
bitfld.long 0x00 6.--8. " EXTSEL[2:0] ,External trigger selection" "TIM6_TRGO,TIM21_CH2,TIM2_TRGO,TIM2_CH4,TIM22_TRGO,,,EXTI line 11"
|
|
endif
|
|
bitfld.long 0x00 5. " ALIGN ,Data alignment" "Right,Left"
|
|
bitfld.long 0x00 3.--4. " RES[1:0] ,Data resolution" "12 bits,10 bits,8 bits,6 bits"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SCANDIR ,Scan sequence direction" "Upward,Backward"
|
|
bitfld.long 0x00 1. " DMACFG ,Direct memory access configuration" "One shot,Circular"
|
|
bitfld.long 0x00 0. " DMAEN ,Direct memory access enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "ADC_CFGR2,ADC configuration register 2"
|
|
bitfld.long 0x00 30.--31. " CKMODE[1:0] ,ADC clock mode" "ADCCLK,PCLK/2,PCLK/4,PCLK"
|
|
bitfld.long 0x00 9. " TOVS ,Triggered Oversampling" "Consecutively after a trigger,Each needs a trigger"
|
|
bitfld.long 0x00 5.--8. " OVSS[3:0] ,Oversampling shift" "None,1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,..."
|
|
bitfld.long 0x00 2.--4. " OVSR[2:0] ,Oversampling ratio" "2,4,8,16,32,64,128,256,..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " OVSE ,Oversampler Enable" "Disabled,Enabled"
|
|
line.long 0x04 "ADC_SMPR,ADC sampling time register"
|
|
bitfld.long 0x04 0.--2. " SMP[2:0] ,Sampling time selection" "1.5 cycles,3.5 cycles,7.5 cycles,12.5 cycles,19.5 cycles,39.5 cycles,79.5 cycles,160.5 cycles"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "ADC_TR,ADC watchdog threshold register"
|
|
hexmask.long.word 0x00 16.--27. 0x1 " HT[11:0] ,Analog watchdog higher threshold"
|
|
hexmask.long.word 0x00 0.--11. 0x1 " LT[11:0] ,Analog watchdog lower threshold"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "ADC_CHSELR,ADC channel selection register"
|
|
sif ((!cpuis("STM32L011D?"))&&(!cpuis("STM32L021D?"))&&(!cpuis("STM32L011F?"))&&(!cpuis("STM32L021F?")))
|
|
sif (cpuis("STM32L051R*"))||(cpuis("STM32L062K8"))||(cpuis("STM32L052R*"))||(cpuis("STM32L063R8"))||(cpuis("STM32L053R*"))||(cpuis("STM32L07?R*"))||(cpuis("STM32L07?V*"))||(cpuis("STM32L08?R*"))||(cpuis("STM32L08?V*"))
|
|
bitfld.long 0x00 15. " CHSEL15 ,Channel-15 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 14. " CHSEL14 ,Channel-14 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 13. " CHSEL13 ,Channel-13 selection" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CHSEL12 ,Channel-12 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 11. " CHSEL11 ,Channel-11 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 10. " CHSEL10 ,Channel-10 selection" "Not selected,Selected"
|
|
textline " "
|
|
elif ((cpuis("STM32L071C?"))||(cpuis("STM32L072C?"))||(cpuis("STM32L081C?"))||(cpuis("STM32L082C?")))
|
|
bitfld.long 0x00 15. " CHSEL15 ,Channel-15 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 14. " CHSEL14 ,Channel-14 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 13. " CHSEL13 ,Channel-13 selection" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CHSEL12 ,Channel-12 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 11. " CHSEL11 ,Channel-11 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 10. " CHSEL10 ,Channel-10 selection" "Not selected,Selected"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 9. " CHSEL9 ,Channel-9 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 8. " CHSEL8 ,Channel-8 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " CHSEL7 ,Channel-7 selection" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CHSEL6 ,Channel-6 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " CHSEL5 ,Channel-5 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 4. " CHSEL4 ,Channel-4 selection" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CHSEL3 ,Channel-3 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " CHSEL2 ,Channel-2 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " CHSEL1 ,Channel-1 selection" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CHSEL0 ,Channel-0 selection" "Not selected,Selected"
|
|
else
|
|
sif ((cpuis("STM32L011F?"))||(cpuis("STM32L021F?")))
|
|
bitfld.long 0x00 9. " CHSEL9 ,Channel-9 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 7. " CHSEL7 ,Channel-7 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 6. " CHSEL6 ,Channel-6 selection" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CHSEL5 ,Channel-5 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 4. " CHSEL4 ,Channel-4 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " CHSEL3 ,Channel-3 selection" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CHSEL2 ,Channel-2 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " CHSEL1 ,Channel-1 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " CHSEL0 ,Channel-0 selection" "Not selected,Selected"
|
|
else
|
|
bitfld.long 0x00 7. " CHSEL7 ,Channel-7 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 4. " CHSEL4 ,Channel-4 selection" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " CHSEL1 ,Channel-1 selection" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CHSEL0 ,Channel-0 selection" "Not selected,Selected"
|
|
endif
|
|
endif
|
|
if ((((per.l((ad:0x40012400+0x10)))&0x1)==0x0)&&(((per.l((ad:0x40012400+0xc)))&0x20)==0x0))
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "ADC_DR,ADC data register"
|
|
hexmask.long.word 0x00 0.--11. 0x01 " DATA[15:0] ,Converted data"
|
|
elif ((((per.l((ad:0x40012400+0x10)))&0x1)==0x0)&&(((per.l((ad:0x40012400+0xc)))&0x20)==0x0))
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "ADC_DR,ADC data register"
|
|
hexmask.long.word 0x00 4.--15. 0x01 " DATA[15:0] ,Converted data"
|
|
else
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "ADC_DR,ADC data register"
|
|
hexmask.long.word 0x00 0.--15. 0x01 " DATA[15:0] ,Converted data"
|
|
endif
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "ADC_CALFACT,ADC Calibration factor"
|
|
hexmask.long.byte 0x00 0.--6. 0x01 " CALFACT[6:0] ,Calibration factor"
|
|
sif (cpuis("STM32L0?3*"))
|
|
group.long 0x308++0x03
|
|
line.long 0x00 "ADC_CCR,ADC common configuration register"
|
|
bitfld.long 0x00 25. " LFMEN ,Low Frequency Mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " VLCDEN ,VLCD reading circuitry enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TSEN ,Temperature sensor enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " VREFEN ,Temperature sensor and VREFINT enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--21. " PRESC[3:0] ,ADC prescaler" "/1,/2,/4,/6,/8,/10,/12,/16,/32,/64,/128,/256,..."
|
|
else
|
|
group.long 0x308++0x03
|
|
line.long 0x00 "ADC_CCR,ADC common configuration register"
|
|
bitfld.long 0x00 25. " LFMEN ,Low Frequency Mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TSEN ,Temperature sensor enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " VREFEN ,Temperature sensor and VREFINT enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18.--21. " PRESC[3:0] ,ADC prescaler" "/1,/2,/4,/6,/8,/10,/12,/16,/32,/64,/128,/256,..."
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
sif (!CPUIS("STM32L0?1*"))
|
|
sif (cpuis("STM32L05*")||cpuis("STM32L06*"))
|
|
tree "DAC (Digital to Analog Converter)"
|
|
base ad:0x40007400
|
|
width 13.
|
|
if ((per.l(ad:0x40007400)&0x04)==0x04)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DAC_CR,DAC control register"
|
|
bitfld.long 0x00 13. " DMAUDRIE1 ,DAC channel 1 DMA underrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " DMAEN1 ,DAC channel1 DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " MAMP1[3:0] ,DAC channel 1 mask/amplitude selector" "[0]/1,[1:0]/3,[2:0]/7,[3:0]/15,[4:0]/31,[5:0]/63,[6:0]/127,[7:0]/255,[8:0]/511,[9:0]/1023,[10:0]/2047,[11:0]/4095,[11:0]/4095,[11:0]/4095,[11:0]/4095,[11:0]/4095"
|
|
bitfld.long 0x00 6.--7. " WAVE1[1:0] ,DAC channel 1 noise/triangle wave generation enable" "Wave generation disabled,Noise wave generation enabled,Triangle wave generation enabled,Triangle wave generation enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " TSEL1 ,DAC channel 1 Trigger selection" "Timer 6 TRGO,,,Timer 21 TRGO,Timer 2 TRGO,,External line 9,Software trigger"
|
|
bitfld.long 0x00 2. " TEN1 ,DAC channel 1 Trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " BOFF1 ,DAC channel 1 output buffer disable" "No,Yes"
|
|
bitfld.long 0x00 0. " EN1 ,DAC channel 1 enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DAC_CR,DAC control register"
|
|
bitfld.long 0x00 13. " DMAUDRIE1 ,DAC channel1 DMA underrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " DMAEN1 ,DAC channel1 DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " MAMP1[3:0],DAC channel 1 mask/amplitude selector" "[0]/1,[1:0]/3,[2:0]/7,[3:0]/15,[4:0]/31,[5:0]/63,[6:0]/127,[7:0]/255,[8:0]/511,[9:0]/1023,[10:0]/2047,[11:0]/4095,[11:0]/4095,[11:0]/4095,[11:0]/4095,[11:0]/4095"
|
|
bitfld.long 0x00 2. " TEN1 ,DAC channel 1 Trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BOFF1 ,DAC channel 1 output buffer disable" "No,Yes"
|
|
bitfld.long 0x00 0. " EN1 ,DAC channel 1 enable" "Disabled,Enabled"
|
|
endif
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "DAC_SWTRIGR,DAC Software Trigger Register"
|
|
bitfld.long 0x00 0. " SWTRIG1 ,DAC channel 1 software trigger" "Disable,Enable"
|
|
group.long 0x08++0x0B
|
|
line.long 0x00 "DAC_DHR12R1,DAC channel 1 12-bit Right-aligned Data Holding Register"
|
|
hexmask.long.word 0x00 0.--11. 0x01 " DACC1DHR ,DAC channel1 12-bit Right aligned data"
|
|
line.long 0x04 "DAC_DHR12L1,DAC channel 1 12-bit Left aligned Data Holding Register"
|
|
hexmask.long.word 0x04 4.--15. 0x01 " DACC1DHR ,DAC channel1 12-bit Left aligned data"
|
|
line.long 0x08 "DAC_DHR8R1,DAC channel 1 8-bit Right aligned Data Holding Register"
|
|
hexmask.long.byte 0x08 0.--7. 0x01 " DACC1DHR ,DAC channel1 8-bit Right aligned data"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "DAC_DOR1,DAC channel 1 Data Output Register"
|
|
hexmask.long.word 0x00 0.--11. 0x01 " DACC1DOR ,DAC channel 1 data output"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DAC_SR,DAC status register"
|
|
eventfld.long 0x00 13. " DMAUDR1 ,DAC channel 1 DMA underrun flag" "No error,Error"
|
|
width 0xb
|
|
tree.end
|
|
else
|
|
tree "DAC (Digital to Analog Converter)"
|
|
base ad:0x40007400
|
|
width 13.
|
|
if ((per.l(ad:0x40007400)&0x40004)==0x40004)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DAC_CR,DAC control register"
|
|
bitfld.long 0x00 29. " DMAUDRIE2 ,DAC channel 2 DMA underrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " DMAEN2 ,DAC channel 2 DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--27. " MAMP2[3:0] ,DAC channel 2 mask/amplitude selector" "[0]/1,[1:0]/3,[2:0]/7,[3:0]/15,[4:0]/31,[5:0]/63,[6:0]/127,[7:0]/255,[8:0]/511,[9:0]/1023,[10:0]/2047,[11:0]/4095,[11:0]/4095,[11:0]/4095,[11:0]/4095,[11:0]/4095"
|
|
bitfld.long 0x00 22.--23. " WAVE2[1:0] ,DAC channel 2 noise/triangle wave generation enable" "Wave generation disabled,Noise wave generation enabled,Triangle wave generation enabled,Triangle wave generation enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " TSEL2 ,DAC channel 2 Trigger selection" "Timer 6 TRGO,,,Timer 21 TRGO,Timer 2 TRGO,,External line 9,Software trigger"
|
|
bitfld.long 0x00 18. " TEN2 ,DAC channel 2 Trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " BOFF1 ,DAC channel 2 output buffer disable" "No,Yes"
|
|
bitfld.long 0x00 16. " EN2 ,DAC channel 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DMAUDRIE1 ,DAC channel 1 DMA underrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " DMAEN1 ,DAC channel1 DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " MAMP1[3:0] ,DAC channel 1 mask/amplitude selector" "[0]/1,[1:0]/3,[2:0]/7,[3:0]/15,[4:0]/31,[5:0]/63,[6:0]/127,[7:0]/255,[8:0]/511,[9:0]/1023,[10:0]/2047,[11:0]/4095,[11:0]/4095,[11:0]/4095,[11:0]/4095,[11:0]/4095"
|
|
bitfld.long 0x00 6.--7. " WAVE1[1:0] ,DAC channel 1 noise/triangle wave generation enable" "Wave generation disabled,Noise wave generation enabled,Triangle wave generation enabled,Triangle wave generation enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " TSEL1 ,DAC channel 1 Trigger selection" "Timer 6 TRGO,,,Timer 21 TRGO,Timer 2 TRGO,,External line 9,Software trigger"
|
|
bitfld.long 0x00 2. " TEN1 ,DAC channel 1 Trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " BOFF1 ,DAC channel 1 output buffer disable" "No,Yes"
|
|
bitfld.long 0x00 0. " EN1 ,DAC channel 1 enable" "Disabled,Enabled"
|
|
elif (((per.l(ad:0x40007400)&0x40004)==0x04))
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DAC_CR,DAC control register"
|
|
bitfld.long 0x00 29. " DMAUDRIE2 ,DAC channel 2 DMA underrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " DMAEN2 ,DAC channel1 DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--27. " MAMP2[3:0],DAC channel 2 mask/amplitude selector" "[0]/1,[1:0]/3,[2:0]/7,[3:0]/15,[4:0]/31,[5:0]/63,[6:0]/127,[7:0]/255,[8:0]/511,[9:0]/1023,[10:0]/2047,[11:0]/4095,[11:0]/4095,[11:0]/4095,[11:0]/4095,[11:0]/4095"
|
|
bitfld.long 0x00 18. " TEN2 ,DAC channel 2 Trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BOFF2 ,DAC channel 2 output buffer disable" "No,Yes"
|
|
bitfld.long 0x00 16. " EN2 ,DAC channel 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DMAUDRIE1 ,DAC channel 1 DMA underrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " DMAEN1 ,DAC channel1 DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " MAMP1[3:0] ,DAC channel 1 mask/amplitude selector" "[0]/1,[1:0]/3,[2:0]/7,[3:0]/15,[4:0]/31,[5:0]/63,[6:0]/127,[7:0]/255,[8:0]/511,[9:0]/1023,[10:0]/2047,[11:0]/4095,[11:0]/4095,[11:0]/4095,[11:0]/4095,[11:0]/4095"
|
|
bitfld.long 0x00 6.--7. " WAVE1[1:0] ,DAC channel 1 noise/triangle wave generation enable" "Wave generation disabled,Noise wave generation enabled,Triangle wave generation enabled,Triangle wave generation enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " TSEL1 ,DAC channel 1 Trigger selection" "Timer 6 TRGO,,,Timer 21 TRGO,Timer 2 TRGO,,External line 9,Software trigger"
|
|
bitfld.long 0x00 2. " TEN1 ,DAC channel 1 Trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " BOFF1 ,DAC channel 1 output buffer disable" "No,Yes"
|
|
bitfld.long 0x00 0. " EN1 ,DAC channel 1 enable" "Disabled,Enabled"
|
|
elif (((per.l(ad:0x40007400)&0x40004)==0x40000))
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DAC_CR,DAC control register"
|
|
bitfld.long 0x00 29. " DMAUDRIE2 ,DAC channel 2 DMA underrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " DMAEN2 ,DAC channel 2 DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--27. " MAMP2[3:0] ,DAC channel 2 mask/amplitude selector" "[0]/1,[1:0]/3,[2:0]/7,[3:0]/15,[4:0]/31,[5:0]/63,[6:0]/127,[7:0]/255,[8:0]/511,[9:0]/1023,[10:0]/2047,[11:0]/4095,[11:0]/4095,[11:0]/4095,[11:0]/4095,[11:0]/4095"
|
|
bitfld.long 0x00 22.--23. " WAVE2[1:0] ,DAC channel 2 noise/triangle wave generation enable" "Wave generation disabled,Noise wave generation enabled,Triangle wave generation enabled,Triangle wave generation enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " TSEL2 ,DAC channel 2 Trigger selection" "Timer 6 TRGO,,,Timer 21 TRGO,Timer 2 TRGO,,External line 9,Software trigger"
|
|
bitfld.long 0x00 18. " TEN2 ,DAC channel 2 Trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " BOFF1 ,DAC channel 2 output buffer disable" "No,Yes"
|
|
bitfld.long 0x00 16. " EN2 ,DAC channel 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DMAUDRIE1 ,DAC channel 1 DMA underrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " DMAEN1 ,DAC channel1 DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " MAMP1[3:0],DAC channel 1 mask/amplitude selector" "[0]/1,[1:0]/3,[2:0]/7,[3:0]/15,[4:0]/31,[5:0]/63,[6:0]/127,[7:0]/255,[8:0]/511,[9:0]/1023,[10:0]/2047,[11:0]/4095,[11:0]/4095,[11:0]/4095,[11:0]/4095,[11:0]/4095"
|
|
bitfld.long 0x00 2. " TEN1 ,DAC channel 1 Trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BOFF1 ,DAC channel 1 output buffer disable" "No,Yes"
|
|
bitfld.long 0x00 0. " EN1 ,DAC channel 1 enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DAC_CR,DAC control register"
|
|
bitfld.long 0x00 29. " DMAUDRIE2 ,DAC channel 2 DMA underrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " DMAEN2 ,DAC channel1 DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--27. " MAMP2[3:0],DAC channel 2 mask/amplitude selector" "[0]/1,[1:0]/3,[2:0]/7,[3:0]/15,[4:0]/31,[5:0]/63,[6:0]/127,[7:0]/255,[8:0]/511,[9:0]/1023,[10:0]/2047,[11:0]/4095,[11:0]/4095,[11:0]/4095,[11:0]/4095,[11:0]/4095"
|
|
bitfld.long 0x00 18. " TEN2 ,DAC channel 2 Trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BOFF2 ,DAC channel 2 output buffer disable" "No,Yes"
|
|
bitfld.long 0x00 16. " EN2 ,DAC channel 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DMAUDRIE1 ,DAC channel 1 DMA underrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " DMAEN1 ,DAC channel1 DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " MAMP1[3:0],DAC channel 1 mask/amplitude selector" "[0]/1,[1:0]/3,[2:0]/7,[3:0]/15,[4:0]/31,[5:0]/63,[6:0]/127,[7:0]/255,[8:0]/511,[9:0]/1023,[10:0]/2047,[11:0]/4095,[11:0]/4095,[11:0]/4095,[11:0]/4095,[11:0]/4095"
|
|
bitfld.long 0x00 2. " TEN1 ,DAC channel 1 Trigger enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BOFF1 ,DAC channel 1 output buffer disable" "No,Yes"
|
|
bitfld.long 0x00 0. " EN1 ,DAC channel 1 enable" "Disabled,Enabled"
|
|
endif
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "DAC_SWTRIGR,DAC Software Trigger Register"
|
|
bitfld.long 0x00 1. " SWTRIG2 ,DAC channel 2 software trigger" "Disable,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWTRIG1 ,DAC channel 1 software trigger" "Disable,Enable"
|
|
group.long 0x08++0x23
|
|
line.long 0x00 "DAC_DHR12R1,DAC channel 1 12-bit Right-aligned Data Holding Register"
|
|
hexmask.long.word 0x00 0.--11. 0x01 " DACC1DHR ,DAC channel 1 12-bit Right aligned data"
|
|
line.long 0x04 "DAC_DHR12L1,DAC channel 1 12-bit Left aligned Data Holding Register"
|
|
hexmask.long.word 0x04 4.--15. 0x01 " DACC1DHR ,DAC channel 1 12-bit Left aligned data"
|
|
line.long 0x08 "DAC_DHR8R1,DAC channel 1 8-bit Right aligned Data Holding Register"
|
|
hexmask.long.byte 0x08 0.--7. 0x01 " DACC1DHR ,DAC channel 1 8-bit Right aligned data"
|
|
line.long 0x0C "DAC_DHR12R2,DAC channel 2 12-bit Right-aligned Data Holding Register"
|
|
hexmask.long.word 0x00 0.--11. 0x01 " DACC1DHR ,DAC channel 1 12-bit Right aligned data"
|
|
line.long 0x10 "DAC_DHR12L2,DAC channel 2 12-bit Left aligned Data Holding Register"
|
|
hexmask.long.word 0x04 4.--15. 0x01 " DACC1DHR ,DAC channel 1 12-bit Left aligned data"
|
|
line.long 0x14 "DAC_DHR8R2,DAC channel 2 8-bit Right aligned Data Holding Register"
|
|
hexmask.long.byte 0x08 0.--7. 0x01 " DACC2DHR ,DAC channel 2 8-bit Right aligned data"
|
|
line.long 0x18 "DAC_DHR12RD,Dual DAC 12-bit Right aligned Data Holding Register"
|
|
hexmask.long.word 0x18 16.--27. 0x01 " DACC2DHR ,DAC channel 2 12-bit Right aligned data"
|
|
hexmask.long.word 0x18 0.--11. 0x01 " DACC1DHR ,DAC channel 1 12-bit Right aligned data"
|
|
line.long 0x18 "DAC_DHR12LD,Dual DAC 12-bit Left aligned Data Holding Register"
|
|
hexmask.long.word 0x18 20.--31. 0x01 " DACC2DHR ,DAC channel 2 12-bit Left aligned data"
|
|
hexmask.long.word 0x18 4.--14. 0x01 " DACC1DHR ,DAC channel 1 12-bit Left aligned data"
|
|
line.long 0x1C "DAC_DHR8RD,Dual DAC 8-bit right-aligned data holding register"
|
|
hexmask.long.byte 0x08 8.--15. 0x1C " DACC2DHR ,DAC channel 2 8-bit Right aligned data"
|
|
hexmask.long.byte 0x08 0.--7. 0x1C " DACC1DHR ,DAC channel 1 8-bit Right aligned data"
|
|
rgroup.long 0x2C++0x07
|
|
line.long 0x00 "DAC_DOR1,DAC channel 1 Data Output Register"
|
|
hexmask.long.word 0x00 0.--11. 0x01 " DACC1DOR ,DAC channel 1 data output"
|
|
line.long 0x04 "DAC_DOR2,DAC channel 2 Data Output Register"
|
|
hexmask.long.word 0x00 0.--11. 0x01 " DACC2DOR ,DAC channel 2 data output"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DAC_SR,DAC status register"
|
|
eventfld.long 0x00 29. " DMAUDR2 ,DAC channel 2 DMA underrun flag" "No error,Error"
|
|
eventfld.long 0x00 13. " DMAUDR1 ,DAC channel 1 DMA underrun flag" "No error,Error"
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
endif
|
|
sif cpuis("STM32L0?3*")
|
|
tree "LCD (Liquid crystal display controller)"
|
|
base ad:0x40002400
|
|
sif ((cpu()=="STM32L073CB")||(cpu()=="STM32L073CZ")||(cpu()=="STM32L083CB")||(cpu()=="STM32L083CZ"))
|
|
width 9.
|
|
if ((((per.w((ad:0x40002400+0x08)))&0x01)==0x00))
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "LCD_CR,LCD control register"
|
|
bitfld.long 0x00 7. " MUX_SEG ,Mux segment enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " BIAS ,Bias selector" "Bias/4,Bias/2,Bias/3,"
|
|
bitfld.long 0x00 2.--4. " DUTY ,Duty selection" "Static,Duty/2,Duty/3,Duty/4,Duty/8,..."
|
|
bitfld.long 0x00 1. " VSEL ,Voltage source selection" "Internal,External"
|
|
bitfld.long 0x00 0. " LCDEN ,LCD controller enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40002400+0x08)))&0x01)==0x00))
|
|
rgroup.long 0x00++0xB
|
|
line.long 0x00 "LCD_CR,LCD control register"
|
|
bitfld.long 0x00 7. " MUX_SEG ,Mux segment enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " BIAS ,Bias selector" "Bias/4,Bias/2,Bias/3,"
|
|
bitfld.long 0x00 2.--4. " DUTY ,Duty selection" "Static,Duty/2,Duty/3,Duty/4,Duty/8,..."
|
|
bitfld.long 0x00 1. " VSEL ,Voltage source selection" "Internal,External"
|
|
bitfld.long 0x00 0. " LCDEN ,LCD controller enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x04++0x7
|
|
line.long 0x00 "LCD_FCR,LCD frame control register"
|
|
bitfld.long 0x00 22.--25. " PS ,PS 16-bit prescaler" "LCDCLK,LCDCLK/2,LCDCLK/4,LCDCLK/8,LCDCLK/16,LCDCLK/32,LCDCLK/64,LCDCLK/128,LCDCLK/256,LCDCLK/512,LCDCLK/1024,LCDCLK/2048,LCDCLK/4096,LCDCLK/8192,LCDCLK/16384,LCDCLK/32768"
|
|
bitfld.long 0x00 18.--21. " DIV ,DIV clock divider" "ck_ps/16,ck_ps/17,ck_ps/18,ck_ps/19,ck_ps/20,ck_ps/21,ck_ps/22,ck_ps/23,ck_ps/24,ck_ps/25,ck_ps/26,ck_ps/27,ck_ps/28,ck_ps/29,ck_ps/30,ck_ps/31"
|
|
bitfld.long 0x00 16.--17. " BLINK ,Blink mode selection" "Disabled,SEG[0]/COM[0],SEG[0]/all COMs,All SEGs/COMs"
|
|
bitfld.long 0x00 13.--15. " BLINKF ,Blink frequency selection" "Flcd/8,Flcd/16,Flcd/32,Flcd/64,Flcd/128,Flcd/256,Flcd/512,Flcd/1024"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " CC ,Contrast control" "2.6V,2.73V,2.86V,2.98V,3.12V,3.26V,3.4V,3.55V"
|
|
bitfld.long 0x00 7.--9. " DEAD ,Dead time duration" "No dead time,1 phase,2 phase,3 phase,4 phase,5 phase,6 phase,7 phase"
|
|
bitfld.long 0x00 4.--6. " PON ,Pulse ON duration" "0,1/ck_ps,2/ck_ps,3/ck_ps,4/ck_ps,5/ck_ps,6/ck_ps,7/ck_ps"
|
|
bitfld.long 0x00 3. " UDDIE ,Update display done interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SOFIE ,Start of frame interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " HD ,High drive enable" "Disabled,Enabled"
|
|
line.long 0x04 "LCD_SR,LCD status register"
|
|
rbitfld.long 0x04 5. " FCRSF ,LCD Frame Control Register Synchronization flag" "Not synchronized,Synchronized"
|
|
rbitfld.long 0x04 4. " RDY ,Ready flag" "Not ready,Ready"
|
|
rbitfld.long 0x04 3. " UDD ,Update Display Done" "No event,Interrupt"
|
|
bitfld.long 0x04 2. " UDR ,Update display request" "No effect,Requested"
|
|
textline " "
|
|
rbitfld.long 0x04 1. " SOF ,Start of frame flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 0. " ENS ,LCD enabled status" "Disabled,Enabled"
|
|
wgroup.long 0x0C++0x3
|
|
line.long 0x00 "LCD_CLR,LCD clear register"
|
|
bitfld.long 0x00 3. " UDDC ,Update display done clear" "No effect,Clear"
|
|
bitfld.long 0x00 1. " SOFC ,Start of frame flag clear" "No effect,Clear"
|
|
width 14.
|
|
tree "LCD RAM (Display memory)"
|
|
sif ((cpuis("STM32L073CB*"))||(cpuis("STM32L073CZ*"))||(cpuis("STM32L083CB*"))||(cpuis("STM32L083CZ*")))
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "LCD_RAM_COM0,LCD display memory for COM$3"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
else
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "LCD_RAM_COM0,LCD display memory for COM$3"
|
|
bitfld.long 0x00 31. " S31 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 30. " S30 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 29. " S29 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 28. " S28 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " S27 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 26. " S26 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 25. " S25 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 24. " S24 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " S23 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 22. " S22 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 21. " S21 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 20. " S20 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S19 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S18 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
sif ((CPUIS("STM32L07*")||CPUIS("STM32L08*"))&&(!cpuis("STM32L083RB*")&&!cpuis("STM32L083RZ*")&&!cpuis("STM32L073RB*")&&!cpuis("STM32L073RZ*")))
|
|
group.long (0x14+0x04)++0x3
|
|
line.long 0x00 "LCD_RAM_COM0"
|
|
bitfld.long 0x00 19. " S51 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S50 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S49 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S48 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S47 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S46 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S45 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S44 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S43 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S42 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S41 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S40 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S39 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S38 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S37 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S36 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S35 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S34 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S33 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S32 ,Segment data" "Inactive,Active"
|
|
endif
|
|
endif
|
|
sif ((cpuis("STM32L073CB*"))||(cpuis("STM32L073CZ*"))||(cpuis("STM32L083CB*"))||(cpuis("STM32L083CZ*")))
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "LCD_RAM_COM1,LCD display memory for COM$3"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
else
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "LCD_RAM_COM1,LCD display memory for COM$3"
|
|
bitfld.long 0x00 31. " S31 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 30. " S30 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 29. " S29 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 28. " S28 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " S27 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 26. " S26 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 25. " S25 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 24. " S24 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " S23 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 22. " S22 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 21. " S21 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 20. " S20 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S19 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S18 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
sif ((CPUIS("STM32L07*")||CPUIS("STM32L08*"))&&(!cpuis("STM32L083RB*")&&!cpuis("STM32L083RZ*")&&!cpuis("STM32L073RB*")&&!cpuis("STM32L073RZ*")))
|
|
group.long (0x1C+0x04)++0x3
|
|
line.long 0x00 "LCD_RAM_COM1"
|
|
bitfld.long 0x00 19. " S51 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S50 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S49 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S48 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S47 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S46 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S45 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S44 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S43 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S42 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S41 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S40 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S39 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S38 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S37 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S36 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S35 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S34 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S33 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S32 ,Segment data" "Inactive,Active"
|
|
endif
|
|
endif
|
|
sif ((cpuis("STM32L073CB*"))||(cpuis("STM32L073CZ*"))||(cpuis("STM32L083CB*"))||(cpuis("STM32L083CZ*")))
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "LCD_RAM_COM2,LCD display memory for COM$3"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
else
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "LCD_RAM_COM2,LCD display memory for COM$3"
|
|
bitfld.long 0x00 31. " S31 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 30. " S30 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 29. " S29 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 28. " S28 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " S27 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 26. " S26 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 25. " S25 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 24. " S24 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " S23 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 22. " S22 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 21. " S21 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 20. " S20 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S19 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S18 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
sif ((CPUIS("STM32L07*")||CPUIS("STM32L08*"))&&(!cpuis("STM32L083RB*")&&!cpuis("STM32L083RZ*")&&!cpuis("STM32L073RB*")&&!cpuis("STM32L073RZ*")))
|
|
group.long (0x24+0x04)++0x3
|
|
line.long 0x00 "LCD_RAM_COM2"
|
|
bitfld.long 0x00 19. " S51 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S50 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S49 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S48 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S47 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S46 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S45 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S44 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S43 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S42 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S41 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S40 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S39 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S38 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S37 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S36 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S35 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S34 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S33 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S32 ,Segment data" "Inactive,Active"
|
|
endif
|
|
endif
|
|
sif ((cpuis("STM32L073CB*"))||(cpuis("STM32L073CZ*"))||(cpuis("STM32L083CB*"))||(cpuis("STM32L083CZ*")))
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "LCD_RAM_COM3,LCD display memory for COM$3"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
else
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "LCD_RAM_COM3,LCD display memory for COM$3"
|
|
bitfld.long 0x00 31. " S31 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 30. " S30 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 29. " S29 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 28. " S28 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " S27 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 26. " S26 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 25. " S25 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 24. " S24 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " S23 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 22. " S22 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 21. " S21 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 20. " S20 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S19 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S18 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
sif ((CPUIS("STM32L07*")||CPUIS("STM32L08*"))&&(!cpuis("STM32L083RB*")&&!cpuis("STM32L083RZ*")&&!cpuis("STM32L073RB*")&&!cpuis("STM32L073RZ*")))
|
|
group.long (0x2C+0x04)++0x3
|
|
line.long 0x00 "LCD_RAM_COM3"
|
|
bitfld.long 0x00 19. " S51 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S50 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S49 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S48 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S47 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S46 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S45 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S44 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S43 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S42 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S41 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S40 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S39 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S38 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S37 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S36 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S35 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S34 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S33 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S32 ,Segment data" "Inactive,Active"
|
|
endif
|
|
endif
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
width 9.
|
|
if ((((per.w((ad:0x40002400+0x08)))&0x01)==0x00))
|
|
group.long 0x00++0xB
|
|
line.long 0x00 "LCD_CR,LCD control register"
|
|
bitfld.long 0x00 7. " MUX_SEG ,Mux segment enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " BIAS ,Bias selector" "Bias/4,Bias/2,Bias/3,"
|
|
bitfld.long 0x00 2.--4. " DUTY ,Duty selection" "Static,Duty/2,Duty/3,Duty/4,Duty/8,..."
|
|
bitfld.long 0x00 1. " VSEL ,Voltage source selection" "Internal,External"
|
|
bitfld.long 0x00 0. " LCDEN ,LCD controller enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40002400+0x08)))&0x01)==0x00))
|
|
rgroup.long 0x00++0xB
|
|
line.long 0x00 "LCD_CR,LCD control register"
|
|
bitfld.long 0x00 7. " MUX_SEG ,Mux segment enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " BIAS ,Bias selector" "Bias/4,Bias/2,Bias/3,"
|
|
bitfld.long 0x00 2.--4. " DUTY ,Duty selection" "Static,Duty/2,Duty/3,Duty/4,Duty/8,..."
|
|
bitfld.long 0x00 1. " VSEL ,Voltage source selection" "Internal,External"
|
|
bitfld.long 0x00 0. " LCDEN ,LCD controller enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x04++0x7
|
|
line.long 0x00 "LCD_FCR,LCD frame control register"
|
|
bitfld.long 0x00 22.--25. " PS ,PS 16-bit prescaler" "LCDCLK,LCDCLK/2,LCDCLK/4,LCDCLK/8,LCDCLK/16,LCDCLK/32,LCDCLK/64,LCDCLK/128,LCDCLK/256,LCDCLK/512,LCDCLK/1024,LCDCLK/2048,LCDCLK/4096,LCDCLK/8192,LCDCLK/16384,LCDCLK/32768"
|
|
bitfld.long 0x00 18.--21. " DIV ,DIV clock divider" "ck_ps/16,ck_ps/17,ck_ps/18,ck_ps/19,ck_ps/20,ck_ps/21,ck_ps/22,ck_ps/23,ck_ps/24,ck_ps/25,ck_ps/26,ck_ps/27,ck_ps/28,ck_ps/29,ck_ps/30,ck_ps/31"
|
|
bitfld.long 0x00 16.--17. " BLINK ,Blink mode selection" "Disabled,SEG[0]/COM[0],SEG[0]/all COMs,All SEGs/COMs"
|
|
bitfld.long 0x00 13.--15. " BLINKF ,Blink frequency selection" "Flcd/8,Flcd/16,Flcd/32,Flcd/64,Flcd/128,Flcd/256,Flcd/512,Flcd/1024"
|
|
textline " "
|
|
bitfld.long 0x00 10.--12. " CC ,Contrast control" "2.6V,2.73V,2.86V,2.98V,3.12V,3.26V,3.4V,3.55V"
|
|
bitfld.long 0x00 7.--9. " DEAD ,Dead time duration" "No dead time,1 phase,2 phase,3 phase,4 phase,5 phase,6 phase,7 phase"
|
|
bitfld.long 0x00 4.--6. " PON ,Pulse ON duration" "0,1/ck_ps,2/ck_ps,3/ck_ps,4/ck_ps,5/ck_ps,6/ck_ps,7/ck_ps"
|
|
bitfld.long 0x00 3. " UDDIE ,Update display done interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SOFIE ,Start of frame interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " HD ,High drive enable" "Disabled,Enabled"
|
|
line.long 0x04 "LCD_SR,LCD status register"
|
|
rbitfld.long 0x04 5. " FCRSF ,LCD Frame Control Register Synchronization flag" "Not synchronized,Synchronized"
|
|
rbitfld.long 0x04 4. " RDY ,Ready flag" "Not ready,Ready"
|
|
rbitfld.long 0x04 3. " UDD ,Update Display Done" "No event,Interrupt"
|
|
bitfld.long 0x04 2. " UDR ,Update display request" "No effect,Requested"
|
|
textline " "
|
|
rbitfld.long 0x04 1. " SOF ,Start of frame flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 0. " ENS ,LCD enabled status" "Disabled,Enabled"
|
|
wgroup.long 0x0C++0x3
|
|
line.long 0x00 "LCD_CLR,LCD clear register"
|
|
bitfld.long 0x00 3. " UDDC ,Update display done clear" "No effect,Clear"
|
|
bitfld.long 0x00 1. " SOFC ,Start of frame flag clear" "No effect,Clear"
|
|
width 14.
|
|
tree "LCD RAM (Display memory)"
|
|
sif ((cpuis("STM32L073CB*"))||(cpuis("STM32L073CZ*"))||(cpuis("STM32L083CB*"))||(cpuis("STM32L083CZ*")))
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "LCD_RAM_COM0,LCD display memory for COM$3"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
else
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "LCD_RAM_COM0,LCD display memory for COM$3"
|
|
bitfld.long 0x00 31. " S31 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 30. " S30 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 29. " S29 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 28. " S28 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " S27 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 26. " S26 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 25. " S25 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 24. " S24 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " S23 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 22. " S22 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 21. " S21 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 20. " S20 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S19 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S18 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
sif ((CPUIS("STM32L07*")||CPUIS("STM32L08*"))&&(!cpuis("STM32L083RB*")&&!cpuis("STM32L083RZ*")&&!cpuis("STM32L073RB*")&&!cpuis("STM32L073RZ*")))
|
|
group.long (0x14+0x04)++0x3
|
|
line.long 0x00 "LCD_RAM_COM0"
|
|
bitfld.long 0x00 19. " S51 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S50 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S49 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S48 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S47 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S46 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S45 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S44 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S43 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S42 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S41 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S40 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S39 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S38 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S37 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S36 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S35 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S34 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S33 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S32 ,Segment data" "Inactive,Active"
|
|
endif
|
|
endif
|
|
sif ((cpuis("STM32L073CB*"))||(cpuis("STM32L073CZ*"))||(cpuis("STM32L083CB*"))||(cpuis("STM32L083CZ*")))
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "LCD_RAM_COM1,LCD display memory for COM$3"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
else
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "LCD_RAM_COM1,LCD display memory for COM$3"
|
|
bitfld.long 0x00 31. " S31 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 30. " S30 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 29. " S29 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 28. " S28 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " S27 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 26. " S26 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 25. " S25 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 24. " S24 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " S23 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 22. " S22 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 21. " S21 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 20. " S20 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S19 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S18 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
sif ((CPUIS("STM32L07*")||CPUIS("STM32L08*"))&&(!cpuis("STM32L083RB*")&&!cpuis("STM32L083RZ*")&&!cpuis("STM32L073RB*")&&!cpuis("STM32L073RZ*")))
|
|
group.long (0x1C+0x04)++0x3
|
|
line.long 0x00 "LCD_RAM_COM1"
|
|
bitfld.long 0x00 19. " S51 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S50 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S49 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S48 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S47 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S46 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S45 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S44 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S43 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S42 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S41 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S40 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S39 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S38 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S37 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S36 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S35 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S34 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S33 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S32 ,Segment data" "Inactive,Active"
|
|
endif
|
|
endif
|
|
sif ((cpuis("STM32L073CB*"))||(cpuis("STM32L073CZ*"))||(cpuis("STM32L083CB*"))||(cpuis("STM32L083CZ*")))
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "LCD_RAM_COM2,LCD display memory for COM$3"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
else
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "LCD_RAM_COM2,LCD display memory for COM$3"
|
|
bitfld.long 0x00 31. " S31 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 30. " S30 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 29. " S29 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 28. " S28 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " S27 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 26. " S26 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 25. " S25 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 24. " S24 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " S23 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 22. " S22 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 21. " S21 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 20. " S20 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S19 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S18 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
sif ((CPUIS("STM32L07*")||CPUIS("STM32L08*"))&&(!cpuis("STM32L083RB*")&&!cpuis("STM32L083RZ*")&&!cpuis("STM32L073RB*")&&!cpuis("STM32L073RZ*")))
|
|
group.long (0x24+0x04)++0x3
|
|
line.long 0x00 "LCD_RAM_COM2"
|
|
bitfld.long 0x00 19. " S51 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S50 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S49 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S48 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S47 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S46 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S45 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S44 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S43 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S42 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S41 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S40 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S39 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S38 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S37 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S36 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S35 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S34 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S33 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S32 ,Segment data" "Inactive,Active"
|
|
endif
|
|
endif
|
|
sif ((cpuis("STM32L073CB*"))||(cpuis("STM32L073CZ*"))||(cpuis("STM32L083CB*"))||(cpuis("STM32L083CZ*")))
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "LCD_RAM_COM3,LCD display memory for COM$3"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
else
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "LCD_RAM_COM3,LCD display memory for COM$3"
|
|
bitfld.long 0x00 31. " S31 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 30. " S30 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 29. " S29 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 28. " S28 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " S27 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 26. " S26 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 25. " S25 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 24. " S24 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " S23 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 22. " S22 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 21. " S21 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 20. " S20 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S19 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S18 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
sif ((CPUIS("STM32L07*")||CPUIS("STM32L08*"))&&(!cpuis("STM32L083RB*")&&!cpuis("STM32L083RZ*")&&!cpuis("STM32L073RB*")&&!cpuis("STM32L073RZ*")))
|
|
group.long (0x2C+0x04)++0x3
|
|
line.long 0x00 "LCD_RAM_COM3"
|
|
bitfld.long 0x00 19. " S51 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S50 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S49 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S48 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S47 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S46 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S45 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S44 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S43 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S42 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S41 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S40 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S39 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S38 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S37 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S36 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S35 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S34 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S33 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S32 ,Segment data" "Inactive,Active"
|
|
endif
|
|
endif
|
|
sif ((cpuis("STM32L073CB*"))||(cpuis("STM32L073CZ*"))||(cpuis("STM32L083CB*"))||(cpuis("STM32L083CZ*")))
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "LCD_RAM_COM4,LCD display memory for COM$3"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
else
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "LCD_RAM_COM4,LCD display memory for COM$3"
|
|
bitfld.long 0x00 31. " S31 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 30. " S30 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 29. " S29 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 28. " S28 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " S27 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 26. " S26 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 25. " S25 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 24. " S24 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " S23 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 22. " S22 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 21. " S21 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 20. " S20 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S19 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S18 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
sif ((CPUIS("STM32L07*")||CPUIS("STM32L08*"))&&(!cpuis("STM32L083RB*")&&!cpuis("STM32L083RZ*")&&!cpuis("STM32L073RB*")&&!cpuis("STM32L073RZ*")))
|
|
group.long (0x34+0x04)++0x3
|
|
line.long 0x00 "LCD_RAM_COM4"
|
|
bitfld.long 0x00 19. " S51 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S50 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S49 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S48 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S47 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S46 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S45 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S44 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S43 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S42 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S41 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S40 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S39 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S38 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S37 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S36 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S35 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S34 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S33 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S32 ,Segment data" "Inactive,Active"
|
|
endif
|
|
endif
|
|
sif ((cpuis("STM32L073CB*"))||(cpuis("STM32L073CZ*"))||(cpuis("STM32L083CB*"))||(cpuis("STM32L083CZ*")))
|
|
group.long 0x3C++0x3
|
|
line.long 0x00 "LCD_RAM_COM5,LCD display memory for COM$3"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
else
|
|
group.long 0x3C++0x3
|
|
line.long 0x00 "LCD_RAM_COM5,LCD display memory for COM$3"
|
|
bitfld.long 0x00 31. " S31 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 30. " S30 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 29. " S29 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 28. " S28 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " S27 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 26. " S26 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 25. " S25 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 24. " S24 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " S23 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 22. " S22 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 21. " S21 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 20. " S20 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S19 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S18 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
sif ((CPUIS("STM32L07*")||CPUIS("STM32L08*"))&&(!cpuis("STM32L083RB*")&&!cpuis("STM32L083RZ*")&&!cpuis("STM32L073RB*")&&!cpuis("STM32L073RZ*")))
|
|
group.long (0x3C+0x04)++0x3
|
|
line.long 0x00 "LCD_RAM_COM5"
|
|
bitfld.long 0x00 19. " S51 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S50 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S49 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S48 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S47 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S46 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S45 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S44 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S43 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S42 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S41 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S40 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S39 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S38 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S37 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S36 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S35 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S34 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S33 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S32 ,Segment data" "Inactive,Active"
|
|
endif
|
|
endif
|
|
sif ((cpuis("STM32L073CB*"))||(cpuis("STM32L073CZ*"))||(cpuis("STM32L083CB*"))||(cpuis("STM32L083CZ*")))
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "LCD_RAM_COM6,LCD display memory for COM$3"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
else
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "LCD_RAM_COM6,LCD display memory for COM$3"
|
|
bitfld.long 0x00 31. " S31 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 30. " S30 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 29. " S29 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 28. " S28 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " S27 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 26. " S26 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 25. " S25 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 24. " S24 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " S23 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 22. " S22 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 21. " S21 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 20. " S20 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S19 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S18 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
sif ((CPUIS("STM32L07*")||CPUIS("STM32L08*"))&&(!cpuis("STM32L083RB*")&&!cpuis("STM32L083RZ*")&&!cpuis("STM32L073RB*")&&!cpuis("STM32L073RZ*")))
|
|
group.long (0x44+0x04)++0x3
|
|
line.long 0x00 "LCD_RAM_COM6"
|
|
bitfld.long 0x00 19. " S51 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S50 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S49 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S48 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S47 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S46 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S45 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S44 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S43 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S42 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S41 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S40 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S39 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S38 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S37 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S36 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S35 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S34 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S33 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S32 ,Segment data" "Inactive,Active"
|
|
endif
|
|
endif
|
|
sif ((cpuis("STM32L073CB*"))||(cpuis("STM32L073CZ*"))||(cpuis("STM32L083CB*"))||(cpuis("STM32L083CZ*")))
|
|
group.long 0x4C++0x3
|
|
line.long 0x00 "LCD_RAM_COM7,LCD display memory for COM$3"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
else
|
|
group.long 0x4C++0x3
|
|
line.long 0x00 "LCD_RAM_COM7,LCD display memory for COM$3"
|
|
bitfld.long 0x00 31. " S31 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 30. " S30 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 29. " S29 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 28. " S28 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " S27 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 26. " S26 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 25. " S25 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 24. " S24 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " S23 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 22. " S22 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 21. " S21 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 20. " S20 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S19 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S18 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S17 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S16 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S15 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S14 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S13 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S12 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S11 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S10 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S9 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S8 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S7 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S6 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S5 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S4 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S3 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S2 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S1 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S0 ,Segment data" "Inactive,Active"
|
|
sif ((CPUIS("STM32L07*")||CPUIS("STM32L08*"))&&(!cpuis("STM32L083RB*")&&!cpuis("STM32L083RZ*")&&!cpuis("STM32L073RB*")&&!cpuis("STM32L073RZ*")))
|
|
group.long (0x4C+0x04)++0x3
|
|
line.long 0x00 "LCD_RAM_COM7"
|
|
bitfld.long 0x00 19. " S51 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 18. " S50 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 17. " S49 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 16. " S48 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " S47 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 14. " S46 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 13. " S45 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 12. " S44 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " S43 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 10. " S42 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 9. " S41 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 8. " S40 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " S39 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 6. " S38 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 5. " S37 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 4. " S36 ,Segment data" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " S35 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 2. " S34 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 1. " S33 ,Segment data" "Inactive,Active"
|
|
bitfld.long 0x00 0. " S32 ,Segment data" "Inactive,Active"
|
|
endif
|
|
endif
|
|
tree.end
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L0?2*"))||(cpuis("STM32L0?3*"))
|
|
tree "TSC (Touch sensing controller)"
|
|
base ad:0x40024000
|
|
width 12.
|
|
if (((per.l((ad:0x40024000+0x00)))&0x02)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "TSC_CR,TSC control register"
|
|
bitfld.long 0x00 28.--31. " CTPH[3:0] ,Charge transfer pulse high" "1x tPGCLK,2x tPGCLK,3x tPGCLK,4x tPGCLK,5x tPGCLK,6x tPGCLK,7x tPGCLK,8x tPGCLK,9x tPGCLK,10x tPGCLK,11x tPGCLK,12x tPGCLK,13x tPGCLK,14x tPGCLK,15x tPGCLK,16x tPGCLK"
|
|
bitfld.long 0x00 24.--27. " CTPL[3:0] ,Charge transfer pulse low" "1x tPGCLK,2x tPGCLK,3x tPGCLK,4x tPGCLK,5x tPGCLK,6x tPGCLK,7x tPGCLK,8x tPGCLK,9x tPGCLK,10x tPGCLK,11x tPGCLK,12x tPGCLK,13x tPGCLK,14x tPGCLK,15x tPGCLK,16x tPGCLK"
|
|
hexmask.long.byte 0x00 17.--23. 0x01 " SSD[6:0] ,Spread spectrum deviation"
|
|
bitfld.long 0x00 16. " SSE ,Spread spectrum enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SSPSC ,Spread spectrum prescaler" "Fhclk,Fhclk/2"
|
|
bitfld.long 0x00 12.--14. " PGPSC[2:0] ,Pulse generator prescaler" "Fhclk,Fhclk/2,Fhclk/4,Fhclk/8,Fhclk/16,Fhclk/32,Fhclk/64,Fhclk/128"
|
|
bitfld.long 0x00 5.--7. " MCV[2:0] ,Max count value" "255,511,1023,2047,4095,8191,16383,"
|
|
bitfld.long 0x00 4. " IOADEF ,I/O Default mode" "Output push-pull low,Input floating"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SYNCPOL ,Synchronization pin polarity" "Falling edge,Rising edge and high level"
|
|
bitfld.long 0x00 2. " AM ,Acquisition mode" "Normal,Synchronized"
|
|
bitfld.long 0x00 1. " START ,Start a new acquisition" "Not started,Started"
|
|
bitfld.long 0x00 0. " TSCE ,Touch sensing controller enable" "Disabled,Enabled"
|
|
elif (((per.l((ad:0x40024000+0x00)))&0x02)==0x02)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "TSC_CR,TSC control register"
|
|
rbitfld.long 0x00 28.--31. " CTPH[3:0] ,Charge transfer pulse high" "1x tPGCLK,2x tPGCLK,3x tPGCLK,4x tPGCLK,5x tPGCLK,6x tPGCLK,7x tPGCLK,8x tPGCLK,9x tPGCLK,10x tPGCLK,11x tPGCLK,12x tPGCLK,13x tPGCLK,14x tPGCLK,15x tPGCLK,16x tPGCLK"
|
|
rbitfld.long 0x00 24.--27. " CTPL[3:0] ,Charge transfer pulse low" "1x tPGCLK,2x tPGCLK,3x tPGCLK,4x tPGCLK,5x tPGCLK,6x tPGCLK,7x tPGCLK,8x tPGCLK,9x tPGCLK,10x tPGCLK,11x tPGCLK,12x tPGCLK,13x tPGCLK,14x tPGCLK,15x tPGCLK,16x tPGCLK"
|
|
hexmask.long.byte 0x00 17.--23. 0x01 " SSD[6:0] ,Spread spectrum deviation"
|
|
rbitfld.long 0x00 16. " SSE ,Spread spectrum enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " SSPSC ,Spread spectrum prescaler" "Fhclk,Fhclk/2"
|
|
rbitfld.long 0x00 12.--14. " PGPSC[2:0] ,Pulse generator prescaler" "Fhclk,Fhclk/2,Fhclk/4,Fhclk/8,Fhclk/16,Fhclk/32,Fhclk/64,Fhclk/128"
|
|
rbitfld.long 0x00 5.--7. " MCV[2:0] ,Max count value" "255,511,1023,2047,4095,8191,16383,"
|
|
rbitfld.long 0x00 4. " IODEF ,I/O Default mode" "Output push-pull low,Input floating"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SYNCPOL ,Synchronization pin polarity" "Falling edge,Rising edge and high level"
|
|
rbitfld.long 0x00 2. " AM ,Acquisition mode" "Normal,Synchronized"
|
|
bitfld.long 0x00 1. " START ,Start a new acquisition" "Not started,Started"
|
|
bitfld.long 0x00 0. " TSCE ,Touch sensing controller enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x04++0x0B
|
|
line.long 0x00 "TSC_set_clr,TSC interrupt register"
|
|
setclrfld.long 0x08 1. 0x00 1. 0x04 1. " MCE ,Max count error" "0,1"
|
|
setclrfld.long 0x08 0. 0x00 0. 0x04 0. " EOA ,End of acquisition" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TSC_IOHCR,TSC I/O hysteresis control register"
|
|
sif (!cpuis("STM32L063C8"))&&(!cpuis("STM32L053C6"))&&(!cpuis("STM32L053C8"))&&(!cpuis("STM32L052T6"))&&(!cpuis("STM32L052T8"))&&(!cpuis("STM32L052K6"))&&(!cpuis("STM32L052K8"))&&(!cpuis("STM32L052C6"))&&(!cpuis("STM32L053C8"))
|
|
bitfld.long 0x00 31. " G8_IO4 ,G8_IO4 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " G8_IO3 ,G8_IO3 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " G8_IO2 ,G8_IO2 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " G8_IO1 ,G8_IO1 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " G7_IO4 ,G7_IO4 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " G7_IO3 ,G7_IO3 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " G7_IO2 ,G7_IO2 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " G7_IO1 ,G7_IO1 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (cpuis("STM32L052T6"))||(cpuis("STM32L052T8"))
|
|
bitfld.long 0x00 22. " G6_IO3 ,G6_IO3 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " G6_IO1 ,G6_IO1 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
textline " "
|
|
elif (cpuis("STM32L052K6"))||(cpuis("STM32L052K8"))
|
|
bitfld.long 0x00 22. " G6_IO3 ,G6_IO3 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x00 23. " G6_IO4 ,G6_IO4 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " G6_IO3 ,G6_IO3 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " G6_IO2 ,G6_IO2 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " G6_IO1 ,G6_IO1 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 19. " G5_IO4 ,G5_IO4 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " G5_IO3 ,G5_IO3 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " G5_IO2 ,G5_IO2 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " G5_IO1 ,G5_IO1 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " G4_IO4 ,G4_IO4 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " G4_IO3 ,G4_IO3 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " G4_IO2 ,G4_IO2 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " G4_IO1 ,G4_IO1 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpuis("STM32L063C8"))||(cpuis("STM32L053C6"))||(cpuis("STM32L053C8"))||(cpuis("STM32L052T6"))||(cpuis("STM32L052T8"))||(cpuis("STM32L052C6"))||(cpuis("STM32L053C8"))
|
|
bitfld.long 0x00 11. " G3_IO4 ,G3_IO4 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " G3_IO3 ,G3_IO3 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " G3_IO2 ,G3_IO2 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
textline " "
|
|
elif (cpuis("STM32L052K6"))||(cpuis("STM32L052K8"))
|
|
bitfld.long 0x00 10. " G3_IO3 ,G3_IO3 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " G3_IO2 ,G3_IO2 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x00 11. " G3_IO4 ,G3_IO4 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " G3_IO3 ,G3_IO3 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " G3_IO2 ,G3_IO2 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " G3_IO1 ,G3_IO1 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 7. " G2_IO4 ,G2_IO4 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " G2_IO3 ,G2_IO3 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " G2_IO2 ,G2_IO2 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " G2_IO1 ,G2_IO1 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " G1_IO4 ,G1_IO4 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " G1_IO3 ,G1_IO3 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " G1_IO2 ,G1_IO2 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " G1_IO1 ,G1_IO1 Schmitt trigger hysteresis mode" "Disabled,Enabled"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "TSC_IOASCR,TSC I/O analog switch control register"
|
|
sif (!cpuis("STM32L063C8"))&&(!cpuis("STM32L053C6"))&&(!cpuis("STM32L053C8"))&&(!cpuis("STM32L052T6"))&&(!cpuis("STM32L052T8"))&&(!cpuis("STM32L052K6"))&&(!cpuis("STM32L052K8"))&&(!cpuis("STM32L052C6"))&&(!cpuis("STM32L053C8"))
|
|
bitfld.long 0x00 31. " G8_IO4 ,G8_IO4 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 30. " G8_IO3 ,G8_IO3 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 29. " G8_IO2 ,G8_IO2 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 28. " G8_IO1 ,G8_IO1 analog switch enable" "Opened,Closed"
|
|
textline " "
|
|
endif
|
|
sif (!cpuis("STM32L063C8"))&&(!cpuis("STM32L053C6"))&&(!cpuis("STM32L053C8"))&&(!cpuis("STM32L052T6"))&&(!cpuis("STM32L052T8"))&&(!cpuis("STM32L052K6"))&&(!cpuis("STM32L052K8"))&&(!cpuis("STM32L052C6"))&&(!cpuis("STM32L053C8"))
|
|
bitfld.long 0x00 27. " G7_IO4 ,G7_IO4 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 26. " G7_IO3 ,G7_IO3 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 25. " G7_IO2 ,G7_IO2 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 24. " G7_IO1 ,G7_IO1 analog switch enable" "Opened,Closed"
|
|
textline " "
|
|
endif
|
|
sif (cpuis("STM32L052T6"))||(cpuis("STM32L052T8"))
|
|
bitfld.long 0x00 22. " G6_IO3 ,G6_IO3 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 20. " G6_IO1 ,G6_IO1 analog switch enable" "Opened,Closed"
|
|
textline " "
|
|
elif (cpuis("STM32L052K6"))||(cpuis("STM32L052K8"))
|
|
bitfld.long 0x00 22. " G6_IO3 ,G6_IO3 analog switch enable" "Opened,Closed"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x00 23. " G6_IO4 ,G6_IO4 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 22. " G6_IO3 ,G6_IO3 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 21. " G6_IO2 ,G6_IO2 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 20. " G6_IO1 ,G6_IO1 analog switch enable" "Opened,Closed"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 19. " G5_IO4 ,G5_IO4 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 18. " G5_IO3 ,G5_IO3 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 17. " G5_IO2 ,G5_IO2 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 16. " G5_IO1 ,G5_IO1 analog switch enable" "Opened,Closed"
|
|
textline " "
|
|
bitfld.long 0x00 15. " G4_IO4 ,G4_IO4 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 14. " G4_IO3 ,G4_IO3 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 13. " G4_IO2 ,G4_IO2 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 12. " G4_IO1 ,G4_IO1 analog switch enable" "Opened,Closed"
|
|
textline " "
|
|
sif (cpuis("STM32L063C8"))||(cpuis("STM32L053C6"))||(cpuis("STM32L053C8"))||(cpuis("STM32L052T6"))||(cpuis("STM32L052T8"))||(cpuis("STM32L052C6"))||(cpuis("STM32L053C8"))
|
|
bitfld.long 0x00 11. " G3_IO4 ,G3_IO4 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 10. " G3_IO3 ,G3_IO3 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 9. " G3_IO2 ,G3_IO2 analog switch enable" "Opened,Closed"
|
|
textline " "
|
|
elif (cpuis("STM32L052K6"))||(cpuis("STM32L052K8"))
|
|
bitfld.long 0x00 10. " G3_IO3 ,G3_IO3 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 9. " G3_IO2 ,G3_IO2 analog switch enable" "Opened,Closed"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x00 11. " G3_IO4 ,G3_IO4 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 10. " G3_IO3 ,G3_IO3 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 9. " G3_IO2 ,G3_IO2 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 8. " G3_IO1 ,G3_IO1 analog switch enable" "Opened,Closed"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 7. " G2_IO4 ,G2_IO4 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 6. " G2_IO3 ,G2_IO3 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 5. " G2_IO2 ,G2_IO2 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 4. " G2_IO1 ,G2_IO1 analog switch enable" "Opened,Closed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " G1_IO4 ,G1_IO4 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 2. " G1_IO3 ,G1_IO3 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 1. " G1_IO2 ,G1_IO2 analog switch enable" "Opened,Closed"
|
|
bitfld.long 0x00 0. " G1_IO1 ,G1_IO1 analog switch enable" "Opened,Closed"
|
|
if (((per.l((ad:0x40024000+0x00)))&0x02)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TSC_IOSCR,TSC I/O sampling control register"
|
|
sif (!cpuis("STM32L063C8"))&&(!cpuis("STM32L053C6"))&&(!cpuis("STM32L053C8"))&&(!cpuis("STM32L052T6"))&&(!cpuis("STM32L052T8"))&&(!cpuis("STM32L052K6"))&&(!cpuis("STM32L052K8"))&&(!cpuis("STM32L052C6"))&&(!cpuis("STM32L053C8"))
|
|
bitfld.long 0x00 31. " G8_IO4 ,G8_IO4 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 30. " G8_IO3 ,G8_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 29. " G8_IO2 ,G8_IO2 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 28. " G8_IO1 ,G8_IO1 sampling mode" "Unused,Used"
|
|
textline " "
|
|
bitfld.long 0x00 27. " G7_IO4 ,G7_IO4 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 26. " G7_IO3 ,G7_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 25. " G7_IO2 ,G7_IO2 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 24. " G7_IO1 ,G7_IO1 sampling mode" "Unused,Used"
|
|
textline " "
|
|
endif
|
|
sif (cpuis("STM32L052T6"))||(cpuis("STM32L052T8"))
|
|
bitfld.long 0x00 22. " G6_IO3 ,G6_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 20. " G6_IO1 ,G6_IO1 sampling mode" "Unused,Used"
|
|
textline " "
|
|
elif (cpuis("STM32L052K6"))||(cpuis("STM32L052K8"))
|
|
bitfld.long 0x00 22. " G6_IO3 ,G6_IO3 sampling mode" "Unused,Used"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x00 23. " G6_IO4 ,G6_IO4 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 22. " G6_IO3 ,G6_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 21. " G6_IO2 ,G6_IO2 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 20. " G6_IO1 ,G6_IO1 sampling mode" "Unused,Used"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 19. " G5_IO4 ,G5_IO4 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 18. " G5_IO3 ,G5_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 17. " G5_IO2 ,G5_IO2 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 16. " G5_IO1 ,G5_IO1 sampling mode" "Unused,Used"
|
|
textline " "
|
|
bitfld.long 0x00 15. " G4_IO4 ,G4_IO4 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 14. " G4_IO3 ,G4_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 13. " G4_IO2 ,G4_IO2 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 12. " G4_IO1 ,G4_IO1 sampling mode" "Unused,Used"
|
|
textline " "
|
|
sif (cpuis("STM32L063C8"))||(cpuis("STM32L053C6"))||(cpuis("STM32L053C8"))||(cpuis("STM32L052T6"))||(cpuis("STM32L052T8"))||(cpuis("STM32L052C6"))||(cpuis("STM32L053C8"))
|
|
bitfld.long 0x00 11. " G3_IO4 ,G3_IO4 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 10. " G3_IO3 ,G3_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 9. " G3_IO2 ,G3_IO2 sampling mode" "Unused,Used"
|
|
textline " "
|
|
elif (cpuis("STM32L052K6"))||(cpuis("STM32L052K8"))
|
|
bitfld.long 0x00 10. " G3_IO3 ,G3_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 9. " G3_IO2 ,G3_IO2 sampling mode" "Unused,Used"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x00 11. " G3_IO4 ,G3_IO4 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 10. " G3_IO3 ,G3_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 9. " G3_IO2 ,G3_IO2 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 8. " G3_IO1 ,G3_IO1 sampling mode" "Unused,Used"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 7. " G2_IO4 ,G2_IO4 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 6. " G2_IO3 ,G2_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 5. " G2_IO2 ,G2_IO2 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 4. " G2_IO1 ,G2_IO1 sampling mode" "Unused,Used"
|
|
textline " "
|
|
bitfld.long 0x00 3. " G1_IO4 ,G1_IO4 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 2. " G1_IO3 ,G1_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 1. " G1_IO2 ,G1_IO2 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 0. " G1_IO1 ,G1_IO1 sampling mode" "Unused,Used"
|
|
elif (((per.l((ad:0x40024000+0x00)))&0x02)==0x02)
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "TSC_IOSCR,TSC I/O sampling control register"
|
|
sif (!cpuis("STM32L063C8"))&&(!cpuis("STM32L053C6"))&&(!cpuis("STM32L053C8"))&&(!cpuis("STM32L052T6"))&&(!cpuis("STM32L052T8"))&&(!cpuis("STM32L052K6"))&&(!cpuis("STM32L052K8"))&&(!cpuis("STM32L052C6"))&&(!cpuis("STM32L053C8"))
|
|
bitfld.long 0x00 31. " G8_IO4 ,G8_IO4 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 30. " G8_IO3 ,G8_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 29. " G8_IO2 ,G8_IO2 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 28. " G8_IO1 ,G8_IO1 sampling mode" "Unused,Used"
|
|
textline " "
|
|
bitfld.long 0x00 27. " G7_IO4 ,G7_IO4 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 26. " G7_IO3 ,G7_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 25. " G7_IO2 ,G7_IO2 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 24. " G7_IO1 ,G7_IO1 sampling mode" "Unused,Used"
|
|
textline " "
|
|
endif
|
|
sif (cpuis("STM32L052T6"))||(cpuis("STM32L052T8"))
|
|
bitfld.long 0x00 22. " G6_IO3 ,G6_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 20. " G6_IO1 ,G6_IO1 sampling mode" "Unused,Used"
|
|
textline " "
|
|
elif (cpuis("STM32L052K6"))||(cpuis("STM32L052K8"))
|
|
bitfld.long 0x00 22. " G6_IO3 ,G6_IO3 sampling mode" "Unused,Used"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x00 23. " G6_IO4 ,G6_IO4 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 22. " G6_IO3 ,G6_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 21. " G6_IO2 ,G6_IO2 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 20. " G6_IO1 ,G6_IO1 sampling mode" "Unused,Used"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 19. " G5_IO4 ,G5_IO4 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 18. " G5_IO3 ,G5_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 17. " G5_IO2 ,G5_IO2 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 16. " G5_IO1 ,G5_IO1 sampling mode" "Unused,Used"
|
|
textline " "
|
|
bitfld.long 0x00 15. " G4_IO4 ,G4_IO4 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 14. " G4_IO3 ,G4_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 13. " G4_IO2 ,G4_IO2 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 12. " G4_IO1 ,G4_IO1 sampling mode" "Unused,Used"
|
|
textline " "
|
|
sif (cpuis("STM32L063C8"))||(cpuis("STM32L053C6"))||(cpuis("STM32L053C8"))||(cpuis("STM32L052T6"))||(cpuis("STM32L052T8"))||(cpuis("STM32L052C6"))||(cpuis("STM32L053C8"))
|
|
bitfld.long 0x00 11. " G3_IO4 ,G3_IO4 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 10. " G3_IO3 ,G3_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 9. " G3_IO2 ,G3_IO2 sampling mode" "Unused,Used"
|
|
textline " "
|
|
elif (cpuis("STM32L052K6"))||(cpuis("STM32L052K8"))
|
|
bitfld.long 0x00 10. " G3_IO3 ,G3_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 9. " G3_IO2 ,G3_IO2 sampling mode" "Unused,Used"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x00 11. " G3_IO4 ,G3_IO4 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 10. " G3_IO3 ,G3_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 9. " G3_IO2 ,G3_IO2 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 8. " G3_IO1 ,G3_IO1 sampling mode" "Unused,Used"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 7. " G2_IO4 ,G2_IO4 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 6. " G2_IO3 ,G2_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 5. " G2_IO2 ,G2_IO2 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 4. " G2_IO1 ,G2_IO1 sampling mode" "Unused,Used"
|
|
textline " "
|
|
bitfld.long 0x00 3. " G1_IO4 ,G1_IO4 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 2. " G1_IO3 ,G1_IO3 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 1. " G1_IO2 ,G1_IO2 sampling mode" "Unused,Used"
|
|
bitfld.long 0x00 0. " G1_IO1 ,G1_IO1 sampling mode" "Unused,Used"
|
|
endif
|
|
if (((per.l((ad:0x40024000+0x00)))&0x02)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TSC_IOCCR,TSC I/O channel control register"
|
|
sif (!cpuis("STM32L063C8"))&&(!cpuis("STM32L053C6"))&&(!cpuis("STM32L053C8"))&&(!cpuis("STM32L052T6"))&&(!cpuis("STM32L052T8"))&&(!cpuis("STM32L052K6"))&&(!cpuis("STM32L052K8"))&&(!cpuis("STM32L052C6"))&&(!cpuis("STM32L053C8"))
|
|
bitfld.long 0x00 31. " G8_IO4 ,G8_IO4 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 30. " G8_IO3 ,G8_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 29. " G8_IO2 ,G8_IO2 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 28. " G8_IO1 ,G8_IO1 channel mode" "Unused,Used"
|
|
textline " "
|
|
bitfld.long 0x00 27. " G7_IO4 ,G7_IO4 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 26. " G7_IO3 ,G7_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 25. " G7_IO2 ,G7_IO2 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 24. " G7_IO1 ,G7_IO1 channel mode" "Unused,Used"
|
|
textline " "
|
|
endif
|
|
sif (cpuis("STM32L052T6"))||(cpuis("STM32L052T8"))
|
|
bitfld.long 0x00 22. " G6_IO3 ,G6_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 20. " G6_IO1 ,G6_IO1 channel mode" "Unused,Used"
|
|
textline " "
|
|
elif (cpuis("STM32L052K6"))||(cpuis("STM32L052K8"))
|
|
bitfld.long 0x00 22. " G6_IO3 ,G6_IO3 channel mode" "Unused,Used"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x00 23. " G6_IO4 ,G6_IO4 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 22. " G6_IO3 ,G6_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 21. " G6_IO2 ,G6_IO2 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 20. " G6_IO1 ,G6_IO1 channel mode" "Unused,Used"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 19. " G5_IO4 ,G5_IO4 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 18. " G5_IO3 ,G5_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 17. " G5_IO2 ,G5_IO2 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 16. " G5_IO1 ,G5_IO1 channel mode" "Unused,Used"
|
|
textline " "
|
|
bitfld.long 0x00 15. " G4_IO4 ,G4_IO4 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 14. " G4_IO3 ,G4_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 13. " G4_IO2 ,G4_IO2 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 12. " G4_IO1 ,G4_IO1 channel mode" "Unused,Used"
|
|
textline " "
|
|
sif (cpuis("STM32L063C8"))||(cpuis("STM32L053C6"))||(cpuis("STM32L053C8"))||(cpuis("STM32L052T6"))||(cpuis("STM32L052T8"))||(cpuis("STM32L052C6"))||(cpuis("STM32L053C8"))
|
|
bitfld.long 0x00 11. " G3_IO4 ,G3_IO4 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 10. " G3_IO3 ,G3_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 9. " G3_IO2 ,G3_IO2 channel mode" "Unused,Used"
|
|
textline " "
|
|
elif (cpuis("STM32L052K6"))||(cpuis("STM32L052K8"))
|
|
bitfld.long 0x00 10. " G3_IO3 ,G3_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 9. " G3_IO2 ,G3_IO2 channel mode" "Unused,Used"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x00 11. " G3_IO4 ,G3_IO4 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 10. " G3_IO3 ,G3_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 9. " G3_IO2 ,G3_IO2 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 8. " G3_IO1 ,G3_IO1 channel mode" "Unused,Used"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 7. " G2_IO4 ,G2_IO4 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 6. " G2_IO3 ,G2_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 5. " G2_IO2 ,G2_IO2 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 4. " G2_IO1 ,G2_IO1 channel mode" "Unused,Used"
|
|
textline " "
|
|
bitfld.long 0x00 3. " G1_IO4 ,G1_IO4 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 2. " G1_IO3 ,G1_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 1. " G1_IO2 ,G1_IO2 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 0. " G1_IO1 ,G1_IO1 channel mode" "Unused,Used"
|
|
elif (((per.l((ad:0x40024000+0x00)))&0x02)==0x02)
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "TSC_IOCCR,TSC I/O channel control register"
|
|
sif (!cpuis("STM32L063C8"))&&(!cpuis("STM32L053C6"))&&(!cpuis("STM32L053C8"))&&(!cpuis("STM32L052T6"))&&(!cpuis("STM32L052T8"))&&(!cpuis("STM32L052K6"))&&(!cpuis("STM32L052K8"))&&(!cpuis("STM32L052C6"))&&(!cpuis("STM32L053C8"))
|
|
bitfld.long 0x00 31. " G8_IO4 ,G8_IO4 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 30. " G8_IO3 ,G8_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 29. " G8_IO2 ,G8_IO2 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 28. " G8_IO1 ,G8_IO1 channel mode" "Unused,Used"
|
|
textline " "
|
|
bitfld.long 0x00 27. " G7_IO4 ,G7_IO4 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 26. " G7_IO3 ,G7_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 25. " G7_IO2 ,G7_IO2 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 24. " G7_IO1 ,G7_IO1 channel mode" "Unused,Used"
|
|
textline " "
|
|
endif
|
|
sif (cpuis("STM32L052T6"))||(cpuis("STM32L052T8"))
|
|
bitfld.long 0x00 22. " G6_IO3 ,G6_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 20. " G6_IO1 ,G6_IO1 channel mode" "Unused,Used"
|
|
textline " "
|
|
elif (cpuis("STM32L052K6"))||(cpuis("STM32L052K8"))
|
|
bitfld.long 0x00 22. " G6_IO3 ,G6_IO3 channel mode" "Unused,Used"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x00 23. " G6_IO4 ,G6_IO4 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 22. " G6_IO3 ,G6_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 21. " G6_IO2 ,G6_IO2 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 20. " G6_IO1 ,G6_IO1 channel mode" "Unused,Used"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 19. " G5_IO4 ,G5_IO4 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 18. " G5_IO3 ,G5_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 17. " G5_IO2 ,G5_IO2 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 16. " G5_IO1 ,G5_IO1 channel mode" "Unused,Used"
|
|
textline " "
|
|
bitfld.long 0x00 15. " G4_IO4 ,G4_IO4 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 14. " G4_IO3 ,G4_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 13. " G4_IO2 ,G4_IO2 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 12. " G4_IO1 ,G4_IO1 channel mode" "Unused,Used"
|
|
textline " "
|
|
sif (cpuis("STM32L063C8"))||(cpuis("STM32L053C6"))||(cpuis("STM32L053C8"))||(cpuis("STM32L052T6"))||(cpuis("STM32L052T8"))||(cpuis("STM32L052C6"))||(cpuis("STM32L053C8"))
|
|
bitfld.long 0x00 11. " G3_IO4 ,G3_IO4 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 10. " G3_IO3 ,G3_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 9. " G3_IO2 ,G3_IO2 channel mode" "Unused,Used"
|
|
textline " "
|
|
elif (cpuis("STM32L052K6"))||(cpuis("STM32L052K8"))
|
|
bitfld.long 0x00 10. " G3_IO3 ,G3_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 9. " G3_IO2 ,G3_IO2 channel mode" "Unused,Used"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x00 11. " G3_IO4 ,G3_IO4 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 10. " G3_IO3 ,G3_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 9. " G3_IO2 ,G3_IO2 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 8. " G3_IO1 ,G3_IO1 channel mode" "Unused,Used"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 7. " G2_IO4 ,G2_IO4 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 6. " G2_IO3 ,G2_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 5. " G2_IO2 ,G2_IO2 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 4. " G2_IO1 ,G2_IO1 channel mode" "Unused,Used"
|
|
textline " "
|
|
bitfld.long 0x00 3. " G1_IO4 ,G1_IO4 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 2. " G1_IO3 ,G1_IO3 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 1. " G1_IO2 ,G1_IO2 channel mode" "Unused,Used"
|
|
bitfld.long 0x00 0. " G1_IO1 ,G1_IO1 channel mode" "Unused,Used"
|
|
endif
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "TSC_IOGCSR,TSC I/O group control status register"
|
|
rbitfld.long 0x00 23. " G8S ,Analog I/O group 8 status" "Not completed,Completed"
|
|
rbitfld.long 0x00 22. " G7S ,Analog I/O group 7 status" "Not completed,Completed"
|
|
rbitfld.long 0x00 21. " G6S ,Analog I/O group 6 status" "Not completed,Completed"
|
|
rbitfld.long 0x00 20. " G5S ,Analog I/O group 5 status" "Not completed,Completed"
|
|
textline " "
|
|
rbitfld.long 0x00 19. " G4S ,Analog I/O group 4 status" "Not completed,Completed"
|
|
rbitfld.long 0x00 18. " G3S ,Analog I/O group 3 status" "Not completed,Completed"
|
|
rbitfld.long 0x00 17. " G2S ,Analog I/O group 2 status" "Not completed,Completed"
|
|
rbitfld.long 0x00 16. " G1S ,Analog I/O group 1 status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 7. " G8E ,Analog I/O group 8 status" "Not completed,Completed"
|
|
bitfld.long 0x00 6. " G7E ,Analog I/O group 7 status" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " G6E ,Analog I/O group 6 status" "Not completed,Completed"
|
|
bitfld.long 0x00 4. " G5E ,Analog I/O group 5 status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " G4E ,Analog I/O group 4 status" "Not completed,Completed"
|
|
bitfld.long 0x00 2. " G3E ,Analog I/O group 3 status" "Not completed,Completed"
|
|
bitfld.long 0x00 1. " G2E ,Analog I/O group 2 status" "Not completed,Completed"
|
|
bitfld.long 0x00 0. " G1E ,Analog I/O group 1 status" "Not completed,Completed"
|
|
rgroup.long 0x34++0x1F
|
|
line.long 0x0 "TSC_IOG1CR,TSC I/O group 1 counter register"
|
|
hexmask.long.word 0x0 0.--13. 1. " CNT[13:0] ,Counter value"
|
|
line.long 0x4 "TSC_IOG2CR,TSC I/O group 2 counter register"
|
|
hexmask.long.word 0x4 0.--13. 1. " CNT[13:0] ,Counter value"
|
|
line.long 0x8 "TSC_IOG3CR,TSC I/O group 3 counter register"
|
|
hexmask.long.word 0x8 0.--13. 1. " CNT[13:0] ,Counter value"
|
|
line.long 0xC "TSC_IOG4CR,TSC I/O group 4 counter register"
|
|
hexmask.long.word 0xC 0.--13. 1. " CNT[13:0] ,Counter value"
|
|
line.long 0x10 "TSC_IOG5CR,TSC I/O group 5 counter register"
|
|
hexmask.long.word 0x10 0.--13. 1. " CNT[13:0] ,Counter value"
|
|
line.long 0x14 "TSC_IOG6CR,TSC I/O group 6 counter register"
|
|
hexmask.long.word 0x14 0.--13. 1. " CNT[13:0] ,Counter value"
|
|
line.long 0x18 "TSC_IOG7CR,TSC I/O group 7 counter register"
|
|
hexmask.long.word 0x18 0.--13. 1. " CNT[13:0] ,Counter value"
|
|
line.long 0x1C "TSC_IOG8CR,TSC I/O group 8 counter register"
|
|
hexmask.long.word 0x1C 0.--13. 1. " CNT[13:0] ,Counter value"
|
|
width 11.
|
|
tree.end
|
|
endif
|
|
sif (!cpuis("STM32L011*")&&!cpuis("STM32L031*")&&!cpuis("STM32L051*")&&!cpuis("STM32L052*")&&!cpuis("STM32L053*")&&!cpuis("STM32L071*")&&!cpuis("STM32L072*")&&!cpuis("STM32L073*"))
|
|
tree "AES (Advanced encryption standard hardware accelerator)"
|
|
base ad:0x40026000
|
|
width 14.
|
|
if (((per.l((ad:0x40026000)))&0x79)==0x48)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "AES_CR,AES control register"
|
|
bitfld.long 0x00 10. " ERRIE ,Error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " CCFIE ,CCF flag interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ERRC ,Error clear" "No effect,Cleared"
|
|
bitfld.long 0x00 7. " CCFC ,Computation Complete Flag Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5.--6. " CHMOD[1:0] ,AES chaining mode" "EBC,CBC,CTR,"
|
|
bitfld.long 0x00 3.--4. " MODE[1:0] ,AES operating mode" "Encryption,Key derivation,Decryption,"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " DATATYPE[1:0] ,Data type selection" "32-bit data,16-bit data/half-word,8-bit data/bytes,Bit data"
|
|
bitfld.long 0x00 0. " EN ,AES enable" "Disabled,Enabled"
|
|
elif (((per.l((ad:0x40026000)))&0x79)==0x49)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "AES_CR,AES control register"
|
|
bitfld.long 0x00 10. " ERRIE ,Error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " CCFIE ,CCF flag interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ERRC ,Error clear" "No effect,Cleared"
|
|
bitfld.long 0x00 7. " CCFC ,Computation Complete Flag Clear" "No effect,Cleared"
|
|
rbitfld.long 0x00 5.--6. " CHMOD[1:0] ,AES chaining mode" "EBC,CBC,CTR,"
|
|
rbitfld.long 0x00 3.--4. " MODE[1:0] ,AES operating mode" "Encryption,Key derivation,Decryption,"
|
|
textline " "
|
|
rbitfld.long 0x00 1.--2. " DATATYPE[1:0] ,Data type selection" "32-bit data,16-bit data/half-word,8-bit data/bytes,Bit data"
|
|
bitfld.long 0x00 0. " EN ,AES enable" "Disabled,Enabled"
|
|
elif (((per.l((ad:0x40026000)))&0x61)==0x40)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "AES_CR,AES control register"
|
|
bitfld.long 0x00 12. " DMAOUTEN ,Enable DMA management of data output phase" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " DMAINEN ,Enable DMA management of data input phase" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " ERRIE ,Error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " CCFIE ,CCF flag interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ERRC ,Error clear" "No effect,Cleared"
|
|
bitfld.long 0x00 7. " CCFC ,Computation Complete Flag Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5.--6. " CHMOD[1:0] ,AES chaining mode" "EBC,CBC,CTR,"
|
|
bitfld.long 0x00 3.--4. " MODE[1:0] ,AES operating mode" "Encryption,Key derivation,Decryption,"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " DATATYPE[1:0] ,Data type selection" "32-bit data,16-bit data/half-word,8-bit data/bytes,Bit data"
|
|
bitfld.long 0x00 0. " EN ,AES enable" "Disabled,Enabled"
|
|
elif (((per.l((ad:0x40026000)))&0x61)==0x41)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "AES_CR,AES control register"
|
|
bitfld.long 0x00 12. " DMAOUTEN ,Enable DMA management of data output phase" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " DMAINEN ,Enable DMA management of data input phase" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " ERRIE ,Error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " CCFIE ,CCF flag interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ERRC ,Error clear" "No effect,Cleared"
|
|
bitfld.long 0x00 7. " CCFC ,Computation Complete Flag Clear" "No effect,Cleared"
|
|
rbitfld.long 0x00 5.--6. " CHMOD[1:0] ,AES chaining mode" "EBC,CBC,CTR,"
|
|
rbitfld.long 0x00 3.--4. " MODE[1:0] ,AES operating mode" "Encryption,Key derivation,Decryption,"
|
|
textline " "
|
|
rbitfld.long 0x00 1.--2. " DATATYPE[1:0] ,Data type selection" "32-bit data,16-bit data/half-word,8-bit data/bytes,Bit data"
|
|
bitfld.long 0x00 0. " EN ,AES enable" "Disabled,Enabled"
|
|
elif (((per.l((ad:0x40026000)))&0x19)==0x08)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "AES_CR,AES control register"
|
|
bitfld.long 0x00 10. " ERRIE ,Error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " CCFIE ,CCF flag interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ERRC ,Error clear" "No effect,Cleared"
|
|
bitfld.long 0x00 7. " CCFC ,Computation Complete Flag Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5.--6. " CHMOD[1:0] ,AES chaining mode" "EBC,CBC,CTR,"
|
|
bitfld.long 0x00 3.--4. " MODE[1:0] ,AES operating mode" "Encryption,Key derivation,Decryption,Key derivation + decryption"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " DATATYPE[1:0] ,Data type selection" "32-bit data,16-bit data/half-word,8-bit data/bytes,Bit data"
|
|
bitfld.long 0x00 0. " EN ,AES enable" "Disabled,Enabled"
|
|
elif (((per.l((ad:0x40026000)))&0x19)==0x09)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "AES_CR,AES control register"
|
|
bitfld.long 0x00 10. " ERRIE ,Error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " CCFIE ,CCF flag interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ERRC ,Error clear" "No effect,Cleared"
|
|
bitfld.long 0x00 7. " CCFC ,Computation Complete Flag Clear" "No effect,Cleared"
|
|
rbitfld.long 0x00 5.--6. " CHMOD[1:0] ,AES chaining mode" "EBC,CBC,CTR,"
|
|
rbitfld.long 0x00 3.--4. " MODE[1:0] ,AES operating mode" "Encryption,Key derivation,Decryption,Key derivation + decryption"
|
|
textline " "
|
|
rbitfld.long 0x00 1.--2. " DATATYPE[1:0] ,Data type selection" "32-bit data,16-bit data/half-word,8-bit data/bytes,Bit data"
|
|
bitfld.long 0x00 0. " EN ,AES enable" "Disabled,Enabled"
|
|
elif (((per.l((ad:0x40026000)))&0x01)==0x01)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "AES_CR,AES control register"
|
|
bitfld.long 0x00 12. " DMAOUTEN ,Enable DMA management of data output phase" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " DMAINEN ,Enable DMA management of data input phase" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " ERRIE ,Error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " CCFIE ,CCF flag interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ERRC ,Error clear" "No effect,Cleared"
|
|
bitfld.long 0x00 7. " CCFC ,Computation Complete Flag Clear" "No effect,Cleared"
|
|
rbitfld.long 0x00 5.--6. " CHMOD[1:0] ,AES chaining mode" "EBC,CBC,CTR,"
|
|
rbitfld.long 0x00 3.--4. " MODE[1:0] ,AES operating mode" "Encryption,Key derivation,Decryption,Key derivation + decryption"
|
|
textline " "
|
|
rbitfld.long 0x00 1.--2. " DATATYPE[1:0] ,Data type selection" "32-bit data,16-bit data/half-word,8-bit data/bytes,Bit data"
|
|
bitfld.long 0x00 0. " EN ,AES enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "AES_CR,AES control register"
|
|
bitfld.long 0x00 12. " DMAOUTEN ,Enable DMA management of data output phase" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " DMAINEN ,Enable DMA management of data input phase" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " ERRIE ,Error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " CCFIE ,CCF flag interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ERRC ,Error clear" "No effect,Cleared"
|
|
bitfld.long 0x00 7. " CCFC ,Computation Complete Flag Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5.--6. " CHMOD[1:0] ,AES chaining mode" "EBC,CBC,CTR,"
|
|
bitfld.long 0x00 3.--4. " MODE[1:0] ,AES operating mode" "Encryption,Key derivation,Decryption,Key derivation + decryption"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " DATATYPE[1:0] ,Data type selection" "32-bit data,16-bit data/half-word,8-bit data/bytes,Bit data"
|
|
bitfld.long 0x00 0. " EN ,AES enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "AES_SR,AES status register"
|
|
bitfld.long 0x00 2. " WRERR , Write error flag" "No error,Error"
|
|
bitfld.long 0x00 1. " RDERR ,Read error flag" "No error,Error"
|
|
bitfld.long 0x00 0. " CCF ,Computation complete flag" "Completed,Not completed"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "AES_DINR,AES data input register"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "AES_DOUTR,AES data output register"
|
|
group.long 0x10++0x0F
|
|
line.long 0x0 "AES_KEYR0,AES key register 0"
|
|
line.long 0x4 "AES_KEYR1,AES key register 1"
|
|
line.long 0x8 "AES_KEYR2,AES key register 2"
|
|
line.long 0xC "AES_KEYR3,AES key register 3"
|
|
group.long 0x20++0x0F
|
|
line.long 0x0 "AES_IVR0,AES initialization vector register 0"
|
|
line.long 0x4 "AES_IVR1,AES initialization vector register 1"
|
|
line.long 0x8 "AES_IVR2,AES initialization vector register 2"
|
|
line.long 0xC "AES_IVR3,AES initialization vector register 3"
|
|
width 11.
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L0?2*"))||(cpuis("STM32L0?3*"))
|
|
tree "RNG (Random number generator)"
|
|
base ad:0x40025000
|
|
width 8.
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "RNG_CR,RNG control register"
|
|
bitfld.long 0x00 3. " IE ,Interrupt enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RNGEN ,Random number generator enable" "Disabled,Enabled"
|
|
line.long 0x04 "RNG_SR,RNG status register"
|
|
bitfld.long 0x04 6. " SEIS ,Seed error interrupt status" "No error,Error"
|
|
bitfld.long 0x04 5. " CEIS ,Clock error interrupt status" "No error,Error"
|
|
rbitfld.long 0x04 2. " SECS ,Seed error current status" "No error,Error"
|
|
rbitfld.long 0x04 1. " CECS ,Clock error current status" "No error,Error"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " DRDY ,Data ready" "Not ready,Ready"
|
|
rgroup.long 0x08++0x3
|
|
line.long 0x00 "RNG_DR,RNG data register"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree.open "General purpose timers"
|
|
tree "TIMER 2"
|
|
base ad:0x40000000
|
|
width 12.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "TIM2_CR1,TIM2 control register 1"
|
|
bitfld.word 0x00 8.--9. " CKD ,Clock division" "tDTS=tCK_INT,tDTS=2*tCK_INT,tDTS=4*tCK_INT,"
|
|
bitfld.word 0x00 7. " ARPE ,Auto-reload preload enable" "Not buffered,Buffered"
|
|
bitfld.word 0x00 5.--6. " CMS ,Align mode selection" "Edge,Center1,Center2,Center3"
|
|
bitfld.word 0x00 4. " DIR ,Direction" "Up,Down"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OPM ,One pulse mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " URS ,Update request source" "Overflow/Underflow/UG set,Overflow/Underflow/DMA request"
|
|
bitfld.word 0x00 1. " UDIS ,Update disable" "No,Yes"
|
|
bitfld.word 0x00 0. " CEN ,Counter enable" "Disabled,Enabled"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "TIM2_CR2,TIM2 Control register 2"
|
|
bitfld.word 0x00 7. " TI1S ,TI1 Selection" "CH1 directly,CH1/CH2/CH3 xored"
|
|
bitfld.word 0x00 4.--6. " MMS ,Master Mode Selection" "Reset,Enable,Update,Compare Pulse,OC1REF,OC2REF,OC3REF,OC4REF"
|
|
bitfld.word 0x00 3. " CCDS ,Capture/Compare DMA Selection" "CC2,Update"
|
|
if (((per.w((ad:0x40000000)+0x08))&0x07)==0x00)
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TIM2_SMCR,TIM2 Slave mode control register"
|
|
bitfld.word 0x00 15. " ETP ,External trigger polarity" "Non-inverted/High/Rising,Inverted/Low/Falling"
|
|
bitfld.word 0x00 14. " ECE ,External clock enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--13. " ETPS ,External trigger prescaler" "Off,ETRP/2,ETRP/4,ETRP/8"
|
|
bitfld.word 0x00 8.--11. " ETF ,External trigger filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 7. " MSM ,Master/slave mode" "No action,Delayed"
|
|
bitfld.word 0x00 4.--6. " TS ,Trigger selection" "ITR0,ITR1,,,TI1F_ED,TI1FP1,TI2FP2,ETRF"
|
|
bitfld.word 0x00 0.--2. " SMS ,Slave mode selection" "Disabled,Encoder 1,Encoder 2,Encoder 3,Reset,Gated,Trigger,External Clock"
|
|
else
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TIM2_SMCR,TIM2 Slave mode control register"
|
|
bitfld.word 0x00 15. " ETP ,External trigger polarity" "Non-inverted/High/Rising,Inverted/Low/Falling"
|
|
bitfld.word 0x00 14. " ECE ,External clock enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--13. " ETPS ,External trigger prescaler" "Off,ETRP/2,ETRP/4,ETRP/8"
|
|
bitfld.word 0x00 8.--11. " ETF ,External trigger filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 7. " MSM ,Master/slave mode" "No action,Delayed"
|
|
rbitfld.word 0x00 4.--6. " TS ,Trigger selection" "ITR0,ITR1,,,TI1F_ED,TI1FP1,TI2FP2,ETRF"
|
|
bitfld.word 0x00 0.--2. " SMS ,Slave mode selection" "Disabled,Encoder 1,Encoder 2,Encoder 3,Reset,Gated,Trigger,External Clock"
|
|
endif
|
|
group.word 0x0C++0x1
|
|
line.word 0x00 "TIM2_DIER,TIM2 DMA/Interrupt enable register"
|
|
bitfld.word 0x00 14. " TDE ,Trigger DMA request enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " CC4DE ,Capture/Compare 4 DMA request enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " CC3DE ,Capture/Compare 3 DMA request enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " CC2DE ,Capture/Compare 2 DMA request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CC1DE ,Capture/Compare 1 DMA request enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " UDE ,Update DMA request enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " TIE ,Trigger interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " CC4IE ,Capture/Compare 4 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC3IE ,Capture/Compare 3 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " CC2IE ,Capture/Compare 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " CC1IE ,Capture/Compare 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UIE ,Update interrupt enable" "Disabled,Enabled"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "TIM2_SR,TIM2 Status register"
|
|
bitfld.word 0x00 12. " CC4OF ,Capture/Compare 4 Overcapture Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 11. " CC3OF ,Capture/Compare 3 Overcapture Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 10. " CC2OF ,Capture/Compare 2 Overcapture Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 9. " CC1OF ,Capture/Compare 1 Overcapture Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 6. " TIF ,Trigger interrupt Flag" "No trigger,Trigger"
|
|
bitfld.word 0x00 4. " CC4IF ,Capture/Compare 4 interrupt Flag input/output" "No input/No match,Captured/Matched"
|
|
bitfld.word 0x00 3. " CC3IF ,Capture/Compare 3 interrupt Flag input/output" "No input/No match,Captured/Matched"
|
|
bitfld.word 0x00 2. " CC2IF ,Capture/Compare 2 interrupt Flag input/output" "No input/No match,Captured/Matched"
|
|
textline " "
|
|
bitfld.word 0x00 1. " CC1IF ,Capture/Compare 1 interrupt Flag input/output" "No input/No match,Captured/Matched"
|
|
bitfld.word 0x00 0. " UIF ,Update interrupt Flag" "No update,Update"
|
|
wgroup.word 0x14++0x1
|
|
line.word 0x00 "TIM2_EGR,TIM2 Event generation register"
|
|
bitfld.word 0x00 6. " TG ,Trigger Generation" "No action,Enable"
|
|
bitfld.word 0x00 4. " CC4G ,Capture/Compare 4 Generation input/output" "No action/No action,Capture 4/Compare 4"
|
|
bitfld.word 0x00 3. " CC3G ,Capture/Compare 3 Generation input/output" "No action/No action,Capture 3/Compare 3"
|
|
bitfld.word 0x00 2. " CC2G ,Capture/Compare 2 Generation input/output" "No action/No action,Capture 2/Compare 2"
|
|
textline " "
|
|
bitfld.word 0x00 1. " CC1G ,Capture/Compare 1 Generation input/output" "No action/No action,Capture 1/Compare 1"
|
|
bitfld.word 0x00 0. " UG ,Update Generation" "Not generate,Generate"
|
|
if ((((per.w((ad:0x40000000+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40000000)+0x20))&0x11)==0x00))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM2_CCMR1,Output Compare 2 and Output Compare 1 mode register 1"
|
|
bitfld.word 0x00 15. " OC2CE ,Output Compare 2 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC1CE ,Output Compare 1 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40000000)+0x20))&0x11)==0x00))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM2_CCMR1,Input Capture 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC1CE ,Output Compare 1 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40000000)+0x20))&0x11)==0x00))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM2_CCMR1,Output compare 2 and Input capture 1 mode register 1"
|
|
bitfld.word 0x00 15. " OC2CE ,Output Compare 2 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)>=0x101)&&(((per.w((ad:0x40000000)+0x20))&0x11)==0x00))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM2_CCMR1,Input capture 2 and input capture 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40000000)+0x20))&0x11)==0x01))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM2_CCMR1,Output Compare 2 and Output Compare 1 mode register 1"
|
|
bitfld.word 0x00 15. " OC2CE ,Output Compare 2 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC1CE ,Output Compare 1 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40000000)+0x20))&0x11)==0x01))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM2_CCMR1,Input Capture 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC1CE ,Output Compare 1 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40000000)+0x20))&0x11)==0x01))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM2_CCMR1,Output compare 2 and Input capture 1 mode register 1"
|
|
bitfld.word 0x00 15. " OC2CE ,Output Compare 2 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)>=0x101)&&(((per.w((ad:0x40000000)+0x20))&0x11)==0x01))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM2_CCMR1,Input capture 2 and input capture 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40000000)+0x20))&0x11)==0x10))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM2_CCMR1,Output Compare 2 and Output Compare 1 mode register 1"
|
|
bitfld.word 0x00 15. " OC2CE ,Output Compare 2 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC1CE ,Output Compare 1 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40000000)+0x20))&0x11)==0x10))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM2_CCMR1,Input Capture 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC1CE ,Output Compare 1 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40000000)+0x20))&0x11)==0x10))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM2_CCMR1,Output compare 2 and Input capture 1 mode register 1"
|
|
bitfld.word 0x00 15. " OC2CE ,Output Compare 2 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)>=0x101)&&(((per.w((ad:0x40000000)+0x20))&0x11)==0x10))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM2_CCMR1,Input capture 2 and input capture 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40000000)+0x20))&0x11)==0x11))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM2_CCMR1,Output Compare 2 and Output Compare 1 mode register 1"
|
|
bitfld.word 0x00 15. " OC2CE ,Output Compare 2 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC1CE ,Output Compare 1 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40000000)+0x20))&0x11)==0x11))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM2_CCMR1,Input Capture 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC1CE ,Output Compare 1 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40000000)+0x20))&0x11)==0x11))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM2_CCMR1,Output compare 2 and Input capture 1 mode register 1"
|
|
bitfld.word 0x00 15. " OC2CE ,Output Compare 2 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)>=0x101)&&(((per.w((ad:0x40000000)+0x20))&0x11)==0x11))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM2_CCMR1,Input capture 2 and input capture 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
endif
|
|
if ((((per.w((ad:0x40000000+0x1C)))&0x303)==0x000)&&(((per.w((ad:0x40000000+0x20)))&0x1100)==0x00))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM2_CCMR2,Output compare 3 and output compare 4 mode register 2"
|
|
bitfld.word 0x00 15. " OC4CE ,Output Compare 4 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC4M ,Output Compare 4 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC4PE ,Output Compare 4 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC4FE ,Output Compare 4 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC3CE ,Output Compare 3 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC3M ,Output Compare 3 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC3PE ,Output Compare 3 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC3FE ,Output Compare 3 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000000+0x1C)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40000000+0x20)))&0x1100)==0x00))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM2_CCMR2,Output compare 3 and Input Capture 4 mode register 2"
|
|
bitfld.word 0x00 12.--15. " IC4F ,Input Capture 4 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC4PSC ,Input Capture 4 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC3CE ,Output Compare 3 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC3M ,Output Compare 3 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC3PE ,Output Compare 3 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC3FE ,Output Compare 3 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000000+0x1C)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40000000+0x20)))&0x1100)==0x00))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM2_CCMR2,Input Capture 3 and output compare 4 mode register 2"
|
|
bitfld.word 0x00 15. " OC4CE ,Output Compare 4 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC4M ,Output Compare 4 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC4PE ,Output Compare 4 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC4FE ,Output Compare 4 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC3F ,Input Capture 3 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC3PSC ,Input Capture 3 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000000+0x1C)))&0x303)>=0x101)&&(((per.w((ad:0x40000000+0x20)))&0x1100)==0x00))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM2_CCMR2,Input Capture 3 and input capture 4 mode register 2"
|
|
bitfld.word 0x00 12.--15. " IC4F ,Input Capture 4 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC4PSC ,Input Capture 4 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC3F ,Input Capture 3 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC3PSC ,Input Capture 3 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000000+0x1C)))&0x303)==0x000)&&(((per.w((ad:0x40000000+0x20)))&0x1100)==0x100))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM2_CCMR2,Output compare 3 and output compare 4 mode register 2"
|
|
bitfld.word 0x00 15. " OC4CE ,Output Compare 4 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC4M ,Output Compare 4 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC4PE ,Output Compare 4 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC4FE ,Output Compare 4 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC3CE ,Output Compare 3 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC3M ,Output Compare 3 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC3PE ,Output Compare 3 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC3FE ,Output Compare 3 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000000+0x1C)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40000000+0x20)))&0x1100)==0x100))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM2_CCMR2,Output compare 3 and Input Capture 4 mode register 2"
|
|
bitfld.word 0x00 12.--15. " IC4F ,Input Capture 4 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC4PSC ,Input Capture 4 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC3CE ,Output Compare 3 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC3M ,Output Compare 3 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC3PE ,Output Compare 3 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC3FE ,Output Compare 3 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000000+0x1C)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40000000+0x20)))&0x1100)==0x100))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM2_CCMR2,Input Capture 3 and output compare 4 mode register 2"
|
|
bitfld.word 0x00 15. " OC4CE ,Output Compare 4 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC4M ,Output Compare 4 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC4PE ,Output Compare 4 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC4FE ,Output Compare 4 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC3F ,Input Capture 3 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC3PSC ,Input Capture 3 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000000+0x1C)))&0x303)>=0x101)&&(((per.w((ad:0x40000000+0x20)))&0x1100)==0x100))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM2_CCMR2,Input Capture 3 and input capture 4 mode register 2"
|
|
bitfld.word 0x00 12.--15. " IC4F ,Input Capture 4 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC4PSC ,Input Capture 4 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC3F ,Input Capture 3 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC3PSC ,Input Capture 3 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000000+0x1C)))&0x303)==0x000)&&(((per.w((ad:0x40000000+0x20)))&0x1100)==0x1000))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM2_CCMR2,Output compare 3 and output compare 4 mode register 2"
|
|
bitfld.word 0x00 15. " OC4CE ,Output Compare 4 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC4M ,Output Compare 4 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC4PE ,Output Compare 4 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC4FE ,Output Compare 4 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC3CE ,Output Compare 3 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC3M ,Output Compare 3 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC3PE ,Output Compare 3 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC3FE ,Output Compare 3 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000000+0x1C)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40000000+0x20)))&0x1100)==0x1000))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM2_CCMR2,Output compare 3 and Input Capture 4 mode register 2"
|
|
bitfld.word 0x00 12.--15. " IC4F ,Input Capture 4 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC4PSC ,Input Capture 4 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC3CE ,Output Compare 3 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC3M ,Output Compare 3 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC3PE ,Output Compare 3 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC3FE ,Output Compare 3 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000000+0x1C)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40000000+0x20)))&0x1100)==0x1000))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM2_CCMR2,Input Capture 3 and output compare 4 mode register 2"
|
|
bitfld.word 0x00 15. " OC4CE ,Output Compare 4 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC4M ,Output Compare 4 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC4PE ,Output Compare 4 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC4FE ,Output Compare 4 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC3F ,Input Capture 3 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC3PSC ,Input Capture 3 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000000+0x1C)))&0x303)>=0x101)&&(((per.w((ad:0x40000000+0x20)))&0x1100)==0x1000))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM2_CCMR2,Input Capture 3 and input capture 4 mode register 2"
|
|
bitfld.word 0x00 12.--15. " IC4F ,Input Capture 4 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC4PSC ,Input Capture 4 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC3F ,Input Capture 3 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC3PSC ,Input Capture 3 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000000+0x1C)))&0x303)==0x000)&&(((per.w((ad:0x40000000+0x20)))&0x1100)==0x1100))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM2_CCMR2,Output compare 3 and output compare 4 mode register 2"
|
|
bitfld.word 0x00 15. " OC4CE ,Output Compare 4 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC4M ,Output Compare 4 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC4PE ,Output Compare 4 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC4FE ,Output Compare 4 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC3CE ,Output Compare 3 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC3M ,Output Compare 3 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC3PE ,Output Compare 3 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC3FE ,Output Compare 3 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000000+0x1C)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40000000+0x20)))&0x1100)==0x1100))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM2_CCMR2,Output compare 3 and Input Capture 4 mode register 2"
|
|
bitfld.word 0x00 12.--15. " IC4F ,Input Capture 4 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC4PSC ,Input Capture 4 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC3CE ,Output Compare 3 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC3M ,Output Compare 3 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC3PE ,Output Compare 3 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC3FE ,Output Compare 3 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000000+0x1C)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40000000+0x20)))&0x1100)==0x1100))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM2_CCMR2,Input Capture 3 and output compare 4 mode register 2"
|
|
bitfld.word 0x00 15. " OC4CE ,Output Compare 4 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC4M ,Output Compare 4 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC4PE ,Output Compare 4 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC4FE ,Output Compare 4 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC3F ,Input Capture 3 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC3PSC ,Input Capture 3 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000000+0x1C)))&0x303)>=0x101)&&(((per.w((ad:0x40000000+0x20)))&0x1100)==0x1100))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM2_CCMR2,Input Capture 3 and input capture 4 mode register 2"
|
|
bitfld.word 0x00 12.--15. " IC4F ,Input Capture 4 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC4PSC ,Input Capture 4 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC3F ,Input Capture 3 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC3PSC ,Input Capture 3 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
endif
|
|
if ((((per.w((ad:0x40000000+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40000000+0x1C)))&0x303)==0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM2_CCER,Output compare ch1 ch2 ch3 ch4 enable register"
|
|
bitfld.word 0x00 15. " CC4NP ,Output compare 4 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 13. " CC4P ,Output Compare 4 Polarity" "High,Low"
|
|
bitfld.word 0x00 12. " CC4E ,Output Compare 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CC3NP ,Output Compare 3 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 9. " CC3P ,Output Compare 3 Polarity" "High,Low"
|
|
bitfld.word 0x00 8. " CC3E ,Output Compare 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CC2NP ,Output Compare 2 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 5. " CC2P ,Output Compare 2 Polarity" "High,Low"
|
|
bitfld.word 0x00 4. " CC2E ,Output Compare 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC1NP ,Output compare 1 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 1. " CC1P ,Output Compare 1 Polarity" "High,Low"
|
|
bitfld.word 0x00 0. " CC1E ,Output Compare 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x300)==0x000)&&(((per.w((ad:0x40000000+0x1C)))&0x303)==0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM2_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 15. " CC4NP ,Output compare 4 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 13. " CC4P ,Output Compare 4 Polarity" "High,Low"
|
|
bitfld.word 0x00 12. " CC4E ,Output Compare 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CC3NP ,Output Compare 3 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 9. " CC3P ,Output Compare 3 Polarity" "High,Low"
|
|
bitfld.word 0x00 8. " CC3E ,Output Compare 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CC2NP ,Output Compare 2 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 5. " CC2P ,Output Compare 2 Polarity" "High,Low"
|
|
bitfld.word 0x00 4. " CC2E ,Output Compare 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. 3. " CC1NP ,Input Capture 1 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 0. " CC1E ,Input Capture 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x3)==0x0)&&(((per.w((ad:0x40000000+0x1C)))&0x303)==0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM2_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 15. " CC4NP ,Output compare 4 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 13. " CC4P ,Output Compare 4 Polarity" "High,Low"
|
|
bitfld.word 0x00 12. " CC4E ,Output Compare 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CC3NP ,Output Compare 3 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 9. " CC3P ,Output Compare 3 Polarity" "High,Low"
|
|
bitfld.word 0x00 8. " CC3E ,Output Compare 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. 7. " CC2NP ,Input Capture 2 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 4. " CC2E ,Input Capture 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC1NP ,Output compare 1 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 1. " CC1P ,Output Compare 1 Polarity" "High,Low"
|
|
bitfld.word 0x00 0. " CC1E ,Output Compare 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40000000+0x1C)))&0x300)==0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM2_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 15. " CC4NP ,Output compare 4 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 13. " CC4P ,Output Compare 4 Polarity" "High,Low"
|
|
bitfld.word 0x00 12. " CC4E ,Output Compare 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. 11. " CC3NP ,Input capture 3 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 8. " CC3E ,Input capture 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CC2NP ,Output Compare 2 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 5. " CC2P ,Output Compare 2 Polarity" "High,Low"
|
|
bitfld.word 0x00 4. " CC2E ,Output Compare 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC1NP ,Output compare 1 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 1. " CC1P ,Output Compare 1 Polarity" "High,Low"
|
|
bitfld.word 0x00 0. " CC1E ,Output Compare 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40000000+0x1C)))&0x3)==0x0))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM2_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 13. 15. " CC4NP ,Input Capture 4 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 12. " CC4E ,Input Capture 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CC3NP ,Output Compare 3 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 9. " CC3P ,Output Compare 3 Polarity" "High,Low"
|
|
bitfld.word 0x00 8. " CC3E ,Output Compare 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CC2NP ,Output Compare 2 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 5. " CC2P ,Output Compare 2 Polarity" "High,Low"
|
|
bitfld.word 0x00 4. " CC2E ,Output Compare 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC1NP ,Output compare 1 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 1. " CC1P ,Output Compare 1 Polarity" "High,Low"
|
|
bitfld.word 0x00 0. " CC1E ,Output Compare 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x300)==0x000)&&(((per.w((ad:0x40000000+0x1C)))&0x300)==0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM2_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 15. " CC4NP ,Output compare 4 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 13. " CC4P ,Output Compare 4 Polarity" "High,Low"
|
|
bitfld.word 0x00 12. " CC4E ,Output Compare 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. 11. " CC3NP ,Input capture 3 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 8. " CC3E ,Input capture 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CC2NP ,Output Compare 2 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 5. " CC2P ,Output Compare 2 Polarity" "High,Low"
|
|
bitfld.word 0x00 4. " CC2E ,Output Compare 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. 3. " CC1NP ,Input Capture 1 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 0. " CC1E ,Input Capture 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x300)==0x000)&&(((per.w((ad:0x40000000+0x1C)))&0x3)==0x0))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM2_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 13. 15. " CC4NP ,Input Capture 4 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 12. " CC4E ,Input Capture 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CC3NP ,Output Compare 3 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 9. " CC3P ,Output Compare 3 Polarity" "High,Low"
|
|
bitfld.word 0x00 8. " CC3E ,Output Compare 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CC2NP ,Output Compare 2 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 5. " CC2P ,Output Compare 2 Polarity" "High,Low"
|
|
bitfld.word 0x00 4. " CC2E ,Output Compare 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. 3. " CC1NP ,Input Capture 1 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 0. " CC1E ,Input Capture 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x3)==0x0)&&(((per.w((ad:0x40000000+0x1C)))&0x300)==0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM2_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 15. " CC4NP ,Output compare 4 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 13. " CC4P ,Output Compare 4 Polarity" "High,Low"
|
|
bitfld.word 0x00 12. " CC4E ,Output Compare 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. 11. " CC3NP ,Input capture 3 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 8. " CC3E ,Input capture 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. 7. " CC2NP ,Input Capture 2 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 4. " CC2E ,Input Capture 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC1NP ,Output compare 1 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 1. " CC1P ,Output Compare 1 Polarity" "High,Low"
|
|
bitfld.word 0x00 0. " CC1E ,Output Compare 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x3)==0x0)&&(((per.w((ad:0x40000000+0x1C)))&0x3)==0x0))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM2_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 13. 15. " CC4NP ,Input Capture 4 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 12. " CC4E ,Input Capture 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CC3NP ,Output Compare 3 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 9. " CC3P ,Output Compare 3 Polarity" "High,Low"
|
|
bitfld.word 0x00 8. " CC3E ,Output Compare 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. 7. " CC2NP ,Input Capture 2 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 4. " CC2E ,Input Capture 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC1NP ,Output compare 1 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 1. " CC1P ,Output Compare 1 Polarity" "High,Low"
|
|
bitfld.word 0x00 0. " CC1E ,Output Compare 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)!=0x000)&&(((per.w((ad:0x40000000+0x1C)))&0x303)==0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM2_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 15. " CC4NP ,Output compare 4 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 13. " CC4P ,Output Compare 4 Polarity" "High,Low"
|
|
bitfld.word 0x00 12. " CC4E ,Output Compare 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CC3NP ,Output Compare 3 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 9. " CC3P ,Output Compare 3 Polarity" "High,Low"
|
|
bitfld.word 0x00 8. " CC3E ,Output Compare 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. 7. " CC2NP ,Input Capture 2 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 4. " CC2E ,Input Capture 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. 3. " CC1NP ,Input Capture 1 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 0. " CC1E ,Input Capture 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)!=0x000)&&(((per.w((ad:0x40000000+0x1C)))&0x300)==0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM2_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 15. " CC4NP ,Output compare 4 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 13. " CC4P ,Output Compare 4 Polarity" "High,Low"
|
|
bitfld.word 0x00 12. " CC4E ,Output Compare 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. 11. " CC3NP ,Input capture 3 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 8. " CC3E ,Input capture 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. 7. " CC2NP ,Input Capture 2 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 4. " CC2E ,Input Capture 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. 3. " CC1NP ,Input Capture 1 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 0. " CC1E ,Input Capture 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)!=0x000)&&(((per.w((ad:0x40000000+0x1C)))&0x3)==0x0))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM2_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 13. 15. " CC4NP ,Input Capture 4 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 12. " CC4E ,Input Capture 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CC3NP ,Output Compare 3 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 9. " CC3P ,Output Compare 3 Polarity" "High,Low"
|
|
bitfld.word 0x00 8. " CC3E ,Output Compare 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. 7. " CC2NP ,Input Capture 2 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 4. " CC2E ,Input Capture 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. 3. " CC1NP ,Input Capture 1 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 0. " CC1E ,Input Capture 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40000000+0x1C)))&0x303)!=0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM2_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 13. 15. " CC4NP ,Input Capture 4 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 12. " CC4E ,Input Capture 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. 11. " CC3NP ,Input capture 3 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 8. " CC3E ,Input capture 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CC2NP ,Output Compare 2 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 5. " CC2P ,Output Compare 2 Polarity" "High,Low"
|
|
bitfld.word 0x00 4. " CC2E ,Output Compare 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC1NP ,Output compare 1 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 1. " CC1P ,Output Compare 1 Polarity" "High,Low"
|
|
bitfld.word 0x00 0. " CC1E ,Output Compare 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x300)==0x000)&&(((per.w((ad:0x40000000+0x1C)))&0x303)!=0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM2_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 13. 15. " CC4NP ,Input Capture 4 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 12. " CC4E ,Input Capture 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. 11. " CC3NP ,Input capture 3 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 8. " CC3E ,Input capture 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CC2NP ,Output Compare 2 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 5. " CC2P ,Output Compare 2 Polarity" "High,Low"
|
|
bitfld.word 0x00 4. " CC2E ,Output Compare 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. 3. " CC1NP ,Input Capture 1 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 0. " CC1E ,Input Capture 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000000+0x18)))&0x3)==0x0)&&(((per.w((ad:0x40000000+0x1C)))&0x303)!=0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM2_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 13. 15. " CC4NP ,Input Capture 4 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 12. " CC4E ,Input Capture 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. 11. " CC3NP ,Input capture 3 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 8. " CC3E ,Input capture 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. 7. " CC2NP ,Input Capture 2 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 4. " CC2E ,Input Capture 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC1NP ,Output compare 1 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 1. " CC1P ,Output Compare 1 Polarity" "High,Low"
|
|
bitfld.word 0x00 0. " CC1E ,Output Compare 1 enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM2_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 13. 15. " CC4NP ,Input Capture 4 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 12. " CC4E ,Input Capture 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. 11. " CC3NP ,Input capture 3 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 8. " CC3E ,Input capture 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. 7. " CC2NP ,Input Capture 2 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 4. " CC2E ,Input Capture 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. 3. " CC1NP ,Input Capture 1 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 0. " CC1E ,Input Capture 1 enable" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x24++0x1
|
|
line.word 0x00 "TIM2_CNT,Counter"
|
|
group.word 0x28++0x1
|
|
line.word 0x00 "TIM2_PSC,Prescaler"
|
|
group.word 0x2C++0x1
|
|
line.word 0x00 "TIM2_ARR,Auto-reload register"
|
|
if (((per.w((ad:0x40000000+0x18)))&0x03)!=0x00)
|
|
group.word 0x34++0x1
|
|
line.word 0x00 "TIM2_CCR1,Low input capture register 1"
|
|
else
|
|
group.word 0x34++0x1
|
|
line.word 0x00 "TIM2_CCR1,Low output compare register 1"
|
|
endif
|
|
if (((per.w((ad:0x40000000+0x18)))&0x300)!=0x000)
|
|
group.word 0x38++0x1
|
|
line.word 0x00 "TIM2_CCR2,Low input capture register 2"
|
|
else
|
|
group.word 0x38++0x1
|
|
line.word 0x00 "TIM2_CCR2,Low output compare register 2"
|
|
endif
|
|
if (((per.w((ad:0x40000000+0x1C)))&0x3)!=0x00)
|
|
group.word 0x3C++0x1
|
|
line.word 0x00 "TIM2_CCR3,Low input capture register 3"
|
|
else
|
|
group.word 0x3C++0x1
|
|
line.word 0x00 "TIM2_CCR3,Low output compare register 3"
|
|
endif
|
|
if (((per.w((ad:0x40000000+0x1C)))&0x300)!=0x000)
|
|
group.word 0x3C++0x1
|
|
line.word 0x00 "TIM2_CCR4,Low input capture register 4"
|
|
else
|
|
group.word 0x3C++0x1
|
|
line.word 0x00 "TIM2_CCR4,Low output compare register 4"
|
|
endif
|
|
group.word 0x48++0x1
|
|
line.word 0x00 "TIM2_DCR,DMA control register"
|
|
bitfld.word 0x00 8.--12. " DBL ,DMA burst length" "1 transfer,2 transfers,3 transfers,4 transfers,5 transfers,6 transfers,7 transfers,8 transfers,9 transfers,10 transfers,11 transfers,12 transfers,13 transfers,14 transfers,15 transfers,16 transfers,17 transfers,18 transfers,..."
|
|
bitfld.word 0x00 0.--4. " DBA ,DMA base address" "TIM2_CR1,TIM2_CR2,TIM2_SMCR,TIM2_DIER,TIM2_SR,TIM2_EGR,TIM2_CCMR1,TIM2_CCMR2,TIM2_CCER,TIM2_CNT,TIM2_PSC,TIM2_ARR,TIM2_CCR1,TIM2_CCR2,TIM2_CCR3,TIM2_CCR4,..."
|
|
group.word 0x4C++0x1
|
|
line.word 0x00 "TIM2_DMAR,DMA address for full transfer"
|
|
group.word 0x50++0x1
|
|
line.word 0x00 "TIM2_OR,TIM2 option register"
|
|
bitfld.word 0x00 3.--4. " TI4_RMP ,Internal trigger remap" "TI4 input connected to ORed GPIOs,TI4 input connected to COMP2_OUT,TI4 input connected to COMP1_OUT,TI4 input connected to ORed GPIOs"
|
|
bitfld.word 0x00 0.--2. " ETR_RMP ,Timer2 ETR remap" "ORed GPIOs,ORed GPIOs,ORed GPIOs,HSI16,HSI48,LSE,COMP2_OUT,COMP1_OUT"
|
|
width 0xB
|
|
tree.end
|
|
sif ((cpu()=="STM32L071C8")||(cpu()=="STM32L071CB")||(cpu()=="STM32L071CZ")||(cpu()=="STM32L071K8")||(cpu()=="STM32L071KB")||(cpu()=="STM32L071KZ")||(cpu()=="STM32L071RB")||(cpu()=="STM32L071RZ")||(cpu()=="STM32L071V8")||(cpu()=="STM32L071VB")||(cpu()=="STM32L071VZ")||(cpu()=="STM32L072CB")||(cpu()=="STM32L072KB")||(cpu()=="STM32L072KZ")||(cpu()=="STM32L072RB")||(cpu()=="STM32L072RZ")||(cpu()=="STM32L072V8")||(cpu()=="STM32L072VB")||(cpu()=="STM32L072VZ")||(cpu()=="STM32L073CB")||(cpu()=="STM32L073CZ")||(cpu()=="STM32L073RB")||(cpu()=="STM32L073RZ")||(cpu()=="STM32L073V8")||(cpu()=="STM32L073VB")||(cpu()=="STM32L073VZ")||(cpu()=="STM32L081CZ")||(cpu()=="STM32L081KZ")||(cpu()=="STM32L082KB")||(cpu()=="STM32L082KZ")||(cpu()=="STM32L083CB")||(cpu()=="STM32L083CZ")||(cpu()=="STM32L083RB")||(cpu()=="STM32L083RZ"))
|
|
tree "TIMER 3"
|
|
base ad:0x40000400
|
|
width 12.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "TIM3_CR1,TIM3 control register 1"
|
|
bitfld.word 0x00 8.--9. " CKD ,Clock division" "tDTS=tCK_INT,tDTS=2*tCK_INT,tDTS=4*tCK_INT,"
|
|
bitfld.word 0x00 7. " ARPE ,Auto-reload preload enable" "Not buffered,Buffered"
|
|
bitfld.word 0x00 5.--6. " CMS ,Align mode selection" "Edge,Center1,Center2,Center3"
|
|
bitfld.word 0x00 4. " DIR ,Direction" "Up,Down"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OPM ,One pulse mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " URS ,Update request source" "Overflow/Underflow/UG set,Overflow/Underflow/DMA request"
|
|
bitfld.word 0x00 1. " UDIS ,Update disable" "No,Yes"
|
|
bitfld.word 0x00 0. " CEN ,Counter enable" "Disabled,Enabled"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "TIM3_CR2,TIM3 Control register 2"
|
|
bitfld.word 0x00 7. " TI1S ,TI1 Selection" "CH1 directly,CH1/CH2/CH3 xored"
|
|
bitfld.word 0x00 4.--6. " MMS ,Master Mode Selection" "Reset,Enable,Update,Compare Pulse,OC1REF,OC2REF,OC3REF,OC4REF"
|
|
bitfld.word 0x00 3. " CCDS ,Capture/Compare DMA Selection" "CC3,Update"
|
|
if (((per.w((ad:0x40000400)+0x08))&0x07)==0x00)
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TIM3_SMCR,TIM3 Slave mode control register"
|
|
bitfld.word 0x00 15. " ETP ,External trigger polarity" "Non-inverted/High/Rising,Inverted/Low/Falling"
|
|
bitfld.word 0x00 14. " ECE ,External clock enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--13. " ETPS ,External trigger prescaler" "Off,ETRP/2,ETRP/4,ETRP/8"
|
|
bitfld.word 0x00 8.--11. " ETF ,External trigger filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 7. " MSM ,Master/slave mode" "No action,Delayed"
|
|
bitfld.word 0x00 4.--6. " TS ,Trigger selection" "ITR0,ITR1,,,TI1F_ED,TI1FP1,TI2FP2,ETRF"
|
|
bitfld.word 0x00 0.--2. " SMS ,Slave mode selection" "Disabled,Encoder 1,Encoder 2,Encoder 3,Reset,Gated,Trigger,External Clock"
|
|
else
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TIM3_SMCR,TIM3 Slave mode control register"
|
|
bitfld.word 0x00 15. " ETP ,External trigger polarity" "Non-inverted/High/Rising,Inverted/Low/Falling"
|
|
bitfld.word 0x00 14. " ECE ,External clock enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--13. " ETPS ,External trigger prescaler" "Off,ETRP/2,ETRP/4,ETRP/8"
|
|
bitfld.word 0x00 8.--11. " ETF ,External trigger filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 7. " MSM ,Master/slave mode" "No action,Delayed"
|
|
rbitfld.word 0x00 4.--6. " TS ,Trigger selection" "ITR0,ITR1,,,TI1F_ED,TI1FP1,TI2FP2,ETRF"
|
|
bitfld.word 0x00 0.--2. " SMS ,Slave mode selection" "Disabled,Encoder 1,Encoder 2,Encoder 3,Reset,Gated,Trigger,External Clock"
|
|
endif
|
|
group.word 0x0C++0x1
|
|
line.word 0x00 "TIM3_DIER,TIM3 DMA/Interrupt enable register"
|
|
bitfld.word 0x00 14. " TDE ,Trigger DMA request enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " CC4DE ,Capture/Compare 4 DMA request enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " CC3DE ,Capture/Compare 3 DMA request enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " CC2DE ,Capture/Compare 2 DMA request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CC1DE ,Capture/Compare 1 DMA request enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " UDE ,Update DMA request enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " TIE ,Trigger interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " CC4IE ,Capture/Compare 4 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC3IE ,Capture/Compare 3 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " CC2IE ,Capture/Compare 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " CC1IE ,Capture/Compare 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UIE ,Update interrupt enable" "Disabled,Enabled"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "TIM3_SR,TIM3 Status register"
|
|
bitfld.word 0x00 12. " CC4OF ,Capture/Compare 4 Overcapture Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 11. " CC3OF ,Capture/Compare 3 Overcapture Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 10. " CC2OF ,Capture/Compare 2 Overcapture Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 9. " CC1OF ,Capture/Compare 1 Overcapture Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 6. " TIF ,Trigger interrupt Flag" "No trigger,Trigger"
|
|
bitfld.word 0x00 4. " CC4IF ,Capture/Compare 4 interrupt Flag input/output" "No input/No match,Captured/Matched"
|
|
bitfld.word 0x00 3. " CC3IF ,Capture/Compare 3 interrupt Flag input/output" "No input/No match,Captured/Matched"
|
|
bitfld.word 0x00 2. " CC2IF ,Capture/Compare 2 interrupt Flag input/output" "No input/No match,Captured/Matched"
|
|
textline " "
|
|
bitfld.word 0x00 1. " CC1IF ,Capture/Compare 1 interrupt Flag input/output" "No input/No match,Captured/Matched"
|
|
bitfld.word 0x00 0. " UIF ,Update interrupt Flag" "No update,Update"
|
|
wgroup.word 0x14++0x1
|
|
line.word 0x00 "TIM3_EGR,TIM3 Event generation register"
|
|
bitfld.word 0x00 6. " TG ,Trigger Generation" "No action,Enable"
|
|
bitfld.word 0x00 4. " CC4G ,Capture/Compare 4 Generation input/output" "No action/No action,Capture 4/Compare 4"
|
|
bitfld.word 0x00 3. " CC3G ,Capture/Compare 3 Generation input/output" "No action/No action,Capture 3/Compare 3"
|
|
bitfld.word 0x00 2. " CC2G ,Capture/Compare 2 Generation input/output" "No action/No action,Capture 2/Compare 2"
|
|
textline " "
|
|
bitfld.word 0x00 1. " CC1G ,Capture/Compare 1 Generation input/output" "No action/No action,Capture 1/Compare 1"
|
|
bitfld.word 0x00 0. " UG ,Update Generation" "Not generate,Generate"
|
|
if ((((per.w((ad:0x40000400+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40000400)+0x20))&0x11)==0x00))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM3_CCMR1,Output Compare 2 and Output Compare 1 mode register 1"
|
|
bitfld.word 0x00 15. " OC2CE ,Output Compare 2 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC1CE ,Output Compare 1 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40000400)+0x20))&0x11)==0x00))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM3_CCMR1,Input Capture 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC1CE ,Output Compare 1 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40000400)+0x20))&0x11)==0x00))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM3_CCMR1,Output compare 2 and Input capture 1 mode register 1"
|
|
bitfld.word 0x00 15. " OC2CE ,Output Compare 2 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)>=0x101)&&(((per.w((ad:0x40000400)+0x20))&0x11)==0x00))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM3_CCMR1,Input capture 2 and input capture 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40000400)+0x20))&0x11)==0x01))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM3_CCMR1,Output Compare 2 and Output Compare 1 mode register 1"
|
|
bitfld.word 0x00 15. " OC2CE ,Output Compare 2 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC1CE ,Output Compare 1 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40000400)+0x20))&0x11)==0x01))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM3_CCMR1,Input Capture 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC1CE ,Output Compare 1 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40000400)+0x20))&0x11)==0x01))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM3_CCMR1,Output compare 2 and Input capture 1 mode register 1"
|
|
bitfld.word 0x00 15. " OC2CE ,Output Compare 2 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)>=0x101)&&(((per.w((ad:0x40000400)+0x20))&0x11)==0x01))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM3_CCMR1,Input capture 2 and input capture 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40000400)+0x20))&0x11)==0x10))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM3_CCMR1,Output Compare 2 and Output Compare 1 mode register 1"
|
|
bitfld.word 0x00 15. " OC2CE ,Output Compare 2 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC1CE ,Output Compare 1 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40000400)+0x20))&0x11)==0x10))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM3_CCMR1,Input Capture 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC1CE ,Output Compare 1 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40000400)+0x20))&0x11)==0x10))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM3_CCMR1,Output compare 2 and Input capture 1 mode register 1"
|
|
bitfld.word 0x00 15. " OC2CE ,Output Compare 2 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)>=0x101)&&(((per.w((ad:0x40000400)+0x20))&0x11)==0x10))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM3_CCMR1,Input capture 2 and input capture 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40000400)+0x20))&0x11)==0x11))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM3_CCMR1,Output Compare 2 and Output Compare 1 mode register 1"
|
|
bitfld.word 0x00 15. " OC2CE ,Output Compare 2 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC1CE ,Output Compare 1 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40000400)+0x20))&0x11)==0x11))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM3_CCMR1,Input Capture 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC1CE ,Output Compare 1 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40000400)+0x20))&0x11)==0x11))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM3_CCMR1,Output compare 2 and Input capture 1 mode register 1"
|
|
bitfld.word 0x00 15. " OC2CE ,Output Compare 2 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)>=0x101)&&(((per.w((ad:0x40000400)+0x20))&0x11)==0x11))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM3_CCMR1,Input capture 2 and input capture 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
textline " "
|
|
endif
|
|
if ((((per.w((ad:0x40000400+0x1C)))&0x303)==0x000)&&(((per.w((ad:0x40000400+0x20)))&0x1100)==0x00))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM3_CCMR2,Output compare 3 and output compare 4 mode register 2"
|
|
bitfld.word 0x00 15. " OC4CE ,Output Compare 4 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC4M ,Output Compare 4 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC4PE ,Output Compare 4 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC4FE ,Output Compare 4 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC3CE ,Output Compare 3 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC3M ,Output Compare 3 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC3PE ,Output Compare 3 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC3FE ,Output Compare 3 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000400+0x1C)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40000400+0x20)))&0x1100)==0x00))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM3_CCMR2,Output compare 3 and Input Capture 4 mode register 2"
|
|
bitfld.word 0x00 12.--15. " IC4F ,Input Capture 4 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC4PSC ,Input Capture 4 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC3CE ,Output Compare 3 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC3M ,Output Compare 3 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC3PE ,Output Compare 3 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC3FE ,Output Compare 3 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000400+0x1C)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40000400+0x20)))&0x1100)==0x00))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM3_CCMR2,Input Capture 3 and output compare 4 mode register 2"
|
|
bitfld.word 0x00 15. " OC4CE ,Output Compare 4 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC4M ,Output Compare 4 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC4PE ,Output Compare 4 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC4FE ,Output Compare 4 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC3F ,Input Capture 3 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC3PSC ,Input Capture 3 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000400+0x1C)))&0x303)>=0x101)&&(((per.w((ad:0x40000400+0x20)))&0x1100)==0x00))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM3_CCMR2,Input Capture 3 and input capture 4 mode register 2"
|
|
bitfld.word 0x00 12.--15. " IC4F ,Input Capture 4 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC4PSC ,Input Capture 4 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC3F ,Input Capture 3 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC3PSC ,Input Capture 3 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000400+0x1C)))&0x303)==0x000)&&(((per.w((ad:0x40000400+0x20)))&0x1100)==0x100))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM3_CCMR2,Output compare 3 and output compare 4 mode register 2"
|
|
bitfld.word 0x00 15. " OC4CE ,Output Compare 4 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC4M ,Output Compare 4 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC4PE ,Output Compare 4 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC4FE ,Output Compare 4 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC3CE ,Output Compare 3 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC3M ,Output Compare 3 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC3PE ,Output Compare 3 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC3FE ,Output Compare 3 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000400+0x1C)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40000400+0x20)))&0x1100)==0x100))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM3_CCMR2,Output compare 3 and Input Capture 4 mode register 2"
|
|
bitfld.word 0x00 12.--15. " IC4F ,Input Capture 4 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC4PSC ,Input Capture 4 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC3CE ,Output Compare 3 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC3M ,Output Compare 3 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC3PE ,Output Compare 3 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC3FE ,Output Compare 3 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000400+0x1C)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40000400+0x20)))&0x1100)==0x100))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM3_CCMR2,Input Capture 3 and output compare 4 mode register 2"
|
|
bitfld.word 0x00 15. " OC4CE ,Output Compare 4 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC4M ,Output Compare 4 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC4PE ,Output Compare 4 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC4FE ,Output Compare 4 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC3F ,Input Capture 3 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC3PSC ,Input Capture 3 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000400+0x1C)))&0x303)>=0x101)&&(((per.w((ad:0x40000400+0x20)))&0x1100)==0x100))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM3_CCMR2,Input Capture 3 and input capture 4 mode register 2"
|
|
bitfld.word 0x00 12.--15. " IC4F ,Input Capture 4 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC4PSC ,Input Capture 4 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC3F ,Input Capture 3 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC3PSC ,Input Capture 3 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000400+0x1C)))&0x303)==0x000)&&(((per.w((ad:0x40000400+0x20)))&0x1100)==0x1000))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM3_CCMR2,Output compare 3 and output compare 4 mode register 2"
|
|
bitfld.word 0x00 15. " OC4CE ,Output Compare 4 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC4M ,Output Compare 4 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC4PE ,Output Compare 4 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC4FE ,Output Compare 4 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC3CE ,Output Compare 3 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC3M ,Output Compare 3 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC3PE ,Output Compare 3 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC3FE ,Output Compare 3 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000400+0x1C)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40000400+0x20)))&0x1100)==0x1000))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM3_CCMR2,Output compare 3 and Input Capture 4 mode register 2"
|
|
bitfld.word 0x00 12.--15. " IC4F ,Input Capture 4 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC4PSC ,Input Capture 4 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC3CE ,Output Compare 3 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC3M ,Output Compare 3 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC3PE ,Output Compare 3 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC3FE ,Output Compare 3 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000400+0x1C)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40000400+0x20)))&0x1100)==0x1000))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM3_CCMR2,Input Capture 3 and output compare 4 mode register 2"
|
|
bitfld.word 0x00 15. " OC4CE ,Output Compare 4 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC4M ,Output Compare 4 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC4PE ,Output Compare 4 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC4FE ,Output Compare 4 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC3F ,Input Capture 3 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC3PSC ,Input Capture 3 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000400+0x1C)))&0x303)>=0x101)&&(((per.w((ad:0x40000400+0x20)))&0x1100)==0x1000))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM3_CCMR2,Input Capture 3 and input capture 4 mode register 2"
|
|
bitfld.word 0x00 12.--15. " IC4F ,Input Capture 4 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC4PSC ,Input Capture 4 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC3F ,Input Capture 3 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC3PSC ,Input Capture 3 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000400+0x1C)))&0x303)==0x000)&&(((per.w((ad:0x40000400+0x20)))&0x1100)==0x1100))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM3_CCMR2,Output compare 3 and output compare 4 mode register 2"
|
|
bitfld.word 0x00 15. " OC4CE ,Output Compare 4 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC4M ,Output Compare 4 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC4PE ,Output Compare 4 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC4FE ,Output Compare 4 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC3CE ,Output Compare 3 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC3M ,Output Compare 3 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC3PE ,Output Compare 3 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC3FE ,Output Compare 3 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000400+0x1C)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40000400+0x20)))&0x1100)==0x1100))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM3_CCMR2,Output compare 3 and Input Capture 4 mode register 2"
|
|
bitfld.word 0x00 12.--15. " IC4F ,Input Capture 4 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC4PSC ,Input Capture 4 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 7. " OC3CE ,Output Compare 3 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 4.--6. " OC3M ,Output Compare 3 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC3PE ,Output Compare 3 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC3FE ,Output Compare 3 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000400+0x1C)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40000400+0x20)))&0x1100)==0x1100))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM3_CCMR2,Input Capture 3 and output compare 4 mode register 2"
|
|
bitfld.word 0x00 15. " OC4CE ,Output Compare 4 Clear Enable" "Not affected,Cleared"
|
|
bitfld.word 0x00 12.--14. " OC4M ,Output Compare 4 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 11. " OC4PE ,Output Compare 4 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC4FE ,Output Compare 4 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC3F ,Input Capture 3 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC3PSC ,Input Capture 3 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
elif ((((per.w((ad:0x40000400+0x1C)))&0x303)>=0x101)&&(((per.w((ad:0x40000400+0x20)))&0x1100)==0x1100))
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "TIM3_CCMR2,Input Capture 3 and input capture 4 mode register 2"
|
|
bitfld.word 0x00 12.--15. " IC4F ,Input Capture 4 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " IC4PSC ,Input Capture 4 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 8.--9. " CC4S ,Capture/Compare 4 Selection" "Output,Input/IC4 mapped on TI4,Input/IC4 mapped on TI3,Input/IC4 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC3F ,Input Capture 3 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC3PSC ,Input Capture 3 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
textline " "
|
|
rbitfld.word 0x00 0.--1. " CC3S ,Capture/Compare 3 Selection" "Output,Input/IC3 mapped on TI3,Input/IC3 mapped on TI4,Input/IC3 mapped on TRC"
|
|
endif
|
|
if ((((per.w((ad:0x40000400+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40000400+0x1C)))&0x303)==0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM3_CCER,Output compare ch1 ch2 ch3 ch4 enable register"
|
|
bitfld.word 0x00 15. " CC4NP ,Output compare 4 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 13. " CC4P ,Output Compare 4 Polarity" "High,Low"
|
|
bitfld.word 0x00 12. " CC4E ,Output Compare 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CC3NP ,Output Compare 3 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 9. " CC3P ,Output Compare 3 Polarity" "High,Low"
|
|
bitfld.word 0x00 8. " CC3E ,Output Compare 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CC2NP ,Output Compare 2 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 5. " CC2P ,Output Compare 2 Polarity" "High,Low"
|
|
bitfld.word 0x00 4. " CC2E ,Output Compare 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC1NP ,Output compare 1 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 1. " CC1P ,Output Compare 1 Polarity" "High,Low"
|
|
bitfld.word 0x00 0. " CC1E ,Output Compare 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x300)==0x000)&&(((per.w((ad:0x40000400+0x1C)))&0x303)==0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM3_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 15. " CC4NP ,Output compare 4 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 13. " CC4P ,Output Compare 4 Polarity" "High,Low"
|
|
bitfld.word 0x00 12. " CC4E ,Output Compare 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CC3NP ,Output Compare 3 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 9. " CC3P ,Output Compare 3 Polarity" "High,Low"
|
|
bitfld.word 0x00 8. " CC3E ,Output Compare 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CC2NP ,Output Compare 2 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 5. " CC2P ,Output Compare 2 Polarity" "High,Low"
|
|
bitfld.word 0x00 4. " CC2E ,Output Compare 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. 3. " CC1NP ,Input Capture 1 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 0. " CC1E ,Input Capture 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x3)==0x0)&&(((per.w((ad:0x40000400+0x1C)))&0x303)==0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM3_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 15. " CC4NP ,Output compare 4 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 13. " CC4P ,Output Compare 4 Polarity" "High,Low"
|
|
bitfld.word 0x00 12. " CC4E ,Output Compare 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CC3NP ,Output Compare 3 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 9. " CC3P ,Output Compare 3 Polarity" "High,Low"
|
|
bitfld.word 0x00 8. " CC3E ,Output Compare 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. 7. " CC2NP ,Input Capture 2 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 4. " CC2E ,Input Capture 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC1NP ,Output compare 1 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 1. " CC1P ,Output Compare 1 Polarity" "High,Low"
|
|
bitfld.word 0x00 0. " CC1E ,Output Compare 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40000400+0x1C)))&0x300)==0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM3_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 15. " CC4NP ,Output compare 4 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 13. " CC4P ,Output Compare 4 Polarity" "High,Low"
|
|
bitfld.word 0x00 12. " CC4E ,Output Compare 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. 11. " CC3NP ,Input capture 3 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 8. " CC3E ,Input capture 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CC2NP ,Output Compare 2 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 5. " CC2P ,Output Compare 2 Polarity" "High,Low"
|
|
bitfld.word 0x00 4. " CC2E ,Output Compare 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC1NP ,Output compare 1 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 1. " CC1P ,Output Compare 1 Polarity" "High,Low"
|
|
bitfld.word 0x00 0. " CC1E ,Output Compare 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40000400+0x1C)))&0x3)==0x0))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM3_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 13. 15. " CC4NP ,Input Capture 4 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 12. " CC4E ,Input Capture 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CC3NP ,Output Compare 3 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 9. " CC3P ,Output Compare 3 Polarity" "High,Low"
|
|
bitfld.word 0x00 8. " CC3E ,Output Compare 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CC2NP ,Output Compare 2 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 5. " CC2P ,Output Compare 2 Polarity" "High,Low"
|
|
bitfld.word 0x00 4. " CC2E ,Output Compare 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC1NP ,Output compare 1 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 1. " CC1P ,Output Compare 1 Polarity" "High,Low"
|
|
bitfld.word 0x00 0. " CC1E ,Output Compare 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x300)==0x000)&&(((per.w((ad:0x40000400+0x1C)))&0x300)==0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM3_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 15. " CC4NP ,Output compare 4 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 13. " CC4P ,Output Compare 4 Polarity" "High,Low"
|
|
bitfld.word 0x00 12. " CC4E ,Output Compare 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. 11. " CC3NP ,Input capture 3 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 8. " CC3E ,Input capture 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CC2NP ,Output Compare 2 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 5. " CC2P ,Output Compare 2 Polarity" "High,Low"
|
|
bitfld.word 0x00 4. " CC2E ,Output Compare 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. 3. " CC1NP ,Input Capture 1 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 0. " CC1E ,Input Capture 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x300)==0x000)&&(((per.w((ad:0x40000400+0x1C)))&0x3)==0x0))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM3_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 13. 15. " CC4NP ,Input Capture 4 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 12. " CC4E ,Input Capture 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CC3NP ,Output Compare 3 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 9. " CC3P ,Output Compare 3 Polarity" "High,Low"
|
|
bitfld.word 0x00 8. " CC3E ,Output Compare 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CC2NP ,Output Compare 2 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 5. " CC2P ,Output Compare 2 Polarity" "High,Low"
|
|
bitfld.word 0x00 4. " CC2E ,Output Compare 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. 3. " CC1NP ,Input Capture 1 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 0. " CC1E ,Input Capture 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x3)==0x0)&&(((per.w((ad:0x40000400+0x1C)))&0x300)==0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM3_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 15. " CC4NP ,Output compare 4 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 13. " CC4P ,Output Compare 4 Polarity" "High,Low"
|
|
bitfld.word 0x00 12. " CC4E ,Output Compare 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. 11. " CC3NP ,Input capture 3 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 8. " CC3E ,Input capture 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. 7. " CC2NP ,Input Capture 2 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 4. " CC2E ,Input Capture 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC1NP ,Output compare 1 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 1. " CC1P ,Output Compare 1 Polarity" "High,Low"
|
|
bitfld.word 0x00 0. " CC1E ,Output Compare 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x3)==0x0)&&(((per.w((ad:0x40000400+0x1C)))&0x3)==0x0))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM3_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 13. 15. " CC4NP ,Input Capture 4 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 12. " CC4E ,Input Capture 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CC3NP ,Output Compare 3 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 9. " CC3P ,Output Compare 3 Polarity" "High,Low"
|
|
bitfld.word 0x00 8. " CC3E ,Output Compare 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. 7. " CC2NP ,Input Capture 2 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 4. " CC2E ,Input Capture 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC1NP ,Output compare 1 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 1. " CC1P ,Output Compare 1 Polarity" "High,Low"
|
|
bitfld.word 0x00 0. " CC1E ,Output Compare 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)!=0x000)&&(((per.w((ad:0x40000400+0x1C)))&0x303)==0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM3_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 15. " CC4NP ,Output compare 4 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 13. " CC4P ,Output Compare 4 Polarity" "High,Low"
|
|
bitfld.word 0x00 12. " CC4E ,Output Compare 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CC3NP ,Output Compare 3 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 9. " CC3P ,Output Compare 3 Polarity" "High,Low"
|
|
bitfld.word 0x00 8. " CC3E ,Output Compare 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. 7. " CC2NP ,Input Capture 2 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 4. " CC2E ,Input Capture 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. 3. " CC1NP ,Input Capture 1 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 0. " CC1E ,Input Capture 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)!=0x000)&&(((per.w((ad:0x40000400+0x1C)))&0x300)==0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM3_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 15. " CC4NP ,Output compare 4 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 13. " CC4P ,Output Compare 4 Polarity" "High,Low"
|
|
bitfld.word 0x00 12. " CC4E ,Output Compare 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. 11. " CC3NP ,Input capture 3 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 8. " CC3E ,Input capture 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. 7. " CC2NP ,Input Capture 2 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 4. " CC2E ,Input Capture 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. 3. " CC1NP ,Input Capture 1 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 0. " CC1E ,Input Capture 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)!=0x000)&&(((per.w((ad:0x40000400+0x1C)))&0x3)==0x0))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM3_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 13. 15. " CC4NP ,Input Capture 4 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 12. " CC4E ,Input Capture 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CC3NP ,Output Compare 3 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 9. " CC3P ,Output Compare 3 Polarity" "High,Low"
|
|
bitfld.word 0x00 8. " CC3E ,Output Compare 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. 7. " CC2NP ,Input Capture 2 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 4. " CC2E ,Input Capture 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. 3. " CC1NP ,Input Capture 1 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 0. " CC1E ,Input Capture 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40000400+0x1C)))&0x303)!=0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM3_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 13. 15. " CC4NP ,Input Capture 4 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 12. " CC4E ,Input Capture 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. 11. " CC3NP ,Input capture 3 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 8. " CC3E ,Input capture 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CC2NP ,Output Compare 2 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 5. " CC2P ,Output Compare 2 Polarity" "High,Low"
|
|
bitfld.word 0x00 4. " CC2E ,Output Compare 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC1NP ,Output compare 1 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 1. " CC1P ,Output Compare 1 Polarity" "High,Low"
|
|
bitfld.word 0x00 0. " CC1E ,Output Compare 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x300)==0x000)&&(((per.w((ad:0x40000400+0x1C)))&0x303)!=0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM3_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 13. 15. " CC4NP ,Input Capture 4 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 12. " CC4E ,Input Capture 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. 11. " CC3NP ,Input capture 3 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 8. " CC3E ,Input capture 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CC2NP ,Output Compare 2 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 5. " CC2P ,Output Compare 2 Polarity" "High,Low"
|
|
bitfld.word 0x00 4. " CC2E ,Output Compare 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. 3. " CC1NP ,Input Capture 1 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 0. " CC1E ,Input Capture 1 enable" "Disabled,Enabled"
|
|
elif ((((per.w((ad:0x40000400+0x18)))&0x3)==0x0)&&(((per.w((ad:0x40000400+0x1C)))&0x303)!=0x000))
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM3_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 13. 15. " CC4NP ,Input Capture 4 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 12. " CC4E ,Input Capture 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. 11. " CC3NP ,Input capture 3 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 8. " CC3E ,Input capture 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. 7. " CC2NP ,Input Capture 2 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 4. " CC2E ,Input Capture 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC1NP ,Output compare 1 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 1. " CC1P ,Output Compare 1 Polarity" "High,Low"
|
|
bitfld.word 0x00 0. " CC1E ,Output Compare 1 enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM3_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 13. 15. " CC4NP ,Input Capture 4 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 12. " CC4E ,Input Capture 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. 11. " CC3NP ,Input capture 3 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 8. " CC3E ,Input capture 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. 7. " CC2NP ,Input Capture 2 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 4. " CC2E ,Input Capture 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. 3. " CC1NP ,Input Capture 1 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 0. " CC1E ,Input Capture 1 enable" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x24++0x1
|
|
line.word 0x00 "TIM3_CNT,Counter"
|
|
group.word 0x28++0x1
|
|
line.word 0x00 "TIM3_PSC,Prescaler"
|
|
group.word 0x2C++0x1
|
|
line.word 0x00 "TIM3_ARR,Auto-reload register"
|
|
if (((per.w((ad:0x40000400+0x18)))&0x03)!=0x00)
|
|
group.word 0x34++0x1
|
|
line.word 0x00 "TIM3_CCR1,Low input capture register 1"
|
|
else
|
|
group.word 0x34++0x1
|
|
line.word 0x00 "TIM3_CCR1,Low output compare register 1"
|
|
endif
|
|
if (((per.w((ad:0x40000400+0x18)))&0x300)!=0x000)
|
|
group.word 0x38++0x1
|
|
line.word 0x00 "TIM3_CCR2,Low input capture register 2"
|
|
else
|
|
group.word 0x38++0x1
|
|
line.word 0x00 "TIM3_CCR2,Low output compare register 2"
|
|
endif
|
|
if (((per.w((ad:0x40000400+0x1C)))&0x3)!=0x00)
|
|
group.word 0x3C++0x1
|
|
line.word 0x00 "TIM3_CCR3,Low input capture register 3"
|
|
else
|
|
group.word 0x3C++0x1
|
|
line.word 0x00 "TIM3_CCR3,Low output compare register 3"
|
|
endif
|
|
if (((per.w((ad:0x40000400+0x1C)))&0x300)!=0x000)
|
|
group.word 0x3C++0x1
|
|
line.word 0x00 "TIM3_CCR4,Low input capture register 4"
|
|
else
|
|
group.word 0x3C++0x1
|
|
line.word 0x00 "TIM3_CCR4,Low output compare register 4"
|
|
endif
|
|
group.word 0x48++0x1
|
|
line.word 0x00 "TIM3_DCR,DMA control register"
|
|
bitfld.word 0x00 8.--12. " DBL ,DMA burst length" "1 transfer,2 transfers,3 transfers,4 transfers,5 transfers,6 transfers,7 transfers,8 transfers,9 transfers,10 transfers,11 transfers,12 transfers,13 transfers,14 transfers,15 transfers,16 transfers,17 transfers,18 transfers,..."
|
|
bitfld.word 0x00 0.--4. " DBA ,DMA base address" "TIM3_CR1,TIM3_CR2,TIM3_SMCR,TIM3_DIER,TIM3_SR,TIM3_EGR,TIM3_CCMR1,TIM3_CCMR2,TIM3_CCER,TIM3_CNT,TIM3_PSC,TIM3_ARR,TIM3_CCR1,TIM3_CCR2,TIM3_CCR3,TIM3_CCR4,..."
|
|
group.word 0x4C++0x1
|
|
line.word 0x00 "TIM3_DMAR,DMA address for full transfer"
|
|
group.word 0x50++0x1
|
|
line.word 0x00 "TIM3_OR,TIM3 option register"
|
|
bitfld.word 0x00 4. " TI_RMP[2] ,Timer 3 remapping on PC9" "OSB_OE,TIM3_CH4"
|
|
bitfld.word 0x00 3. " TI_RMP[1] ,Timer 3 remapping on PB5" "OTIM22_CH2,TIM3_CH2"
|
|
bitfld.word 0x00 2. " TI_RMP[0] ,Timer 3 TI remap" "USB_SOF,PE3/PA6/PC6/PB4"
|
|
bitfld.word 0x00 0.--1. " ETR_RMP ,Timer2 ETR remap" "PE2/PD2,PE2/PD2,HSI48/6,PE2/PD2"
|
|
width 0xB
|
|
tree.end
|
|
endif
|
|
tree "TIMER 21"
|
|
base ad:0x40010800
|
|
width 12.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "TIM21_CR1,TIM21 control register 1"
|
|
bitfld.word 0x00 8.--9. " CKD ,Clock division" "tDTS=tCK_INT,tDTS=2*tCK_INT,tDTS=4*tCK_INT,"
|
|
bitfld.word 0x00 7. " ARPE ,Auto-reload preload enable" "Not buffered,Buffered"
|
|
bitfld.word 0x00 5.--6. " CMS ,Align mode selection" "Edge,Center1,Center2,Center3"
|
|
bitfld.word 0x00 4. " DIR ,Direction" "Up,Down"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OPM ,One pulse mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " URS ,Update request source" "Overflow/Underflow/UG set,Overflow/Underflow/DMA request"
|
|
bitfld.word 0x00 1. " UDIS ,Update disable" "No,Yes"
|
|
bitfld.word 0x00 0. " CEN ,Counter enable" "Disabled,Enabled"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "TIM21_CR2,TIM21 Control register 2"
|
|
bitfld.word 0x00 4.--6. " MMS ,Master Mode Selection" "Reset,Enable,Update,Compare Pulse,OC1REF,OC2REF,..."
|
|
if (((per.w((ad:0x40010800)+0x08))&0x07)==0x00)
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TIM21_SMCR,TIM21 Slave mode control register"
|
|
bitfld.word 0x00 15. " ETP ,External trigger polarity" "Non-inverted/High/Rising,Inverted/Low/Falling"
|
|
bitfld.word 0x00 14. " ECE ,External clock enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--13. " ETPS ,External trigger prescaler" "Off,ETRP/2,ETRP/4,ETRP/8"
|
|
bitfld.word 0x00 8.--11. " ETF ,External trigger filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 7. " MSM ,Master/slave mode" "No action,Delayed"
|
|
bitfld.word 0x00 4.--6. " TS ,Trigger selection" "ITR0,ITR1,,,TI1F_ED,TI1FP1,TI2FP2,"
|
|
bitfld.word 0x00 0.--2. " SMS ,Slave mode selection" "Disabled,,,,Reset,Gated,Trigger,"
|
|
else
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TIM21_SMCR,TIM21 Slave mode control register"
|
|
bitfld.word 0x00 15. " ETP ,External trigger polarity" "Non-inverted/High/Rising,Inverted/Low/Falling"
|
|
bitfld.word 0x00 14. " ECE ,External clock enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--13. " ETPS ,External trigger prescaler" "Off,ETRP/2,ETRP/4,ETRP/8"
|
|
bitfld.word 0x00 8.--11. " ETF ,External trigger filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 7. " MSM ,Master/slave mode" "No action,Delayed"
|
|
rbitfld.word 0x00 4.--6. " TS ,Trigger selection" "ITR0,ITR1,,,TI1F_ED,TI1FP1,TI2FP2,"
|
|
bitfld.word 0x00 0.--2. " SMS ,Slave mode selection" "Disabled,,,,Reset,Gated,Trigger,"
|
|
endif
|
|
group.word 0x0C++0x1
|
|
line.word 0x00 "TIM21_DIER,TIM21 DMA/Interrupt enable register"
|
|
bitfld.word 0x00 6. " TIE ,Trigger interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " CC2IE ,Capture/Compare 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " CC1IE ,Capture/Compare 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UIE ,Update interrupt enable" "Disabled,Enabled"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "TIM21_SR,TIM21 Status register"
|
|
bitfld.word 0x00 10. " CC2OF ,Capture/Compare 2 Overcapture Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 9. " CC1OF ,Capture/Compare 1 Overcapture Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 6. " TIF ,Trigger interrupt Flag" "No trigger,Trigger"
|
|
bitfld.word 0x00 2. " CC2IF ,Capture/Compare 2 interrupt Flag input/output" "No input/No match,Captured/Matched"
|
|
textline " "
|
|
bitfld.word 0x00 1. " CC1IF ,Capture/Compare 1 interrupt Flag input/output" "No input/No match,Captured/Matched"
|
|
bitfld.word 0x00 0. " UIF ,Update interrupt Flag" "No update,Update"
|
|
wgroup.word 0x14++0x1
|
|
line.word 0x00 "TIM21_EGR,TIM21 Event generation register"
|
|
bitfld.word 0x00 6. " TG ,Trigger Generation" "No action,Enable"
|
|
bitfld.word 0x00 2. " CC2G ,Capture/Compare 2 Generation input/output" "No action/No action,Capture 2/Compare 2"
|
|
bitfld.word 0x00 1. " CC1G ,Capture/Compare 1 Generation input/output" "No action/No action,Capture 1/Compare 1"
|
|
bitfld.word 0x00 0. " UG ,Update Generation" "Not generate,Generate"
|
|
if ((((per.w((ad:0x40010800+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40010800+0x20)))&0x11)==0x00))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM21_CCMR1,Output compare 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40010800+0x18)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40010800+0x20)))&0x11)==0x00))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM21_CCMR1,Input capture 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40010800+0x18)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40010800+0x20)))&0x11)==0x00))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM21_CCMR1,Output compare 2 and Input capture 1 mode register 1"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40010800+0x18)))&0x303)>=0x101)&&(((per.w((ad:0x40010800+0x20)))&0x11)==0x00))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM21_CCMR1,Input capture 1 and Input capture 2 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40010800+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40010800+0x20)))&0x11)==0x01))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM21_CCMR1,Output compare 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40010800+0x18)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40010800+0x20)))&0x11)==0x01))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM21_CCMR1,Input capture 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40010800+0x18)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40010800+0x20)))&0x11)==0x01))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM21_CCMR1,Output compare 2 and Input capture 1 mode register 1"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40010800+0x18)))&0x303)>=0x101)&&(((per.w((ad:0x40010800+0x20)))&0x11)==0x01))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM21_CCMR1,Input capture 1 and Input capture 2 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40010800+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40010800+0x20)))&0x11)==0x10))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM21_CCMR1,Output compare 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40010800+0x18)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40010800+0x20)))&0x11)==0x10))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM21_CCMR1,Input capture 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40010800+0x18)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40010800+0x20)))&0x11)==0x10))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM21_CCMR1,Output compare 2 and Input capture 1 mode register 1"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40010800+0x18)))&0x303)>=0x101)&&(((per.w((ad:0x40010800+0x20)))&0x11)==0x10))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM21_CCMR1,Input capture 1 and Input capture 2 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
rbitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40010800+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40010800+0x20)))&0x11)==0x11))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM21_CCMR1,Output compare 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40010800+0x18)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40010800+0x20)))&0x11)==0x11))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM21_CCMR1,Input capture 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40010800+0x18)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40010800+0x20)))&0x11)==0x11))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM21_CCMR1,Output compare 2 and Input capture 1 mode register 1"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40010800+0x18)))&0x303)>=0x101)&&(((per.w((ad:0x40010800+0x20)))&0x11)==0x11))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM21_CCMR1,Input capture 1 and Input capture 2 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
endif
|
|
if ((((per.w((ad:0x40010800+0x18)))&0x303)==0x00))
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "TIM21_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 7. " CC2NP ,Output Compare 2 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 5. " CC2P ,Output Compare 2 Polarity" "High,Low"
|
|
bitfld.word 0x00 4. " CC2E ,Output Compare 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC1NP ,Output compare 1 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 1. " CC1P ,Output Compare 1 Polarity" "High,Low"
|
|
bitfld.word 0x00 0. " CC1E ,Output Compare 1 enable" "Disabled,Enabled"
|
|
elif (((per.w((ad:0x40010800+0x18)))&0x300)==0x00)
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM21_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 7. " CC2NP ,Output Compare 2 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 5. " CC2P ,Output Compare 2 Polarity" "High,Low"
|
|
bitfld.word 0x00 4. " CC2E ,Output Compare 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. 3. " CC1NP ,Input Capture 1 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 0. " CC1E ,Input Capture 1 enable" "Disabled,Enabled"
|
|
elif (((per.w((ad:0x40010800+0x18)))&0x03)==0x00)
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "TIM21_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 5. 7. " CC2NP ,Input Capture 2 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 4. " CC2E ,Input Capture 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC1NP ,Output compare 1 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 1. " CC1P ,Output Compare 1 Polarity" "High,Low"
|
|
bitfld.word 0x00 0. " CC1E ,Output Compare 1 enable" "Disabled,Enabled"
|
|
elif (((per.w((ad:0x40010800+0x18)))&0x303)!=0x00)
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "TIM21_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 5. 7. " CC2NP ,Input Capture 2 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 4. " CC2E ,Input Capture 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. 3. " CC1NP ,Input Capture 1 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 0. " CC1E ,Input Capture 1 enable" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x24++0x1
|
|
line.word 0x00 "TIM21_CNT,Counter"
|
|
group.word 0x28++0x1
|
|
line.word 0x00 "TIM21_PSC,Prescaler"
|
|
group.word 0x2C++0x1
|
|
line.word 0x00 "TIM21_ARR,Auto-reload register"
|
|
if (((per.w((ad:0x40010800+0x18)))&0x03)!=0x00)
|
|
group.word 0x34++0x1
|
|
line.word 0x00 "TIM21_CCR1,Low input capture register 1"
|
|
else
|
|
group.word 0x34++0x1
|
|
line.word 0x00 "TIM21_CCR1,Low output compare register 1"
|
|
endif
|
|
if (((per.w((ad:0x40010800+0x18)))&0x300)!=0x000)
|
|
group.word 0x38++0x1
|
|
line.word 0x00 "TIM21_CCR2,Low input capture register 2"
|
|
else
|
|
group.word 0x38++0x1
|
|
line.word 0x00 "TIM21_CCR2,Low output compare register 2"
|
|
endif
|
|
group.word 0x50++0x1
|
|
line.word 0x00 "TIM21_OR,TIM21 option register"
|
|
bitfld.word 0x00 5. " TI2_RMP ,Timer21 TI2 (connected to TIM21_CH1) remap" "GPIO,COMP2_OUT"
|
|
bitfld.word 0x00 2.--4. " TI1_RMP ,Timer21 TI1 (connected to TIM21_CH1) remap" "GPIO,RTC WAKEUP,HSE_RTC,MSI,LSE,LSI,COMP1_OUT,MCO"
|
|
bitfld.word 0x00 0.--1. " ETR_RMP ,Timer21 ETR remap" "GPIO,COMP2_OUT,COMP1_OUT,LSE"
|
|
width 0xB
|
|
tree.end
|
|
sif ((cpu()!="STM32L011D3")&&(cpu()!="STM32L011D4")&&(cpu()!="STM32L011E3")&&(cpu()!="STM32L011E4")&&(cpu()!="STM32L011F3")&&(cpu()!="STM32L011F4")&&(cpu()!="STM32L011G3")&&(cpu()!="STM32L011G4")&&(cpu()!="STM32L011K3")&&(cpu()!="STM32L011K4")&&(cpu()!="STM32L021D4")&&(cpu()!="STM32L021F4")&&(cpu()!="STM32L021G4")&&(cpu()!="STM32L021K4"))
|
|
tree "TIMER 22"
|
|
base ad:0x40011400
|
|
width 12.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "TIM22_CR1,TIM22 control register 1"
|
|
bitfld.word 0x00 8.--9. " CKD ,Clock division" "tDTS=tCK_INT,tDTS=2*tCK_INT,tDTS=4*tCK_INT,"
|
|
bitfld.word 0x00 7. " ARPE ,Auto-reload preload enable" "Not buffered,Buffered"
|
|
bitfld.word 0x00 5.--6. " CMS ,Align mode selection" "Edge,Center1,Center2,Center3"
|
|
bitfld.word 0x00 4. " DIR ,Direction" "Up,Down"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OPM ,One pulse mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " URS ,Update request source" "Overflow/Underflow/UG set,Overflow/Underflow/DMA request"
|
|
bitfld.word 0x00 1. " UDIS ,Update disable" "No,Yes"
|
|
bitfld.word 0x00 0. " CEN ,Counter enable" "Disabled,Enabled"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "TIM22_CR2,TIM22 Control register 2"
|
|
bitfld.word 0x00 4.--6. " MMS ,Master Mode Selection" "Reset,Enable,Update,Compare Pulse,OC1REF,OC2REF,..."
|
|
if (((per.w((ad:0x40011400)+0x08))&0x07)==0x00)
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TIM22_SMCR,TIM22 Slave mode control register"
|
|
bitfld.word 0x00 15. " ETP ,External trigger polarity" "Non-inverted/High/Rising,Inverted/Low/Falling"
|
|
bitfld.word 0x00 14. " ECE ,External clock enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--13. " ETPS ,External trigger prescaler" "Off,ETRP/2,ETRP/4,ETRP/8"
|
|
bitfld.word 0x00 8.--11. " ETF ,External trigger filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 7. " MSM ,Master/slave mode" "No action,Delayed"
|
|
bitfld.word 0x00 4.--6. " TS ,Trigger selection" "ITR0,ITR1,,,TI1F_ED,TI1FP1,TI2FP2,"
|
|
bitfld.word 0x00 0.--2. " SMS ,Slave mode selection" "Disabled,,,,Reset,Gated,Trigger,"
|
|
else
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "TIM22_SMCR,TIM22 Slave mode control register"
|
|
bitfld.word 0x00 15. " ETP ,External trigger polarity" "Non-inverted/High/Rising,Inverted/Low/Falling"
|
|
bitfld.word 0x00 14. " ECE ,External clock enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--13. " ETPS ,External trigger prescaler" "Off,ETRP/2,ETRP/4,ETRP/8"
|
|
bitfld.word 0x00 8.--11. " ETF ,External trigger filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 7. " MSM ,Master/slave mode" "No action,Delayed"
|
|
rbitfld.word 0x00 4.--6. " TS ,Trigger selection" "ITR0,ITR1,,,TI1F_ED,TI1FP1,TI2FP2,"
|
|
bitfld.word 0x00 0.--2. " SMS ,Slave mode selection" "Disabled,,,,Reset,Gated,Trigger,"
|
|
endif
|
|
group.word 0x0C++0x1
|
|
line.word 0x00 "TIM22_DIER,TIM22 DMA/Interrupt enable register"
|
|
bitfld.word 0x00 6. " TIE ,Trigger interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " CC2IE ,Capture/Compare 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " CC1IE ,Capture/Compare 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UIE ,Update interrupt enable" "Disabled,Enabled"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "TIM22_SR,TIM22 Status register"
|
|
bitfld.word 0x00 10. " CC2OF ,Capture/Compare 2 Overcapture Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 9. " CC1OF ,Capture/Compare 1 Overcapture Flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 6. " TIF ,Trigger interrupt Flag" "No trigger,Trigger"
|
|
bitfld.word 0x00 2. " CC2IF ,Capture/Compare 2 interrupt Flag input/output" "No input/No match,Captured/Matched"
|
|
textline " "
|
|
bitfld.word 0x00 1. " CC1IF ,Capture/Compare 1 interrupt Flag input/output" "No input/No match,Captured/Matched"
|
|
bitfld.word 0x00 0. " UIF ,Update interrupt Flag" "No update,Update"
|
|
wgroup.word 0x14++0x1
|
|
line.word 0x00 "TIM22_EGR,TIM22 Event generation register"
|
|
bitfld.word 0x00 6. " TG ,Trigger Generation" "No action,Enable"
|
|
bitfld.word 0x00 2. " CC2G ,Capture/Compare 2 Generation input/output" "No action/No action,Capture 2/Compare 2"
|
|
bitfld.word 0x00 1. " CC1G ,Capture/Compare 1 Generation input/output" "No action/No action,Capture 1/Compare 1"
|
|
bitfld.word 0x00 0. " UG ,Update Generation" "Not generate,Generate"
|
|
if ((((per.w((ad:0x40011400+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40011400+0x20)))&0x11)==0x00))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM22_CCMR1,Output compare 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40011400+0x18)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40011400+0x20)))&0x11)==0x00))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM22_CCMR1,Input capture 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40011400+0x18)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40011400+0x20)))&0x11)==0x00))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM22_CCMR1,Output compare 2 and Input capture 1 mode register 1"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40011400+0x18)))&0x303)>=0x101)&&(((per.w((ad:0x40011400+0x20)))&0x11)==0x00))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM22_CCMR1,Input capture 1 and Input capture 2 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40011400+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40011400+0x20)))&0x11)==0x01))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM22_CCMR1,Output compare 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40011400+0x18)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40011400+0x20)))&0x11)==0x01))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM22_CCMR1,Input capture 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40011400+0x18)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40011400+0x20)))&0x11)==0x01))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM22_CCMR1,Output compare 2 and Input capture 1 mode register 1"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40011400+0x18)))&0x303)>=0x101)&&(((per.w((ad:0x40011400+0x20)))&0x11)==0x01))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM22_CCMR1,Input capture 1 and Input capture 2 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40011400+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40011400+0x20)))&0x11)==0x10))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM22_CCMR1,Output compare 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40011400+0x18)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40011400+0x20)))&0x11)==0x10))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM22_CCMR1,Input capture 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40011400+0x18)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40011400+0x20)))&0x11)==0x10))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM22_CCMR1,Output compare 2 and Input capture 1 mode register 1"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40011400+0x18)))&0x303)>=0x101)&&(((per.w((ad:0x40011400+0x20)))&0x11)==0x10))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM22_CCMR1,Input capture 1 and Input capture 2 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
bitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
rbitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
bitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40011400+0x18)))&0x303)==0x000)&&(((per.w((ad:0x40011400+0x20)))&0x11)==0x11))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM22_CCMR1,Output compare 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40011400+0x18)))&0x303)==(0x100||0x200||0x300))&&(((per.w((ad:0x40011400+0x20)))&0x11)==0x11))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM22_CCMR1,Input capture 2 and Output compare 1 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
bitfld.word 0x00 4.--6. " OC1M ,Output Compare 1 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
textline " "
|
|
bitfld.word 0x00 3. " OC1PE ,Output Compare 1 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " OC1FE ,Output Compare 1 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40011400+0x18)))&0x303)==(0x001||0x002||0x003))&&(((per.w((ad:0x40011400+0x20)))&0x11)==0x11))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM22_CCMR1,Output compare 2 and Input capture 1 mode register 1"
|
|
bitfld.word 0x00 12.--14. " OC2M ,Output Compare 2 Mode" "Frozen,Active,Inactive,Toggle,Force inactive,Force active,PWM1,PWM2"
|
|
bitfld.word 0x00 11. " OC2PE ,Output Compare 2 Preload enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " OC2FE ,Output Compare 2 Fast enable" "Normal/Min delay 5,Compared/Min delay 3"
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
elif ((((per.w((ad:0x40011400+0x18)))&0x303)>=0x101)&&(((per.w((ad:0x40011400+0x20)))&0x11)==0x11))
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "TIM22_CCMR1,Input capture 1 and Input capture 2 mode register 1"
|
|
bitfld.word 0x00 12.--15. " IC2F ,Input Capture 2 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
bitfld.word 0x00 10.--11. " IC2PSC ,Input Capture 2 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
rbitfld.word 0x00 8.--9. " CC2S ,Capture/Compare 2 Selection" "Output,Input/IC2 mapped on TI2,Input/IC2 mapped on TI1,Input/IC2 mapped on TRC"
|
|
bitfld.word 0x00 4.--7. " IC1F ,Input Capture 1 Filter" "No filter,Fck_int N=2,Fck_int N=4,Fck_int N=8,Fdts/2 N=6,Fdts/2 N=8,Fdts/4 N=6,Fdts/4 N=8,Fdts/8 N=6,Fdts/8 N=8,Fdts/16 N=5,Fdts/16 N=6,Fdts/16 N=8,Fdts/32 N=5,Fdts/32 N=6,Fdts/32 N=8"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IC1PSC ,Input Capture 1 Prescaler" "No prescaler,Every 2 events,Every 4 events,Every 8 events"
|
|
rbitfld.word 0x00 0.--1. " CC1S ,Capture/Compare 1 Selection" "Output,Input/IC1 mapped on TI1,Input/IC1 mapped on TI2,Input/IC1 mapped on TRC"
|
|
endif
|
|
if ((((per.w((ad:0x40011400+0x18)))&0x303)==0x00))
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "TIM22_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 7. " CC2NP ,Output Compare 2 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 5. " CC2P ,Output Compare 2 Polarity" "High,Low"
|
|
bitfld.word 0x00 4. " CC2E ,Output Compare 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC1NP ,Output compare 1 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 1. " CC1P ,Output Compare 1 Polarity" "High,Low"
|
|
bitfld.word 0x00 0. " CC1E ,Output Compare 1 enable" "Disabled,Enabled"
|
|
elif (((per.w((ad:0x40011400+0x18)))&0x300)==0x00)
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "TIM22_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 7. " CC2NP ,Output Compare 2 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 5. " CC2P ,Output Compare 2 Polarity" "High,Low"
|
|
bitfld.word 0x00 4. " CC2E ,Output Compare 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. 3. " CC1NP ,Input Capture 1 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 0. " CC1E ,Input Capture 1 enable" "Disabled,Enabled"
|
|
elif (((per.w((ad:0x40011400+0x18)))&0x03)==0x00)
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "TIM22_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 5. 7. " CC2NP ,Input Capture 2 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 4. " CC2E ,Input Capture 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CC1NP ,Output compare 1 complementary Polarity" "Output,Input"
|
|
bitfld.word 0x00 1. " CC1P ,Output Compare 1 Polarity" "High,Low"
|
|
bitfld.word 0x00 0. " CC1E ,Output Compare 1 enable" "Disabled,Enabled"
|
|
elif (((per.w((ad:0x40011400+0x18)))&0x303)!=0x00)
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "TIM22_CCER,Capture/compare enable register"
|
|
bitfld.word 0x00 5. 7. " CC2NP ,Input Capture 2 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 4. " CC2E ,Input Capture 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. 3. " CC1NP ,Input Capture 1 polarity" "Not inverted/Rising,Inverted/Falling,,Not inverted/Both"
|
|
bitfld.word 0x00 0. " CC1E ,Input Capture 1 enable" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x24++0x1
|
|
line.word 0x00 "TIM22_CNT,Counter"
|
|
group.word 0x28++0x1
|
|
line.word 0x00 "TIM22_PSC,Prescaler"
|
|
group.word 0x2C++0x1
|
|
line.word 0x00 "TIM22_ARR,Auto-reload register"
|
|
if (((per.w((ad:0x40011400+0x18)))&0x03)!=0x00)
|
|
group.word 0x34++0x1
|
|
line.word 0x00 "TIM22_CCR1,Low input capture register 1"
|
|
else
|
|
group.word 0x34++0x1
|
|
line.word 0x00 "TIM22_CCR1,Low output compare register 1"
|
|
endif
|
|
if (((per.w((ad:0x40011400+0x18)))&0x300)!=0x000)
|
|
group.word 0x38++0x1
|
|
line.word 0x00 "TIM22_CCR2,Low input capture register 2"
|
|
else
|
|
group.word 0x38++0x1
|
|
line.word 0x00 "TIM22_CCR2,Low output compare register 2"
|
|
endif
|
|
group.word 0x50++0x1
|
|
line.word 0x00 "TIM22_OR,TIM22 option register"
|
|
bitfld.word 0x00 2.--3. " TI1_RMP ,Timer22 TI1 (connected to TIM22_CH1) remap" "GPIO,COMP2_OUT,COMP1_OUT,GPIO"
|
|
bitfld.word 0x00 0.--1. " ETR_RMP ,Timer21 ETR remap" "GPIO,COMP2_OUT,COMP1_OUT,LSE"
|
|
width 0xB
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
sif ((cpu()!="STM32L011D3")&&(cpu()!="STM32L011D4")&&(cpu()!="STM32L011E3")&&(cpu()!="STM32L011E4")&&(cpu()!="STM32L011F3")&&(cpu()!="STM32L011F4")&&(cpu()!="STM32L011G3")&&(cpu()!="STM32L011G4")&&(cpu()!="STM32L011K3")&&(cpu()!="STM32L011K4")&&(cpu()!="STM32L021D4")&&(cpu()!="STM32L021F4")&&(cpu()!="STM32L021G4")&&(cpu()!="STM32L021K4")&&(cpu()!="STM32L031C4")&&(cpu()!="STM32L031C6")&&(cpu()!="STM32L031E4")&&(cpu()!="STM32L031E6")&&(cpu()!="STM32L031F4")&&(cpu()!="STM32L031F6")&&(cpu()!="STM32L031G4")&&(cpu()!="STM32L031G6")&&(cpu()!="STM32L031K4")&&(cpu()!="STM32L031K6")&&(cpu()!="STM32L041C6")&&(cpu()!="STM32L041F6")&&(cpu()!="STM32L041G6")&&(cpu()!="STM32L041K6"))
|
|
tree.open "Basic timers"
|
|
tree "TIMER 6"
|
|
base ad:0x40001000
|
|
width 12.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "TIM6_CR1,TIM6 control register 1"
|
|
bitfld.word 0x00 7. " ARPE ,Auto-reload preload enable" "Not buffered,Buffered"
|
|
bitfld.word 0x00 3. " OPM ,One pulse mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " URS ,Update request source" "Overflow/Underflow/UG set,Overflow/Underflow/DMA request"
|
|
bitfld.word 0x00 1. " UDIS ,Update disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " CEN ,Counter enable" "Disabled,Enabled"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "TIM6_CR2,TIM6 Control register 2"
|
|
bitfld.word 0x00 4.--6. " MMS ,Master Mode Selection" "Reset,Enable,Update,?..."
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "TIM6_DIER,TIM6 DMA/Interrupt enable register"
|
|
bitfld.word 0x00 8. " UDE ,Update DMA request enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UIE ,Update interrupt enable" "Disabled,Enabled"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "TIM6_SR,TIM6 Status register"
|
|
bitfld.word 0x00 0. " UIF ,Update interrupt Flag" "No effect,Update"
|
|
wgroup.word 0x14++0x01
|
|
line.word 0x00 "TIM6_EGR,TIM6 Event generation register"
|
|
bitfld.word 0x00 0. " UG ,Update Generation" "Not generated,Generated"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "TIM6_CNT,Counter"
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "TIM6_PSC,Prescaler"
|
|
group.word 0x2C++0x01
|
|
line.word 0x00 "TIM6_ARR,Auto-reload register"
|
|
width 0x0B
|
|
tree.end
|
|
sif ((cpu()=="STM32L071C8")||(cpu()=="STM32L071CB")||(cpu()=="STM32L071CZ")||(cpu()=="STM32L071K8")||(cpu()=="STM32L071KB")||(cpu()=="STM32L071KZ")||(cpu()=="STM32L071RB")||(cpu()=="STM32L071RZ")||(cpu()=="STM32L071V8")||(cpu()=="STM32L071VB")||(cpu()=="STM32L071VZ")||(cpu()=="STM32L072CB")||(cpu()=="STM32L072KB")||(cpu()=="STM32L072KZ")||(cpu()=="STM32L072RB")||(cpu()=="STM32L072RZ")||(cpu()=="STM32L072V8")||(cpu()=="STM32L072VB")||(cpu()=="STM32L072VZ")||(cpu()=="STM32L073CB")||(cpu()=="STM32L073CZ")||(cpu()=="STM32L073RB")||(cpu()=="STM32L073RZ")||(cpu()=="STM32L073V8")||(cpu()=="STM32L073VB")||(cpu()=="STM32L073VZ")||(cpu()=="STM32L081CZ")||(cpu()=="STM32L081KZ")||(cpu()=="STM32L082KB")||(cpu()=="STM32L082KZ")||(cpu()=="STM32L083CB")||(cpu()=="STM32L083CZ")||(cpu()=="STM32L083RB")||(cpu()=="STM32L083RZ"))
|
|
tree "TIMER 7"
|
|
base ad:0x40001400
|
|
width 12.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "TIM7_CR1,TIM7 control register 1"
|
|
bitfld.word 0x00 7. " ARPE ,Auto-reload preload enable" "Not buffered,Buffered"
|
|
bitfld.word 0x00 3. " OPM ,One pulse mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " URS ,Update request source" "Overflow/Underflow/UG set,Overflow/Underflow/DMA request"
|
|
bitfld.word 0x00 1. " UDIS ,Update disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " CEN ,Counter enable" "Disabled,Enabled"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "TIM7_CR2,TIM7 Control register 2"
|
|
bitfld.word 0x00 4.--6. " MMS ,Master Mode Selection" "Reset,Enable,Update,?..."
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "TIM7_DIER,TIM7 DMA/Interrupt enable register"
|
|
bitfld.word 0x00 8. " UDE ,Update DMA request enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " UIE ,Update interrupt enable" "Disabled,Enabled"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "TIM7_SR,TIM7 Status register"
|
|
bitfld.word 0x00 0. " UIF ,Update interrupt Flag" "No effect,Update"
|
|
wgroup.word 0x14++0x01
|
|
line.word 0x00 "TIM7_EGR,TIM7 Event generation register"
|
|
bitfld.word 0x00 0. " UG ,Update Generation" "Not generated,Generated"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "TIM7_CNT,Counter"
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "TIM7_PSC,Prescaler"
|
|
group.word 0x2C++0x01
|
|
line.word 0x00 "TIM7_ARR,Auto-reload register"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "LPTIM1 (Low power timer 1)"
|
|
base ad:0x40007C00
|
|
width 6.
|
|
group.long 0x00++0x0B
|
|
line.long 0x00 "ISR,LPTIM Interrupt and Status Register"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " DOWN_set/clr ,Counter direction change up to down" "Not changed,Changed"
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " UP_set/clr ,Counter direction change down to up" "Changed,Not changed"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " ARROK_set/clr ,Autoreload register update OK" "False,True"
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " CMPOK ,Compare register update OK" "False,True"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " EXTTRIG_set/clr ,External trigger edge event" "Not occurred,Occurred"
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " ARRM_set/clr ,Autoreload match" "Not matched,Matched"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CMPM_set/clr ,Compare match" "Not matched,Matched"
|
|
if ((per.l(ad:0x40007C00+0x0C)&0x1000000)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CFGR,LPTIM Configuration Register"
|
|
bitfld.long 0x00 24. " ENC ,Encoder mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " COUNTMODE ,Counter mode enabled" "Internal,LPTIM"
|
|
bitfld.long 0x00 22. " PRELOAD ,Registers update mode" "After each APB bus write access,End of the current LPTIM period"
|
|
bitfld.long 0x00 21. " WAVPOL ,Waveform shape polarity" "Not inversed,Inversed"
|
|
textline " "
|
|
bitfld.long 0x00 20. " WAVE ,Waveform shape" "PWM/One Pulse,Set Once"
|
|
bitfld.long 0x00 19. " TIMOUT ,Timeout enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17.--18. " TRIGEN ,Trigger enable and polarity" "SW,Rising,Falling,Both"
|
|
bitfld.long 0x00 13.--15. " TRIGSEL ,Trigger selector" "EXT_TRIG0,EXT_TRIG1,EXT_TRIG2,EXT_TRIG3,EXT_TRIG4,,EXT_TRIG6,EXT_TRIG7"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " PRESC ,Clock prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.long 0x00 6.--7. " TRGFLT ,Configurable digital filter for trigger" "No filter,2 clocks,4 clocks,8 clocks"
|
|
bitfld.long 0x00 3.--4. " CKFLT ,Configurable digital filter for external clock" "No filter,2 clocks,4 clocks,8 clocks"
|
|
bitfld.long 0x00 1.--2. " CKPOL ,Clock polarity" "Rising edge,Falling edge,Both edges,"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CKSEL ,Clock selector" "Internal,External"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CFGR,LPTIM Configuration Register"
|
|
bitfld.long 0x00 24. " ENC ,Encoder mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " COUNTMODE ,Counter mode enabled" "Internal,LPTIM"
|
|
bitfld.long 0x00 22. " PRELOAD ,Registers update mode" "After each APB bus write access,End of the current LPTIM period"
|
|
bitfld.long 0x00 21. " WAVPOL ,Waveform shape polarity" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 20. " WAVE ,Waveform shape" "PWM/One Pulse,Set Once"
|
|
bitfld.long 0x00 19. " TIMOUT ,Timeout enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17.--18. " TRIGEN ,Trigger enable and polarity" "SW,Rising,Falling,Both"
|
|
bitfld.long 0x00 13.--15. " TRIGSEL ,Trigger selector" "EXT_TRIG0,EXT_TRIG1,EXT_TRIG2,EXT_TRIG3,EXT_TRIG4,,EXT_TRIG6,EXT_TRIG7"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " PRESC ,Clock prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.long 0x00 6.--7. " TRGFLT ,Configurable digital filter for trigger" "No filter,2 clocks,4 clocks,8 clocks"
|
|
bitfld.long 0x00 3.--4. " CKFLT ,Configurable digital filter for external clock" "No filter,2 clocks,4 clocks,8 clocks"
|
|
bitfld.long 0x00 1.--2. " CKPOL ,Clock polarity" "Sub-mode 1,Sub-mode 2,Sub-mode 3,"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CKSEL ,Clock selector" "Internal,External"
|
|
endif
|
|
group.long 0x10++0x0B
|
|
line.long 0x00 "CR,LPTIM Control Register"
|
|
bitfld.long 0x00 2. " CNTSTRT ,Timer start in continuous mode" "Not started,Started"
|
|
bitfld.long 0x00 1. " SNGSTRT ,LPTIM start in single mode" "Not started,Started"
|
|
bitfld.long 0x00 0. " ENABLE ,LPTIM Enable" "Disabled,Enabled"
|
|
line.long 0x04 "CMP,LPTIM Compare Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " CMP ,Compare value"
|
|
line.long 0x08 "ARR,LPTIM Autoreload Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " ARR ,Auto reload value"
|
|
hgroup.long 0x1C++0x03
|
|
hide.long 0x00 "CNT,LPTIM Counter Register"
|
|
in
|
|
width 0x0B
|
|
tree.end
|
|
tree "IWDG (Independent watchdog)"
|
|
base ad:0x40003000
|
|
width 11.
|
|
wgroup.long 0x00++0x3
|
|
line.long 0x00 "IWDG_KR,Key register"
|
|
hexmask.long.word 0x00 0.--15. 0x01 " KEY ,Key value"
|
|
group.long 0x04++0x7
|
|
line.long 0x00 "IWDG_PR,Prescaler register"
|
|
bitfld.long 0x00 0.--2. " PR ,Prescaler divider" "/4,/8,/16,/32,/64,/128,/256,/256"
|
|
line.long 0x04 "IWDG_RLR,Reload register"
|
|
hexmask.long.word 0x04 0.--11. 0x01 " RL ,Watchdog counter reload value"
|
|
rgroup.long 0x0C++0x3
|
|
line.long 0x00 "IWDG_SR,Status register"
|
|
bitfld.long 0x00 2. " WVU ,Watchdog counter window value update" "Completed,Running"
|
|
bitfld.long 0x00 1. " RVU ,Watchdog counter reload value update" "Completed,Running"
|
|
bitfld.long 0x00 0. " PVU ,Watchdog prescaler value update" "Completed,Running"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "IWDG_WINR,Window register"
|
|
hexmask.long.word 0x00 0.--11. 1. " WIN[11:0] ,Watchdog counter window value"
|
|
width 0xB
|
|
tree.end
|
|
tree "WWDG (System window watchdog)"
|
|
base ad:0x40002C00
|
|
width 10.
|
|
group.long 0x00++0x0B
|
|
line.long 0x00 "WWDG_CR,Control Register"
|
|
bitfld.long 0x00 7. " WDGA ,Activation bit" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " T ,7-bit counter"
|
|
line.long 0x04 "WWDG_CFR,Configuration Register"
|
|
bitfld.long 0x04 9. " EWI ,Early wakeup interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 7.--8. " WDGTB ,Timer base" "Div by 1,Div by 2,Div by 4,Div by 8"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--6. 1. " W ,7-bit window value"
|
|
line.long 0x08 "WWDG_SR,Status Register"
|
|
bitfld.long 0x08 0. " EWIF ,Early wakeup interrupt flag" "No interrupt,Interrupt"
|
|
width 0x0B
|
|
tree.end
|
|
tree "RTC (Real time clock)"
|
|
base ad:0x40002800
|
|
width 14.
|
|
if (((per.l(ad:0x40002800+0x8)&0x40)==0x00)&&((per.l(ad:0x40002800)&0x300000)!=0x200000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "RTC_TR,RTC time register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,2,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " 24h ,AM/PM notation" "24h,PM"
|
|
elif (((per.l(ad:0x40002800+0x8)&0x40)==0x0)&&((per.l(ad:0x40002800)&0x300000)==0x200000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "RTC_TR,RTC time register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,2,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " 24h ,AM/PM notation" "24h,PM"
|
|
elif (((per.l(ad:0x40002800+0x8)&0x40)==0x40)&&((per.l(ad:0x40002800)&0x300000)==0x100000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "RTC_TR,RTC time register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,-,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " AM ,AM/PM notation" "AM,PM"
|
|
else
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "RTC_TR,RTC time register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,-,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " AM ,AM/PM notation" "AM,PM"
|
|
endif
|
|
if (((per.l(ad:0x40002800+0x04)&0x30)==0x30)&&((per.l(ad:0x40002800+0x04)&0x1000)==0x1000))
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "RTC_DR,RTC date register"
|
|
bitfld.long 0x00 13.--15. " WDU ,Week day units" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 0.--3. ",Date units in BCD format" "0,1,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12. ".,Month tens in BCD format" "0,1"
|
|
bitfld.long 0x00 8.--11. ",Month units in BCD format" "0,1,2,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 20.--23. ".,Year tens in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 16.--19. ",Year units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
elif (((per.l(ad:0x40002800+0x04)&0x30)==0x30)&&((per.l(ad:0x40002800+0x04)&0x1000)==0x0))
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "RTC_DR,RTC date register"
|
|
bitfld.long 0x00 13.--15. " WDU ,Week day units" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 0.--3. ",Date units in BCD format" "0,1,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12. ".,Month tens in BCD format" "0,1"
|
|
bitfld.long 0x00 8.--11. ",Month units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 20.--23. ".,Year tens in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 16.--19. ",Year units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
elif (((per.l(ad:0x40002800+0x04)&0x30)!=0x30)&&((per.l(ad:0x40002800+0x04)&0x1000)==0x1000))
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "RTC_DR,RTC date register"
|
|
bitfld.long 0x00 13.--15. " WDU ,Week day units" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 0.--3. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12. ".,Month tens in BCD format" "0,1"
|
|
bitfld.long 0x00 8.--11. ",Month units in BCD format" "0,1,2,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 20.--23. ".,Year tens in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 16.--19. ",Year units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "RTC_DR,RTC date register"
|
|
bitfld.long 0x00 13.--15. " WDU ,Week day units" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 0.--3. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12. ".,Month tens in BCD format" "0,1"
|
|
bitfld.long 0x00 8.--11. ",Month units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 20.--23. ".,Year tens in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 16.--19. ",Year units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
endif
|
|
group.long 0x08++0xF
|
|
line.long 0x00 "RTC_CR,RTC control register"
|
|
bitfld.long 0x00 23. " COE ,Calibration output enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21.--22. " OSEL ,Output selection" "Disabled,Alarm A,Alarm B,Wakeup"
|
|
bitfld.long 0x00 20. " POL ,Output polarity" "High,Low"
|
|
bitfld.long 0x00 19. " COSEL ,Calibration output selection" "512Hz,1Hz"
|
|
textline " "
|
|
bitfld.long 0x00 18. " BKP ,Backup" "Not performed,Performed"
|
|
bitfld.long 0x00 17. " SUB1H ,Subtract 1 hour (winter time change)" "No effect,Subtracted"
|
|
bitfld.long 0x00 16. " ADD1H ,Add 1 hour (summer time change)" "No effect,Added"
|
|
bitfld.long 0x00 15. " TSIE ,Time-stamp interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " WUTIE ,Wakeup timer interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ALRBIE ,Alarm B interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " ALRAIE ,Alarm A interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " TSE ,Time stamp enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " WUTE ,Wakeup timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " ALRBE ,Alarm B enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ALRAE ,Alarm A enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " FMT ,Hour format" "24 hour/day,AM/PM"
|
|
textline " "
|
|
bitfld.long 0x00 5. " BYPSHAD ,Bypass the shadow registers" "Not bypassed,Bypassed"
|
|
bitfld.long 0x00 4. " REFCKON ,RTC_REFIN reference clock detection enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TSEDGE ,Time-stamp event active edge" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 0.--2. " WUCKSEL[2:0] , Wakeup clock selection" "RTC/16,RTC/8,RTC/4,RTC/2,CK_SPRE,CK_SPRE,CK_SPRE+2^16,CK_SPRE+2^16"
|
|
line.long 0x04 "RTC_ISR,RTC initialization and status register"
|
|
rbitfld.long 0x04 16. " RECALPF ,Recalibration pending Flag" "Not detected,Detected"
|
|
bitfld.long 0x04 14. " TAMP2F ,RTC_TAMP2 detection flag" "Not detected,Detected"
|
|
bitfld.long 0x04 13. " TAMP1F ,RTC_TAMP1 detection flag" "Not detected,Detected"
|
|
bitfld.long 0x04 12. " TSOVF ,Time-stamp overflow flag" "Not overflowed,Overflowed"
|
|
textline " "
|
|
bitfld.long 0x04 11. " TSF ,Time-stamp flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 10. " WUTF ,Wakeup timer flag (counter reached 0)" "Not reached,Reached"
|
|
bitfld.long 0x04 9. " ALRBF ,Alarm B flag enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " ALRAF ,Alarm A flag enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " INIT ,Initialization mode" "Free running,Enabled"
|
|
rbitfld.long 0x04 6. " INITF ,Initialization flag" "Not allowed,Allowed"
|
|
bitfld.long 0x04 5. " RSF ,Registers synchronization flag" "Not synchronized,Synchronized"
|
|
rbitfld.long 0x04 4. " INITS ,Initialization status flag" "Not initialized,Initialized"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " SHPF ,Shift operation pending" "Not pending,Pending"
|
|
rbitfld.long 0x04 2. " WUTWF ,Wakeup timer configuration update" "Not allowed,Allowed"
|
|
rbitfld.long 0x04 1. " ALRBWF ,Alarm B write flag" "Not allowed,Allowed"
|
|
rbitfld.long 0x04 0. " ALRAWF ,Alarm A write flag" "Not allowed,Allowed"
|
|
line.long 0x08 "RTC_PRER,RTC prescaler register"
|
|
hexmask.long.byte 0x08 16.--22. 0x01 " PREDIV_A ,Asynchronous prescaler factor"
|
|
hexmask.long.word 0x08 0.--14. 0x01 " PREDIV_S ,Synchronous prescaler factor"
|
|
line.long 0x0C "RTC_WUTR,RTC wakeup timer register"
|
|
hexmask.long.word 0x0C 0.--15. 0x01 " WUT[15:0] ,Wakeup auto-reload value bits"
|
|
width 14.
|
|
if (((per.l(ad:0x40002800+0x8)&0x40)==0x0)&&((per.l(ad:0x40002800+0x1C)&0x300000)!=0x200000)&&((per.l(ad:0x40002800+0x1C)&0x40000000)==0x00000000)&&((per.l(ad:0x40002800+0x0C)&0x81)!=0x00))
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "RTC_ALRMAR,RTC alarm A register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,2,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " 24h ,AM/PM notation" "24h,PM"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800+0x8)&0x40)==0x0)&&((per.l(ad:0x40002800+0x1C)&0x300000)!=0x200000)&&((per.l(ad:0x40002800+0x1C)&0x40000000)==0x00000000)&&((per.l(ad:0x40002800+0x0C)&0x81)==0x00))
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "RTC_ALRMAR,RTC alarm A register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,2,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " 24h ,AM/PM notation" "24h,PM"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800+0x8)&0x40)==0x0)&&((per.l(ad:0x40002800+0x1C)&0x300000)!=0x200000)&&((per.l(ad:0x40002800+0x1C)&0x40000000)==0x40000000)&&((per.l(ad:0x40002800+0x0C)&0x81)!=0x00))
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "RTC_ALRMAR,RTC alarm A register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,2,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " 24h ,AM/PM notation" "24h,PM"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " DAY ,Week day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday,-,-,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800+0x8)&0x40)==0x0)&&((per.l(ad:0x40002800+0x1C)&0x300000)!=0x200000)&&((per.l(ad:0x40002800+0x1C)&0x40000000)==0x40000000)&&((per.l(ad:0x40002800+0x0C)&0x81)==0x00))
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "RTC_ALRMAR,RTC alarm A register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,2,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " 24h ,AM/PM notation" "24h,PM"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " DAY ,Week day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday,-,-,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800+0x8)&0x40)==0x0)&&((per.l(ad:0x40002800+0x1C)&0x300000)==0x200000)&&((per.l(ad:0x40002800+0x1C)&0x40000000)==0x00000000)&&((per.l(ad:0x40002800+0x0C)&0x81)!=0x00))
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "RTC_ALRMAR,RTC alarm A register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,2,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " 24h ,AM/PM notation" "24h,PM"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800+0x8)&0x40)==0x0)&&((per.l(ad:0x40002800+0x1C)&0x300000)==0x200000)&&((per.l(ad:0x40002800+0x1C)&0x40000000)==0x00000000)&&((per.l(ad:0x40002800+0x0C)&0x81)==0x00))
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "RTC_ALRMAR,RTC alarm A register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,2,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " 24h ,AM/PM notation" "24h,PM"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800+0x8)&0x40)==0x0)&&((per.l(ad:0x40002800+0x1C)&0x300000)==0x200000)&&((per.l(ad:0x40002800+0x1C)&0x40000000)==0x40000000)&&((per.l(ad:0x40002800+0x0C)&0x81)!=0x00))
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "RTC_ALRMAR,RTC alarm A register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,2,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " 24h ,AM/PM notation" "24h,PM"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " DAY ,Week day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday,-,-,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800+0x8)&0x40)==0x0)&&((per.l(ad:0x40002800+0x1C)&0x300000)==0x200000)&&((per.l(ad:0x40002800+0x1C)&0x40000000)==0x40000000)&&((per.l(ad:0x40002800+0x0C)&0x81)==0x00))
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "RTC_ALRMAR,RTC alarm A register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,2,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " 24h ,AM/PM notation" "24h,PM"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " DAY ,Week day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday,-,-,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800)&0x300000)==0x100000)&&((per.l(ad:0x40002800+0x1C)&0x300000)==0x100000)&&((per.l(ad:0x40002800+0x1C)&0x40000000)==0x00000000)&&((per.l(ad:0x40002800+0x0C)&0x81)!=0x00))
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "RTC_ALRMAR,RTC alarm A register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,-,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. "AM ,AM/PM notation" "AM,PM"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800)&0x300000)==0x100000)&&((per.l(ad:0x40002800+0x1C)&0x300000)==0x100000)&&((per.l(ad:0x40002800+0x1C)&0x40000000)==0x00000000)&&((per.l(ad:0x40002800+0x0C)&0x81)==0x00))
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "RTC_ALRMAR,RTC alarm A register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,-,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. "AM ,AM/PM notation" "AM,PM"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800)&0x300000)==0x100000)&&((per.l(ad:0x40002800+0x1C)&0x300000)==0x100000)&&((per.l(ad:0x40002800+0x1C)&0x40000000)==0x40000000)&&((per.l(ad:0x40002800+0x0C)&0x81)!=0x00))
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "RTC_ALRMAR,RTC alarm A register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,-,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. "AM ,AM/PM notation" "AM,PM"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " DAY ,Week day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday,-,-,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800)&0x300000)==0x100000)&&((per.l(ad:0x40002800+0x1C)&0x300000)==0x100000)&&((per.l(ad:0x40002800+0x1C)&0x40000000)==0x40000000)&&((per.l(ad:0x40002800+0x0C)&0x81)==0x00))
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "RTC_ALRMAR,RTC alarm A register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,-,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. "AM ,AM/PM notation" "AM,PM"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " DAY ,Week day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday,-,-,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800+0x1C)&0x40000000)==0x00000000)&&((per.l(ad:0x40002800+0x0C)&0x81)!=0x00))
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "RTC_ALRMAR,RTC alarm A register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,-,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. "AM ,AM/PM notation" "AM,PM"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800+0x1C)&0x40000000)==0x00000000)&&((per.l(ad:0x40002800+0x0C)&0x81)==0x00))
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "RTC_ALRMAR,RTC alarm A register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,-,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. "AM ,AM/PM notation" "AM,PM"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif ((per.l(ad:0x40002800+0x0C)&0x81)!=0x00)
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "RTC_ALRMAR,RTC alarm A register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,-,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. "AM ,AM/PM notation" "AM,PM"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " DAY ,Week day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday,-,-,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
else
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "RTC_ALRMAR,RTC alarm A register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,-,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. "AM ,AM/PM notation" "AM,PM"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " DAY ,Week day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday,-,-,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
endif
|
|
if (((per.l(ad:0x40002800+0x8)&0x40)==0x0)&&((per.l(ad:0x40002800+0x20)&0x300000)!=0x200000)&&((per.l(ad:0x40002800+0x20)&0x40000000)==0x00000000)&&((per.l(ad:0x40002800+0x0C)&0x82)!=0x00))
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "RTC_ALRMBR,RTC alarm B register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,2,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " 24h ,AM/PM notation" "24h,PM"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800+0x8)&0x40)==0x0)&&((per.l(ad:0x40002800+0x20)&0x300000)!=0x200000)&&((per.l(ad:0x40002800+0x20)&0x40000000)==0x00000000)&&((per.l(ad:0x40002800+0x0C)&0x82)==0x00))
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "RTC_ALRMBR,RTC alarm B register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,2,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " 24h ,AM/PM notation" "24h,PM"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800+0x8)&0x40)==0x0)&&((per.l(ad:0x40002800+0x20)&0x300000)!=0x200000)&&((per.l(ad:0x40002800+0x20)&0x40000000)==0x40000000)&&((per.l(ad:0x40002800+0x0C)&0x82)!=0x00))
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "RTC_ALRMBR,RTC alarm B register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,2,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " 24h ,AM/PM notation" "24h,PM"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " DAY ,Week day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday,-,-,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800+0x8)&0x40)==0x0)&&((per.l(ad:0x40002800+0x20)&0x300000)!=0x200000)&&((per.l(ad:0x40002800+0x20)&0x40000000)==0x40000000)&&((per.l(ad:0x40002800+0x0C)&0x82)==0x00))
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "RTC_ALRMBR,RTC alarm B register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,2,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " 24h ,AM/PM notation" "24h,PM"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " DAY ,Week day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday,-,-,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800+0x8)&0x40)==0x0)&&((per.l(ad:0x40002800+0x20)&0x300000)==0x200000)&&((per.l(ad:0x40002800+0x20)&0x40000000)==0x00000000)&&((per.l(ad:0x40002800+0x0C)&0x82)!=0x00))
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "RTC_ALRMBR,RTC alarm B register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,2,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " 24h ,AM/PM notation" "24h,PM"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800+0x8)&0x40)==0x0)&&((per.l(ad:0x40002800+0x20)&0x300000)==0x200000)&&((per.l(ad:0x40002800+0x20)&0x40000000)==0x00000000)&&((per.l(ad:0x40002800+0x0C)&0x82)==0x00))
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "RTC_ALRMBR,RTC alarm B register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,2,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " 24h ,AM/PM notation" "24h,PM"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800+0x8)&0x40)==0x0)&&((per.l(ad:0x40002800+0x20)&0x300000)==0x200000)&&((per.l(ad:0x40002800+0x20)&0x40000000)==0x40000000)&&((per.l(ad:0x40002800+0x0C)&0x82)!=0x00))
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "RTC_ALRMBR,RTC alarm B register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,2,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " 24h ,AM/PM notation" "24h,PM"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " DAY ,Week day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday,-,-,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800+0x8)&0x40)==0x0)&&((per.l(ad:0x40002800+0x20)&0x300000)==0x200000)&&((per.l(ad:0x40002800+0x20)&0x40000000)==0x40000000)&&((per.l(ad:0x40002800+0x0C)&0x82)==0x00))
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "RTC_ALRMBR,RTC alarm B register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,2,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " 24h ,AM/PM notation" "24h,PM"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " DAY ,Week day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday,-,-,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800)&0x300000)==0x100000)&&((per.l(ad:0x40002800+0x1C)&0x300000)==0x100000)&&((per.l(ad:0x40002800+0x1C)&0x40000000)==0x00000000)&&((per.l(ad:0x40002800+0x0C)&0x82)!=0x00))
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "RTC_ALRMAR,RTC alarm B register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,-,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. "AM ,AM/PM notation" "AM,PM"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800)&0x300000)==0x100000)&&((per.l(ad:0x40002800+0x20)&0x300000)==0x100000)&&((per.l(ad:0x40002800+0x20)&0x40000000)==0x00000000)&&((per.l(ad:0x40002800+0x0C)&0x82)==0x00))
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "RTC_ALRMAR,RTC alarm B register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,-,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. "AM ,AM/PM notation" "AM,PM"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800)&0x300000)==0x100000)&&((per.l(ad:0x40002800+0x20)&0x300000)==0x100000)&&((per.l(ad:0x40002800+0x20)&0x40000000)==0x40000000)&&((per.l(ad:0x40002800+0x0C)&0x82)!=0x00))
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "RTC_ALRMBR,RTC alarm B register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,-,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. "AM ,AM/PM notation" "AM,PM"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " DAY ,Week day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday,-,-,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800)&0x300000)==0x100000)&&((per.l(ad:0x40002800+0x20)&0x300000)==0x100000)&&((per.l(ad:0x40002800+0x20)&0x40000000)==0x40000000)&&((per.l(ad:0x40002800+0x0C)&0x82)==0x00))
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "RTC_ALRMBR,RTC alarm B register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,-,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,-,-,-,-,-,-,-,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. "AM ,AM/PM notation" "AM,PM"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " DAY ,Week day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday,-,-,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800+0x20)&0x40000000)==0x00000000)&&((per.l(ad:0x40002800+0x0C)&0x82)!=0x00))
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "RTC_ALRMBR,RTC alarm B register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,-,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. "AM ,AM/PM notation" "AM,PM"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x40002800+0x20)&0x40000000)==0x00000000)&&((per.l(ad:0x40002800+0x0C)&0x82)==0x00))
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "RTC_ALRMBR,RTC alarm B register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,-,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. "AM ,AM/PM notation" "AM,PM"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x00 24.--27. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
elif ((per.l(ad:0x40002800+0x0C)&0x82)!=0x00)
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "RTC_ALRMBR,RTC alarm B register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,-,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. "AM ,AM/PM notation" "AM,PM"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " DAY ,Week day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday,-,-,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
else
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "RTC_ALRMBR,RTC alarm B register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,-,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. "AM ,AM/PM notation" "AM,PM"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " DAY ,Week day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday,-,-,-,-,-,-,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 30. " WDSEL ,Week day selection" "Date units,Week day"
|
|
textline " "
|
|
bitfld.long 0x00 31. " MSK4 ,Alarm A date mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " MSK3 ,Alarm A hours mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MSK2 ,Alarm A minutes mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " MSK1 ,Alarm A seconds mask" "Not masked,Masked"
|
|
endif
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "RTC_WPR,RTC write protection register"
|
|
hexmask.long.byte 0x00 0.--7. 0x01 " KEY ,Write protection key"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x00 "RTC_SSR,RTC sub second register"
|
|
hexmask.long.byte 0x00 0.--15. 0x01 " SS ,Sub second value"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x00 "RTC_SHIFTR,RTC shift control register"
|
|
bitfld.long 0x00 31. " ADD1S ,Add one second" "No effect,Added to the clock/calendar"
|
|
hexmask.long.word 0x00 0.--14. 0x01 " SUBFS ,Subtract a fraction of a second"
|
|
if ((per.l((ad:0x40002800)+0x0C)&0x800)==0x0)
|
|
hgroup.long 0x30++0x7
|
|
hide.long 0x00 "RTC_TSTR,RTC time stamp time register"
|
|
hide.long 0x04 "RTC_TSDR,RTC time stamp date register"
|
|
elif (((per.l((ad:0x40002800)+0xC)&0x800)==0x800)&&((per.l(ad:0x40002800+0x8)&0x40)==0x0))
|
|
rgroup.long 0x30++0x7
|
|
line.long 0x00 "RTC_TSTR,RTC time stamp time register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,2,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. " 24h ,AM/PM notation" "24h,PM"
|
|
line.long 0x04 "RTC_TSDR,RTC time stamp date register"
|
|
bitfld.long 0x04 13.--15. " WDU ,Week day units" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday"
|
|
bitfld.long 0x04 4.--5. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x04 0.--3. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x04 12. ".,Month tens in BCD format" "0,1"
|
|
bitfld.long 0x04 8.--11. ",Month units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
else
|
|
rgroup.long 0x30++0x7
|
|
line.long 0x00 "RTC_TSTR,RTC time stamp time register"
|
|
bitfld.long 0x00 20.--21. " HOUR ,Hour tens in BCD format" "0,1,-,-"
|
|
bitfld.long 0x00 16.--19. ",Hour units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 12.--14. ":,Minute tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 8.--11. ",Minute units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 4.--6. ":,Second tens in BCD format" "0,1,2,3,4,5,-,-"
|
|
bitfld.long 0x00 0.--3. ",Second units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x00 22. "AM ,AM/PM notation" "AM,PM"
|
|
line.long 0x04 "RTC_TSDR,RTC time stamp date register"
|
|
bitfld.long 0x04 13.--15. " WDU ,Week day units" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday"
|
|
bitfld.long 0x04 4.--5. " DATE ,Date tens in BCD format" "0,1,2,3"
|
|
bitfld.long 0x04 0.--3. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
bitfld.long 0x04 12. ".,Month tens in BCD format" "0,1"
|
|
bitfld.long 0x04 8.--11. ",Month units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-"
|
|
endif
|
|
if ((per.l((ad:0x40002800)+0xC)&0x800)==0x800)
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x00 "RTC_TSSSR,RTC timestamp sub second register"
|
|
hexmask.long 0x00 0.--15. 0x01 " SS ,Sub second value"
|
|
else
|
|
hgroup.long 0x38++0x3
|
|
hide.long 0x00 "RTC_TSSSR,RTC timestamp sub second register"
|
|
endif
|
|
group.long 0x3C++0x3
|
|
line.long 0x00 "RTC_CALR,RTC calibration register"
|
|
bitfld.long 0x00 15. " CALP ,Increase frequency of RTC by 488.5 ppm" "No RTCCLK,One RTCCLK"
|
|
bitfld.long 0x00 14. " CALW8 ,Use an 8-second calibration cycle period" "Not selected,Selected"
|
|
bitfld.long 0x00 13. " CALW16 ,Use a 16-second calibration cycle period" "Not selected,Selected"
|
|
hexmask.long.word 0x00 0.--8. 0x01 " CALM ,Calibration minus"
|
|
if ((per.l((ad:0x40002800)+0x40)&0x1800)!=0x00)
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "RTC_TAMPCR,RTC RTC tamper configuration register"
|
|
bitfld.long 0x00 21. " TAMP2MF ,Tamper 2 mask flag" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " TAMP2NOERASE ,Tamper 2 no erase" "Erased,Not erased"
|
|
bitfld.long 0x00 19. " TAMP2IE ,Tamper 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TAMP1MF ,Tamper 1 mask flag" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " TAMP1NOERASE ,Tamper 1 no erase" "Not erased,Erased"
|
|
bitfld.long 0x00 16. " TAMP1IE ,Tamper 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " TAMPPUDIS ,RTC_TAMPx pull-up disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 13.--14. " TAMPPRCH ,RTC_TAMPx precharge duration" "1 RTCCLK cycle,2 RTCCLK cycles,4 RTCCLK cycles,8 RTCCLK cycles"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " TAMPFLT ,RTC_TAMPx filter count" "On edge,After 2 samples,After 4 samples,After 8 samples"
|
|
bitfld.long 0x00 8.--10. " TAMPFREQ ,Tamper sampling frequency" "RTCCLK/32768,RTCCLK/16384,RTCCLK/8192,RTCCLK/4096,RTCCLK/2048,RTCCLK/1024,RTCCLK/512,RTCCLK/256"
|
|
bitfld.long 0x00 7. " TAMPTS ,Activate timestamp on tamper detection event" "Timestamp not saved,Timestamp saved"
|
|
bitfld.long 0x00 4. " TAMP2TRG ,Active level for RTC_TAMP1 input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TAMP2E ,RTC_TAMP2 input detection enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TAMPIE ,Tamper interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TAMP1TRG ,Active level for RTC_TAMP1 input" "Low,High"
|
|
bitfld.long 0x00 0. " TAMP1E ,RTC_TAMP1 input detection enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "RTC_TAMPCR,RTC RTC tamper configuration register"
|
|
bitfld.long 0x00 21. " TAMP2MF ,Tamper 2 mask flag" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " TAMP2NOERASE ,Tamper 2 no erase" "Erased,Not erased"
|
|
bitfld.long 0x00 19. " TAMP2IE ,Tamper 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TAMP1MF ,Tamper 1 mask flag" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " TAMP1NOERASE ,Tamper 1 no erase" "Not erased,Erased"
|
|
bitfld.long 0x00 16. " TAMP1IE ,Tamper 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " TAMPPUDIS ,RTC_TAMPx pull-up disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 13.--14. " TAMPPRCH ,RTC_TAMPx precharge duration" "1 RTCCLK cycle,2 RTCCLK cycles,4 RTCCLK cycles,8 RTCCLK cycles"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " TAMPFLT ,RTC_TAMPx filter count" "On edge,After 2 samples,After 4 samples,After 8 samples"
|
|
bitfld.long 0x00 8.--10. " TAMPFREQ ,Tamper sampling frequency" "RTCCLK/32768,RTCCLK/16384,RTCCLK/8192,RTCCLK/4096,RTCCLK/2048,RTCCLK/1024,RTCCLK/512,RTCCLK/256"
|
|
bitfld.long 0x00 7. " TAMPTS ,Activate timestamp on tamper detection event" "Timestamp not saved,Timestamp saved"
|
|
bitfld.long 0x00 4. " TAMP2TRG ,Active level for RTC_TAMP1 input" "Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TAMP2E ,RTC_TAMP2 input detection enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TAMPIE ,Tamper interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TAMP1TRG ,Active level for RTC_TAMP1 input" "Low,High"
|
|
bitfld.long 0x00 0. " TAMP1E ,RTC_TAMP1 input detection enable" "Disabled,Enabled"
|
|
endif
|
|
if ((per.l(ad:0x40002800+0x0C)&0x81)!=0x00)
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "RTC_ALRMASSR,RTC alarm A sub second register"
|
|
bitfld.long 0x00 24.--27. " MASKSS ,Mask the most-significant bits starting at this bit" "No comparison,SS[0] compared,SS[1:0] compared,SS[2:0] compared,SS[3:0] compared,SS[4:0] compared,SS[5:0] compared,SS[6:0] compared,SS[7:0] compared,SS[8:0] compared,SS[9:0] compared,SS[10:0] compared,SS[11:0] compared,SS[12:0] compared,SS[13:0] compared,All bits compared"
|
|
hexmask.long.word 0x00 0.--14. 0x01 " SS ,Sub seconds value"
|
|
else
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "RTC_ALRMASSR,RTC alarm A sub second register"
|
|
bitfld.long 0x00 24.--27. " MASKSS ,Mask the most-significant bits starting at this bit" "No comparison,SS[0] compared,SS[1:0] compared,SS[2:0] compared,SS[3:0] compared,SS[4:0] compared,SS[5:0] compared,SS[6:0] compared,SS[7:0] compared,SS[8:0] compared,SS[9:0] compared,SS[10:0] compared,SS[11:0] compared,SS[12:0] compared,SS[13:0] compared,All bits compared"
|
|
hexmask.long.word 0x00 0.--14. 0x01 " SS ,Sub seconds value"
|
|
endif
|
|
if ((per.l(ad:0x40002800+0x0C)&0x82)!=0x00)
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "RTC_ALRMBSSR,RTC alarm B sub second register"
|
|
bitfld.long 0x00 24.--27. " MASKSS ,Mask the most-significant bits starting at this bit" "No comparison,SS[0] compared,SS[1:0] compared,SS[2:0] compared,SS[3:0] compared,SS[4:0] compared,SS[5:0] compared,SS[6:0] compared,SS[7:0] compared,SS[8:0] compared,SS[9:0] compared,SS[10:0] compared,SS[11:0] compared,SS[12:0] compared,SS[13:0] compared,All bits compared"
|
|
hexmask.long.word 0x00 0.--14. 0x01 " SS ,Sub seconds value"
|
|
else
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "RTC_ALRMBSSR,RTC alarm B sub second register"
|
|
bitfld.long 0x00 24.--27. " MASKSS ,Mask the most-significant bits starting at this bit" "No comparison,SS[0] compared,SS[1:0] compared,SS[2:0] compared,SS[3:0] compared,SS[4:0] compared,SS[5:0] compared,SS[6:0] compared,SS[7:0] compared,SS[8:0] compared,SS[9:0] compared,SS[10:0] compared,SS[11:0] compared,SS[12:0] compared,SS[13:0] compared,All bits compared"
|
|
hexmask.long.word 0x00 0.--14. 0x01 " SS ,Sub seconds value"
|
|
endif
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "RTC_OR,RTC option register"
|
|
bitfld.long 0x00 1. " RTC_OUT_RMP ,RTC_OUT remap" "0,1"
|
|
bitfld.long 0x00 0. " RTC_ALARM_TYPE ,RTC_ALARM on PC13 output type" "Open-drain,Push-pull"
|
|
group.long 0x50++0x13
|
|
line.long 0x0 "BKP0R,RTC backup register 0"
|
|
line.long 0x4 "BKP1R,RTC backup register 1"
|
|
line.long 0x8 "BKP2R,RTC backup register 2"
|
|
line.long 0xC "BKP3R,RTC backup register 3"
|
|
line.long 0x10 "BKP4R,RTC backup register 4"
|
|
width 0xB
|
|
tree.end
|
|
tree.open "I2C (Inter-integrated circuit interface)"
|
|
tree "I2C 1"
|
|
base ad:0x40005400
|
|
width 16.
|
|
if ((per.l(ad:0x40005400+0x00)&0x100000)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "I2C1_CR1,Control register 1"
|
|
bitfld.long 0x00 23. " PECEN ,PEC enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " ALERTEN ,SMBus alert enable (Device mode/Host mode)" "Disabled/Not supported,Enabled/Supported"
|
|
bitfld.long 0x00 21. " SMBDEN ,SMBus Device Default address enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SMBHEN ,SMBus Host address enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GCEN ,General call enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " WUPEN ,Wakeup from STOP enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " NOSTRETCH ,Clock stretching disable " "No,Yes"
|
|
bitfld.long 0x00 16. " SBC ,Slave byte control" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " RXDMAEN ,DMA reception requests enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " TXDMAEN ,DMA transmission requests enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ANFOFF ,Analog noise filter OFF" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " DNF[3:0] ,Digital noise filter" "Disabled,1 tI2CCLK,2 tI2CCLK,3 tI2CCLK,4 tI2CCLK,5 tI2CCLK,6 tI2CCLK,7 tI2CCLK,8 tI2CCLK,9 tI2CCLK,10 tI2CCLK,12 tI2CCLK,12 tI2CCLK,13 tI2CCLK,14 tI2CCLK,15 tI2CCLK"
|
|
bitfld.long 0x00 7. " ERRIE ,Error interrupts enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCIE ,Transfer Complete interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " STOPIE ,STOP detection Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " NACKIE ,Not acknowledge received Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ADDRIE ,Address match Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RXIE ,RX Interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TXIE ,TX Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PE ,Peripheral enable" "Disabled,Enabled"
|
|
textline " "
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "I2C1_CR1,Control register 1"
|
|
bitfld.long 0x00 23. " PECEN ,PEC enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " ALERTEN ,SMBus alert enable (Device mode/Host mode)" "Not supported,Supported"
|
|
bitfld.long 0x00 21. " SMBDEN ,SMBus Device Default address enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SMBHEN ,SMBus Host address enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GCEN ,General call enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " WUPEN ,Wakeup from STOP enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " NOSTRETCH ,Clock stretching disable " "No,Yes"
|
|
bitfld.long 0x00 16. " SBC ,Slave byte control" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " RXDMAEN ,DMA reception requests enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " TXDMAEN ,DMA transmission requests enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ANFOFF ,Analog noise filter OFF" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " DNF[3:0] ,Digital noise filter" "Disabled,1 tI2CCLK,2 tI2CCLK,3 tI2CCLK,4 tI2CCLK,5 tI2CCLK,6 tI2CCLK,7 tI2CCLK,8 tI2CCLK,9 tI2CCLK,10 tI2CCLK,12 tI2CCLK,12 tI2CCLK,13 tI2CCLK,14 tI2CCLK,15 tI2CCLK"
|
|
bitfld.long 0x00 7. " ERRIE ,Error interrupts enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCIE ,Transfer Complete interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " STOPIE ,STOP detection Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " NACKIE ,Not acknowledge received Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ADDRIE ,Address match Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RXIE ,RX Interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TXIE ,TX Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PE ,Peripheral enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "I2C1_CR2,Control register 2"
|
|
bitfld.long 0x00 26. " PECBYTE ,Packet error checking byte" "No PEC,PEC"
|
|
textline " "
|
|
bitfld.long 0x00 25. " AUTOEND ,Automatic end mode" "Software mode,Automatic mode"
|
|
bitfld.long 0x00 24. " RELOAD ,NBYTES reload mode" "Completed,Not completed"
|
|
hexmask.long.byte 0x00 16.--23. 0x01 " NBYTES[7:0] ,Number of bytes"
|
|
bitfld.long 0x00 15. " NACK ,NACK generation" "ACK sent,NACK sent"
|
|
textline " "
|
|
bitfld.long 0x00 14. " STOP ,Stop generation" "No stop,Stop"
|
|
bitfld.long 0x00 13. " START ,Start generation" "No start,Start/Restart"
|
|
bitfld.long 0x00 12. " HEAD10R ,10-bit address header only read direction" "10 bits,7 bits"
|
|
bitfld.long 0x00 11. " ADD10 ,10-bit addressing mode" "7-bit,10-bit"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RD_WRN ,Transfer direction" "Write,Read"
|
|
bitfld.long 0x00 8.--9. " SADD[9:8] ,Slave address bit 9:8" "0,1,2,3"
|
|
hexmask.long.byte 0x00 1.--7. 0x01 " SADD[7:1] ,Slave address bit 7:1 "
|
|
bitfld.long 0x00 0. " SADD0 ,Slave address bit 0" "0,1"
|
|
textline " "
|
|
if ((per.l(ad:0x40005400+0x08)&0x8000)==0x00)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2C1_OAR1,Own address 1 register"
|
|
bitfld.long 0x00 15. " OA1EN ,Own Address 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " OA1MODE ,Own Address 1 10-bit mode" "7-bit,10-bit"
|
|
bitfld.long 0x00 9. " OA1 ,Interface address" "0,1"
|
|
bitfld.long 0x00 8. ",Interface address" "0,1"
|
|
bitfld.long 0x00 7. ",Interface address" "0,1"
|
|
bitfld.long 0x00 6. ",Interface address" "0,1"
|
|
bitfld.long 0x00 5. ",Interface address" "0,1"
|
|
bitfld.long 0x00 4. ",Interface address" "0,1"
|
|
bitfld.long 0x00 3. ",Interface address" "0,1"
|
|
bitfld.long 0x00 2. ",Interface address" "0,1"
|
|
bitfld.long 0x00 1. ",Interface address" "0,1"
|
|
bitfld.long 0x00 0. ",Interface address" "0,1"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2C1_OAR1,Own address 1 register"
|
|
bitfld.long 0x00 15. " OA1EN ,Own Address 1 enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 10. " OA1MODE ,Own Address 1 10-bit mode" "7-bit,10-bit"
|
|
rbitfld.long 0x00 9. " OA1 ,Interface address" "0,1"
|
|
rbitfld.long 0x00 8. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 7. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 6. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 5. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 4. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 3. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 2. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 1. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 0. ",Interface address" "0,1"
|
|
endif
|
|
if ((per.l(ad:0x40005400+0x0C)&0x8000)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2C1_OAR2,Own address 2 register"
|
|
bitfld.long 0x00 15. " OA2EN ,Own Address 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " OA2MSK ,Own Address 2 masks" "No mask,OA2[7:2] compared,OA2[7:3] compared,OA2[7:4] compared,OA2[7:5] compared,OA2[7:6] compared,OA2[7] compared,No comparison"
|
|
bitfld.long 0x00 7. " OA2 ,Interface address" "0,1"
|
|
bitfld.long 0x00 6. ",Interface address" "0,1"
|
|
bitfld.long 0x00 5. ",Interface address" "0,1"
|
|
bitfld.long 0x00 4. ",Interface address" "0,1"
|
|
bitfld.long 0x00 3. ",Interface address" "0,1"
|
|
bitfld.long 0x00 2. ",Interface address" "0,1"
|
|
bitfld.long 0x00 1. ",Interface address" "0,1"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2C1_OAR2,Own address 2 register"
|
|
bitfld.long 0x00 15. " OA2EN ,Own Address 2 enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8.--10. " OA2MSK ,Own Address 2 masks" "No mask,OA2[7:2] compared,OA2[7:3] compared,OA2[7:4] compared,OA2[7:5] compared,OA2[7:6] compared,OA2[7] compared,No comparison"
|
|
rbitfld.long 0x00 7. " OA2 ,Interface address" "0,1"
|
|
rbitfld.long 0x00 6. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 5. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 4. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 3. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 2. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 1. ",Interface address" "0,1"
|
|
endif
|
|
textline " "
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2C1_TIMINGR,Timing register"
|
|
bitfld.long 0x00 28.--31. " PRESC[3:0] ,Timing prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " SCLDEL[3:0] ,Data setup time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. " SDADEL[3:0] ,Data hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 0x1 " SCLH[7:0] ,SCL high period"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " SCLL[7:0] ,SCL low period"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "I2C1_TIMEOUTR,Timeout register"
|
|
bitfld.long 0x00 31. " TEXTEN ,Extended clock timeout enable" "Disalbed,Enabled"
|
|
hexmask.long.word 0x00 16.--27. 0x1 " TIMEOUTB[11:0] ,Bus timeout B"
|
|
bitfld.long 0x00 15. " TIMOUTEN ,Clock timeout enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TIDLE ,Idle clock timeout detection" "Low timeout,High timeout"
|
|
hexmask.long.word 0x00 0.--11. 0x1 " TIMEOUTA[11:0] ,Bus Timeout A"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "I2C1_ISR,Interrupt and Status register"
|
|
hexmask.long.byte 0x00 17.--23. 0x01 " ADDCODE[6:0] ,Address match code"
|
|
rbitfld.long 0x00 16. " DIR ,Transfer direction" "Write,Read"
|
|
rbitfld.long 0x00 15. " BUSY ,Bus busy" "Not busy,Busy"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " ALERT ,SMBus alert" "Not detected,Detected"
|
|
rbitfld.long 0x00 12. " TIMEOUT ,Timeout or tLOW detection flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 11. " PECERR ,PEC Error in reception" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 10. " OVR ,Overrun/Underrun" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " ARLO ,Arbitration lost" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " BERR ,Bus error" "No error,Error"
|
|
bitfld.long 0x00 7. " TCR ,Transfer Complete Reload" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Transfer Complete" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " STOPF ,Stop detection flag" "Not detected,Detected"
|
|
bitfld.long 0x00 4. " NACKF ,Not Acknowledge received flag" "Not received,Received"
|
|
bitfld.long 0x00 3. " ADDR ,Address matched" "Not matched,Matched"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " RXNE ,Receive data register not empty" "No,Yes"
|
|
bitfld.long 0x00 1. " TXIS ,Transmit interrupt status" "Not empty,Empty"
|
|
bitfld.long 0x00 0. " TXE ,Transmit data register empty" "Not empty,Empty"
|
|
wgroup.long 0x1C++0x03
|
|
line.long 0x00 "I2C1_ICR,Interrupt clear register"
|
|
bitfld.long 0x00 13. " ALERTCF ,Alert flag clear" "No effect,Clear"
|
|
bitfld.long 0x00 12. " TIMOUTCF ,Timeout detection flag clear" "No effect,Clear"
|
|
bitfld.long 0x00 11. " PECCF ,PEC Error flag clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 10. " OVRCF ,Overrun/Underrun flag clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " ARLOCF ,Arbitration Lost flag clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " BERRCF ,Bus error flag clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " STOPCF ,Stop detection flag clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " NACKCF ,Not Acknowledge flag clear" "No effect,Clear"
|
|
bitfld.long 0x00 3. " ADDRCF ,Address Matched flag clear " "No effect,Clear"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "I2C1_PECR,PEC register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PEC[7:0] ,Packet error checking register"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "I2C1_RXDR,Receive data register"
|
|
hexmask.long.byte 0x00 0.--7. 0x01 " RXDATA[7:0] ,Data byte received from the I2C bus"
|
|
if ((per.l(ad:0x40005400+0x18)&0x01)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "I2C1_TXDR,Transmit data register"
|
|
hexmask.long.byte 0x00 0.--7. 0x01 " TXDATA[7:0] ,Data byte to be transmitted to the I2C bus"
|
|
else
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "I2C1_TXDR,Transmit data register"
|
|
hexmask.long.byte 0x00 0.--7. 0x01 " TXDATA[7:0] ,Data byte to be transmitted to the I2C bus"
|
|
endif
|
|
width 11.
|
|
tree.end
|
|
sif ((!cpuis("STM32L051K*"))&&(!cpuis("STM32L052K*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L021*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L031*"))&&(!cpuis("STM32L011*"))&&(!cpuis("STM32L041*")))
|
|
sif ((!cpuis("STM32L07?K*"))&&(!cpuis("STM32L08?K*")))
|
|
tree "I2C 2"
|
|
base ad:0x40005800
|
|
width 16.
|
|
if ((per.l(ad:0x40005800+0x00)&0x100000)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "I2C2_CR1,Control register 1"
|
|
bitfld.long 0x00 19. " GCEN ,General call enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " NOSTRETCH ,Clock stretching disable " "No,Yes"
|
|
bitfld.long 0x00 16. " SBC ,Slave byte control" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " RXDMAEN ,DMA reception requests enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " TXDMAEN ,DMA transmission requests enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ANFOFF ,Analog noise filter OFF" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " DNF[3:0] ,Digital noise filter" "Disabled,1 tI2CCLK,2 tI2CCLK,3 tI2CCLK,4 tI2CCLK,5 tI2CCLK,6 tI2CCLK,7 tI2CCLK,8 tI2CCLK,9 tI2CCLK,10 tI2CCLK,12 tI2CCLK,12 tI2CCLK,13 tI2CCLK,14 tI2CCLK,15 tI2CCLK"
|
|
bitfld.long 0x00 7. " ERRIE ,Error interrupts enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCIE ,Transfer Complete interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " STOPIE ,STOP detection Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " NACKIE ,Not acknowledge received Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ADDRIE ,Address match Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RXIE ,RX Interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TXIE ,TX Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PE ,Peripheral enable" "Disabled,Enabled"
|
|
textline " "
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "I2C2_CR1,Control register 1"
|
|
bitfld.long 0x00 19. " GCEN ,General call enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " NOSTRETCH ,Clock stretching disable " "No,Yes"
|
|
bitfld.long 0x00 16. " SBC ,Slave byte control" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " RXDMAEN ,DMA reception requests enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " TXDMAEN ,DMA transmission requests enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ANFOFF ,Analog noise filter OFF" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " DNF[3:0] ,Digital noise filter" "Disabled,1 tI2CCLK,2 tI2CCLK,3 tI2CCLK,4 tI2CCLK,5 tI2CCLK,6 tI2CCLK,7 tI2CCLK,8 tI2CCLK,9 tI2CCLK,10 tI2CCLK,12 tI2CCLK,12 tI2CCLK,13 tI2CCLK,14 tI2CCLK,15 tI2CCLK"
|
|
bitfld.long 0x00 7. " ERRIE ,Error interrupts enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCIE ,Transfer Complete interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " STOPIE ,STOP detection Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " NACKIE ,Not acknowledge received Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ADDRIE ,Address match Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RXIE ,RX Interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TXIE ,TX Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PE ,Peripheral enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "I2C2_CR2,Control register 2"
|
|
bitfld.long 0x00 25. " AUTOEND ,Automatic end mode" "Software mode,Automatic mode"
|
|
bitfld.long 0x00 24. " RELOAD ,NBYTES reload mode" "Completed,Not completed"
|
|
hexmask.long.byte 0x00 16.--23. 0x01 " NBYTES[7:0] ,Number of bytes"
|
|
bitfld.long 0x00 15. " NACK ,NACK generation" "ACK sent,NACK sent"
|
|
textline " "
|
|
bitfld.long 0x00 14. " STOP ,Stop generation" "No stop,Stop"
|
|
bitfld.long 0x00 13. " START ,Start generation" "No start,Start/Restart"
|
|
bitfld.long 0x00 12. " HEAD10R ,10-bit address header only read direction" "10 bits,7 bits"
|
|
bitfld.long 0x00 11. " ADD10 ,10-bit addressing mode" "7-bit,10-bit"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RD_WRN ,Transfer direction" "Write,Read"
|
|
bitfld.long 0x00 8.--9. " SADD[9:8] ,Slave address bit 9:8" "0,1,2,3"
|
|
hexmask.long.byte 0x00 1.--7. 0x01 " SADD[7:1] ,Slave address bit 7:1 "
|
|
bitfld.long 0x00 0. " SADD0 ,Slave address bit 0" "0,1"
|
|
textline " "
|
|
if ((per.l(ad:0x40005800+0x08)&0x8000)==0x00)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2C2_OAR1,Own address 1 register"
|
|
bitfld.long 0x00 15. " OA1EN ,Own Address 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " OA1MODE ,Own Address 1 10-bit mode" "7-bit,10-bit"
|
|
bitfld.long 0x00 9. " OA1 ,Interface address" "0,1"
|
|
bitfld.long 0x00 8. ",Interface address" "0,1"
|
|
bitfld.long 0x00 7. ",Interface address" "0,1"
|
|
bitfld.long 0x00 6. ",Interface address" "0,1"
|
|
bitfld.long 0x00 5. ",Interface address" "0,1"
|
|
bitfld.long 0x00 4. ",Interface address" "0,1"
|
|
bitfld.long 0x00 3. ",Interface address" "0,1"
|
|
bitfld.long 0x00 2. ",Interface address" "0,1"
|
|
bitfld.long 0x00 1. ",Interface address" "0,1"
|
|
bitfld.long 0x00 0. ",Interface address" "0,1"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2C2_OAR1,Own address 1 register"
|
|
bitfld.long 0x00 15. " OA1EN ,Own Address 1 enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 10. " OA1MODE ,Own Address 1 10-bit mode" "7-bit,10-bit"
|
|
rbitfld.long 0x00 9. " OA1 ,Interface address" "0,1"
|
|
rbitfld.long 0x00 8. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 7. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 6. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 5. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 4. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 3. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 2. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 1. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 0. ",Interface address" "0,1"
|
|
endif
|
|
if ((per.l(ad:0x40005800+0x0C)&0x8000)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2C2_OAR2,Own address 2 register"
|
|
bitfld.long 0x00 15. " OA2EN ,Own Address 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " OA2MSK ,Own Address 2 masks" "No mask,OA2[7:2] compared,OA2[7:3] compared,OA2[7:4] compared,OA2[7:5] compared,OA2[7:6] compared,OA2[7] compared,No comparison"
|
|
bitfld.long 0x00 7. " OA2 ,Interface address" "0,1"
|
|
bitfld.long 0x00 6. ",Interface address" "0,1"
|
|
bitfld.long 0x00 5. ",Interface address" "0,1"
|
|
bitfld.long 0x00 4. ",Interface address" "0,1"
|
|
bitfld.long 0x00 3. ",Interface address" "0,1"
|
|
bitfld.long 0x00 2. ",Interface address" "0,1"
|
|
bitfld.long 0x00 1. ",Interface address" "0,1"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2C2_OAR2,Own address 2 register"
|
|
bitfld.long 0x00 15. " OA2EN ,Own Address 2 enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8.--10. " OA2MSK ,Own Address 2 masks" "No mask,OA2[7:2] compared,OA2[7:3] compared,OA2[7:4] compared,OA2[7:5] compared,OA2[7:6] compared,OA2[7] compared,No comparison"
|
|
rbitfld.long 0x00 7. " OA2 ,Interface address" "0,1"
|
|
rbitfld.long 0x00 6. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 5. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 4. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 3. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 2. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 1. ",Interface address" "0,1"
|
|
endif
|
|
textline " "
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2C2_TIMINGR,Timing register"
|
|
bitfld.long 0x00 28.--31. " PRESC[3:0] ,Timing prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " SCLDEL[3:0] ,Data setup time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. " SDADEL[3:0] ,Data hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 0x1 " SCLH[7:0] ,SCL high period"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " SCLL[7:0] ,SCL low period"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "I2C2_ISR,Interrupt and Status register"
|
|
hexmask.long.byte 0x00 17.--23. 0x01 " ADDCODE[6:0] ,Address match code"
|
|
rbitfld.long 0x00 16. " DIR ,Transfer direction" "Write,Read"
|
|
rbitfld.long 0x00 15. " BUSY ,Bus busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 10. " OVR ,Overrun/Underrun" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " ARLO ,Arbitration lost" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " BERR ,Bus error" "No error,Error"
|
|
bitfld.long 0x00 7. " TCR ,Transfer Complete Reload" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Transfer Complete" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " STOPF ,Stop detection flag" "Not detected,Detected"
|
|
bitfld.long 0x00 4. " NACKF ,Not Acknowledge received flag" "Not received,Received"
|
|
bitfld.long 0x00 3. " ADDR ,Address matched" "Not matched,Matched"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " RXNE ,Receive data register not empty" "No,Yes"
|
|
bitfld.long 0x00 1. " TXIS ,Transmit interrupt status" "Not empty,Empty"
|
|
bitfld.long 0x00 0. " TXE ,Transmit data register empty" "Not empty,Empty"
|
|
wgroup.long 0x1C++0x03
|
|
line.long 0x00 "I2C2_ICR,Interrupt clear register"
|
|
bitfld.long 0x00 10. " OVRCF ,Overrun/Underrun flag clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " ARLOCF ,Arbitration Lost flag clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " BERRCF ,Bus error flag clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " STOPCF ,Stop detection flag clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " NACKCF ,Not Acknowledge flag clear" "No effect,Clear"
|
|
bitfld.long 0x00 3. " ADDRCF ,Address Matched flag clear " "No effect,Clear"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "I2C2_RXDR,Receive data register"
|
|
hexmask.long.byte 0x00 0.--7. 0x01 " RXDATA[7:0] ,Data byte received from the I2C bus"
|
|
if ((per.l(ad:0x40005800+0x18)&0x01)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "I2C2_TXDR,Transmit data register"
|
|
hexmask.long.byte 0x00 0.--7. 0x01 " TXDATA[7:0] ,Data byte to be transmitted to the I2C bus"
|
|
else
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "I2C2_TXDR,Transmit data register"
|
|
hexmask.long.byte 0x00 0.--7. 0x01 " TXDATA[7:0] ,Data byte to be transmitted to the I2C bus"
|
|
endif
|
|
width 11.
|
|
tree.end
|
|
endif
|
|
tree "I2C 3"
|
|
base ad:0x40007800
|
|
width 16.
|
|
if ((per.l(ad:0x40007800+0x00)&0x100000)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "I2C3_CR1,Control register 1"
|
|
bitfld.long 0x00 19. " GCEN ,General call enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " NOSTRETCH ,Clock stretching disable " "No,Yes"
|
|
bitfld.long 0x00 16. " SBC ,Slave byte control" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " RXDMAEN ,DMA reception requests enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " TXDMAEN ,DMA transmission requests enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ANFOFF ,Analog noise filter OFF" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " DNF[3:0] ,Digital noise filter" "Disabled,1 tI2CCLK,2 tI2CCLK,3 tI2CCLK,4 tI2CCLK,5 tI2CCLK,6 tI2CCLK,7 tI2CCLK,8 tI2CCLK,9 tI2CCLK,10 tI2CCLK,12 tI2CCLK,12 tI2CCLK,13 tI2CCLK,14 tI2CCLK,15 tI2CCLK"
|
|
bitfld.long 0x00 7. " ERRIE ,Error interrupts enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCIE ,Transfer Complete interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " STOPIE ,STOP detection Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " NACKIE ,Not acknowledge received Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ADDRIE ,Address match Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RXIE ,RX Interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TXIE ,TX Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PE ,Peripheral enable" "Disabled,Enabled"
|
|
textline " "
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "I2C3_CR1,Control register 1"
|
|
bitfld.long 0x00 19. " GCEN ,General call enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " NOSTRETCH ,Clock stretching disable " "No,Yes"
|
|
bitfld.long 0x00 16. " SBC ,Slave byte control" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " RXDMAEN ,DMA reception requests enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " TXDMAEN ,DMA transmission requests enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ANFOFF ,Analog noise filter OFF" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " DNF[3:0] ,Digital noise filter" "Disabled,1 tI2CCLK,2 tI2CCLK,3 tI2CCLK,4 tI2CCLK,5 tI2CCLK,6 tI2CCLK,7 tI2CCLK,8 tI2CCLK,9 tI2CCLK,10 tI2CCLK,12 tI2CCLK,12 tI2CCLK,13 tI2CCLK,14 tI2CCLK,15 tI2CCLK"
|
|
bitfld.long 0x00 7. " ERRIE ,Error interrupts enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCIE ,Transfer Complete interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " STOPIE ,STOP detection Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " NACKIE ,Not acknowledge received Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ADDRIE ,Address match Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RXIE ,RX Interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TXIE ,TX Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PE ,Peripheral enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "I2C3_CR2,Control register 2"
|
|
bitfld.long 0x00 25. " AUTOEND ,Automatic end mode" "Software mode,Automatic mode"
|
|
bitfld.long 0x00 24. " RELOAD ,NBYTES reload mode" "Completed,Not completed"
|
|
hexmask.long.byte 0x00 16.--23. 0x01 " NBYTES[7:0] ,Number of bytes"
|
|
bitfld.long 0x00 15. " NACK ,NACK generation" "ACK sent,NACK sent"
|
|
textline " "
|
|
bitfld.long 0x00 14. " STOP ,Stop generation" "No stop,Stop"
|
|
bitfld.long 0x00 13. " START ,Start generation" "No start,Start/Restart"
|
|
bitfld.long 0x00 12. " HEAD10R ,10-bit address header only read direction" "10 bits,7 bits"
|
|
bitfld.long 0x00 11. " ADD10 ,10-bit addressing mode" "7-bit,10-bit"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RD_WRN ,Transfer direction" "Write,Read"
|
|
bitfld.long 0x00 8.--9. " SADD[9:8] ,Slave address bit 9:8" "0,1,2,3"
|
|
hexmask.long.byte 0x00 1.--7. 0x01 " SADD[7:1] ,Slave address bit 7:1 "
|
|
bitfld.long 0x00 0. " SADD0 ,Slave address bit 0" "0,1"
|
|
textline " "
|
|
if ((per.l(ad:0x40007800+0x08)&0x8000)==0x00)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2C3_OAR1,Own address 1 register"
|
|
bitfld.long 0x00 15. " OA1EN ,Own Address 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " OA1MODE ,Own Address 1 10-bit mode" "7-bit,10-bit"
|
|
bitfld.long 0x00 9. " OA1 ,Interface address" "0,1"
|
|
bitfld.long 0x00 8. ",Interface address" "0,1"
|
|
bitfld.long 0x00 7. ",Interface address" "0,1"
|
|
bitfld.long 0x00 6. ",Interface address" "0,1"
|
|
bitfld.long 0x00 5. ",Interface address" "0,1"
|
|
bitfld.long 0x00 4. ",Interface address" "0,1"
|
|
bitfld.long 0x00 3. ",Interface address" "0,1"
|
|
bitfld.long 0x00 2. ",Interface address" "0,1"
|
|
bitfld.long 0x00 1. ",Interface address" "0,1"
|
|
bitfld.long 0x00 0. ",Interface address" "0,1"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2C3_OAR1,Own address 1 register"
|
|
bitfld.long 0x00 15. " OA1EN ,Own Address 1 enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 10. " OA1MODE ,Own Address 1 10-bit mode" "7-bit,10-bit"
|
|
rbitfld.long 0x00 9. " OA1 ,Interface address" "0,1"
|
|
rbitfld.long 0x00 8. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 7. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 6. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 5. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 4. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 3. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 2. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 1. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 0. ",Interface address" "0,1"
|
|
endif
|
|
if ((per.l(ad:0x40007800+0x0C)&0x8000)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2C3_OAR2,Own address 2 register"
|
|
bitfld.long 0x00 15. " OA2EN ,Own Address 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " OA2MSK ,Own Address 2 masks" "No mask,OA2[7:2] compared,OA2[7:3] compared,OA2[7:4] compared,OA2[7:5] compared,OA2[7:6] compared,OA2[7] compared,No comparison"
|
|
bitfld.long 0x00 7. " OA2 ,Interface address" "0,1"
|
|
bitfld.long 0x00 6. ",Interface address" "0,1"
|
|
bitfld.long 0x00 5. ",Interface address" "0,1"
|
|
bitfld.long 0x00 4. ",Interface address" "0,1"
|
|
bitfld.long 0x00 3. ",Interface address" "0,1"
|
|
bitfld.long 0x00 2. ",Interface address" "0,1"
|
|
bitfld.long 0x00 1. ",Interface address" "0,1"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2C3_OAR2,Own address 2 register"
|
|
bitfld.long 0x00 15. " OA2EN ,Own Address 2 enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8.--10. " OA2MSK ,Own Address 2 masks" "No mask,OA2[7:2] compared,OA2[7:3] compared,OA2[7:4] compared,OA2[7:5] compared,OA2[7:6] compared,OA2[7] compared,No comparison"
|
|
rbitfld.long 0x00 7. " OA2 ,Interface address" "0,1"
|
|
rbitfld.long 0x00 6. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 5. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 4. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 3. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 2. ",Interface address" "0,1"
|
|
rbitfld.long 0x00 1. ",Interface address" "0,1"
|
|
endif
|
|
textline " "
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2C3_TIMINGR,Timing register"
|
|
bitfld.long 0x00 28.--31. " PRESC[3:0] ,Timing prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " SCLDEL[3:0] ,Data setup time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. " SDADEL[3:0] ,Data hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 0x1 " SCLH[7:0] ,SCL high period"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " SCLL[7:0] ,SCL low period"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "I2C3_ISR,Interrupt and Status register"
|
|
hexmask.long.byte 0x00 17.--23. 0x01 " ADDCODE[6:0] ,Address match code"
|
|
rbitfld.long 0x00 16. " DIR ,Transfer direction" "Write,Read"
|
|
rbitfld.long 0x00 15. " BUSY ,Bus busy" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 10. " OVR ,Overrun/Underrun" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " ARLO ,Arbitration lost" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " BERR ,Bus error" "No error,Error"
|
|
bitfld.long 0x00 7. " TCR ,Transfer Complete Reload" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TC ,Transfer Complete" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " STOPF ,Stop detection flag" "Not detected,Detected"
|
|
bitfld.long 0x00 4. " NACKF ,Not Acknowledge received flag" "Not received,Received"
|
|
bitfld.long 0x00 3. " ADDR ,Address matched" "Not matched,Matched"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " RXNE ,Receive data register not empty" "No,Yes"
|
|
bitfld.long 0x00 1. " TXIS ,Transmit interrupt status" "Not empty,Empty"
|
|
bitfld.long 0x00 0. " TXE ,Transmit data register empty" "Not empty,Empty"
|
|
wgroup.long 0x1C++0x03
|
|
line.long 0x00 "I2C3_ICR,Interrupt clear register"
|
|
bitfld.long 0x00 10. " OVRCF ,Overrun/Underrun flag clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " ARLOCF ,Arbitration Lost flag clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " BERRCF ,Bus error flag clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " STOPCF ,Stop detection flag clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " NACKCF ,Not Acknowledge flag clear" "No effect,Clear"
|
|
bitfld.long 0x00 3. " ADDRCF ,Address Matched flag clear " "No effect,Clear"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "I2C3_RXDR,Receive data register"
|
|
hexmask.long.byte 0x00 0.--7. 0x01 " RXDATA[7:0] ,Data byte received from the I2C bus"
|
|
if ((per.l(ad:0x40007800+0x18)&0x01)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "I2C3_TXDR,Transmit data register"
|
|
hexmask.long.byte 0x00 0.--7. 0x01 " TXDATA[7:0] ,Data byte to be transmitted to the I2C bus"
|
|
else
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "I2C3_TXDR,Transmit data register"
|
|
hexmask.long.byte 0x00 0.--7. 0x01 " TXDATA[7:0] ,Data byte to be transmitted to the I2C bus"
|
|
endif
|
|
width 11.
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
sif ((cpuis("STM32L011*"))||(cpuis("STM32L021*"))||(cpuis("STM32L031*"))||(cpuis("STM32L041*")))
|
|
tree "USART (Universal synchronous asynchronous receiver transmitter)"
|
|
base ad:0x40013800
|
|
width 11.
|
|
if ((per.l(ad:0x40013800+0x00)&0x01)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CR1,Control register 1"
|
|
bitfld.long 0x00 28. 12. " M ,Word length" "1 Start/8 Data/n Stop,1 Start/9 Data/n Stop,1 Start/7 Data/n Stop,"
|
|
bitfld.long 0x00 27. " EOBIE ,End of Block interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " RTOIE ,Receiver timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21.--25. " DEAT ,Driver Enable assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 16.--20. " DEDT ,Driver Enable deassertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15. " OVER8 ,Oversampling mode" "By 16,By 8"
|
|
bitfld.long 0x00 14. " CMIE ,Character match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " MME ,Mute mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WAKE ,Receiver wakeup method" "Idle line,Address mark"
|
|
bitfld.long 0x00 10. " PCE ,Parity control enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " PS ,Parity selection" "Even,Odd"
|
|
bitfld.long 0x00 8. " PEIE ,PE interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXEIE ,TXE Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RXNEIE ,RXNE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IDLEIE ,IDLE interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RE ,Receiver enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " UESM ,USART enable in Stop mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " UE ,USART enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CR1,Control register 1"
|
|
rbitfld.long 0x00 28. 12. " M ,Word length" "1 Start/8 Data/n Stop,1 Start/9 Data/n Stop,1 Start/7 Data/n Stop,"
|
|
bitfld.long 0x00 27. " EOBIE ,End of Block interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " RTOIE ,Receiver timeout interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 21.--25. " DEAT ,Driver Enable assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--20. " DEDT ,Driver Enable deassertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rbitfld.long 0x00 15. " OVER8 ,Oversampling mode" "By 16,By 8"
|
|
bitfld.long 0x00 14. " CMIE ,Character match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " MME ,Mute mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " WAKE ,Receiver wakeup method" "Idle line,Address mark"
|
|
rbitfld.long 0x00 10. " PCE ,Parity control enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 9. " PS ,Parity selection" "Even,Odd"
|
|
bitfld.long 0x00 8. " PEIE ,PE interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXEIE ,TXE Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RXNEIE ,RXNE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IDLEIE ,IDLE interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RE ,Receiver enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " UESM ,USART enable in Stop mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " UE ,USART enable" "Disabled,Enabled"
|
|
endif
|
|
if ((per.l(ad:0x40013800+0x00)&0x01)==0x00)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "USART_CR2,Control register 2"
|
|
bitfld.long 0x00 31. " ADD[7:0] ,Address of the USART node 7" "0,1"
|
|
bitfld.long 0x00 30. ",Address of the USART node 6" "0,1"
|
|
bitfld.long 0x00 29. ",Address of the USART node 5" "0,1"
|
|
bitfld.long 0x00 28. ",Address of the USART node 4" "0,1"
|
|
bitfld.long 0x00 27. ",Address of the USART node 3" "0,1"
|
|
bitfld.long 0x00 26. ",Address of the USART node 2" "0,1"
|
|
bitfld.long 0x00 25. ",Address of the USART node 1" "0,1"
|
|
bitfld.long 0x00 24. ",Address of the USART node 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RTOEN ,Receiver timeout enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21.--22. " ABRMOD ,Baud rate detection method" "Start bit measurement,Beetwen falling edges,0x7F frame detection,0x55 frame detection"
|
|
bitfld.long 0x00 20. " ABREN ,Auto baud rate enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MSBFIRST ,Most significant bit first" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATAINV ,Binary data inversion" "Positive/direct logic,Negative/inverse logic"
|
|
bitfld.long 0x00 17. " TXINV ,TX pin active level inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 16. " RXINV ,RX pin active level inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 15. " SWAP ,Swap TX/RX pins" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x00 14. " LINEN ,LIN mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " STOP ,STOP bits" "1 stop bit,,2 stop bits,1.5 stop bit"
|
|
bitfld.long 0x00 11. " CLKEN ,Clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " CPOL ,Clock polarity" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CPHA ,Clock phase" "First,Second"
|
|
bitfld.long 0x00 8. " LBCL ,Last bit clock pulse" "Not output,Output"
|
|
bitfld.long 0x00 6. " LBDIE ,LIN break detection interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " LBDL ,LIN break detection length" "10-bit,11-bit"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ADDM7 ,7-bit Address Detection/4-bit Address Detection" "4-bit,7-bit"
|
|
elif ((per.l(ad:0x40013800+0x00)&0x05)==0x01)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "USART_CR2,Control register 2"
|
|
bitfld.long 0x00 31. " ADD[7:0] ,Address of the USART node 7" "0,1"
|
|
bitfld.long 0x00 30. ",Address of the USART node 6" "0,1"
|
|
bitfld.long 0x00 29. ",Address of the USART node 5" "0,1"
|
|
bitfld.long 0x00 28. ",Address of the USART node 4" "0,1"
|
|
bitfld.long 0x00 27. ",Address of the USART node 3" "0,1"
|
|
bitfld.long 0x00 26. ",Address of the USART node 2" "0,1"
|
|
bitfld.long 0x00 25. ",Address of the USART node 1" "0,1"
|
|
bitfld.long 0x00 24. ",Address of the USART node 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RTOEN ,Receiver timeout enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 21.--22. " ABRMOD ,Baud rate detection method" "Start bit measurement,Beetwen falling edges,0x7F frame detection,0x55 frame detection"
|
|
bitfld.long 0x00 20. " ABREN ,Auto baud rate enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 19. " MSBFIRST ,Most significant bit first" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 18. " DATAINV ,Binary data inversion" "Positive/direct logic,Negative/inverse logic"
|
|
rbitfld.long 0x00 17. " TXINV ,TX pin active level inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 16. " RXINV ,RX pin active level inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 15. " SWAP ,Swap TX/RX pins" "Not swapped,Swapped"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " LINEN ,LIN mode enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 12.--13. " STOP ,STOP bits" "1 stop bit,,2 stop bits,1.5 stop bit"
|
|
rbitfld.long 0x00 11. " CLKEN ,Clock enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 10. " CPOL ,Clock polarity" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " CPHA ,Clock phase" "First,Second"
|
|
rbitfld.long 0x00 8. " LBCL ,Last bit clock pulse" "Not output,Output"
|
|
bitfld.long 0x00 6. " LBDIE ,LIN break detection interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " LBDL ,LIN break detection length" "10-bit,11-bit"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " ADDM7 ,7-bit Address Detection/4-bit Address Detection" "4-bit,7-bit"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "USART_CR2,Control register 2"
|
|
rbitfld.long 0x00 31. " ADD[7:0] ,Address of the USART node 7" "0,1"
|
|
rbitfld.long 0x00 30. ",Address of the USART node 6" "0,1"
|
|
rbitfld.long 0x00 29. ",Address of the USART node 5" "0,1"
|
|
rbitfld.long 0x00 28. ",Address of the USART node 4" "0,1"
|
|
rbitfld.long 0x00 27. ",Address of the USART node 3" "0,1"
|
|
rbitfld.long 0x00 26. ",Address of the USART node 2" "0,1"
|
|
rbitfld.long 0x00 25. ",Address of the USART node 1" "0,1"
|
|
rbitfld.long 0x00 24. ",Address of the USART node 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RTOEN ,Receiver timeout enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 21.--22. " ABRMOD ,Baud rate detection method" "Start bit measurement,Beetwen falling edges,0x7F frame detection,0x55 frame detection"
|
|
bitfld.long 0x00 20. " ABREN ,Auto baud rate enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 19. " MSBFIRST ,Most significant bit first" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 18. " DATAINV ,Binary data inversion" "Positive/direct logic,Negative/inverse logic"
|
|
rbitfld.long 0x00 17. " TXINV ,TX pin active level inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 16. " RXINV ,RX pin active level inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 15. " SWAP ,Swap TX/RX pins" "Not swapped,Swapped"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " LINEN ,LIN mode enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 12.--13. " STOP ,STOP bits" "1 stop bit,,2 stop bits,1.5 stop bit"
|
|
rbitfld.long 0x00 11. " CLKEN ,Clock enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 10. " CPOL ,Clock polarity" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " CPHA ,Clock phase" "First,Second"
|
|
rbitfld.long 0x00 8. " LBCL ,Last bit clock pulse" "Not output,Output"
|
|
bitfld.long 0x00 6. " LBDIE ,LIN break detection interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " LBDL ,LIN break detection length" "10-bit,11-bit"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " ADDM7 ,7-bit Address Detection/4-bit Address Detection" "4-bit,7-bit"
|
|
endif
|
|
if ((per.l(ad:0x40013800+0x00)&0x01)==0x00)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "USART_CR3,Control register 3"
|
|
bitfld.long 0x00 22. " WUFIE ,Wakeup from Stop mode interrupt enable" "Inhibited,Generated"
|
|
bitfld.long 0x00 20.--21. " WUS[1:0] ,Wakeup from Stop mode interrupt flag selection" "On address match,,On Start bit detection,On RXNE"
|
|
bitfld.long 0x00 17.--19. " SCARCNT[2:0] ,Smartcard auto-retry count" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " DEP ,Driver enable polarity selection" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DEM ,Driver enable mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " DDRE ,DMA Disable on Reception Error" "No,Yes"
|
|
bitfld.long 0x00 12. " OVRDIS ,Overrun Disable" "No,Yes"
|
|
bitfld.long 0x00 11. " ONEBIT ,One sample bit method enable" "Three sample,One sample"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CTSIE ,CTS interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " CTSE ,CTS enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " RTSE ,RTS enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DMAT ,DMA enable transmitter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DMAR ,DMA enable receiver" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SCEN ,Smartcard mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " NACK ,Smartcard NACK enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " HDSEL ,Half-duplex selection" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IRLP ,IrDA Power mode" "Normal,Low-power"
|
|
bitfld.long 0x00 1. " IREN ,IrDA mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EIE ,Error interrupt enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "USART_CR3,Control register 3"
|
|
bitfld.long 0x00 22. " WUFIE ,Wakeup from Stop mode interrupt enable" "Inhibited,Generated"
|
|
rbitfld.long 0x00 20.--21. " WUS[1:0] ,Wakeup from Stop mode interrupt flag selection" "On address match,,On Start bit detection,On RXNE"
|
|
bitfld.long 0x00 17.--19. " SCARCNT[2:0] ,Smartcard auto-retry count" "Disabled,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x00 15. " DEP ,Driver enable polarity selection" "High,Low"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " DEM ,Driver enable mode" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " DDRE ,DMA Disable on Reception Error" "No,Yes"
|
|
rbitfld.long 0x00 12. " OVRDIS ,Overrun Disable" "No,Yes"
|
|
rbitfld.long 0x00 11. " ONEBIT ,One sample bit method enable" "Three sample,One sample"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CTSIE ,CTS interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 9. " CTSE ,CTS enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8. " RTSE ,RTS enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DMAT ,DMA enable transmitter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DMAR ,DMA enable receiver" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " SCEN ,Smartcard mode enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4. " NACK ,Smartcard NACK enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 3. " HDSEL ,Half-duplex selection" "Not selected,Selected"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " IRLP ,IrDA Power mode" "Normal,Low-power"
|
|
rbitfld.long 0x00 1. " IREN ,IrDA mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EIE ,Error interrupt enable" "Disabled,Enabled"
|
|
endif
|
|
if (((per.l((ad:0x40013800+0x0)))&0x8001)==0x8000)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "USART_BRR,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. " BRR ,BRR[15:4] = USARTDIV[15:4]"
|
|
bitfld.long 0x00 0.--2. " BRR ,BRR[2:0] = USARTDIV[3:0] shifted 1 bit to the right" "0,1,2,3,4,5,6,7"
|
|
elif (((per.l((ad:0x40013800+0x0)))&0x8001)==0x8001)
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "USART_BRR,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. " BRR ,BRR[15:4] = USARTDIV[15:4]"
|
|
bitfld.long 0x00 0.--2. " BRR ,BRR[2:0] = USARTDIV[3:0] shifted 1 bit to the right" "0,1,2,3,4,5,6,7"
|
|
elif (((per.l((ad:0x40013800+0x0)))&0x8001)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "USART_BRR,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. " BRR ,BRR[15:4] = USARTDIV[15:4]"
|
|
bitfld.long 0x00 0.--3. " BRR ,BRR[3:0] = USARTDIV[3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "USART_BRR,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. " BRR ,BRR[15:4] = USARTDIV[15:4]"
|
|
bitfld.long 0x00 0.--3. " BRR ,BRR[2:0] = USARTDIV[3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
if ((per.l(ad:0x40013800+0x00)&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "USART_GTPR,Guard time and prescaler register"
|
|
hexmask.long.byte 0x00 8.--15. 0x01 " GT[7:0] ,Guard time value"
|
|
hexmask.long.byte 0x00 0.--7. 0x01 " PSC[7:0] ,Prescaler value"
|
|
else
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "USART_GTPR,Guard time and prescaler register"
|
|
hexmask.long.byte 0x00 8.--15. 0x01 " GT[7:0] ,Guard time value"
|
|
hexmask.long.byte 0x00 0.--7. 0x01 " PSC[7:0] ,Prescaler value"
|
|
endif
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "USART_RTOR,Receiver timeout register"
|
|
hexmask.long.byte 0x00 24.--31. 0x01 " BLEN[7:0] ,Block Length"
|
|
hexmask.long.tbyte 0x00 0.--23. 0x01 " RTO ,Receiver timeout value"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "USART_RQR,Request register"
|
|
bitfld.long 0x00 4. " TXFRQ ,Transmit data flush request" "No effect,Request"
|
|
bitfld.long 0x00 3. " RXFRQ ,Receive data flush request" "No effect,Request"
|
|
bitfld.long 0x00 2. " MMRQ ,Mute mode request" "No effect,Request"
|
|
bitfld.long 0x00 1. " SBKRQ ,Send break request" "No effect,Request"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ABRRQ ,Auto baud rate request" "No effect,Request"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "USART_ISR,Interrupt & status register"
|
|
bitfld.long 0x00 22. " REACK ,Receive enable acknowledge flag " "Not acknowledged,Acknowledged"
|
|
bitfld.long 0x00 21. " TEACK ,Transmit enable acknowledge flag" "Not acknowledged,Acknowledged"
|
|
bitfld.long 0x00 20. " WUF ,Wakeup from Stop mode flag" "Not detected,Detected"
|
|
bitfld.long 0x00 19. " RWU ,Receiver wakeup from Mute mode" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 18. " SBKF ,Send break flag" "No break,Break"
|
|
bitfld.long 0x00 17. " CMF ,Character match flag" "Not detected,Detected"
|
|
bitfld.long 0x00 16. " BUSY ,Busy flag" "Idle,Busy"
|
|
bitfld.long 0x00 15. " ABRF ,Auto baud rate flag" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " ABRE ,Auto baud rate error" "No error,Error"
|
|
bitfld.long 0x00 12. " EOBF ,End of block flag" "Not reached,Reached"
|
|
bitfld.long 0x00 11. " RTOF ,Receiver timeout" "No timeout,Timeout"
|
|
bitfld.long 0x00 10. " CTS ,CTS flag" "Set,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CTSIF ,CTS interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " LBDF ,LIN break detection flag" "Not detected,Detected"
|
|
bitfld.long 0x00 7. " TXE ,Transmit data register empty" "Not transferred,Transferred"
|
|
bitfld.long 0x00 6. " TC ,Transmission complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXNE ,Read data register not empty" "No,Yes"
|
|
bitfld.long 0x00 4. " IDLE ,Idle line detected" "Not detected,Detected"
|
|
bitfld.long 0x00 3. " ORE ,Overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " NF ,Noise detected flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FE ,Framing error" "No error,Error"
|
|
bitfld.long 0x00 0. " PE ,Parity error" "No error,Error"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "USART_ICR,Interrupt flag clear register"
|
|
bitfld.long 0x00 20. " WUCF ,Wakeup from Stop mode clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 17. " CMCF ,Character match clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 12. " EOBCF ,End of timeout clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 11. " RTOCF ,Receiver timeout clear flag" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CTSCF ,CTS clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 8. " LBDCF ,LIN break detection clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 6. " TCCF ,Transmission complete clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 4. " IDLECF ,Idle line detected clear flag" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ORECF ,Overrun error clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 2. " NCF ,Noise detected clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 1. " FECF ,Framing error clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PECF ,Parity error clear flag" "No effect,Clear"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "RDR,Receive data register"
|
|
hexmask.long.word 0x00 0.--8. 0x01 " RDR[8:0] ,Receive data vslue"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "USART_TDR,Transmit data register"
|
|
hexmask.long.word 0x00 0.--8. 0x01 " TDR ,Transmit data value"
|
|
width 11.
|
|
tree.end
|
|
else
|
|
tree.open "USART (Universal synchronous asynchronous receiver transmitter)"
|
|
tree "USART 1"
|
|
base ad:0x40013800
|
|
width 11.
|
|
if ((per.l(ad:0x40013800+0x00)&0x01)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CR1,Control register 1"
|
|
bitfld.long 0x00 28. 12. " M ,Word length" "1 Start/8 Data/n Stop,1 Start/9 Data/n Stop,1 Start/7 Data/n Stop,"
|
|
bitfld.long 0x00 27. " EOBIE ,End of Block interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " RTOIE ,Receiver timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21.--25. " DEAT ,Driver Enable assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 16.--20. " DEDT ,Driver Enable deassertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15. " OVER8 ,Oversampling mode" "By 16,By 8"
|
|
bitfld.long 0x00 14. " CMIE ,Character match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " MME ,Mute mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WAKE ,Receiver wakeup method" "Idle line,Address mark"
|
|
bitfld.long 0x00 10. " PCE ,Parity control enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " PS ,Parity selection" "Even,Odd"
|
|
bitfld.long 0x00 8. " PEIE ,PE interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXEIE ,TXE Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RXNEIE ,RXNE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IDLEIE ,IDLE interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RE ,Receiver enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " UESM ,USART enable in Stop mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " UE ,USART enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CR1,Control register 1"
|
|
rbitfld.long 0x00 28. 12. " M ,Word length" "1 Start/8 Data/n Stop,1 Start/9 Data/n Stop,1 Start/7 Data/n Stop,"
|
|
bitfld.long 0x00 27. " EOBIE ,End of Block interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " RTOIE ,Receiver timeout interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 21.--25. " DEAT ,Driver Enable assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--20. " DEDT ,Driver Enable deassertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rbitfld.long 0x00 15. " OVER8 ,Oversampling mode" "By 16,By 8"
|
|
bitfld.long 0x00 14. " CMIE ,Character match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " MME ,Mute mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " WAKE ,Receiver wakeup method" "Idle line,Address mark"
|
|
rbitfld.long 0x00 10. " PCE ,Parity control enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 9. " PS ,Parity selection" "Even,Odd"
|
|
bitfld.long 0x00 8. " PEIE ,PE interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXEIE ,TXE Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RXNEIE ,RXNE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IDLEIE ,IDLE interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RE ,Receiver enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " UESM ,USART enable in Stop mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " UE ,USART enable" "Disabled,Enabled"
|
|
endif
|
|
if ((per.l(ad:0x40013800+0x00)&0x01)==0x00)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "USART_CR2,Control register 2"
|
|
bitfld.long 0x00 31. " ADD[7:0] ,Address of the USART node 7" "0,1"
|
|
bitfld.long 0x00 30. ",Address of the USART node 6" "0,1"
|
|
bitfld.long 0x00 29. ",Address of the USART node 5" "0,1"
|
|
bitfld.long 0x00 28. ",Address of the USART node 4" "0,1"
|
|
bitfld.long 0x00 27. ",Address of the USART node 3" "0,1"
|
|
bitfld.long 0x00 26. ",Address of the USART node 2" "0,1"
|
|
bitfld.long 0x00 25. ",Address of the USART node 1" "0,1"
|
|
bitfld.long 0x00 24. ",Address of the USART node 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RTOEN ,Receiver timeout enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21.--22. " ABRMOD ,Baud rate detection method" "Start bit measurement,Beetwen falling edges,0x7F frame detection,0x55 frame detection"
|
|
bitfld.long 0x00 20. " ABREN ,Auto baud rate enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MSBFIRST ,Most significant bit first" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATAINV ,Binary data inversion" "Positive/direct logic,Negative/inverse logic"
|
|
bitfld.long 0x00 17. " TXINV ,TX pin active level inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 16. " RXINV ,RX pin active level inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 15. " SWAP ,Swap TX/RX pins" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x00 14. " LINEN ,LIN mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " STOP ,STOP bits" "1 stop bit,,2 stop bits,1.5 stop bit"
|
|
bitfld.long 0x00 11. " CLKEN ,Clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " CPOL ,Clock polarity" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CPHA ,Clock phase" "First,Second"
|
|
bitfld.long 0x00 8. " LBCL ,Last bit clock pulse" "Not output,Output"
|
|
bitfld.long 0x00 6. " LBDIE ,LIN break detection interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " LBDL ,LIN break detection length" "10-bit,11-bit"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ADDM7 ,7-bit Address Detection/4-bit Address Detection" "4-bit,7-bit"
|
|
elif ((per.l(ad:0x40013800+0x00)&0x05)==0x01)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "USART_CR2,Control register 2"
|
|
bitfld.long 0x00 31. " ADD[7:0] ,Address of the USART node 7" "0,1"
|
|
bitfld.long 0x00 30. ",Address of the USART node 6" "0,1"
|
|
bitfld.long 0x00 29. ",Address of the USART node 5" "0,1"
|
|
bitfld.long 0x00 28. ",Address of the USART node 4" "0,1"
|
|
bitfld.long 0x00 27. ",Address of the USART node 3" "0,1"
|
|
bitfld.long 0x00 26. ",Address of the USART node 2" "0,1"
|
|
bitfld.long 0x00 25. ",Address of the USART node 1" "0,1"
|
|
bitfld.long 0x00 24. ",Address of the USART node 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RTOEN ,Receiver timeout enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 21.--22. " ABRMOD ,Baud rate detection method" "Start bit measurement,Beetwen falling edges,0x7F frame detection,0x55 frame detection"
|
|
bitfld.long 0x00 20. " ABREN ,Auto baud rate enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 19. " MSBFIRST ,Most significant bit first" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 18. " DATAINV ,Binary data inversion" "Positive/direct logic,Negative/inverse logic"
|
|
rbitfld.long 0x00 17. " TXINV ,TX pin active level inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 16. " RXINV ,RX pin active level inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 15. " SWAP ,Swap TX/RX pins" "Not swapped,Swapped"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " LINEN ,LIN mode enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 12.--13. " STOP ,STOP bits" "1 stop bit,,2 stop bits,1.5 stop bit"
|
|
rbitfld.long 0x00 11. " CLKEN ,Clock enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 10. " CPOL ,Clock polarity" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " CPHA ,Clock phase" "First,Second"
|
|
rbitfld.long 0x00 8. " LBCL ,Last bit clock pulse" "Not output,Output"
|
|
bitfld.long 0x00 6. " LBDIE ,LIN break detection interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " LBDL ,LIN break detection length" "10-bit,11-bit"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " ADDM7 ,7-bit Address Detection/4-bit Address Detection" "4-bit,7-bit"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "USART_CR2,Control register 2"
|
|
rbitfld.long 0x00 31. " ADD[7:0] ,Address of the USART node 7" "0,1"
|
|
rbitfld.long 0x00 30. ",Address of the USART node 6" "0,1"
|
|
rbitfld.long 0x00 29. ",Address of the USART node 5" "0,1"
|
|
rbitfld.long 0x00 28. ",Address of the USART node 4" "0,1"
|
|
rbitfld.long 0x00 27. ",Address of the USART node 3" "0,1"
|
|
rbitfld.long 0x00 26. ",Address of the USART node 2" "0,1"
|
|
rbitfld.long 0x00 25. ",Address of the USART node 1" "0,1"
|
|
rbitfld.long 0x00 24. ",Address of the USART node 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RTOEN ,Receiver timeout enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 21.--22. " ABRMOD ,Baud rate detection method" "Start bit measurement,Beetwen falling edges,0x7F frame detection,0x55 frame detection"
|
|
bitfld.long 0x00 20. " ABREN ,Auto baud rate enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 19. " MSBFIRST ,Most significant bit first" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 18. " DATAINV ,Binary data inversion" "Positive/direct logic,Negative/inverse logic"
|
|
rbitfld.long 0x00 17. " TXINV ,TX pin active level inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 16. " RXINV ,RX pin active level inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 15. " SWAP ,Swap TX/RX pins" "Not swapped,Swapped"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " LINEN ,LIN mode enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 12.--13. " STOP ,STOP bits" "1 stop bit,,2 stop bits,1.5 stop bit"
|
|
rbitfld.long 0x00 11. " CLKEN ,Clock enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 10. " CPOL ,Clock polarity" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " CPHA ,Clock phase" "First,Second"
|
|
rbitfld.long 0x00 8. " LBCL ,Last bit clock pulse" "Not output,Output"
|
|
bitfld.long 0x00 6. " LBDIE ,LIN break detection interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " LBDL ,LIN break detection length" "10-bit,11-bit"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " ADDM7 ,7-bit Address Detection/4-bit Address Detection" "4-bit,7-bit"
|
|
endif
|
|
if ((per.l(ad:0x40013800+0x00)&0x01)==0x00)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "USART_CR3,Control register 3"
|
|
bitfld.long 0x00 22. " WUFIE ,Wakeup from Stop mode interrupt enable" "Inhibited,Generated"
|
|
bitfld.long 0x00 20.--21. " WUS[1:0] ,Wakeup from Stop mode interrupt flag selection" "On address match,,On Start bit detection,On RXNE"
|
|
bitfld.long 0x00 17.--19. " SCARCNT[2:0] ,Smartcard auto-retry count" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " DEP ,Driver enable polarity selection" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DEM ,Driver enable mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " DDRE ,DMA Disable on Reception Error" "No,Yes"
|
|
bitfld.long 0x00 12. " OVRDIS ,Overrun Disable" "No,Yes"
|
|
bitfld.long 0x00 11. " ONEBIT ,One sample bit method enable" "Three sample,One sample"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CTSIE ,CTS interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " CTSE ,CTS enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " RTSE ,RTS enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DMAT ,DMA enable transmitter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DMAR ,DMA enable receiver" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SCEN ,Smartcard mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " NACK ,Smartcard NACK enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " HDSEL ,Half-duplex selection" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IRLP ,IrDA Power mode" "Normal,Low-power"
|
|
bitfld.long 0x00 1. " IREN ,IrDA mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EIE ,Error interrupt enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "USART_CR3,Control register 3"
|
|
bitfld.long 0x00 22. " WUFIE ,Wakeup from Stop mode interrupt enable" "Inhibited,Generated"
|
|
rbitfld.long 0x00 20.--21. " WUS[1:0] ,Wakeup from Stop mode interrupt flag selection" "On address match,,On Start bit detection,On RXNE"
|
|
bitfld.long 0x00 17.--19. " SCARCNT[2:0] ,Smartcard auto-retry count" "Disabled,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x00 15. " DEP ,Driver enable polarity selection" "High,Low"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " DEM ,Driver enable mode" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " DDRE ,DMA Disable on Reception Error" "No,Yes"
|
|
rbitfld.long 0x00 12. " OVRDIS ,Overrun Disable" "No,Yes"
|
|
rbitfld.long 0x00 11. " ONEBIT ,One sample bit method enable" "Three sample,One sample"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CTSIE ,CTS interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 9. " CTSE ,CTS enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8. " RTSE ,RTS enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DMAT ,DMA enable transmitter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DMAR ,DMA enable receiver" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " SCEN ,Smartcard mode enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4. " NACK ,Smartcard NACK enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 3. " HDSEL ,Half-duplex selection" "Not selected,Selected"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " IRLP ,IrDA Power mode" "Normal,Low-power"
|
|
rbitfld.long 0x00 1. " IREN ,IrDA mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EIE ,Error interrupt enable" "Disabled,Enabled"
|
|
endif
|
|
if (((per.l((ad:0x40013800+0x0)))&0x8001)==0x8000)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "USART_BRR,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. " BRR ,BRR[15:4] = USARTDIV[15:4]"
|
|
bitfld.long 0x00 0.--2. " BRR ,BRR[2:0] = USARTDIV[3:0] shifted 1 bit to the right" "0,1,2,3,4,5,6,7"
|
|
elif (((per.l((ad:0x40013800+0x0)))&0x8001)==0x8001)
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "USART_BRR,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. " BRR ,BRR[15:4] = USARTDIV[15:4]"
|
|
bitfld.long 0x00 0.--2. " BRR ,BRR[2:0] = USARTDIV[3:0] shifted 1 bit to the right" "0,1,2,3,4,5,6,7"
|
|
elif (((per.l((ad:0x40013800+0x0)))&0x8001)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "USART_BRR,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. " BRR ,BRR[15:4] = USARTDIV[15:4]"
|
|
bitfld.long 0x00 0.--3. " BRR ,BRR[3:0] = USARTDIV[3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "USART_BRR,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. " BRR ,BRR[15:4] = USARTDIV[15:4]"
|
|
bitfld.long 0x00 0.--3. " BRR ,BRR[2:0] = USARTDIV[3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
if ((per.l(ad:0x40013800+0x00)&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "USART_GTPR,Guard time and prescaler register"
|
|
hexmask.long.byte 0x00 8.--15. 0x01 " GT[7:0] ,Guard time value"
|
|
hexmask.long.byte 0x00 0.--7. 0x01 " PSC[7:0] ,Prescaler value"
|
|
else
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "USART_GTPR,Guard time and prescaler register"
|
|
hexmask.long.byte 0x00 8.--15. 0x01 " GT[7:0] ,Guard time value"
|
|
hexmask.long.byte 0x00 0.--7. 0x01 " PSC[7:0] ,Prescaler value"
|
|
endif
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "USART_RTOR,Receiver timeout register"
|
|
hexmask.long.byte 0x00 24.--31. 0x01 " BLEN[7:0] ,Block Length"
|
|
hexmask.long.tbyte 0x00 0.--23. 0x01 " RTO ,Receiver timeout value"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "USART_RQR,Request register"
|
|
bitfld.long 0x00 4. " TXFRQ ,Transmit data flush request" "No effect,Request"
|
|
bitfld.long 0x00 3. " RXFRQ ,Receive data flush request" "No effect,Request"
|
|
bitfld.long 0x00 2. " MMRQ ,Mute mode request" "No effect,Request"
|
|
bitfld.long 0x00 1. " SBKRQ ,Send break request" "No effect,Request"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ABRRQ ,Auto baud rate request" "No effect,Request"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "USART_ISR,Interrupt & status register"
|
|
bitfld.long 0x00 22. " REACK ,Receive enable acknowledge flag " "Not acknowledged,Acknowledged"
|
|
bitfld.long 0x00 21. " TEACK ,Transmit enable acknowledge flag" "Not acknowledged,Acknowledged"
|
|
bitfld.long 0x00 20. " WUF ,Wakeup from Stop mode flag" "Not detected,Detected"
|
|
bitfld.long 0x00 19. " RWU ,Receiver wakeup from Mute mode" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 18. " SBKF ,Send break flag" "No break,Break"
|
|
bitfld.long 0x00 17. " CMF ,Character match flag" "Not detected,Detected"
|
|
bitfld.long 0x00 16. " BUSY ,Busy flag" "Idle,Busy"
|
|
bitfld.long 0x00 15. " ABRF ,Auto baud rate flag" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " ABRE ,Auto baud rate error" "No error,Error"
|
|
bitfld.long 0x00 12. " EOBF ,End of block flag" "Not reached,Reached"
|
|
bitfld.long 0x00 11. " RTOF ,Receiver timeout" "No timeout,Timeout"
|
|
bitfld.long 0x00 10. " CTS ,CTS flag" "Set,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CTSIF ,CTS interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " LBDF ,LIN break detection flag" "Not detected,Detected"
|
|
bitfld.long 0x00 7. " TXE ,Transmit data register empty" "Not transferred,Transferred"
|
|
bitfld.long 0x00 6. " TC ,Transmission complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXNE ,Read data register not empty" "No,Yes"
|
|
bitfld.long 0x00 4. " IDLE ,Idle line detected" "Not detected,Detected"
|
|
bitfld.long 0x00 3. " ORE ,Overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " NF ,Noise detected flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FE ,Framing error" "No error,Error"
|
|
bitfld.long 0x00 0. " PE ,Parity error" "No error,Error"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "USART_ICR,Interrupt flag clear register"
|
|
bitfld.long 0x00 20. " WUCF ,Wakeup from Stop mode clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 17. " CMCF ,Character match clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 12. " EOBCF ,End of timeout clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 11. " RTOCF ,Receiver timeout clear flag" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CTSCF ,CTS clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 8. " LBDCF ,LIN break detection clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 6. " TCCF ,Transmission complete clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 4. " IDLECF ,Idle line detected clear flag" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ORECF ,Overrun error clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 2. " NCF ,Noise detected clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 1. " FECF ,Framing error clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PECF ,Parity error clear flag" "No effect,Clear"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "RDR,Receive data register"
|
|
hexmask.long.word 0x00 0.--8. 0x01 " RDR[8:0] ,Receive data vslue"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "USART_TDR,Transmit data register"
|
|
hexmask.long.word 0x00 0.--8. 0x01 " TDR ,Transmit data value"
|
|
width 11.
|
|
tree.end
|
|
tree "USART 2"
|
|
base ad:0x40004400
|
|
width 11.
|
|
if ((per.l(ad:0x40004400+0x00)&0x01)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CR1,Control register 1"
|
|
bitfld.long 0x00 28. 12. " M ,Word length" "1 Start/8 Data/n Stop,1 Start/9 Data/n Stop,1 Start/7 Data/n Stop,"
|
|
bitfld.long 0x00 27. " EOBIE ,End of Block interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " RTOIE ,Receiver timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21.--25. " DEAT ,Driver Enable assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 16.--20. " DEDT ,Driver Enable deassertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15. " OVER8 ,Oversampling mode" "By 16,By 8"
|
|
bitfld.long 0x00 14. " CMIE ,Character match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " MME ,Mute mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WAKE ,Receiver wakeup method" "Idle line,Address mark"
|
|
bitfld.long 0x00 10. " PCE ,Parity control enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " PS ,Parity selection" "Even,Odd"
|
|
bitfld.long 0x00 8. " PEIE ,PE interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXEIE ,TXE Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RXNEIE ,RXNE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IDLEIE ,IDLE interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RE ,Receiver enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " UESM ,USART enable in Stop mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " UE ,USART enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CR1,Control register 1"
|
|
rbitfld.long 0x00 28. 12. " M ,Word length" "1 Start/8 Data/n Stop,1 Start/9 Data/n Stop,1 Start/7 Data/n Stop,"
|
|
bitfld.long 0x00 27. " EOBIE ,End of Block interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " RTOIE ,Receiver timeout interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 21.--25. " DEAT ,Driver Enable assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--20. " DEDT ,Driver Enable deassertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rbitfld.long 0x00 15. " OVER8 ,Oversampling mode" "By 16,By 8"
|
|
bitfld.long 0x00 14. " CMIE ,Character match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " MME ,Mute mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " WAKE ,Receiver wakeup method" "Idle line,Address mark"
|
|
rbitfld.long 0x00 10. " PCE ,Parity control enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 9. " PS ,Parity selection" "Even,Odd"
|
|
bitfld.long 0x00 8. " PEIE ,PE interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXEIE ,TXE Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RXNEIE ,RXNE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IDLEIE ,IDLE interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RE ,Receiver enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " UESM ,USART enable in Stop mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " UE ,USART enable" "Disabled,Enabled"
|
|
endif
|
|
if ((per.l(ad:0x40004400+0x00)&0x01)==0x00)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "USART_CR2,Control register 2"
|
|
bitfld.long 0x00 31. " ADD[7:0] ,Address of the USART node 7" "0,1"
|
|
bitfld.long 0x00 30. ",Address of the USART node 6" "0,1"
|
|
bitfld.long 0x00 29. ",Address of the USART node 5" "0,1"
|
|
bitfld.long 0x00 28. ",Address of the USART node 4" "0,1"
|
|
bitfld.long 0x00 27. ",Address of the USART node 3" "0,1"
|
|
bitfld.long 0x00 26. ",Address of the USART node 2" "0,1"
|
|
bitfld.long 0x00 25. ",Address of the USART node 1" "0,1"
|
|
bitfld.long 0x00 24. ",Address of the USART node 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RTOEN ,Receiver timeout enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21.--22. " ABRMOD ,Baud rate detection method" "Start bit measurement,Beetwen falling edges,0x7F frame detection,0x55 frame detection"
|
|
bitfld.long 0x00 20. " ABREN ,Auto baud rate enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MSBFIRST ,Most significant bit first" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATAINV ,Binary data inversion" "Positive/direct logic,Negative/inverse logic"
|
|
bitfld.long 0x00 17. " TXINV ,TX pin active level inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 16. " RXINV ,RX pin active level inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 15. " SWAP ,Swap TX/RX pins" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x00 14. " LINEN ,LIN mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " STOP ,STOP bits" "1 stop bit,,2 stop bits,1.5 stop bit"
|
|
bitfld.long 0x00 11. " CLKEN ,Clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " CPOL ,Clock polarity" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CPHA ,Clock phase" "First,Second"
|
|
bitfld.long 0x00 8. " LBCL ,Last bit clock pulse" "Not output,Output"
|
|
bitfld.long 0x00 6. " LBDIE ,LIN break detection interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " LBDL ,LIN break detection length" "10-bit,11-bit"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ADDM7 ,7-bit Address Detection/4-bit Address Detection" "4-bit,7-bit"
|
|
elif ((per.l(ad:0x40004400+0x00)&0x05)==0x01)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "USART_CR2,Control register 2"
|
|
bitfld.long 0x00 31. " ADD[7:0] ,Address of the USART node 7" "0,1"
|
|
bitfld.long 0x00 30. ",Address of the USART node 6" "0,1"
|
|
bitfld.long 0x00 29. ",Address of the USART node 5" "0,1"
|
|
bitfld.long 0x00 28. ",Address of the USART node 4" "0,1"
|
|
bitfld.long 0x00 27. ",Address of the USART node 3" "0,1"
|
|
bitfld.long 0x00 26. ",Address of the USART node 2" "0,1"
|
|
bitfld.long 0x00 25. ",Address of the USART node 1" "0,1"
|
|
bitfld.long 0x00 24. ",Address of the USART node 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RTOEN ,Receiver timeout enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 21.--22. " ABRMOD ,Baud rate detection method" "Start bit measurement,Beetwen falling edges,0x7F frame detection,0x55 frame detection"
|
|
bitfld.long 0x00 20. " ABREN ,Auto baud rate enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 19. " MSBFIRST ,Most significant bit first" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 18. " DATAINV ,Binary data inversion" "Positive/direct logic,Negative/inverse logic"
|
|
rbitfld.long 0x00 17. " TXINV ,TX pin active level inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 16. " RXINV ,RX pin active level inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 15. " SWAP ,Swap TX/RX pins" "Not swapped,Swapped"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " LINEN ,LIN mode enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 12.--13. " STOP ,STOP bits" "1 stop bit,,2 stop bits,1.5 stop bit"
|
|
rbitfld.long 0x00 11. " CLKEN ,Clock enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 10. " CPOL ,Clock polarity" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " CPHA ,Clock phase" "First,Second"
|
|
rbitfld.long 0x00 8. " LBCL ,Last bit clock pulse" "Not output,Output"
|
|
bitfld.long 0x00 6. " LBDIE ,LIN break detection interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " LBDL ,LIN break detection length" "10-bit,11-bit"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " ADDM7 ,7-bit Address Detection/4-bit Address Detection" "4-bit,7-bit"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "USART_CR2,Control register 2"
|
|
rbitfld.long 0x00 31. " ADD[7:0] ,Address of the USART node 7" "0,1"
|
|
rbitfld.long 0x00 30. ",Address of the USART node 6" "0,1"
|
|
rbitfld.long 0x00 29. ",Address of the USART node 5" "0,1"
|
|
rbitfld.long 0x00 28. ",Address of the USART node 4" "0,1"
|
|
rbitfld.long 0x00 27. ",Address of the USART node 3" "0,1"
|
|
rbitfld.long 0x00 26. ",Address of the USART node 2" "0,1"
|
|
rbitfld.long 0x00 25. ",Address of the USART node 1" "0,1"
|
|
rbitfld.long 0x00 24. ",Address of the USART node 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RTOEN ,Receiver timeout enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 21.--22. " ABRMOD ,Baud rate detection method" "Start bit measurement,Beetwen falling edges,0x7F frame detection,0x55 frame detection"
|
|
bitfld.long 0x00 20. " ABREN ,Auto baud rate enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 19. " MSBFIRST ,Most significant bit first" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 18. " DATAINV ,Binary data inversion" "Positive/direct logic,Negative/inverse logic"
|
|
rbitfld.long 0x00 17. " TXINV ,TX pin active level inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 16. " RXINV ,RX pin active level inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 15. " SWAP ,Swap TX/RX pins" "Not swapped,Swapped"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " LINEN ,LIN mode enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 12.--13. " STOP ,STOP bits" "1 stop bit,,2 stop bits,1.5 stop bit"
|
|
rbitfld.long 0x00 11. " CLKEN ,Clock enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 10. " CPOL ,Clock polarity" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " CPHA ,Clock phase" "First,Second"
|
|
rbitfld.long 0x00 8. " LBCL ,Last bit clock pulse" "Not output,Output"
|
|
bitfld.long 0x00 6. " LBDIE ,LIN break detection interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " LBDL ,LIN break detection length" "10-bit,11-bit"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " ADDM7 ,7-bit Address Detection/4-bit Address Detection" "4-bit,7-bit"
|
|
endif
|
|
if ((per.l(ad:0x40004400+0x00)&0x01)==0x00)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "USART_CR3,Control register 3"
|
|
bitfld.long 0x00 22. " WUFIE ,Wakeup from Stop mode interrupt enable" "Inhibited,Generated"
|
|
bitfld.long 0x00 20.--21. " WUS[1:0] ,Wakeup from Stop mode interrupt flag selection" "On address match,,On Start bit detection,On RXNE"
|
|
bitfld.long 0x00 17.--19. " SCARCNT[2:0] ,Smartcard auto-retry count" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " DEP ,Driver enable polarity selection" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DEM ,Driver enable mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " DDRE ,DMA Disable on Reception Error" "No,Yes"
|
|
bitfld.long 0x00 12. " OVRDIS ,Overrun Disable" "No,Yes"
|
|
bitfld.long 0x00 11. " ONEBIT ,One sample bit method enable" "Three sample,One sample"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CTSIE ,CTS interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " CTSE ,CTS enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " RTSE ,RTS enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DMAT ,DMA enable transmitter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DMAR ,DMA enable receiver" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SCEN ,Smartcard mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " NACK ,Smartcard NACK enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " HDSEL ,Half-duplex selection" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IRLP ,IrDA Power mode" "Normal,Low-power"
|
|
bitfld.long 0x00 1. " IREN ,IrDA mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EIE ,Error interrupt enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "USART_CR3,Control register 3"
|
|
bitfld.long 0x00 22. " WUFIE ,Wakeup from Stop mode interrupt enable" "Inhibited,Generated"
|
|
rbitfld.long 0x00 20.--21. " WUS[1:0] ,Wakeup from Stop mode interrupt flag selection" "On address match,,On Start bit detection,On RXNE"
|
|
bitfld.long 0x00 17.--19. " SCARCNT[2:0] ,Smartcard auto-retry count" "Disabled,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x00 15. " DEP ,Driver enable polarity selection" "High,Low"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " DEM ,Driver enable mode" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " DDRE ,DMA Disable on Reception Error" "No,Yes"
|
|
rbitfld.long 0x00 12. " OVRDIS ,Overrun Disable" "No,Yes"
|
|
rbitfld.long 0x00 11. " ONEBIT ,One sample bit method enable" "Three sample,One sample"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CTSIE ,CTS interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 9. " CTSE ,CTS enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8. " RTSE ,RTS enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DMAT ,DMA enable transmitter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DMAR ,DMA enable receiver" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " SCEN ,Smartcard mode enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4. " NACK ,Smartcard NACK enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 3. " HDSEL ,Half-duplex selection" "Not selected,Selected"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " IRLP ,IrDA Power mode" "Normal,Low-power"
|
|
rbitfld.long 0x00 1. " IREN ,IrDA mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EIE ,Error interrupt enable" "Disabled,Enabled"
|
|
endif
|
|
if (((per.l((ad:0x40004400+0x0)))&0x8001)==0x8000)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "USART_BRR,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. " BRR ,BRR[15:4] = USARTDIV[15:4]"
|
|
bitfld.long 0x00 0.--2. " BRR ,BRR[2:0] = USARTDIV[3:0] shifted 1 bit to the right" "0,1,2,3,4,5,6,7"
|
|
elif (((per.l((ad:0x40004400+0x0)))&0x8001)==0x8001)
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "USART_BRR,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. " BRR ,BRR[15:4] = USARTDIV[15:4]"
|
|
bitfld.long 0x00 0.--2. " BRR ,BRR[2:0] = USARTDIV[3:0] shifted 1 bit to the right" "0,1,2,3,4,5,6,7"
|
|
elif (((per.l((ad:0x40004400+0x0)))&0x8001)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "USART_BRR,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. " BRR ,BRR[15:4] = USARTDIV[15:4]"
|
|
bitfld.long 0x00 0.--3. " BRR ,BRR[3:0] = USARTDIV[3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "USART_BRR,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. " BRR ,BRR[15:4] = USARTDIV[15:4]"
|
|
bitfld.long 0x00 0.--3. " BRR ,BRR[2:0] = USARTDIV[3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
if ((per.l(ad:0x40004400+0x00)&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "USART_GTPR,Guard time and prescaler register"
|
|
hexmask.long.byte 0x00 8.--15. 0x01 " GT[7:0] ,Guard time value"
|
|
hexmask.long.byte 0x00 0.--7. 0x01 " PSC[7:0] ,Prescaler value"
|
|
else
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "USART_GTPR,Guard time and prescaler register"
|
|
hexmask.long.byte 0x00 8.--15. 0x01 " GT[7:0] ,Guard time value"
|
|
hexmask.long.byte 0x00 0.--7. 0x01 " PSC[7:0] ,Prescaler value"
|
|
endif
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "USART_RTOR,Receiver timeout register"
|
|
hexmask.long.byte 0x00 24.--31. 0x01 " BLEN[7:0] ,Block Length"
|
|
hexmask.long.tbyte 0x00 0.--23. 0x01 " RTO ,Receiver timeout value"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "USART_RQR,Request register"
|
|
bitfld.long 0x00 4. " TXFRQ ,Transmit data flush request" "No effect,Request"
|
|
bitfld.long 0x00 3. " RXFRQ ,Receive data flush request" "No effect,Request"
|
|
bitfld.long 0x00 2. " MMRQ ,Mute mode request" "No effect,Request"
|
|
bitfld.long 0x00 1. " SBKRQ ,Send break request" "No effect,Request"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ABRRQ ,Auto baud rate request" "No effect,Request"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "USART_ISR,Interrupt & status register"
|
|
bitfld.long 0x00 22. " REACK ,Receive enable acknowledge flag " "Not acknowledged,Acknowledged"
|
|
bitfld.long 0x00 21. " TEACK ,Transmit enable acknowledge flag" "Not acknowledged,Acknowledged"
|
|
bitfld.long 0x00 20. " WUF ,Wakeup from Stop mode flag" "Not detected,Detected"
|
|
bitfld.long 0x00 19. " RWU ,Receiver wakeup from Mute mode" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 18. " SBKF ,Send break flag" "No break,Break"
|
|
bitfld.long 0x00 17. " CMF ,Character match flag" "Not detected,Detected"
|
|
bitfld.long 0x00 16. " BUSY ,Busy flag" "Idle,Busy"
|
|
bitfld.long 0x00 15. " ABRF ,Auto baud rate flag" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " ABRE ,Auto baud rate error" "No error,Error"
|
|
bitfld.long 0x00 12. " EOBF ,End of block flag" "Not reached,Reached"
|
|
bitfld.long 0x00 11. " RTOF ,Receiver timeout" "No timeout,Timeout"
|
|
bitfld.long 0x00 10. " CTS ,CTS flag" "Set,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CTSIF ,CTS interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " LBDF ,LIN break detection flag" "Not detected,Detected"
|
|
bitfld.long 0x00 7. " TXE ,Transmit data register empty" "Not transferred,Transferred"
|
|
bitfld.long 0x00 6. " TC ,Transmission complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXNE ,Read data register not empty" "No,Yes"
|
|
bitfld.long 0x00 4. " IDLE ,Idle line detected" "Not detected,Detected"
|
|
bitfld.long 0x00 3. " ORE ,Overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " NF ,Noise detected flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FE ,Framing error" "No error,Error"
|
|
bitfld.long 0x00 0. " PE ,Parity error" "No error,Error"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "USART_ICR,Interrupt flag clear register"
|
|
bitfld.long 0x00 20. " WUCF ,Wakeup from Stop mode clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 17. " CMCF ,Character match clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 12. " EOBCF ,End of timeout clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 11. " RTOCF ,Receiver timeout clear flag" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CTSCF ,CTS clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 8. " LBDCF ,LIN break detection clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 6. " TCCF ,Transmission complete clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 4. " IDLECF ,Idle line detected clear flag" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ORECF ,Overrun error clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 2. " NCF ,Noise detected clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 1. " FECF ,Framing error clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PECF ,Parity error clear flag" "No effect,Clear"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "RDR,Receive data register"
|
|
hexmask.long.word 0x00 0.--8. 0x01 " RDR[8:0] ,Receive data vslue"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "USART_TDR,Transmit data register"
|
|
hexmask.long.word 0x00 0.--8. 0x01 " TDR ,Transmit data value"
|
|
width 11.
|
|
tree.end
|
|
sif (cpuis("STM32L07*"))||(cpuis("STM32L08*"))
|
|
tree "USART 4"
|
|
base ad:0x40004C00
|
|
width 11.
|
|
if ((per.l(ad:0x40004C00)&0x01)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CR1,Control register 1"
|
|
bitfld.long 0x00 28. 12. " M ,Word length" "1 Start/8 Data/n Stop,1 Start/9 Data/n Stop,1 Start/7 Data/n Stop,"
|
|
bitfld.long 0x00 21.--25. " DEAT ,Driver Enable assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. " DEDT ,Driver Enable deassertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15. " OVER8 ,Oversampling mode" "By 16,By 8"
|
|
textline " "
|
|
bitfld.long 0x00 14. " CMIE ,Character match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " MME ,Mute mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " WAKE ,Receiver wakeup method" "Idle line,Address mark"
|
|
bitfld.long 0x00 10. " PCE ,Parity control enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PS ,Parity selection" "Even,Odd"
|
|
bitfld.long 0x00 8. " PEIE ,PE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXEIE ,TXE Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXNEIE ,RXNE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IDLEIE ,IDLE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RE ,Receiver enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " UE ,USART enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CR1,Control register 1"
|
|
rbitfld.long 0x00 28. 12. " M ,Word length" "1 Start/8 Data/n Stop,1 Start/9 Data/n Stop,1 Start/7 Data/n Stop,"
|
|
rbitfld.long 0x00 21.--25. " DEAT ,Driver Enable assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rbitfld.long 0x00 16.--20. " DEDT ,Driver Enable deassertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rbitfld.long 0x00 15. " OVER8 ,Oversampling mode" "By 16,By 8"
|
|
textline " "
|
|
bitfld.long 0x00 14. " CMIE ,Character match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " MME ,Mute mode enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 11. " WAKE ,Receiver wakeup method" "Idle line,Address mark"
|
|
rbitfld.long 0x00 10. " PCE ,Parity control enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " PS ,Parity selection" "Even,Odd"
|
|
bitfld.long 0x00 8. " PEIE ,PE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXEIE ,TXE Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXNEIE ,RXNE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IDLEIE ,IDLE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RE ,Receiver enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " UE ,USART enable" "Disabled,Enabled"
|
|
endif
|
|
if ((per.l(ad:0x40004C00)&0x01)==0x00)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "USART_CR2,Control register 2"
|
|
bitfld.long 0x00 31. " ADD[7:0] ,Address of the USART node 7" "0,1"
|
|
bitfld.long 0x00 30. ",Address of the USART node 6" "0,1"
|
|
bitfld.long 0x00 29. ",Address of the USART node 5" "0,1"
|
|
bitfld.long 0x00 28. ",Address of the USART node 4" "0,1"
|
|
bitfld.long 0x00 27. ",Address of the USART node 3" "0,1"
|
|
bitfld.long 0x00 26. ",Address of the USART node 2" "0,1"
|
|
bitfld.long 0x00 25. ",Address of the USART node 1" "0,1"
|
|
bitfld.long 0x00 24. ",Address of the USART node 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MSBFIRST ,Most significant bit first" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " DATAINV ,Binary data inversion" "Positive/direct logic,Negative/inverse logic"
|
|
bitfld.long 0x00 17. " TXINV ,TX pin active level inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 16. " RXINV ,RX pin active level inversion" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SWAP ,Swap TX/RX pins" "Not swapped,Swapped"
|
|
bitfld.long 0x00 12.--13. " STOP ,STOP bits" "1 stop bit,,2 stop bits,1.5 stop bit"
|
|
bitfld.long 0x00 11. " CLKEN ,Clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " CPOL ,Clock polarity" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CPHA ,Clock phase" "First,Second"
|
|
bitfld.long 0x00 8. " LBCL ,Last bit clock pulse" "Not output,Output"
|
|
bitfld.long 0x00 4. " ADDM7 ,7-bit Address Detection/4-bit Address Detection" "4-bit,7-bit"
|
|
elif ((per.l(ad:0x40004C00)&0x05)==0x01)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "USART_CR2,Control register 2"
|
|
bitfld.long 0x00 31. " ADD[7:0] ,Address of the USART node 7" "0,1"
|
|
bitfld.long 0x00 30. ",Address of the USART node 6" "0,1"
|
|
bitfld.long 0x00 29. ",Address of the USART node 5" "0,1"
|
|
bitfld.long 0x00 28. ",Address of the USART node 4" "0,1"
|
|
bitfld.long 0x00 27. ",Address of the USART node 3" "0,1"
|
|
bitfld.long 0x00 26. ",Address of the USART node 2" "0,1"
|
|
bitfld.long 0x00 25. ",Address of the USART node 1" "0,1"
|
|
bitfld.long 0x00 24. ",Address of the USART node 0" "0,1"
|
|
textline " "
|
|
rbitfld.long 0x00 19. " MSBFIRST ,Most significant bit first" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " DATAINV ,Binary data inversion" "Positive/direct logic,Negative/inverse logic"
|
|
rbitfld.long 0x00 17. " TXINV ,TX pin active level inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 16. " RXINV ,RX pin active level inversion" "Not inverted,Inverted"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " SWAP ,Swap TX/RX pins" "Not swapped,Swapped"
|
|
rbitfld.long 0x00 12.--13. " STOP ,STOP bits" "1 stop bit,,2 stop bits,1.5 stop bit"
|
|
rbitfld.long 0x00 11. " CLKEN ,Clock enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 10. " CPOL ,Clock polarity" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " CPHA ,Clock phase" "First,Second"
|
|
rbitfld.long 0x00 8. " LBCL ,Last bit clock pulse" "Not output,Output"
|
|
rbitfld.long 0x00 4. " ADDM7 ,7-bit Address Detection/4-bit Address Detection" "4-bit,7-bit"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "USART_CR2,Control register 2"
|
|
rbitfld.long 0x00 31. " ADD[7:0] ,Address of the USART node 7" "0,1"
|
|
rbitfld.long 0x00 30. ",Address of the USART node 6" "0,1"
|
|
rbitfld.long 0x00 29. ",Address of the USART node 5" "0,1"
|
|
rbitfld.long 0x00 28. ",Address of the USART node 4" "0,1"
|
|
rbitfld.long 0x00 27. ",Address of the USART node 3" "0,1"
|
|
rbitfld.long 0x00 26. ",Address of the USART node 2" "0,1"
|
|
rbitfld.long 0x00 25. ",Address of the USART node 1" "0,1"
|
|
rbitfld.long 0x00 24. ",Address of the USART node 0" "0,1"
|
|
textline " "
|
|
rbitfld.long 0x00 19. " MSBFIRST ,Most significant bit first" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " DATAINV ,Binary data inversion" "Positive/direct logic,Negative/inverse logic"
|
|
rbitfld.long 0x00 17. " TXINV ,TX pin active level inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 16. " RXINV ,RX pin active level inversion" "Not inverted,Inverted"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " SWAP ,Swap TX/RX pins" "Not swapped,Swapped"
|
|
rbitfld.long 0x00 12.--13. " STOP ,STOP bits" "1 stop bit,,2 stop bits,1.5 stop bit"
|
|
rbitfld.long 0x00 11. " CLKEN ,Clock enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 10. " CPOL ,Clock polarity" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " CPHA ,Clock phase" "First,Second"
|
|
rbitfld.long 0x00 8. " LBCL ,Last bit clock pulse" "Not output,Output"
|
|
rbitfld.long 0x00 4. " ADDM7 ,7-bit Address Detection/4-bit Address Detection" "4-bit,7-bit"
|
|
endif
|
|
if ((per.l(ad:0x40004C00)&0x01)==0x00)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "USART_CR3,Control register 3"
|
|
bitfld.long 0x00 15. " DEP ,Driver enable polarity selection" "High,Low"
|
|
bitfld.long 0x00 14. " DEM ,Driver enable mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " DDRE ,DMA Disable on Reception Error" "No,Yes"
|
|
bitfld.long 0x00 12. " OVRDIS ,Overrun Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ONEBIT ,One sample bit method enable" "Three sample,One sample"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CTSIE ,CTS interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " CTSE ,CTS enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " RTSE ,RTS enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DMAT ,DMA enable transmitter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DMAR ,DMA enable receiver" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " HDSEL ,Half-duplex selection" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " EIE ,Error interrupt enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "USART_CR3,Control register 3"
|
|
rbitfld.long 0x00 15. " DEP ,Driver enable polarity selection" "High,Low"
|
|
rbitfld.long 0x00 14. " DEM ,Driver enable mode" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " DDRE ,DMA Disable on Reception Error" "No,Yes"
|
|
rbitfld.long 0x00 12. " OVRDIS ,Overrun Disable" "No,Yes"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " ONEBIT ,One sample bit method enable" "Three sample,One sample"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CTSIE ,CTS interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 9. " CTSE ,CTS enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8. " RTSE ,RTS enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DMAT ,DMA enable transmitter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DMAR ,DMA enable receiver" "Disabled,Enabled"
|
|
rbitfld.long 0x00 3. " HDSEL ,Half-duplex selection" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " EIE ,Error interrupt enable" "Disabled,Enabled"
|
|
endif
|
|
if (((per.l((ad:0x40004C00+0x0)))&0x8001)==0x8000)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "USART_BRR,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. " BRR ,BRR[15:4] = USARTDIV[15:4]"
|
|
bitfld.long 0x00 0.--2. " BRR ,BRR[2:0] = USARTDIV[3:0] shifted 1 bit to the right" "0,1,2,3,4,5,6,7"
|
|
elif (((per.l((ad:0x40004C00+0x0)))&0x8001)==0x8001)
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "USART_BRR,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. " BRR ,BRR[15:4] = USARTDIV[15:4]"
|
|
bitfld.long 0x00 0.--2. " BRR ,BRR[2:0] = USARTDIV[3:0] shifted 1 bit to the right" "0,1,2,3,4,5,6,7"
|
|
elif (((per.l((ad:0x40004C00+0x0)))&0x8001)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "USART_BRR,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. " BRR ,BRR[15:4] = USARTDIV[15:4]"
|
|
bitfld.long 0x00 0.--3. " BRR ,BRR[3:0] = USARTDIV[3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "USART_BRR,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. " BRR ,BRR[15:4] = USARTDIV[15:4]"
|
|
bitfld.long 0x00 0.--3. " BRR ,BRR[2:0] = USARTDIV[3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "USART_RQR,Request register"
|
|
bitfld.long 0x00 3. " RXFRQ ,Receive data flush request" "No effect,Request"
|
|
bitfld.long 0x00 2. " MMRQ ,Mute mode request" "No effect,Request"
|
|
bitfld.long 0x00 1. " SBKRQ ,Send break request" "No effect,Request"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "USART_ISR,Interrupt & status register"
|
|
bitfld.long 0x00 22. " REACK ,Receive enable acknowledge flag " "Not acknowledged,Acknowledged"
|
|
bitfld.long 0x00 21. " TEACK ,Transmit enable acknowledge flag" "Not acknowledged,Acknowledged"
|
|
bitfld.long 0x00 19. " RWU ,Receiver wakeup from Mute mode" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 18. " SBKF ,Send break flag" "No break,Break"
|
|
bitfld.long 0x00 17. " CMF ,Character match flag" "Not detected,Detected"
|
|
bitfld.long 0x00 16. " BUSY ,Busy flag" "Idle,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CTS ,CTS flag" "Set,Reset"
|
|
bitfld.long 0x00 9. " CTSIF ,CTS interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXE ,Transmit data register empty" "Not transferred,Transferred"
|
|
bitfld.long 0x00 6. " TC ,Transmission complete" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " RXNE ,Read data register not empty" "No,Yes"
|
|
bitfld.long 0x00 4. " IDLE ,Idle line detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ORE ,Overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " NF ,Noise detected flag" "Not detected,Detected"
|
|
bitfld.long 0x00 1. " FE ,Framing error" "No error,Error"
|
|
bitfld.long 0x00 0. " PE ,Parity error" "No error,Error"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "USART_ICR,Interrupt flag clear register"
|
|
bitfld.long 0x00 17. " CMCF ,Character match clear flag" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CTSCF ,CTS clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 6. " TCCF ,Transmission complete clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 4. " IDLECF ,Idle line detected clear flag" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ORECF ,Overrun error clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 2. " NCF ,Noise detected clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 1. " FECF ,Framing error clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PECF ,Parity error clear flag" "No effect,Clear"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "RDR,Receive data register"
|
|
hexmask.long.word 0x00 0.--8. 0x01 " RDR[8:0] ,Receive data vslue"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "USART_TDR,Transmit data register"
|
|
hexmask.long.word 0x00 0.--8. 0x01 " TDR ,Transmit data value"
|
|
width 11.
|
|
tree.end
|
|
sif ((!cpuis("STM32l071K*"))&&(!cpuis("STM32l072K*"))&&(!cpuis("STM32l081K*"))&&(!cpuis("STM32l082K*")))
|
|
tree "USART 5"
|
|
base ad:0x40005000
|
|
width 11.
|
|
if ((per.l(ad:0x40005000)&0x01)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CR1,Control register 1"
|
|
bitfld.long 0x00 28. 12. " M ,Word length" "1 Start/8 Data/n Stop,1 Start/9 Data/n Stop,1 Start/7 Data/n Stop,"
|
|
bitfld.long 0x00 21.--25. " DEAT ,Driver Enable assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. " DEDT ,Driver Enable deassertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 15. " OVER8 ,Oversampling mode" "By 16,By 8"
|
|
textline " "
|
|
bitfld.long 0x00 14. " CMIE ,Character match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " MME ,Mute mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " WAKE ,Receiver wakeup method" "Idle line,Address mark"
|
|
bitfld.long 0x00 10. " PCE ,Parity control enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PS ,Parity selection" "Even,Odd"
|
|
bitfld.long 0x00 8. " PEIE ,PE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXEIE ,TXE Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXNEIE ,RXNE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IDLEIE ,IDLE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RE ,Receiver enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " UE ,USART enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CR1,Control register 1"
|
|
rbitfld.long 0x00 28. 12. " M ,Word length" "1 Start/8 Data/n Stop,1 Start/9 Data/n Stop,1 Start/7 Data/n Stop,"
|
|
rbitfld.long 0x00 21.--25. " DEAT ,Driver Enable assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rbitfld.long 0x00 16.--20. " DEDT ,Driver Enable deassertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rbitfld.long 0x00 15. " OVER8 ,Oversampling mode" "By 16,By 8"
|
|
textline " "
|
|
bitfld.long 0x00 14. " CMIE ,Character match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " MME ,Mute mode enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 11. " WAKE ,Receiver wakeup method" "Idle line,Address mark"
|
|
rbitfld.long 0x00 10. " PCE ,Parity control enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " PS ,Parity selection" "Even,Odd"
|
|
bitfld.long 0x00 8. " PEIE ,PE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXEIE ,TXE Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXNEIE ,RXNE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IDLEIE ,IDLE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RE ,Receiver enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " UE ,USART enable" "Disabled,Enabled"
|
|
endif
|
|
if ((per.l(ad:0x40005000)&0x01)==0x00)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "USART_CR2,Control register 2"
|
|
bitfld.long 0x00 31. " ADD[7:0] ,Address of the USART node 7" "0,1"
|
|
bitfld.long 0x00 30. ",Address of the USART node 6" "0,1"
|
|
bitfld.long 0x00 29. ",Address of the USART node 5" "0,1"
|
|
bitfld.long 0x00 28. ",Address of the USART node 4" "0,1"
|
|
bitfld.long 0x00 27. ",Address of the USART node 3" "0,1"
|
|
bitfld.long 0x00 26. ",Address of the USART node 2" "0,1"
|
|
bitfld.long 0x00 25. ",Address of the USART node 1" "0,1"
|
|
bitfld.long 0x00 24. ",Address of the USART node 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MSBFIRST ,Most significant bit first" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " DATAINV ,Binary data inversion" "Positive/direct logic,Negative/inverse logic"
|
|
bitfld.long 0x00 17. " TXINV ,TX pin active level inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 16. " RXINV ,RX pin active level inversion" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SWAP ,Swap TX/RX pins" "Not swapped,Swapped"
|
|
bitfld.long 0x00 12.--13. " STOP ,STOP bits" "1 stop bit,,2 stop bits,1.5 stop bit"
|
|
bitfld.long 0x00 11. " CLKEN ,Clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " CPOL ,Clock polarity" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CPHA ,Clock phase" "First,Second"
|
|
bitfld.long 0x00 8. " LBCL ,Last bit clock pulse" "Not output,Output"
|
|
bitfld.long 0x00 4. " ADDM7 ,7-bit Address Detection/4-bit Address Detection" "4-bit,7-bit"
|
|
elif ((per.l(ad:0x40005000)&0x05)==0x01)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "USART_CR2,Control register 2"
|
|
bitfld.long 0x00 31. " ADD[7:0] ,Address of the USART node 7" "0,1"
|
|
bitfld.long 0x00 30. ",Address of the USART node 6" "0,1"
|
|
bitfld.long 0x00 29. ",Address of the USART node 5" "0,1"
|
|
bitfld.long 0x00 28. ",Address of the USART node 4" "0,1"
|
|
bitfld.long 0x00 27. ",Address of the USART node 3" "0,1"
|
|
bitfld.long 0x00 26. ",Address of the USART node 2" "0,1"
|
|
bitfld.long 0x00 25. ",Address of the USART node 1" "0,1"
|
|
bitfld.long 0x00 24. ",Address of the USART node 0" "0,1"
|
|
textline " "
|
|
rbitfld.long 0x00 19. " MSBFIRST ,Most significant bit first" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " DATAINV ,Binary data inversion" "Positive/direct logic,Negative/inverse logic"
|
|
rbitfld.long 0x00 17. " TXINV ,TX pin active level inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 16. " RXINV ,RX pin active level inversion" "Not inverted,Inverted"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " SWAP ,Swap TX/RX pins" "Not swapped,Swapped"
|
|
rbitfld.long 0x00 12.--13. " STOP ,STOP bits" "1 stop bit,,2 stop bits,1.5 stop bit"
|
|
rbitfld.long 0x00 11. " CLKEN ,Clock enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 10. " CPOL ,Clock polarity" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " CPHA ,Clock phase" "First,Second"
|
|
rbitfld.long 0x00 8. " LBCL ,Last bit clock pulse" "Not output,Output"
|
|
rbitfld.long 0x00 4. " ADDM7 ,7-bit Address Detection/4-bit Address Detection" "4-bit,7-bit"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "USART_CR2,Control register 2"
|
|
rbitfld.long 0x00 31. " ADD[7:0] ,Address of the USART node 7" "0,1"
|
|
rbitfld.long 0x00 30. ",Address of the USART node 6" "0,1"
|
|
rbitfld.long 0x00 29. ",Address of the USART node 5" "0,1"
|
|
rbitfld.long 0x00 28. ",Address of the USART node 4" "0,1"
|
|
rbitfld.long 0x00 27. ",Address of the USART node 3" "0,1"
|
|
rbitfld.long 0x00 26. ",Address of the USART node 2" "0,1"
|
|
rbitfld.long 0x00 25. ",Address of the USART node 1" "0,1"
|
|
rbitfld.long 0x00 24. ",Address of the USART node 0" "0,1"
|
|
textline " "
|
|
rbitfld.long 0x00 19. " MSBFIRST ,Most significant bit first" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " DATAINV ,Binary data inversion" "Positive/direct logic,Negative/inverse logic"
|
|
rbitfld.long 0x00 17. " TXINV ,TX pin active level inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 16. " RXINV ,RX pin active level inversion" "Not inverted,Inverted"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " SWAP ,Swap TX/RX pins" "Not swapped,Swapped"
|
|
rbitfld.long 0x00 12.--13. " STOP ,STOP bits" "1 stop bit,,2 stop bits,1.5 stop bit"
|
|
rbitfld.long 0x00 11. " CLKEN ,Clock enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 10. " CPOL ,Clock polarity" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " CPHA ,Clock phase" "First,Second"
|
|
rbitfld.long 0x00 8. " LBCL ,Last bit clock pulse" "Not output,Output"
|
|
rbitfld.long 0x00 4. " ADDM7 ,7-bit Address Detection/4-bit Address Detection" "4-bit,7-bit"
|
|
endif
|
|
if ((per.l(ad:0x40005000)&0x01)==0x00)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "USART_CR3,Control register 3"
|
|
bitfld.long 0x00 15. " DEP ,Driver enable polarity selection" "High,Low"
|
|
bitfld.long 0x00 14. " DEM ,Driver enable mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " DDRE ,DMA Disable on Reception Error" "No,Yes"
|
|
bitfld.long 0x00 12. " OVRDIS ,Overrun Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ONEBIT ,One sample bit method enable" "Three sample,One sample"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DMAT ,DMA enable transmitter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DMAR ,DMA enable receiver" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " HDSEL ,Half-duplex selection" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " EIE ,Error interrupt enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "USART_CR3,Control register 3"
|
|
rbitfld.long 0x00 15. " DEP ,Driver enable polarity selection" "High,Low"
|
|
rbitfld.long 0x00 14. " DEM ,Driver enable mode" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " DDRE ,DMA Disable on Reception Error" "No,Yes"
|
|
rbitfld.long 0x00 12. " OVRDIS ,Overrun Disable" "No,Yes"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " ONEBIT ,One sample bit method enable" "Three sample,One sample"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DMAT ,DMA enable transmitter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DMAR ,DMA enable receiver" "Disabled,Enabled"
|
|
rbitfld.long 0x00 3. " HDSEL ,Half-duplex selection" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " EIE ,Error interrupt enable" "Disabled,Enabled"
|
|
endif
|
|
if (((per.l((ad:0x40005000+0x0)))&0x8001)==0x8000)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "USART_BRR,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. " BRR ,BRR[15:4] = USARTDIV[15:4]"
|
|
bitfld.long 0x00 0.--2. " BRR ,BRR[2:0] = USARTDIV[3:0] shifted 1 bit to the right" "0,1,2,3,4,5,6,7"
|
|
elif (((per.l((ad:0x40005000+0x0)))&0x8001)==0x8001)
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "USART_BRR,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. " BRR ,BRR[15:4] = USARTDIV[15:4]"
|
|
bitfld.long 0x00 0.--2. " BRR ,BRR[2:0] = USARTDIV[3:0] shifted 1 bit to the right" "0,1,2,3,4,5,6,7"
|
|
elif (((per.l((ad:0x40005000+0x0)))&0x8001)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "USART_BRR,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. " BRR ,BRR[15:4] = USARTDIV[15:4]"
|
|
bitfld.long 0x00 0.--3. " BRR ,BRR[3:0] = USARTDIV[3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "USART_BRR,Baud rate register"
|
|
hexmask.long.word 0x00 4.--15. 1. " BRR ,BRR[15:4] = USARTDIV[15:4]"
|
|
bitfld.long 0x00 0.--3. " BRR ,BRR[2:0] = USARTDIV[3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "USART_RQR,Request register"
|
|
bitfld.long 0x00 3. " RXFRQ ,Receive data flush request" "No effect,Request"
|
|
bitfld.long 0x00 2. " MMRQ ,Mute mode request" "No effect,Request"
|
|
bitfld.long 0x00 1. " SBKRQ ,Send break request" "No effect,Request"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "USART_ISR,Interrupt & status register"
|
|
bitfld.long 0x00 22. " REACK ,Receive enable acknowledge flag " "Not acknowledged,Acknowledged"
|
|
bitfld.long 0x00 21. " TEACK ,Transmit enable acknowledge flag" "Not acknowledged,Acknowledged"
|
|
bitfld.long 0x00 19. " RWU ,Receiver wakeup from Mute mode" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 18. " SBKF ,Send break flag" "No break,Break"
|
|
bitfld.long 0x00 17. " CMF ,Character match flag" "Not detected,Detected"
|
|
bitfld.long 0x00 16. " BUSY ,Busy flag" "Idle,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXE ,Transmit data register empty" "Not transferred,Transferred"
|
|
bitfld.long 0x00 6. " TC ,Transmission complete" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " RXNE ,Read data register not empty" "No,Yes"
|
|
bitfld.long 0x00 4. " IDLE ,Idle line detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ORE ,Overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " NF ,Noise detected flag" "Not detected,Detected"
|
|
bitfld.long 0x00 1. " FE ,Framing error" "No error,Error"
|
|
bitfld.long 0x00 0. " PE ,Parity error" "No error,Error"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "USART_ICR,Interrupt flag clear register"
|
|
bitfld.long 0x00 17. " CMCF ,Character match clear flag" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TCCF ,Transmission complete clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 4. " IDLECF ,Idle line detected clear flag" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ORECF ,Overrun error clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 2. " NCF ,Noise detected clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 1. " FECF ,Framing error clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PECF ,Parity error clear flag" "No effect,Clear"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "RDR,Receive data register"
|
|
hexmask.long.word 0x00 0.--8. 0x01 " RDR[8:0] ,Receive data vslue"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "USART_TDR,Transmit data register"
|
|
hexmask.long.word 0x00 0.--8. 0x01 " TDR ,Transmit data value"
|
|
width 11.
|
|
tree.end
|
|
endif
|
|
endif
|
|
tree.end
|
|
endif
|
|
sif (!cpuis("STM32L051K*"))&&(!cpuis("STM32L052K*"))
|
|
tree "LPUART (Low-power universal asynchronous receiver transmitter)"
|
|
base ad:0x40004800
|
|
width 5.
|
|
if ((per.l(ad:0x40004800+0x00)&0x01)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CR1,Control register 1"
|
|
bitfld.long 0x00 28. 12. " M ,Word length" "1 Start/8 Data/n Stop,1 Start/9 Data/n Stop,1 Start/7 Data/n Stop,"
|
|
bitfld.long 0x00 21.--25. " DEAT ,Driver Enable assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. " DEDT ,Driver Enable deassertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 14. " CMIE ,Character match interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " MME ,Mute mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " WAKE ,Receiver wakeup method" "Idle line,Address mark"
|
|
bitfld.long 0x00 10. " PCE ,Parity control enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " PS ,Parity selection" "Even,Odd"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PEIE ,PE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXEIE ,TXE Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RXNEIE ,RXNE interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IDLEIE ,IDLE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RE ,Receiver enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " UESM ,LPUART enable in Stop mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " UE ,LPUART enable" "Disabled,Enabled"
|
|
elif ((per.l(ad:0x40004800+0x00)&0x01)==0x01)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CR1,Control register 1"
|
|
rbitfld.long 0x00 28. 12. " M ,Word length" "1 Start/8 Data/n Stop,1 Start/9 Data/n Stop,1 Start/7 Data/n Stop,"
|
|
rbitfld.long 0x00 21.--25. " DEAT ,Driver Enable assertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rbitfld.long 0x00 16.--20. " DEDT ,Driver Enable deassertion time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 14. " CMIE ,Character match interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " MME ,Mute mode enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 11. " WAKE ,Receiver wakeup method" "Idle line,Address mark"
|
|
rbitfld.long 0x00 10. " PCE ,Parity control enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 9. " PS ,Parity selection" "Even,Odd"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PEIE ,PE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXEIE ,TXE Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RXNEIE ,RXNE interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IDLEIE ,IDLE interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RE ,Receiver enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " UESM ,LPUART enable in Stop mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " UE ,LPUART enable" "Disabled,Enabled"
|
|
endif
|
|
if ((per.l(ad:0x40004800+0x00)&0x05)==0x00)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CR2,Control register 2"
|
|
bitfld.long 0x00 31. " ADD[7:0] ,Address of the LPUART node 7" "0,1"
|
|
bitfld.long 0x00 30. ",Address of the LPUART node 6" "0,1"
|
|
bitfld.long 0x00 29. ",Address of the LPUART node 5" "0,1"
|
|
bitfld.long 0x00 28. ",Address of the LPUART node 4" "0,1"
|
|
bitfld.long 0x00 27. ",Address of the LPUART node 3" "0,1"
|
|
bitfld.long 0x00 26. ",Address of the LPUART node 2" "0,1"
|
|
bitfld.long 0x00 25. ",Address of the LPUART node 1" "0,1"
|
|
bitfld.long 0x00 24. ",Address of the LPUART node 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MSBFIRST ,Most significant bit first" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " DATAINV ,Binary data inversion" "Positive/direct logic,Negative/inverse logic"
|
|
bitfld.long 0x00 17. " TXINV ,TX pin active level inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 16. " RXINV ,RX pin active level inversion" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SWAP ,Swap TX/RX pins" "Not swapped,Swapped"
|
|
bitfld.long 0x00 12.--13. " STOP ,STOP bits" "1 stop bit,,2 stop bits,1.5 stop bit"
|
|
bitfld.long 0x00 4. " ADDM7 ,7-bit Address Detection/4-bit Address Detection" "4-bit,7-bit"
|
|
elif ((per.l(ad:0x40004800+0x00)&0x05)==0x05)
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "CR2,Control register 2"
|
|
bitfld.long 0x00 31. " ADD[7:0] ,Address of the LPUART node 7" "0,1"
|
|
bitfld.long 0x00 30. ",Address of the LPUART node 6" "0,1"
|
|
bitfld.long 0x00 29. ",Address of the LPUART node 5" "0,1"
|
|
bitfld.long 0x00 28. ",Address of the LPUART node 4" "0,1"
|
|
bitfld.long 0x00 27. ",Address of the LPUART node 3" "0,1"
|
|
bitfld.long 0x00 26. ",Address of the LPUART node 2" "0,1"
|
|
bitfld.long 0x00 25. ",Address of the LPUART node 1" "0,1"
|
|
bitfld.long 0x00 24. ",Address of the LPUART node 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MSBFIRST ,Most significant bit first" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " DATAINV ,Binary data inversion" "Positive/direct logic,Negative/inverse logic"
|
|
bitfld.long 0x00 17. " TXINV ,TX pin active level inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 16. " RXINV ,RX pin active level inversion" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SWAP ,Swap TX/RX pins" "Not swapped,Swapped"
|
|
bitfld.long 0x00 12.--13. " STOP ,STOP bits" "1 stop bit,,2 stop bits,1.5 stop bit"
|
|
bitfld.long 0x00 4. " ADDM7 ,7-bit Address Detection/4-bit Address Detection" "4-bit,7-bit"
|
|
elif ((per.l(ad:0x40004800+0x00)&0x05)==0x04)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CR2,Control register 2"
|
|
bitfld.long 0x00 31. " ADD[7:0] ,Address of the LPUART node 7" "0,1"
|
|
bitfld.long 0x00 30. ",Address of the LPUART node 6" "0,1"
|
|
bitfld.long 0x00 29. ",Address of the LPUART node 5" "0,1"
|
|
bitfld.long 0x00 28. ",Address of the LPUART node 4" "0,1"
|
|
bitfld.long 0x00 27. ",Address of the LPUART node 3" "0,1"
|
|
bitfld.long 0x00 26. ",Address of the LPUART node 2" "0,1"
|
|
bitfld.long 0x00 25. ",Address of the LPUART node 1" "0,1"
|
|
bitfld.long 0x00 24. ",Address of the LPUART node 0" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MSBFIRST ,Most significant bit first" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " DATAINV ,Binary data inversion" "Positive/direct logic,Negative/inverse logic"
|
|
bitfld.long 0x00 17. " TXINV ,TX pin active level inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 16. " RXINV ,RX pin active level inversion" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SWAP ,Swap TX/RX pins" "Not swapped,Swapped"
|
|
bitfld.long 0x00 12.--13. " STOP ,STOP bits" "1 stop bit,,2 stop bits,1.5 stop bit"
|
|
bitfld.long 0x00 4. " ADDM7 ,7-bit Address Detection/4-bit Address Detection" "4-bit,7-bit"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CR2,Control register 2"
|
|
bitfld.long 0x00 31. " ADD[7:0] ,Address of the LPUART node 7" "0,1"
|
|
bitfld.long 0x00 30. ",Address of the LPUART node 6" "0,1"
|
|
bitfld.long 0x00 29. ",Address of the LPUART node 5" "0,1"
|
|
bitfld.long 0x00 28. ",Address of the LPUART node 4" "0,1"
|
|
bitfld.long 0x00 27. ",Address of the LPUART node 3" "0,1"
|
|
bitfld.long 0x00 26. ",Address of the LPUART node 2" "0,1"
|
|
bitfld.long 0x00 25. ",Address of the LPUART node 1" "0,1"
|
|
bitfld.long 0x00 24. ",Address of the LPUART node 0" "0,1"
|
|
textline " "
|
|
rbitfld.long 0x00 19. " MSBFIRST ,Most significant bit first" "Disabled,Enabled"
|
|
rbitfld.long 0x00 18. " DATAINV ,Binary data inversion" "Positive/direct logic,Negative/inverse logic"
|
|
rbitfld.long 0x00 17. " TXINV ,TX pin active level inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 16. " RXINV ,RX pin active level inversion" "Not inverted,Inverted"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " SWAP ,Swap TX/RX pins" "Not swapped,Swapped"
|
|
rbitfld.long 0x00 12.--13. " STOP ,STOP bits" "1 stop bit,,2 stop bits,1.5 stop bit"
|
|
rbitfld.long 0x00 4. " ADDM7 ,7-bit Address Detection/4-bit Address Detection" "4-bit,7-bit"
|
|
endif
|
|
if ((per.l(ad:0x40004800+0x00)&0x01)==0x00)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CR3,Control register 3"
|
|
bitfld.long 0x00 23. " UCESM ,LPUART Clock Enable in Stop mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " WUFIE ,Wakeup from Stop mode interrupt enable" "Inhibited,Generated"
|
|
bitfld.long 0x00 20.--21. " WUS[1:0] ,Wakeup from Stop mode interrupt flag selection" "Address match,,On Start bit,On RXNE"
|
|
bitfld.long 0x00 15. " DEP ,Driver enable polarity selection" "Positive,Negative"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DEM ,Driver enable mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " DDRE ,DMA Disable on Reception Error" "No,Yes"
|
|
bitfld.long 0x00 12. " OVRDIS ,Overrun Disable" "No,Yes"
|
|
bitfld.long 0x00 10. " CTSIE ,CTS interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CTSE ,CTS enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " RTSE ,RTS enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DMAT ,DMA enable transmitter" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " DMAR ,DMA enable receiver" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " HDSEL ,Half-duplex selection" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " EIE ,Error interrupt enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CR3,Control register 3"
|
|
bitfld.long 0x00 23. " UCESM ,LPUART Clock Enable in Stop mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " WUFIE ,Wakeup from Stop mode interrupt enable" "Inhibited,Generated"
|
|
rbitfld.long 0x00 20.--21. " WUS[1:0] ,Wakeup from Stop mode interrupt flag selection" "Address match,,On Start bit,On RXNE"
|
|
rbitfld.long 0x00 15. " DEP ,Driver enable polarity selection" "Positive,Negative"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " DEM ,Driver enable mode" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " DDRE ,DMA Disable on Reception Error" "No,Yes"
|
|
rbitfld.long 0x00 12. " OVRDIS ,Overrun Disable" "No,Yes"
|
|
bitfld.long 0x00 10. " CTSIE ,CTS interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " CTSE ,CTS enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8. " RTSE ,RTS enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DMAT ,DMA enable transmitter" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " DMAR ,DMA enable receiver" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 3. " HDSEL ,Half-duplex selection" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " EIE ,Error interrupt enable" "Disabled,Enabled"
|
|
endif
|
|
if ((per.l(ad:0x40004800+0x00)&0x01)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "BRR,Baud rate register"
|
|
hexmask.long.tbyte 0x00 0.--19. 0x01 " BRR ,Baudrate"
|
|
else
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "BRR,Baud rate register"
|
|
hexmask.long.tbyte 0x00 0.--19. 0x01 " BRR ,Baudrate"
|
|
endif
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "RQR,Request register"
|
|
bitfld.long 0x00 3. " RXFRQ ,Receive data flush request" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " MMRQ ,Mute mode request" "Not requested,Requested"
|
|
bitfld.long 0x00 1. " SBKRQ ,Send break request" "Not requested,Requested"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "ISR,Interrupt & status register"
|
|
bitfld.long 0x00 22. " REACK ,Receive enable acknowledge flag " "Not acknowledged,Acknowledged"
|
|
bitfld.long 0x00 21. " TEACK ,Transmit enable acknowledge flag" "Not acknowledged,Acknowledged"
|
|
bitfld.long 0x00 20. " WUF ,Wakeup from Stop mode flag" "Not detected,Detected"
|
|
bitfld.long 0x00 19. " RWU ,Receiver wakeup from Mute mode" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 18. " SBKF ,Send break flag" "No break,Break"
|
|
bitfld.long 0x00 17. " CMF ,Character match flag" "Not detected,Detected"
|
|
bitfld.long 0x00 16. " BUSY ,Busy flag" "Idle,Busy"
|
|
bitfld.long 0x00 10. " CTS ,CTS flag" "Set,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CTSIF ,CTS interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " TXE ,Transmit data register empty" "Not transferred,Transferred"
|
|
bitfld.long 0x00 6. " TC ,Transmission complete" "Not completed,Completed"
|
|
bitfld.long 0x00 5. " RXNE ,Read data register not empty" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IDLE ,Idle line detected" "Not detected,Detected"
|
|
bitfld.long 0x00 3. " ORE ,Overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " NF ,Noise detected flag" "Not detected,Detected"
|
|
bitfld.long 0x00 1. " FE ,Framing error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PE ,Parity error" "No error,Error"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "ICR,Interrupt flag clear register"
|
|
bitfld.long 0x00 20. " WUCF ,Wakeup from Stop mode clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 17. " CMCF ,Character match clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 9. " CTSCF ,CTS clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 6. " TCCF ,Transmission complete clear flag" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IDLECF ,Idle line detected clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 3. " ORECF ,Overrun error clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 2. " NCF ,Noise detected clear flag" "No effect,Clear"
|
|
bitfld.long 0x00 1. " FECF ,Framing error clear flag" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PECF ,Parity error clear flag" "No effect,Clear"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "RDR,Receive data register"
|
|
hexmask.long.word 0x00 0.--8. 0x01 " RDR[8:0] ,Receive data vslue"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TDR,Transmit data register"
|
|
hexmask.long.word 0x00 0.--8. 0x01 " TDR ,Transmit data value"
|
|
width 11.
|
|
tree.end
|
|
endif
|
|
sif ((cpuis("STM32L011*"))||(cpuis("STM32L021*"))||(cpuis("STM32L041*"))||(cpuis("STM32L071K*"))||(cpuis("STM32L072K*"))||(cpuis("STM32L081K*"))||(cpuis("STM32L082K*")))
|
|
tree "SPI (Serial peripheral interface)"
|
|
base ad:0x40013000
|
|
width 12.
|
|
if ((((per.w((ad:0x40013000+0x04)))&0x10)==0x10))
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "SPI_CR2,SPI control register 2"
|
|
bitfld.word 0x00 7. " TXEIE ,Tx buffer empty interrupt enable" "Masked,Not masked"
|
|
bitfld.word 0x00 6. " RXNEIE ,RX buffer not empty interrupt enable" "Masked,Not masked"
|
|
bitfld.word 0x00 5. " ERRIE ,Error interrupt enable" "Masked,Enabled"
|
|
bitfld.word 0x00 4. " FRF ,Frame format" "Motorola mode,TI mode"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TXDMAEN ,Tx buffer DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " RXDMAEN ,Rx buffer DMA enable" "Disabled,Enabled"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "SPI_SR,SPI status register"
|
|
rbitfld.word 0x00 8. " FRE ,Frame format error" "No error,Error"
|
|
rbitfld.word 0x00 7. " BSY ,Busy flag" "Not busy,Busy/Tx buffer is not empty"
|
|
rbitfld.word 0x00 6. " OVR ,Overrun flag" "Not occurred,Occurred"
|
|
rbitfld.word 0x00 5. " MODF ,Mode fault" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 4. " CRCERR ,CRC error flag" "Matched,Not matched"
|
|
rbitfld.word 0x00 1. " TXE ,Transmit buffer empty" "Not empty,Empty"
|
|
rbitfld.word 0x00 0. " RXNE ,Receive buffer not empty" "Empty,Not empty"
|
|
elif (((per.w(ad:0x40013000+0x04))&0x10)==0x00)
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "SPI_CR2,SPI control register 2"
|
|
bitfld.word 0x00 7. " TXEIE ,Tx buffer empty interrupt enable" "Masked,Not masked"
|
|
bitfld.word 0x00 6. " RXNEIE ,RX buffer not empty interrupt enable" "Masked,Not masked"
|
|
bitfld.word 0x00 5. " ERRIE ,Error interrupt enable" "Masked,Enabled"
|
|
bitfld.word 0x00 4. " FRF ,Frame format" "Motorola mode,TI mode"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SSOE ,SS output enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TXDMAEN ,Tx buffer DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " RXDMAEN ,Rx buffer DMA enable" "Disabled,Enabled"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "SPI_SR,SPI status register"
|
|
rbitfld.word 0x00 8. " FRE ,Frame format error" "No error,Error"
|
|
rbitfld.word 0x00 7. " BSY ,Busy flag" "Not busy,Busy/Tx buffer is not empty"
|
|
rbitfld.word 0x00 6. " OVR ,Overrun flag" "Not occurred,Occurred"
|
|
rbitfld.word 0x00 5. " MODF ,Mode fault" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 4. " CRCERR ,CRC error flag" "Matched,Not matched"
|
|
rbitfld.word 0x00 1. " TXE ,Transmit buffer empty" "Not empty,Empty"
|
|
rbitfld.word 0x00 0. " RXNE ,Receive buffer not empty" "Empty,Not empty"
|
|
endif
|
|
group.word 0x0C++0x1
|
|
line.word 0x00 "SPI_DR,SPI data register"
|
|
hexmask.word 0x00 0.--15. 0x01 " DR[15:0] ,Data register"
|
|
width 12.
|
|
tree.end
|
|
else
|
|
tree.open "SPI/I2S (Serial peripheral interface/Inter-IC sound)"
|
|
sif ((!cpuis("STM32L051K*"))&&(!cpuis("STM32L052T*"))&&(!cpuis("STM32L052R6"))&&(!cpuis("STM32L031*")))
|
|
tree "SPI 1"
|
|
base ad:0x40013000
|
|
width 12.
|
|
if ((((per.w((ad:0x40013000+0x04)))&0x10)==0x10))
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "SPI_CR2,SPI control register 2"
|
|
bitfld.word 0x00 7. " TXEIE ,Tx buffer empty interrupt enable" "Masked,Not masked"
|
|
bitfld.word 0x00 6. " RXNEIE ,RX buffer not empty interrupt enable" "Masked,Not masked"
|
|
bitfld.word 0x00 5. " ERRIE ,Error interrupt enable" "Masked,Enabled"
|
|
bitfld.word 0x00 4. " FRF ,Frame format" "Motorola mode,TI mode"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TXDMAEN ,Tx buffer DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " RXDMAEN ,Rx buffer DMA enable" "Disabled,Enabled"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "SPI_SR,SPI status register"
|
|
rbitfld.word 0x00 8. " FRE ,Frame format error" "No error,Error"
|
|
rbitfld.word 0x00 7. " BSY ,Busy flag" "Not busy,Busy/Tx buffer is not empty"
|
|
rbitfld.word 0x00 6. " OVR ,Overrun flag" "Not occurred,Occurred"
|
|
rbitfld.word 0x00 5. " MODF ,Mode fault" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 4. " CRCERR ,CRC error flag" "Matched,Not matched"
|
|
rbitfld.word 0x00 1. " TXE ,Transmit buffer empty" "Not empty,Empty"
|
|
rbitfld.word 0x00 0. " RXNE ,Receive buffer not empty" "Empty,Not empty"
|
|
elif (((per.w(ad:0x40013000+0x04))&0x10)==0x00)
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "SPI_CR2,SPI control register 2"
|
|
bitfld.word 0x00 7. " TXEIE ,Tx buffer empty interrupt enable" "Masked,Not masked"
|
|
bitfld.word 0x00 6. " RXNEIE ,RX buffer not empty interrupt enable" "Masked,Not masked"
|
|
bitfld.word 0x00 5. " ERRIE ,Error interrupt enable" "Masked,Enabled"
|
|
bitfld.word 0x00 4. " FRF ,Frame format" "Motorola mode,TI mode"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SSOE ,SS output enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TXDMAEN ,Tx buffer DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " RXDMAEN ,Rx buffer DMA enable" "Disabled,Enabled"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "SPI_SR,SPI status register"
|
|
rbitfld.word 0x00 8. " FRE ,Frame format error" "No error,Error"
|
|
rbitfld.word 0x00 7. " BSY ,Busy flag" "Not busy,Busy/Tx buffer is not empty"
|
|
rbitfld.word 0x00 6. " OVR ,Overrun flag" "Not occurred,Occurred"
|
|
rbitfld.word 0x00 5. " MODF ,Mode fault" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 4. " CRCERR ,CRC error flag" "Matched,Not matched"
|
|
rbitfld.word 0x00 1. " TXE ,Transmit buffer empty" "Not empty,Empty"
|
|
rbitfld.word 0x00 0. " RXNE ,Receive buffer not empty" "Empty,Not empty"
|
|
endif
|
|
group.word 0x0C++0x1
|
|
line.word 0x00 "SPI_DR,SPI data register"
|
|
hexmask.word 0x00 0.--15. 0x01 " DR[15:0] ,Data register"
|
|
width 12.
|
|
tree.end
|
|
elif (cpuis("STM32L031*"))
|
|
tree "SPI 1"
|
|
base ad:0x40013000
|
|
width 12.
|
|
if (((per.w(ad:0x40013000+0x1C))&0x800)==0x000)&&(((per.w(ad:0x40013000+0x04))&0x10)==0x10)
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "SPI_CR1,SPI control register 1"
|
|
bitfld.word 0x00 15. " BIDIMODE ,Bidirectional data mode enable" "Unidirectional,Bidirectional"
|
|
bitfld.word 0x00 14. " BIDIOE ,Output enable in bidirectional mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " CRCEN ,Hardware CRC calculation enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " CRCNEXT ,Transmit CRC next" "Tx buffer,Tx CRC register"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DFF ,Data frame format" "8-bit,16-bit"
|
|
bitfld.word 0x00 10. " RXONLY ,Receive only mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " SPE ,SPI Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3.--5. " BR ,Baud Rate Control" "fPCLK/2,fPCLK/4,fPCLK/8,fPCLK/16,fPCLK/32,fPCLK/64,fPCLK/128,fPCLK/256"
|
|
textline " "
|
|
bitfld.word 0x00 2. " MSTR ,Master Selection" "Slave,Master"
|
|
elif (((per.w(ad:0x40013000+0x1C))&0x800)==0x000)&&(((per.w(ad:0x40013000+0x04))&0x10)==0x00)
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "SPI_CR1,SPI control register 1"
|
|
bitfld.word 0x00 15. " BIDIMODE ,Bidirectional data mode enable" "Unidirectional,Bidirectional"
|
|
bitfld.word 0x00 14. " BIDIOE ,Output enable in bidirectional mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " CRCEN ,Hardware CRC calculation enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " CRCNEXT ,Transmit CRC next" "Data phase,CRC phase"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DFF ,Data frame format" "8-bit,16-bit"
|
|
bitfld.word 0x00 10. " RXONLY ,Receive only mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " SSM ,Software slave management" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SSI ,Internal slave select" "0 to NSS pin,1 to NSS pin"
|
|
textline " "
|
|
bitfld.word 0x00 7. " LSBFIRST ,Frame Format" "MSB,LSB"
|
|
bitfld.word 0x00 6. " SPE ,SPI Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3.--5. " BR ,Baud Rate Control" "fPCLK/2,fPCLK/4,fPCLK/8,fPCLK/16,fPCLK/32,fPCLK/64,fPCLK/128,fPCLK/256"
|
|
bitfld.word 0x00 2. " MSTR ,Master Selection" "Slave,Master"
|
|
textline " "
|
|
bitfld.word 0x00 1. " CPOL ,Clock Polarity" "0,1"
|
|
bitfld.word 0x00 0. " CPHA ,Clock Phase" "First clock,First data"
|
|
elif (((per.w(ad:0x40013000+0x1C))&0x800)==0x800)
|
|
hgroup.word 0x00++0x1
|
|
hide.word 0x00 "SPI_CR1,SPI control register 1"
|
|
endif
|
|
if ((((per.w(ad:0x40013000+0x1C))&0x800)==0x000)&&(((per.w((ad:0x40013000+0x04)))&0x10)==0x10))
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "SPI_CR2,SPI control register 2"
|
|
bitfld.word 0x00 7. " TXEIE ,Tx buffer empty interrupt enable" "Masked,Not masked"
|
|
bitfld.word 0x00 6. " RXNEIE ,RX buffer not empty interrupt enable" "Masked,Not masked"
|
|
bitfld.word 0x00 5. " ERRIE ,Error interrupt enable" "Masked,Enabled"
|
|
bitfld.word 0x00 4. " FRF ,Frame format" "Motorola mode,TI mode"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TXDMAEN ,Tx buffer DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " RXDMAEN ,Rx buffer DMA enable" "Disabled,Enabled"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "SPI_SR,SPI status register"
|
|
rbitfld.word 0x00 8. " FRE ,Frame format error" "No error,Error"
|
|
rbitfld.word 0x00 7. " BSY ,Busy flag" "Not busy,Busy/Tx buffer is not empty"
|
|
rbitfld.word 0x00 6. " OVR ,Overrun flag" "Not occurred,Occurred"
|
|
rbitfld.word 0x00 5. " MODF ,Mode fault" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 4. " CRCERR ,CRC error flag" "Matched,Not matched"
|
|
rbitfld.word 0x00 1. " TXE ,Transmit buffer empty" "Not empty,Empty"
|
|
rbitfld.word 0x00 0. " RXNE ,Receive buffer not empty" "Empty,Not empty"
|
|
elif (((per.w(ad:0x40013000+0x1C))&0x800)==0x000)&&(((per.w(ad:0x40013000+0x04))&0x10)==0x00)
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "SPI_CR2,SPI control register 2"
|
|
bitfld.word 0x00 7. " TXEIE ,Tx buffer empty interrupt enable" "Masked,Not masked"
|
|
bitfld.word 0x00 6. " RXNEIE ,RX buffer not empty interrupt enable" "Masked,Not masked"
|
|
bitfld.word 0x00 5. " ERRIE ,Error interrupt enable" "Masked,Enabled"
|
|
bitfld.word 0x00 4. " FRF ,Frame format" "Motorola mode,TI mode"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SSOE ,SS output enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TXDMAEN ,Tx buffer DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " RXDMAEN ,Rx buffer DMA enable" "Disabled,Enabled"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "SPI_SR,SPI status register"
|
|
rbitfld.word 0x00 8. " FRE ,Frame format error" "No error,Error"
|
|
rbitfld.word 0x00 7. " BSY ,Busy flag" "Not busy,Busy/Tx buffer is not empty"
|
|
rbitfld.word 0x00 6. " OVR ,Overrun flag" "Not occurred,Occurred"
|
|
rbitfld.word 0x00 5. " MODF ,Mode fault" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 4. " CRCERR ,CRC error flag" "Matched,Not matched"
|
|
rbitfld.word 0x00 1. " TXE ,Transmit buffer empty" "Not empty,Empty"
|
|
rbitfld.word 0x00 0. " RXNE ,Receive buffer not empty" "Empty,Not empty"
|
|
elif (((per.w(ad:0x40013000+0x1C))&0x800)==0x800)
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "SPI_CR2,SPI control register 2"
|
|
bitfld.word 0x00 7. " TXEIE ,Tx buffer empty interrupt enable" "Masked,Not masked"
|
|
bitfld.word 0x00 6. " RXNEIE ,RX buffer not empty interrupt enable" "Masked,Not masked"
|
|
bitfld.word 0x00 5. " ERRIE ,Error interrupt enable" "Masked,Enabled"
|
|
bitfld.word 0x00 1. " TXDMAEN ,Tx buffer DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXDMAEN ,Rx buffer DMA enable" "Disabled,Enabled"
|
|
rgroup.word 0x08++0x1
|
|
line.word 0x00 "SPI_SR,SPI status register"
|
|
textline " "
|
|
bitfld.word 0x00 8. " FRE ,Frame format error" "No error,Error"
|
|
bitfld.word 0x00 7. " BSY ,Busy flag" "Not busy,Busy/Tx buffer is not empty"
|
|
bitfld.word 0x00 6. " OVR ,Overrun flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 3. " UDR ,Underrun flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CHSIDE ,Channel side" "Left,Right"
|
|
bitfld.word 0x00 1. " TXE ,Transmit buffer empty" "Not empty,Empty"
|
|
bitfld.word 0x00 0. " RXNE ,Receive buffer not empty" "Empty,Not empty"
|
|
endif
|
|
group.word 0x0C++0x1
|
|
line.word 0x00 "SPI_DR,SPI data register"
|
|
hexmask.word 0x00 0.--15. 0x01 " DR[15:0] ,Data register"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "SPI_CRCPR,SPI CRC polynomial register"
|
|
hexmask.word 0x00 0.--15. 0x01 " CRCPOLY[15:0] ,CRC polynomial register"
|
|
if (((per.w(ad:0x40013000+0x1C))&0x800)==0x000)
|
|
rgroup.word 0x14++0x1
|
|
line.word 0x00 "SPI_RXCRCR,SPI Rx CRC register"
|
|
hexmask.word 0x00 0.--15. 1. " RXCRC[15:0] ,Rx CRC register"
|
|
rgroup.word 0x18++0x1
|
|
line.word 0x00 "SPI_TXCRCR,SPI Tx CRC register"
|
|
hexmask.word 0x00 0.--15. 1. " TxCRC[15:0] ,Tx CRC register"
|
|
else
|
|
hgroup.word 0x14++0x1
|
|
hide.word 0x00 "SPI_RXCRCR,SPI Rx CRC register"
|
|
hgroup.word 0x18++0x1
|
|
hide.word 0x00 "SPI_TXCRCR,SPI Tx CRC register"
|
|
endif
|
|
if (((per.w(ad:0x40013000+0x1C))&0x800)==0x800)
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "SPI_I2SCFGR,SPI_I2S configuration register"
|
|
bitfld.word 0x00 11. " I2SMOD ,I2S mode selection" "SPI,I2S"
|
|
bitfld.word 0x00 10. " I2SE ,I2S enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8.--9. " I2SCFG ,I2S configuration mode" "Slave - transmit,Slave - receive,Master - transmit,Master - receive"
|
|
bitfld.word 0x00 7. " PCMSYNC ,PCM frame synchronization" "Short,Long"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " I2SSTD ,I2S standard selection" "Philips,MSB,LSB,PCM"
|
|
bitfld.word 0x00 3. " CKPOL ,Steady state clock polarity" "Low,High"
|
|
bitfld.word 0x00 1.--2. " DATLEN ,Data length to be transferred" "16-bit,24-bit,32-bit,"
|
|
bitfld.word 0x00 0. " CHLEN ,Channel length" "16-bit,32-bit"
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "SPI_I2SPR,SPI_I2S prescaler register"
|
|
bitfld.word 0x00 9. " MCKOE ,Master clock output enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " ODD ,Odd factor for the prescaler" "I2SDIV *2,I2SDIV * 2+1"
|
|
hexmask.word.byte 0x00 0.--7. 0x01 " I2SDIV ,I2S linear prescaler"
|
|
else
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "SPI_I2SCFGR,SPI_I2S configuration register"
|
|
bitfld.word 0x00 11. " I2SMOD ,I2S mode selection" "SPI,I2S"
|
|
hgroup.word 0x20++0x1
|
|
hide.word 0x00 "SPI_I2SPR,SPI_I2S prescaler register"
|
|
endif
|
|
width 12.
|
|
tree.end
|
|
endif
|
|
sif (!cpuis("STM32L052K*"))
|
|
tree "SPI/I2S 2"
|
|
base ad:0x40003800
|
|
width 12.
|
|
if (((per.w(ad:0x40003800+0x1C))&0x800)==0x000)&&(((per.w(ad:0x40003800+0x04))&0x10)==0x10)
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "SPI_CR1,SPI control register 1"
|
|
bitfld.word 0x00 15. " BIDIMODE ,Bidirectional data mode enable" "Unidirectional,Bidirectional"
|
|
bitfld.word 0x00 14. " BIDIOE ,Output enable in bidirectional mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " CRCEN ,Hardware CRC calculation enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " CRCNEXT ,Transmit CRC next" "Tx buffer,Tx CRC register"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DFF ,Data frame format" "8-bit,16-bit"
|
|
bitfld.word 0x00 10. " RXONLY ,Receive only mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " SPE ,SPI Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3.--5. " BR ,Baud Rate Control" "fPCLK/2,fPCLK/4,fPCLK/8,fPCLK/16,fPCLK/32,fPCLK/64,fPCLK/128,fPCLK/256"
|
|
textline " "
|
|
bitfld.word 0x00 2. " MSTR ,Master Selection" "Slave,Master"
|
|
elif (((per.w(ad:0x40003800+0x1C))&0x800)==0x000)&&(((per.w(ad:0x40003800+0x04))&0x10)==0x00)
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "SPI_CR1,SPI control register 1"
|
|
bitfld.word 0x00 15. " BIDIMODE ,Bidirectional data mode enable" "Unidirectional,Bidirectional"
|
|
bitfld.word 0x00 14. " BIDIOE ,Output enable in bidirectional mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " CRCEN ,Hardware CRC calculation enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " CRCNEXT ,Transmit CRC next" "Data phase,CRC phase"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DFF ,Data frame format" "8-bit,16-bit"
|
|
bitfld.word 0x00 10. " RXONLY ,Receive only mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " SSM ,Software slave management" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SSI ,Internal slave select" "0 to NSS pin,1 to NSS pin"
|
|
textline " "
|
|
bitfld.word 0x00 7. " LSBFIRST ,Frame Format" "MSB,LSB"
|
|
bitfld.word 0x00 6. " SPE ,SPI Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3.--5. " BR ,Baud Rate Control" "fPCLK/2,fPCLK/4,fPCLK/8,fPCLK/16,fPCLK/32,fPCLK/64,fPCLK/128,fPCLK/256"
|
|
bitfld.word 0x00 2. " MSTR ,Master Selection" "Slave,Master"
|
|
textline " "
|
|
bitfld.word 0x00 1. " CPOL ,Clock Polarity" "0,1"
|
|
bitfld.word 0x00 0. " CPHA ,Clock Phase" "First clock,First data"
|
|
elif (((per.w(ad:0x40003800+0x1C))&0x800)==0x800)
|
|
hgroup.word 0x00++0x1
|
|
hide.word 0x00 "SPI_CR1,SPI control register 1"
|
|
endif
|
|
if ((((per.w(ad:0x40003800+0x1C))&0x800)==0x000)&&(((per.w((ad:0x40003800+0x04)))&0x10)==0x10))
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "SPI_CR2,SPI control register 2"
|
|
bitfld.word 0x00 7. " TXEIE ,Tx buffer empty interrupt enable" "Masked,Not masked"
|
|
bitfld.word 0x00 6. " RXNEIE ,RX buffer not empty interrupt enable" "Masked,Not masked"
|
|
bitfld.word 0x00 5. " ERRIE ,Error interrupt enable" "Masked,Enabled"
|
|
bitfld.word 0x00 4. " FRF ,Frame format" "Motorola mode,TI mode"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TXDMAEN ,Tx buffer DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " RXDMAEN ,Rx buffer DMA enable" "Disabled,Enabled"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "SPI_SR,SPI status register"
|
|
rbitfld.word 0x00 8. " FRE ,Frame format error" "No error,Error"
|
|
rbitfld.word 0x00 7. " BSY ,Busy flag" "Not busy,Busy/Tx buffer is not empty"
|
|
rbitfld.word 0x00 6. " OVR ,Overrun flag" "Not occurred,Occurred"
|
|
rbitfld.word 0x00 5. " MODF ,Mode fault" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 4. " CRCERR ,CRC error flag" "Matched,Not matched"
|
|
rbitfld.word 0x00 1. " TXE ,Transmit buffer empty" "Not empty,Empty"
|
|
rbitfld.word 0x00 0. " RXNE ,Receive buffer not empty" "Empty,Not empty"
|
|
elif (((per.w(ad:0x40003800+0x1C))&0x800)==0x000)&&(((per.w(ad:0x40003800+0x04))&0x10)==0x00)
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "SPI_CR2,SPI control register 2"
|
|
bitfld.word 0x00 7. " TXEIE ,Tx buffer empty interrupt enable" "Masked,Not masked"
|
|
bitfld.word 0x00 6. " RXNEIE ,RX buffer not empty interrupt enable" "Masked,Not masked"
|
|
bitfld.word 0x00 5. " ERRIE ,Error interrupt enable" "Masked,Enabled"
|
|
bitfld.word 0x00 4. " FRF ,Frame format" "Motorola mode,TI mode"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SSOE ,SS output enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " TXDMAEN ,Tx buffer DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " RXDMAEN ,Rx buffer DMA enable" "Disabled,Enabled"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "SPI_SR,SPI status register"
|
|
rbitfld.word 0x00 8. " FRE ,Frame format error" "No error,Error"
|
|
rbitfld.word 0x00 7. " BSY ,Busy flag" "Not busy,Busy/Tx buffer is not empty"
|
|
rbitfld.word 0x00 6. " OVR ,Overrun flag" "Not occurred,Occurred"
|
|
rbitfld.word 0x00 5. " MODF ,Mode fault" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 4. " CRCERR ,CRC error flag" "Matched,Not matched"
|
|
rbitfld.word 0x00 1. " TXE ,Transmit buffer empty" "Not empty,Empty"
|
|
rbitfld.word 0x00 0. " RXNE ,Receive buffer not empty" "Empty,Not empty"
|
|
elif (((per.w(ad:0x40003800+0x1C))&0x800)==0x800)
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "SPI_CR2,SPI control register 2"
|
|
bitfld.word 0x00 7. " TXEIE ,Tx buffer empty interrupt enable" "Masked,Not masked"
|
|
bitfld.word 0x00 6. " RXNEIE ,RX buffer not empty interrupt enable" "Masked,Not masked"
|
|
bitfld.word 0x00 5. " ERRIE ,Error interrupt enable" "Masked,Enabled"
|
|
bitfld.word 0x00 1. " TXDMAEN ,Tx buffer DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXDMAEN ,Rx buffer DMA enable" "Disabled,Enabled"
|
|
rgroup.word 0x08++0x1
|
|
line.word 0x00 "SPI_SR,SPI status register"
|
|
textline " "
|
|
bitfld.word 0x00 8. " FRE ,Frame format error" "No error,Error"
|
|
bitfld.word 0x00 7. " BSY ,Busy flag" "Not busy,Busy/Tx buffer is not empty"
|
|
bitfld.word 0x00 6. " OVR ,Overrun flag" "Not occurred,Occurred"
|
|
bitfld.word 0x00 3. " UDR ,Underrun flag" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CHSIDE ,Channel side" "Left,Right"
|
|
bitfld.word 0x00 1. " TXE ,Transmit buffer empty" "Not empty,Empty"
|
|
bitfld.word 0x00 0. " RXNE ,Receive buffer not empty" "Empty,Not empty"
|
|
endif
|
|
group.word 0x0C++0x1
|
|
line.word 0x00 "SPI_DR,SPI data register"
|
|
hexmask.word 0x00 0.--15. 0x01 " DR[15:0] ,Data register"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "SPI_CRCPR,SPI CRC polynomial register"
|
|
hexmask.word 0x00 0.--15. 0x01 " CRCPOLY[15:0] ,CRC polynomial register"
|
|
if (((per.w(ad:0x40003800+0x1C))&0x800)==0x000)
|
|
rgroup.word 0x14++0x1
|
|
line.word 0x00 "SPI_RXCRCR,SPI Rx CRC register"
|
|
hexmask.word 0x00 0.--15. 1. " RXCRC[15:0] ,Rx CRC register"
|
|
rgroup.word 0x18++0x1
|
|
line.word 0x00 "SPI_TXCRCR,SPI Tx CRC register"
|
|
hexmask.word 0x00 0.--15. 1. " TxCRC[15:0] ,Tx CRC register"
|
|
else
|
|
hgroup.word 0x14++0x1
|
|
hide.word 0x00 "SPI_RXCRCR,SPI Rx CRC register"
|
|
hgroup.word 0x18++0x1
|
|
hide.word 0x00 "SPI_TXCRCR,SPI Tx CRC register"
|
|
endif
|
|
if (((per.w(ad:0x40003800+0x1C))&0x800)==0x800)
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "SPI_I2SCFGR,SPI_I2S configuration register"
|
|
bitfld.word 0x00 11. " I2SMOD ,I2S mode selection" "SPI,I2S"
|
|
bitfld.word 0x00 10. " I2SE ,I2S enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8.--9. " I2SCFG ,I2S configuration mode" "Slave - transmit,Slave - receive,Master - transmit,Master - receive"
|
|
bitfld.word 0x00 7. " PCMSYNC ,PCM frame synchronization" "Short,Long"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " I2SSTD ,I2S standard selection" "Philips,MSB,LSB,PCM"
|
|
bitfld.word 0x00 3. " CKPOL ,Steady state clock polarity" "Low,High"
|
|
bitfld.word 0x00 1.--2. " DATLEN ,Data length to be transferred" "16-bit,24-bit,32-bit,"
|
|
bitfld.word 0x00 0. " CHLEN ,Channel length" "16-bit,32-bit"
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "SPI_I2SPR,SPI_I2S prescaler register"
|
|
bitfld.word 0x00 9. " MCKOE ,Master clock output enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " ODD ,Odd factor for the prescaler" "I2SDIV *2,I2SDIV * 2+1"
|
|
hexmask.word.byte 0x00 0.--7. 0x01 " I2SDIV ,I2S linear prescaler"
|
|
else
|
|
group.word 0x1C++0x1
|
|
line.word 0x00 "SPI_I2SCFGR,SPI_I2S configuration register"
|
|
bitfld.word 0x00 11. " I2SMOD ,I2S mode selection" "SPI,I2S"
|
|
hgroup.word 0x20++0x1
|
|
hide.word 0x00 "SPI_I2SPR,SPI_I2S prescaler register"
|
|
endif
|
|
width 12.
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
endif
|
|
sif ((cpuis("STM32L0?2*"))||(cpuis("STM32L0?3*")))
|
|
tree "USB (Universal Serial Bus)"
|
|
base ad:0x40005C00
|
|
width 12.
|
|
group.long 0x40++0x7
|
|
line.long 0x00 "USB_CNTR,USB control register"
|
|
bitfld.long 0x00 15. " CTRM ,Correct Transfer Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " PMAOVRM ,Packet Memory Area Over/Underrun Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ERRM ,Error Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " WKUPM ,Wake-up Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SUSPM ,Suspend mode Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RESETM ,USB Reset Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " SOFM ,Start Of Frame Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ESOFM ,Expected Start Of Frame Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " L1REQM ,LPM L1 state request interrupt mask" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " L1RESUME ,LPM L1 Resume request" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " RESUME ,Resume request" "No effect,Requested"
|
|
bitfld.long 0x00 3. " FSUSP ,Force suspend" "No effect,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LP_MODE ,Low-power mode" "No Low-power,Entered"
|
|
bitfld.long 0x00 1. " PDWN ,Power down" "Not powered down,Powered down"
|
|
bitfld.long 0x00 0. " FRES ,Force USB Reset" "Cleared,Reset"
|
|
line.long 0x04 "USB_ISTR,USB interrupt status register"
|
|
rbitfld.long 0x04 15. " CTR ,Correct Transfer" "No effect,Correct"
|
|
bitfld.long 0x04 14. " PMAOVR ,Packet Memory Area Over/Underrun" "No Over/Underrun,Over/Underrun"
|
|
bitfld.long 0x04 13. " ERR ,Error" "No error,Error"
|
|
bitfld.long 0x04 12. " WKUP ,Wakeup" "No wakeup,Wakeup"
|
|
textline " "
|
|
bitfld.long 0x04 11. " SUSP ,Suspend mode request" "Not requested,Requested"
|
|
bitfld.long 0x04 10. " RESET ,USB RESET request" "No reset,Reset"
|
|
bitfld.long 0x04 9. " SOF ,Start Of Frame" "No effect,Packet arrived"
|
|
bitfld.long 0x04 8. " ESOF ,Expected Start Of Frame" "No effect,Packet expected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " L1REQ ,LPM L1 state request" "Not requested,Requested"
|
|
rbitfld.long 0x04 4. " DIR ,Direction of transaction" "IN,OUT/2 pending transactions"
|
|
rbitfld.long 0x04 0.--3. " EP_ID ,Endpoint Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "USB_FNR,USB frame number register"
|
|
bitfld.long 0x00 15. " RXDP ,Receive Data + Line Status" "No data,Data"
|
|
bitfld.long 0x00 14. " RXDM ,Receive Data - Line Status" "No data,Data"
|
|
bitfld.long 0x00 13. " LCK ,Locked" "Unlocked,Locked"
|
|
bitfld.long 0x00 11.--12. " LSOF ,Lost SOF" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--10. 0x1 " FN ,Frame Number"
|
|
group.long 0x4C++0xB
|
|
line.long 0x00 "USB_DADDR,USB device address"
|
|
bitfld.long 0x00 7. " EF ,Enable Function" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 0x01 " ADD ,Device Address"
|
|
line.long 0x04 "USB_BTABLE,Buffer table address"
|
|
hexmask.long.word 0x04 3.--15. 0x8 " BTABLE ,Buffer Table"
|
|
line.long 0x08 "USB_LPMCSR,LPM control and status register"
|
|
rbitfld.long 0x08 4.--7. " BESL ,BESL value received with last ACKed LPM Token" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x08 3. " REMWAKE ,bRemoteWake value" "0,1"
|
|
bitfld.long 0x08 1. " LPMACK ,LPM Token acknowledge enable" "NYET,ACK"
|
|
bitfld.long 0x08 0. " LPMEN ,LPM support enable" "Disabled,Enabled"
|
|
group.word 0x58++0x01
|
|
line.word 0x00 "USB_BCDR,Battery Charging Detector"
|
|
bitfld.word 0x00 15. " DPPU ,DP pull-up control" "Disabled,Enabled"
|
|
rbitfld.word 0x00 7. " PS2DET ,DM pull-up detection status" "Normal port,PS2 port/Proprietary charger"
|
|
rbitfld.word 0x00 6. " SDET ,Secondary detection (SD) status" "CDP,DCP"
|
|
rbitfld.word 0x00 5. " PDET ,Primary detection (PD) status" "No BCD support,BCD support"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " DCDET ,Data contact detection" "Not detected,Detected"
|
|
bitfld.word 0x00 3. " SDEN ,Secondary detection (SD) mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " PDEN ,Primary detection (PD) mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " DCDEN ,Data contact detection (DCD) mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " BCDEN ,Battery charging detector" "Disabled,Enabled"
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "USB_EP0R,USB endpoint 0 register"
|
|
bitfld.long 0x00 15. " CTR_RX ,Correct Transfer for reception" "No action,Correct transfer"
|
|
bitfld.long 0x00 14. " DTOG_RX ,Data Toggle for reception transfers" "DATA0,DATA1"
|
|
bitfld.long 0x00 12.--13. " STAT_RX ,Status bits for reception transfers" "Disabled,Stall,Nak,Valid"
|
|
rbitfld.long 0x00 11. " SETUP ,Setup transaction completed" "No action,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " EP_TYPE ,Endpoint type" "Bulk,Control,Iso,Interrupt"
|
|
bitfld.long 0x00 8. " EP_KIND ,Endpoint Kind" "DBL_BUF,STATUS_OUT"
|
|
bitfld.long 0x00 7. " CTR_TX ,Correct Transfer for transmission" "No action,Completed"
|
|
bitfld.long 0x00 6. " DTOG_TX ,Data Toggle for transmission transfers" "DATA0,DATA1"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " STAT_TX ,Status bits for transmission transfers" "Disabled,Stall,Nak,Valid"
|
|
bitfld.long 0x00 0.--3. " EA ,Endpoint Address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "USB_EP1R,USB endpoint 1 register"
|
|
bitfld.long 0x00 15. " CTR_RX ,Correct Transfer for reception" "No action,Correct transfer"
|
|
bitfld.long 0x00 14. " DTOG_RX ,Data Toggle for reception transfers" "DATA0,DATA1"
|
|
bitfld.long 0x00 12.--13. " STAT_RX ,Status bits for reception transfers" "Disabled,Stall,Nak,Valid"
|
|
rbitfld.long 0x00 11. " SETUP ,Setup transaction completed" "No action,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " EP_TYPE ,Endpoint type" "Bulk,Control,Iso,Interrupt"
|
|
bitfld.long 0x00 8. " EP_KIND ,Endpoint Kind" "DBL_BUF,STATUS_OUT"
|
|
bitfld.long 0x00 7. " CTR_TX ,Correct Transfer for transmission" "No action,Completed"
|
|
bitfld.long 0x00 6. " DTOG_TX ,Data Toggle for transmission transfers" "DATA0,DATA1"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " STAT_TX ,Status bits for transmission transfers" "Disabled,Stall,Nak,Valid"
|
|
bitfld.long 0x00 0.--3. " EA ,Endpoint Address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "USB_EP2R,USB endpoint 2 register"
|
|
bitfld.long 0x00 15. " CTR_RX ,Correct Transfer for reception" "No action,Correct transfer"
|
|
bitfld.long 0x00 14. " DTOG_RX ,Data Toggle for reception transfers" "DATA0,DATA1"
|
|
bitfld.long 0x00 12.--13. " STAT_RX ,Status bits for reception transfers" "Disabled,Stall,Nak,Valid"
|
|
rbitfld.long 0x00 11. " SETUP ,Setup transaction completed" "No action,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " EP_TYPE ,Endpoint type" "Bulk,Control,Iso,Interrupt"
|
|
bitfld.long 0x00 8. " EP_KIND ,Endpoint Kind" "DBL_BUF,STATUS_OUT"
|
|
bitfld.long 0x00 7. " CTR_TX ,Correct Transfer for transmission" "No action,Completed"
|
|
bitfld.long 0x00 6. " DTOG_TX ,Data Toggle for transmission transfers" "DATA0,DATA1"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " STAT_TX ,Status bits for transmission transfers" "Disabled,Stall,Nak,Valid"
|
|
bitfld.long 0x00 0.--3. " EA ,Endpoint Address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "USB_EP3R,USB endpoint 3 register"
|
|
bitfld.long 0x00 15. " CTR_RX ,Correct Transfer for reception" "No action,Correct transfer"
|
|
bitfld.long 0x00 14. " DTOG_RX ,Data Toggle for reception transfers" "DATA0,DATA1"
|
|
bitfld.long 0x00 12.--13. " STAT_RX ,Status bits for reception transfers" "Disabled,Stall,Nak,Valid"
|
|
rbitfld.long 0x00 11. " SETUP ,Setup transaction completed" "No action,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " EP_TYPE ,Endpoint type" "Bulk,Control,Iso,Interrupt"
|
|
bitfld.long 0x00 8. " EP_KIND ,Endpoint Kind" "DBL_BUF,STATUS_OUT"
|
|
bitfld.long 0x00 7. " CTR_TX ,Correct Transfer for transmission" "No action,Completed"
|
|
bitfld.long 0x00 6. " DTOG_TX ,Data Toggle for transmission transfers" "DATA0,DATA1"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " STAT_TX ,Status bits for transmission transfers" "Disabled,Stall,Nak,Valid"
|
|
bitfld.long 0x00 0.--3. " EA ,Endpoint Address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "USB_EP4R,USB endpoint 4 register"
|
|
bitfld.long 0x00 15. " CTR_RX ,Correct Transfer for reception" "No action,Correct transfer"
|
|
bitfld.long 0x00 14. " DTOG_RX ,Data Toggle for reception transfers" "DATA0,DATA1"
|
|
bitfld.long 0x00 12.--13. " STAT_RX ,Status bits for reception transfers" "Disabled,Stall,Nak,Valid"
|
|
rbitfld.long 0x00 11. " SETUP ,Setup transaction completed" "No action,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " EP_TYPE ,Endpoint type" "Bulk,Control,Iso,Interrupt"
|
|
bitfld.long 0x00 8. " EP_KIND ,Endpoint Kind" "DBL_BUF,STATUS_OUT"
|
|
bitfld.long 0x00 7. " CTR_TX ,Correct Transfer for transmission" "No action,Completed"
|
|
bitfld.long 0x00 6. " DTOG_TX ,Data Toggle for transmission transfers" "DATA0,DATA1"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " STAT_TX ,Status bits for transmission transfers" "Disabled,Stall,Nak,Valid"
|
|
bitfld.long 0x00 0.--3. " EA ,Endpoint Address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "USB_EP5R,USB endpoint 5 register"
|
|
bitfld.long 0x00 15. " CTR_RX ,Correct Transfer for reception" "No action,Correct transfer"
|
|
bitfld.long 0x00 14. " DTOG_RX ,Data Toggle for reception transfers" "DATA0,DATA1"
|
|
bitfld.long 0x00 12.--13. " STAT_RX ,Status bits for reception transfers" "Disabled,Stall,Nak,Valid"
|
|
rbitfld.long 0x00 11. " SETUP ,Setup transaction completed" "No action,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " EP_TYPE ,Endpoint type" "Bulk,Control,Iso,Interrupt"
|
|
bitfld.long 0x00 8. " EP_KIND ,Endpoint Kind" "DBL_BUF,STATUS_OUT"
|
|
bitfld.long 0x00 7. " CTR_TX ,Correct Transfer for transmission" "No action,Completed"
|
|
bitfld.long 0x00 6. " DTOG_TX ,Data Toggle for transmission transfers" "DATA0,DATA1"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " STAT_TX ,Status bits for transmission transfers" "Disabled,Stall,Nak,Valid"
|
|
bitfld.long 0x00 0.--3. " EA ,Endpoint Address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "USB_EP6R,USB endpoint 6 register"
|
|
bitfld.long 0x00 15. " CTR_RX ,Correct Transfer for reception" "No action,Correct transfer"
|
|
bitfld.long 0x00 14. " DTOG_RX ,Data Toggle for reception transfers" "DATA0,DATA1"
|
|
bitfld.long 0x00 12.--13. " STAT_RX ,Status bits for reception transfers" "Disabled,Stall,Nak,Valid"
|
|
rbitfld.long 0x00 11. " SETUP ,Setup transaction completed" "No action,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " EP_TYPE ,Endpoint type" "Bulk,Control,Iso,Interrupt"
|
|
bitfld.long 0x00 8. " EP_KIND ,Endpoint Kind" "DBL_BUF,STATUS_OUT"
|
|
bitfld.long 0x00 7. " CTR_TX ,Correct Transfer for transmission" "No action,Completed"
|
|
bitfld.long 0x00 6. " DTOG_TX ,Data Toggle for transmission transfers" "DATA0,DATA1"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " STAT_TX ,Status bits for transmission transfers" "Disabled,Stall,Nak,Valid"
|
|
bitfld.long 0x00 0.--3. " EA ,Endpoint Address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "USB_EP7R,USB endpoint 7 register"
|
|
bitfld.long 0x00 15. " CTR_RX ,Correct Transfer for reception" "No action,Correct transfer"
|
|
bitfld.long 0x00 14. " DTOG_RX ,Data Toggle for reception transfers" "DATA0,DATA1"
|
|
bitfld.long 0x00 12.--13. " STAT_RX ,Status bits for reception transfers" "Disabled,Stall,Nak,Valid"
|
|
rbitfld.long 0x00 11. " SETUP ,Setup transaction completed" "No action,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " EP_TYPE ,Endpoint type" "Bulk,Control,Iso,Interrupt"
|
|
bitfld.long 0x00 8. " EP_KIND ,Endpoint Kind" "DBL_BUF,STATUS_OUT"
|
|
bitfld.long 0x00 7. " CTR_TX ,Correct Transfer for transmission" "No action,Completed"
|
|
bitfld.long 0x00 6. " DTOG_TX ,Data Toggle for transmission transfers" "DATA0,DATA1"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " STAT_TX ,Status bits for transmission transfers" "Disabled,Stall,Nak,Valid"
|
|
bitfld.long 0x00 0.--3. " EA ,Endpoint Address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 0xB
|
|
tree "USB Buffer descriptor table"
|
|
base ad:0x40006000
|
|
width 15.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "USB_ADDR0_TX,Transmission buffer address 0"
|
|
hexmask.word 0x00 1.--15. 0x2 " ADDR0_TX ,Transmission Buffer Address"
|
|
group.word 0x02++0x01
|
|
line.word 0x00 "USB_COUNT0_TX,Transmission byte count 0"
|
|
hexmask.word 0x00 0.--9. 0x1 " COUNT0_TX ,Transmission Byte Count"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "USB_ADDR0_RX,Reception buffer address 0"
|
|
hexmask.word 0x00 1.--15. 0x2 " ADDR0_RX ,Reception Buffer Address"
|
|
group.word 0x06++0x01
|
|
line.word 0x00 "USB_COUNT0_RX,Reception byte count 0"
|
|
bitfld.word 0x00 15. " BL_SIZE ,Block size" "2 byte,32 byte"
|
|
bitfld.word 0x00 10.--14. " NUM_BLOCK ,Number of blocks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--9. 0x1 " COUNT0_RX ,Reception Byte Count"
|
|
textline " "
|
|
group.word 0x8++0x01
|
|
line.word 0x00 "USB_ADDR1_TX,Transmission buffer address 1"
|
|
hexmask.word 0x00 1.--15. 0x2 " ADDR1_TX ,Transmission Buffer Address"
|
|
group.word (0x8+0x02)++0x01
|
|
line.word 0x00 "USB_COUNT1_TX,Transmission byte count 1"
|
|
hexmask.word 0x00 0.--9. 0x01 " COUNT1_TX_0 ,Transmission Byte Count 0"
|
|
group.word (0x8+0x04)++0x01
|
|
line.word 0x00 "USB_ADDR1_RX,Reception buffer address 1"
|
|
hexmask.word 0x00 1.--15. 0x2 " ADDR1_RX ,Reception Buffer Address"
|
|
group.word (0x8+0x06)++0x01
|
|
line.word 0x00 "USB_COUNT1_RX,Reception byte count 1"
|
|
bitfld.word 0x00 15. " BL_SIZE ,Block size 0" "2 byte,32 byte"
|
|
bitfld.word 0x00 10.--14. " NUM_BLOCK[4:0] ,Number of blocks 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--9. 0x01 " COUNT1_RX[9:0] ,Reception Byte Count"
|
|
textline " "
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "USB_ADDR2_TX,Transmission buffer address 2"
|
|
hexmask.word 0x00 1.--15. 0x2 " ADDR2_TX ,Transmission Buffer Address"
|
|
group.word (0x10+0x02)++0x01
|
|
line.word 0x00 "USB_COUNT2_TX,Transmission byte count 2"
|
|
hexmask.word 0x00 0.--9. 0x01 " COUNT2_TX_0 ,Transmission Byte Count 0"
|
|
group.word (0x10+0x04)++0x01
|
|
line.word 0x00 "USB_ADDR2_RX,Reception buffer address 2"
|
|
hexmask.word 0x00 1.--15. 0x2 " ADDR2_RX ,Reception Buffer Address"
|
|
group.word (0x10+0x06)++0x01
|
|
line.word 0x00 "USB_COUNT2_RX,Reception byte count 2"
|
|
bitfld.word 0x00 15. " BL_SIZE ,Block size 0" "2 byte,32 byte"
|
|
bitfld.word 0x00 10.--14. " NUM_BLOCK[4:0] ,Number of blocks 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--9. 0x01 " COUNT2_RX[9:0] ,Reception Byte Count"
|
|
textline " "
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "USB_ADDR3_TX,Transmission buffer address 3"
|
|
hexmask.word 0x00 1.--15. 0x2 " ADDR3_TX ,Transmission Buffer Address"
|
|
group.word (0x18+0x02)++0x01
|
|
line.word 0x00 "USB_COUNT3_TX,Transmission byte count 3"
|
|
hexmask.word 0x00 0.--9. 0x01 " COUNT3_TX_0 ,Transmission Byte Count 0"
|
|
group.word (0x18+0x04)++0x01
|
|
line.word 0x00 "USB_ADDR3_RX,Reception buffer address 3"
|
|
hexmask.word 0x00 1.--15. 0x2 " ADDR3_RX ,Reception Buffer Address"
|
|
group.word (0x18+0x06)++0x01
|
|
line.word 0x00 "USB_COUNT3_RX,Reception byte count 3"
|
|
bitfld.word 0x00 15. " BL_SIZE ,Block size 0" "2 byte,32 byte"
|
|
bitfld.word 0x00 10.--14. " NUM_BLOCK[4:0] ,Number of blocks 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--9. 0x01 " COUNT3_RX[9:0] ,Reception Byte Count"
|
|
textline " "
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "USB_ADDR4_TX,Transmission buffer address 4"
|
|
hexmask.word 0x00 1.--15. 0x2 " ADDR4_TX ,Transmission Buffer Address"
|
|
group.word (0x20+0x02)++0x01
|
|
line.word 0x00 "USB_COUNT4_TX,Transmission byte count 4"
|
|
hexmask.word 0x00 0.--9. 0x01 " COUNT4_TX_0 ,Transmission Byte Count 0"
|
|
group.word (0x20+0x04)++0x01
|
|
line.word 0x00 "USB_ADDR4_RX,Reception buffer address 4"
|
|
hexmask.word 0x00 1.--15. 0x2 " ADDR4_RX ,Reception Buffer Address"
|
|
group.word (0x20+0x06)++0x01
|
|
line.word 0x00 "USB_COUNT4_RX,Reception byte count 4"
|
|
bitfld.word 0x00 15. " BL_SIZE ,Block size 0" "2 byte,32 byte"
|
|
bitfld.word 0x00 10.--14. " NUM_BLOCK[4:0] ,Number of blocks 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--9. 0x01 " COUNT4_RX[9:0] ,Reception Byte Count"
|
|
textline " "
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "USB_ADDR5_TX,Transmission buffer address 5"
|
|
hexmask.word 0x00 1.--15. 0x2 " ADDR5_TX ,Transmission Buffer Address"
|
|
group.word (0x28+0x02)++0x01
|
|
line.word 0x00 "USB_COUNT5_TX,Transmission byte count 5"
|
|
hexmask.word 0x00 0.--9. 0x01 " COUNT5_TX_0 ,Transmission Byte Count 0"
|
|
group.word (0x28+0x04)++0x01
|
|
line.word 0x00 "USB_ADDR5_RX,Reception buffer address 5"
|
|
hexmask.word 0x00 1.--15. 0x2 " ADDR5_RX ,Reception Buffer Address"
|
|
group.word (0x28+0x06)++0x01
|
|
line.word 0x00 "USB_COUNT5_RX,Reception byte count 5"
|
|
bitfld.word 0x00 15. " BL_SIZE ,Block size 0" "2 byte,32 byte"
|
|
bitfld.word 0x00 10.--14. " NUM_BLOCK[4:0] ,Number of blocks 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--9. 0x01 " COUNT5_RX[9:0] ,Reception Byte Count"
|
|
textline " "
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "USB_ADDR6_TX,Transmission buffer address 6"
|
|
hexmask.word 0x00 1.--15. 0x2 " ADDR6_TX ,Transmission Buffer Address"
|
|
group.word (0x30+0x02)++0x01
|
|
line.word 0x00 "USB_COUNT6_TX,Transmission byte count 6"
|
|
hexmask.word 0x00 0.--9. 0x01 " COUNT6_TX_0 ,Transmission Byte Count 0"
|
|
group.word (0x30+0x04)++0x01
|
|
line.word 0x00 "USB_ADDR6_RX,Reception buffer address 6"
|
|
hexmask.word 0x00 1.--15. 0x2 " ADDR6_RX ,Reception Buffer Address"
|
|
group.word (0x30+0x06)++0x01
|
|
line.word 0x00 "USB_COUNT6_RX,Reception byte count 6"
|
|
bitfld.word 0x00 15. " BL_SIZE ,Block size 0" "2 byte,32 byte"
|
|
bitfld.word 0x00 10.--14. " NUM_BLOCK[4:0] ,Number of blocks 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--9. 0x01 " COUNT6_RX[9:0] ,Reception Byte Count"
|
|
textline " "
|
|
group.word 0x38++0x01
|
|
line.word 0x00 "USB_ADDR7_TX,Transmission buffer address 7"
|
|
hexmask.word 0x00 1.--15. 0x2 " ADDR7_TX ,Transmission Buffer Address"
|
|
group.word (0x38+0x02)++0x01
|
|
line.word 0x00 "USB_COUNT7_TX,Transmission byte count 7"
|
|
hexmask.word 0x00 0.--9. 0x01 " COUNT7_TX_0 ,Transmission Byte Count 0"
|
|
group.word (0x38+0x04)++0x01
|
|
line.word 0x00 "USB_ADDR7_RX,Reception buffer address 7"
|
|
hexmask.word 0x00 1.--15. 0x2 " ADDR7_RX ,Reception Buffer Address"
|
|
group.word (0x38+0x06)++0x01
|
|
line.word 0x00 "USB_COUNT7_RX,Reception byte count 7"
|
|
bitfld.word 0x00 15. " BL_SIZE ,Block size 0" "2 byte,32 byte"
|
|
bitfld.word 0x00 10.--14. " NUM_BLOCK[4:0] ,Number of blocks 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--9. 0x01 " COUNT7_RX[9:0] ,Reception Byte Count"
|
|
textline " "
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
endif
|
|
tree "DBG (Debug support)"
|
|
base ad:0x40015800
|
|
width 15.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "DBGMCU_IDCODE,MCU device ID code"
|
|
hexmask.long.word 0x00 16.--31. 0x1 " REV_ID ,Revision Identifier"
|
|
hexmask.long.word 0x00 0.--11. 0x1 " DEV_ID ,Device Identifier"
|
|
group.long 0x04++0xB
|
|
line.long 0x00 "DBGMCU_CR,Debug MCU configuration Register"
|
|
bitfld.long 0x00 2. " DBG_STANDBY ,Debug Standby mode" "FCLK=Off/HCLK=Off,FCLK=On/HCLK=On"
|
|
bitfld.long 0x00 1. " DBG_STOP ,Debug Stop Mode" "FCLK=Off/HCLK=Off,FCLK=On/HCLK=On"
|
|
bitfld.long 0x00 0. " DBG_SLEEP ,Debug Sleep Mode" "FCLK=On/HCLK=Off,FCLK=On/HCLK=On"
|
|
line.long 0x04 "DBGMCU_APB1_FZ,Debug MCU APB1 freeze register"
|
|
bitfld.long 0x04 31. " DBG_LPTIMER_STOP ,LPTIM1 counter stopped when core is halted" "Started,Stopped"
|
|
bitfld.long 0x04 22. " DBG_I2C2_STOP ,I2C2 SMBUS timeout mode stopped when core is halted" "Started,Stopped"
|
|
bitfld.long 0x04 21. " DBG_I2C1_STOP ,I2C1 SMBUS timeout mode stopped when core is halted" "Started,Stopped"
|
|
bitfld.long 0x04 12. " DBG_IWDG_STOP ,Debug independent watchdog stopped when core is halted" "Started,Stopped"
|
|
textline " "
|
|
bitfld.long 0x04 11. " DBG_WWDG_STOP ,Debug Window Wachdog stopped when Core is halted" "Started,Stopped"
|
|
bitfld.long 0x04 10. " DBG_RTC_STOP ,RTC stopped when Core is halted" "Started,Stopped"
|
|
bitfld.long 0x04 4. " DBG_TIM6_STOP ,TIM6 counter stopped when core is halted" "Started,Stopped"
|
|
bitfld.long 0x04 0. " DBG_TIM2_STOP ,TIM2 counter stopped when core is halted" "Started,Stopped"
|
|
line.long 0x08 "DBGMCU_APB2_FZ,Debug MCU APB2 freeze register"
|
|
bitfld.long 0x08 6. " DBG_TIM22_STOP ,TIM22 counter stopped when core is halted" "Started,Stopped"
|
|
bitfld.long 0x08 2. " DBG_TIM21_STOP ,TIM21 counter stopped when core is halted" "Started,Stopped"
|
|
width 0xB
|
|
tree.end
|
|
tree "Device electronic signature"
|
|
base ad:0x1FF80050
|
|
width 11.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "UID[31:0],Unique device ID register"
|
|
line.long 0x04 "UID[63:32],Unique device ID register"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "UID[95:64],Unique device ID register"
|
|
rgroup.word 0x2C++0x1
|
|
line.word 0x00 "FLASH_SIZE,Flash size data register"
|
|
width 0x0B
|
|
tree.end
|
|
textline " "
|