329 lines
9.9 KiB
Plaintext
329 lines
9.9 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: S3C2416 Specific Menu
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; @Props: Released
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; @Author: MAV
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; @Changelog: 2010-01-07 MAV
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; @Manufacturer: SAMSUNG - Samsung Semiconductor
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; @Core: ARM926EJ
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; @Chip: S3C2416
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; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: mens3c2416.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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menuitem "[:chip]ID Registers" "per , ""ARM Core Registers,ID Registers"""
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menuitem "[:chip]MMU Control and Configuration" "per , ""ARM Core Registers,MMU Control and Configuration"""
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menuitem "[:chip]Cache Control and Configuration" "per , ""ARM Core Registers,Cache Control and Configuration"""
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menuitem "[:chip]TCM Control and Configuration" "per , ""ARM Core Registers,TCM Control and Configuration"""
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menuitem "[:chip]Test and Debug" "per , ""ARM Core Registers,Test and Debug"""
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menuitem "[:chip]ICEbreaker" "per , ""ARM Core Registers,ICEbreaker"""
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separator
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menuitem "SYSCON" "per , ""SYSCON (System Controller)"""
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menuitem "MATRIX & EBI" "per , ""MATRIX & EBI"""
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popup "SMC"
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(
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menuitem "Bank 0" "per , ""SMC (Static Memory Controller),Bank 0"""
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menuitem "Bank 1" "per , ""SMC (Static Memory Controller),Bank 1"""
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menuitem "Bank 2" "per , ""SMC (Static Memory Controller),Bank 2"""
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menuitem "Bank 3" "per , ""SMC (Static Memory Controller),Bank 3"""
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menuitem "Bank 4" "per , ""SMC (Static Memory Controller),Bank 4"""
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menuitem "Bank 5" "per , ""SMC (Static Memory Controller),Bank 5"""
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menuitem "Control And Status" "per , ""SMC (Static Memory Controller),Control And Status"""
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)
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menuitem "DRAMC" "per , ""DRAMC (Mobile DRAM Controller)"""
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menuitem "NAND" "per , ""NAND Flash Controller"""
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popup "DMA"
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(
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menuitem "Channel 0" "per , ""DMA Controller,Channel 0"""
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menuitem "Channel 1" "per , ""DMA Controller,Channel 1"""
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menuitem "Channel 2" "per , ""DMA Controller,Channel 2"""
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menuitem "Channel 3" "per , ""DMA Controller,Channel 3"""
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menuitem "Channel 4" "per , ""DMA Controller,Channel 4"""
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menuitem "Channel 5" "per , ""DMA Controller,Channel 5"""
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)
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menuitem "INTC" "per , ""INTC (Interrupt Controller)"""
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popup "I/O Ports"
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(
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menuitem "Port A" "per , ""I/O Ports,Port A"""
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menuitem "Port B" "per , ""I/O Ports,Port B"""
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menuitem "Port C" "per , ""I/O Ports,Port C"""
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menuitem "Port D" "per , ""I/O Ports,Port D"""
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menuitem "Port E" "per , ""I/O Ports,Port E"""
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menuitem "Port F" "per , ""I/O Ports,Port F"""
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menuitem "Port G" "per , ""I/O Ports,Port G"""
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menuitem "Port H" "per , ""I/O Ports,Port H"""
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menuitem "Port K" "per , ""I/O Ports,Port K"""
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menuitem "Port L" "per , ""I/O Ports,Port L"""
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menuitem "Port M" "per , ""I/O Ports,Port M"""
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menuitem "Miscellaneous Registers" "per , ""I/O Ports,Miscellaneous Registers"""
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)
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menuitem "WDT" "per , ""WDT (Watchdog Timer)"""
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menuitem "PWM" "per , ""PWM (Pulse Width Modulation Timer)"""
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menuitem "RTC" "per , ""RTC (Real Time Clock)"""
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popup "UART"
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(
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menuitem "UART 0" "per , ""UART (Universal Asynchronous Receiver and Transmitter),UART 0"""
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menuitem "UART 1" "per , ""UART (Universal Asynchronous Receiver and Transmitter),UART 1"""
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menuitem "UART 2" "per , ""UART (Universal Asynchronous Receiver and Transmitter),UART 2"""
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menuitem "UART 3" "per , ""UART (Universal Asynchronous Receiver and Transmitter),UART 3"""
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)
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popup "USB"
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(
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menuitem "USBH" "per , ""USB (Universal Serial Bus),USB Host Controller"""
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menuitem "USBD" "per , ""USB (Universal Serial Bus),USB Device Controller"""
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)
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menuitem "IIC" "per , ""IIC (Inter-Intergrated Circuit)"""
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menuitem "2D" "per , ""2D (2D Graphics Accelerator)"""
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menuitem "HSSPI" "per , ""HSSPI (High Speed Serial Peripheral Interface)"""
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popup "HSMMC"
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(
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menuitem "HSMMC 0" "per , ""HSMMC (High-speed MMC),HSMMC 0"""
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menuitem "HSMMC 1" "per , ""HSMMC (High-speed MMC),HSMMC 1"""
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)
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menuitem "LCD" "per , ""LCD Controller"""
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menuitem "ADC" "per , ""ADC & Touch Screen Interface"""
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menuitem "IIS" "per , ""IIS Multi Audio Interface"""
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menuitem "AC97" "per , ""AC97 Controller"""
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menuitem "PCM" "per , ""PCM Audio Interface"""
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)
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)
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