173 lines
4.4 KiB
Plaintext
173 lines
4.4 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: Freescale QorIQ LS1088A RDB eMMC FLASH Programming Template
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; @Description:
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; eMMC FLASH is connected to eSDHC
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;
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; The RCW_SRC field (SDHC_BASE, 396 bits) should be 0y0
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; The RCW_SRC field (SDHC_EXT, 369-367 bits) also be 0y000
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;
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; Internal SRAM : 0x1800_0000
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; eSDHC base : 0x214_0000( Little Endian controller , not BE )
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;
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; @Author: jjeong
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; @Chip: LS1088A
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; @Keywords: Flash eMMC
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: ls1088-emmc.cmm 10516 2022-02-02 11:39:30Z bschroefel $
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LOCAL &arg1
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ENTRY &arg1
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&arg1=STRing.UPpeR("&arg1") // for example "PREPAREONLY"
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&MMC_BASE=0x2140000
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DO &pdd/hardware/ls108x/sbc-ls1088/sbc-ls1088_sieve_sram.cmm
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; fix-up core state - switch to EL3, endless loop @0x18000000, MMU-OFF
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Data.Assemble 0x18000000 b $-0x0
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Register.Set PC 0x18000000
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Register.Set M 0x5 ;EL1h
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GOSUB MMU_DISABLE
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; --------------------------------------------------------------------------------
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; Config SDHC
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; --------------------------------------------------------------------------------
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Data.Set A:&MMC_BASE+0x04 %Long 0x00010200 ; blk size,cnt
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Data.Set A:&MMC_BASE+0x28 %Long 0x08800020 ; bus width, endian
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Data.Set A:&MMC_BASE+0x2C %Long 0x008E8088 ; 400KHz clk
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Data.Set A:&MMC_BASE+0x34 %Long 0x007F0037 ; BRR,BWR, TCI, CCI interrupt enable
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Data.Set A:&MMC_BASE+0x38 %Long 0x007F0037 ; BRR,BWR, TCI, CCI interrupt enable
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Data.Set A:&MMC_BASE+0x44 %Long 0x00100010 ;read/write fifo threshold level 64bytes
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GOSUB READ_ID_TEST
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LOCAL &pdd
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&pdd=OS.PresentDemoDirectory()
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Break.RESet
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FLASHFILE.RESet
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;FLASHFILE.CONFIG <eMMC controller> <0x0> <0x0>
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FLASHFILE.CONFIG &MMC_BASE 0x0 0x0
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; FLASHFILE.TARGET <code_range> <data_range> <algorithm file>
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FLASHFILE.TARGET 0x18000000++0x2FFF 0x18003000++0x3FFF &pdd/flash/byte/emmc_ls1088.bin /KEEP /STACKSIZE 0x200
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Data.Set A:&MMC_BASE+0x2C %Long 0x008E4088 ; 400KHz clk
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FLASHFILE.GETID
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Data.Set A:0x2140000+0x2C %Long 0x008E0448 ; increase mmc clk around 10Mhz
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FLASHFILE.GETEXTCSD
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//End of the test prepareonly
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IF "&arg1"=="PREPAREONLY"
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ENDDO
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;FLASHFILE.SETEXTCSD 179. 0x8 ;access partition block 0
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;FLASHFILE.SETEXTCSD 179. 0x9 ;access partition block 1
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;FLASHFILE.SETEXTCSD 179. 0xA ;access partition block 2
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FLASHFILE.DUMP 0x0 ; Read Flash
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;FLASHFILE.ERASE 0x0--0xFFFFF ; Erase Flash
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;FLASHFILE.LOAD * 0x0 ; Write Flash
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ENDDO
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READ_ID_TEST:
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(
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//CMD0
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RePeaT 2.
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(
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Data.Set &MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status
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Data.Set &MMC_BASE+0x8 %Long 0x0 ;arg
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Data.Set &MMC_BASE+0xc %Long 0x0 ;cmd
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WAIT 100.ms
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)
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//CMD1
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RePeaT 10.
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(
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Data.Set &MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status
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Data.Set &MMC_BASE+0x8 %Long 0x40FF8080 ;arg
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Data.Set &MMC_BASE+0xc %Long 0x01020000 ;cmd1
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WAIT 100.ms
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&resp=Data.Long(A:(&MMC_BASE+0x10))
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print "CMD1 resp: 0x" &resp
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IF (&resp&0x80000000)==0x80000000
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(
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GOTO jump_cmd2
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)
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)
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PRINT "CMD1 fail"
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END
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jump_cmd2:
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//CMD2
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Data.Set &MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status
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Data.Set &MMC_BASE+0x8 %Long 0x0 ;arg
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Data.Set &MMC_BASE+0xc %Long 0x02010000 ;cmd2
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WAIT 10.ms
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//CMD3
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Data.Set &MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status
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Data.Set &MMC_BASE+0x8 %Long 0x00010000 ; arg, MMC RCA is (0x0001<<16.)
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Data.Set &MMC_BASE+0xc %Long 0x03020000 ;cmd3
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WAIT 10.ms
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//CMD10
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Data.Set &MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status
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Data.Set &MMC_BASE+0x8 %Long 0x00010000 ; arg, MMC RCA is (0x0001<<16.)
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Data.Set &MMC_BASE+0xc %Long 0x0A010000 ;cmd10
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WAIT 10.ms
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//Response2
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PRINT "CID register"
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PRINT "[127:104] 0x" Data.Long(A:(&MMC_BASE+0x1c))
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PRINT "[103:72] 0x" Data.Long(A:(&MMC_BASE+0x18))
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PRINT "[71:40] 0x" Data.Long(A:(&MMC_BASE+0x14))
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PRINT "[39:8] 0x" Data.Long(A:(&MMC_BASE+0x10))
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RETURN
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)
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MMU_DISABLE:
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(
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LOCAL &sctlr &cpsr &sctlrAddr
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&cpsr=Register(cpsr)
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IF (&cpsr&0x10)==0x10
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(
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PRINTS "MMU off not supported for AArch32 in this test scenario"
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ENDDO
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)
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ELSE IF (&cpsr&0x0C)==0xC // EL3h or EL3t
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&sctlrAddr=0x36100
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ELSE IF (&cpsr&0x0C)==0x8 // EL2h or EL2t
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&sctlrAddr=0x34100
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ELSE IF (&cpsr&0x0C)==0x4 // 0x5 ;EL1h or EL1t
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&sctlrAddr=0x30100
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ELSE
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(
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PRINTS "CPU mode unknown"
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ENDDO
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)
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&sctlr=Data.Quad(SPR:&sctlrAddr)
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&sctlr=&sctlr&0xFFFFFFFE
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Data.Set SPR:&sctlrAddr %Quad &sctlr
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RETURN
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)
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