409 lines
10 KiB
Plaintext
409 lines
10 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: M481 Specific Menu
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; @Props: Released
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; @Author: DAB
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; @Changelog: 2022-03-04 DAB
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; @Manufacturer: NUVOTON - Nuvoton Technology Corp.
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; @Core: Cortex-M4F
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; @Chip: M481LE8AE, M481LGCAE, M481LIDAE, M481SE8AE, M481SGCAE, M481SGCAE2A,
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; M481SIDAE, M481ZE8AE, M481ZGCAE, M481ZIDAE, M482KGCAE, M482KIDAE,
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; M482LE8AE, M482LGCAE, M482LIDAE, M482SE8AE, M482SGCAE, M482SIDAE,
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; M482ZE8AE, M482ZGCAE, M482ZIDAE, M483KGCAE, M483KGCAE2A, M483KIDAE,
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; M483SE8AE, M483SGCAE, M483SGCAE2A, M483SIDAE, M484KIDAE, M484SIDAE,
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; M484SIDAE2U, M485KIDAE, M485LIDAE, M485SIDAE, M487JIDAE, M487KIDAE,
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; M487KMCAN, M487SIDAE
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menm481.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-M4F)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M4F),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M4F),Memory Protection Unit"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M4F),Nested Vectored Interrupt Controller"""
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menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M4F),Floating-point Unit"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M4F),Debug,Core Debug"""
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menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M4F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M4F),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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separator
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menuitem "ACMP01" "per , ""ACMP"""
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menuitem "AHB" "per , ""AHB"""
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popup "BPWM"
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(
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menuitem "BPWM0" "per , ""BPWM,BPWM0"""
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menuitem "BPWM1" "per , ""BPWM,BPWM1"""
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)
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popup "CAN"
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(
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menuitem "CAN0" "per , ""CAN,CAN0"""
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menuitem "CAN1" "per , ""CAN,CAN1"""
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menuitem "CAN2" "per , ""CAN,CAN2"""
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)
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menuitem "CCAP" "per , ""CCAP"""
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menuitem "CLK" "per , ""CLK"""
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menuitem "CRC" "per , ""CRC"""
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menuitem "CRYPTO" "per , ""CRYPTO"""
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menuitem "DAC" "per , ""DAC"""
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popup "EADC"
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(
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menuitem "EADC0" "per , ""EADC,EADC0"""
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menuitem "EADC1" "per , ""EADC,EADC1"""
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)
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menuitem "EBI" "per , ""EBI"""
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popup "ECAP"
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(
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menuitem "ECAP0" "per , ""ECAP,ECAP0"""
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menuitem "ECAP1" "per , ""ECAP,ECAP1"""
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)
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menuitem "EMAC" "per , ""EMAC"""
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popup "EPWM"
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(
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menuitem "EPWM0" "per , ""EPWM,EPWM0"""
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menuitem "EPWM1" "per , ""EPWM,EPWM1"""
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)
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menuitem "FMC" "per , ""FMC"""
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menuitem "GPIO" "per , ""GPIO"""
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menuitem "HSOTG" "per , ""HSOTG"""
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popup "I2C"
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(
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menuitem "I2C0" "per , ""I2C,I2C0"""
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menuitem "I2C1" "per , ""I2C,I2C1"""
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menuitem "I2C2" "per , ""I2C,I2C2"""
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)
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menuitem "I2S" "per , ""I2S"""
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menuitem "NMI" "per , ""NMI"""
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menuitem "NVIC" "per , ""NVIC"""
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menuitem "OPA" "per , ""OPA"""
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menuitem "OTG" "per , ""OTG"""
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popup "PDMA"
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(
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menuitem "CURSCAT" "per , ""PDMA,CURSCAT"""
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menuitem "DSCT_CTL" "per , ""PDMA,DSCT_CTL"""
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menuitem "DSCT_DA" "per , ""PDMA,DSCT_DA"""
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menuitem "DSCT_NEXT" "per , ""PDMA,DSCT_NEXT"""
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menuitem "DSCT_SA" "per , ""PDMA,DSCT_SA"""
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menuitem "PDMA" "per , ""PDMA,PDMA"""
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)
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popup "QEI"
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(
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menuitem "QEI0" "per , ""QEI,QEI0"""
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menuitem "QEI1" "per , ""QEI,QEI1"""
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)
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popup "QSPI"
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(
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menuitem "QSPI0" "per , ""QSPI,QSPI0"""
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menuitem "QSPI1" "per , ""QSPI,QSPI1"""
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)
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menuitem "RTC" "per , ""RTC"""
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popup "SC"
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(
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menuitem "SC0" "per , ""SC,SC0"""
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menuitem "SC1" "per , ""SC,SC1"""
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menuitem "SC2" "per , ""SC,SC2"""
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)
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popup "SDH"
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(
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menuitem "SDH0" "per , ""SDH,SDH0"""
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menuitem "SDH1" "per , ""SDH,SDH1"""
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)
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popup "SPI"
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(
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menuitem "SPI0" "per , ""SPI,SPI0"""
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menuitem "SPI1" "per , ""SPI,SPI1"""
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menuitem "SPI2" "per , ""SPI,SPI2"""
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menuitem "SPI3" "per , ""SPI,SPI3"""
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)
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menuitem "SPIM" "per , ""SPIM"""
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menuitem "SYS" "per , ""SYS"""
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menuitem "SCS" "per , ""SYST_SCR"""
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popup "TIMER"
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(
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menuitem "TMR01" "per , ""TIMER,TMR01"""
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menuitem "TMR23" "per , ""TIMER,TMR23"""
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)
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menuitem "TRNG" "per , ""TRNG"""
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popup "UART"
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(
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menuitem "UART0" "per , ""UART,UART0"""
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menuitem "UART1" "per , ""UART,UART1"""
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menuitem "UART2" "per , ""UART,UART2"""
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menuitem "UART3" "per , ""UART,UART3"""
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menuitem "UART4" "per , ""UART,UART4"""
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menuitem "UART5" "per , ""UART,UART5"""
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menuitem "UART6" "per , ""UART,UART6"""
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menuitem "UART7" "per , ""UART,UART7"""
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)
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popup "USBD"
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(
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menuitem "HSUSBD" "per , ""USBD,HSUSBD"""
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menuitem "USBD" "per , ""USBD,USBD"""
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)
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popup "USBH"
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(
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menuitem "HSUSBH" "per , ""USBH,HSUSBH"""
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menuitem "USBH" "per , ""USBH,USBH"""
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)
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popup "USCII2C"
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(
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menuitem "UI2C0" "per , ""USCII2C,UI2C0"""
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menuitem "UI2C1" "per , ""USCII2C,UI2C1"""
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)
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popup "USCISPI"
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(
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menuitem "USPI0" "per , ""USCISPI,USPI0"""
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menuitem "USPI1" "per , ""USCISPI,USPI1"""
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)
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popup "USCIUART"
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(
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menuitem "UUART0" "per , ""USCIUART,UUART0"""
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menuitem "UUART1" "per , ""USCIUART,UUART1"""
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)
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menuitem "WDT" "per , ""WDT"""
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menuitem "WWDT" "per , ""WWDT"""
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)
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)
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