; -------------------------------------------------------------------------------- ; @Title: M481 Specific Menu ; @Props: Released ; @Author: DAB ; @Changelog: 2022-03-04 DAB ; @Manufacturer: NUVOTON - Nuvoton Technology Corp. ; @Core: Cortex-M4F ; @Chip: M481LE8AE, M481LGCAE, M481LIDAE, M481SE8AE, M481SGCAE, M481SGCAE2A, ; M481SIDAE, M481ZE8AE, M481ZGCAE, M481ZIDAE, M482KGCAE, M482KIDAE, ; M482LE8AE, M482LGCAE, M482LIDAE, M482SE8AE, M482SGCAE, M482SIDAE, ; M482ZE8AE, M482ZGCAE, M482ZIDAE, M483KGCAE, M483KGCAE2A, M483KIDAE, ; M483SE8AE, M483SGCAE, M483SGCAE2A, M483SIDAE, M484KIDAE, M484SIDAE, ; M484SIDAE2U, M485KIDAE, M485LIDAE, M485SIDAE, M487JIDAE, M487KIDAE, ; M487KMCAN, M487SIDAE ; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: menm481.men 16339 2023-07-03 13:30:14Z pegold $ add menu ( IF SOFTWARE.BUILD.BASE()>=69655. ( popup "&CPU" ( separator IF CPU.FEATURE(MMU) ( popup "[:mmu]MMU" ( menuitem "[:mmureg]MMU Control" "MMU.view" separator menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable" menuitem "[:mmu]MMU Table List" "MMU.List.PageTable" separator IF CPU.FEATURE(ITLBDUMP) ( menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB" ) IF CPU.FEATURE(DTLBDUMP) ( menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB" ) IF CPU.FEATURE(TLB0DUMP) ( menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0" ) IF CPU.FEATURE(TLB1DUMP) ( menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1" ) ) ) IF COMPonent.AVAILable("SMMU") ( popup "[:mmu]SMMU" ( menuitem "[:chip]SMMU1 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU1 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.StreamMapTable &(name) ) IF COMPonent.AVAILable("SMMU2") ( separator menuitem "[:chip]SMMU2 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU2 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU3") ( separator menuitem "[:chip]SMMU3 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU3 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU4") ( separator menuitem "[:chip]SMMU4 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU4 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU5") ( separator menuitem "[:chip]SMMU5 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU5 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU6") ( separator menuitem "[:chip]SMMU6 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU6 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.StreamMapTable &(name) ) ) ) ) IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE) ( popup "[:cache]Cache" ( IF CPU.FEATURE(L1ICACHEDUMP) ( menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC" menuitem "[:cache]ICACHE List" "CACHE.List IC" menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC" ) IF CPU.FEATURE(L1DCACHEDUMP) ( separator menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC" menuitem "[:cache]DCACHE List" "CACHE.List DC" menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC" ) IF CPU.FEATURE(L2CACHEDUMP) ( separator menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2" menuitem "[:cache]L2CACHE List" "CACHE.List L2" menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2" ) ) ) ) popup "&Trace" ( separator IF COMPonent.AVAILable("ITM") ( popup "ITM" ( default menuitem "[:oconfig]ITM settings..." "ITM.state" separator menuitem "[:alist]ITMTrace List" "ITMTrace.List" ) ) IF COMPonent.AVAILable("STM") ( popup "STM" ( default menuitem "[:oconfig]STM settings..." "STM.state" separator menuitem "[:alist]STMTrace List" "STMTrace.List" ) ) IF COMPonent.AVAILable("HTM") ( popup "HTM" ( default menuitem "[:oconfig]HTM settings..." "HTM.state" separator menuitem "[:alist]HTMTrace List" "HTMTrace.List" ) ) IF COMPonent.AVAILable("TPIU") ( menuitem "[:oconfig]TPIU settings..." "TPIU.state" ) IF COMPonent.AVAILable("ETR") ( menuitem "[:oconfig]ETR settings..." ( PRIVATE &pdd &pdd=OS.PDD() DO "&pdd/etc/embedded_trace_router/etr_utility.cmm" ) ) ) popup "&Misc" ( popup "Tools" ( IF CPUIS64BIT()||CPU.FEATURE("SPR") ( menuitem "ARM System Register Converter" ( DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm" ) ) IF CPU.FEATURE("C15") ( menuitem "ARM Coprocessor Converter" ( DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm" ) ) ) ) popup "&Perf" ( IF CPU.FEATURE(BMC) ( before "Reset" menuitem "[:bmc]Benchmark Counters" "BMC.state" before "Reset" separator ) ) ) popup "Peripherals" ( popup "[:chip]Core Registers (Cortex-M4F)" ( menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M4F),System Control""" menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M4F),Memory Protection Unit""" menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M4F),Nested Vectored Interrupt Controller""" menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M4F),Floating-point Unit""" popup "[:chip]Debug" ( menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M4F),Debug,Core Debug""" menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M4F),Debug,Flash Patch and Breakpoint Unit (FPB)""" menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M4F),Debug,Data Watchpoint and Trace Unit (DWT)""" ) ) separator menuitem "ACMP01" "per , ""ACMP""" menuitem "AHB" "per , ""AHB""" popup "BPWM" ( menuitem "BPWM0" "per , ""BPWM,BPWM0""" menuitem "BPWM1" "per , ""BPWM,BPWM1""" ) popup "CAN" ( menuitem "CAN0" "per , ""CAN,CAN0""" menuitem "CAN1" "per , ""CAN,CAN1""" menuitem "CAN2" "per , ""CAN,CAN2""" ) menuitem "CCAP" "per , ""CCAP""" menuitem "CLK" "per , ""CLK""" menuitem "CRC" "per , ""CRC""" menuitem "CRYPTO" "per , ""CRYPTO""" menuitem "DAC" "per , ""DAC""" popup "EADC" ( menuitem "EADC0" "per , ""EADC,EADC0""" menuitem "EADC1" "per , ""EADC,EADC1""" ) menuitem "EBI" "per , ""EBI""" popup "ECAP" ( menuitem "ECAP0" "per , ""ECAP,ECAP0""" menuitem "ECAP1" "per , ""ECAP,ECAP1""" ) menuitem "EMAC" "per , ""EMAC""" popup "EPWM" ( menuitem "EPWM0" "per , ""EPWM,EPWM0""" menuitem "EPWM1" "per , ""EPWM,EPWM1""" ) menuitem "FMC" "per , ""FMC""" menuitem "GPIO" "per , ""GPIO""" menuitem "HSOTG" "per , ""HSOTG""" popup "I2C" ( menuitem "I2C0" "per , ""I2C,I2C0""" menuitem "I2C1" "per , ""I2C,I2C1""" menuitem "I2C2" "per , ""I2C,I2C2""" ) menuitem "I2S" "per , ""I2S""" menuitem "NMI" "per , ""NMI""" menuitem "NVIC" "per , ""NVIC""" menuitem "OPA" "per , ""OPA""" menuitem "OTG" "per , ""OTG""" popup "PDMA" ( menuitem "CURSCAT" "per , ""PDMA,CURSCAT""" menuitem "DSCT_CTL" "per , ""PDMA,DSCT_CTL""" menuitem "DSCT_DA" "per , ""PDMA,DSCT_DA""" menuitem "DSCT_NEXT" "per , ""PDMA,DSCT_NEXT""" menuitem "DSCT_SA" "per , ""PDMA,DSCT_SA""" menuitem "PDMA" "per , ""PDMA,PDMA""" ) popup "QEI" ( menuitem "QEI0" "per , ""QEI,QEI0""" menuitem "QEI1" "per , ""QEI,QEI1""" ) popup "QSPI" ( menuitem "QSPI0" "per , ""QSPI,QSPI0""" menuitem "QSPI1" "per , ""QSPI,QSPI1""" ) menuitem "RTC" "per , ""RTC""" popup "SC" ( menuitem "SC0" "per , ""SC,SC0""" menuitem "SC1" "per , ""SC,SC1""" menuitem "SC2" "per , ""SC,SC2""" ) popup "SDH" ( menuitem "SDH0" "per , ""SDH,SDH0""" menuitem "SDH1" "per , ""SDH,SDH1""" ) popup "SPI" ( menuitem "SPI0" "per , ""SPI,SPI0""" menuitem "SPI1" "per , ""SPI,SPI1""" menuitem "SPI2" "per , ""SPI,SPI2""" menuitem "SPI3" "per , ""SPI,SPI3""" ) menuitem "SPIM" "per , ""SPIM""" menuitem "SYS" "per , ""SYS""" menuitem "SCS" "per , ""SYST_SCR""" popup "TIMER" ( menuitem "TMR01" "per , ""TIMER,TMR01""" menuitem "TMR23" "per , ""TIMER,TMR23""" ) menuitem "TRNG" "per , ""TRNG""" popup "UART" ( menuitem "UART0" "per , ""UART,UART0""" menuitem "UART1" "per , ""UART,UART1""" menuitem "UART2" "per , ""UART,UART2""" menuitem "UART3" "per , ""UART,UART3""" menuitem "UART4" "per , ""UART,UART4""" menuitem "UART5" "per , ""UART,UART5""" menuitem "UART6" "per , ""UART,UART6""" menuitem "UART7" "per , ""UART,UART7""" ) popup "USBD" ( menuitem "HSUSBD" "per , ""USBD,HSUSBD""" menuitem "USBD" "per , ""USBD,USBD""" ) popup "USBH" ( menuitem "HSUSBH" "per , ""USBH,HSUSBH""" menuitem "USBH" "per , ""USBH,USBH""" ) popup "USCII2C" ( menuitem "UI2C0" "per , ""USCII2C,UI2C0""" menuitem "UI2C1" "per , ""USCII2C,UI2C1""" ) popup "USCISPI" ( menuitem "USPI0" "per , ""USCISPI,USPI0""" menuitem "USPI1" "per , ""USCISPI,USPI1""" ) popup "USCIUART" ( menuitem "UUART0" "per , ""USCIUART,UUART0""" menuitem "UUART1" "per , ""USCIUART,UUART1""" ) menuitem "WDT" "per , ""WDT""" menuitem "WWDT" "per , ""WWDT""" ) )