303 lines
9.1 KiB
Plaintext
303 lines
9.1 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: TegraK1 Specific Menu
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; @Props: Released
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; @Author: LMH, MAJ, ZUO, TPP
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; @Changelog:
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; 2015-05-07 TPP
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; @Manufacturer: NVIDIA - NVIDIA Corporation
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; @Core: Cortex-A15MPCore
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; @Chip: TEGRAK1
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; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: mentegrak1.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-A15MPCore)"
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(
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menuitem "[:chip]ID Registers" "per , ""Core Registers (Cortex-A15MPCore),ID Registers"""
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menuitem "[:chip]System Control and Configuration" "per , ""Core Registers (Cortex-A15MPCore),System Control and Configuration"""
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menuitem "[:chip]Memory Management Unit" "per , ""Core Registers (Cortex-A15MPCore),Memory Management Unit"""
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menuitem "[:chip]Virtualization Extensions" "per , ""Core Registers (Cortex-A15MPCore),Virtualization Extensions"""
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menuitem "[:chip]Cache Control and Configuration" "per , ""Core Registers (Cortex-A15MPCore),Cache Control and Configuration"""
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menuitem "[:chip]System Performance Monitor" "per , ""Core Registers (Cortex-A15MPCore),System Performance Monitor"""
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menuitem "[:chip]System Timer Register" "per , ""Core Registers (Cortex-A15MPCore),System Timer Register"""
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separator
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menuitem "[:chip]Debug Registers" "per , ""Core Registers (Cortex-A15MPCore),Debug Registers"""
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menuitem "[:chip]Breakpoint Registers" "per , ""Core Registers (Cortex-A15MPCore),Breakpoint Registers"""
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menuitem "[:chip]Watchpoint Control Registers" "per , ""Core Registers (Cortex-A15MPCore),Watchpoint Control Registers"""
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menuitem "[:chip]vGIC 2.0" "per , ""Core Registers (Cortex-A15MPCore),vGIC 2.0 (Virtual Generic Interrupt Controller)"""
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)
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separator
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menuitem "Semaphores" "per , ""Semaphores"""
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menuitem "GPIO/PINMUX;GPIO Controller/Pin MUX" "per , ""GPIO Controller/Pin MUX"""
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menuitem "PMC;Power Management Controller" "per , ""Power Management Controller"""
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menuitem "RTC;Real-Time Clock" "per , ""RTC"""
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menuitem "HOST;Host Subsystem" "per , ""Host Subsystem"""
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menuitem "VIC;Video Image Compositor" "per , ""Video Image Compositor (VIC)"""
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menuitem "Flow Controller" "per , ""Flow Controller"""
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menuitem "MC;Memory Controller" "per , ""Memory Controller"""
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menuitem "AHB;AHB Controller" "per , ""AHB Controller"""
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menuitem "APB;APB Controller" "per , ""APB Controller"""
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menuitem "APBDMA;APB DMA Controller" "per , ""APB DMA Controller"""
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menuitem "USB;USB Complex" "per , ""USB"""
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menuitem "AHUB;Audio Hub" "per , ""Audio HUB"""
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menuitem "DISP;Display Controller" "per , ""Display Controller"""
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menuitem "MIPI-DSI;Display serial interference" "per , ""MIPI-DSI Display serial interference"""
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menuitem "HDMI;High-Definition Multimedia Interface" "per , ""High-Definition Multimedia Interface (HDMI)"""
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menuitem "LVDS/EDP;Display output" "per , ""LVDS/EDP Display output"""
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menuitem "HDMI CEC;HDMI Consumer Electronics Control" "per , ""HDMI Consumer Electronics Control (CEC)"""
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menuitem "MIPI-CSI;Camera serial interface" "per , ""MIPI-CSI Camera serial interface"""
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menuitem "MIPI D-PHY,Calibration for CSI and DSI" "per , ""MIPI D-PHY Calibration for CSI and DSI (MIPI_CAL)"""
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menuitem "VI;Video Input" "per , ""Video Input (VI)"""
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menuitem "SNOR;Sync-NOR Controller" "per , ""SNOR (GMI) Controller"""
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menuitem "SD/MMC;SD/MMC Controller" "per , ""SD/MMC Controller"""
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menuitem "SATA;Serial Advance Technology Attachment" "per , ""SATA Controller"""
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menuitem "PCI-E;PCI-Express Controller" "per , ""PCI-Express Controller (PCI-E)"""
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menuitem "I2C;I2C Controller" "per , ""I2C Controller"""
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menuitem "UART and VFIT;UART and VFIT Controller" "per , ""UART and VFIT Controller"""
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menuitem "SPI;Serial Peripheral Interface" "per , ""SPI Controller"""
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menuitem "PWM;Pulse Width Modulator" "per , ""PWM Controller"""
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menuitem "THERMAL;Thermal Sensor and Thermal Throttling" "per , ""Thermal Sensor and Thermal Throttling Controller (SOC_THERM)"""
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menuitem "AVP;Audio-Video Processor" "per , ""Audio-Video Processor (AVP)"""
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)
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)
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