; --------------------------------------------------------------------------------
; @Title: TegraK1 Specific Menu
; @Props: Released
; @Author: LMH, MAJ, ZUO, TPP
; @Changelog:
;   2015-05-07  TPP
; @Manufacturer: NVIDIA - NVIDIA Corporation
; @Core: Cortex-A15MPCore
; @Chip: TEGRAK1
; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: mentegrak1.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
popup "[:chip]Core Registers (Cortex-A15MPCore)"
(
menuitem "[:chip]ID Registers"                      "per , ""Core Registers (Cortex-A15MPCore),ID Registers"""
menuitem "[:chip]System Control and Configuration"  "per , ""Core Registers (Cortex-A15MPCore),System Control and Configuration"""
menuitem "[:chip]Memory Management Unit"            "per , ""Core Registers (Cortex-A15MPCore),Memory Management Unit"""
menuitem "[:chip]Virtualization Extensions"         "per , ""Core Registers (Cortex-A15MPCore),Virtualization Extensions"""
menuitem "[:chip]Cache Control and Configuration"   "per , ""Core Registers (Cortex-A15MPCore),Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor"        "per , ""Core Registers (Cortex-A15MPCore),System Performance Monitor"""
menuitem "[:chip]System Timer Register"             "per , ""Core Registers (Cortex-A15MPCore),System Timer Register"""
separator
menuitem "[:chip]Debug Registers"                   "per , ""Core Registers (Cortex-A15MPCore),Debug Registers"""
menuitem "[:chip]Breakpoint Registers"              "per , ""Core Registers (Cortex-A15MPCore),Breakpoint Registers"""
menuitem "[:chip]Watchpoint Control Registers"      "per , ""Core Registers (Cortex-A15MPCore),Watchpoint Control Registers"""
menuitem "[:chip]vGIC 2.0"                          "per , ""Core Registers (Cortex-A15MPCore),vGIC 2.0 (Virtual Generic Interrupt Controller)"""
)
separator
menuitem "Semaphores"                                       "per , ""Semaphores"""
menuitem "GPIO/PINMUX;GPIO Controller/Pin MUX"              "per , ""GPIO Controller/Pin MUX"""
menuitem "PMC;Power Management Controller"                  "per , ""Power Management Controller"""
menuitem "RTC;Real-Time Clock"                              "per , ""RTC"""
menuitem "HOST;Host Subsystem"                              "per , ""Host Subsystem"""
menuitem "VIC;Video Image Compositor"                       "per , ""Video Image Compositor (VIC)"""
menuitem "Flow Controller"                                  "per , ""Flow Controller"""
menuitem "MC;Memory Controller"                             "per , ""Memory Controller"""
menuitem "AHB;AHB Controller"                               "per , ""AHB Controller"""
menuitem "APB;APB Controller"                               "per , ""APB Controller"""
menuitem "APBDMA;APB DMA Controller"                        "per , ""APB DMA Controller"""
menuitem "USB;USB Complex"                                  "per , ""USB"""
menuitem "AHUB;Audio Hub"                                   "per , ""Audio HUB"""
menuitem "DISP;Display Controller"                          "per , ""Display Controller"""
menuitem "MIPI-DSI;Display serial interference"             "per , ""MIPI-DSI Display serial interference"""
menuitem "HDMI;High-Definition Multimedia Interface"        "per , ""High-Definition Multimedia Interface (HDMI)"""
menuitem "LVDS/EDP;Display output"                          "per , ""LVDS/EDP Display output"""
menuitem "HDMI CEC;HDMI Consumer Electronics Control"       "per , ""HDMI Consumer Electronics Control (CEC)"""
menuitem "MIPI-CSI;Camera serial interface"                 "per , ""MIPI-CSI Camera serial interface"""
menuitem "MIPI D-PHY,Calibration for CSI and DSI"           "per , ""MIPI D-PHY Calibration for CSI and DSI (MIPI_CAL)"""
menuitem "VI;Video Input"                                   "per , ""Video Input (VI)"""
menuitem "SNOR;Sync-NOR Controller"                         "per , ""SNOR (GMI) Controller"""
menuitem "SD/MMC;SD/MMC Controller"                         "per , ""SD/MMC Controller"""
menuitem "SATA;Serial Advance Technology Attachment"        "per , ""SATA Controller"""
menuitem "PCI-E;PCI-Express Controller"                     "per , ""PCI-Express Controller (PCI-E)"""
menuitem "I2C;I2C Controller"                               "per , ""I2C Controller"""
menuitem "UART and VFIT;UART and VFIT Controller"           "per , ""UART and VFIT Controller"""
menuitem "SPI;Serial Peripheral Interface"                  "per , ""SPI Controller"""
menuitem "PWM;Pulse Width Modulator"                        "per , ""PWM Controller"""
menuitem "THERMAL;Thermal Sensor and Thermal Throttling"    "per , ""Thermal Sensor and Thermal Throttling Controller (SOC_THERM)"""
menuitem "AVP;Audio-Video Processor"                        "per , ""Audio-Video Processor (AVP)"""
)
)