465 lines
21 KiB
Plaintext
465 lines
21 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: LPC55Sxx Specific Menu
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; @Props: Released
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; @Author: JAM, RSA, KRZ
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; @Changelog: 2019-05-27 JAM
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; 2022-02-18 RSA
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; 2023-01-31 KRZ
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; @Manufacturer: NXP - NXP Semiconductors
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; @Core: Cortex-M33 / Cortex-M33F
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; @Chip: LPC55S04JBD64, LPC55S04JHI48, LPC55S06JBD64, LPC55S06JHI48,
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; LPC55S14JBD100, LPC55S14JBD64, LPC55S16JBD100, LPC55S16JBD64,
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; LPC55S16JEV98, LPC55S26JBD100, LPC55S26JBD64, LPC55S26JEV98,
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; LPC55S28JBD100, LPC55S28JBD64, LPC55S28JEV98, LPC55S66JBD100-CPU0,
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; LPC55S66JBD100-CPU1, LPC55S66JBD64-CPU0, LPC55S66JBD64-CPU1,
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; LPC55S66JEV98-CPU0, LPC55S66JEV98-CPU1, LPC55S69JBD100-CPU0,
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; LPC55S69JBD100-CPU1, LPC55S69JBD64-CPU0, LPC55S69JBD64-CPU1,
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; LPC55S69JEV98-CPU0, LPC55S69JEV98-CPU1
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; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menlpc55sxx.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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if (CORENAME()=="CORTEXM33F")
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(
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popup "[:chip]Core Registers (Cortex-M33F)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M33F),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M33F),Memory Protection Unit (MPU)"""
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menuitem "[:chip]SAU;Security Attribution Unit" "per , ""Core Registers (Cortex-M33F),Security Attribution Unit (SAU)"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M33F),Nested Vectored Interrupt Controller (NVIC)"""
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menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M33F),Floating-point Unit (FPU)"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M33F),Debug,Core Debug"""
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menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M33F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M33F),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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)
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else if (CORENAME()=="CORTEXM33")
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(
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popup "[:chip]Core Registers (Cortex-M33)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M33),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M33),Memory Protection Unit (MPU)"""
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menuitem "[:chip]SAU;Security Attribution Unit" "per , ""Core Registers (Cortex-M33),Security Attribution Unit (SAU)"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M33),Nested Vectored Interrupt Controller (NVIC)"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M33),Debug,Core Debug"""
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menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M33),Debug,Flash Patch and Breakpoint Unit (FPB)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M33),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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)
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separator
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menuitem "ADC;Analog-to-Digital Converter" "per , ""ADC (Analog-to-Digital Converter)"""
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menuitem "AHB_SECURE_CTRL;AHB Secure Controller" "per , ""AHB_SECURE_CTRL (AHB Secure Controller)"""
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menuitem "ANACTRL;ANALOGCTRL" "per , ""ANACTRL (ANALOGCTRL)"""
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if (cpuis("LPC55S16*")||cpuis("LPC55S04*")||cpuis("LPC55S06*")||cpuis("LPC55S14*"))
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(
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menuitem "CAN;Controller Area Network Flexible Data" "per , ""CAN (Controller Area Network Flexible Data),CAN"""
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)
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menuitem "CASPER" "per , ""CASPER"""
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if (cpuis("LPC55S16*")||cpuis("LPC55S04*")||cpuis("LPC55S06*")||cpuis("LPC55S14*"))
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(
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menuitem "CDOG" "per , ""CDOG,CDOG"""
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)
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menuitem "CRC_ENGINE;CRC engine" "per , ""CRC (CRC engine)"""
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popup "CTIMER;Standard counter/timers"
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(
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menuitem "CTIMER0" "per , ""CTIMER (Standard counter/timers),CTIMER0"""
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menuitem "CTIMER1" "per , ""CTIMER (Standard counter/timers),CTIMER1"""
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menuitem "CTIMER2" "per , ""CTIMER (Standard counter/timers),CTIMER2"""
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menuitem "CTIMER3" "per , ""CTIMER (Standard counter/timers),CTIMER3"""
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menuitem "CTIMER4" "per , ""CTIMER (Standard counter/timers),CTIMER4"""
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)
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menuitem "DBGMAILBOX;MCU Debugger Mailbox" "per , ""DBGMAILBOX (MCU Debugger Mailbox)"""
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popup "DMA;DMA controller"
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(
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menuitem "DMA0" "per , ""DMA (DMA controller),DMA0"""
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menuitem "DMA1" "per , ""DMA (DMA controller),DMA1"""
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)
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menuitem "FLASH" "per , ""FLASH"""
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popup "FLASH_CFPA"
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(
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menuitem "FLASH_CFPA0" "per , ""FLASH_CFPA,FLASH_CFPA0"""
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menuitem "FLASH_CFPA1" "per , ""FLASH_CFPA,FLASH_CFPA1"""
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menuitem "FLASH_CFPA_SCRATCH" "per , ""FLASH_CFPA,FLASH_CFPA_SCRATCH"""
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)
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menuitem "FLASH_CMPA" "per , ""FLASH_CMPA,FLASH_CMPA"""
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menuitem "FLASH_KEY_STORE" "per , ""FLASH_KEY_STORE,FLASH_KEY_STORE"""
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if (cpuis("LPC55S16*")||cpuis("LPC55S04*")||cpuis("LPC55S06*")||cpuis("LPC55S14*"))
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(
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menuitem "FLASH_NMPA" "per , ""FLASH_NMPA,FLASH_NMPA"""
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menuitem "FLASH_ROMPATCH" "per , ""FLASH_ROMPATCH,FLASH_ROMPATCH"""
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)
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popup "FLEXCOMM;Flexcomm serial communication"
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(
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menuitem "FLEXCOMM0" "per , ""FLEXCOMM (Flexcomm serial communication),FLEXCOMM0"""
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menuitem "FLEXCOMM1" "per , ""FLEXCOMM (Flexcomm serial communication),FLEXCOMM1"""
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menuitem "FLEXCOMM2" "per , ""FLEXCOMM (Flexcomm serial communication),FLEXCOMM2"""
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menuitem "FLEXCOMM3" "per , ""FLEXCOMM (Flexcomm serial communication),FLEXCOMM3"""
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menuitem "FLEXCOMM4" "per , ""FLEXCOMM (Flexcomm serial communication),FLEXCOMM4"""
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menuitem "FLEXCOMM5" "per , ""FLEXCOMM (Flexcomm serial communication),FLEXCOMM5"""
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menuitem "FLEXCOMM6" "per , ""FLEXCOMM (Flexcomm serial communication),FLEXCOMM6"""
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menuitem "FLEXCOMM7" "per , ""FLEXCOMM (Flexcomm serial communication),FLEXCOMM7"""
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menuitem "FLEXCOMM8" "per , ""FLEXCOMM (Flexcomm serial communication),FLEXCOMM8"""
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)
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popup "GINT;Group GPIO input interrupt (GINT0/1)"
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(
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menuitem "GINT0" "per , ""GINT (Group GPIO input interrupt (GINT0/1)),GINT0"""
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menuitem "GINT1" "per , ""GINT (Group GPIO input interrupt (GINT0/1)),GINT1"""
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)
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popup "GPIO;General Purpose I/O Ports And Peripheral I/O Lines"
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(
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menuitem "GPIO" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIO"""
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menuitem "SECGPIO" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),SECGPIO"""
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)
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menuitem "HASHCRYPT;Hash-Crypt peripheral" "per , ""HASHCRYPT (Hash-Crypt peripheral)"""
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popup "I2C;Inter-Integrated Circuit"
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(
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menuitem "I2C0" "per , ""I2C (Inter-Integrated Circuit),I2C0"""
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menuitem "I2C1" "per , ""I2C (Inter-Integrated Circuit),I2C1"""
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menuitem "I2C2" "per , ""I2C (Inter-Integrated Circuit),I2C2"""
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menuitem "I2C3" "per , ""I2C (Inter-Integrated Circuit),I2C3"""
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menuitem "I2C4" "per , ""I2C (Inter-Integrated Circuit),I2C4"""
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menuitem "I2C5" "per , ""I2C (Inter-Integrated Circuit),I2C5"""
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menuitem "I2C6" "per , ""I2C (Inter-Integrated Circuit),I2C6"""
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menuitem "I2C7" "per , ""I2C (Inter-Integrated Circuit),I2C7"""
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)
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popup "I2S;Inter-Integrated Sound Bus Controller"
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(
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menuitem "I2S0" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S0"""
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menuitem "I2S1" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S1"""
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menuitem "I2S2" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S2"""
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menuitem "I2S3" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S3"""
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menuitem "I2S4" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S4"""
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menuitem "I2S5" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S5"""
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menuitem "I2S6" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S6"""
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menuitem "I2S7" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S7"""
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)
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menuitem "INPUTMUX;Input multiplexing" "per , ""INPUTMUX (Input multiplexing)"""
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menuitem "IOCON;I/O pin configuration" "per , ""IOCON (I/O pin configuration)"""
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if (cpuis("LPC55S66*")||cpuis("LPC55S69*"))
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(
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menuitem "MAILBOX;Mailbox" "per , ""MAILBOX (Mailbox),MAILBOX"""
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)
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if (cpuis("LPC55S16*")||cpuis("LPC55S04*")||cpuis("LPC55S06*")||cpuis("LPC55S14*"))
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(
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menuitem "MPU;Memory Protection Unit" "per , ""MPU (Memory Protection Unit),MPU"""
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)
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menuitem "MRT;Multi-Rate Timer" "per , ""MRT (Multi-Rate Timer)"""
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menuitem "NVIC;no description available" "per , ""NVIC"""
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menuitem "OSTIMER;Synchronous OS/Event timer with Wakeup Timer" "per , ""OSTIMER (Synchronous OS/Event timer with Wakeup Timer)"""
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popup "PINT;Pin interrupt and pattern match"
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(
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menuitem "PINT" "per , ""PINT (Pin interrupt and pattern match),PINT"""
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menuitem "SECPINT" "per , ""PINT (Pin interrupt and pattern match),SECPINT"""
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)
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menuitem "PLU;LPC80X Programmable Logic Unit" "per , ""PLU (LPC80X Programmable Logic Unit)"""
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menuitem "PMC" "per , ""PMC"""
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if (cpuis("LPC55S66*")||cpuis("LPC55S69*"))
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(
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menuitem "POWERQUAD;Digital Signal Co-Processing companion to a.." "per , ""POWERQUAD (Digital Signal Co-Processing companion to a Cortex-M v8M CPU core),POWERQUAD"""
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)
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menuitem "PRINCE" "per , ""PRINCE"""
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menuitem "PUF;PUFCTRL" "per , ""PUF (PUFCTRL)"""
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if (cpuis("LPC55S16*")||cpuis("LPC55S04*")||cpuis("LPC55S06*")||cpuis("LPC55S14*"))
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(
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menuitem "PUF_SRAM_CTRL;PUF SRAM Control" "per , ""PUF_SRAM_CTRL (PUF SRAM Control),PUF_SRAM_CTRL"""
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)
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|
menuitem "RNG" "per , ""RNG (Random Number Generator)"""
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menuitem "RTC;Real-Time Clock (RTC)" "per , ""RTC (Real-time Counter)"""
|
|
menuitem "SAU" "per , ""SAU"""
|
|
menuitem "SCB" "per , ""SCB"""
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|
menuitem "SCNSCB" "per , ""SCNSCB"""
|
|
menuitem "SCT0;SCTimer/PWM" "per , ""SCT (SCTimer/PWM)"""
|
|
if (cpuis("LPC55S26*")||cpuis("LPC55S28*")||cpuis("LPC55S66*")||cpuis("LPC55S69*"))
|
|
(
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|
menuitem "SDIF;SDMMC" "per , ""SDIF (SDMMC),SDIF"""
|
|
)
|
|
popup "SPI;Serial Peripheral Interfaces"
|
|
(
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|
menuitem "SPI0" "per , ""SPI (Serial Peripheral Interfaces),SPI0"""
|
|
menuitem "SPI1" "per , ""SPI (Serial Peripheral Interfaces),SPI1"""
|
|
if (cpuis("LPC55S14*")||cpuis("LPC55S16*")||cpuis("LPC55S26*")||cpuis("LPC55S28*")||cpuis("LPC55S66*")||cpuis("LPC55S69*"))
|
|
(
|
|
menuitem "SPI2" "per , ""SPI (Serial Peripheral Interfaces),SPI2"""
|
|
)
|
|
menuitem "SPI3" "per , ""SPI (Serial Peripheral Interfaces),SPI3"""
|
|
menuitem "SPI4" "per , ""SPI (Serial Peripheral Interfaces),SPI4"""
|
|
if (cpuis("LPC55S14*")||cpuis("LPC55S16*")||cpuis("LPC55S26*")||cpuis("LPC55S28*")||cpuis("LPC55S66*")||cpuis("LPC55S69*"))
|
|
(
|
|
menuitem "SPI5" "per , ""SPI (Serial Peripheral Interfaces),SPI5"""
|
|
)
|
|
menuitem "SPI6" "per , ""SPI (Serial Peripheral Interfaces),SPI6"""
|
|
menuitem "SPI7" "per , ""SPI (Serial Peripheral Interfaces),SPI7"""
|
|
menuitem "SPI8" "per , ""SPI (Serial Peripheral Interfaces),SPI8"""
|
|
)
|
|
menuitem "SYSCON" "per , ""SYSCON"""
|
|
menuitem "SYSCTL;System Controller" "per , ""SYSCTL (System Controller)"""
|
|
popup "USART;USARTs"
|
|
(
|
|
menuitem "USART0" "per , ""USART (USARTs),USART0"""
|
|
menuitem "USART1" "per , ""USART (USARTs),USART1"""
|
|
menuitem "USART2" "per , ""USART (USARTs),USART2"""
|
|
menuitem "USART3" "per , ""USART (USARTs),USART3"""
|
|
menuitem "USART4" "per , ""USART (USARTs),USART4"""
|
|
menuitem "USART5" "per , ""USART (USARTs),USART5"""
|
|
menuitem "USART6" "per , ""USART (USARTs),USART6"""
|
|
menuitem "USART7" "per , ""USART (USARTs),USART7"""
|
|
)
|
|
if (cpuis("LPC55S16*")||cpuis("LPC55S14*")||cpuis("LPC55S26*")||cpuis("LPC55S28*")||cpuis("LPC55S66*")||cpuis("LPC55S69*"))
|
|
(
|
|
menuitem "USB0;USB 2.0 Device Controller" "per , ""USB (Universal Serial Bus),USB0"""
|
|
menuitem "USBFSH;USB0 Full-speed Host controller" "per , ""USBFSH (USB0 Full-speed Host controller),USBFSH"""
|
|
menuitem "USBHSD;USB1 High-speed Device Controller" "per , ""USBHSD (USB1 High-speed Device Controller),USBHSD"""
|
|
menuitem "USBHSH;USB1 High-speed Host Controller" "per , ""USBHSH (USB1 High-speed Host Controller),USBHSH"""
|
|
menuitem "USBPHY;Universal System Bus Physical Layer" "per , ""USBPHY (Universal System Bus Physical Layer),USBPHY"""
|
|
)
|
|
menuitem "UTICK0;Micro-tick Timer" "per , ""UTICK (Micro-tick Timer)"""
|
|
menuitem "WWDT;Windowed Watchdog Timer" "per , ""WWDT (Windowed Watchdog Timer)"""
|
|
)
|
|
)
|