356 lines
12 KiB
Plaintext
356 lines
12 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: Kinetis K0x Specific Menu
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; @Props: Released
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; @Author: ADP, PBU, DPR, PCC
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; @Changelog: 2015-11-16 ADP
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; 2018-01-18 DPR
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; @Manufacturer: NXP
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; @Core: Cortex-M4
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; @Chip: MK02FN128VFM10, MK02FN128VLF10, MK02FN128VLH10, MK02FN64VFM10,
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; MK02FN64VLF10, MK02FN64VLH10
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; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menk00.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-M4F)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M4F),System Control"""
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menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M4F),Memory Protection Unit"""
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menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M4F),Nested Vectored Interrupt Controller"""
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menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M4F),Floating-point Unit"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M4F),Debug,Core Debug"""
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menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M4F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M4F),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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separator
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popup "Ports"
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(
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menuitem "PORT A" "per , ""PORT (Pin control and interrupts),PORT A"""
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menuitem "PORT B" "per , ""PORT (Pin control and interrupts),PORT B"""
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menuitem "PORT C" "per , ""PORT (Pin control and interrupts),PORT C"""
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menuitem "PORT D" "per , ""PORT (Pin control and interrupts),PORT D"""
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menuitem "PORT E" "per , ""PORT (Pin control and interrupts),PORT E"""
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)
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popup "System Modules"
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(
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menuitem "SIM;System Integration Module" "per , ""System Modules,SIM (System Integration Module)"""
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menuitem "RCM;Reset Control Module" "per , ""System Modules,RCM (Reset Control Module)"""
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menuitem "SMC;System Mode Controller" "per , ""System Modules,SMC (System Mode Controller)"""
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menuitem "PMC;Power Management Controller" "per , ""System Modules,PMC (Power Management Controller)"""
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menuitem "LLWU;Low-Leakage Wake-up Unit" "per , ""System Modules,LLWU (Low-Leakage Wake-up Unit)"""
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menuitem "MCM;Miscellaneous Control Module" "per , ""System Modules,MCM (Miscellaneous Control Module)"""
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menuitem "DMAMUX;Direct Memory Access Multiplexer" "per , ""System Modules,DMAMUX (Direct Memory Access Multiplexer)"""
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menuitem "eDMA;Enhanced Direct Memory Access" "per , ""System Modules,eDMA (Enhanced Direct Memory Access)"""
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menuitem "EWM;External Watchdog Monitor" "per , ""System Modules,EWM (External Watchdog Monitor)"""
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menuitem "WDOG;Watchdog Timer" "per , ""System Modules,WDOG (Watchdog Timer)"""
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)
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popup "Clock Modules"
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(
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menuitem "MCG;Multipurpose Clock Generator" "per , ""Clock Modules,MCG (Multipurpose Clock Generator)"""
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menuitem "OSC;Oscillator" "per , ""Clock Modules,OSC (Oscillator)"""
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)
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popup "Memories and Memory Interfaces"
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(
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menuitem "FMC;Flash Memory Controller" "per , ""Memories and Memory Interfaces,FMC (Flash Memory Controller)"""
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menuitem "FTFA;Flash Memory Module" "per , ""Memories and Memory Interfaces,FTFA (Flash Memory Module)"""
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)
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popup "Security and Integrity Modules"
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(
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menuitem "CRC;Cyclic Redundancy Check" "per , ""Security and integrity modules,CRC (Cyclic Redundancy Check)"""
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)
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popup "Analog Modules"
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(
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menuitem "ADC;Analog-to-Digital Converter" "per , ""Analog Modules,ADC (Analog-to-Digital Converter),ADC"""
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popup "HSCMP;Comparator/6-bit DAC Converter"
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(
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menuitem "CMP 0" "per , ""Analog Modules,HSCMP (Comparator/6-bit DAC Converter),CMP 0"""
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menuitem "CMP 1" "per , ""Analog Modules,HSCMP (Comparator/6-bit DAC Converter),CMP 1"""
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)
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menuitem "DAC;12-bit Digital-to-Analog Converter" "per , ""Analog Modules,DAC (12-bit Digital-to-Analog Converter)"""
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menuitem "VREFV1;Voltage Reference" "per , ""Analog Modules,VREFV1 (Voltage Reference)"""
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)
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popup "Timers"
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(
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menuitem "PDB;Programmable Delay Block" "per , ""Timers,PDB (Programmable Delay Block)"""
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popup "FTM;FlexTimer"
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(
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menuitem "FTM 0" "per , ""Timers,FTM (FlexTimer),FTM 0"""
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menuitem "FTM 1" "per , ""Timers,FTM (FlexTimer),FTM 1"""
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menuitem "FTM 2" "per , ""Timers,FTM (FlexTimer),FTM 2"""
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)
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menuitem "PIT;Periodic Interrupt Timer" "per , ""Timers,PIT (Periodic Interrupt Timer)"""
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menuitem "LPT;Low Power Timer" "per , ""Timers,LPT (Low Power Timer)"""
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)
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popup "Communication Interfaces"
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(
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popup "SPI;Serial Peripheral Interface"
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(
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menuitem "SPI 0" "per , ""Communication Interfaces,SPI (Serial Peripheral Interface),SPI 0"""
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)
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popup "I2C;Inter-Integrated Circuit"
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(
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menuitem "I2C 0" "per , ""Communication Interfaces,I2C (Inter-Integrated Circuit),I2C 0"""
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)
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popup "UART;Universal Asynchronous Rx/Tx"
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(
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menuitem "UART 0" "per , ""Communication Interfaces,UART (Universal Asynchronous Receiver/Transmitter),UART 0"""
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menuitem "UART 1" "per , ""Communication Interfaces,UART (Universal Asynchronous Receiver/Transmitter),UART 1"""
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)
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)
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popup "Human-Machine Interfaces"
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(
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popup "GPIO;GPIO Controller"
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(
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menuitem "GPIO A" "per , ""Human-Machine Interfaces,GPIO (GPIO Controller),GPIO A"""
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menuitem "GPIO B" "per , ""Human-Machine Interfaces,GPIO (GPIO Controller),GPIO B"""
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menuitem "GPIO C" "per , ""Human-Machine Interfaces,GPIO (GPIO Controller),GPIO C"""
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menuitem "GPIO D" "per , ""Human-Machine Interfaces,GPIO (GPIO Controller),GPIO D"""
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menuitem "GPIO E" "per , ""Human-Machine Interfaces,GPIO (GPIO Controller),GPIO E"""
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)
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)
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)
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)
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