307 lines
8.7 KiB
Plaintext
307 lines
8.7 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: DA14683 Specific Menu
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; @Props: Released
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; @Author: DAB
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; @Changelog: 2022-02-16 DAB
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; @Manufacturer: Dialog Semiconductor
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; @Core: Cortex-M0
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; @Chip: DA14683
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: menda14683.men 16339 2023-07-03 13:30:14Z pegold $
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add
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menu
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(
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IF SOFTWARE.BUILD.BASE()>=69655.
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(
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popup "&CPU"
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(
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separator
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IF CPU.FEATURE(MMU)
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(
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popup "[:mmu]MMU"
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(
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menuitem "[:mmureg]MMU Control" "MMU.view"
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separator
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menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
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menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
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separator
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IF CPU.FEATURE(ITLBDUMP)
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(
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menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
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)
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IF CPU.FEATURE(DTLBDUMP)
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(
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menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
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)
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IF CPU.FEATURE(TLB0DUMP)
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(
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menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
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)
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IF CPU.FEATURE(TLB1DUMP)
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(
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menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
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)
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)
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)
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IF COMPonent.AVAILable("SMMU")
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(
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popup "[:mmu]SMMU"
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(
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menuitem "[:chip]SMMU1 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU1 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
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SMMU.StreamMapTable &(name)
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)
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IF COMPonent.AVAILable("SMMU2")
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(
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separator
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menuitem "[:chip]SMMU2 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU2 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU3")
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(
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separator
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menuitem "[:chip]SMMU3 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU3 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU4")
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(
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separator
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menuitem "[:chip]SMMU4 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU4 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU5")
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(
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separator
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menuitem "[:chip]SMMU5 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU5 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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IF COMPonent.AVAILable("SMMU6")
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(
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separator
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menuitem "[:chip]SMMU6 Registers"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.Register.Global &(name)
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)
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menuitem "[:mmureg]SMMU6 StreamMapTable"
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(
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PRIVATE &name
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&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
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SMMU.StreamMapTable &(name)
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)
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)
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)
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)
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IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
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(
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popup "[:cache]Cache"
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(
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IF CPU.FEATURE(L1ICACHEDUMP)
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(
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menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
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menuitem "[:cache]ICACHE List" "CACHE.List IC"
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menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
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)
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IF CPU.FEATURE(L1DCACHEDUMP)
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(
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separator
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menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
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menuitem "[:cache]DCACHE List" "CACHE.List DC"
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menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
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)
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IF CPU.FEATURE(L2CACHEDUMP)
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(
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separator
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menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
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menuitem "[:cache]L2CACHE List" "CACHE.List L2"
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menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
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)
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)
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)
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)
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popup "&Trace"
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(
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separator
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IF COMPonent.AVAILable("ITM")
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(
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popup "ITM"
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(
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default
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menuitem "[:oconfig]ITM settings..." "ITM.state"
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separator
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menuitem "[:alist]ITMTrace List" "ITMTrace.List"
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)
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)
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IF COMPonent.AVAILable("STM")
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(
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popup "STM"
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(
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default
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menuitem "[:oconfig]STM settings..." "STM.state"
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separator
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menuitem "[:alist]STMTrace List" "STMTrace.List"
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)
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)
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IF COMPonent.AVAILable("HTM")
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(
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popup "HTM"
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(
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default
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menuitem "[:oconfig]HTM settings..." "HTM.state"
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separator
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menuitem "[:alist]HTMTrace List" "HTMTrace.List"
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)
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)
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IF COMPonent.AVAILable("TPIU")
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(
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menuitem "[:oconfig]TPIU settings..." "TPIU.state"
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)
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IF COMPonent.AVAILable("ETR")
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(
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menuitem "[:oconfig]ETR settings..."
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(
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PRIVATE &pdd
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&pdd=OS.PDD()
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DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
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)
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)
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)
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popup "&Misc"
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(
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popup "Tools"
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(
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IF CPUIS64BIT()||CPU.FEATURE("SPR")
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(
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menuitem "ARM System Register Converter"
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(
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DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
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)
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)
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IF CPU.FEATURE("C15")
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(
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menuitem "ARM Coprocessor Converter"
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(
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DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
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)
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)
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)
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)
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popup "&Perf"
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(
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IF CPU.FEATURE(BMC)
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(
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before "Reset"
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menuitem "[:bmc]Benchmark Counters" "BMC.state"
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before "Reset"
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separator
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)
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)
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)
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popup "Peripherals"
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(
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popup "[:chip]Core Registers (Cortex-M0)"
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(
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menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M0),System Control"""
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menuitem "[:chip]Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M0),Nested Vectored Interrupt Controller (NVIC)"""
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popup "[:chip]Debug"
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(
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menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M0),Debug,Core Debug"""
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menuitem "[:chip]BPU;Breakpoint Unit" "per , ""Core Registers (Cortex-M0),Debug,Breakpoint Unit (BPU)"""
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menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M0),Debug,Data Watchpoint and Trace Unit (DWT)"""
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)
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)
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separator
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menuitem "NVIC" "per , ""NVIC (Cortex M0 NVIC registers)"""
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popup "PERIPHERAL_REGISTERS (AES_HASH registers)"
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(
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menuitem "AES_HASH" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),AES_HASH"""
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menuitem "ANAMISC" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),ANAMISC"""
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menuitem "APU" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),APU"""
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menuitem "BLE" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),BLE"""
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menuitem "CACHE" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),CACHE"""
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menuitem "CHIP_VERSION" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),CHIP_VERSION"""
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menuitem "COEX" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),COEX"""
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menuitem "CRG_PER" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),CRG_PER"""
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menuitem "CRG_TOP" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),CRG_TOP"""
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menuitem "DCDC" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),DCDC"""
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menuitem "DEM" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),DEM"""
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menuitem "DMA" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),DMA"""
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menuitem "ECC" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),ECC"""
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menuitem "FTDF" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),FTDF"""
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menuitem "GP_TIMERS" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),GP_TIMERS"""
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menuitem "GPADC" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),GPADC"""
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menuitem "GPIO" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),GPIO"""
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menuitem "GPREG" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),GPREG"""
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menuitem "I2C" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),I2C"""
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menuitem "I2C2" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),I2C2"""
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menuitem "IR" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),IR"""
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menuitem "KBSCAN" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),KBSCAN"""
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menuitem "OTPC" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),OTPC"""
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menuitem "QSPIC" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),QSPIC"""
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menuitem "QUAD" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),QUAD"""
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menuitem "SPI" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),SPI"""
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menuitem "SPI2" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),SPI2"""
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menuitem "TIMER1" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),TIMER1"""
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menuitem "TRNG" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),TRNG"""
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menuitem "UART" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),UART"""
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menuitem "UART2" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),UART2"""
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menuitem "USB" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),USB"""
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menuitem "WAKEUP" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),WAKEUP"""
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menuitem "WDOG" "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),WDOG"""
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)
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menuitem "SCB" "per , ""SCB (Cortex M0 SCB registers)"""
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menuitem "SYSTICK" "per , ""SYSTICK (Cortex M0 SysTick registers)"""
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)
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)
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