; --------------------------------------------------------------------------------
; @Title: DA14683 Specific Menu
; @Props: Released
; @Author: DAB
; @Changelog: 2022-02-16 DAB
; @Manufacturer: Dialog Semiconductor
; @Core: Cortex-M0
; @Chip: DA14683
; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menda14683.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
popup "[:chip]Core Registers (Cortex-M0)"
(
menuitem "[:chip]System Control"                                 "per , ""Core Registers (Cortex-M0),System Control"""
menuitem "[:chip]Nested Vectored Interrupt Controller"           "per , ""Core Registers (Cortex-M0),Nested Vectored Interrupt Controller (NVIC)"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug"                                  "per , ""Core Registers (Cortex-M0),Debug,Core Debug"""
menuitem "[:chip]BPU;Breakpoint Unit"                         "per , ""Core Registers (Cortex-M0),Debug,Breakpoint Unit (BPU)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit"          "per , ""Core Registers (Cortex-M0),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
separator
menuitem "NVIC"                 "per , ""NVIC (Cortex M0 NVIC registers)"""
popup "PERIPHERAL_REGISTERS (AES_HASH registers)"
(
menuitem "AES_HASH"         "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),AES_HASH"""
menuitem "ANAMISC"          "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),ANAMISC"""
menuitem "APU"              "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),APU"""
menuitem "BLE"              "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),BLE"""
menuitem "CACHE"            "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),CACHE"""
menuitem "CHIP_VERSION"     "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),CHIP_VERSION"""
menuitem "COEX"             "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),COEX"""
menuitem "CRG_PER"          "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),CRG_PER"""
menuitem "CRG_TOP"          "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),CRG_TOP"""
menuitem "DCDC"             "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),DCDC"""
menuitem "DEM"              "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),DEM"""
menuitem "DMA"              "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),DMA"""
menuitem "ECC"              "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),ECC"""
menuitem "FTDF"             "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),FTDF"""
menuitem "GP_TIMERS"        "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),GP_TIMERS"""
menuitem "GPADC"            "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),GPADC"""
menuitem "GPIO"             "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),GPIO"""
menuitem "GPREG"            "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),GPREG"""
menuitem "I2C"              "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),I2C"""
menuitem "I2C2"             "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),I2C2"""
menuitem "IR"               "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),IR"""
menuitem "KBSCAN"           "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),KBSCAN"""
menuitem "OTPC"             "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),OTPC"""
menuitem "QSPIC"            "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),QSPIC"""
menuitem "QUAD"             "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),QUAD"""
menuitem "SPI"              "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),SPI"""
menuitem "SPI2"             "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),SPI2"""
menuitem "TIMER1"           "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),TIMER1"""
menuitem "TRNG"             "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),TRNG"""
menuitem "UART"             "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),UART"""
menuitem "UART2"            "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),UART2"""
menuitem "USB"              "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),USB"""
menuitem "WAKEUP"           "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),WAKEUP"""
menuitem "WDOG"             "per , ""PERIPHERAL_REGISTERS (AES_HASH registers),WDOG"""
)
menuitem "SCB"                  "per , ""SCB (Cortex M0 SCB registers)"""
menuitem "SYSTICK"              "per , ""SYSTICK (Cortex M0 SysTick registers)"""
)
)