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Work/Src/Gen4_R-Car_Trace32/2_Trunk/perstm32u3.per
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; --------------------------------------------------------------------------------
; @Title: STM32U3 On-Chip Peripherals
; @Props: Released
; @Author: KRZ
; @Changelog: 2025-04-07 KRZ
; @Manufacturer: STM - ST Microelectronics N.V.
; @Doc: Generated (TRACE32, build: 178956.), based on: STM32U3.svd (Ver. 1.0)
; @Core: Cortex-M33F
; @Chip: STM32U385, STM32U375
; @Copyright: (C) 1989-2025 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: perstm32u3.per 19358 2025-04-08 10:11:49Z kwisniewski $
AUTOINDENT.ON CENTER TREE
ENUMDELIMITER ","
base ad:0x0
tree.close "Core Registers (Cortex-M33F)"
AUTOINDENT.PUSH
AUTOINDENT.OFF
tree "System Control"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 12.
group.long 0x08++0x03
line.long 0x00 "ACTLR,Auxiliary Control Register"
bitfld.long 0x00 29. " EXTEXCLALL ,Allows external exclusive operations to be used in a configuration with no MPU" "No,Yes"
bitfld.long 0x00 12. " DISITMATBFLUSH ,Disables ITM and DWT ATB flush" "No,Yes"
bitfld.long 0x00 10. " FPEXCODIS ,Disables FPU exception outputs" "No,Yes"
textline " "
bitfld.long 0x00 9. " DISOOFP ,Disables floating-point" "No,Yes"
bitfld.long 0x00 2. " DISFOLD ,Disables dual-issue functionality" "No,Yes"
bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle" "No,Yes"
group.long 0x0C++0x0F
line.long 0x00 "CPPWR,Coprocessor Power Control Register"
bitfld.long 0x00 21. " SUS10 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 20. " SU10 ,This bit indicates and allows modification of whether the state associated with the floating point unit is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 15. " SUS7 ,State unknown Secure only" "Both states,Secure only"
textline " "
bitfld.long 0x00 14. " SU7 ,This bit indicates and allows modification of whether the state associated with the coprocessor 7 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 13. " SUS6 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 12. " SU6 ,This bit indicates and allows modification of whether the state associated with the coprocessor 6 is permitted to become UNKNOWN" "Not permitted,Permitted"
textline " "
bitfld.long 0x00 11. " SUS5 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 10. " SU5 ,This bit indicates and allows modification of whether the state associated with the coprocessor 5 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 9. " SUS4 ,State unknown Secure only" "Both states,Secure only"
textline " "
bitfld.long 0x00 8. " SU4 ,This bit indicates and allows modification of whether the state associated with the coprocessor 4 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 7. " SUS3 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 6. " SU3 ,This bit indicates and allows modification of whether the state associated with the coprocessor 3 is permitted to become UNKNOWN" "Not permitted,Permitted"
textline " "
bitfld.long 0x00 5. " SUS2 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 4. " SU2 ,This bit indicates and allows modification of whether the state associated with the coprocessor 2 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 3. " SUS1 ,State unknown Secure only" "Both states,Secure only"
textline " "
bitfld.long 0x00 2. " SU1 ,This bit indicates and allows modification of whether the state associated with the coprocessor 1 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 1. " SUS0 ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 0. " SU0 ,This bit indicates and allows modification of whether the state associated with the coprocessor 0 is permitted to become UNKNOWN" "Not permitted,Permitted"
line.long 0x04 "SYST_CSR,SysTick Control and Status Register"
rbitfld.long 0x04 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
bitfld.long 0x04 2. " CLKSOURCE ,SysTick clock source" "External,Core"
bitfld.long 0x04 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
textline " "
bitfld.long 0x04 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
line.long 0x08 "SYST_RVR,SysTick Reload Value Register"
hexmask.long.tbyte 0x08 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
line.long 0x0C "SYST_CVR,SysTick Current Value Register"
hexmask.long.tbyte 0x0C 0.--23. 1. " CURRENT ,Current counter value"
rgroup.long 0x1C++0x03
line.long 0x00 "SYST_CALIB,SysTick Calibration value Register"
bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
rgroup.long 0xD00++0x03
line.long 0x00 "CPUID,CPUID Base Register"
abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited"
bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15"
bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8-M w/ Main Extension"
newline
abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xD21=Cortex-M33"
bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15"
group.long 0xD04++0x23
line.long 0x00 "ICSR,Interrupt Control and State Register"
setclrfld.long 0x00 31. 0x00 31. 0x00 30. " PENDNMISET , On writes allows the NMI exception to be set as pending. On reads indicates whether the NMI exception is pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSVSET , On writes allows the PendSV exception for the selected Security state to be set as pending. On reads indicates whether the PendSV for the selected Security state exception is pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDSTSET ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending"
textline " "
bitfld.long 0x00 24. " STTNS ,Controls whether in a single SysTick implementation the SysTick is Secure or Non-secure" "Secure,Non-secure"
rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled"
rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending"
textline " "
hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt"
rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent"
hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
line.long 0x04 "VTOR,Vector Table Offset Register"
hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address"
line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector Key"
rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian"
bitfld.long 0x08 14. " PRIS ,Prioritize Secure exceptions" "Disabled,Enabled"
textline " "
bitfld.long 0x08 13. " BFHFNMINS ,BusFault BusFault HardFault and NMI Non-secure enable" "Disabled,Enabled"
bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
bitfld.long 0x08 3. " SYSRESETREQS ,System reset request Secure only" "Both states,Secure only"
textline " "
bitfld.long 0x08 2. " SYSRESETREQ ,System reset request" "Not requested,Requested"
bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear"
line.long 0x0C "SCR,System Control Register"
bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
bitfld.long 0x0C 3. " SLEEPDEEPS ,Controls whether the SLEEPDEEP bit is only accessible from the secure state" "Both states,Secure only"
bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
textline " "
bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
line.long 0x10 "CCR,Configuration and Control Register"
bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
textline " "
bitfld.long 0x10 10. " STKOFHFNMIGN ,Controls the effect of a stack limit violation while executing at a requested priority less than 0" "Not ignored,Ignored"
bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise busfaults on handlers running at a requested priority less than 0" "Not ignored,Ignored"
bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled"
textline " "
bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled"
bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled"
line.long 0x14 "SHPR1,System Handler Priority Register 1"
hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of system handler 7, SecureFault"
hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6, UsageFault"
hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5, BusFault"
textline " "
hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4, MemManage"
line.long 0x18 "SHPR2,System Handler Priority Register 2"
hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11, SVCall"
line.long 0x1C "SHPR3,System Handler Priority Register 3"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of system handler 15, SysTick"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of system handler 14, PendSV"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of system handler 12, DebugMonitor"
line.long 0x20 "SHCSR,System Handler Control and State Register"
bitfld.long 0x20 21. " HARDFAULTPENDED ,HardFault exception status" "Not pending,Pending"
bitfld.long 0x20 20. " SECUREFAULTPENDED ,SecureFault exception status" "Not pending,Pending"
bitfld.long 0x20 19. " SECUREFAULTENA ,SecureFault exception enable" "Disabled,Enabled"
textline " "
bitfld.long 0x20 18. " USGFAULTENA ,UsageFault exception enable" "Disabled,Enabled"
bitfld.long 0x20 17. " BUSFAULTENA ,BusFault exception enable" "Disabled,Enabled"
bitfld.long 0x20 16. " MEMFAULTENA ,MemManage exception enable" "Disabled,Enabled"
textline " "
bitfld.long 0x20 15. " SVCALLPENDED ,SVCall exception status" "Not pending,Pending"
bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault exception status" "Not pending,Pending"
bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage exception status" "Not pending,Pending"
textline " "
bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault exception status" "Not pending,Pending"
bitfld.long 0x20 11. " SYSTICKACT ,SysTick exception status" "Not active,Active"
bitfld.long 0x20 10. " PENDSVACT ,PendSV exception status" "Not active,Active"
textline " "
bitfld.long 0x20 8. " MONITORACT ,Monitor exception status" "Not active,Active"
bitfld.long 0x20 7. " SVCALLACT ,SVCall exception status" "Not active,Active"
bitfld.long 0x20 5. " NMIACT ,NMI exception status" "Not active,Active"
textline " "
bitfld.long 0x20 4. " SECUREFAULTACT ,SecureFault exception status" "Not active,Active"
bitfld.long 0x20 3. " USGFAULTACT ,UsageFault exception status" "Not active,Active"
bitfld.long 0x20 2. " HARDFAULTACT ,HardFault exception status for the selected Security state" "Not active,Active"
textline " "
bitfld.long 0x20 1. " BUSFAULTACT ,BusFault exception status" "Not active,Active"
bitfld.long 0x20 0. " MEMFAULTACT ,MemManage exception status" "Not active,Active"
group.byte 0xD28++0x1
line.byte 0x00 "MMFSR,MemManage Status Register"
bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
bitfld.byte 0x00 4. " MSTKERR ,Stacking Access Violations" "Not occurred,Occurred"
textline " "
bitfld.byte 0x00 3. " MUNSTKERR ,Unstacking Access Violations" "Not occurred,Occurred"
bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
line.byte 0x01 "BFSR,Bus Fault Status Register"
bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
bitfld.byte 0x01 4. " STKERR ,Derived bus fault (exception entry)" "Not occurred,Occurred"
textline " "
bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault (exception return)" "Not occurred,Occurred"
bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
textline " "
bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
group.word 0xD2A++0x1
line.word 0x00 "UFSR,Usage Fault Status Register"
eventfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
eventfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
eventfld.word 0x00 4. " STKOF ,Stack overflow error" "No error,Error"
textline " "
eventfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
eventfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
eventfld.word 0x00 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error"
textline " "
eventfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
group.long 0xD2C++0x03
line.long 0x00 "HFSR,HardFault Status Register"
bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority has been escalated to a HardFault exception" "Not occurred,Occurred"
bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
group.long 0xD34++0x0B
line.long 0x00 "MMFAR,MemManage Fault Address Register"
line.long 0x04 "BFAR,BusFault Address Register"
line.long 0x08 "AFSR,Auxiliary Fault Status Register"
group.long 0xD88++0x03
line.long 0x00 "CPACR,Coprocessor Access Control Register"
bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Denied,Privileged,,Full"
bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Denied,Privileged,,Full"
textline " "
bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Denied,Privileged,,Full"
bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Denied,Privileged,,Full"
bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Denied,Privileged,,Full"
textline " "
bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Denied,Privileged,,Full"
bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Denied,Privileged,,Full"
bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Denied,Privileged,,Full"
textline " "
bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Denied,Privileged,,Full"
if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD48)
group.long 0xD8C++0x03
line.long 0x00 "NSACR,Non-Secure Access Control Register"
bitfld.long 0x00 11. " CP11 ,Enables Non-secure access to coprocessor CP11" "Disabled,Enabled"
bitfld.long 0x00 10. " CP10 ,Enables Non-secure access to coprocessor CP10" "Disabled,Enabled"
bitfld.long 0x00 7. " CP7 ,Enables Non-secure access to coprocessor CP7" "Disabled,Enabled"
textline " "
bitfld.long 0x00 6. " CP6 ,Enables Non-secure access to coprocessor CP6" "Disabled,Enabled"
bitfld.long 0x00 5. " CP5 ,Enables Non-secure access to coprocessor CP5" "Disabled,Enabled"
bitfld.long 0x00 4. " CP4 ,Enables Non-secure access to coprocessor CP4" "Disabled,Enabled"
textline " "
bitfld.long 0x00 3. " CP3 ,Enables Non-secure access to coprocessor CP3" "Disabled,Enabled"
bitfld.long 0x00 2. " CP2 ,Enables Non-secure access to coprocessor CP2" "Disabled,Enabled"
bitfld.long 0x00 1. " CP1 ,Enables Non-secure access to coprocessor CP1" "Disabled,Enabled"
textline " "
bitfld.long 0x00 0. " CP0 ,Enables Non-secure access to coprocessor CP0" "Disabled,Enabled"
else
hgroup.long 0xD8C++0x03
hide.long 0x00 "NSACR,Non-Secure Access Control Register (not accessible)"
endif
wgroup.long 0xF00++0x03
line.long 0x00 "STIR,Software Triggered Interrupt Register"
hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be pended"
tree "Memory System"
width 10.
rgroup.long 0xD78++0x03
line.long 0x00 "CLIDR,Cache Level ID Register"
bitfld.long 0x00 30.--31. " ICB ,Inner cache boundary" "Not disclosed,L1 cache highest,L2 cache highest,L3 cache highest"
bitfld.long 0x00 27.--29. " LOU ,LOUU" "Level 1,Level 2,?..."
bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,?..."
textline " "
bitfld.long 0x00 18.--20. " CL7 ,Cache type field level 7" "No cache,Instr. only,Data only,Data and Instr.,Unified cache,?..."
bitfld.long 0x00 15.--17. " CL6 ,Cache type field level 6" "No cache,?..."
bitfld.long 0x00 12.--14. " CL5 ,Cache type field level 5" "No cache,?..."
textline " "
bitfld.long 0x00 9.--11. " CL4 ,Cache type field level 4" "No cache,?..."
bitfld.long 0x00 6.--8. " CL3 ,Cache type field level 3" "No cache,?..."
bitfld.long 0x00 3.--5. " CL2 ,Cache type field level 2" "No cache,?..."
textline " "
bitfld.long 0x00 0.--2. " CL1 ,Cache type field level 1" "No cache,Instr. only,Data only,Data and Instr.,?..."
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD7C)&0xE0000000)==0x80000000)
rgroup.long 0xD7C++0x03
line.long 0x00 "CTR,Cache Type Register"
bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..."
bitfld.long 0x00 24.--27. " CWG ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,9,?..."
bitfld.long 0x00 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,?..."
textline " "
bitfld.long 0x00 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. " IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
rgroup.long 0xD7C++0x03
line.long 0x00 "CTR,Cache Type Register"
bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..."
endif
rgroup.long 0xD80++0x03
line.long 0x00 "CCSIDR,Cache Size ID Register"
bitfld.long 0x00 31. " WT ,Indicates support available for Write-Through" "Not supported,Supported"
bitfld.long 0x00 30. " WB ,Indicates support available for Write-Back" "Not supported,Supported"
bitfld.long 0x00 29. " RA ,Indicates support available for read allocation" "Not supported,Supported"
textline " "
bitfld.long 0x00 28. " WA ,Indicates support available for write allocation" "Not supported,Supported"
hexmask.long.word 0x00 13.--27. 1. " NUMSETS ,Indicates the number of sets as (number of sets) - 1"
hexmask.long.word 0x00 3.--12. 1. " ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1"
textline " "
bitfld.long 0x00 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "4,8,16,32,64,128,256,512"
group.long 0xD84++0x03
line.long 0x00 "CSSELR,Cache Size Selection Register"
bitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,?..."
bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data/Unified,Instruction"
wgroup.long 0xF50++0x03
line.long 0x00 "ICIALLU,I-Cache Invalidate All to PoU"
wgroup.long 0xF58++0x23
line.long 0x00 "ICIMVAU,I-Cache Invalidate by MVA to PoU"
line.long 0x04 "DCIMVAC,D-Cache Invalidate by MVA to PoC"
line.long 0x08 "DCISW,D-Cache Invalidate by Set-Way"
hexmask.long 0x08 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
bitfld.long 0x08 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
line.long 0x0C "DCCMVAU,D-Cache Clean by MVA to PoU"
line.long 0x10 "DCCMVAC,D-Cache Clean by MVA to PoC"
line.long 0x14 "DCCSW,D-Cache Clean by Set-Way"
hexmask.long 0x14 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
bitfld.long 0x14 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
line.long 0x18 "DCCIMVAC,D-Cache Clean and Invalidate by MVA to PoC"
line.long 0x1C "DCCISW,D-Cache Clean and Invalidate by Set-Way"
hexmask.long 0x1C 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on"
bitfld.long 0x1C 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
line.long 0x20 "BPIALL,Branch Predictor Invalidate All"
tree.end
tree "Feature Registers"
width 10.
rgroup.long 0xD40++0x0B
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
bitfld.long 0x00 4.--7. " STATE1 ,T32 instruction set support" ",,,Supported,?..."
bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
line.long 0x04 "ID_PFR1,Processor Feature Register 1"
bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
bitfld.long 0x04 4.--7. " SECURITY ,Security support" "Not implemented,Implemented,?..."
line.long 0x08 "ID_DFR0,Debug Feature Register 0"
bitfld.long 0x08 20.--23. " MPROFDBG ,M-profile debug. Indicates the supported M-profile debug architecture" "Not supported,ARMv8-M Debug architecture,?..."
rgroup.long 0xD4C++0x03
line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
rgroup.long 0xD50++0x03
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,Supported,?..."
bitfld.long 0x00 16.--19. " TCM ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "1 level,2 levels,?..."
textline " "
bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,HW coherency,,,,,,,,,,,,,,Ignored"
bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,,PMSAv8,?..."
rgroup.long 0xD54++0x03
line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
rgroup.long 0xD58++0x03
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
rgroup.long 0xD5C++0x03
line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3"
bitfld.long 0x00 8.--11. " BPMAINT ,Indicates the supported branch predictor maintenance" "Not supported,Supported,?..."
bitfld.long 0x00 4.--7. " CMAINTSW ,Indicates the supported cache maintenance operations by set/way" "Not supported,Supported,?..."
bitfld.long 0x00 0.--3. " CMAINTVA ,Indicates the supported cache maintenance operations by virtual-address" "Not supported,Supported,?..."
rgroup.long 0xD60++0x03
line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,Supported,?..."
textline " "
bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
rgroup.long 0xD64++0x03
line.long 0x00 "ID_ISAR1,Instruction Set Attributes Register 1"
bitfld.long 0x00 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
bitfld.long 0x00 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
bitfld.long 0x00 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
textline " "
bitfld.long 0x00 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Basic,Extended,?..."
rgroup.long 0xD68++0x03
line.long 0x00 "ID_ISAR2,Instruction Set Attributes Register 2"
bitfld.long 0x00 28.--31. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
bitfld.long 0x00 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
bitfld.long 0x00 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,SMULL/SMLAL,,SMULL/SMLAL/DSP,?..."
textline " "
bitfld.long 0x00 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MUL,MUL/MLA/MLS,?..."
bitfld.long 0x00 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
bitfld.long 0x00 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
textline " "
bitfld.long 0x00 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,,Load-acquire/Store-release/Exclusive,?..."
rgroup.long 0xD6C++0x03
line.long 0x00 "ID_ISAR3,Instruction Set Attributes Register 3"
bitfld.long 0x00 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
bitfld.long 0x00 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
bitfld.long 0x00 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
textline " "
bitfld.long 0x00 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,?..."
bitfld.long 0x00 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
bitfld.long 0x00 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Extended,?..."
textline " "
bitfld.long 0x00 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB/Q-bit,?..."
rgroup.long 0xD70++0x03
line.long 0x00 "ID_ISAR4,Instruction Set Attributes Register 4"
bitfld.long 0x00 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,CPS/MRS/MSR,?..."
bitfld.long 0x00 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" ",,,Supported,?..."
bitfld.long 0x00 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,,,DMB/DSB/ISB,?..."
textline " "
bitfld.long 0x00 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
bitfld.long 0x00 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,,,Load/store,?..."
bitfld.long 0x00 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,?..."
tree.end
tree "CoreSight Identification Registers"
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 11.
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xFBC))&0x100000)==0x100000)
rgroup.long 0xFBC++0x03
line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register"
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
else
rgroup.long 0xFBC++0x03
line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
endif
rgroup.long 0xFE0++0x0F
line.long 0x00 "DPIDR0,Peripheral ID0"
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
line.long 0x04 "DPIDR1,Peripheral ID1"
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
line.long 0x08 "DPIDR2,Peripheral ID2"
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
line.long 0x0c "DPIDR3,Peripheral ID3"
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
rgroup.long 0xFD0++0x03
line.long 0x00 "PID4,Peripheral Identification Register 4"
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
rgroup.long 0xFF0++0x0F
line.long 0x00 "DCIDR0,Component ID0 (Preamble)"
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
line.long 0x04 "DCIDR1,Component ID1"
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
line.long 0x08 "DCIDR2,Component ID2"
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
line.long 0x0c "DCIDR3,Component ID3"
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
tree.end
width 0xB
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Memory Protection Unit (MPU)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 15.
rgroup.long 0xD90++0x03
line.long 0x00 "MPU_TYPE,MPU Type Register"
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,?..."
group.long 0xD94++0x03
line.long 0x00 "MPU_CTRL,MPU Control Register"
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
group.long 0xD98++0x03
line.long 0x00 "MPU_RNR,MPU Region Number Register"
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
tree.close "MPU regions"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
group.long 0xD9C++0x03 "Region 0"
saveout 0xD98 %l 0x0
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x0
line.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
saveout 0xD98 %l 0x0
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x0
hide.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
group.long 0xD9C++0x03 "Region 1"
saveout 0xD98 %l 0x1
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x1
line.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
saveout 0xD98 %l 0x1
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x1
hide.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
group.long 0xD9C++0x03 "Region 2"
saveout 0xD98 %l 0x2
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x2
line.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
saveout 0xD98 %l 0x2
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x2
hide.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
group.long 0xD9C++0x03 "Region 3"
saveout 0xD98 %l 0x3
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x3
line.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
saveout 0xD98 %l 0x3
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x3
hide.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
group.long 0xD9C++0x03 "Region 4"
saveout 0xD98 %l 0x4
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x4
line.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
saveout 0xD98 %l 0x4
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x4
hide.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
group.long 0xD9C++0x03 "Region 5"
saveout 0xD98 %l 0x5
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x5
line.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
saveout 0xD98 %l 0x5
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x5
hide.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
group.long 0xD9C++0x03 "Region 6"
saveout 0xD98 %l 0x6
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x6
line.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
saveout 0xD98 %l 0x6
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x6
hide.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
group.long 0xD9C++0x03 "Region 7"
saveout 0xD98 %l 0x7
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x7
line.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
saveout 0xD98 %l 0x7
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x7
hide.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
group.long 0xD9C++0x03 "Region 8"
saveout 0xD98 %l 0x8
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x8
line.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
saveout 0xD98 %l 0x8
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x8
hide.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
group.long 0xD9C++0x03 "Region 9"
saveout 0xD98 %l 0x9
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x9
line.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
saveout 0xD98 %l 0x9
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x9
hide.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
group.long 0xD9C++0x03 "Region 10"
saveout 0xD98 %l 0xA
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xA
line.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
saveout 0xD98 %l 0xA
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xA
hide.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
group.long 0xD9C++0x03 "Region 11"
saveout 0xD98 %l 0xB
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xB
line.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
saveout 0xD98 %l 0xB
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xB
hide.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
group.long 0xD9C++0x03 "Region 12"
saveout 0xD98 %l 0xC
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xC
line.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
saveout 0xD98 %l 0xC
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xC
hide.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
group.long 0xD9C++0x03 "Region 13"
saveout 0xD98 %l 0xD
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xD
line.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
saveout 0xD98 %l 0xD
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xD
hide.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
group.long 0xD9C++0x03 "Region 14"
saveout 0xD98 %l 0xE
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xE
line.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
saveout 0xD98 %l 0xE
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xE
hide.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
group.long 0xD9C++0x03 "Region 15"
saveout 0xD98 %l 0xF
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline " "
bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xF
line.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15"
hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
saveout 0xD98 %l 0xF
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
textline " "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xF
hide.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15"
endif
tree.end
newline
group.long 0xDC0++0x07
line.long 0x00 "MPU_MAIR0,MPU Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. " ATTR3H ,Attribute 3 High. Outer memory attributes for MPU regions with an AttrIndex of 3" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 24.--27. " ATTR3L ,Attribute 3 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 3 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x00 20.--23. " ATTR2H ,Attribute 2 High. Outer memory attributes for MPU regions with an AttrIndex of 2" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 16.--19. " ATTR2L ,Attribute 2 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 2 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x00 12.--15. " ATTR1H ,Attribute 1 High. Outer memory attributes for MPU regions with an AttrIndex of 1" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 8.--11. " ATTR1L ,Attribute 1 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 1 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x00 4.--7. " ATTR0H ,Attribute 0 High. Outer memory attributes for MPU regions with an AttrIndex of 0" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 0.--3. " ATTR0L ,Attribute 0 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 0 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
line.long 0x04 "MPU_MAIR1,MPU Memory Attribute Indirection Register 1"
bitfld.long 0x04 28.--31. " ATTR7H ,Attribute 7 High. Outer memory attributes for MPU regions with an AttrIndex of 7" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 24.--27. " ATTR7L ,Attribute 7 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 7 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x04 20.--23. " ATTR6H ,Attribute 6 High. Outer memory attributes for MPU regions with an AttrIndex of 6" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 16.--19. " ATTR6L ,Attribute 6 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 6 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x04 12.--15. " ATTR5H ,Attribute 5 High. Outer memory attributes for MPU regions with an AttrIndex of 5" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 8.--11. " ATTR5L ,Attribute 5 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 5 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x04 4.--7. " ATTR4H ,Attribute 4 High. Outer memory attributes for MPU regions with an AttrIndex of 4" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 0.--3. " ATTR4L ,Attribute 4 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 4 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Security Attribution Unit (SAU)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 15.
group.long 0xDD0++0x03
line.long 0x00 "SAU_CTRL,SAU Control Register"
bitfld.long 0x00 1. " ALLNS ,When SAU_CTRL.ENABLE is 0 this bit controls if the memory is marked as Non-secure or Secure" "Secure,Non-Secure"
bitfld.long 0x00 0. " ENABLE ,Enables the SAU" "Disabled,Enabled"
rgroup.long 0xDD4++0x03
line.long 0x00 "SAU_TYPE,SAU Type Register"
bitfld.long 0x00 0.--7. " SREGION ,The number of implemented SAU regions" "0,1,2,3,4,5,6,7,8,?..."
group.long 0xDD8++0x03
line.long 0x00 "SAU_RNR,SAU Region Number Register"
hexmask.long.byte 0x00 0.--7. 1. " SAU_RNR ,Indicates the SAU region accessed by SAU_RBAR and SAU_RLAR"
tree.close "SAU regions"
if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD0)
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x0
group.long 0xDDC++0x03 "Region 0"
saveout 0xDD8 %l 0x0
line.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x0
line.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 0 (not implemented)"
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x1
group.long 0xDDC++0x03 "Region 1"
saveout 0xDD8 %l 0x1
line.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x1
line.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 1 (not implemented)"
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x2
group.long 0xDDC++0x03 "Region 2"
saveout 0xDD8 %l 0x2
line.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x2
line.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 2 (not implemented)"
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x3
group.long 0xDDC++0x03 "Region 3"
saveout 0xDD8 %l 0x3
line.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x3
line.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 3 (not implemented)"
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x4
group.long 0xDDC++0x03 "Region 4"
saveout 0xDD8 %l 0x4
line.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x4
line.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 4 (not implemented)"
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x5
group.long 0xDDC++0x03 "Region 5"
saveout 0xDD8 %l 0x5
line.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x5
line.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 5 (not implemented)"
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x6
group.long 0xDDC++0x03 "Region 6"
saveout 0xDD8 %l 0x6
line.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x6
line.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 6 (not implemented)"
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x7
group.long 0xDDC++0x03 "Region 7"
saveout 0xDD8 %l 0x7
line.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x7
line.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 7 (not implemented)"
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
endif
else
hgroup.long 0xDDC++0x03 "Region 0 (not accessible)"
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
hgroup.long 0xDDC++0x03 "Region 1 (not accessible)"
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
hgroup.long 0xDDC++0x03 "Region 2 (not accessible)"
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
hgroup.long 0xDDC++0x03 "Region 3 (not accessible)"
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
hgroup.long 0xDDC++0x03 "Region 4 (not accessible)"
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
hgroup.long 0xDDC++0x03 "Region 5 (not accessible)"
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
hgroup.long 0xDDC++0x03 "Region 6 (not accessible)"
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
hgroup.long 0xDDC++0x03 "Region 7 (not accessible)"
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
endif
tree.end
group.long 0xDE4++0x03
line.long 0x00 "SFSR,Secure Fault Status Register"
bitfld.long 0x00 7. " LSERR ,Lazy state error flag" "Not occurred,Occurred"
bitfld.long 0x00 6. " SFARVALID ,Secure fault address valid" "Not valid,Valid"
bitfld.long 0x00 5. " LSPERR ,Lazy state preservation error flag" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 4. " INVTRAN ,Invalid transition flag" "Not occurred,Occurred"
bitfld.long 0x00 3. " AUVIOL ,Attribution unit violation flag" "Not occurred,Occurred"
bitfld.long 0x00 2. " INVER ,Invalid exception return flag" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 1. " INVIS ,Invalid integrity signature flag" "Not occurred,Occurred"
bitfld.long 0x00 0. " INVEP ,Invalid entry point" "Not occurred,Occurred"
group.long 0xDE8++0x03
line.long 0x00 "SFAR,Secure Fault Address Register"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Nested Vectored Interrupt Controller (NVIC)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 6.
group.long 0x04++0x03
line.long 0x00 "ICTR,Interrupt Controller Type Register"
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,0-64,0-96,0-128,0-160,0-192,0-224,0-255,0-287,0-319,0-351,0-383,0-415,0-447,0-479,0-511"
width 24.
tree "Interrupt Enable Registers"
group.long 0x100++0x03
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x104++0x03
line.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x104++0x03
hide.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x108++0x03
line.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x108++0x03
hide.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x10C++0x03
line.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x10C++0x03
hide.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x110++0x03
line.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x110++0x03
hide.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x114++0x03
line.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x114++0x03
hide.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x118++0x03
line.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x118++0x03
hide.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x11C++0x03
line.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA255 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA254 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA253 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA252 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA251 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA250 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA249 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA248 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA247 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA246 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA245 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA244 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA243 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA242 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA241 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA240 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x11C++0x03
hide.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x120++0x03
line.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA287 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA286 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA285 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA284 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA283 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA282 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA281 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA280 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA279 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA278 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA277 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA276 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA275 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA274 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA273 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA272 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA271 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA270 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA269 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA268 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA267 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA266 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA265 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA264 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA263 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA262 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA261 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA260 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA259 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA258 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA257 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA256 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x120++0x03
hide.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x124++0x03
line.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA319 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA318 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA317 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA316 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA315 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA314 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA313 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA312 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA311 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA310 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA309 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA308 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA307 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA306 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA305 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA304 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA303 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA302 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA301 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA300 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA299 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA298 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA297 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA296 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA295 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA294 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA293 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA292 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA291 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA290 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA289 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA288 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x124++0x03
hide.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x128++0x03
line.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA351 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA350 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA349 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA348 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA347 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA346 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA345 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA344 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA343 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA342 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA341 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA340 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA339 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA338 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA337 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA336 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA335 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA334 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA333 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA332 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA331 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA330 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA329 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA328 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA327 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA326 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA325 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA324 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA323 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA322 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA321 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA320 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x128++0x03
hide.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x12C++0x03
line.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA383 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA382 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA381 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA380 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA379 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA378 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA377 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA376 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA375 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA374 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA373 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA372 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA371 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA370 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA369 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA368 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA367 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA366 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA365 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA364 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA363 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA362 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA361 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA360 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA359 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA358 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA357 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA356 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA355 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA354 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA353 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA352 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x12C++0x03
hide.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x130++0x03
line.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA415 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA414 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA413 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA412 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA411 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA410 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA409 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA408 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA407 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA406 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA405 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA404 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA403 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA402 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA401 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA400 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA399 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA398 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA397 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA396 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA395 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA394 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA393 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA392 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA391 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA390 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA389 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA388 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA387 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA386 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA385 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA384 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x130++0x03
hide.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x134++0x03
line.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA447 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA446 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA445 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA444 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA443 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA442 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA441 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA440 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA439 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA438 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA437 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA436 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA435 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA434 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA433 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA432 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA431 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA430 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA429 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA428 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA427 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA426 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA425 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA424 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA423 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA422 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA421 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA420 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA419 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA418 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA417 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA416 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x134++0x03
hide.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x138++0x03
line.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA479 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA478 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA477 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA476 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA475 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA474 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA473 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA472 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA471 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA470 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA469 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA468 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA467 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA466 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA465 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA464 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA463 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA462 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA461 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA460 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA459 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA458 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA457 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA456 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA455 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA454 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA453 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA452 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA451 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA450 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA449 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA448 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x138++0x03
hide.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
group.long 0x13C++0x03
line.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA511 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA510 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA509 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA508 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA507 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA506 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA505 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA504 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA503 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA502 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA501 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA500 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA499 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA498 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA497 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA496 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA495 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA494 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA493 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA492 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA491 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA490 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA489 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA488 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA487 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA486 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA485 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA484 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA483 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA482 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA481 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA480 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x13C++0x03
hide.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register"
endif
tree.end
width 24.
tree "Interrupt Pending Registers"
group.long 0x200++0x03
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x204++0x03
line.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x204++0x03
hide.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x208++0x03
line.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x208++0x03
hide.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x20C++0x03
line.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x20C++0x03
hide.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x210++0x03
line.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x210++0x03
hide.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x214++0x03
line.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x214++0x03
hide.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x218++0x03
line.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x218++0x03
hide.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x21C++0x03
line.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN255 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN254 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN253 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN252 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN251 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN250 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN249 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN248 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN247 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN246 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN245 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN244 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN243 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN242 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN241 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN240 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x21C++0x03
hide.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x220++0x03
line.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN287 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN286 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN285 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN284 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN283 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN282 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN281 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN280 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN279 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN278 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN277 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN276 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN275 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN274 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN273 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN272 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN271 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN270 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN269 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN268 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN267 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN266 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN265 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN264 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN263 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN262 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN261 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN260 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN259 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN258 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN257 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN256 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x220++0x03
hide.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x224++0x03
line.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN319 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN318 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN317 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN316 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN315 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN314 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN313 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN312 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN311 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN310 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN309 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN308 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN307 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN306 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN305 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN304 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN303 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN302 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN301 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN300 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN299 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN298 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN297 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN296 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN295 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN294 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN293 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN292 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN291 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN290 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN289 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN288 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x224++0x03
hide.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x228++0x03
line.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN351 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN350 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN349 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN348 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN347 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN346 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN345 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN344 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN343 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN342 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN341 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN340 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN339 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN338 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN337 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN336 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN335 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN334 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN333 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN332 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN331 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN330 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN329 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN328 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN327 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN326 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN325 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN324 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN323 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN322 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN321 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN320 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x228++0x03
hide.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x22C++0x03
line.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN383 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN382 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN381 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN380 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN379 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN378 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN377 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN376 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN375 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN374 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN373 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN372 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN371 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN370 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN369 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN368 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN367 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN366 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN365 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN364 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN363 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN362 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN361 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN360 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN359 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN358 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN357 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN356 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN355 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN354 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN353 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN352 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x22C++0x03
hide.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x230++0x03
line.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN415 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN414 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN413 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN412 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN411 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN410 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN409 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN408 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN407 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN406 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN405 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN404 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN403 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN402 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN401 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN400 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN399 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN398 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN397 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN396 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN395 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN394 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN393 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN392 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN391 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN390 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN389 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN388 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN387 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN386 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN385 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN384 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x230++0x03
hide.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x234++0x03
line.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN447 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN446 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN445 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN444 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN443 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN442 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN441 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN440 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN439 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN438 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN437 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN436 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN435 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN434 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN433 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN432 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN431 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN430 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN429 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN428 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN427 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN426 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN425 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN424 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN423 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN422 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN421 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN420 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN419 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN418 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN417 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN416 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x234++0x03
hide.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x238++0x03
line.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN479 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN478 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN477 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN476 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN475 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN474 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN473 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN472 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN471 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN470 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN469 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN468 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN467 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN466 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN465 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN464 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN463 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN462 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN461 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN460 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN459 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN458 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN457 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN456 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN455 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN454 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN453 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN452 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN451 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN450 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN449 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN448 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x238++0x03
hide.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
group.long 0x23C++0x03
line.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN511 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN510 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN509 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN508 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN507 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN506 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN505 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN504 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN503 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN502 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN501 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN500 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN499 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN498 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN497 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN496 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN495 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN494 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN493 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN492 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN491 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN490 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN489 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN488 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN487 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN486 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN485 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN484 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN483 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN482 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN481 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN480 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x23C++0x03
hide.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register"
endif
tree.end
width 11.
tree "Interrupt Active Bit Registers"
rgroup.long 0x300++0x03
line.long 0x00 "ACTIVE0,Active Bit Register 0"
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
rgroup.long 0x304++0x03
line.long 0x00 "ACTIVE1,Active Bit Register 1"
bitfld.long 0x00 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x304++0x03
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
rgroup.long 0x308++0x03
line.long 0x00 "ACTIVE2,Active Bit Register 2"
bitfld.long 0x00 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x308++0x03
hide.long 0x00 "ACTIVE2,Active Bit Register 2"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
rgroup.long 0x30C++0x03
line.long 0x00 "ACTIVE3,Active Bit Register 3"
bitfld.long 0x00 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x30C++0x03
hide.long 0x00 "ACTIVE3,Active Bit Register 3"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
rgroup.long 0x310++0x03
line.long 0x00 "ACTIVE4,Active Bit Register 4"
bitfld.long 0x00 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x310++0x03
hide.long 0x00 "ACTIVE4,Active Bit Register 4"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
rgroup.long 0x314++0x03
line.long 0x00 "ACTIVE5,Active Bit Register 5"
bitfld.long 0x00 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x314++0x03
hide.long 0x00 "ACTIVE5,Active Bit Register 5"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
rgroup.long 0x318++0x03
line.long 0x00 "ACTIVE6,Active Bit Register 6"
bitfld.long 0x00 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x318++0x03
hide.long 0x00 "ACTIVE6,Active Bit Register 6"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
rgroup.long 0x31C++0x03
line.long 0x00 "ACTIVE7,Active Bit Register 7"
bitfld.long 0x00 31. " ACTIVE255 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE254 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE253 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE252 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE251 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE250 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE249 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE248 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE247 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE246 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE245 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE244 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE243 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE242 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE241 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE240 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x31C++0x03
hide.long 0x00 "ACTIVE7,Active Bit Register 7"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
rgroup.long 0x320++0x03
line.long 0x00 "ACTIVE8,Active Bit Register 8"
bitfld.long 0x00 31. " ACTIVE287 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE286 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE285 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE284 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE283 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE282 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE281 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE280 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE279 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE278 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE277 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE276 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE275 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE274 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE273 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE272 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE271 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE270 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE269 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE268 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE267 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE266 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE265 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE264 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE263 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE262 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE261 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE260 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE259 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE258 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE257 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE256 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x320++0x03
hide.long 0x00 "ACTIVE8,Active Bit Register 8"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
rgroup.long 0x324++0x03
line.long 0x00 "ACTIVE9,Active Bit Register 9"
bitfld.long 0x00 31. " ACTIVE319 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE318 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE317 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE316 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE315 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE314 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE313 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE312 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE311 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE310 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE309 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE308 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE307 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE306 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE305 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE304 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE303 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE302 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE301 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE300 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE299 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE298 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE297 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE296 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE295 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE294 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE293 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE292 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE291 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE290 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE289 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE288 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x324++0x03
hide.long 0x00 "ACTIVE9,Active Bit Register 9"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
rgroup.long 0x328++0x03
line.long 0x00 "ACTIVE10,Active Bit Register 10"
bitfld.long 0x00 31. " ACTIVE351 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE350 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE349 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE348 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE347 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE346 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE345 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE344 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE343 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE342 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE341 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE340 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE339 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE338 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE337 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE336 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE335 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE334 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE333 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE332 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE331 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE330 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE329 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE328 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE327 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE326 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE325 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE324 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE323 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE322 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE321 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE320 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x328++0x03
hide.long 0x00 "ACTIVE10,Active Bit Register 10"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
rgroup.long 0x32C++0x03
line.long 0x00 "ACTIVE11,Active Bit Register 11"
bitfld.long 0x00 31. " ACTIVE383 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE382 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE381 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE380 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE379 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE378 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE377 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE376 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE375 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE374 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE373 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE372 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE371 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE370 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE369 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE368 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE367 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE366 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE365 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE364 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE363 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE362 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE361 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE360 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE359 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE358 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE357 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE356 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE355 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE354 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE353 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE352 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x32C++0x03
hide.long 0x00 "ACTIVE11,Active Bit Register 11"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
rgroup.long 0x330++0x03
line.long 0x00 "ACTIVE12,Active Bit Register 12"
bitfld.long 0x00 31. " ACTIVE415 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE414 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE413 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE412 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE411 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE410 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE409 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE408 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE407 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE406 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE405 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE404 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE403 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE402 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE401 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE400 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE399 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE398 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE397 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE396 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE395 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE394 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE393 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE392 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE391 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE390 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE389 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE388 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE387 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE386 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE385 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE384 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x330++0x03
hide.long 0x00 "ACTIVE12,Active Bit Register 12"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
rgroup.long 0x334++0x03
line.long 0x00 "ACTIVE13,Active Bit Register 13"
bitfld.long 0x00 31. " ACTIVE447 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE446 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE445 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE444 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE443 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE442 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE441 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE440 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE439 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE438 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE437 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE436 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE435 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE434 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE433 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE432 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE431 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE430 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE429 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE428 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE427 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE426 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE425 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE424 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE423 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE422 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE421 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE420 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE419 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE418 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE417 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE416 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x334++0x03
hide.long 0x00 "ACTIVE13,Active Bit Register 13"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
rgroup.long 0x338++0x03
line.long 0x00 "ACTIVE14,Active Bit Register 14"
bitfld.long 0x00 31. " ACTIVE479 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE478 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE477 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE476 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE475 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE474 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE473 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE472 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE471 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE470 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE469 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE468 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE467 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE466 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE465 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE464 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE463 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE462 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE461 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE460 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE459 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE458 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE457 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE456 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE455 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE454 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE453 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE452 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE451 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE450 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE449 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE448 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x338++0x03
hide.long 0x00 "ACTIVE14,Active Bit Register 14"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
rgroup.long 0x33C++0x03
line.long 0x00 "ACTIVE15,Active Bit Register 15"
bitfld.long 0x00 31. " ACTIVE511 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. " ACTIVE510 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. " ACTIVE509 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. " ACTIVE508 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. " ACTIVE507 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. " ACTIVE506 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 25. " ACTIVE505 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. " ACTIVE504 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. " ACTIVE503 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. " ACTIVE502 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. " ACTIVE501 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. " ACTIVE500 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 19. " ACTIVE499 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. " ACTIVE498 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. " ACTIVE497 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. " ACTIVE496 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. " ACTIVE495 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. " ACTIVE494 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 13. " ACTIVE493 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. " ACTIVE492 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. " ACTIVE491 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. " ACTIVE490 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. " ACTIVE489 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. " ACTIVE488 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 7. " ACTIVE487 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. " ACTIVE486 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. " ACTIVE485 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. " ACTIVE484 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. " ACTIVE483 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. " ACTIVE482 ,Interrupt Active Flag" "Not active,Active"
textline " "
bitfld.long 0x00 1. " ACTIVE481 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. " ACTIVE480 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x33C++0x03
hide.long 0x00 "ACTIVE15,Active Bit Register 15"
endif
tree.end
width 13.
tree "Interrupt Target Non-Secure Registers"
group.long 0x380++0x03
line.long 0x00 "NVIC_ITNS0,Interrupt Target Non-Secure Register 0"
bitfld.long 0x00 31. " ITNS31 ,Interrupt Targets Non-secure 31" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS30 ,Interrupt Targets Non-secure 30" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS29 ,Interrupt Targets Non-secure 29" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS28 ,Interrupt Targets Non-secure 28" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS27 ,Interrupt Targets Non-secure 27" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS26 ,Interrupt Targets Non-secure 26" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS25 ,Interrupt Targets Non-secure 25" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS24 ,Interrupt Targets Non-secure 24" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS23 ,Interrupt Targets Non-secure 23" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS22 ,Interrupt Targets Non-secure 22" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS21 ,Interrupt Targets Non-secure 21" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS20 ,Interrupt Targets Non-secure 20" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS19 ,Interrupt Targets Non-secure 19" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS18 ,Interrupt Targets Non-secure 18" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS17 ,Interrupt Targets Non-secure 17" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS16 ,Interrupt Targets Non-secure 16" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS15 ,Interrupt Targets Non-secure 15" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS14 ,Interrupt Targets Non-secure 14" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS13 ,Interrupt Targets Non-secure 13" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS12 ,Interrupt Targets Non-secure 12" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS11 ,Interrupt Targets Non-secure 11" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS10 ,Interrupt Targets Non-secure 10" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS9 ,Interrupt Targets Non-secure 9" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS8 ,Interrupt Targets Non-secure 8" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS7 ,Interrupt Targets Non-secure 7" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS6 ,Interrupt Targets Non-secure 6" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS5 ,Interrupt Targets Non-secure 5" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS4 ,Interrupt Targets Non-secure 4" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS3 ,Interrupt Targets Non-secure 3" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS2 ,Interrupt Targets Non-secure 2" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS1 ,Interrupt Targets Non-secure 1" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS0 ,Interrupt Targets Non-secure 0" "Secure,Non-secure"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x384++0x03
line.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1"
bitfld.long 0x00 31. " ITNS63 ,Interrupt Targets Non-secure 63" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS62 ,Interrupt Targets Non-secure 62" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS61 ,Interrupt Targets Non-secure 61" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS60 ,Interrupt Targets Non-secure 60" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS59 ,Interrupt Targets Non-secure 59" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS58 ,Interrupt Targets Non-secure 58" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS57 ,Interrupt Targets Non-secure 57" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS56 ,Interrupt Targets Non-secure 56" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS55 ,Interrupt Targets Non-secure 55" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS54 ,Interrupt Targets Non-secure 54" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS53 ,Interrupt Targets Non-secure 53" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS52 ,Interrupt Targets Non-secure 52" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS51 ,Interrupt Targets Non-secure 51" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS50 ,Interrupt Targets Non-secure 50" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS49 ,Interrupt Targets Non-secure 49" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS48 ,Interrupt Targets Non-secure 48" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS47 ,Interrupt Targets Non-secure 47" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS46 ,Interrupt Targets Non-secure 46" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS45 ,Interrupt Targets Non-secure 45" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS44 ,Interrupt Targets Non-secure 44" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS43 ,Interrupt Targets Non-secure 43" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS42 ,Interrupt Targets Non-secure 42" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS41 ,Interrupt Targets Non-secure 41" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS40 ,Interrupt Targets Non-secure 40" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS39 ,Interrupt Targets Non-secure 39" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS38 ,Interrupt Targets Non-secure 38" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS37 ,Interrupt Targets Non-secure 37" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS36 ,Interrupt Targets Non-secure 36" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS35 ,Interrupt Targets Non-secure 35" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS34 ,Interrupt Targets Non-secure 34" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS33 ,Interrupt Targets Non-secure 33" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS32 ,Interrupt Targets Non-secure 32" "Secure,Non-secure"
else
hgroup.long 0x384++0x03
hide.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x388++0x03
line.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2"
bitfld.long 0x00 31. " ITNS95 ,Interrupt Targets Non-secure 95" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS94 ,Interrupt Targets Non-secure 94" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS93 ,Interrupt Targets Non-secure 93" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS92 ,Interrupt Targets Non-secure 92" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS91 ,Interrupt Targets Non-secure 91" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS90 ,Interrupt Targets Non-secure 90" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS89 ,Interrupt Targets Non-secure 89" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS88 ,Interrupt Targets Non-secure 88" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS87 ,Interrupt Targets Non-secure 87" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS86 ,Interrupt Targets Non-secure 86" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS85 ,Interrupt Targets Non-secure 85" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS84 ,Interrupt Targets Non-secure 84" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS83 ,Interrupt Targets Non-secure 83" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS82 ,Interrupt Targets Non-secure 82" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS81 ,Interrupt Targets Non-secure 81" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS80 ,Interrupt Targets Non-secure 80" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS79 ,Interrupt Targets Non-secure 79" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS78 ,Interrupt Targets Non-secure 78" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS77 ,Interrupt Targets Non-secure 77" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS76 ,Interrupt Targets Non-secure 76" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS75 ,Interrupt Targets Non-secure 75" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS74 ,Interrupt Targets Non-secure 74" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS73 ,Interrupt Targets Non-secure 73" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS72 ,Interrupt Targets Non-secure 72" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS71 ,Interrupt Targets Non-secure 71" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS70 ,Interrupt Targets Non-secure 70" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS69 ,Interrupt Targets Non-secure 69" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS68 ,Interrupt Targets Non-secure 68" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS67 ,Interrupt Targets Non-secure 67" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS66 ,Interrupt Targets Non-secure 66" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS65 ,Interrupt Targets Non-secure 65" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS64 ,Interrupt Targets Non-secure 64" "Secure,Non-secure"
else
hgroup.long 0x388++0x03
hide.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x38C++0x03
line.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3"
bitfld.long 0x00 31. " ITNS127 ,Interrupt Targets Non-secure 127" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS126 ,Interrupt Targets Non-secure 126" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS125 ,Interrupt Targets Non-secure 125" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS124 ,Interrupt Targets Non-secure 124" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS123 ,Interrupt Targets Non-secure 123" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS122 ,Interrupt Targets Non-secure 122" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS121 ,Interrupt Targets Non-secure 121" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS120 ,Interrupt Targets Non-secure 120" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS119 ,Interrupt Targets Non-secure 119" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS118 ,Interrupt Targets Non-secure 118" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS117 ,Interrupt Targets Non-secure 117" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS116 ,Interrupt Targets Non-secure 116" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS115 ,Interrupt Targets Non-secure 115" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS114 ,Interrupt Targets Non-secure 114" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS113 ,Interrupt Targets Non-secure 113" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS112 ,Interrupt Targets Non-secure 112" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS111 ,Interrupt Targets Non-secure 111" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS110 ,Interrupt Targets Non-secure 110" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS109 ,Interrupt Targets Non-secure 109" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS108 ,Interrupt Targets Non-secure 108" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS107 ,Interrupt Targets Non-secure 107" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS106 ,Interrupt Targets Non-secure 106" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS105 ,Interrupt Targets Non-secure 105" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS104 ,Interrupt Targets Non-secure 104" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS103 ,Interrupt Targets Non-secure 103" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS102 ,Interrupt Targets Non-secure 102" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS101 ,Interrupt Targets Non-secure 101" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS100 ,Interrupt Targets Non-secure 100" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS99 ,Interrupt Targets Non-secure 99" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS98 ,Interrupt Targets Non-secure 98" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS97 ,Interrupt Targets Non-secure 97" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS96 ,Interrupt Targets Non-secure 96" "Secure,Non-secure"
else
hgroup.long 0x38C++0x03
hide.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x390++0x03
line.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4"
bitfld.long 0x00 31. " ITNS159 ,Interrupt Targets Non-secure 159" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS158 ,Interrupt Targets Non-secure 158" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS157 ,Interrupt Targets Non-secure 157" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS156 ,Interrupt Targets Non-secure 156" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS155 ,Interrupt Targets Non-secure 155" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS154 ,Interrupt Targets Non-secure 154" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS153 ,Interrupt Targets Non-secure 153" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS152 ,Interrupt Targets Non-secure 152" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS151 ,Interrupt Targets Non-secure 151" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS150 ,Interrupt Targets Non-secure 150" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS149 ,Interrupt Targets Non-secure 149" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS148 ,Interrupt Targets Non-secure 148" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS147 ,Interrupt Targets Non-secure 147" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS146 ,Interrupt Targets Non-secure 146" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS145 ,Interrupt Targets Non-secure 145" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS144 ,Interrupt Targets Non-secure 144" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS143 ,Interrupt Targets Non-secure 143" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS142 ,Interrupt Targets Non-secure 142" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS141 ,Interrupt Targets Non-secure 141" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS140 ,Interrupt Targets Non-secure 140" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS139 ,Interrupt Targets Non-secure 139" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS138 ,Interrupt Targets Non-secure 138" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS137 ,Interrupt Targets Non-secure 137" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS136 ,Interrupt Targets Non-secure 136" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS135 ,Interrupt Targets Non-secure 135" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS134 ,Interrupt Targets Non-secure 134" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS133 ,Interrupt Targets Non-secure 133" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS132 ,Interrupt Targets Non-secure 132" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS131 ,Interrupt Targets Non-secure 131" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS130 ,Interrupt Targets Non-secure 130" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS129 ,Interrupt Targets Non-secure 129" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS128 ,Interrupt Targets Non-secure 128" "Secure,Non-secure"
else
hgroup.long 0x390++0x03
hide.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x394++0x03
line.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5"
bitfld.long 0x00 31. " ITNS191 ,Interrupt Targets Non-secure 191" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS190 ,Interrupt Targets Non-secure 190" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS189 ,Interrupt Targets Non-secure 189" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS188 ,Interrupt Targets Non-secure 188" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS187 ,Interrupt Targets Non-secure 187" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS186 ,Interrupt Targets Non-secure 186" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS185 ,Interrupt Targets Non-secure 185" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS184 ,Interrupt Targets Non-secure 184" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS183 ,Interrupt Targets Non-secure 183" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS182 ,Interrupt Targets Non-secure 182" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS181 ,Interrupt Targets Non-secure 181" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS180 ,Interrupt Targets Non-secure 180" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS179 ,Interrupt Targets Non-secure 179" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS178 ,Interrupt Targets Non-secure 178" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS177 ,Interrupt Targets Non-secure 177" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS176 ,Interrupt Targets Non-secure 176" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS175 ,Interrupt Targets Non-secure 175" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS174 ,Interrupt Targets Non-secure 174" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS173 ,Interrupt Targets Non-secure 173" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS172 ,Interrupt Targets Non-secure 172" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS171 ,Interrupt Targets Non-secure 171" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS170 ,Interrupt Targets Non-secure 170" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS169 ,Interrupt Targets Non-secure 169" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS168 ,Interrupt Targets Non-secure 168" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS167 ,Interrupt Targets Non-secure 167" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS166 ,Interrupt Targets Non-secure 166" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS165 ,Interrupt Targets Non-secure 165" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS164 ,Interrupt Targets Non-secure 164" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS163 ,Interrupt Targets Non-secure 163" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS162 ,Interrupt Targets Non-secure 162" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS161 ,Interrupt Targets Non-secure 161" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS160 ,Interrupt Targets Non-secure 160" "Secure,Non-secure"
else
hgroup.long 0x394++0x03
hide.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x398++0x03
line.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6"
bitfld.long 0x00 31. " ITNS223 ,Interrupt Targets Non-secure 223" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS222 ,Interrupt Targets Non-secure 222" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS221 ,Interrupt Targets Non-secure 221" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS220 ,Interrupt Targets Non-secure 220" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS219 ,Interrupt Targets Non-secure 219" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS218 ,Interrupt Targets Non-secure 218" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS217 ,Interrupt Targets Non-secure 217" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS216 ,Interrupt Targets Non-secure 216" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS215 ,Interrupt Targets Non-secure 215" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS214 ,Interrupt Targets Non-secure 214" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS213 ,Interrupt Targets Non-secure 213" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS212 ,Interrupt Targets Non-secure 212" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS211 ,Interrupt Targets Non-secure 211" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS210 ,Interrupt Targets Non-secure 210" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS209 ,Interrupt Targets Non-secure 209" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS208 ,Interrupt Targets Non-secure 208" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS207 ,Interrupt Targets Non-secure 207" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS206 ,Interrupt Targets Non-secure 206" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS205 ,Interrupt Targets Non-secure 205" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS204 ,Interrupt Targets Non-secure 204" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS203 ,Interrupt Targets Non-secure 203" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS202 ,Interrupt Targets Non-secure 202" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS201 ,Interrupt Targets Non-secure 201" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS200 ,Interrupt Targets Non-secure 200" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS199 ,Interrupt Targets Non-secure 199" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS198 ,Interrupt Targets Non-secure 198" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS197 ,Interrupt Targets Non-secure 197" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS196 ,Interrupt Targets Non-secure 196" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS195 ,Interrupt Targets Non-secure 195" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS194 ,Interrupt Targets Non-secure 194" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS193 ,Interrupt Targets Non-secure 193" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS192 ,Interrupt Targets Non-secure 192" "Secure,Non-secure"
else
hgroup.long 0x398++0x03
hide.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x39C++0x03
line.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7"
bitfld.long 0x00 31. " ITNS255 ,Interrupt Targets Non-secure 255" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS254 ,Interrupt Targets Non-secure 254" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS253 ,Interrupt Targets Non-secure 253" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS252 ,Interrupt Targets Non-secure 252" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS251 ,Interrupt Targets Non-secure 251" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS250 ,Interrupt Targets Non-secure 250" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS249 ,Interrupt Targets Non-secure 249" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS248 ,Interrupt Targets Non-secure 248" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS247 ,Interrupt Targets Non-secure 247" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS246 ,Interrupt Targets Non-secure 246" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS245 ,Interrupt Targets Non-secure 245" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS244 ,Interrupt Targets Non-secure 244" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS243 ,Interrupt Targets Non-secure 243" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS242 ,Interrupt Targets Non-secure 242" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS241 ,Interrupt Targets Non-secure 241" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS240 ,Interrupt Targets Non-secure 240" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS239 ,Interrupt Targets Non-secure 239" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS238 ,Interrupt Targets Non-secure 238" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS237 ,Interrupt Targets Non-secure 237" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS236 ,Interrupt Targets Non-secure 236" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS235 ,Interrupt Targets Non-secure 235" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS234 ,Interrupt Targets Non-secure 234" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS233 ,Interrupt Targets Non-secure 233" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS232 ,Interrupt Targets Non-secure 232" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS231 ,Interrupt Targets Non-secure 231" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS230 ,Interrupt Targets Non-secure 230" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS229 ,Interrupt Targets Non-secure 229" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS228 ,Interrupt Targets Non-secure 228" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS227 ,Interrupt Targets Non-secure 227" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS226 ,Interrupt Targets Non-secure 226" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS225 ,Interrupt Targets Non-secure 225" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS224 ,Interrupt Targets Non-secure 224" "Secure,Non-secure"
else
hgroup.long 0x39C++0x03
hide.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x3A0++0x03
line.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8"
bitfld.long 0x00 31. " ITNS287 ,Interrupt Targets Non-secure 287" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS286 ,Interrupt Targets Non-secure 286" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS285 ,Interrupt Targets Non-secure 285" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS284 ,Interrupt Targets Non-secure 284" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS283 ,Interrupt Targets Non-secure 283" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS282 ,Interrupt Targets Non-secure 282" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS281 ,Interrupt Targets Non-secure 281" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS280 ,Interrupt Targets Non-secure 280" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS279 ,Interrupt Targets Non-secure 279" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS278 ,Interrupt Targets Non-secure 278" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS277 ,Interrupt Targets Non-secure 277" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS276 ,Interrupt Targets Non-secure 276" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS275 ,Interrupt Targets Non-secure 275" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS274 ,Interrupt Targets Non-secure 274" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS273 ,Interrupt Targets Non-secure 273" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS272 ,Interrupt Targets Non-secure 272" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS271 ,Interrupt Targets Non-secure 271" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS270 ,Interrupt Targets Non-secure 270" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS269 ,Interrupt Targets Non-secure 269" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS268 ,Interrupt Targets Non-secure 268" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS267 ,Interrupt Targets Non-secure 267" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS266 ,Interrupt Targets Non-secure 266" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS265 ,Interrupt Targets Non-secure 265" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS264 ,Interrupt Targets Non-secure 264" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS263 ,Interrupt Targets Non-secure 263" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS262 ,Interrupt Targets Non-secure 262" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS261 ,Interrupt Targets Non-secure 261" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS260 ,Interrupt Targets Non-secure 260" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS259 ,Interrupt Targets Non-secure 259" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS258 ,Interrupt Targets Non-secure 258" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS257 ,Interrupt Targets Non-secure 257" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS256 ,Interrupt Targets Non-secure 256" "Secure,Non-secure"
else
hgroup.long 0x3A0++0x03
hide.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x3A4++0x03
line.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9"
bitfld.long 0x00 31. " ITNS319 ,Interrupt Targets Non-secure 319" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS318 ,Interrupt Targets Non-secure 318" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS317 ,Interrupt Targets Non-secure 317" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS316 ,Interrupt Targets Non-secure 316" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS315 ,Interrupt Targets Non-secure 315" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS314 ,Interrupt Targets Non-secure 314" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS313 ,Interrupt Targets Non-secure 313" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS312 ,Interrupt Targets Non-secure 312" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS311 ,Interrupt Targets Non-secure 311" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS310 ,Interrupt Targets Non-secure 310" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS309 ,Interrupt Targets Non-secure 309" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS308 ,Interrupt Targets Non-secure 308" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS307 ,Interrupt Targets Non-secure 307" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS306 ,Interrupt Targets Non-secure 306" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS305 ,Interrupt Targets Non-secure 305" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS304 ,Interrupt Targets Non-secure 304" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS303 ,Interrupt Targets Non-secure 303" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS302 ,Interrupt Targets Non-secure 302" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS301 ,Interrupt Targets Non-secure 301" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS300 ,Interrupt Targets Non-secure 300" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS299 ,Interrupt Targets Non-secure 299" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS298 ,Interrupt Targets Non-secure 298" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS297 ,Interrupt Targets Non-secure 297" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS296 ,Interrupt Targets Non-secure 296" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS295 ,Interrupt Targets Non-secure 295" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS294 ,Interrupt Targets Non-secure 294" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS293 ,Interrupt Targets Non-secure 293" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS292 ,Interrupt Targets Non-secure 292" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS291 ,Interrupt Targets Non-secure 291" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS290 ,Interrupt Targets Non-secure 290" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS289 ,Interrupt Targets Non-secure 289" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS288 ,Interrupt Targets Non-secure 288" "Secure,Non-secure"
else
hgroup.long 0x3A4++0x03
hide.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x3A8++0x03
line.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10"
bitfld.long 0x00 31. " ITNS351 ,Interrupt Targets Non-secure 351" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS350 ,Interrupt Targets Non-secure 350" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS349 ,Interrupt Targets Non-secure 349" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS348 ,Interrupt Targets Non-secure 348" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS347 ,Interrupt Targets Non-secure 347" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS346 ,Interrupt Targets Non-secure 346" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS345 ,Interrupt Targets Non-secure 345" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS344 ,Interrupt Targets Non-secure 344" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS343 ,Interrupt Targets Non-secure 343" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS342 ,Interrupt Targets Non-secure 342" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS341 ,Interrupt Targets Non-secure 341" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS340 ,Interrupt Targets Non-secure 340" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS339 ,Interrupt Targets Non-secure 339" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS338 ,Interrupt Targets Non-secure 338" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS337 ,Interrupt Targets Non-secure 337" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS336 ,Interrupt Targets Non-secure 336" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS335 ,Interrupt Targets Non-secure 335" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS334 ,Interrupt Targets Non-secure 334" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS333 ,Interrupt Targets Non-secure 333" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS332 ,Interrupt Targets Non-secure 332" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS331 ,Interrupt Targets Non-secure 331" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS330 ,Interrupt Targets Non-secure 330" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS329 ,Interrupt Targets Non-secure 329" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS328 ,Interrupt Targets Non-secure 328" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS327 ,Interrupt Targets Non-secure 327" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS326 ,Interrupt Targets Non-secure 326" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS325 ,Interrupt Targets Non-secure 325" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS324 ,Interrupt Targets Non-secure 324" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS323 ,Interrupt Targets Non-secure 323" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS322 ,Interrupt Targets Non-secure 322" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS321 ,Interrupt Targets Non-secure 321" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS320 ,Interrupt Targets Non-secure 320" "Secure,Non-secure"
else
hgroup.long 0x3A8++0x03
hide.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x3AC++0x03
line.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11"
bitfld.long 0x00 31. " ITNS383 ,Interrupt Targets Non-secure 383" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS382 ,Interrupt Targets Non-secure 382" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS381 ,Interrupt Targets Non-secure 381" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS380 ,Interrupt Targets Non-secure 380" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS379 ,Interrupt Targets Non-secure 379" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS378 ,Interrupt Targets Non-secure 378" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS377 ,Interrupt Targets Non-secure 377" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS376 ,Interrupt Targets Non-secure 376" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS375 ,Interrupt Targets Non-secure 375" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS374 ,Interrupt Targets Non-secure 374" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS373 ,Interrupt Targets Non-secure 373" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS372 ,Interrupt Targets Non-secure 372" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS371 ,Interrupt Targets Non-secure 371" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS370 ,Interrupt Targets Non-secure 370" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS369 ,Interrupt Targets Non-secure 369" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS368 ,Interrupt Targets Non-secure 368" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS367 ,Interrupt Targets Non-secure 367" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS366 ,Interrupt Targets Non-secure 366" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS365 ,Interrupt Targets Non-secure 365" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS364 ,Interrupt Targets Non-secure 364" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS363 ,Interrupt Targets Non-secure 363" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS362 ,Interrupt Targets Non-secure 362" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS361 ,Interrupt Targets Non-secure 361" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS360 ,Interrupt Targets Non-secure 360" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS359 ,Interrupt Targets Non-secure 359" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS358 ,Interrupt Targets Non-secure 358" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS357 ,Interrupt Targets Non-secure 357" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS356 ,Interrupt Targets Non-secure 356" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS355 ,Interrupt Targets Non-secure 355" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS354 ,Interrupt Targets Non-secure 354" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS353 ,Interrupt Targets Non-secure 353" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS352 ,Interrupt Targets Non-secure 352" "Secure,Non-secure"
else
hgroup.long 0x3AC++0x03
hide.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x3B0++0x03
line.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12"
bitfld.long 0x00 31. " ITNS415 ,Interrupt Targets Non-secure 415" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS414 ,Interrupt Targets Non-secure 414" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS413 ,Interrupt Targets Non-secure 413" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS412 ,Interrupt Targets Non-secure 412" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS411 ,Interrupt Targets Non-secure 411" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS410 ,Interrupt Targets Non-secure 410" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS409 ,Interrupt Targets Non-secure 409" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS408 ,Interrupt Targets Non-secure 408" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS407 ,Interrupt Targets Non-secure 407" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS406 ,Interrupt Targets Non-secure 406" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS405 ,Interrupt Targets Non-secure 405" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS404 ,Interrupt Targets Non-secure 404" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS403 ,Interrupt Targets Non-secure 403" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS402 ,Interrupt Targets Non-secure 402" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS401 ,Interrupt Targets Non-secure 401" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS400 ,Interrupt Targets Non-secure 400" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS399 ,Interrupt Targets Non-secure 399" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS398 ,Interrupt Targets Non-secure 398" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS397 ,Interrupt Targets Non-secure 397" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS396 ,Interrupt Targets Non-secure 396" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS395 ,Interrupt Targets Non-secure 395" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS394 ,Interrupt Targets Non-secure 394" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS393 ,Interrupt Targets Non-secure 393" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS392 ,Interrupt Targets Non-secure 392" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS391 ,Interrupt Targets Non-secure 391" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS390 ,Interrupt Targets Non-secure 390" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS389 ,Interrupt Targets Non-secure 389" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS388 ,Interrupt Targets Non-secure 388" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS387 ,Interrupt Targets Non-secure 387" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS386 ,Interrupt Targets Non-secure 386" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS385 ,Interrupt Targets Non-secure 385" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS384 ,Interrupt Targets Non-secure 384" "Secure,Non-secure"
else
hgroup.long 0x3B0++0x03
hide.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x3B4++0x03
line.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13"
bitfld.long 0x00 31. " ITNS447 ,Interrupt Targets Non-secure 447" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS446 ,Interrupt Targets Non-secure 446" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS445 ,Interrupt Targets Non-secure 445" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS444 ,Interrupt Targets Non-secure 444" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS443 ,Interrupt Targets Non-secure 443" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS442 ,Interrupt Targets Non-secure 442" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS441 ,Interrupt Targets Non-secure 441" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS440 ,Interrupt Targets Non-secure 440" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS439 ,Interrupt Targets Non-secure 439" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS438 ,Interrupt Targets Non-secure 438" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS437 ,Interrupt Targets Non-secure 437" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS436 ,Interrupt Targets Non-secure 436" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS435 ,Interrupt Targets Non-secure 435" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS434 ,Interrupt Targets Non-secure 434" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS433 ,Interrupt Targets Non-secure 433" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS432 ,Interrupt Targets Non-secure 432" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS431 ,Interrupt Targets Non-secure 431" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS430 ,Interrupt Targets Non-secure 430" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS429 ,Interrupt Targets Non-secure 429" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS428 ,Interrupt Targets Non-secure 428" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS427 ,Interrupt Targets Non-secure 427" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS426 ,Interrupt Targets Non-secure 426" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS425 ,Interrupt Targets Non-secure 425" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS424 ,Interrupt Targets Non-secure 424" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS423 ,Interrupt Targets Non-secure 423" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS422 ,Interrupt Targets Non-secure 422" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS421 ,Interrupt Targets Non-secure 421" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS420 ,Interrupt Targets Non-secure 420" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS419 ,Interrupt Targets Non-secure 419" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS418 ,Interrupt Targets Non-secure 418" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS417 ,Interrupt Targets Non-secure 417" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS416 ,Interrupt Targets Non-secure 416" "Secure,Non-secure"
else
hgroup.long 0x3B4++0x03
hide.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x3B8++0x03
line.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14"
bitfld.long 0x00 31. " ITNS479 ,Interrupt Targets Non-secure 479" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS478 ,Interrupt Targets Non-secure 478" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS477 ,Interrupt Targets Non-secure 477" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS476 ,Interrupt Targets Non-secure 476" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS475 ,Interrupt Targets Non-secure 475" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS474 ,Interrupt Targets Non-secure 474" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS473 ,Interrupt Targets Non-secure 473" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS472 ,Interrupt Targets Non-secure 472" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS471 ,Interrupt Targets Non-secure 471" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS470 ,Interrupt Targets Non-secure 470" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS469 ,Interrupt Targets Non-secure 469" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS468 ,Interrupt Targets Non-secure 468" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS467 ,Interrupt Targets Non-secure 467" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS466 ,Interrupt Targets Non-secure 466" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS465 ,Interrupt Targets Non-secure 465" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS464 ,Interrupt Targets Non-secure 464" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS463 ,Interrupt Targets Non-secure 463" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS462 ,Interrupt Targets Non-secure 462" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS461 ,Interrupt Targets Non-secure 461" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS460 ,Interrupt Targets Non-secure 460" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS459 ,Interrupt Targets Non-secure 459" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS458 ,Interrupt Targets Non-secure 458" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS457 ,Interrupt Targets Non-secure 457" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS456 ,Interrupt Targets Non-secure 456" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS455 ,Interrupt Targets Non-secure 455" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS454 ,Interrupt Targets Non-secure 454" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS453 ,Interrupt Targets Non-secure 453" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS452 ,Interrupt Targets Non-secure 452" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS451 ,Interrupt Targets Non-secure 451" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS450 ,Interrupt Targets Non-secure 450" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS449 ,Interrupt Targets Non-secure 449" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS448 ,Interrupt Targets Non-secure 448" "Secure,Non-secure"
else
hgroup.long 0x3B8++0x03
hide.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x0F)
group.long 0x3BC++0x03
line.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15"
bitfld.long 0x00 31. " ITNS511 ,Interrupt Targets Non-secure 511" "Secure,Non-secure"
bitfld.long 0x00 30. " ITNS510 ,Interrupt Targets Non-secure 510" "Secure,Non-secure"
bitfld.long 0x00 29. " ITNS509 ,Interrupt Targets Non-secure 509" "Secure,Non-secure"
textline " "
bitfld.long 0x00 28. " ITNS508 ,Interrupt Targets Non-secure 508" "Secure,Non-secure"
bitfld.long 0x00 27. " ITNS507 ,Interrupt Targets Non-secure 507" "Secure,Non-secure"
bitfld.long 0x00 26. " ITNS506 ,Interrupt Targets Non-secure 506" "Secure,Non-secure"
textline " "
bitfld.long 0x00 25. " ITNS505 ,Interrupt Targets Non-secure 505" "Secure,Non-secure"
bitfld.long 0x00 24. " ITNS504 ,Interrupt Targets Non-secure 504" "Secure,Non-secure"
bitfld.long 0x00 23. " ITNS503 ,Interrupt Targets Non-secure 503" "Secure,Non-secure"
textline " "
bitfld.long 0x00 22. " ITNS502 ,Interrupt Targets Non-secure 502" "Secure,Non-secure"
bitfld.long 0x00 21. " ITNS501 ,Interrupt Targets Non-secure 501" "Secure,Non-secure"
bitfld.long 0x00 20. " ITNS500 ,Interrupt Targets Non-secure 500" "Secure,Non-secure"
textline " "
bitfld.long 0x00 19. " ITNS499 ,Interrupt Targets Non-secure 499" "Secure,Non-secure"
bitfld.long 0x00 18. " ITNS498 ,Interrupt Targets Non-secure 498" "Secure,Non-secure"
bitfld.long 0x00 17. " ITNS497 ,Interrupt Targets Non-secure 497" "Secure,Non-secure"
textline " "
bitfld.long 0x00 16. " ITNS496 ,Interrupt Targets Non-secure 496" "Secure,Non-secure"
bitfld.long 0x00 15. " ITNS495 ,Interrupt Targets Non-secure 495" "Secure,Non-secure"
bitfld.long 0x00 14. " ITNS494 ,Interrupt Targets Non-secure 494" "Secure,Non-secure"
textline " "
bitfld.long 0x00 13. " ITNS493 ,Interrupt Targets Non-secure 493" "Secure,Non-secure"
bitfld.long 0x00 12. " ITNS492 ,Interrupt Targets Non-secure 492" "Secure,Non-secure"
bitfld.long 0x00 11. " ITNS491 ,Interrupt Targets Non-secure 491" "Secure,Non-secure"
textline " "
bitfld.long 0x00 10. " ITNS490 ,Interrupt Targets Non-secure 490" "Secure,Non-secure"
bitfld.long 0x00 9. " ITNS489 ,Interrupt Targets Non-secure 489" "Secure,Non-secure"
bitfld.long 0x00 8. " ITNS488 ,Interrupt Targets Non-secure 488" "Secure,Non-secure"
textline " "
bitfld.long 0x00 7. " ITNS487 ,Interrupt Targets Non-secure 487" "Secure,Non-secure"
bitfld.long 0x00 6. " ITNS486 ,Interrupt Targets Non-secure 486" "Secure,Non-secure"
bitfld.long 0x00 5. " ITNS485 ,Interrupt Targets Non-secure 485" "Secure,Non-secure"
textline " "
bitfld.long 0x00 4. " ITNS484 ,Interrupt Targets Non-secure 484" "Secure,Non-secure"
bitfld.long 0x00 3. " ITNS483 ,Interrupt Targets Non-secure 483" "Secure,Non-secure"
bitfld.long 0x00 2. " ITNS482 ,Interrupt Targets Non-secure 482" "Secure,Non-secure"
textline " "
bitfld.long 0x00 1. " ITNS481 ,Interrupt Targets Non-secure 481" "Secure,Non-secure"
bitfld.long 0x00 0. " ITNS480 ,Interrupt Targets Non-secure 480" "Secure,Non-secure"
else
hgroup.long 0x3BC++0x03
hide.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15"
endif
tree.end
tree "Interrupt Priority Registers"
group.long 0x400++0x1F
line.long 0x0 "IPR0,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
line.long 0x4 "IPR1,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
line.long 0x8 "IPR2,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
line.long 0xC "IPR3,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
line.long 0x10 "IPR4,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
line.long 0x14 "IPR5,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
line.long 0x18 "IPR6,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
line.long 0x1C "IPR7,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x420++0x1F
line.long 0x0 "IPR8,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
line.long 0x4 "IPR9,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
line.long 0x8 "IPR10,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
line.long 0xC "IPR11,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
line.long 0x10 "IPR12,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
line.long 0x14 "IPR13,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
line.long 0x18 "IPR14,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
line.long 0x1C "IPR15,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
else
hgroup.long 0x420++0x1F
hide.long 0x0 "IPR8,Interrupt Priority Register"
hide.long 0x4 "IPR9,Interrupt Priority Register"
hide.long 0x8 "IPR10,Interrupt Priority Register"
hide.long 0xC "IPR11,Interrupt Priority Register"
hide.long 0x10 "IPR12,Interrupt Priority Register"
hide.long 0x14 "IPR13,Interrupt Priority Register"
hide.long 0x18 "IPR14,Interrupt Priority Register"
hide.long 0x1C "IPR15,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x440++0x1F
line.long 0x0 "IPR16,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
line.long 0x4 "IPR17,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
line.long 0x8 "IPR18,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
line.long 0xC "IPR19,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
line.long 0x10 "IPR20,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
line.long 0x14 "IPR21,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
line.long 0x18 "IPR22,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
line.long 0x1C "IPR23,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
else
hgroup.long 0x440++0x1F
hide.long 0x0 "IPR16,Interrupt Priority Register"
hide.long 0x4 "IPR17,Interrupt Priority Register"
hide.long 0x8 "IPR18,Interrupt Priority Register"
hide.long 0xC "IPR19,Interrupt Priority Register"
hide.long 0x10 "IPR20,Interrupt Priority Register"
hide.long 0x14 "IPR21,Interrupt Priority Register"
hide.long 0x18 "IPR22,Interrupt Priority Register"
hide.long 0x1C "IPR23,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x460++0x1F
line.long 0x0 "IPR24,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
line.long 0x4 "IPR25,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
line.long 0x8 "IPR26,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
line.long 0xC "IPR27,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
line.long 0x10 "IPR28,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
line.long 0x14 "IPR29,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
line.long 0x18 "IPR30,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
line.long 0x1C "IPR31,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
else
hgroup.long 0x460++0x1F
hide.long 0x0 "IPR24,Interrupt Priority Register"
hide.long 0x4 "IPR25,Interrupt Priority Register"
hide.long 0x8 "IPR26,Interrupt Priority Register"
hide.long 0xC "IPR27,Interrupt Priority Register"
hide.long 0x10 "IPR28,Interrupt Priority Register"
hide.long 0x14 "IPR29,Interrupt Priority Register"
hide.long 0x18 "IPR30,Interrupt Priority Register"
hide.long 0x1C "IPR31,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x480++0x1F
line.long 0x0 "IPR32,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
line.long 0x4 "IPR33,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
line.long 0x8 "IPR34,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
line.long 0xC "IPR35,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
line.long 0x10 "IPR36,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
line.long 0x14 "IPR37,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
line.long 0x18 "IPR38,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
line.long 0x1C "IPR39,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
else
hgroup.long 0x480++0x1F
hide.long 0x0 "IPR32,Interrupt Priority Register"
hide.long 0x4 "IPR33,Interrupt Priority Register"
hide.long 0x8 "IPR34,Interrupt Priority Register"
hide.long 0xC "IPR35,Interrupt Priority Register"
hide.long 0x10 "IPR36,Interrupt Priority Register"
hide.long 0x14 "IPR37,Interrupt Priority Register"
hide.long 0x18 "IPR38,Interrupt Priority Register"
hide.long 0x1C "IPR39,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x4A0++0x1F
line.long 0x0 "IPR40,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
line.long 0x4 "IPR41,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
line.long 0x8 "IPR42,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
line.long 0xC "IPR43,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
line.long 0x10 "IPR44,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
line.long 0x14 "IPR45,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
line.long 0x18 "IPR46,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
line.long 0x1C "IPR47,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
else
hgroup.long 0x4A0++0x1F
hide.long 0x0 "IPR40,Interrupt Priority Register"
hide.long 0x4 "IPR41,Interrupt Priority Register"
hide.long 0x8 "IPR42,Interrupt Priority Register"
hide.long 0xC "IPR43,Interrupt Priority Register"
hide.long 0x10 "IPR44,Interrupt Priority Register"
hide.long 0x14 "IPR45,Interrupt Priority Register"
hide.long 0x18 "IPR46,Interrupt Priority Register"
hide.long 0x1C "IPR47,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x4C0++0x1F
line.long 0x0 "IPR48,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
line.long 0x4 "IPR49,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
line.long 0x8 "IPR50,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
line.long 0xC "IPR51,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
line.long 0x10 "IPR52,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
line.long 0x14 "IPR53,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
line.long 0x18 "IPR54,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
line.long 0x1C "IPR55,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
else
hgroup.long 0x4C0++0x1F
hide.long 0x0 "IPR48,Interrupt Priority Register"
hide.long 0x4 "IPR49,Interrupt Priority Register"
hide.long 0x8 "IPR50,Interrupt Priority Register"
hide.long 0xC "IPR51,Interrupt Priority Register"
hide.long 0x10 "IPR52,Interrupt Priority Register"
hide.long 0x14 "IPR53,Interrupt Priority Register"
hide.long 0x18 "IPR54,Interrupt Priority Register"
hide.long 0x1C "IPR55,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x4E0++0x1F
line.long 0x0 "IPR56,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
line.long 0x4 "IPR57,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
line.long 0x8 "IPR58,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
line.long 0xC "IPR59,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
line.long 0x10 "IPR60,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_243 ,Interrupt 243 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_242 ,Interrupt 242 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_241 ,Interrupt 241 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_240 ,Interrupt 240 Priority"
line.long 0x14 "IPR61,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_247 ,Interrupt 247 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_246 ,Interrupt 246 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_245 ,Interrupt 245 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_244 ,Interrupt 244 Priority"
line.long 0x18 "IPR62,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_251 ,Interrupt 251 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_250 ,Interrupt 250 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_249 ,Interrupt 249 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_248 ,Interrupt 248 Priority"
line.long 0x1C "IPR63,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_255 ,Interrupt 255 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_254 ,Interrupt 254 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_253 ,Interrupt 253 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_252 ,Interrupt 252 Priority"
else
hgroup.long 0x4E0++0x1F
hide.long 0x0 "IPR56,Interrupt Priority Register"
hide.long 0x4 "IPR57,Interrupt Priority Register"
hide.long 0x8 "IPR58,Interrupt Priority Register"
hide.long 0xC "IPR59,Interrupt Priority Register"
hide.long 0x10 "IPR60,Interrupt Priority Register"
hide.long 0x14 "IPR61,Interrupt Priority Register"
hide.long 0x18 "IPR62,Interrupt Priority Register"
hide.long 0x1C "IPR63,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x500++0x1F
line.long 0x0 "IPR64,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_259 ,Interrupt 259 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_258 ,Interrupt 258 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_257 ,Interrupt 257 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_256 ,Interrupt 256 Priority"
line.long 0x4 "IPR65,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_263 ,Interrupt 263 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_262 ,Interrupt 262 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_261 ,Interrupt 261 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_260 ,Interrupt 260 Priority"
line.long 0x8 "IPR66,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_267 ,Interrupt 267 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_266 ,Interrupt 266 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_265 ,Interrupt 265 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_264 ,Interrupt 264 Priority"
line.long 0xC "IPR67,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_271 ,Interrupt 271 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_270 ,Interrupt 270 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_269 ,Interrupt 269 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_268 ,Interrupt 268 Priority"
line.long 0x10 "IPR68,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_275 ,Interrupt 275 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_274 ,Interrupt 274 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_273 ,Interrupt 273 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_272 ,Interrupt 272 Priority"
line.long 0x14 "IPR69,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_279 ,Interrupt 279 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_278 ,Interrupt 278 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_277 ,Interrupt 277 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_276 ,Interrupt 276 Priority"
line.long 0x18 "IPR70,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_283 ,Interrupt 283 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_282 ,Interrupt 282 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_281 ,Interrupt 281 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_280 ,Interrupt 280 Priority"
line.long 0x1C "IPR71,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_287 ,Interrupt 287 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_286 ,Interrupt 286 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_285 ,Interrupt 285 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_284 ,Interrupt 284 Priority"
else
hgroup.long 0x500++0x1F
hide.long 0x0 "IPR64,Interrupt Priority Register"
hide.long 0x4 "IPR65,Interrupt Priority Register"
hide.long 0x8 "IPR66,Interrupt Priority Register"
hide.long 0xC "IPR67,Interrupt Priority Register"
hide.long 0x10 "IPR68,Interrupt Priority Register"
hide.long 0x14 "IPR69,Interrupt Priority Register"
hide.long 0x18 "IPR70,Interrupt Priority Register"
hide.long 0x1C "IPR71,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x520++0x1F
line.long 0x0 "IPR72,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_291 ,Interrupt 291 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_290 ,Interrupt 290 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_289 ,Interrupt 289 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_288 ,Interrupt 288 Priority"
line.long 0x4 "IPR73,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_295 ,Interrupt 295 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_294 ,Interrupt 294 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_293 ,Interrupt 293 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_292 ,Interrupt 292 Priority"
line.long 0x8 "IPR74,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_299 ,Interrupt 299 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_298 ,Interrupt 298 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_297 ,Interrupt 297 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_296 ,Interrupt 296 Priority"
line.long 0xC "IPR75,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_303 ,Interrupt 303 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_302 ,Interrupt 302 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_301 ,Interrupt 301 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_300 ,Interrupt 300 Priority"
line.long 0x10 "IPR76,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_307 ,Interrupt 307 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_306 ,Interrupt 306 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_305 ,Interrupt 305 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_304 ,Interrupt 304 Priority"
line.long 0x14 "IPR77,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_311 ,Interrupt 311 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_310 ,Interrupt 310 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_309 ,Interrupt 309 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_308 ,Interrupt 308 Priority"
line.long 0x18 "IPR78,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_315 ,Interrupt 315 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_314 ,Interrupt 314 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_313 ,Interrupt 313 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_312 ,Interrupt 312 Priority"
line.long 0x1C "IPR79,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_319 ,Interrupt 319 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_318 ,Interrupt 318 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_317 ,Interrupt 317 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_316 ,Interrupt 316 Priority"
else
hgroup.long 0x520++0x1F
hide.long 0x0 "IPR72,Interrupt Priority Register"
hide.long 0x4 "IPR73,Interrupt Priority Register"
hide.long 0x8 "IPR74,Interrupt Priority Register"
hide.long 0xC "IPR75,Interrupt Priority Register"
hide.long 0x10 "IPR76,Interrupt Priority Register"
hide.long 0x14 "IPR77,Interrupt Priority Register"
hide.long 0x18 "IPR78,Interrupt Priority Register"
hide.long 0x1C "IPR79,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x540++0x1F
line.long 0x0 "IPR80,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_323 ,Interrupt 323 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_322 ,Interrupt 322 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_321 ,Interrupt 321 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_320 ,Interrupt 320 Priority"
line.long 0x4 "IPR81,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_327 ,Interrupt 327 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_326 ,Interrupt 326 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_325 ,Interrupt 325 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_324 ,Interrupt 324 Priority"
line.long 0x8 "IPR82,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_331 ,Interrupt 331 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_330 ,Interrupt 330 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_329 ,Interrupt 329 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_328 ,Interrupt 328 Priority"
line.long 0xC "IPR83,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_335 ,Interrupt 335 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_334 ,Interrupt 334 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_333 ,Interrupt 333 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_332 ,Interrupt 332 Priority"
line.long 0x10 "IPR84,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_339 ,Interrupt 339 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_338 ,Interrupt 338 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_337 ,Interrupt 337 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_336 ,Interrupt 336 Priority"
line.long 0x14 "IPR85,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_343 ,Interrupt 343 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_342 ,Interrupt 342 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_341 ,Interrupt 341 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_340 ,Interrupt 340 Priority"
line.long 0x18 "IPR86,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_347 ,Interrupt 347 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_346 ,Interrupt 346 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_345 ,Interrupt 345 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_344 ,Interrupt 344 Priority"
line.long 0x1C "IPR87,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_351 ,Interrupt 351 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_350 ,Interrupt 350 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_349 ,Interrupt 349 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_348 ,Interrupt 348 Priority"
else
hgroup.long 0x540++0x1F
hide.long 0x0 "IPR80,Interrupt Priority Register"
hide.long 0x4 "IPR81,Interrupt Priority Register"
hide.long 0x8 "IPR82,Interrupt Priority Register"
hide.long 0xC "IPR83,Interrupt Priority Register"
hide.long 0x10 "IPR84,Interrupt Priority Register"
hide.long 0x14 "IPR85,Interrupt Priority Register"
hide.long 0x18 "IPR86,Interrupt Priority Register"
hide.long 0x1C "IPR87,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x560++0x1F
line.long 0x0 "IPR88,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_355 ,Interrupt 355 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_354 ,Interrupt 354 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_353 ,Interrupt 353 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_352 ,Interrupt 352 Priority"
line.long 0x4 "IPR89,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_359 ,Interrupt 359 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_358 ,Interrupt 358 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_357 ,Interrupt 357 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_356 ,Interrupt 356 Priority"
line.long 0x8 "IPR90,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_363 ,Interrupt 363 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_362 ,Interrupt 362 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_361 ,Interrupt 361 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_360 ,Interrupt 360 Priority"
line.long 0xC "IPR91,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_367 ,Interrupt 367 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_366 ,Interrupt 366 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_365 ,Interrupt 365 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_364 ,Interrupt 364 Priority"
line.long 0x10 "IPR92,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_371 ,Interrupt 371 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_370 ,Interrupt 370 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_369 ,Interrupt 369 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_368 ,Interrupt 368 Priority"
line.long 0x14 "IPR93,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_375 ,Interrupt 375 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_374 ,Interrupt 374 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_373 ,Interrupt 373 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_372 ,Interrupt 372 Priority"
line.long 0x18 "IPR94,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_379 ,Interrupt 379 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_378 ,Interrupt 378 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_377 ,Interrupt 377 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_376 ,Interrupt 376 Priority"
line.long 0x1C "IPR95,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_383 ,Interrupt 383 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_382 ,Interrupt 382 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_381 ,Interrupt 381 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_380 ,Interrupt 380 Priority"
else
hgroup.long 0x560++0x1F
hide.long 0x0 "IPR88,Interrupt Priority Register"
hide.long 0x4 "IPR89,Interrupt Priority Register"
hide.long 0x8 "IPR90,Interrupt Priority Register"
hide.long 0xC "IPR91,Interrupt Priority Register"
hide.long 0x10 "IPR92,Interrupt Priority Register"
hide.long 0x14 "IPR93,Interrupt Priority Register"
hide.long 0x18 "IPR94,Interrupt Priority Register"
hide.long 0x1C "IPR95,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x580++0x1F
line.long 0x0 "IPR96,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_387 ,Interrupt 387 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_386 ,Interrupt 386 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_385 ,Interrupt 385 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_384 ,Interrupt 384 Priority"
line.long 0x4 "IPR97,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_391 ,Interrupt 391 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_390 ,Interrupt 390 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_389 ,Interrupt 389 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_388 ,Interrupt 388 Priority"
line.long 0x8 "IPR98,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_395 ,Interrupt 395 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_394 ,Interrupt 394 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_393 ,Interrupt 393 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_392 ,Interrupt 392 Priority"
line.long 0xC "IPR99,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_399 ,Interrupt 399 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_398 ,Interrupt 398 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_397 ,Interrupt 397 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_396 ,Interrupt 396 Priority"
line.long 0x10 "IPR100,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_403 ,Interrupt 403 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_402 ,Interrupt 402 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_401 ,Interrupt 401 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_400 ,Interrupt 400 Priority"
line.long 0x14 "IPR101,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_407 ,Interrupt 407 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_406 ,Interrupt 406 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_405 ,Interrupt 405 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_404 ,Interrupt 404 Priority"
line.long 0x18 "IPR102,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_411 ,Interrupt 411 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_410 ,Interrupt 410 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_409 ,Interrupt 409 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_408 ,Interrupt 408 Priority"
line.long 0x1C "IPR103,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_415 ,Interrupt 415 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_414 ,Interrupt 414 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_413 ,Interrupt 413 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_412 ,Interrupt 412 Priority"
else
hgroup.long 0x580++0x1F
hide.long 0x0 "IPR96,Interrupt Priority Register"
hide.long 0x4 "IPR97,Interrupt Priority Register"
hide.long 0x8 "IPR98,Interrupt Priority Register"
hide.long 0xC "IPR99,Interrupt Priority Register"
hide.long 0x10 "IPR100,Interrupt Priority Register"
hide.long 0x14 "IPR101,Interrupt Priority Register"
hide.long 0x18 "IPR102,Interrupt Priority Register"
hide.long 0x1C "IPR103,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x5A0++0x1F
line.long 0x0 "IPR104,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_419 ,Interrupt 419 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_418 ,Interrupt 418 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_417 ,Interrupt 417 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_416 ,Interrupt 416 Priority"
line.long 0x4 "IPR105,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_423 ,Interrupt 423 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_422 ,Interrupt 422 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_421 ,Interrupt 421 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_420 ,Interrupt 420 Priority"
line.long 0x8 "IPR106,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_427 ,Interrupt 427 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_426 ,Interrupt 426 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_425 ,Interrupt 425 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_424 ,Interrupt 424 Priority"
line.long 0xC "IPR107,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_431 ,Interrupt 431 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_430 ,Interrupt 430 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_429 ,Interrupt 429 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_428 ,Interrupt 428 Priority"
line.long 0x10 "IPR108,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_435 ,Interrupt 435 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_434 ,Interrupt 434 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_433 ,Interrupt 433 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_432 ,Interrupt 432 Priority"
line.long 0x14 "IPR109,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_439 ,Interrupt 439 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_438 ,Interrupt 438 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_437 ,Interrupt 437 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_436 ,Interrupt 436 Priority"
line.long 0x18 "IPR110,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_443 ,Interrupt 443 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_442 ,Interrupt 442 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_441 ,Interrupt 441 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_440 ,Interrupt 440 Priority"
line.long 0x1C "IPR111,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_447 ,Interrupt 447 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_446 ,Interrupt 446 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_445 ,Interrupt 445 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_444 ,Interrupt 444 Priority"
else
hgroup.long 0x5A0++0x1F
hide.long 0x0 "IPR104,Interrupt Priority Register"
hide.long 0x4 "IPR105,Interrupt Priority Register"
hide.long 0x8 "IPR106,Interrupt Priority Register"
hide.long 0xC "IPR107,Interrupt Priority Register"
hide.long 0x10 "IPR108,Interrupt Priority Register"
hide.long 0x14 "IPR109,Interrupt Priority Register"
hide.long 0x18 "IPR110,Interrupt Priority Register"
hide.long 0x1C "IPR111,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x5C0++0x1F
line.long 0x0 "IPR112,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_451 ,Interrupt 451 Priority"
hexmask.long.byte 0x0 16.--23. 1. " PRI_450 ,Interrupt 450 Priority"
hexmask.long.byte 0x0 8.--15. 1. " PRI_449 ,Interrupt 449 Priority"
hexmask.long.byte 0x0 0.--7. 1. " PRI_448 ,Interrupt 448 Priority"
line.long 0x4 "IPR113,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_455 ,Interrupt 455 Priority"
hexmask.long.byte 0x4 16.--23. 1. " PRI_454 ,Interrupt 454 Priority"
hexmask.long.byte 0x4 8.--15. 1. " PRI_453 ,Interrupt 453 Priority"
hexmask.long.byte 0x4 0.--7. 1. " PRI_452 ,Interrupt 452 Priority"
line.long 0x8 "IPR114,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_459 ,Interrupt 459 Priority"
hexmask.long.byte 0x8 16.--23. 1. " PRI_458 ,Interrupt 458 Priority"
hexmask.long.byte 0x8 8.--15. 1. " PRI_457 ,Interrupt 457 Priority"
hexmask.long.byte 0x8 0.--7. 1. " PRI_456 ,Interrupt 456 Priority"
line.long 0xC "IPR115,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_463 ,Interrupt 463 Priority"
hexmask.long.byte 0xC 16.--23. 1. " PRI_462 ,Interrupt 462 Priority"
hexmask.long.byte 0xC 8.--15. 1. " PRI_461 ,Interrupt 461 Priority"
hexmask.long.byte 0xC 0.--7. 1. " PRI_460 ,Interrupt 460 Priority"
line.long 0x10 "IPR116,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_467 ,Interrupt 467 Priority"
hexmask.long.byte 0x10 16.--23. 1. " PRI_466 ,Interrupt 466 Priority"
hexmask.long.byte 0x10 8.--15. 1. " PRI_465 ,Interrupt 465 Priority"
hexmask.long.byte 0x10 0.--7. 1. " PRI_464 ,Interrupt 464 Priority"
line.long 0x14 "IPR117,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_471 ,Interrupt 471 Priority"
hexmask.long.byte 0x14 16.--23. 1. " PRI_470 ,Interrupt 470 Priority"
hexmask.long.byte 0x14 8.--15. 1. " PRI_469 ,Interrupt 469 Priority"
hexmask.long.byte 0x14 0.--7. 1. " PRI_468 ,Interrupt 468 Priority"
line.long 0x18 "IPR118,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_475 ,Interrupt 475 Priority"
hexmask.long.byte 0x18 16.--23. 1. " PRI_474 ,Interrupt 474 Priority"
hexmask.long.byte 0x18 8.--15. 1. " PRI_473 ,Interrupt 473 Priority"
hexmask.long.byte 0x18 0.--7. 1. " PRI_472 ,Interrupt 472 Priority"
line.long 0x1C "IPR119,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_479 ,Interrupt 479 Priority"
hexmask.long.byte 0x1C 16.--23. 1. " PRI_478 ,Interrupt 478 Priority"
hexmask.long.byte 0x1C 8.--15. 1. " PRI_477 ,Interrupt 477 Priority"
hexmask.long.byte 0x1C 0.--7. 1. " PRI_476 ,Interrupt 476 Priority"
else
hgroup.long 0x5C0++0x1F
hide.long 0x0 "IPR112,Interrupt Priority Register"
hide.long 0x4 "IPR113,Interrupt Priority Register"
hide.long 0x8 "IPR114,Interrupt Priority Register"
hide.long 0xC "IPR115,Interrupt Priority Register"
hide.long 0x10 "IPR116,Interrupt Priority Register"
hide.long 0x14 "IPR117,Interrupt Priority Register"
hide.long 0x18 "IPR118,Interrupt Priority Register"
hide.long 0x1C "IPR119,Interrupt Priority Register"
endif
tree.end
width 0x0b
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
sif (CORENAME()=="CORTEXM33F")
tree "Floating-point Unit (FPU)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 8.
group.long 0xF34++0x0B
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
bitfld.long 0x00 29. " LSPENS ,This bit controls whether the LSPEN bit is writeable from the Non-secure state" "Writeable,Write ignored"
newline
bitfld.long 0x00 28. " CLRONRET ,Clear floating point caller saved registers on exception return" "Disabled,Enabled"
bitfld.long 0x00 27. " CLRONRETS ,Clear on return Secure only" "Both states,Secure only"
bitfld.long 0x00 26. " TS ,Treat as Secure" "Disabled,Enabled"
newline
bitfld.long 0x00 10. " UFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the UsageFault exception to pending" "Not able,Able"
bitfld.long 0x00 9. " SPLIMVIOL ,Indicates whether the FP context violates the stack pointer limit that was active when lazy state preservation was activated" "Low,High"
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
newline
bitfld.long 0x00 7. " SFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the SecureFault exception to pending" "Not able,Able"
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
newline
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
bitfld.long 0x00 2. " S ,Indicates the FP context belongs to the specified security state" "Non-secure,Secure"
newline
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
newline
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
rgroup.long 0xF40++0x0B
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
newline
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
newline
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Fully denormalized,?..."
line.long 0x08 "MVFR2,Media and FP Feature Register 2"
bitfld.long 0x08 4.--7. " VFP_MISC ,Indicates the hardware support for FP miscellaneous features" "Not supported,,,,Supported,?..."
width 0xB
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
endif
tree "Debug"
tree "Core Debug"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 13.
group.long 0xD30++0x03
line.long 0x00 "DFSR,Debug Fault Status Register"
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
newline
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
newline
hgroup.long 0xDF0++0x03
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
in
newline
wgroup.long 0xDF4++0x03
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write"
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register, special-purpose register or Floating-point extension register"
group.long 0xDF8++0x03
line.long 0x00 "DCRDR,Debug Core Register Data Register"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
group.long 0xDFC++0x03
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure"
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
newline
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled"
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
newline
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
newline
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
else
group.long 0xDFC++0x03
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure"
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
newline
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled"
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
newline
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
newline
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
endif
newline
group.long 0xE04++0x07
line.long 0x00 "DAUTHCTRL,Debug Authentication Control Register"
bitfld.long 0x00 3. " INTSPNIDEN ,Internal secure non-invasive debug enable" "Disabled,Enabled"
bitfld.long 0x00 2. " SPNIDENSEL ,Secure non-invasive debug enable select.Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure non-invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPNIDEN"
bitfld.long 0x00 1. " INTSPIDEN ,Internal secure invasive debug enable" "Disabled,Enabled"
bitfld.long 0x00 0. " SPIDENSEL ,Secure invasive debug enable select. Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPIDEN"
line.long 0x04 "DSCSR,Debug Security Control and Status Register"
bitfld.long 0x04 16. " CDS ,This field indicates the current security state of the processor" "Non-secure,Secure"
bitfld.long 0x04 1. " SBRSEL ,Secure banked register select" "Non-secure,Secure"
bitfld.long 0x04 0. " SBRSELEN ,Secure banked register select enable" "Disabled,Enabled"
rgroup.long 0xFB8++0x03
line.long 0x00 "DAUTHSTATUS,Debug Authentication Status Register"
bitfld.long 0x00 7. " SNI ,Secure non-invasive debug implemented" ",Implemented"
bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enabled" "0,1"
bitfld.long 0x00 5. " SI ,Secure invasive debug features implemented" ",Implemented"
bitfld.long 0x00 4. " SE ,Secure invasive debug enabled" "0,1"
newline
bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implemented" ",Implemented"
bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enabled" "0,1"
bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implemented" ",Implemented"
bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enabled" "0,1"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Flash Patch and Breakpoint Unit (FPB)"
sif COMPonent.AVAILABLE("FPB")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
width 12.
group.long 0x00++0x03
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Reserved,Version 2,?..."
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,?..."
rbitfld.long 0x00 8.--11. " NUM_LIT ,Number of literal comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
textline " "
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x04))&0x20000000)==0x20000000)
rgroup.long 0x04++0x03
line.long 0x00 "FP_REMAP,Flash Patch Remap Register"
bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported"
hexmask.long 0x00 5.--28. 0x20 " REMAP ,Remap address"
else
rgroup.long 0x04++0x03
line.long 0x00 "FP_REMAP,Flash Patch Remap Register"
bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
group.long 0x8++0x03
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x8++0x03
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
group.long 0xC++0x03
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0xC++0x03
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
group.long 0x10++0x03
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x10++0x03
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
group.long 0x14++0x03
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x14++0x03
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
group.long 0x18++0x03
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x18++0x03
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
group.long 0x1C++0x03
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x1C++0x03
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
group.long 0x20++0x03
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x20++0x03
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
group.long 0x24++0x03
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x24++0x03
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
textfld " "
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
tree "CoreSight Identification Registers"
width 12.
rgroup.long 0xFCC++0x03
line.long 0x00 "FP_DEVTYPE,FPB CoreSight Device Type Register"
hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type"
hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xFBC))&0x100000)==0x100000)
rgroup.long 0xFBC++0x03
line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register"
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
else
rgroup.long 0xFBC++0x03
line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
endif
rgroup.long 0xFE0++0x0F
line.long 0x00 "FP_PIDR0,Peripheral ID0"
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
line.long 0x04 "FP_PIDR1,Peripheral ID1"
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
line.long 0x08 "FP_PIDR2,Peripheral ID2"
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
line.long 0x0C "FP_PIDR3,Peripheral ID3"
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
rgroup.long 0xFD0++0x03
line.long 0x00 "FP_PIDR4,Peripheral Identification Register 4"
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
rgroup.long 0xFF0++0x0F
line.long 0x00 "FP_CIDR0,Component ID0 (Preamble)"
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
line.long 0x04 "FP_CIDR1,Component ID1"
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
line.long 0x08 "FP_CIDR2,Component ID2"
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
line.long 0x0c "FP_CIDR3,Component ID3"
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
tree.end
width 0x0b
else
newline
textline "FPB component base address not specified"
newline
endif
tree.end
tree "Data Watchpoint and Trace Unit (DWT)"
sif COMPonent.AVAILABLE("DWT")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
width 16.
group.long 0x00++0x03
line.long 0x00 "DWT_CTRL,Control Register"
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,?..."
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
textline " "
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
bitfld.long 0x00 23. " CYCDISS ,Controls whether the cycle counter is prevented from incrementing while the PE is in Secure state" "No,Yes"
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
textline " "
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
textline " "
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
textline " "
bitfld.long 0x00 12. " PCSAMPLENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
textline " "
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x1000000)==0x0000000)
group.long 0x04++0x03
line.long 0x00 "DWT_CYCCNT,Cycle Count register"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x2000000)==0x0000000)
group.long 0x08++0x17
line.long 0x00 "DWT_CPICNT,CPI Count register"
hexmask.long.byte 0x00 0.--7. 1. " CPICNT ,Base instruction overhead counter"
line.long 0x04 "DWT_EXCCNT,Exception Overhead Count Register"
hexmask.long.byte 0x04 0.--7. 1. " EXCCNT ,The exception overhead counter"
line.long 0x08 "DWT_SLEEPCNT,Sleep Count Register"
hexmask.long.byte 0x08 0.--7. 1. " SLEEPCNT ,Sleep Counter"
line.long 0x10 "DWT_LSUCNT,LSU Count Register"
hexmask.long.byte 0x10 0.--7. 1. " LSUCNT ,Load-store overhead counter"
line.long 0x14 "DWT_FOLDCNT,Folded-instruction Count register"
hexmask.long.byte 0x14 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
endif
rgroup.long 0x1C++0x03
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
textline " "
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)==0x1)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x4)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xC)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xF)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
else
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
endif
group.long (0x20+0x08)++0x03
line.long 0x00 "DWT_FUNCTION0,DWT Function Register 0"
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline " "
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)==0x1)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x4)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xC)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xF)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
else
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
endif
group.long (0x30+0x08)++0x03
line.long 0x00 "DWT_FUNCTION1,DWT Function Register 1"
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline " "
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)==0x1)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x4)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xC)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xF)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
else
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
endif
group.long (0x40+0x08)++0x03
line.long 0x00 "DWT_FUNCTION2,DWT Function Register 2"
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline " "
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)==0x1)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x4)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xC)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xF)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address"
else
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
endif
group.long (0x50+0x08)++0x03
line.long 0x00 "DWT_FUNCTION3,DWT Function Register 3"
bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline " "
bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
tree "CoreSight Identification Registers"
width 13.
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xFBC))&0x100000)==0x100000)
rgroup.long 0xFBC++0x03
line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register"
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part"
else
rgroup.long 0xFBC++0x03
line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register"
bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present"
endif
rgroup.long 0xFCC++0x03
line.long 0x00 "DWT_DEVTYPE,Device Type Identifier register"
hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type"
hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type"
rgroup.long 0xFE0++0x0F
line.long 0x00 "DWT_PIDR0,Peripheral ID0"
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
line.long 0x04 "DWT_PIDR1,Peripheral ID1"
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
line.long 0x08 "DWT_PIDR2,Peripheral ID2"
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
line.long 0x0c "DWT_PIDR3,Peripheral ID3"
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
rgroup.long 0xFD0++0x03
line.long 0x00 "DWT_PIDR4,Peripheral Identification Register 4"
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
rgroup.long 0xFF0++0x0F
line.long 0x00 "DWT_CIDR0,Component ID0 (Preamble)"
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble"
line.long 0x04 "DWT_CIDR1,Component ID1"
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class"
line.long 0x08 "DWT_CIDR2,Component ID2"
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble"
line.long 0x0c "DWT_CIDR3,Component ID3"
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble"
tree.end
width 0x0b
else
newline
textline "DWT component base address not specified"
newline
endif
tree.end
tree.end
AUTOINDENT.POP
tree.end
tree "ADC (Analog-to-Digital Converter)"
base ad:0x0
tree "ADC1"
base ad:0x42028000
group.long 0x0++0x1F
line.long 0x0 "ADC_ISR,ADC interrupt and status register"
rbitfld.long 0x0 12. "LDORDY,ADC internal voltage regulator output ready flag" "0: ADC LDO internal voltage regulator disabled,1: ADC LDO internal voltage regulator enabled"
bitfld.long 0x0 10. "JQOVF,Injected context queue overflow" "0: No injected context queue overflow occurred (or..,1: Injected context queue overflow has occurred"
newline
bitfld.long 0x0 9. "AWD3,Analog watchdog 3 flag" "0: No analog watchdog 3 event occurred (or the flag..,1: Analog watchdog 3 event occurred"
bitfld.long 0x0 8. "AWD2,Analog watchdog 2 flag" "0: No analog watchdog 2 event occurred (or the flag..,1: Analog watchdog 2 event occurred"
newline
bitfld.long 0x0 7. "AWD1,Analog watchdog 1 flag" "0: No analog watchdog 1 event occurred (or the flag..,1: Analog watchdog 1 event occurred"
bitfld.long 0x0 6. "JEOS,Injected channel end of sequence flag" "0: Injected conversion sequence not complete (or..,1: Injected conversions complete"
newline
bitfld.long 0x0 5. "JEOC,Injected channel end of conversion flag" "0: Injected channel conversion not complete (or the..,1: Injected channel conversion complete"
bitfld.long 0x0 4. "OVR,ADC overrun" "0: No overrun occurred (or the flag event was..,1: Overrun has occurred"
newline
bitfld.long 0x0 3. "EOS,End of regular sequence flag" "0: Regular Conversions sequence not complete (or..,1: Regular Conversions sequence complete"
bitfld.long 0x0 2. "EOC,End of conversion flag" "0: Regular channel conversion not complete (or the..,1: Regular channel conversion complete"
newline
bitfld.long 0x0 1. "EOSMP,End of sampling flag" "0: not at the end of the sampling phase (or the..,1: End of sampling phase reached"
bitfld.long 0x0 0. "ADRDY,ADC ready" "0: ADC not yet ready to start conversion (or the..,1: ADC is ready to start conversion"
line.long 0x4 "ADC_IER,ADC interrupt enable register"
bitfld.long 0x4 12. "LDORDYIE,ADC internal voltage regulator interrupt enable" "0: Internal voltage regulator interrupt disabled,1: Internal voltage regulator interrupt enabled"
bitfld.long 0x4 10. "JQOVFIE,Injected context queue overflow interrupt enable" "0: Injected context queue overflow interrupt disabled,1: Injected context queue overflow interrupt enabled."
newline
bitfld.long 0x4 9. "AWD3IE,Analog watchdog 3 interrupt enable" "0: Analog watchdog 3 interrupt disabled,1: Analog watchdog 3 interrupt enabled"
bitfld.long 0x4 8. "AWD2IE,Analog watchdog 2 interrupt enable" "0: Analog watchdog 2 interrupt disabled,1: Analog watchdog 2 interrupt enabled"
newline
bitfld.long 0x4 7. "AWD1IE,Analog watchdog 1 interrupt enable" "0: Analog watchdog 1 interrupt disabled,1: Analog watchdog 1 interrupt enabled"
bitfld.long 0x4 6. "JEOSIE,End of injected sequence of conversions interrupt enable" "0: JEOS interrupt disabled,1: JEOS interrupt enabled."
newline
bitfld.long 0x4 5. "JEOCIE,End of injected conversion interrupt enable" "0: JEOC interrupt disabled.,1: JEOC interrupt enabled."
bitfld.long 0x4 4. "OVRIE,Overrun interrupt enable" "0: Overrun interrupt disabled,1: Overrun interrupt enabled."
newline
bitfld.long 0x4 3. "EOSIE,End of regular sequence of conversions interrupt enable" "0: EOS interrupt disabled,1: EOS interrupt enabled."
bitfld.long 0x4 2. "EOCIE,End of regular conversion interrupt enable" "0: EOC interrupt disabled.,1: EOC interrupt enabled."
newline
bitfld.long 0x4 1. "EOSMPIE,End of sampling flag interrupt enable for regular conversions" "0: EOSMP interrupt disabled.,1: EOSMP interrupt enabled."
bitfld.long 0x4 0. "ADRDYIE,ADC ready interrupt enable" "0: ADRDY interrupt disabled,1: ADRDY interrupt enabled."
line.long 0x8 "ADC_CR,ADC control register"
bitfld.long 0x8 31. "ADCAL,ADC calibration" "0: Normal mode,1: Calibration mode"
bitfld.long 0x8 30. "ADCALDIF,Differential mode for calibration" "0: Single-ended input calibration mode when ADCAL=1,1: Differential input calibration mode when ADCAL=1"
newline
bitfld.long 0x8 29. "DEEPPWD,Deep-power-down enable" "0: ADC not in Deep-power down,1: ADC in Deep-power-down (default reset state)"
bitfld.long 0x8 28. "ADVREGEN,ADC internal voltage regulator enable" "0: ADC internal voltage regulator disabled,1: ADC internal voltage regulator enabled."
newline
bitfld.long 0x8 5. "JADSTP,ADC stop of injected conversion command" "0: No ADC stop injected conversion command ongoing,1: Write 1 to stop injected conversions ongoing."
bitfld.long 0x8 4. "ADSTP,ADC stop of regular conversion command" "0: No ADC stop regular conversion command ongoing,1: Write 1 to stop ongoing regular conversions."
newline
bitfld.long 0x8 3. "JADSTART,ADC start of injected conversion" "0: No ADC injected conversion is ongoing.,1: Write 1 to start injected conversions."
bitfld.long 0x8 2. "ADSTART,ADC start of regular conversion" "0: No ADC regular conversion is ongoing.,1: Write 1 to start regular conversions."
newline
bitfld.long 0x8 1. "ADDIS,ADC disable command" "0: no ADDIS command ongoing,1: Write 1 to disable the ADC."
bitfld.long 0x8 0. "ADEN,ADC enable control" "0: ADC is disabled (OFF state),1: Write 1 to enable the ADC."
line.long 0xC "ADC_CFGR1,ADC configuration register"
bitfld.long 0xC 31. "JQDIS,Injected queue disable" "0: Injected queue enabled,1: Injected queue disabled"
hexmask.long.byte 0xC 26.--30. 1. "AWD1CH,Analog watchdog 1 channel selection"
newline
bitfld.long 0xC 25. "JAUTO,Automatic injected group conversion" "0: Automatic injected group conversion disabled,1: Automatic injected group conversion enabled"
bitfld.long 0xC 24. "JAWD1EN,Analog watchdog 1 enable on injected channels" "0: Analog watchdog 1 disabled on injected channels,1: Analog watchdog 1 enabled on injected channels"
newline
bitfld.long 0xC 23. "AWD1EN,Analog watchdog 1 enable on regular channels" "0: Analog watchdog 1 disabled on regular channels,1: Analog watchdog 1 enabled on regular channels"
bitfld.long 0xC 22. "AWD1SGL,Enable the watchdog 1 on a single channel or on all channels" "0: Analog watchdog 1 enabled on all channels,1: Analog watchdog 1 enabled on a single channel"
newline
bitfld.long 0xC 21. "JQM,JSQR queue mode" "0: JSQR mode 0: The Queue is never empty and..,1: JSQR mode 1: The Queue can be empty and when.."
bitfld.long 0xC 20. "JDISCEN,Discontinuous mode on injected channels" "0: Discontinuous mode on injected channels disabled,1: Discontinuous mode on injected channels enabled"
newline
bitfld.long 0xC 17.--19. "DISCNUM,Discontinuous mode channel count" "0: 1 channel,1: 2 channels,?,?,?,?,?,7: 8 channels"
bitfld.long 0xC 16. "DISCEN,Discontinuous mode for regular channels" "0: Discontinuous mode for regular channels disabled,1: Discontinuous mode for regular channels enabled"
newline
bitfld.long 0xC 14. "AUTDLY,Delayed conversion mode" "0: Auto-delayed conversion mode off,1: Auto-delayed conversion mode on"
bitfld.long 0xC 13. "CONT,Single / continuous conversion mode for regular conversions" "0: Single conversion mode,1: Continuous conversion mode"
newline
bitfld.long 0xC 12. "OVRMOD,Overrun mode" "0: ADC_DR register is preserved with the old data..,1: ADC_DR register is overwritten with the last.."
bitfld.long 0xC 10.--11. "ExTEN,External trigger enable and polarity selection for regular channels" "0: Hardware trigger detection disabled (conversions..,1: Hardware trigger detection on the rising edge,2: Hardware trigger detection on the falling edge,3: Hardware trigger detection on both the rising.."
newline
hexmask.long.byte 0xC 5.--9. 1. "ExTSEL,External trigger selection for regular group"
bitfld.long 0xC 2.--3. "RES,Data resolution" "0: 12-bit,1: 10-bit,2: 8-bit,3: 6-bit"
newline
bitfld.long 0xC 0.--1. "DMNGT,Data management configuration" "0: Regular conversion data stored in DR only,1: DMA one-shot mode selected,2: MDF mode detected,3: DMA circular mode selected"
line.long 0x10 "ADC_CFGR2,ADC configuration register 2"
hexmask.long.byte 0x10 28.--31. 1. "LSHIFT,Left shift factor"
hexmask.long.word 0x10 16.--25. 1. "OVSR,Oversampling ratio"
newline
bitfld.long 0x10 15. "SMPTRIG,Sampling time control trigger mode" "0: Sampling time control trigger mode disabled,1: Sampling time control trigger mode enabled"
bitfld.long 0x10 14. "SWTRIG,Software trigger bit for sampling time control trigger mode" "0: Software trigger starts the conversion for..,1: Software trigger starts the sampling for.."
newline
bitfld.long 0x10 13. "BULB,Bulb sampling mode" "0: Bulb sampling mode disabled,1: Bulb sampling mode enabled."
bitfld.long 0x10 10. "ROVSM,Regular oversampling mode" "0: Continued mode: When injected conversions are..,1: Resumed mode: When injected conversions are.."
newline
bitfld.long 0x10 9. "TROVS,Triggered regular oversampling" "0: All oversampled conversions for a channel are..,1: Each oversampled conversion for a channel needs.."
hexmask.long.byte 0x10 5.--8. 1. "OVSS,Oversampling shift"
newline
bitfld.long 0x10 1. "JOVSE,Injected oversampling enable" "0: Injected oversampling disabled,1: Injected oversampling enabled"
bitfld.long 0x10 0. "ROVSE,Regular oversampling enable" "0: Regular oversampling disabled,1: Regular oversampling enabled"
line.long 0x14 "ADC_SMPR1,ADC sample time register 1"
bitfld.long 0x14 27.--29. "SMP9,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x14 24.--26. "SMP8,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
newline
bitfld.long 0x14 21.--23. "SMP7,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x14 18.--20. "SMP6,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
newline
bitfld.long 0x14 15.--17. "SMP5,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x14 12.--14. "SMP4,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
newline
bitfld.long 0x14 9.--11. "SMP3,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x14 6.--8. "SMP2,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
newline
bitfld.long 0x14 3.--5. "SMP1,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x14 0.--2. "SMP0,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
line.long 0x18 "ADC_SMPR2,ADC sample time register 2"
bitfld.long 0x18 27.--29. "SMP19,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x18 24.--26. "SMP18,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
newline
bitfld.long 0x18 21.--23. "SMP17,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x18 18.--20. "SMP16,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
newline
bitfld.long 0x18 15.--17. "SMP15,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x18 12.--14. "SMP14,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
newline
bitfld.long 0x18 9.--11. "SMP13,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x18 6.--8. "SMP12,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
newline
bitfld.long 0x18 3.--5. "SMP11,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x18 0.--2. "SMP10,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
line.long 0x1C "ADC_PCSEL,ADC channel preselection register"
hexmask.long.tbyte 0x1C 0.--18. 1. "PCSEL,Channel i (Vless thansub>INPless than/sub>[i]) preselection"
group.long 0x30++0xF
line.long 0x0 "ADC_SQR1,ADC regular sequence register 1"
hexmask.long.byte 0x0 24.--28. 1. "SQ4,4th conversion in regular sequence"
hexmask.long.byte 0x0 18.--22. 1. "SQ3,3rd conversion in regular sequence"
newline
hexmask.long.byte 0x0 12.--16. 1. "SQ2,2nd conversion in regular sequence"
hexmask.long.byte 0x0 6.--10. 1. "SQ1,1st conversion in regular sequence"
newline
hexmask.long.byte 0x0 0.--3. 1. "L,Regular channel sequence length"
line.long 0x4 "ADC_SQR2,ADC regular sequence register 2"
hexmask.long.byte 0x4 24.--28. 1. "SQ9,9th conversion in regular sequence"
hexmask.long.byte 0x4 18.--22. 1. "SQ8,8th conversion in regular sequence"
newline
hexmask.long.byte 0x4 12.--16. 1. "SQ7,7th conversion in regular sequence"
hexmask.long.byte 0x4 6.--10. 1. "SQ6,6th conversion in regular sequence"
newline
hexmask.long.byte 0x4 0.--4. 1. "SQ5,5th conversion in regular sequence"
line.long 0x8 "ADC_SQR3,ADC regular sequence register 3"
hexmask.long.byte 0x8 24.--28. 1. "SQ14,14th conversion in regular sequence"
hexmask.long.byte 0x8 18.--22. 1. "SQ13,13th conversion in regular sequence"
newline
hexmask.long.byte 0x8 12.--16. 1. "SQ12,12th conversion in regular sequence"
hexmask.long.byte 0x8 6.--10. 1. "SQ11,11th conversion in regular sequence"
newline
hexmask.long.byte 0x8 0.--4. 1. "SQ10,10th conversion in regular sequence"
line.long 0xC "ADC_SQR4,ADC regular sequence register 4"
hexmask.long.byte 0xC 6.--10. 1. "SQ16,16th conversion in regular sequence"
hexmask.long.byte 0xC 0.--4. 1. "SQ15,15th conversion in regular sequence"
rgroup.long 0x40++0x3
line.long 0x0 "ADC_DR,ADC regular data register"
hexmask.long 0x0 0.--31. 1. "RDATA,Regular data converted"
group.long 0x4C++0x27
line.long 0x0 "ADC_JSQR,ADC injected sequence register"
hexmask.long.byte 0x0 27.--31. 1. "JSQ4,4th conversion in the injected sequence"
hexmask.long.byte 0x0 21.--25. 1. "JSQ3,3rd conversion in the injected sequence"
newline
hexmask.long.byte 0x0 15.--19. 1. "JSQ2,2nd conversion in the injected sequence"
hexmask.long.byte 0x0 9.--13. 1. "JSQ1,1st conversion in the injected sequence"
newline
bitfld.long 0x0 7.--8. "JExTEN,External trigger enable and polarity selection for injected channels" "0: Hardware trigger detection disabled (conversions..,1: Hardware trigger detection on the rising edge,2: Hardware trigger detection on the falling edge,3: Hardware trigger detection on both the rising.."
hexmask.long.byte 0x0 2.--6. 1. "JExTSEL,External trigger selection for injected group"
newline
bitfld.long 0x0 0.--1. "JL,Injected channel sequence length" "0: 1 conversion,1: 2 conversions,2: 3 conversions,3: 4 conversions"
line.long 0x4 "ADC_OFCFGR1,ADC offset 1 configuration register"
hexmask.long.byte 0x4 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y"
bitfld.long 0x4 26. "SSAT,Signed saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
newline
bitfld.long 0x4 25. "USAT,Unsigned saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
bitfld.long 0x4 24. "POSOFF,Positive offset enable" "0: Negative offset,1: Positive offset"
line.long 0x8 "ADC_OFCFGR2,ADC offset 2 configuration register"
hexmask.long.byte 0x8 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y"
bitfld.long 0x8 26. "SSAT,Signed saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
newline
bitfld.long 0x8 25. "USAT,Unsigned saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
bitfld.long 0x8 24. "POSOFF,Positive offset enable" "0: Negative offset,1: Positive offset"
line.long 0xC "ADC_OFCFGR3,ADC offset 3 configuration register"
hexmask.long.byte 0xC 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y"
bitfld.long 0xC 26. "SSAT,Signed saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
newline
bitfld.long 0xC 25. "USAT,Unsigned saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
bitfld.long 0xC 24. "POSOFF,Positive offset enable" "0: Negative offset,1: Positive offset"
line.long 0x10 "ADC_OFCFGR4,ADC offset 4 configuration register"
hexmask.long.byte 0x10 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y"
bitfld.long 0x10 26. "SSAT,Signed saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
newline
bitfld.long 0x10 25. "USAT,Unsigned saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
bitfld.long 0x10 24. "POSOFF,Positive offset enable" "0: Negative offset,1: Positive offset"
line.long 0x14 "ADC_OFR1,ADC offset 1 register"
hexmask.long.tbyte 0x14 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits"
line.long 0x18 "ADC_OFR2,ADC offset 2 register"
hexmask.long.tbyte 0x18 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits"
line.long 0x1C "ADC_OFR3,ADC offset 3 register"
hexmask.long.tbyte 0x1C 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits"
line.long 0x20 "ADC_OFR4,ADC offset 4 register"
hexmask.long.tbyte 0x20 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits"
line.long 0x24 "ADC_GCOMP,ADC gain compensation register"
bitfld.long 0x24 31. "GCOMP,Gain compensation mode" "0: Regular ADC operation mode,1: Gain compensation enabled and applied on all.."
hexmask.long.word 0x24 0.--13. 1. "GCOMPCOEFF,Gain compensation coefficient"
rgroup.long 0x80++0xF
line.long 0x0 "ADC_JDR1,ADC injected channel 1 data register"
hexmask.long 0x0 0.--31. 1. "JDATA,Injected data"
line.long 0x4 "ADC_JDR2,ADC injected channel 2 data register"
hexmask.long 0x4 0.--31. 1. "JDATA,Injected data"
line.long 0x8 "ADC_JDR3,ADC injected channel 3 data register"
hexmask.long 0x8 0.--31. 1. "JDATA,Injected data"
line.long 0xC "ADC_JDR4,ADC injected channel 4 data register"
hexmask.long 0xC 0.--31. 1. "JDATA,Injected data"
group.long 0xA0++0x27
line.long 0x0 "ADC_AWD2CR,ADC Analog Watchdog 2 Configuration Register"
hexmask.long.tbyte 0x0 0.--18. 1. "AWDCH,Analog watchdog 2 channel selection"
line.long 0x4 "ADC_AWD3CR,ADC Analog Watchdog 3 Configuration Register"
hexmask.long.tbyte 0x4 0.--18. 1. "AWDCH,Analog watchdog 3 channel selection"
line.long 0x8 "ADC_AWD1LTR,ADC analog watchdog 1 lower threshold register"
hexmask.long.tbyte 0x8 0.--22. 1. "LTR,Analog watchdog 1 lower threshold"
line.long 0xC "ADC_AWD1HTR,ADC analog watchdog 1 higher threshold register"
bitfld.long 0xC 29.--31. "AWDFILT,Analog watchdog filtering parameter" "0: No filtering one detection generates an AWDx..,1: two consecutive detections generate an AWDx flag..,?,?,?,?,?,7: Eight consecutive detections generate an AWDx.."
hexmask.long.tbyte 0xC 0.--22. 1. "HTR,Analog watchdog 1 higher threshold"
line.long 0x10 "ADC_AWD2LTR,ADC analog watchdog 2 lower threshold register"
hexmask.long.tbyte 0x10 0.--22. 1. "LTR,Analog watchdog 2 lower threshold"
line.long 0x14 "ADC_AWD2HTR,ADC analog watchdog 2 higher threshold register"
hexmask.long.tbyte 0x14 0.--22. 1. "HTR,Analog watchdog 2 higher threshold"
line.long 0x18 "ADC_AWD3LTR,ADC analog watchdog 3 lower threshold register"
hexmask.long.tbyte 0x18 0.--22. 1. "LTR,Analog watchdog 3 lower threshold"
line.long 0x1C "ADC_AWD3HTR,ADC analog watchdog 3 higher threshold register"
hexmask.long.tbyte 0x1C 0.--22. 1. "HTR,Analog watchdog 3 higher threshold"
line.long 0x20 "ADC_DIFSEL,ADC differential mode selection register"
hexmask.long.tbyte 0x20 0.--18. 1. "DIFSEL,Differential mode for channels 18 to 0."
line.long 0x24 "ADC_CALFACT,ADC calibration factors"
hexmask.long.byte 0x24 0.--6. 1. "CALFACT,Calibration factors"
group.long 0xD0++0x3
line.long 0x0 "ADC_OR,ADC option register"
bitfld.long 0x0 0. "OP0,Option bit 0" "0: Vless thansub>COREless than/sub> disabled,1: Vless thansub>COREless than/sub> enabled"
tree.end
tree "SEC_ADC1"
base ad:0x52028000
group.long 0x0++0x1F
line.long 0x0 "ADC_ISR,ADC interrupt and status register"
rbitfld.long 0x0 12. "LDORDY,ADC internal voltage regulator output ready flag" "0: ADC LDO internal voltage regulator disabled,1: ADC LDO internal voltage regulator enabled"
bitfld.long 0x0 10. "JQOVF,Injected context queue overflow" "0: No injected context queue overflow occurred (or..,1: Injected context queue overflow has occurred"
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bitfld.long 0x0 9. "AWD3,Analog watchdog 3 flag" "0: No analog watchdog 3 event occurred (or the flag..,1: Analog watchdog 3 event occurred"
bitfld.long 0x0 8. "AWD2,Analog watchdog 2 flag" "0: No analog watchdog 2 event occurred (or the flag..,1: Analog watchdog 2 event occurred"
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bitfld.long 0x0 7. "AWD1,Analog watchdog 1 flag" "0: No analog watchdog 1 event occurred (or the flag..,1: Analog watchdog 1 event occurred"
bitfld.long 0x0 6. "JEOS,Injected channel end of sequence flag" "0: Injected conversion sequence not complete (or..,1: Injected conversions complete"
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bitfld.long 0x0 5. "JEOC,Injected channel end of conversion flag" "0: Injected channel conversion not complete (or the..,1: Injected channel conversion complete"
bitfld.long 0x0 4. "OVR,ADC overrun" "0: No overrun occurred (or the flag event was..,1: Overrun has occurred"
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bitfld.long 0x0 3. "EOS,End of regular sequence flag" "0: Regular Conversions sequence not complete (or..,1: Regular Conversions sequence complete"
bitfld.long 0x0 2. "EOC,End of conversion flag" "0: Regular channel conversion not complete (or the..,1: Regular channel conversion complete"
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bitfld.long 0x0 1. "EOSMP,End of sampling flag" "0: not at the end of the sampling phase (or the..,1: End of sampling phase reached"
bitfld.long 0x0 0. "ADRDY,ADC ready" "0: ADC not yet ready to start conversion (or the..,1: ADC is ready to start conversion"
line.long 0x4 "ADC_IER,ADC interrupt enable register"
bitfld.long 0x4 12. "LDORDYIE,ADC internal voltage regulator interrupt enable" "0: Internal voltage regulator interrupt disabled,1: Internal voltage regulator interrupt enabled"
bitfld.long 0x4 10. "JQOVFIE,Injected context queue overflow interrupt enable" "0: Injected context queue overflow interrupt disabled,1: Injected context queue overflow interrupt enabled."
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bitfld.long 0x4 9. "AWD3IE,Analog watchdog 3 interrupt enable" "0: Analog watchdog 3 interrupt disabled,1: Analog watchdog 3 interrupt enabled"
bitfld.long 0x4 8. "AWD2IE,Analog watchdog 2 interrupt enable" "0: Analog watchdog 2 interrupt disabled,1: Analog watchdog 2 interrupt enabled"
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bitfld.long 0x4 7. "AWD1IE,Analog watchdog 1 interrupt enable" "0: Analog watchdog 1 interrupt disabled,1: Analog watchdog 1 interrupt enabled"
bitfld.long 0x4 6. "JEOSIE,End of injected sequence of conversions interrupt enable" "0: JEOS interrupt disabled,1: JEOS interrupt enabled."
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bitfld.long 0x4 5. "JEOCIE,End of injected conversion interrupt enable" "0: JEOC interrupt disabled.,1: JEOC interrupt enabled."
bitfld.long 0x4 4. "OVRIE,Overrun interrupt enable" "0: Overrun interrupt disabled,1: Overrun interrupt enabled."
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bitfld.long 0x4 3. "EOSIE,End of regular sequence of conversions interrupt enable" "0: EOS interrupt disabled,1: EOS interrupt enabled."
bitfld.long 0x4 2. "EOCIE,End of regular conversion interrupt enable" "0: EOC interrupt disabled.,1: EOC interrupt enabled."
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bitfld.long 0x4 1. "EOSMPIE,End of sampling flag interrupt enable for regular conversions" "0: EOSMP interrupt disabled.,1: EOSMP interrupt enabled."
bitfld.long 0x4 0. "ADRDYIE,ADC ready interrupt enable" "0: ADRDY interrupt disabled,1: ADRDY interrupt enabled."
line.long 0x8 "ADC_CR,ADC control register"
bitfld.long 0x8 31. "ADCAL,ADC calibration" "0: Normal mode,1: Calibration mode"
bitfld.long 0x8 30. "ADCALDIF,Differential mode for calibration" "0: Single-ended input calibration mode when ADCAL=1,1: Differential input calibration mode when ADCAL=1"
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bitfld.long 0x8 29. "DEEPPWD,Deep-power-down enable" "0: ADC not in Deep-power down,1: ADC in Deep-power-down (default reset state)"
bitfld.long 0x8 28. "ADVREGEN,ADC internal voltage regulator enable" "0: ADC internal voltage regulator disabled,1: ADC internal voltage regulator enabled."
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bitfld.long 0x8 5. "JADSTP,ADC stop of injected conversion command" "0: No ADC stop injected conversion command ongoing,1: Write 1 to stop injected conversions ongoing."
bitfld.long 0x8 4. "ADSTP,ADC stop of regular conversion command" "0: No ADC stop regular conversion command ongoing,1: Write 1 to stop ongoing regular conversions."
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bitfld.long 0x8 3. "JADSTART,ADC start of injected conversion" "0: No ADC injected conversion is ongoing.,1: Write 1 to start injected conversions."
bitfld.long 0x8 2. "ADSTART,ADC start of regular conversion" "0: No ADC regular conversion is ongoing.,1: Write 1 to start regular conversions."
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bitfld.long 0x8 1. "ADDIS,ADC disable command" "0: no ADDIS command ongoing,1: Write 1 to disable the ADC."
bitfld.long 0x8 0. "ADEN,ADC enable control" "0: ADC is disabled (OFF state),1: Write 1 to enable the ADC."
line.long 0xC "ADC_CFGR1,ADC configuration register"
bitfld.long 0xC 31. "JQDIS,Injected queue disable" "0: Injected queue enabled,1: Injected queue disabled"
hexmask.long.byte 0xC 26.--30. 1. "AWD1CH,Analog watchdog 1 channel selection"
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bitfld.long 0xC 25. "JAUTO,Automatic injected group conversion" "0: Automatic injected group conversion disabled,1: Automatic injected group conversion enabled"
bitfld.long 0xC 24. "JAWD1EN,Analog watchdog 1 enable on injected channels" "0: Analog watchdog 1 disabled on injected channels,1: Analog watchdog 1 enabled on injected channels"
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bitfld.long 0xC 23. "AWD1EN,Analog watchdog 1 enable on regular channels" "0: Analog watchdog 1 disabled on regular channels,1: Analog watchdog 1 enabled on regular channels"
bitfld.long 0xC 22. "AWD1SGL,Enable the watchdog 1 on a single channel or on all channels" "0: Analog watchdog 1 enabled on all channels,1: Analog watchdog 1 enabled on a single channel"
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bitfld.long 0xC 21. "JQM,JSQR queue mode" "0: JSQR mode 0: The Queue is never empty and..,1: JSQR mode 1: The Queue can be empty and when.."
bitfld.long 0xC 20. "JDISCEN,Discontinuous mode on injected channels" "0: Discontinuous mode on injected channels disabled,1: Discontinuous mode on injected channels enabled"
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bitfld.long 0xC 17.--19. "DISCNUM,Discontinuous mode channel count" "0: 1 channel,1: 2 channels,?,?,?,?,?,7: 8 channels"
bitfld.long 0xC 16. "DISCEN,Discontinuous mode for regular channels" "0: Discontinuous mode for regular channels disabled,1: Discontinuous mode for regular channels enabled"
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bitfld.long 0xC 14. "AUTDLY,Delayed conversion mode" "0: Auto-delayed conversion mode off,1: Auto-delayed conversion mode on"
bitfld.long 0xC 13. "CONT,Single / continuous conversion mode for regular conversions" "0: Single conversion mode,1: Continuous conversion mode"
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bitfld.long 0xC 12. "OVRMOD,Overrun mode" "0: ADC_DR register is preserved with the old data..,1: ADC_DR register is overwritten with the last.."
bitfld.long 0xC 10.--11. "ExTEN,External trigger enable and polarity selection for regular channels" "0: Hardware trigger detection disabled (conversions..,1: Hardware trigger detection on the rising edge,2: Hardware trigger detection on the falling edge,3: Hardware trigger detection on both the rising.."
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hexmask.long.byte 0xC 5.--9. 1. "ExTSEL,External trigger selection for regular group"
bitfld.long 0xC 2.--3. "RES,Data resolution" "0: 12-bit,1: 10-bit,2: 8-bit,3: 6-bit"
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bitfld.long 0xC 0.--1. "DMNGT,Data management configuration" "0: Regular conversion data stored in DR only,1: DMA one-shot mode selected,2: MDF mode detected,3: DMA circular mode selected"
line.long 0x10 "ADC_CFGR2,ADC configuration register 2"
hexmask.long.byte 0x10 28.--31. 1. "LSHIFT,Left shift factor"
hexmask.long.word 0x10 16.--25. 1. "OVSR,Oversampling ratio"
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bitfld.long 0x10 15. "SMPTRIG,Sampling time control trigger mode" "0: Sampling time control trigger mode disabled,1: Sampling time control trigger mode enabled"
bitfld.long 0x10 14. "SWTRIG,Software trigger bit for sampling time control trigger mode" "0: Software trigger starts the conversion for..,1: Software trigger starts the sampling for.."
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bitfld.long 0x10 13. "BULB,Bulb sampling mode" "0: Bulb sampling mode disabled,1: Bulb sampling mode enabled."
bitfld.long 0x10 10. "ROVSM,Regular oversampling mode" "0: Continued mode: When injected conversions are..,1: Resumed mode: When injected conversions are.."
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bitfld.long 0x10 9. "TROVS,Triggered regular oversampling" "0: All oversampled conversions for a channel are..,1: Each oversampled conversion for a channel needs.."
hexmask.long.byte 0x10 5.--8. 1. "OVSS,Oversampling shift"
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bitfld.long 0x10 1. "JOVSE,Injected oversampling enable" "0: Injected oversampling disabled,1: Injected oversampling enabled"
bitfld.long 0x10 0. "ROVSE,Regular oversampling enable" "0: Regular oversampling disabled,1: Regular oversampling enabled"
line.long 0x14 "ADC_SMPR1,ADC sample time register 1"
bitfld.long 0x14 27.--29. "SMP9,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x14 24.--26. "SMP8,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x14 21.--23. "SMP7,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x14 18.--20. "SMP6,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x14 15.--17. "SMP5,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x14 12.--14. "SMP4,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x14 9.--11. "SMP3,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x14 6.--8. "SMP2,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x14 3.--5. "SMP1,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x14 0.--2. "SMP0,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
line.long 0x18 "ADC_SMPR2,ADC sample time register 2"
bitfld.long 0x18 27.--29. "SMP19,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x18 24.--26. "SMP18,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x18 21.--23. "SMP17,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x18 18.--20. "SMP16,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
newline
bitfld.long 0x18 15.--17. "SMP15,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x18 12.--14. "SMP14,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x18 9.--11. "SMP13,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x18 6.--8. "SMP12,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
newline
bitfld.long 0x18 3.--5. "SMP11,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x18 0.--2. "SMP10,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
line.long 0x1C "ADC_PCSEL,ADC channel preselection register"
hexmask.long.tbyte 0x1C 0.--18. 1. "PCSEL,Channel i (Vless thansub>INPless than/sub>[i]) preselection"
group.long 0x30++0xF
line.long 0x0 "ADC_SQR1,ADC regular sequence register 1"
hexmask.long.byte 0x0 24.--28. 1. "SQ4,4th conversion in regular sequence"
hexmask.long.byte 0x0 18.--22. 1. "SQ3,3rd conversion in regular sequence"
newline
hexmask.long.byte 0x0 12.--16. 1. "SQ2,2nd conversion in regular sequence"
hexmask.long.byte 0x0 6.--10. 1. "SQ1,1st conversion in regular sequence"
newline
hexmask.long.byte 0x0 0.--3. 1. "L,Regular channel sequence length"
line.long 0x4 "ADC_SQR2,ADC regular sequence register 2"
hexmask.long.byte 0x4 24.--28. 1. "SQ9,9th conversion in regular sequence"
hexmask.long.byte 0x4 18.--22. 1. "SQ8,8th conversion in regular sequence"
newline
hexmask.long.byte 0x4 12.--16. 1. "SQ7,7th conversion in regular sequence"
hexmask.long.byte 0x4 6.--10. 1. "SQ6,6th conversion in regular sequence"
newline
hexmask.long.byte 0x4 0.--4. 1. "SQ5,5th conversion in regular sequence"
line.long 0x8 "ADC_SQR3,ADC regular sequence register 3"
hexmask.long.byte 0x8 24.--28. 1. "SQ14,14th conversion in regular sequence"
hexmask.long.byte 0x8 18.--22. 1. "SQ13,13th conversion in regular sequence"
newline
hexmask.long.byte 0x8 12.--16. 1. "SQ12,12th conversion in regular sequence"
hexmask.long.byte 0x8 6.--10. 1. "SQ11,11th conversion in regular sequence"
newline
hexmask.long.byte 0x8 0.--4. 1. "SQ10,10th conversion in regular sequence"
line.long 0xC "ADC_SQR4,ADC regular sequence register 4"
hexmask.long.byte 0xC 6.--10. 1. "SQ16,16th conversion in regular sequence"
hexmask.long.byte 0xC 0.--4. 1. "SQ15,15th conversion in regular sequence"
rgroup.long 0x40++0x3
line.long 0x0 "ADC_DR,ADC regular data register"
hexmask.long 0x0 0.--31. 1. "RDATA,Regular data converted"
group.long 0x4C++0x27
line.long 0x0 "ADC_JSQR,ADC injected sequence register"
hexmask.long.byte 0x0 27.--31. 1. "JSQ4,4th conversion in the injected sequence"
hexmask.long.byte 0x0 21.--25. 1. "JSQ3,3rd conversion in the injected sequence"
newline
hexmask.long.byte 0x0 15.--19. 1. "JSQ2,2nd conversion in the injected sequence"
hexmask.long.byte 0x0 9.--13. 1. "JSQ1,1st conversion in the injected sequence"
newline
bitfld.long 0x0 7.--8. "JExTEN,External trigger enable and polarity selection for injected channels" "0: Hardware trigger detection disabled (conversions..,1: Hardware trigger detection on the rising edge,2: Hardware trigger detection on the falling edge,3: Hardware trigger detection on both the rising.."
hexmask.long.byte 0x0 2.--6. 1. "JExTSEL,External trigger selection for injected group"
newline
bitfld.long 0x0 0.--1. "JL,Injected channel sequence length" "0: 1 conversion,1: 2 conversions,2: 3 conversions,3: 4 conversions"
line.long 0x4 "ADC_OFCFGR1,ADC offset 1 configuration register"
hexmask.long.byte 0x4 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y"
bitfld.long 0x4 26. "SSAT,Signed saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
newline
bitfld.long 0x4 25. "USAT,Unsigned saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
bitfld.long 0x4 24. "POSOFF,Positive offset enable" "0: Negative offset,1: Positive offset"
line.long 0x8 "ADC_OFCFGR2,ADC offset 2 configuration register"
hexmask.long.byte 0x8 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y"
bitfld.long 0x8 26. "SSAT,Signed saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
newline
bitfld.long 0x8 25. "USAT,Unsigned saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
bitfld.long 0x8 24. "POSOFF,Positive offset enable" "0: Negative offset,1: Positive offset"
line.long 0xC "ADC_OFCFGR3,ADC offset 3 configuration register"
hexmask.long.byte 0xC 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y"
bitfld.long 0xC 26. "SSAT,Signed saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
newline
bitfld.long 0xC 25. "USAT,Unsigned saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
bitfld.long 0xC 24. "POSOFF,Positive offset enable" "0: Negative offset,1: Positive offset"
line.long 0x10 "ADC_OFCFGR4,ADC offset 4 configuration register"
hexmask.long.byte 0x10 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y"
bitfld.long 0x10 26. "SSAT,Signed saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
newline
bitfld.long 0x10 25. "USAT,Unsigned saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
bitfld.long 0x10 24. "POSOFF,Positive offset enable" "0: Negative offset,1: Positive offset"
line.long 0x14 "ADC_OFR1,ADC offset 1 register"
hexmask.long.tbyte 0x14 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits"
line.long 0x18 "ADC_OFR2,ADC offset 2 register"
hexmask.long.tbyte 0x18 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits"
line.long 0x1C "ADC_OFR3,ADC offset 3 register"
hexmask.long.tbyte 0x1C 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits"
line.long 0x20 "ADC_OFR4,ADC offset 4 register"
hexmask.long.tbyte 0x20 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits"
line.long 0x24 "ADC_GCOMP,ADC gain compensation register"
bitfld.long 0x24 31. "GCOMP,Gain compensation mode" "0: Regular ADC operation mode,1: Gain compensation enabled and applied on all.."
hexmask.long.word 0x24 0.--13. 1. "GCOMPCOEFF,Gain compensation coefficient"
rgroup.long 0x80++0xF
line.long 0x0 "ADC_JDR1,ADC injected channel 1 data register"
hexmask.long 0x0 0.--31. 1. "JDATA,Injected data"
line.long 0x4 "ADC_JDR2,ADC injected channel 2 data register"
hexmask.long 0x4 0.--31. 1. "JDATA,Injected data"
line.long 0x8 "ADC_JDR3,ADC injected channel 3 data register"
hexmask.long 0x8 0.--31. 1. "JDATA,Injected data"
line.long 0xC "ADC_JDR4,ADC injected channel 4 data register"
hexmask.long 0xC 0.--31. 1. "JDATA,Injected data"
group.long 0xA0++0x27
line.long 0x0 "ADC_AWD2CR,ADC Analog Watchdog 2 Configuration Register"
hexmask.long.tbyte 0x0 0.--18. 1. "AWDCH,Analog watchdog 2 channel selection"
line.long 0x4 "ADC_AWD3CR,ADC Analog Watchdog 3 Configuration Register"
hexmask.long.tbyte 0x4 0.--18. 1. "AWDCH,Analog watchdog 3 channel selection"
line.long 0x8 "ADC_AWD1LTR,ADC analog watchdog 1 lower threshold register"
hexmask.long.tbyte 0x8 0.--22. 1. "LTR,Analog watchdog 1 lower threshold"
line.long 0xC "ADC_AWD1HTR,ADC analog watchdog 1 higher threshold register"
bitfld.long 0xC 29.--31. "AWDFILT,Analog watchdog filtering parameter" "0: No filtering one detection generates an AWDx..,1: two consecutive detections generate an AWDx flag..,?,?,?,?,?,7: Eight consecutive detections generate an AWDx.."
hexmask.long.tbyte 0xC 0.--22. 1. "HTR,Analog watchdog 1 higher threshold"
line.long 0x10 "ADC_AWD2LTR,ADC analog watchdog 2 lower threshold register"
hexmask.long.tbyte 0x10 0.--22. 1. "LTR,Analog watchdog 2 lower threshold"
line.long 0x14 "ADC_AWD2HTR,ADC analog watchdog 2 higher threshold register"
hexmask.long.tbyte 0x14 0.--22. 1. "HTR,Analog watchdog 2 higher threshold"
line.long 0x18 "ADC_AWD3LTR,ADC analog watchdog 3 lower threshold register"
hexmask.long.tbyte 0x18 0.--22. 1. "LTR,Analog watchdog 3 lower threshold"
line.long 0x1C "ADC_AWD3HTR,ADC analog watchdog 3 higher threshold register"
hexmask.long.tbyte 0x1C 0.--22. 1. "HTR,Analog watchdog 3 higher threshold"
line.long 0x20 "ADC_DIFSEL,ADC differential mode selection register"
hexmask.long.tbyte 0x20 0.--18. 1. "DIFSEL,Differential mode for channels 18 to 0."
line.long 0x24 "ADC_CALFACT,ADC calibration factors"
hexmask.long.byte 0x24 0.--6. 1. "CALFACT,Calibration factors"
group.long 0xD0++0x3
line.long 0x0 "ADC_OR,ADC option register"
bitfld.long 0x0 0. "OP0,Option bit 0" "0: Vless thansub>COREless than/sub> disabled,1: Vless thansub>COREless than/sub> enabled"
tree.end
tree "ADC2"
base ad:0x42028100
group.long 0x0++0x1F
line.long 0x0 "ADC_ISR,ADC interrupt and status register"
rbitfld.long 0x0 12. "LDORDY,ADC internal voltage regulator output ready flag" "0: ADC LDO internal voltage regulator disabled,1: ADC LDO internal voltage regulator enabled"
bitfld.long 0x0 10. "JQOVF,Injected context queue overflow" "0: No injected context queue overflow occurred (or..,1: Injected context queue overflow has occurred"
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bitfld.long 0x0 9. "AWD3,Analog watchdog 3 flag" "0: No analog watchdog 3 event occurred (or the flag..,1: Analog watchdog 3 event occurred"
bitfld.long 0x0 8. "AWD2,Analog watchdog 2 flag" "0: No analog watchdog 2 event occurred (or the flag..,1: Analog watchdog 2 event occurred"
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bitfld.long 0x0 7. "AWD1,Analog watchdog 1 flag" "0: No analog watchdog 1 event occurred (or the flag..,1: Analog watchdog 1 event occurred"
bitfld.long 0x0 6. "JEOS,Injected channel end of sequence flag" "0: Injected conversion sequence not complete (or..,1: Injected conversions complete"
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bitfld.long 0x0 5. "JEOC,Injected channel end of conversion flag" "0: Injected channel conversion not complete (or the..,1: Injected channel conversion complete"
bitfld.long 0x0 4. "OVR,ADC overrun" "0: No overrun occurred (or the flag event was..,1: Overrun has occurred"
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bitfld.long 0x0 3. "EOS,End of regular sequence flag" "0: Regular Conversions sequence not complete (or..,1: Regular Conversions sequence complete"
bitfld.long 0x0 2. "EOC,End of conversion flag" "0: Regular channel conversion not complete (or the..,1: Regular channel conversion complete"
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bitfld.long 0x0 1. "EOSMP,End of sampling flag" "0: not at the end of the sampling phase (or the..,1: End of sampling phase reached"
bitfld.long 0x0 0. "ADRDY,ADC ready" "0: ADC not yet ready to start conversion (or the..,1: ADC is ready to start conversion"
line.long 0x4 "ADC_IER,ADC interrupt enable register"
bitfld.long 0x4 12. "LDORDYIE,ADC internal voltage regulator interrupt enable" "0: Internal voltage regulator interrupt disabled,1: Internal voltage regulator interrupt enabled"
bitfld.long 0x4 10. "JQOVFIE,Injected context queue overflow interrupt enable" "0: Injected context queue overflow interrupt disabled,1: Injected context queue overflow interrupt enabled."
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bitfld.long 0x4 9. "AWD3IE,Analog watchdog 3 interrupt enable" "0: Analog watchdog 3 interrupt disabled,1: Analog watchdog 3 interrupt enabled"
bitfld.long 0x4 8. "AWD2IE,Analog watchdog 2 interrupt enable" "0: Analog watchdog 2 interrupt disabled,1: Analog watchdog 2 interrupt enabled"
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bitfld.long 0x4 7. "AWD1IE,Analog watchdog 1 interrupt enable" "0: Analog watchdog 1 interrupt disabled,1: Analog watchdog 1 interrupt enabled"
bitfld.long 0x4 6. "JEOSIE,End of injected sequence of conversions interrupt enable" "0: JEOS interrupt disabled,1: JEOS interrupt enabled."
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bitfld.long 0x4 5. "JEOCIE,End of injected conversion interrupt enable" "0: JEOC interrupt disabled.,1: JEOC interrupt enabled."
bitfld.long 0x4 4. "OVRIE,Overrun interrupt enable" "0: Overrun interrupt disabled,1: Overrun interrupt enabled."
newline
bitfld.long 0x4 3. "EOSIE,End of regular sequence of conversions interrupt enable" "0: EOS interrupt disabled,1: EOS interrupt enabled."
bitfld.long 0x4 2. "EOCIE,End of regular conversion interrupt enable" "0: EOC interrupt disabled.,1: EOC interrupt enabled."
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bitfld.long 0x4 1. "EOSMPIE,End of sampling flag interrupt enable for regular conversions" "0: EOSMP interrupt disabled.,1: EOSMP interrupt enabled."
bitfld.long 0x4 0. "ADRDYIE,ADC ready interrupt enable" "0: ADRDY interrupt disabled,1: ADRDY interrupt enabled."
line.long 0x8 "ADC_CR,ADC control register"
bitfld.long 0x8 31. "ADCAL,ADC calibration" "0: Normal mode,1: Calibration mode"
bitfld.long 0x8 30. "ADCALDIF,Differential mode for calibration" "0: Single-ended input calibration mode when ADCAL=1,1: Differential input calibration mode when ADCAL=1"
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bitfld.long 0x8 29. "DEEPPWD,Deep-power-down enable" "0: ADC not in Deep-power down,1: ADC in Deep-power-down (default reset state)"
bitfld.long 0x8 28. "ADVREGEN,ADC internal voltage regulator enable" "0: ADC internal voltage regulator disabled,1: ADC internal voltage regulator enabled."
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bitfld.long 0x8 5. "JADSTP,ADC stop of injected conversion command" "0: No ADC stop injected conversion command ongoing,1: Write 1 to stop injected conversions ongoing."
bitfld.long 0x8 4. "ADSTP,ADC stop of regular conversion command" "0: No ADC stop regular conversion command ongoing,1: Write 1 to stop ongoing regular conversions."
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bitfld.long 0x8 3. "JADSTART,ADC start of injected conversion" "0: No ADC injected conversion is ongoing.,1: Write 1 to start injected conversions."
bitfld.long 0x8 2. "ADSTART,ADC start of regular conversion" "0: No ADC regular conversion is ongoing.,1: Write 1 to start regular conversions."
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bitfld.long 0x8 1. "ADDIS,ADC disable command" "0: no ADDIS command ongoing,1: Write 1 to disable the ADC."
bitfld.long 0x8 0. "ADEN,ADC enable control" "0: ADC is disabled (OFF state),1: Write 1 to enable the ADC."
line.long 0xC "ADC_CFGR1,ADC configuration register"
bitfld.long 0xC 31. "JQDIS,Injected queue disable" "0: Injected queue enabled,1: Injected queue disabled"
hexmask.long.byte 0xC 26.--30. 1. "AWD1CH,Analog watchdog 1 channel selection"
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bitfld.long 0xC 25. "JAUTO,Automatic injected group conversion" "0: Automatic injected group conversion disabled,1: Automatic injected group conversion enabled"
bitfld.long 0xC 24. "JAWD1EN,Analog watchdog 1 enable on injected channels" "0: Analog watchdog 1 disabled on injected channels,1: Analog watchdog 1 enabled on injected channels"
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bitfld.long 0xC 23. "AWD1EN,Analog watchdog 1 enable on regular channels" "0: Analog watchdog 1 disabled on regular channels,1: Analog watchdog 1 enabled on regular channels"
bitfld.long 0xC 22. "AWD1SGL,Enable the watchdog 1 on a single channel or on all channels" "0: Analog watchdog 1 enabled on all channels,1: Analog watchdog 1 enabled on a single channel"
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bitfld.long 0xC 21. "JQM,JSQR queue mode" "0: JSQR mode 0: The Queue is never empty and..,1: JSQR mode 1: The Queue can be empty and when.."
bitfld.long 0xC 20. "JDISCEN,Discontinuous mode on injected channels" "0: Discontinuous mode on injected channels disabled,1: Discontinuous mode on injected channels enabled"
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bitfld.long 0xC 17.--19. "DISCNUM,Discontinuous mode channel count" "0: 1 channel,1: 2 channels,?,?,?,?,?,7: 8 channels"
bitfld.long 0xC 16. "DISCEN,Discontinuous mode for regular channels" "0: Discontinuous mode for regular channels disabled,1: Discontinuous mode for regular channels enabled"
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bitfld.long 0xC 14. "AUTDLY,Delayed conversion mode" "0: Auto-delayed conversion mode off,1: Auto-delayed conversion mode on"
bitfld.long 0xC 13. "CONT,Single / continuous conversion mode for regular conversions" "0: Single conversion mode,1: Continuous conversion mode"
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bitfld.long 0xC 12. "OVRMOD,Overrun mode" "0: ADC_DR register is preserved with the old data..,1: ADC_DR register is overwritten with the last.."
bitfld.long 0xC 10.--11. "ExTEN,External trigger enable and polarity selection for regular channels" "0: Hardware trigger detection disabled (conversions..,1: Hardware trigger detection on the rising edge,2: Hardware trigger detection on the falling edge,3: Hardware trigger detection on both the rising.."
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hexmask.long.byte 0xC 5.--9. 1. "ExTSEL,External trigger selection for regular group"
bitfld.long 0xC 2.--3. "RES,Data resolution" "0: 12-bit,1: 10-bit,2: 8-bit,3: 6-bit"
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bitfld.long 0xC 0.--1. "DMNGT,Data management configuration" "0: Regular conversion data stored in DR only,1: DMA one-shot mode selected,2: MDF mode detected,3: DMA circular mode selected"
line.long 0x10 "ADC_CFGR2,ADC configuration register 2"
hexmask.long.byte 0x10 28.--31. 1. "LSHIFT,Left shift factor"
hexmask.long.word 0x10 16.--25. 1. "OVSR,Oversampling ratio"
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bitfld.long 0x10 15. "SMPTRIG,Sampling time control trigger mode" "0: Sampling time control trigger mode disabled,1: Sampling time control trigger mode enabled"
bitfld.long 0x10 14. "SWTRIG,Software trigger bit for sampling time control trigger mode" "0: Software trigger starts the conversion for..,1: Software trigger starts the sampling for.."
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bitfld.long 0x10 13. "BULB,Bulb sampling mode" "0: Bulb sampling mode disabled,1: Bulb sampling mode enabled."
bitfld.long 0x10 10. "ROVSM,Regular oversampling mode" "0: Continued mode: When injected conversions are..,1: Resumed mode: When injected conversions are.."
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bitfld.long 0x10 9. "TROVS,Triggered regular oversampling" "0: All oversampled conversions for a channel are..,1: Each oversampled conversion for a channel needs.."
hexmask.long.byte 0x10 5.--8. 1. "OVSS,Oversampling shift"
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bitfld.long 0x10 1. "JOVSE,Injected oversampling enable" "0: Injected oversampling disabled,1: Injected oversampling enabled"
bitfld.long 0x10 0. "ROVSE,Regular oversampling enable" "0: Regular oversampling disabled,1: Regular oversampling enabled"
line.long 0x14 "ADC_SMPR1,ADC sample time register 1"
bitfld.long 0x14 27.--29. "SMP9,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x14 24.--26. "SMP8,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x14 21.--23. "SMP7,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x14 18.--20. "SMP6,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x14 15.--17. "SMP5,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x14 12.--14. "SMP4,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x14 9.--11. "SMP3,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x14 6.--8. "SMP2,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x14 3.--5. "SMP1,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x14 0.--2. "SMP0,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
line.long 0x18 "ADC_SMPR2,ADC sample time register 2"
bitfld.long 0x18 27.--29. "SMP19,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x18 24.--26. "SMP18,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x18 21.--23. "SMP17,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x18 18.--20. "SMP16,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x18 15.--17. "SMP15,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x18 12.--14. "SMP14,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x18 9.--11. "SMP13,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x18 6.--8. "SMP12,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
newline
bitfld.long 0x18 3.--5. "SMP11,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x18 0.--2. "SMP10,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
line.long 0x1C "ADC_PCSEL,ADC channel preselection register"
hexmask.long.tbyte 0x1C 0.--18. 1. "PCSEL,Channel i (Vless thansub>INPless than/sub>[i]) preselection"
group.long 0x30++0xF
line.long 0x0 "ADC_SQR1,ADC regular sequence register 1"
hexmask.long.byte 0x0 24.--28. 1. "SQ4,4th conversion in regular sequence"
hexmask.long.byte 0x0 18.--22. 1. "SQ3,3rd conversion in regular sequence"
newline
hexmask.long.byte 0x0 12.--16. 1. "SQ2,2nd conversion in regular sequence"
hexmask.long.byte 0x0 6.--10. 1. "SQ1,1st conversion in regular sequence"
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hexmask.long.byte 0x0 0.--3. 1. "L,Regular channel sequence length"
line.long 0x4 "ADC_SQR2,ADC regular sequence register 2"
hexmask.long.byte 0x4 24.--28. 1. "SQ9,9th conversion in regular sequence"
hexmask.long.byte 0x4 18.--22. 1. "SQ8,8th conversion in regular sequence"
newline
hexmask.long.byte 0x4 12.--16. 1. "SQ7,7th conversion in regular sequence"
hexmask.long.byte 0x4 6.--10. 1. "SQ6,6th conversion in regular sequence"
newline
hexmask.long.byte 0x4 0.--4. 1. "SQ5,5th conversion in regular sequence"
line.long 0x8 "ADC_SQR3,ADC regular sequence register 3"
hexmask.long.byte 0x8 24.--28. 1. "SQ14,14th conversion in regular sequence"
hexmask.long.byte 0x8 18.--22. 1. "SQ13,13th conversion in regular sequence"
newline
hexmask.long.byte 0x8 12.--16. 1. "SQ12,12th conversion in regular sequence"
hexmask.long.byte 0x8 6.--10. 1. "SQ11,11th conversion in regular sequence"
newline
hexmask.long.byte 0x8 0.--4. 1. "SQ10,10th conversion in regular sequence"
line.long 0xC "ADC_SQR4,ADC regular sequence register 4"
hexmask.long.byte 0xC 6.--10. 1. "SQ16,16th conversion in regular sequence"
hexmask.long.byte 0xC 0.--4. 1. "SQ15,15th conversion in regular sequence"
rgroup.long 0x40++0x3
line.long 0x0 "ADC_DR,ADC regular data register"
hexmask.long 0x0 0.--31. 1. "RDATA,Regular data converted"
group.long 0x4C++0x27
line.long 0x0 "ADC_JSQR,ADC injected sequence register"
hexmask.long.byte 0x0 27.--31. 1. "JSQ4,4th conversion in the injected sequence"
hexmask.long.byte 0x0 21.--25. 1. "JSQ3,3rd conversion in the injected sequence"
newline
hexmask.long.byte 0x0 15.--19. 1. "JSQ2,2nd conversion in the injected sequence"
hexmask.long.byte 0x0 9.--13. 1. "JSQ1,1st conversion in the injected sequence"
newline
bitfld.long 0x0 7.--8. "JExTEN,External trigger enable and polarity selection for injected channels" "0: Hardware trigger detection disabled (conversions..,1: Hardware trigger detection on the rising edge,2: Hardware trigger detection on the falling edge,3: Hardware trigger detection on both the rising.."
hexmask.long.byte 0x0 2.--6. 1. "JExTSEL,External trigger selection for injected group"
newline
bitfld.long 0x0 0.--1. "JL,Injected channel sequence length" "0: 1 conversion,1: 2 conversions,2: 3 conversions,3: 4 conversions"
line.long 0x4 "ADC_OFCFGR1,ADC offset 1 configuration register"
hexmask.long.byte 0x4 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y"
bitfld.long 0x4 26. "SSAT,Signed saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
newline
bitfld.long 0x4 25. "USAT,Unsigned saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
bitfld.long 0x4 24. "POSOFF,Positive offset enable" "0: Negative offset,1: Positive offset"
line.long 0x8 "ADC_OFCFGR2,ADC offset 2 configuration register"
hexmask.long.byte 0x8 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y"
bitfld.long 0x8 26. "SSAT,Signed saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
newline
bitfld.long 0x8 25. "USAT,Unsigned saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
bitfld.long 0x8 24. "POSOFF,Positive offset enable" "0: Negative offset,1: Positive offset"
line.long 0xC "ADC_OFCFGR3,ADC offset 3 configuration register"
hexmask.long.byte 0xC 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y"
bitfld.long 0xC 26. "SSAT,Signed saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
newline
bitfld.long 0xC 25. "USAT,Unsigned saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
bitfld.long 0xC 24. "POSOFF,Positive offset enable" "0: Negative offset,1: Positive offset"
line.long 0x10 "ADC_OFCFGR4,ADC offset 4 configuration register"
hexmask.long.byte 0x10 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y"
bitfld.long 0x10 26. "SSAT,Signed saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
newline
bitfld.long 0x10 25. "USAT,Unsigned saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
bitfld.long 0x10 24. "POSOFF,Positive offset enable" "0: Negative offset,1: Positive offset"
line.long 0x14 "ADC_OFR1,ADC offset 1 register"
hexmask.long.tbyte 0x14 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits"
line.long 0x18 "ADC_OFR2,ADC offset 2 register"
hexmask.long.tbyte 0x18 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits"
line.long 0x1C "ADC_OFR3,ADC offset 3 register"
hexmask.long.tbyte 0x1C 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits"
line.long 0x20 "ADC_OFR4,ADC offset 4 register"
hexmask.long.tbyte 0x20 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits"
line.long 0x24 "ADC_GCOMP,ADC gain compensation register"
bitfld.long 0x24 31. "GCOMP,Gain compensation mode" "0: Regular ADC operation mode,1: Gain compensation enabled and applied on all.."
hexmask.long.word 0x24 0.--13. 1. "GCOMPCOEFF,Gain compensation coefficient"
rgroup.long 0x80++0xF
line.long 0x0 "ADC_JDR1,ADC injected channel 1 data register"
hexmask.long 0x0 0.--31. 1. "JDATA,Injected data"
line.long 0x4 "ADC_JDR2,ADC injected channel 2 data register"
hexmask.long 0x4 0.--31. 1. "JDATA,Injected data"
line.long 0x8 "ADC_JDR3,ADC injected channel 3 data register"
hexmask.long 0x8 0.--31. 1. "JDATA,Injected data"
line.long 0xC "ADC_JDR4,ADC injected channel 4 data register"
hexmask.long 0xC 0.--31. 1. "JDATA,Injected data"
group.long 0xA0++0x27
line.long 0x0 "ADC_AWD2CR,ADC Analog Watchdog 2 Configuration Register"
hexmask.long.tbyte 0x0 0.--18. 1. "AWDCH,Analog watchdog 2 channel selection"
line.long 0x4 "ADC_AWD3CR,ADC Analog Watchdog 3 Configuration Register"
hexmask.long.tbyte 0x4 0.--18. 1. "AWDCH,Analog watchdog 3 channel selection"
line.long 0x8 "ADC_AWD1LTR,ADC analog watchdog 1 lower threshold register"
hexmask.long.tbyte 0x8 0.--22. 1. "LTR,Analog watchdog 1 lower threshold"
line.long 0xC "ADC_AWD1HTR,ADC analog watchdog 1 higher threshold register"
bitfld.long 0xC 29.--31. "AWDFILT,Analog watchdog filtering parameter" "0: No filtering one detection generates an AWDx..,1: two consecutive detections generate an AWDx flag..,?,?,?,?,?,7: Eight consecutive detections generate an AWDx.."
hexmask.long.tbyte 0xC 0.--22. 1. "HTR,Analog watchdog 1 higher threshold"
line.long 0x10 "ADC_AWD2LTR,ADC analog watchdog 2 lower threshold register"
hexmask.long.tbyte 0x10 0.--22. 1. "LTR,Analog watchdog 2 lower threshold"
line.long 0x14 "ADC_AWD2HTR,ADC analog watchdog 2 higher threshold register"
hexmask.long.tbyte 0x14 0.--22. 1. "HTR,Analog watchdog 2 higher threshold"
line.long 0x18 "ADC_AWD3LTR,ADC analog watchdog 3 lower threshold register"
hexmask.long.tbyte 0x18 0.--22. 1. "LTR,Analog watchdog 3 lower threshold"
line.long 0x1C "ADC_AWD3HTR,ADC analog watchdog 3 higher threshold register"
hexmask.long.tbyte 0x1C 0.--22. 1. "HTR,Analog watchdog 3 higher threshold"
line.long 0x20 "ADC_DIFSEL,ADC differential mode selection register"
hexmask.long.tbyte 0x20 0.--18. 1. "DIFSEL,Differential mode for channels 18 to 0."
line.long 0x24 "ADC_CALFACT,ADC calibration factors"
hexmask.long.byte 0x24 0.--6. 1. "CALFACT,Calibration factors"
group.long 0xD0++0x3
line.long 0x0 "ADC_OR,ADC option register"
bitfld.long 0x0 0. "OP0,Option bit 0" "0: Vless thansub>COREless than/sub> disabled,1: Vless thansub>COREless than/sub> enabled"
tree.end
tree "SEC_ADC2"
base ad:0x52028100
group.long 0x0++0x1F
line.long 0x0 "ADC_ISR,ADC interrupt and status register"
rbitfld.long 0x0 12. "LDORDY,ADC internal voltage regulator output ready flag" "0: ADC LDO internal voltage regulator disabled,1: ADC LDO internal voltage regulator enabled"
bitfld.long 0x0 10. "JQOVF,Injected context queue overflow" "0: No injected context queue overflow occurred (or..,1: Injected context queue overflow has occurred"
newline
bitfld.long 0x0 9. "AWD3,Analog watchdog 3 flag" "0: No analog watchdog 3 event occurred (or the flag..,1: Analog watchdog 3 event occurred"
bitfld.long 0x0 8. "AWD2,Analog watchdog 2 flag" "0: No analog watchdog 2 event occurred (or the flag..,1: Analog watchdog 2 event occurred"
newline
bitfld.long 0x0 7. "AWD1,Analog watchdog 1 flag" "0: No analog watchdog 1 event occurred (or the flag..,1: Analog watchdog 1 event occurred"
bitfld.long 0x0 6. "JEOS,Injected channel end of sequence flag" "0: Injected conversion sequence not complete (or..,1: Injected conversions complete"
newline
bitfld.long 0x0 5. "JEOC,Injected channel end of conversion flag" "0: Injected channel conversion not complete (or the..,1: Injected channel conversion complete"
bitfld.long 0x0 4. "OVR,ADC overrun" "0: No overrun occurred (or the flag event was..,1: Overrun has occurred"
newline
bitfld.long 0x0 3. "EOS,End of regular sequence flag" "0: Regular Conversions sequence not complete (or..,1: Regular Conversions sequence complete"
bitfld.long 0x0 2. "EOC,End of conversion flag" "0: Regular channel conversion not complete (or the..,1: Regular channel conversion complete"
newline
bitfld.long 0x0 1. "EOSMP,End of sampling flag" "0: not at the end of the sampling phase (or the..,1: End of sampling phase reached"
bitfld.long 0x0 0. "ADRDY,ADC ready" "0: ADC not yet ready to start conversion (or the..,1: ADC is ready to start conversion"
line.long 0x4 "ADC_IER,ADC interrupt enable register"
bitfld.long 0x4 12. "LDORDYIE,ADC internal voltage regulator interrupt enable" "0: Internal voltage regulator interrupt disabled,1: Internal voltage regulator interrupt enabled"
bitfld.long 0x4 10. "JQOVFIE,Injected context queue overflow interrupt enable" "0: Injected context queue overflow interrupt disabled,1: Injected context queue overflow interrupt enabled."
newline
bitfld.long 0x4 9. "AWD3IE,Analog watchdog 3 interrupt enable" "0: Analog watchdog 3 interrupt disabled,1: Analog watchdog 3 interrupt enabled"
bitfld.long 0x4 8. "AWD2IE,Analog watchdog 2 interrupt enable" "0: Analog watchdog 2 interrupt disabled,1: Analog watchdog 2 interrupt enabled"
newline
bitfld.long 0x4 7. "AWD1IE,Analog watchdog 1 interrupt enable" "0: Analog watchdog 1 interrupt disabled,1: Analog watchdog 1 interrupt enabled"
bitfld.long 0x4 6. "JEOSIE,End of injected sequence of conversions interrupt enable" "0: JEOS interrupt disabled,1: JEOS interrupt enabled."
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bitfld.long 0x4 5. "JEOCIE,End of injected conversion interrupt enable" "0: JEOC interrupt disabled.,1: JEOC interrupt enabled."
bitfld.long 0x4 4. "OVRIE,Overrun interrupt enable" "0: Overrun interrupt disabled,1: Overrun interrupt enabled."
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bitfld.long 0x4 3. "EOSIE,End of regular sequence of conversions interrupt enable" "0: EOS interrupt disabled,1: EOS interrupt enabled."
bitfld.long 0x4 2. "EOCIE,End of regular conversion interrupt enable" "0: EOC interrupt disabled.,1: EOC interrupt enabled."
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bitfld.long 0x4 1. "EOSMPIE,End of sampling flag interrupt enable for regular conversions" "0: EOSMP interrupt disabled.,1: EOSMP interrupt enabled."
bitfld.long 0x4 0. "ADRDYIE,ADC ready interrupt enable" "0: ADRDY interrupt disabled,1: ADRDY interrupt enabled."
line.long 0x8 "ADC_CR,ADC control register"
bitfld.long 0x8 31. "ADCAL,ADC calibration" "0: Normal mode,1: Calibration mode"
bitfld.long 0x8 30. "ADCALDIF,Differential mode for calibration" "0: Single-ended input calibration mode when ADCAL=1,1: Differential input calibration mode when ADCAL=1"
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bitfld.long 0x8 29. "DEEPPWD,Deep-power-down enable" "0: ADC not in Deep-power down,1: ADC in Deep-power-down (default reset state)"
bitfld.long 0x8 28. "ADVREGEN,ADC internal voltage regulator enable" "0: ADC internal voltage regulator disabled,1: ADC internal voltage regulator enabled."
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bitfld.long 0x8 5. "JADSTP,ADC stop of injected conversion command" "0: No ADC stop injected conversion command ongoing,1: Write 1 to stop injected conversions ongoing."
bitfld.long 0x8 4. "ADSTP,ADC stop of regular conversion command" "0: No ADC stop regular conversion command ongoing,1: Write 1 to stop ongoing regular conversions."
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bitfld.long 0x8 3. "JADSTART,ADC start of injected conversion" "0: No ADC injected conversion is ongoing.,1: Write 1 to start injected conversions."
bitfld.long 0x8 2. "ADSTART,ADC start of regular conversion" "0: No ADC regular conversion is ongoing.,1: Write 1 to start regular conversions."
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bitfld.long 0x8 1. "ADDIS,ADC disable command" "0: no ADDIS command ongoing,1: Write 1 to disable the ADC."
bitfld.long 0x8 0. "ADEN,ADC enable control" "0: ADC is disabled (OFF state),1: Write 1 to enable the ADC."
line.long 0xC "ADC_CFGR1,ADC configuration register"
bitfld.long 0xC 31. "JQDIS,Injected queue disable" "0: Injected queue enabled,1: Injected queue disabled"
hexmask.long.byte 0xC 26.--30. 1. "AWD1CH,Analog watchdog 1 channel selection"
newline
bitfld.long 0xC 25. "JAUTO,Automatic injected group conversion" "0: Automatic injected group conversion disabled,1: Automatic injected group conversion enabled"
bitfld.long 0xC 24. "JAWD1EN,Analog watchdog 1 enable on injected channels" "0: Analog watchdog 1 disabled on injected channels,1: Analog watchdog 1 enabled on injected channels"
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bitfld.long 0xC 23. "AWD1EN,Analog watchdog 1 enable on regular channels" "0: Analog watchdog 1 disabled on regular channels,1: Analog watchdog 1 enabled on regular channels"
bitfld.long 0xC 22. "AWD1SGL,Enable the watchdog 1 on a single channel or on all channels" "0: Analog watchdog 1 enabled on all channels,1: Analog watchdog 1 enabled on a single channel"
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bitfld.long 0xC 21. "JQM,JSQR queue mode" "0: JSQR mode 0: The Queue is never empty and..,1: JSQR mode 1: The Queue can be empty and when.."
bitfld.long 0xC 20. "JDISCEN,Discontinuous mode on injected channels" "0: Discontinuous mode on injected channels disabled,1: Discontinuous mode on injected channels enabled"
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bitfld.long 0xC 17.--19. "DISCNUM,Discontinuous mode channel count" "0: 1 channel,1: 2 channels,?,?,?,?,?,7: 8 channels"
bitfld.long 0xC 16. "DISCEN,Discontinuous mode for regular channels" "0: Discontinuous mode for regular channels disabled,1: Discontinuous mode for regular channels enabled"
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bitfld.long 0xC 14. "AUTDLY,Delayed conversion mode" "0: Auto-delayed conversion mode off,1: Auto-delayed conversion mode on"
bitfld.long 0xC 13. "CONT,Single / continuous conversion mode for regular conversions" "0: Single conversion mode,1: Continuous conversion mode"
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bitfld.long 0xC 12. "OVRMOD,Overrun mode" "0: ADC_DR register is preserved with the old data..,1: ADC_DR register is overwritten with the last.."
bitfld.long 0xC 10.--11. "ExTEN,External trigger enable and polarity selection for regular channels" "0: Hardware trigger detection disabled (conversions..,1: Hardware trigger detection on the rising edge,2: Hardware trigger detection on the falling edge,3: Hardware trigger detection on both the rising.."
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hexmask.long.byte 0xC 5.--9. 1. "ExTSEL,External trigger selection for regular group"
bitfld.long 0xC 2.--3. "RES,Data resolution" "0: 12-bit,1: 10-bit,2: 8-bit,3: 6-bit"
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bitfld.long 0xC 0.--1. "DMNGT,Data management configuration" "0: Regular conversion data stored in DR only,1: DMA one-shot mode selected,2: MDF mode detected,3: DMA circular mode selected"
line.long 0x10 "ADC_CFGR2,ADC configuration register 2"
hexmask.long.byte 0x10 28.--31. 1. "LSHIFT,Left shift factor"
hexmask.long.word 0x10 16.--25. 1. "OVSR,Oversampling ratio"
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bitfld.long 0x10 15. "SMPTRIG,Sampling time control trigger mode" "0: Sampling time control trigger mode disabled,1: Sampling time control trigger mode enabled"
bitfld.long 0x10 14. "SWTRIG,Software trigger bit for sampling time control trigger mode" "0: Software trigger starts the conversion for..,1: Software trigger starts the sampling for.."
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bitfld.long 0x10 13. "BULB,Bulb sampling mode" "0: Bulb sampling mode disabled,1: Bulb sampling mode enabled."
bitfld.long 0x10 10. "ROVSM,Regular oversampling mode" "0: Continued mode: When injected conversions are..,1: Resumed mode: When injected conversions are.."
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bitfld.long 0x10 9. "TROVS,Triggered regular oversampling" "0: All oversampled conversions for a channel are..,1: Each oversampled conversion for a channel needs.."
hexmask.long.byte 0x10 5.--8. 1. "OVSS,Oversampling shift"
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bitfld.long 0x10 1. "JOVSE,Injected oversampling enable" "0: Injected oversampling disabled,1: Injected oversampling enabled"
bitfld.long 0x10 0. "ROVSE,Regular oversampling enable" "0: Regular oversampling disabled,1: Regular oversampling enabled"
line.long 0x14 "ADC_SMPR1,ADC sample time register 1"
bitfld.long 0x14 27.--29. "SMP9,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x14 24.--26. "SMP8,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x14 21.--23. "SMP7,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x14 18.--20. "SMP6,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x14 15.--17. "SMP5,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x14 12.--14. "SMP4,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x14 9.--11. "SMP3,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x14 6.--8. "SMP2,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x14 3.--5. "SMP1,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x14 0.--2. "SMP0,Channel x sampling time selection (x=9 to 0)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
line.long 0x18 "ADC_SMPR2,ADC sample time register 2"
bitfld.long 0x18 27.--29. "SMP19,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x18 24.--26. "SMP18,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x18 21.--23. "SMP17,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x18 18.--20. "SMP16,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x18 15.--17. "SMP15,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x18 12.--14. "SMP14,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x18 9.--11. "SMP13,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x18 6.--8. "SMP12,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
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bitfld.long 0x18 3.--5. "SMP11,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
bitfld.long 0x18 0.--2. "SMP10,Channel x sampling time selection (x=19 to 10)" "0: 1.,1: 2.,2: 6.,3: 11.,4: 23.,5: 46.,6: 246.,?"
line.long 0x1C "ADC_PCSEL,ADC channel preselection register"
hexmask.long.tbyte 0x1C 0.--18. 1. "PCSEL,Channel i (Vless thansub>INPless than/sub>[i]) preselection"
group.long 0x30++0xF
line.long 0x0 "ADC_SQR1,ADC regular sequence register 1"
hexmask.long.byte 0x0 24.--28. 1. "SQ4,4th conversion in regular sequence"
hexmask.long.byte 0x0 18.--22. 1. "SQ3,3rd conversion in regular sequence"
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hexmask.long.byte 0x0 12.--16. 1. "SQ2,2nd conversion in regular sequence"
hexmask.long.byte 0x0 6.--10. 1. "SQ1,1st conversion in regular sequence"
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hexmask.long.byte 0x0 0.--3. 1. "L,Regular channel sequence length"
line.long 0x4 "ADC_SQR2,ADC regular sequence register 2"
hexmask.long.byte 0x4 24.--28. 1. "SQ9,9th conversion in regular sequence"
hexmask.long.byte 0x4 18.--22. 1. "SQ8,8th conversion in regular sequence"
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hexmask.long.byte 0x4 12.--16. 1. "SQ7,7th conversion in regular sequence"
hexmask.long.byte 0x4 6.--10. 1. "SQ6,6th conversion in regular sequence"
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hexmask.long.byte 0x4 0.--4. 1. "SQ5,5th conversion in regular sequence"
line.long 0x8 "ADC_SQR3,ADC regular sequence register 3"
hexmask.long.byte 0x8 24.--28. 1. "SQ14,14th conversion in regular sequence"
hexmask.long.byte 0x8 18.--22. 1. "SQ13,13th conversion in regular sequence"
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hexmask.long.byte 0x8 12.--16. 1. "SQ12,12th conversion in regular sequence"
hexmask.long.byte 0x8 6.--10. 1. "SQ11,11th conversion in regular sequence"
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hexmask.long.byte 0x8 0.--4. 1. "SQ10,10th conversion in regular sequence"
line.long 0xC "ADC_SQR4,ADC regular sequence register 4"
hexmask.long.byte 0xC 6.--10. 1. "SQ16,16th conversion in regular sequence"
hexmask.long.byte 0xC 0.--4. 1. "SQ15,15th conversion in regular sequence"
rgroup.long 0x40++0x3
line.long 0x0 "ADC_DR,ADC regular data register"
hexmask.long 0x0 0.--31. 1. "RDATA,Regular data converted"
group.long 0x4C++0x27
line.long 0x0 "ADC_JSQR,ADC injected sequence register"
hexmask.long.byte 0x0 27.--31. 1. "JSQ4,4th conversion in the injected sequence"
hexmask.long.byte 0x0 21.--25. 1. "JSQ3,3rd conversion in the injected sequence"
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hexmask.long.byte 0x0 15.--19. 1. "JSQ2,2nd conversion in the injected sequence"
hexmask.long.byte 0x0 9.--13. 1. "JSQ1,1st conversion in the injected sequence"
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bitfld.long 0x0 7.--8. "JExTEN,External trigger enable and polarity selection for injected channels" "0: Hardware trigger detection disabled (conversions..,1: Hardware trigger detection on the rising edge,2: Hardware trigger detection on the falling edge,3: Hardware trigger detection on both the rising.."
hexmask.long.byte 0x0 2.--6. 1. "JExTSEL,External trigger selection for injected group"
newline
bitfld.long 0x0 0.--1. "JL,Injected channel sequence length" "0: 1 conversion,1: 2 conversions,2: 3 conversions,3: 4 conversions"
line.long 0x4 "ADC_OFCFGR1,ADC offset 1 configuration register"
hexmask.long.byte 0x4 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y"
bitfld.long 0x4 26. "SSAT,Signed saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
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bitfld.long 0x4 25. "USAT,Unsigned saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
bitfld.long 0x4 24. "POSOFF,Positive offset enable" "0: Negative offset,1: Positive offset"
line.long 0x8 "ADC_OFCFGR2,ADC offset 2 configuration register"
hexmask.long.byte 0x8 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y"
bitfld.long 0x8 26. "SSAT,Signed saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
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bitfld.long 0x8 25. "USAT,Unsigned saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
bitfld.long 0x8 24. "POSOFF,Positive offset enable" "0: Negative offset,1: Positive offset"
line.long 0xC "ADC_OFCFGR3,ADC offset 3 configuration register"
hexmask.long.byte 0xC 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y"
bitfld.long 0xC 26. "SSAT,Signed saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
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bitfld.long 0xC 25. "USAT,Unsigned saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
bitfld.long 0xC 24. "POSOFF,Positive offset enable" "0: Negative offset,1: Positive offset"
line.long 0x10 "ADC_OFCFGR4,ADC offset 4 configuration register"
hexmask.long.byte 0x10 27.--31. 1. "OFFSET_CH,Channel selection for the data offset y"
bitfld.long 0x10 26. "SSAT,Signed saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
newline
bitfld.long 0x10 25. "USAT,Unsigned saturation enable" "0: Offset is subtracted maintaining the data..,1: Offset is subtracted and result is saturated to.."
bitfld.long 0x10 24. "POSOFF,Positive offset enable" "0: Negative offset,1: Positive offset"
line.long 0x14 "ADC_OFR1,ADC offset 1 register"
hexmask.long.tbyte 0x14 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits"
line.long 0x18 "ADC_OFR2,ADC offset 2 register"
hexmask.long.tbyte 0x18 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits"
line.long 0x1C "ADC_OFR3,ADC offset 3 register"
hexmask.long.tbyte 0x1C 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits"
line.long 0x20 "ADC_OFR4,ADC offset 4 register"
hexmask.long.tbyte 0x20 0.--21. 1. "OFFSET,Data offset y for the channel programmed in OFFSETy_CH[4:0] bits"
line.long 0x24 "ADC_GCOMP,ADC gain compensation register"
bitfld.long 0x24 31. "GCOMP,Gain compensation mode" "0: Regular ADC operation mode,1: Gain compensation enabled and applied on all.."
hexmask.long.word 0x24 0.--13. 1. "GCOMPCOEFF,Gain compensation coefficient"
rgroup.long 0x80++0xF
line.long 0x0 "ADC_JDR1,ADC injected channel 1 data register"
hexmask.long 0x0 0.--31. 1. "JDATA,Injected data"
line.long 0x4 "ADC_JDR2,ADC injected channel 2 data register"
hexmask.long 0x4 0.--31. 1. "JDATA,Injected data"
line.long 0x8 "ADC_JDR3,ADC injected channel 3 data register"
hexmask.long 0x8 0.--31. 1. "JDATA,Injected data"
line.long 0xC "ADC_JDR4,ADC injected channel 4 data register"
hexmask.long 0xC 0.--31. 1. "JDATA,Injected data"
group.long 0xA0++0x27
line.long 0x0 "ADC_AWD2CR,ADC Analog Watchdog 2 Configuration Register"
hexmask.long.tbyte 0x0 0.--18. 1. "AWDCH,Analog watchdog 2 channel selection"
line.long 0x4 "ADC_AWD3CR,ADC Analog Watchdog 3 Configuration Register"
hexmask.long.tbyte 0x4 0.--18. 1. "AWDCH,Analog watchdog 3 channel selection"
line.long 0x8 "ADC_AWD1LTR,ADC analog watchdog 1 lower threshold register"
hexmask.long.tbyte 0x8 0.--22. 1. "LTR,Analog watchdog 1 lower threshold"
line.long 0xC "ADC_AWD1HTR,ADC analog watchdog 1 higher threshold register"
bitfld.long 0xC 29.--31. "AWDFILT,Analog watchdog filtering parameter" "0: No filtering one detection generates an AWDx..,1: two consecutive detections generate an AWDx flag..,?,?,?,?,?,7: Eight consecutive detections generate an AWDx.."
hexmask.long.tbyte 0xC 0.--22. 1. "HTR,Analog watchdog 1 higher threshold"
line.long 0x10 "ADC_AWD2LTR,ADC analog watchdog 2 lower threshold register"
hexmask.long.tbyte 0x10 0.--22. 1. "LTR,Analog watchdog 2 lower threshold"
line.long 0x14 "ADC_AWD2HTR,ADC analog watchdog 2 higher threshold register"
hexmask.long.tbyte 0x14 0.--22. 1. "HTR,Analog watchdog 2 higher threshold"
line.long 0x18 "ADC_AWD3LTR,ADC analog watchdog 3 lower threshold register"
hexmask.long.tbyte 0x18 0.--22. 1. "LTR,Analog watchdog 3 lower threshold"
line.long 0x1C "ADC_AWD3HTR,ADC analog watchdog 3 higher threshold register"
hexmask.long.tbyte 0x1C 0.--22. 1. "HTR,Analog watchdog 3 higher threshold"
line.long 0x20 "ADC_DIFSEL,ADC differential mode selection register"
hexmask.long.tbyte 0x20 0.--18. 1. "DIFSEL,Differential mode for channels 18 to 0."
line.long 0x24 "ADC_CALFACT,ADC calibration factors"
hexmask.long.byte 0x24 0.--6. 1. "CALFACT,Calibration factors"
group.long 0xD0++0x3
line.long 0x0 "ADC_OR,ADC option register"
bitfld.long 0x0 0. "OP0,Option bit 0" "0: Vless thansub>COREless than/sub> disabled,1: Vless thansub>COREless than/sub> enabled"
tree.end
tree "ADC12"
base ad:0x42028300
rgroup.long 0x0++0x3
line.long 0x0 "ADCC_CSR,ADC common status register"
bitfld.long 0x0 28. "LDORDY_SLV,ADC internal voltage regulator flag of the slave ADC" "0,1"
bitfld.long 0x0 26. "JQOVF_SLV,Injected context queue overflow flag of the slave ADC" "0,1"
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bitfld.long 0x0 25. "AWD3_SLV,Analog watchdog 3 flag of the slave ADC" "0,1"
bitfld.long 0x0 24. "AWD2_SLV,Analog watchdog 2 flag of the slave ADC" "0,1"
newline
bitfld.long 0x0 23. "AWD1_SLV,Analog watchdog 1 flag of the slave ADC" "0,1"
bitfld.long 0x0 22. "JEOS_SLV,End of injected sequence flag of the slave ADC" "0,1"
newline
bitfld.long 0x0 21. "JEOC_SLV,End of injected conversion flag of the slave ADC" "0,1"
bitfld.long 0x0 20. "OVR_SLV,Overrun flag of the slave ADC" "0,1"
newline
bitfld.long 0x0 19. "EOS_SLV,End of regular sequence flag of the slave ADC." "0,1"
bitfld.long 0x0 18. "EOC_SLV,End of regular conversion of the slave ADC" "0,1"
newline
bitfld.long 0x0 17. "EOSMP_SLV,End of sampling phase flag of the slave ADC" "0,1"
bitfld.long 0x0 16. "ADRDY_SLV,Slave ADC ready" "0,1"
newline
bitfld.long 0x0 12. "LDORDY_MST,ADC internal voltage regulator flag of the master ADC" "0,1"
bitfld.long 0x0 10. "JQOVF_MST,Injected context queue overflow flag of the master ADC" "0,1"
newline
bitfld.long 0x0 9. "AWD3_MST,Analog watchdog 3 flag of the master ADC" "0,1"
bitfld.long 0x0 8. "AWD2_MST,Analog watchdog 2 flag of the master ADC" "0,1"
newline
bitfld.long 0x0 7. "AWD1_MST,Analog watchdog 1 flag of the master ADC" "0,1"
bitfld.long 0x0 6. "JEOS_MST,End of injected sequence flag of the master ADC" "0,1"
newline
bitfld.long 0x0 5. "JEOC_MST,End of injected conversion flag of the master ADC" "0,1"
bitfld.long 0x0 4. "OVR_MST,Overrun flag of the master ADC" "0,1"
newline
bitfld.long 0x0 3. "EOS_MST,End of regular sequence flag of the master ADC" "0,1"
bitfld.long 0x0 2. "EOC_MST,End of regular conversion of the master ADC" "0,1"
newline
bitfld.long 0x0 1. "EOSMP_MST,End of Sampling phase flag of the master ADC" "0,1"
bitfld.long 0x0 0. "ADRDY_MST,Master ADC ready" "0,1"
group.long 0x8++0x3
line.long 0x0 "ADCC_CCR,ADC common control register"
bitfld.long 0x0 24. "VBATEN,VBAT enable" "0: Vless thansub>BATless than/sub> channel disabled,1: Vless thansub>BATless than/sub> channel enabled"
bitfld.long 0x0 23. "TSEN,Temperature sensor voltage enable" "0: Temperature sensor channel disabled,1: Temperature sensor channel enabled"
newline
bitfld.long 0x0 22. "VREFEN,Vless thansub>REFINTless than/sub> enable" "0: Vless thansub>REFINTless than/sub> channel..,1: Vless thansub>REFINTless than/sub> channel enabled"
bitfld.long 0x0 14.--15. "DAMDF,Dual ADC mode data format" "0: Dual ADC mode without data packing (ADCC_CDR and..,?,2: Data formatting mode for any data width..,3: Data formatting mode for data width lower that 8.."
newline
hexmask.long.byte 0x0 8.--11. 1. "DELAY,Delay between two sampling phases"
hexmask.long.byte 0x0 0.--4. 1. "DUAL,Dual ADC mode selection"
rgroup.long 0xC++0x7
line.long 0x0 "ADCC_CDR,ADC common regular data register for dual mode"
hexmask.long.word 0x0 16.--31. 1. "RDATA_SLV,Regular data of the slave ADC"
hexmask.long.word 0x0 0.--15. 1. "RDATA_MST,Regular data of the master ADC."
line.long 0x4 "ADCC_CDR2,ADC common regular data register for dual mode"
hexmask.long 0x4 0.--31. 1. "RDATA_ALT,Regular data of the master/slave alternated ADCs."
tree.end
tree "SEC_ADC12"
base ad:0x52028300
rgroup.long 0x0++0x3
line.long 0x0 "ADCC_CSR,ADC common status register"
bitfld.long 0x0 28. "LDORDY_SLV,ADC internal voltage regulator flag of the slave ADC" "0,1"
bitfld.long 0x0 26. "JQOVF_SLV,Injected context queue overflow flag of the slave ADC" "0,1"
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bitfld.long 0x0 25. "AWD3_SLV,Analog watchdog 3 flag of the slave ADC" "0,1"
bitfld.long 0x0 24. "AWD2_SLV,Analog watchdog 2 flag of the slave ADC" "0,1"
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bitfld.long 0x0 23. "AWD1_SLV,Analog watchdog 1 flag of the slave ADC" "0,1"
bitfld.long 0x0 22. "JEOS_SLV,End of injected sequence flag of the slave ADC" "0,1"
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bitfld.long 0x0 21. "JEOC_SLV,End of injected conversion flag of the slave ADC" "0,1"
bitfld.long 0x0 20. "OVR_SLV,Overrun flag of the slave ADC" "0,1"
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bitfld.long 0x0 19. "EOS_SLV,End of regular sequence flag of the slave ADC." "0,1"
bitfld.long 0x0 18. "EOC_SLV,End of regular conversion of the slave ADC" "0,1"
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bitfld.long 0x0 17. "EOSMP_SLV,End of sampling phase flag of the slave ADC" "0,1"
bitfld.long 0x0 16. "ADRDY_SLV,Slave ADC ready" "0,1"
newline
bitfld.long 0x0 12. "LDORDY_MST,ADC internal voltage regulator flag of the master ADC" "0,1"
bitfld.long 0x0 10. "JQOVF_MST,Injected context queue overflow flag of the master ADC" "0,1"
newline
bitfld.long 0x0 9. "AWD3_MST,Analog watchdog 3 flag of the master ADC" "0,1"
bitfld.long 0x0 8. "AWD2_MST,Analog watchdog 2 flag of the master ADC" "0,1"
newline
bitfld.long 0x0 7. "AWD1_MST,Analog watchdog 1 flag of the master ADC" "0,1"
bitfld.long 0x0 6. "JEOS_MST,End of injected sequence flag of the master ADC" "0,1"
newline
bitfld.long 0x0 5. "JEOC_MST,End of injected conversion flag of the master ADC" "0,1"
bitfld.long 0x0 4. "OVR_MST,Overrun flag of the master ADC" "0,1"
newline
bitfld.long 0x0 3. "EOS_MST,End of regular sequence flag of the master ADC" "0,1"
bitfld.long 0x0 2. "EOC_MST,End of regular conversion of the master ADC" "0,1"
newline
bitfld.long 0x0 1. "EOSMP_MST,End of Sampling phase flag of the master ADC" "0,1"
bitfld.long 0x0 0. "ADRDY_MST,Master ADC ready" "0,1"
group.long 0x8++0x3
line.long 0x0 "ADCC_CCR,ADC common control register"
bitfld.long 0x0 24. "VBATEN,VBAT enable" "0: Vless thansub>BATless than/sub> channel disabled,1: Vless thansub>BATless than/sub> channel enabled"
bitfld.long 0x0 23. "TSEN,Temperature sensor voltage enable" "0: Temperature sensor channel disabled,1: Temperature sensor channel enabled"
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bitfld.long 0x0 22. "VREFEN,Vless thansub>REFINTless than/sub> enable" "0: Vless thansub>REFINTless than/sub> channel..,1: Vless thansub>REFINTless than/sub> channel enabled"
bitfld.long 0x0 14.--15. "DAMDF,Dual ADC mode data format" "0: Dual ADC mode without data packing (ADCC_CDR and..,?,2: Data formatting mode for any data width..,3: Data formatting mode for data width lower that 8.."
newline
hexmask.long.byte 0x0 8.--11. 1. "DELAY,Delay between two sampling phases"
hexmask.long.byte 0x0 0.--4. 1. "DUAL,Dual ADC mode selection"
rgroup.long 0xC++0x7
line.long 0x0 "ADCC_CDR,ADC common regular data register for dual mode"
hexmask.long.word 0x0 16.--31. 1. "RDATA_SLV,Regular data of the slave ADC"
hexmask.long.word 0x0 0.--15. 1. "RDATA_MST,Regular data of the master ADC."
line.long 0x4 "ADCC_CDR2,ADC common regular data register for dual mode"
hexmask.long 0x4 0.--31. 1. "RDATA_ALT,Regular data of the master/slave alternated ADCs."
tree.end
tree.end
tree "ADF (Audio Digital Filter)"
base ad:0x0
tree "ADF"
base ad:0x40034000
group.long 0x0++0x7
line.long 0x0 "ADF_GCR,ADF global control register"
bitfld.long 0x0 0. "TRGO,Trigger output control" "0: Write 0 has no effect.,1: Write 1 generates a positive pulse on the.."
line.long 0x4 "ADF_CKGCR,ADF clock generator control register"
rbitfld.long 0x4 31. "CKGACTIVE,Clock generator active flag" "0: The clock generator is not active and can be..,1: The clock generator is active and protected.."
hexmask.long.byte 0x4 24.--30. 1. "PROCDIV,Divider to control the serial interface clock"
newline
hexmask.long.byte 0x4 16.--19. 1. "CCKDIV,Divider to control the ADF_CCK clock"
hexmask.long.byte 0x4 12.--15. 1. "TRGSRC,Digital filter trigger signal selection"
newline
bitfld.long 0x4 8. "TRGSENS,CKGEN trigger sensitivity selection" "0: A rising edge event triggers the activation of..,1: A falling edge even triggers the activation of.."
bitfld.long 0x4 6. "CCK1DIR,ADF_CCK1 direction" "0: The ADF_CCK1 pin direction is in input.,1: The ADF_CCK1 pin direction is in output."
newline
bitfld.long 0x4 5. "CCK0DIR,ADF_CCK0 direction" "0: The ADF_CCK0 pin direction is in input.,1: The ADF_CCK0 pin direction is in output."
bitfld.long 0x4 4. "CKGMOD,Clock generator mode" "0: The kernel clock is provided to the dividers as..,1: The kernel clock is provided to the dividers.."
newline
bitfld.long 0x4 2. "CCK1EN,ADF_CCK1 clock enable" "0: Bitstream clock not generated,1: Bitstream clock generated on the ADF_CCK1 pin."
bitfld.long 0x4 1. "CCK0EN,ADF_CCK0 clock enable" "0: Bitstream clock not generated,1: Bitstream clock generated on the ADF_CCK0 pin"
newline
bitfld.long 0x4 0. "CKGDEN,CKGEN dividers enable" "0: CKGEN dividers disabled,1: CKGEN dividers enabled"
group.long 0x20++0x3
line.long 0x0 "ADF_TRGISEL,ADF trigger input selection register"
bitfld.long 0x0 0.--1. "TRGISEL,Input selection for adf_trgi" "0: exti15 is selected (default after reset),1: tim1_trgo is selected,2: tim3_trgo is selected,3: tim6_trgo is selected"
group.long 0x80++0x13
line.long 0x0 "ADF_SITF0CR,ADF serial interface control register 0"
rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "0: The serial interface is not active and can be..,1: The serial interface is active and protected.."
hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold"
newline
bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "0: LF_MASTER SPI mode,1: Normal SPI mode,2: Manchester mode: rising edge = logic 0 falling..,3: Manchester mode: rising edge = logic 1 falling.."
bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "0: Serial clock source is ADF_CCK0.,1: Serial clock source is ADF_CCK1.,?,?"
newline
bitfld.long 0x0 0. "SITFEN,Serial interface enable" "0: Serial interface disabled,1: Serial interface enabled"
line.long 0x4 "ADF_BSMx0CR,ADF bitstream matrix control register 0"
rbitfld.long 0x4 31. "BSMxACTIVE,BSMx active flag" "0: BSMx is not active and can be configured if..,1: BSMx is active and protected fields cannot be.."
hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream selection"
line.long 0x8 "ADF_DFLT0CR,ADF digital filter control register 0"
rbitfld.long 0x8 31. "DFLTACTIVE,DFLT0 active flag" "0: DFLT0 not active (can be re-enabled again via..,1: DFLT0 active"
rbitfld.long 0x8 30. "DFLTRUN,DFLT0 run status flag" "0: DFLT0 not running and ready to accept a new..,1: DFLT0running"
newline
hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded"
hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,DFLT0 trigger signal selection"
newline
bitfld.long 0x8 8. "TRGSENS,DFLT0 trigger sensitivity selection" "0: A rising edge event triggers the acquisition.,1: A falling edge even triggers the acquisition."
bitfld.long 0x8 4.--6. "ACQMOD,DFLT0 trigger mode" "0: Asynchronous continuous acquisition mode,1: Asynchronous single-shot acquisition mode,2: Synchronous continuous acquisition mode,3: Synchronous single-shot acquisition mode,4: Window continuous acquisition mode,?,?,?"
newline
bitfld.long 0x8 2. "FTH,RxFIFO threshold selection" "0: RxFIFO threshold event generated when the RxFIFO..,1: RxFIFO threshold event generated when the RxFIFO.."
bitfld.long 0x8 1. "DMAEN,DMA requests enable" "0: DMA interface for the corresponding digital..,1: DMA interface for the corresponding digital.."
newline
bitfld.long 0x8 0. "DFLTEN,DFLT0 enable" "0: Acquisition immediately stopped,1: Acquisition immediately started if ACQMOD[2:0] =.."
line.long 0xC "ADF_DFLT0CICR,ADF digital filer configuration register 0"
hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection"
bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "0: Decimation ratio is 2.,1: Decimation ratio is 2."
newline
hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection"
bitfld.long 0xC 4.--6. "CICMOD,Select the CIC order" "?,?,?,?,4: MCIC configured in single Sincless thansup>4less..,5: MCIC configured in single Sincless thansup>5less..,?,?"
newline
bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,2: Stream coming from the ADCITF1 selected,3: Stream coming from the ADCITF2 selected"
line.long 0x10 "ADF_DFLT0RSFR,ADF reshape filter configuration register 0"
bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "0: Cut-off frequency = 0.,1: Cut-off frequency = 0.,2: Cut-off frequency = 0.,3: Cut-off frequency = 0."
bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "0: HPF not bypassed (default value),1: HPF bypassed"
newline
bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "0: Decimation ratio is 4 (default value).,1: Decimation ratio is 1."
bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "0: Reshape filter not bypassed (default value),1: Reshape filter bypassed"
group.long 0xA4++0x3
line.long 0x0 "ADF_DLY0CR,ADF delay control register 0"
rbitfld.long 0x0 31. "SKPBF,Skip busy flag" "0: ADF ready to accept a new value into SKPDLY[6:0],1: Last valid SKPDLY[6:0] still under precessing"
hexmask.long.byte 0x0 0.--6. 1. "SKPDLY,Delay to apply to a bitstream"
group.long 0xAC++0x7
line.long 0x0 "ADF_DFLT0IER,ADF DFLT0 interrupt enable register"
bitfld.long 0x0 13. "SDLVLIE,SAD sound-level value ready enable" "0: Sound-level-ready interrupt disabled,1: Sound-level-ready interrupt enabled"
bitfld.long 0x0 12. "SDDETIE,Sound activity detection interrupt enable" "0: Sound-trigger interrupt disabled,1: Sound-trigger interrupt enabled"
newline
bitfld.long 0x0 11. "RFOVRIE,Reshape filter overrun interrupt enable" "0: Reshape filter overrun interrupt disabled,1: Reshape filter overrun interrupt enabled"
bitfld.long 0x0 10. "CKABIE,Clock absence detection interrupt enable" "0: Clock absence interrupt disabled,1: Clock absence interrupt enabled"
newline
bitfld.long 0x0 9. "SATIE,Saturation detection interrupt enable" "0: Saturation interrupt disabled,1: Saturation interrupt enabled"
bitfld.long 0x0 1. "DOVRIE,Data overflow interrupt enable" "0: Data overflow interrupt disabled,1: Data overflow interrupt enabled"
newline
bitfld.long 0x0 0. "FTHIE,RxFIFO threshold interrupt enable" "0: RxFIFO threshold interrupt disabled,1: RxFIFO threshold interrupt enabled"
line.long 0x4 "ADF_DFLT0ISR,ADF DFLT0 interrupt status register 0"
bitfld.long 0x4 13. "SDLVLF,Sound level value ready flag" "0: Read 0 means that new sound level value is not..,1: Read 1 means that new sound level value is ready."
bitfld.long 0x4 12. "SDDETF,Sound activity detection flag" "0: Read 0 means that no sound activity is detected.,1: Read 1 means that sound activity is detected."
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bitfld.long 0x4 11. "RFOVRF,Reshape filter overrun detection flag" "0: Read 0 means that no reshape filter overrun is..,1: Read 1 means that reshape filter overrun is.."
bitfld.long 0x4 10. "CKABF,Clock absence detection flag" "0: Read 0 means that no clock absence is detected.,1: Read 1 means that a clock absence is detected."
newline
bitfld.long 0x4 9. "SATF,Saturation detection flag" "0: Read 0 means that no saturation is detected.,1: Read 1 means that a saturation is detected."
rbitfld.long 0x4 3. "RxNEF,RxFIFO not empty flag" "0: RxFIFO empty,1: RxFIFO not empty"
newline
bitfld.long 0x4 1. "DOVRF,Data overflow flag" "0: Read 0 means that no overflow is detected.,1: Read 1 means that an overflow is detected; Write.."
rbitfld.long 0x4 0. "FTHF,RxFIFO threshold flag" "0: RxFIFO threshold not reached,1: RxFIFO threshold reached"
group.long 0xB8++0x7
line.long 0x0 "ADF_SADCR,ADF SAD control register"
rbitfld.long 0x0 31. "SADACTIVE,SAD Active flag" "0: SAD not active and can be configured if needed,1: SAD active and protected fields cannot be.."
bitfld.long 0x0 12.--13. "SADMOD,SAD working mode" "0: Threshold value computed according to the..,1: Threshold value equal to ANMIN[12:0] multiplied..,?,?"
newline
bitfld.long 0x0 8.--10. "FRSIZE,Frame size" "0: 8 PCM samples used to compute the short-term..,1: 16 PCM samples used to compute the short-term..,2: 32 PCM samples used to compute the short-term..,3: 64 PCM samples used to compute the short-term..,4: 128 PCM samples used to compute the short-term..,5: 256 PCM samples used to compute the short-term..,?,?"
bitfld.long 0x0 7. "HYSTEN,Hysteresis enable" "0: Hysteresis function disabled.,1: Hysteresis function enabled."
newline
rbitfld.long 0x0 4.--5. "SADST,SAD state" "0: SAD in LEARN state,1: SAD in MONITOR state,?,3: SAD in DETECT state"
bitfld.long 0x0 3. "DETCFG,Sound trigger event configuration" "0: sddet_evt generated when SAD enters the MONITOR..,1: sddet_evt generated when SAD enters or exits the.."
newline
bitfld.long 0x0 1.--2. "DATCAP,Data capture mode" "0: Samples from DFLT0 not transfered into the memory,1: Samples from DFLT0 transfered into the memory..,?,?"
bitfld.long 0x0 0. "SADEN,Sound activity detector enable" "0: SAD disabled and SAD state reset,1: SAD enabled"
line.long 0x4 "ADF_SADCFGR,ADF SAD configuration register"
hexmask.long.word 0x4 16.--28. 1. "ANMIN,Minimum noise level"
bitfld.long 0x4 12.--14. "HGOVR,Hangover time window" "0: SAD back to MONITOR state if sound is below..,1: SAD back to MONITOR state if sound is below..,2: SAD back to MONITOR state if sound is below..,3: SAD back to MONITOR state if sound is below..,4: SAD back to MONITOR state if sound is below..,5: SAD back to MONITOR state if sound is below..,6: SAD back to MONITOR state if sound is below..,7: SAD back to MONITOR state if sound is below.."
newline
bitfld.long 0x4 8.--10. "LFRNB,Number of learning frames" "0: 2 frames used to compute the initial noise level,1: 4 frames used to compute the initial noise level,2: 8 frames used to compute the initial noise level,3: 16 frames used to compute the initial noise level,?,?,?,?"
bitfld.long 0x4 4.--6. "ANSLP,Ambient noise slope control" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 0.--3. 1. "SNTHR,Signal to noise threshold"
rgroup.long 0xC0++0x7
line.long 0x0 "ADF_SADSDLVR,ADF SAD sound level register"
hexmask.long.word 0x0 0.--14. 1. "SDLVL,Short term sound level"
line.long 0x4 "ADF_SADANLVR,ADF SAD ambient noise level register"
hexmask.long.word 0x4 0.--14. 1. "ANLVL,Ambient noise level estimation"
rgroup.long 0xF0++0x3
line.long 0x0 "ADF_DFLT0DR,ADF digital filter data register 0"
hexmask.long.tbyte 0x0 8.--31. 1. "DR,Data processed by DFT0"
tree.end
tree "SEC_ADF"
base ad:0x50034000
group.long 0x0++0x7
line.long 0x0 "ADF_GCR,ADF global control register"
bitfld.long 0x0 0. "TRGO,Trigger output control" "0: Write 0 has no effect.,1: Write 1 generates a positive pulse on the.."
line.long 0x4 "ADF_CKGCR,ADF clock generator control register"
rbitfld.long 0x4 31. "CKGACTIVE,Clock generator active flag" "0: The clock generator is not active and can be..,1: The clock generator is active and protected.."
hexmask.long.byte 0x4 24.--30. 1. "PROCDIV,Divider to control the serial interface clock"
newline
hexmask.long.byte 0x4 16.--19. 1. "CCKDIV,Divider to control the ADF_CCK clock"
hexmask.long.byte 0x4 12.--15. 1. "TRGSRC,Digital filter trigger signal selection"
newline
bitfld.long 0x4 8. "TRGSENS,CKGEN trigger sensitivity selection" "0: A rising edge event triggers the activation of..,1: A falling edge even triggers the activation of.."
bitfld.long 0x4 6. "CCK1DIR,ADF_CCK1 direction" "0: The ADF_CCK1 pin direction is in input.,1: The ADF_CCK1 pin direction is in output."
newline
bitfld.long 0x4 5. "CCK0DIR,ADF_CCK0 direction" "0: The ADF_CCK0 pin direction is in input.,1: The ADF_CCK0 pin direction is in output."
bitfld.long 0x4 4. "CKGMOD,Clock generator mode" "0: The kernel clock is provided to the dividers as..,1: The kernel clock is provided to the dividers.."
newline
bitfld.long 0x4 2. "CCK1EN,ADF_CCK1 clock enable" "0: Bitstream clock not generated,1: Bitstream clock generated on the ADF_CCK1 pin."
bitfld.long 0x4 1. "CCK0EN,ADF_CCK0 clock enable" "0: Bitstream clock not generated,1: Bitstream clock generated on the ADF_CCK0 pin"
newline
bitfld.long 0x4 0. "CKGDEN,CKGEN dividers enable" "0: CKGEN dividers disabled,1: CKGEN dividers enabled"
group.long 0x20++0x3
line.long 0x0 "ADF_TRGISEL,ADF trigger input selection register"
bitfld.long 0x0 0.--1. "TRGISEL,Input selection for adf_trgi" "0: exti15 is selected (default after reset),1: tim1_trgo is selected,2: tim3_trgo is selected,3: tim6_trgo is selected"
group.long 0x80++0x13
line.long 0x0 "ADF_SITF0CR,ADF serial interface control register 0"
rbitfld.long 0x0 31. "SITFACTIVE,Serial interface active flag" "0: The serial interface is not active and can be..,1: The serial interface is active and protected.."
hexmask.long.byte 0x0 8.--12. 1. "STH,Manchester symbol threshold/SPI threshold"
newline
bitfld.long 0x0 4.--5. "SITFMOD,Serial interface type" "0: LF_MASTER SPI mode,1: Normal SPI mode,2: Manchester mode: rising edge = logic 0 falling..,3: Manchester mode: rising edge = logic 1 falling.."
bitfld.long 0x0 1.--2. "SCKSRC,Serial clock source" "0: Serial clock source is ADF_CCK0.,1: Serial clock source is ADF_CCK1.,?,?"
newline
bitfld.long 0x0 0. "SITFEN,Serial interface enable" "0: Serial interface disabled,1: Serial interface enabled"
line.long 0x4 "ADF_BSMx0CR,ADF bitstream matrix control register 0"
rbitfld.long 0x4 31. "BSMxACTIVE,BSMx active flag" "0: BSMx is not active and can be configured if..,1: BSMx is active and protected fields cannot be.."
hexmask.long.byte 0x4 0.--4. 1. "BSSEL,Bitstream selection"
line.long 0x8 "ADF_DFLT0CR,ADF digital filter control register 0"
rbitfld.long 0x8 31. "DFLTACTIVE,DFLT0 active flag" "0: DFLT0 not active (can be re-enabled again via..,1: DFLT0 active"
rbitfld.long 0x8 30. "DFLTRUN,DFLT0 run status flag" "0: DFLT0 not running and ready to accept a new..,1: DFLT0running"
newline
hexmask.long.byte 0x8 20.--27. 1. "NBDIS,Number of samples to be discarded"
hexmask.long.byte 0x8 12.--15. 1. "TRGSRC,DFLT0 trigger signal selection"
newline
bitfld.long 0x8 8. "TRGSENS,DFLT0 trigger sensitivity selection" "0: A rising edge event triggers the acquisition.,1: A falling edge even triggers the acquisition."
bitfld.long 0x8 4.--6. "ACQMOD,DFLT0 trigger mode" "0: Asynchronous continuous acquisition mode,1: Asynchronous single-shot acquisition mode,2: Synchronous continuous acquisition mode,3: Synchronous single-shot acquisition mode,4: Window continuous acquisition mode,?,?,?"
newline
bitfld.long 0x8 2. "FTH,RxFIFO threshold selection" "0: RxFIFO threshold event generated when the RxFIFO..,1: RxFIFO threshold event generated when the RxFIFO.."
bitfld.long 0x8 1. "DMAEN,DMA requests enable" "0: DMA interface for the corresponding digital..,1: DMA interface for the corresponding digital.."
newline
bitfld.long 0x8 0. "DFLTEN,DFLT0 enable" "0: Acquisition immediately stopped,1: Acquisition immediately started if ACQMOD[2:0] =.."
line.long 0xC "ADF_DFLT0CICR,ADF digital filer configuration register 0"
hexmask.long.byte 0xC 20.--25. 1. "SCALE,Scaling factor selection"
bitfld.long 0xC 16. "MCICD8,CIC decimation ratio selection" "0: Decimation ratio is 2.,1: Decimation ratio is 2."
newline
hexmask.long.byte 0xC 8.--15. 1. "MCICD,CIC decimation ratio selection"
bitfld.long 0xC 4.--6. "CICMOD,Select the CIC order" "?,?,?,?,4: MCIC configured in single Sincless thansup>4less..,5: MCIC configured in single Sincless thansup>5less..,?,?"
newline
bitfld.long 0xC 0.--1. "DATSRC,Source data for the digital filter" "?,?,2: Stream coming from the ADCITF1 selected,3: Stream coming from the ADCITF2 selected"
line.long 0x10 "ADF_DFLT0RSFR,ADF reshape filter configuration register 0"
bitfld.long 0x10 8.--9. "HPFC,High-pass filter cut-off frequency" "0: Cut-off frequency = 0.,1: Cut-off frequency = 0.,2: Cut-off frequency = 0.,3: Cut-off frequency = 0."
bitfld.long 0x10 7. "HPFBYP,High-pass filter bypass" "0: HPF not bypassed (default value),1: HPF bypassed"
newline
bitfld.long 0x10 4. "RSFLTD,Reshaper filter decimation ratio" "0: Decimation ratio is 4 (default value).,1: Decimation ratio is 1."
bitfld.long 0x10 0. "RSFLTBYP,Reshaper filter bypass" "0: Reshape filter not bypassed (default value),1: Reshape filter bypassed"
group.long 0xA4++0x3
line.long 0x0 "ADF_DLY0CR,ADF delay control register 0"
rbitfld.long 0x0 31. "SKPBF,Skip busy flag" "0: ADF ready to accept a new value into SKPDLY[6:0],1: Last valid SKPDLY[6:0] still under precessing"
hexmask.long.byte 0x0 0.--6. 1. "SKPDLY,Delay to apply to a bitstream"
group.long 0xAC++0x7
line.long 0x0 "ADF_DFLT0IER,ADF DFLT0 interrupt enable register"
bitfld.long 0x0 13. "SDLVLIE,SAD sound-level value ready enable" "0: Sound-level-ready interrupt disabled,1: Sound-level-ready interrupt enabled"
bitfld.long 0x0 12. "SDDETIE,Sound activity detection interrupt enable" "0: Sound-trigger interrupt disabled,1: Sound-trigger interrupt enabled"
newline
bitfld.long 0x0 11. "RFOVRIE,Reshape filter overrun interrupt enable" "0: Reshape filter overrun interrupt disabled,1: Reshape filter overrun interrupt enabled"
bitfld.long 0x0 10. "CKABIE,Clock absence detection interrupt enable" "0: Clock absence interrupt disabled,1: Clock absence interrupt enabled"
newline
bitfld.long 0x0 9. "SATIE,Saturation detection interrupt enable" "0: Saturation interrupt disabled,1: Saturation interrupt enabled"
bitfld.long 0x0 1. "DOVRIE,Data overflow interrupt enable" "0: Data overflow interrupt disabled,1: Data overflow interrupt enabled"
newline
bitfld.long 0x0 0. "FTHIE,RxFIFO threshold interrupt enable" "0: RxFIFO threshold interrupt disabled,1: RxFIFO threshold interrupt enabled"
line.long 0x4 "ADF_DFLT0ISR,ADF DFLT0 interrupt status register 0"
bitfld.long 0x4 13. "SDLVLF,Sound level value ready flag" "0: Read 0 means that new sound level value is not..,1: Read 1 means that new sound level value is ready."
bitfld.long 0x4 12. "SDDETF,Sound activity detection flag" "0: Read 0 means that no sound activity is detected.,1: Read 1 means that sound activity is detected."
newline
bitfld.long 0x4 11. "RFOVRF,Reshape filter overrun detection flag" "0: Read 0 means that no reshape filter overrun is..,1: Read 1 means that reshape filter overrun is.."
bitfld.long 0x4 10. "CKABF,Clock absence detection flag" "0: Read 0 means that no clock absence is detected.,1: Read 1 means that a clock absence is detected."
newline
bitfld.long 0x4 9. "SATF,Saturation detection flag" "0: Read 0 means that no saturation is detected.,1: Read 1 means that a saturation is detected."
rbitfld.long 0x4 3. "RxNEF,RxFIFO not empty flag" "0: RxFIFO empty,1: RxFIFO not empty"
newline
bitfld.long 0x4 1. "DOVRF,Data overflow flag" "0: Read 0 means that no overflow is detected.,1: Read 1 means that an overflow is detected; Write.."
rbitfld.long 0x4 0. "FTHF,RxFIFO threshold flag" "0: RxFIFO threshold not reached,1: RxFIFO threshold reached"
group.long 0xB8++0x7
line.long 0x0 "ADF_SADCR,ADF SAD control register"
rbitfld.long 0x0 31. "SADACTIVE,SAD Active flag" "0: SAD not active and can be configured if needed,1: SAD active and protected fields cannot be.."
bitfld.long 0x0 12.--13. "SADMOD,SAD working mode" "0: Threshold value computed according to the..,1: Threshold value equal to ANMIN[12:0] multiplied..,?,?"
newline
bitfld.long 0x0 8.--10. "FRSIZE,Frame size" "0: 8 PCM samples used to compute the short-term..,1: 16 PCM samples used to compute the short-term..,2: 32 PCM samples used to compute the short-term..,3: 64 PCM samples used to compute the short-term..,4: 128 PCM samples used to compute the short-term..,5: 256 PCM samples used to compute the short-term..,?,?"
bitfld.long 0x0 7. "HYSTEN,Hysteresis enable" "0: Hysteresis function disabled.,1: Hysteresis function enabled."
newline
rbitfld.long 0x0 4.--5. "SADST,SAD state" "0: SAD in LEARN state,1: SAD in MONITOR state,?,3: SAD in DETECT state"
bitfld.long 0x0 3. "DETCFG,Sound trigger event configuration" "0: sddet_evt generated when SAD enters the MONITOR..,1: sddet_evt generated when SAD enters or exits the.."
newline
bitfld.long 0x0 1.--2. "DATCAP,Data capture mode" "0: Samples from DFLT0 not transfered into the memory,1: Samples from DFLT0 transfered into the memory..,?,?"
bitfld.long 0x0 0. "SADEN,Sound activity detector enable" "0: SAD disabled and SAD state reset,1: SAD enabled"
line.long 0x4 "ADF_SADCFGR,ADF SAD configuration register"
hexmask.long.word 0x4 16.--28. 1. "ANMIN,Minimum noise level"
bitfld.long 0x4 12.--14. "HGOVR,Hangover time window" "0: SAD back to MONITOR state if sound is below..,1: SAD back to MONITOR state if sound is below..,2: SAD back to MONITOR state if sound is below..,3: SAD back to MONITOR state if sound is below..,4: SAD back to MONITOR state if sound is below..,5: SAD back to MONITOR state if sound is below..,6: SAD back to MONITOR state if sound is below..,7: SAD back to MONITOR state if sound is below.."
newline
bitfld.long 0x4 8.--10. "LFRNB,Number of learning frames" "0: 2 frames used to compute the initial noise level,1: 4 frames used to compute the initial noise level,2: 8 frames used to compute the initial noise level,3: 16 frames used to compute the initial noise level,?,?,?,?"
bitfld.long 0x4 4.--6. "ANSLP,Ambient noise slope control" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x4 0.--3. 1. "SNTHR,Signal to noise threshold"
rgroup.long 0xC0++0x7
line.long 0x0 "ADF_SADSDLVR,ADF SAD sound level register"
hexmask.long.word 0x0 0.--14. 1. "SDLVL,Short term sound level"
line.long 0x4 "ADF_SADANLVR,ADF SAD ambient noise level register"
hexmask.long.word 0x4 0.--14. 1. "ANLVL,Ambient noise level estimation"
rgroup.long 0xF0++0x3
line.long 0x0 "ADF_DFLT0DR,ADF digital filter data register 0"
hexmask.long.tbyte 0x0 8.--31. 1. "DR,Data processed by DFT0"
tree.end
tree.end
tree "AES (Advanced Encryption Standard Hardware Accelerator)"
base ad:0x0
tree "AES"
base ad:0x420C0000
group.long 0x0++0x3
line.long 0x0 "AES_CR,AES control register"
bitfld.long 0x0 31. "IPRST,AES peripheral software reset" "0,1"
bitfld.long 0x0 24.--25. "KMOD,Key mode selection" "0: Normal key mode.,?,2: Shared key mode.,?"
newline
hexmask.long.byte 0x0 20.--23. 1. "NPBLB,Number of padding bytes in last block"
bitfld.long 0x0 18. "KEYSIZE,Key size selection" "0: 128-bit,1: 256-bit"
newline
bitfld.long 0x0 16. "CHMOD_1,CHMOD[2]" "0,1"
bitfld.long 0x0 13.--14. "GCMPH,GCM or CCM phase selection" "0: Initialization phase,1: Header phase,2: Payload phase,3: Final phase"
newline
bitfld.long 0x0 12. "DMAOUTEN,DMA output enable" "0: Disable,1: Enable"
bitfld.long 0x0 11. "DMAINEN,DMA input enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 5.--6. "CHMOD,CHMOD[1:0]: Chaining mode" "0: Electronic codebook (ECB),1: Cipher-block chaining (CBC),2: Counter mode (CTR),3: Galois counter mode (GCM) and Galois message.."
bitfld.long 0x0 3.--4. "MODE,Operating mode" "0: Encryption,1: Key derivation (or key preparation) for ECB/CBC..,2: Decryption,?"
newline
bitfld.long 0x0 1.--2. "DATATYPE,Data type" "0: No swapping (32-bit data).,1: Half-word swapping (16-bit data),2: Byte swapping (8-bit data),3: Bit-level swapping"
bitfld.long 0x0 0. "EN,Enable" "0: Disable,1: Enable"
rgroup.long 0x4++0x3
line.long 0x0 "AES_SR,AES status register"
bitfld.long 0x0 7. "KEYVALID,Key valid flag" "0: Key not valid,1: Key valid"
bitfld.long 0x0 3. "BUSY,Busy" "0: Idle,1: Busy"
newline
bitfld.long 0x0 2. "WRERRF,Write error flag" "0: No error,1: Unexpected write to AES_DINR register occurred.."
bitfld.long 0x0 1. "RDERRF,Read error flag" "0: No error,1: Unexpected read to AES_DOUTR register occurred.."
wgroup.long 0x8++0x3
line.long 0x0 "AES_DINR,AES data input register"
hexmask.long 0x0 0.--31. 1. "DIN,Data input"
rgroup.long 0xC++0x3
line.long 0x0 "AES_DOUTR,AES data output register"
hexmask.long 0x0 0.--31. 1. "DOUT,Data output"
wgroup.long 0x10++0xF
line.long 0x0 "AES_KEYR0,AES key register 0"
hexmask.long 0x0 0.--31. 1. "KEY,Cryptographic key bits [31:0]"
line.long 0x4 "AES_KEYR1,AES key register 1"
hexmask.long 0x4 0.--31. 1. "KEY,Cryptographic key bits [63:32]"
line.long 0x8 "AES_KEYR2,AES key register 2"
hexmask.long 0x8 0.--31. 1. "KEY,Cryptographic key bits [95:64]"
line.long 0xC "AES_KEYR3,AES key register 3"
hexmask.long 0xC 0.--31. 1. "KEY,Cryptographic key bits [127:96]"
group.long 0x20++0xF
line.long 0x0 "AES_IVR0,AES initialization vector register 0"
hexmask.long 0x0 0.--31. 1. "IVI,Initialization vector input bits [31:0]"
line.long 0x4 "AES_IVR1,AES initialization vector register 1"
hexmask.long 0x4 0.--31. 1. "IVI,Initialization vector input bits [63:32]"
line.long 0x8 "AES_IVR2,AES initialization vector register 2"
hexmask.long 0x8 0.--31. 1. "IVI,Initialization vector input bits [95:64]"
line.long 0xC "AES_IVR3,AES initialization vector register 3"
hexmask.long 0xC 0.--31. 1. "IVI,Initialization vector input bits [127:96]"
wgroup.long 0x30++0xF
line.long 0x0 "AES_KEYR4,AES key register 4"
hexmask.long 0x0 0.--31. 1. "KEY,Cryptographic key bits [159:128]"
line.long 0x4 "AES_KEYR5,AES key register 5"
hexmask.long 0x4 0.--31. 1. "KEY,Cryptographic key bits [191:160]"
line.long 0x8 "AES_KEYR6,AES key register 6"
hexmask.long 0x8 0.--31. 1. "KEY,Cryptographic key bits [223:192]"
line.long 0xC "AES_KEYR7,AES key register 7"
hexmask.long 0xC 0.--31. 1. "KEY,Cryptographic key bits [255:224]"
group.long 0x40++0x1F
line.long 0x0 "AES_SUSPR0,AES suspend registers"
hexmask.long 0x0 0.--31. 1. "SUSP,Suspend data"
line.long 0x4 "AES_SUSPR1,AES suspend registers"
hexmask.long 0x4 0.--31. 1. "SUSP,Suspend data"
line.long 0x8 "AES_SUSPR2,AES suspend registers"
hexmask.long 0x8 0.--31. 1. "SUSP,Suspend data"
line.long 0xC "AES_SUSPR3,AES suspend registers"
hexmask.long 0xC 0.--31. 1. "SUSP,Suspend data"
line.long 0x10 "AES_SUSPR4,AES suspend registers"
hexmask.long 0x10 0.--31. 1. "SUSP,Suspend data"
line.long 0x14 "AES_SUSPR5,AES suspend registers"
hexmask.long 0x14 0.--31. 1. "SUSP,Suspend data"
line.long 0x18 "AES_SUSPR6,AES suspend registers"
hexmask.long 0x18 0.--31. 1. "SUSP,Suspend data"
line.long 0x1C "AES_SUSPR7,AES suspend registers"
hexmask.long 0x1C 0.--31. 1. "SUSP,Suspend data"
group.long 0x300++0x3
line.long 0x0 "AES_IER,AES interrupt enable register"
bitfld.long 0x0 2. "KEIE,Key error interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
bitfld.long 0x0 1. "RWEIE,Read or write error interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
newline
bitfld.long 0x0 0. "CCFIE,Computation complete flag interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
rgroup.long 0x304++0x3
line.long 0x0 "AES_ISR,AES interrupt status register"
bitfld.long 0x0 2. "KEIF,Key error interrupt flag" "0: No key error detected,1: Key information failed to load into key registers"
bitfld.long 0x0 1. "RWEIF,Read or write error interrupt flag" "0: No read or write error detected,1: Read or write error detected"
newline
bitfld.long 0x0 0. "CCF,Computation complete flag" "0: Not completed,1: Completed"
wgroup.long 0x308++0x3
line.long 0x0 "AES_ICR,AES interrupt clear register"
bitfld.long 0x0 2. "KEIF,Key error interrupt flag clear" "0,1"
bitfld.long 0x0 1. "RWEIF,Read or write error interrupt flag clear" "0,1"
newline
bitfld.long 0x0 0. "CCF,Computation complete flag clear" "0,1"
tree.end
tree "SEC_AES"
base ad:0x520C0000
group.long 0x0++0x3
line.long 0x0 "AES_CR,AES control register"
bitfld.long 0x0 31. "IPRST,AES peripheral software reset" "0,1"
bitfld.long 0x0 24.--25. "KMOD,Key mode selection" "0: Normal key mode.,?,2: Shared key mode.,?"
newline
hexmask.long.byte 0x0 20.--23. 1. "NPBLB,Number of padding bytes in last block"
bitfld.long 0x0 18. "KEYSIZE,Key size selection" "0: 128-bit,1: 256-bit"
newline
bitfld.long 0x0 16. "CHMOD_1,CHMOD[2]" "0,1"
bitfld.long 0x0 13.--14. "GCMPH,GCM or CCM phase selection" "0: Initialization phase,1: Header phase,2: Payload phase,3: Final phase"
newline
bitfld.long 0x0 12. "DMAOUTEN,DMA output enable" "0: Disable,1: Enable"
bitfld.long 0x0 11. "DMAINEN,DMA input enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 5.--6. "CHMOD,CHMOD[1:0]: Chaining mode" "0: Electronic codebook (ECB),1: Cipher-block chaining (CBC),2: Counter mode (CTR),3: Galois counter mode (GCM) and Galois message.."
bitfld.long 0x0 3.--4. "MODE,Operating mode" "0: Encryption,1: Key derivation (or key preparation) for ECB/CBC..,2: Decryption,?"
newline
bitfld.long 0x0 1.--2. "DATATYPE,Data type" "0: No swapping (32-bit data).,1: Half-word swapping (16-bit data),2: Byte swapping (8-bit data),3: Bit-level swapping"
bitfld.long 0x0 0. "EN,Enable" "0: Disable,1: Enable"
rgroup.long 0x4++0x3
line.long 0x0 "AES_SR,AES status register"
bitfld.long 0x0 7. "KEYVALID,Key valid flag" "0: Key not valid,1: Key valid"
bitfld.long 0x0 3. "BUSY,Busy" "0: Idle,1: Busy"
newline
bitfld.long 0x0 2. "WRERRF,Write error flag" "0: No error,1: Unexpected write to AES_DINR register occurred.."
bitfld.long 0x0 1. "RDERRF,Read error flag" "0: No error,1: Unexpected read to AES_DOUTR register occurred.."
wgroup.long 0x8++0x3
line.long 0x0 "AES_DINR,AES data input register"
hexmask.long 0x0 0.--31. 1. "DIN,Data input"
rgroup.long 0xC++0x3
line.long 0x0 "AES_DOUTR,AES data output register"
hexmask.long 0x0 0.--31. 1. "DOUT,Data output"
wgroup.long 0x10++0xF
line.long 0x0 "AES_KEYR0,AES key register 0"
hexmask.long 0x0 0.--31. 1. "KEY,Cryptographic key bits [31:0]"
line.long 0x4 "AES_KEYR1,AES key register 1"
hexmask.long 0x4 0.--31. 1. "KEY,Cryptographic key bits [63:32]"
line.long 0x8 "AES_KEYR2,AES key register 2"
hexmask.long 0x8 0.--31. 1. "KEY,Cryptographic key bits [95:64]"
line.long 0xC "AES_KEYR3,AES key register 3"
hexmask.long 0xC 0.--31. 1. "KEY,Cryptographic key bits [127:96]"
group.long 0x20++0xF
line.long 0x0 "AES_IVR0,AES initialization vector register 0"
hexmask.long 0x0 0.--31. 1. "IVI,Initialization vector input bits [31:0]"
line.long 0x4 "AES_IVR1,AES initialization vector register 1"
hexmask.long 0x4 0.--31. 1. "IVI,Initialization vector input bits [63:32]"
line.long 0x8 "AES_IVR2,AES initialization vector register 2"
hexmask.long 0x8 0.--31. 1. "IVI,Initialization vector input bits [95:64]"
line.long 0xC "AES_IVR3,AES initialization vector register 3"
hexmask.long 0xC 0.--31. 1. "IVI,Initialization vector input bits [127:96]"
wgroup.long 0x30++0xF
line.long 0x0 "AES_KEYR4,AES key register 4"
hexmask.long 0x0 0.--31. 1. "KEY,Cryptographic key bits [159:128]"
line.long 0x4 "AES_KEYR5,AES key register 5"
hexmask.long 0x4 0.--31. 1. "KEY,Cryptographic key bits [191:160]"
line.long 0x8 "AES_KEYR6,AES key register 6"
hexmask.long 0x8 0.--31. 1. "KEY,Cryptographic key bits [223:192]"
line.long 0xC "AES_KEYR7,AES key register 7"
hexmask.long 0xC 0.--31. 1. "KEY,Cryptographic key bits [255:224]"
group.long 0x40++0x1F
line.long 0x0 "AES_SUSPR0,AES suspend registers"
hexmask.long 0x0 0.--31. 1. "SUSP,Suspend data"
line.long 0x4 "AES_SUSPR1,AES suspend registers"
hexmask.long 0x4 0.--31. 1. "SUSP,Suspend data"
line.long 0x8 "AES_SUSPR2,AES suspend registers"
hexmask.long 0x8 0.--31. 1. "SUSP,Suspend data"
line.long 0xC "AES_SUSPR3,AES suspend registers"
hexmask.long 0xC 0.--31. 1. "SUSP,Suspend data"
line.long 0x10 "AES_SUSPR4,AES suspend registers"
hexmask.long 0x10 0.--31. 1. "SUSP,Suspend data"
line.long 0x14 "AES_SUSPR5,AES suspend registers"
hexmask.long 0x14 0.--31. 1. "SUSP,Suspend data"
line.long 0x18 "AES_SUSPR6,AES suspend registers"
hexmask.long 0x18 0.--31. 1. "SUSP,Suspend data"
line.long 0x1C "AES_SUSPR7,AES suspend registers"
hexmask.long 0x1C 0.--31. 1. "SUSP,Suspend data"
group.long 0x300++0x3
line.long 0x0 "AES_IER,AES interrupt enable register"
bitfld.long 0x0 2. "KEIE,Key error interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
bitfld.long 0x0 1. "RWEIE,Read or write error interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
newline
bitfld.long 0x0 0. "CCFIE,Computation complete flag interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
rgroup.long 0x304++0x3
line.long 0x0 "AES_ISR,AES interrupt status register"
bitfld.long 0x0 2. "KEIF,Key error interrupt flag" "0: No key error detected,1: Key information failed to load into key registers"
bitfld.long 0x0 1. "RWEIF,Read or write error interrupt flag" "0: No read or write error detected,1: Read or write error detected"
newline
bitfld.long 0x0 0. "CCF,Computation complete flag" "0: Not completed,1: Completed"
wgroup.long 0x308++0x3
line.long 0x0 "AES_ICR,AES interrupt clear register"
bitfld.long 0x0 2. "KEIF,Key error interrupt flag clear" "0,1"
bitfld.long 0x0 1. "RWEIF,Read or write error interrupt flag clear" "0,1"
newline
bitfld.long 0x0 0. "CCF,Computation complete flag clear" "0,1"
tree.end
tree.end
tree "CCB (Coupling and Chaining Bridge)"
base ad:0x0
tree "CCB"
base ad:0x420C7C00
group.long 0x0++0x3
line.long 0x0 "CCB_CR,CCB control register"
bitfld.long 0x0 31. "IPRST,CCB reset" "0,1"
hexmask.long.byte 0x0 0.--7. 1. "CCOP,Coupling and chaining operation"
rgroup.long 0x4++0x3
line.long 0x0 "CCB_SR,CCB status register"
bitfld.long 0x0 29. "TAMP_EVT5,Tamper i flag" "0: No event,1: Tamper event i has been raised."
bitfld.long 0x0 28. "TAMP_EVT4,Tamper i flag" "0: No event,1: Tamper event i has been raised."
newline
bitfld.long 0x0 27. "TAMP_EVT3,Tamper i flag" "0: No event,1: Tamper event i has been raised."
bitfld.long 0x0 26. "TAMP_EVT2,Tamper i flag" "0: No event,1: Tamper event i has been raised."
newline
bitfld.long 0x0 25. "TAMP_EVT1,Tamper i flag" "0: No event,1: Tamper event i has been raised."
bitfld.long 0x0 24. "TAMP_EVT0,Tamper i flag" "0: No event,1: Tamper event i has been raised."
newline
bitfld.long 0x0 16. "CCB_BUSY,CCB busy" "0: CCB idle,1: CCB busy or PKA RAM is being cleared following a.."
hexmask.long.byte 0x0 8.--13. 1. "OPERR,Operation error"
newline
hexmask.long.byte 0x0 0.--4. 1. "OPSTEP,Operation step"
group.long 0x10++0xF
line.long 0x0 "CCB_REFTAGR0,CCB reference tag register"
bitfld.long 0x0 31. "REFTAG31,Reference tag bits 31" "0,1"
bitfld.long 0x0 30. "REFTAG30,Reference tag bits 30" "0,1"
newline
bitfld.long 0x0 29. "REFTAG29,Reference tag bits 29" "0,1"
bitfld.long 0x0 28. "REFTAG28,Reference tag bits 28" "0,1"
newline
bitfld.long 0x0 27. "REFTAG27,Reference tag bits 27" "0,1"
bitfld.long 0x0 26. "REFTAG26,Reference tag bits 26" "0,1"
newline
bitfld.long 0x0 25. "REFTAG25,Reference tag bits 25" "0,1"
bitfld.long 0x0 24. "REFTAG24,Reference tag bits 24" "0,1"
newline
bitfld.long 0x0 23. "REFTAG23,Reference tag bits 23" "0,1"
bitfld.long 0x0 22. "REFTAG22,Reference tag bits 22" "0,1"
newline
bitfld.long 0x0 21. "REFTAG21,Reference tag bits 21" "0,1"
bitfld.long 0x0 20. "REFTAG20,Reference tag bits 20" "0,1"
newline
bitfld.long 0x0 19. "REFTAG19,Reference tag bits 19" "0,1"
bitfld.long 0x0 18. "REFTAG18,Reference tag bits 18" "0,1"
newline
bitfld.long 0x0 17. "REFTAG17,Reference tag bits 17" "0,1"
bitfld.long 0x0 16. "REFTAG16,Reference tag bits 16" "0,1"
newline
bitfld.long 0x0 15. "REFTAG15,Reference tag bits 15" "0,1"
bitfld.long 0x0 14. "REFTAG14,Reference tag bits 14" "0,1"
newline
bitfld.long 0x0 13. "REFTAG13,Reference tag bits 13" "0,1"
bitfld.long 0x0 12. "REFTAG12,Reference tag bits 12" "0,1"
newline
bitfld.long 0x0 11. "REFTAG11,Reference tag bits 11" "0,1"
bitfld.long 0x0 10. "REFTAG10,Reference tag bits 10" "0,1"
newline
bitfld.long 0x0 9. "REFTAG9,Reference tag bits 9" "0,1"
bitfld.long 0x0 8. "REFTAG8,Reference tag bits 8" "0,1"
newline
bitfld.long 0x0 7. "REFTAG7,Reference tag bits 7" "0,1"
bitfld.long 0x0 6. "REFTAG6,Reference tag bits 6" "0,1"
newline
bitfld.long 0x0 5. "REFTAG5,Reference tag bits 5" "0,1"
bitfld.long 0x0 4. "REFTAG4,Reference tag bits 4" "0,1"
newline
bitfld.long 0x0 3. "REFTAG3,Reference tag bits 3" "0,1"
bitfld.long 0x0 2. "REFTAG2,Reference tag bits 2" "0,1"
newline
bitfld.long 0x0 1. "REFTAG1,Reference tag bits 1" "0,1"
bitfld.long 0x0 0. "REFTAG0,Reference tag bits 0" "0,1"
line.long 0x4 "CCB_REFTAGR1,CCB reference tag register"
bitfld.long 0x4 31. "REFTAG63,Reference tag bits 63" "0,1"
bitfld.long 0x4 30. "REFTAG62,Reference tag bits 62" "0,1"
newline
bitfld.long 0x4 29. "REFTAG61,Reference tag bits 61" "0,1"
bitfld.long 0x4 28. "REFTAG60,Reference tag bits 60" "0,1"
newline
bitfld.long 0x4 27. "REFTAG59,Reference tag bits 59" "0,1"
bitfld.long 0x4 26. "REFTAG58,Reference tag bits 58" "0,1"
newline
bitfld.long 0x4 25. "REFTAG57,Reference tag bits 57" "0,1"
bitfld.long 0x4 24. "REFTAG56,Reference tag bits 56" "0,1"
newline
bitfld.long 0x4 23. "REFTAG55,Reference tag bits 55" "0,1"
bitfld.long 0x4 22. "REFTAG54,Reference tag bits 54" "0,1"
newline
bitfld.long 0x4 21. "REFTAG53,Reference tag bits 53" "0,1"
bitfld.long 0x4 20. "REFTAG52,Reference tag bits 52" "0,1"
newline
bitfld.long 0x4 19. "REFTAG51,Reference tag bits 51" "0,1"
bitfld.long 0x4 18. "REFTAG50,Reference tag bits 50" "0,1"
newline
bitfld.long 0x4 17. "REFTAG49,Reference tag bits 49" "0,1"
bitfld.long 0x4 16. "REFTAG48,Reference tag bits 48" "0,1"
newline
bitfld.long 0x4 15. "REFTAG47,Reference tag bits 47" "0,1"
bitfld.long 0x4 14. "REFTAG46,Reference tag bits 46" "0,1"
newline
bitfld.long 0x4 13. "REFTAG45,Reference tag bits 45" "0,1"
bitfld.long 0x4 12. "REFTAG44,Reference tag bits 44" "0,1"
newline
bitfld.long 0x4 11. "REFTAG43,Reference tag bits 43" "0,1"
bitfld.long 0x4 10. "REFTAG42,Reference tag bits 42" "0,1"
newline
bitfld.long 0x4 9. "REFTAG41,Reference tag bits 41" "0,1"
bitfld.long 0x4 8. "REFTAG40,Reference tag bits 40" "0,1"
newline
bitfld.long 0x4 7. "REFTAG39,Reference tag bits 39" "0,1"
bitfld.long 0x4 6. "REFTAG38,Reference tag bits 38" "0,1"
newline
bitfld.long 0x4 5. "REFTAG37,Reference tag bits 37" "0,1"
bitfld.long 0x4 4. "REFTAG36,Reference tag bits 36" "0,1"
newline
bitfld.long 0x4 3. "REFTAG35,Reference tag bits 35" "0,1"
bitfld.long 0x4 2. "REFTAG34,Reference tag bits 34" "0,1"
newline
bitfld.long 0x4 1. "REFTAG33,Reference tag bits 33" "0,1"
bitfld.long 0x4 0. "REFTAG32,Reference tag bits 32" "0,1"
line.long 0x8 "CCB_REFTAGR2,CCB reference tag register"
bitfld.long 0x8 31. "REFTAG95,Reference tag bits 95" "0,1"
bitfld.long 0x8 30. "REFTAG94,Reference tag bits 94" "0,1"
newline
bitfld.long 0x8 29. "REFTAG93,Reference tag bits 93" "0,1"
bitfld.long 0x8 28. "REFTAG92,Reference tag bits 92" "0,1"
newline
bitfld.long 0x8 27. "REFTAG91,Reference tag bits 91" "0,1"
bitfld.long 0x8 26. "REFTAG90,Reference tag bits 90" "0,1"
newline
bitfld.long 0x8 25. "REFTAG89,Reference tag bits 89" "0,1"
bitfld.long 0x8 24. "REFTAG88,Reference tag bits 88" "0,1"
newline
bitfld.long 0x8 23. "REFTAG87,Reference tag bits 87" "0,1"
bitfld.long 0x8 22. "REFTAG86,Reference tag bits 86" "0,1"
newline
bitfld.long 0x8 21. "REFTAG85,Reference tag bits 85" "0,1"
bitfld.long 0x8 20. "REFTAG84,Reference tag bits 84" "0,1"
newline
bitfld.long 0x8 19. "REFTAG83,Reference tag bits 83" "0,1"
bitfld.long 0x8 18. "REFTAG82,Reference tag bits 82" "0,1"
newline
bitfld.long 0x8 17. "REFTAG81,Reference tag bits 81" "0,1"
bitfld.long 0x8 16. "REFTAG80,Reference tag bits 80" "0,1"
newline
bitfld.long 0x8 15. "REFTAG79,Reference tag bits 79" "0,1"
bitfld.long 0x8 14. "REFTAG78,Reference tag bits 78" "0,1"
newline
bitfld.long 0x8 13. "REFTAG77,Reference tag bits 77" "0,1"
bitfld.long 0x8 12. "REFTAG76,Reference tag bits 76" "0,1"
newline
bitfld.long 0x8 11. "REFTAG75,Reference tag bits 75" "0,1"
bitfld.long 0x8 10. "REFTAG74,Reference tag bits 74" "0,1"
newline
bitfld.long 0x8 9. "REFTAG73,Reference tag bits 73" "0,1"
bitfld.long 0x8 8. "REFTAG72,Reference tag bits 72" "0,1"
newline
bitfld.long 0x8 7. "REFTAG71,Reference tag bits 71" "0,1"
bitfld.long 0x8 6. "REFTAG70,Reference tag bits 70" "0,1"
newline
bitfld.long 0x8 5. "REFTAG69,Reference tag bits 69" "0,1"
bitfld.long 0x8 4. "REFTAG68,Reference tag bits 68" "0,1"
newline
bitfld.long 0x8 3. "REFTAG67,Reference tag bits 67" "0,1"
bitfld.long 0x8 2. "REFTAG66,Reference tag bits 66" "0,1"
newline
bitfld.long 0x8 1. "REFTAG65,Reference tag bits 65" "0,1"
bitfld.long 0x8 0. "REFTAG64,Reference tag bits 64" "0,1"
line.long 0xC "CCB_REFTAGR3,CCB reference tag register"
bitfld.long 0xC 31. "REFTAG127,Reference tag bits 127" "0,1"
bitfld.long 0xC 30. "REFTAG126,Reference tag bits 126" "0,1"
newline
bitfld.long 0xC 29. "REFTAG125,Reference tag bits 125" "0,1"
bitfld.long 0xC 28. "REFTAG124,Reference tag bits 124" "0,1"
newline
bitfld.long 0xC 27. "REFTAG123,Reference tag bits 123" "0,1"
bitfld.long 0xC 26. "REFTAG122,Reference tag bits 122" "0,1"
newline
bitfld.long 0xC 25. "REFTAG121,Reference tag bits 121" "0,1"
bitfld.long 0xC 24. "REFTAG120,Reference tag bits 120" "0,1"
newline
bitfld.long 0xC 23. "REFTAG119,Reference tag bits 119" "0,1"
bitfld.long 0xC 22. "REFTAG118,Reference tag bits 118" "0,1"
newline
bitfld.long 0xC 21. "REFTAG117,Reference tag bits 117" "0,1"
bitfld.long 0xC 20. "REFTAG116,Reference tag bits 116" "0,1"
newline
bitfld.long 0xC 19. "REFTAG115,Reference tag bits 115" "0,1"
bitfld.long 0xC 18. "REFTAG114,Reference tag bits 114" "0,1"
newline
bitfld.long 0xC 17. "REFTAG113,Reference tag bits 113" "0,1"
bitfld.long 0xC 16. "REFTAG112,Reference tag bits 112" "0,1"
newline
bitfld.long 0xC 15. "REFTAG111,Reference tag bits 111" "0,1"
bitfld.long 0xC 14. "REFTAG110,Reference tag bits 110" "0,1"
newline
bitfld.long 0xC 13. "REFTAG109,Reference tag bits 109" "0,1"
bitfld.long 0xC 12. "REFTAG108,Reference tag bits 108" "0,1"
newline
bitfld.long 0xC 11. "REFTAG107,Reference tag bits 107" "0,1"
bitfld.long 0xC 10. "REFTAG106,Reference tag bits 106" "0,1"
newline
bitfld.long 0xC 9. "REFTAG105,Reference tag bits 105" "0,1"
bitfld.long 0xC 8. "REFTAG104,Reference tag bits 104" "0,1"
newline
bitfld.long 0xC 7. "REFTAG103,Reference tag bits 103" "0,1"
bitfld.long 0xC 6. "REFTAG102,Reference tag bits 102" "0,1"
newline
bitfld.long 0xC 5. "REFTAG101,Reference tag bits 101" "0,1"
bitfld.long 0xC 4. "REFTAG100,Reference tag bits 100" "0,1"
newline
bitfld.long 0xC 3. "REFTAG99,Reference tag bits 99" "0,1"
bitfld.long 0xC 2. "REFTAG98,Reference tag bits 98" "0,1"
newline
bitfld.long 0xC 1. "REFTAG97,Reference tag bits 97" "0,1"
bitfld.long 0xC 0. "REFTAG96,Reference tag bits 96" "0,1"
tree.end
tree "SEC_CCB"
base ad:0x520C7C00
group.long 0x0++0x3
line.long 0x0 "CCB_CR,CCB control register"
bitfld.long 0x0 31. "IPRST,CCB reset" "0,1"
hexmask.long.byte 0x0 0.--7. 1. "CCOP,Coupling and chaining operation"
rgroup.long 0x4++0x3
line.long 0x0 "CCB_SR,CCB status register"
bitfld.long 0x0 29. "TAMP_EVT5,Tamper i flag" "0: No event,1: Tamper event i has been raised."
bitfld.long 0x0 28. "TAMP_EVT4,Tamper i flag" "0: No event,1: Tamper event i has been raised."
newline
bitfld.long 0x0 27. "TAMP_EVT3,Tamper i flag" "0: No event,1: Tamper event i has been raised."
bitfld.long 0x0 26. "TAMP_EVT2,Tamper i flag" "0: No event,1: Tamper event i has been raised."
newline
bitfld.long 0x0 25. "TAMP_EVT1,Tamper i flag" "0: No event,1: Tamper event i has been raised."
bitfld.long 0x0 24. "TAMP_EVT0,Tamper i flag" "0: No event,1: Tamper event i has been raised."
newline
bitfld.long 0x0 16. "CCB_BUSY,CCB busy" "0: CCB idle,1: CCB busy or PKA RAM is being cleared following a.."
hexmask.long.byte 0x0 8.--13. 1. "OPERR,Operation error"
newline
hexmask.long.byte 0x0 0.--4. 1. "OPSTEP,Operation step"
group.long 0x10++0xF
line.long 0x0 "CCB_REFTAGR0,CCB reference tag register"
bitfld.long 0x0 31. "REFTAG31,Reference tag bits 31" "0,1"
bitfld.long 0x0 30. "REFTAG30,Reference tag bits 30" "0,1"
newline
bitfld.long 0x0 29. "REFTAG29,Reference tag bits 29" "0,1"
bitfld.long 0x0 28. "REFTAG28,Reference tag bits 28" "0,1"
newline
bitfld.long 0x0 27. "REFTAG27,Reference tag bits 27" "0,1"
bitfld.long 0x0 26. "REFTAG26,Reference tag bits 26" "0,1"
newline
bitfld.long 0x0 25. "REFTAG25,Reference tag bits 25" "0,1"
bitfld.long 0x0 24. "REFTAG24,Reference tag bits 24" "0,1"
newline
bitfld.long 0x0 23. "REFTAG23,Reference tag bits 23" "0,1"
bitfld.long 0x0 22. "REFTAG22,Reference tag bits 22" "0,1"
newline
bitfld.long 0x0 21. "REFTAG21,Reference tag bits 21" "0,1"
bitfld.long 0x0 20. "REFTAG20,Reference tag bits 20" "0,1"
newline
bitfld.long 0x0 19. "REFTAG19,Reference tag bits 19" "0,1"
bitfld.long 0x0 18. "REFTAG18,Reference tag bits 18" "0,1"
newline
bitfld.long 0x0 17. "REFTAG17,Reference tag bits 17" "0,1"
bitfld.long 0x0 16. "REFTAG16,Reference tag bits 16" "0,1"
newline
bitfld.long 0x0 15. "REFTAG15,Reference tag bits 15" "0,1"
bitfld.long 0x0 14. "REFTAG14,Reference tag bits 14" "0,1"
newline
bitfld.long 0x0 13. "REFTAG13,Reference tag bits 13" "0,1"
bitfld.long 0x0 12. "REFTAG12,Reference tag bits 12" "0,1"
newline
bitfld.long 0x0 11. "REFTAG11,Reference tag bits 11" "0,1"
bitfld.long 0x0 10. "REFTAG10,Reference tag bits 10" "0,1"
newline
bitfld.long 0x0 9. "REFTAG9,Reference tag bits 9" "0,1"
bitfld.long 0x0 8. "REFTAG8,Reference tag bits 8" "0,1"
newline
bitfld.long 0x0 7. "REFTAG7,Reference tag bits 7" "0,1"
bitfld.long 0x0 6. "REFTAG6,Reference tag bits 6" "0,1"
newline
bitfld.long 0x0 5. "REFTAG5,Reference tag bits 5" "0,1"
bitfld.long 0x0 4. "REFTAG4,Reference tag bits 4" "0,1"
newline
bitfld.long 0x0 3. "REFTAG3,Reference tag bits 3" "0,1"
bitfld.long 0x0 2. "REFTAG2,Reference tag bits 2" "0,1"
newline
bitfld.long 0x0 1. "REFTAG1,Reference tag bits 1" "0,1"
bitfld.long 0x0 0. "REFTAG0,Reference tag bits 0" "0,1"
line.long 0x4 "CCB_REFTAGR1,CCB reference tag register"
bitfld.long 0x4 31. "REFTAG63,Reference tag bits 63" "0,1"
bitfld.long 0x4 30. "REFTAG62,Reference tag bits 62" "0,1"
newline
bitfld.long 0x4 29. "REFTAG61,Reference tag bits 61" "0,1"
bitfld.long 0x4 28. "REFTAG60,Reference tag bits 60" "0,1"
newline
bitfld.long 0x4 27. "REFTAG59,Reference tag bits 59" "0,1"
bitfld.long 0x4 26. "REFTAG58,Reference tag bits 58" "0,1"
newline
bitfld.long 0x4 25. "REFTAG57,Reference tag bits 57" "0,1"
bitfld.long 0x4 24. "REFTAG56,Reference tag bits 56" "0,1"
newline
bitfld.long 0x4 23. "REFTAG55,Reference tag bits 55" "0,1"
bitfld.long 0x4 22. "REFTAG54,Reference tag bits 54" "0,1"
newline
bitfld.long 0x4 21. "REFTAG53,Reference tag bits 53" "0,1"
bitfld.long 0x4 20. "REFTAG52,Reference tag bits 52" "0,1"
newline
bitfld.long 0x4 19. "REFTAG51,Reference tag bits 51" "0,1"
bitfld.long 0x4 18. "REFTAG50,Reference tag bits 50" "0,1"
newline
bitfld.long 0x4 17. "REFTAG49,Reference tag bits 49" "0,1"
bitfld.long 0x4 16. "REFTAG48,Reference tag bits 48" "0,1"
newline
bitfld.long 0x4 15. "REFTAG47,Reference tag bits 47" "0,1"
bitfld.long 0x4 14. "REFTAG46,Reference tag bits 46" "0,1"
newline
bitfld.long 0x4 13. "REFTAG45,Reference tag bits 45" "0,1"
bitfld.long 0x4 12. "REFTAG44,Reference tag bits 44" "0,1"
newline
bitfld.long 0x4 11. "REFTAG43,Reference tag bits 43" "0,1"
bitfld.long 0x4 10. "REFTAG42,Reference tag bits 42" "0,1"
newline
bitfld.long 0x4 9. "REFTAG41,Reference tag bits 41" "0,1"
bitfld.long 0x4 8. "REFTAG40,Reference tag bits 40" "0,1"
newline
bitfld.long 0x4 7. "REFTAG39,Reference tag bits 39" "0,1"
bitfld.long 0x4 6. "REFTAG38,Reference tag bits 38" "0,1"
newline
bitfld.long 0x4 5. "REFTAG37,Reference tag bits 37" "0,1"
bitfld.long 0x4 4. "REFTAG36,Reference tag bits 36" "0,1"
newline
bitfld.long 0x4 3. "REFTAG35,Reference tag bits 35" "0,1"
bitfld.long 0x4 2. "REFTAG34,Reference tag bits 34" "0,1"
newline
bitfld.long 0x4 1. "REFTAG33,Reference tag bits 33" "0,1"
bitfld.long 0x4 0. "REFTAG32,Reference tag bits 32" "0,1"
line.long 0x8 "CCB_REFTAGR2,CCB reference tag register"
bitfld.long 0x8 31. "REFTAG95,Reference tag bits 95" "0,1"
bitfld.long 0x8 30. "REFTAG94,Reference tag bits 94" "0,1"
newline
bitfld.long 0x8 29. "REFTAG93,Reference tag bits 93" "0,1"
bitfld.long 0x8 28. "REFTAG92,Reference tag bits 92" "0,1"
newline
bitfld.long 0x8 27. "REFTAG91,Reference tag bits 91" "0,1"
bitfld.long 0x8 26. "REFTAG90,Reference tag bits 90" "0,1"
newline
bitfld.long 0x8 25. "REFTAG89,Reference tag bits 89" "0,1"
bitfld.long 0x8 24. "REFTAG88,Reference tag bits 88" "0,1"
newline
bitfld.long 0x8 23. "REFTAG87,Reference tag bits 87" "0,1"
bitfld.long 0x8 22. "REFTAG86,Reference tag bits 86" "0,1"
newline
bitfld.long 0x8 21. "REFTAG85,Reference tag bits 85" "0,1"
bitfld.long 0x8 20. "REFTAG84,Reference tag bits 84" "0,1"
newline
bitfld.long 0x8 19. "REFTAG83,Reference tag bits 83" "0,1"
bitfld.long 0x8 18. "REFTAG82,Reference tag bits 82" "0,1"
newline
bitfld.long 0x8 17. "REFTAG81,Reference tag bits 81" "0,1"
bitfld.long 0x8 16. "REFTAG80,Reference tag bits 80" "0,1"
newline
bitfld.long 0x8 15. "REFTAG79,Reference tag bits 79" "0,1"
bitfld.long 0x8 14. "REFTAG78,Reference tag bits 78" "0,1"
newline
bitfld.long 0x8 13. "REFTAG77,Reference tag bits 77" "0,1"
bitfld.long 0x8 12. "REFTAG76,Reference tag bits 76" "0,1"
newline
bitfld.long 0x8 11. "REFTAG75,Reference tag bits 75" "0,1"
bitfld.long 0x8 10. "REFTAG74,Reference tag bits 74" "0,1"
newline
bitfld.long 0x8 9. "REFTAG73,Reference tag bits 73" "0,1"
bitfld.long 0x8 8. "REFTAG72,Reference tag bits 72" "0,1"
newline
bitfld.long 0x8 7. "REFTAG71,Reference tag bits 71" "0,1"
bitfld.long 0x8 6. "REFTAG70,Reference tag bits 70" "0,1"
newline
bitfld.long 0x8 5. "REFTAG69,Reference tag bits 69" "0,1"
bitfld.long 0x8 4. "REFTAG68,Reference tag bits 68" "0,1"
newline
bitfld.long 0x8 3. "REFTAG67,Reference tag bits 67" "0,1"
bitfld.long 0x8 2. "REFTAG66,Reference tag bits 66" "0,1"
newline
bitfld.long 0x8 1. "REFTAG65,Reference tag bits 65" "0,1"
bitfld.long 0x8 0. "REFTAG64,Reference tag bits 64" "0,1"
line.long 0xC "CCB_REFTAGR3,CCB reference tag register"
bitfld.long 0xC 31. "REFTAG127,Reference tag bits 127" "0,1"
bitfld.long 0xC 30. "REFTAG126,Reference tag bits 126" "0,1"
newline
bitfld.long 0xC 29. "REFTAG125,Reference tag bits 125" "0,1"
bitfld.long 0xC 28. "REFTAG124,Reference tag bits 124" "0,1"
newline
bitfld.long 0xC 27. "REFTAG123,Reference tag bits 123" "0,1"
bitfld.long 0xC 26. "REFTAG122,Reference tag bits 122" "0,1"
newline
bitfld.long 0xC 25. "REFTAG121,Reference tag bits 121" "0,1"
bitfld.long 0xC 24. "REFTAG120,Reference tag bits 120" "0,1"
newline
bitfld.long 0xC 23. "REFTAG119,Reference tag bits 119" "0,1"
bitfld.long 0xC 22. "REFTAG118,Reference tag bits 118" "0,1"
newline
bitfld.long 0xC 21. "REFTAG117,Reference tag bits 117" "0,1"
bitfld.long 0xC 20. "REFTAG116,Reference tag bits 116" "0,1"
newline
bitfld.long 0xC 19. "REFTAG115,Reference tag bits 115" "0,1"
bitfld.long 0xC 18. "REFTAG114,Reference tag bits 114" "0,1"
newline
bitfld.long 0xC 17. "REFTAG113,Reference tag bits 113" "0,1"
bitfld.long 0xC 16. "REFTAG112,Reference tag bits 112" "0,1"
newline
bitfld.long 0xC 15. "REFTAG111,Reference tag bits 111" "0,1"
bitfld.long 0xC 14. "REFTAG110,Reference tag bits 110" "0,1"
newline
bitfld.long 0xC 13. "REFTAG109,Reference tag bits 109" "0,1"
bitfld.long 0xC 12. "REFTAG108,Reference tag bits 108" "0,1"
newline
bitfld.long 0xC 11. "REFTAG107,Reference tag bits 107" "0,1"
bitfld.long 0xC 10. "REFTAG106,Reference tag bits 106" "0,1"
newline
bitfld.long 0xC 9. "REFTAG105,Reference tag bits 105" "0,1"
bitfld.long 0xC 8. "REFTAG104,Reference tag bits 104" "0,1"
newline
bitfld.long 0xC 7. "REFTAG103,Reference tag bits 103" "0,1"
bitfld.long 0xC 6. "REFTAG102,Reference tag bits 102" "0,1"
newline
bitfld.long 0xC 5. "REFTAG101,Reference tag bits 101" "0,1"
bitfld.long 0xC 4. "REFTAG100,Reference tag bits 100" "0,1"
newline
bitfld.long 0xC 3. "REFTAG99,Reference tag bits 99" "0,1"
bitfld.long 0xC 2. "REFTAG98,Reference tag bits 98" "0,1"
newline
bitfld.long 0xC 1. "REFTAG97,Reference tag bits 97" "0,1"
bitfld.long 0xC 0. "REFTAG96,Reference tag bits 96" "0,1"
tree.end
tree.end
tree "COMP (Comparator)"
base ad:0x0
tree "COMP"
base ad:0x40045400
group.long 0x0++0x7
line.long 0x0 "COMP1_CSR,COMP1 control and status register"
bitfld.long 0x0 31. "LOCK,This bit is set by software and cleared by reset. It locks the whole content of COMP1_CSR." "0: COMP1_CSR read/write bits can be written by..,1: COMP1_CSR bits can be read but not written by.."
rbitfld.long 0x0 30. "VALUE,This bit is read-only. It reflects the level of the COMP1 output after the polarity selector and blanking (see less than xe2 [Comparator_output_blanking_function/ID00-187] [number]/>)." "0,1"
hexmask.long.byte 0x0 20.--24. 1. "BLANKSEL,This field is controlled by software (if not locked) and selects the blanking source:"
newline
bitfld.long 0x0 18.--19. "PWRMODE,Controlled by software (if not locked) selects the power consumption and as a consequence the speed of the COMP1." "0: High speed,1: Intermediate speed and power,2: Medium speed and power,3: Ultra-low-power"
bitfld.long 0x0 16.--17. "HYST,Controlled by software (if not locked) selects the COMP1 hysteresis." "0: None,1: Low hysteresis,2: Medium hysteresis,3: High hysteresis"
bitfld.long 0x0 15. "POLARITY,Controlled by software (if not locked) selects the COMP1 output polarity." "0: Noninverted,1: Inverted"
newline
bitfld.long 0x0 14. "WINOUT,Controlled by software (if not locked) selects the COMP1 output." "0: COMP1_VALUE,1: COMP1_VALUE xOR COMP2_VALUE"
bitfld.long 0x0 11. "WINMODE,Controlled by software (if not locked) selects the signal for the COMP1_INP input of the COMP1." "0: Signal selected with INPSEL[1:0],1: COMP2_INP signal of COMP2"
bitfld.long 0x0 8.--9. "INPSEL,Controlled by software (if not locked) selects the signal for the noninverting input COMP1_INP (see less than xe6 [COMP_pins_and_internal_signals/IDTBL00-3] [number]/> for the assignment)." "0,1,2,3"
newline
hexmask.long.byte 0x0 4.--7. 1. "INMSEL,Controlled by software (if not locked) selects the signal for the inverting input COMP1_INM (see less than xe3 [COMP_pins_and_internal_signals/IDTBL00-15] [number]/> for the assignment)."
bitfld.long 0x0 0. "EN,Controlled by software (if not locked) enables COMP1." "0: COMP1 disabled,1: COMP1 enabled"
line.long 0x4 "COMP2_CSR,COMP2 control and status register"
bitfld.long 0x4 31. "LOCK,This bit is set by software and cleared by reset. It locks the whole content of COMP2_CSR." "0: COMP2_CSR read/write bits can be written by..,1: COMP2_CSR bits can be read but not written by.."
rbitfld.long 0x4 30. "VALUE,This bit is read-only. It reflects the level of the COMP2 output after the polarity selector and blanking (see less than xe2 [Comparator_output_blanking_function/ID00-187] [number]/>)." "0,1"
hexmask.long.byte 0x4 20.--24. 1. "BLANKSEL,Controlled by software (if not locked) and selects the blanking source:"
newline
bitfld.long 0x4 18.--19. "PWRMODE,Controlled by software (if not locked) selects the power consumption and as a consequence the speed of the COMP2." "0: High speed,1: Intermediate speed and power,2: Medium speed and power,3: Ultra-low-power"
bitfld.long 0x4 16.--17. "HYST,Controlled by software (if not locked) selects the COMP2 hysteresis." "0: None,1: Low hysteresis,2: Medium hysteresis,3: High hysteresis"
bitfld.long 0x4 15. "POLARITY,Controlled by software (if not locked) selects the COMP2 output polarity." "0: Noninverted,1: Inverted"
newline
bitfld.long 0x4 14. "WINOUT,Controlled by software (if not locked) selects the COMP2 output." "0: COMP2_VALUE,1: COMP1_VALUE xOR COMP2_VALUE"
bitfld.long 0x4 11. "WINMODE,Controlled by software (if not locked) selects the signal for the COMP2_INP input of the COMP2." "0: Signal selected with INPSEL[1:0],1: COMP1_INP signal of COMP1"
bitfld.long 0x4 8.--9. "INPSEL,Controlled by software (if not locked) selects the signal for the noninverting input COMP2_INP (see less than xe4 [COMP_pins_and_internal_signals/IDTBL00-43] [number]/> for the assignment)." "0,1,2,3"
newline
hexmask.long.byte 0x4 4.--7. 1. "INMSEL,Controlled by software (if not locked) selects the signal for the inverting input COMP2_INM (see less than xe1 [COMP_pins_and_internal_signals/IDTBL00-55] [number]/> for the assignment)."
bitfld.long 0x4 0. "EN,Controlled by software (if not locked) enables COMP2." "0: COMP2 disabled,1: COMP2 enabled"
tree.end
tree "SEC_COMP"
base ad:0x50045400
group.long 0x0++0x7
line.long 0x0 "COMP1_CSR,COMP1 control and status register"
bitfld.long 0x0 31. "LOCK,This bit is set by software and cleared by reset. It locks the whole content of COMP1_CSR." "0: COMP1_CSR read/write bits can be written by..,1: COMP1_CSR bits can be read but not written by.."
rbitfld.long 0x0 30. "VALUE,This bit is read-only. It reflects the level of the COMP1 output after the polarity selector and blanking (see less than xe2 [Comparator_output_blanking_function/ID00-187] [number]/>)." "0,1"
hexmask.long.byte 0x0 20.--24. 1. "BLANKSEL,This field is controlled by software (if not locked) and selects the blanking source:"
newline
bitfld.long 0x0 18.--19. "PWRMODE,Controlled by software (if not locked) selects the power consumption and as a consequence the speed of the COMP1." "0: High speed,1: Intermediate speed and power,2: Medium speed and power,3: Ultra-low-power"
bitfld.long 0x0 16.--17. "HYST,Controlled by software (if not locked) selects the COMP1 hysteresis." "0: None,1: Low hysteresis,2: Medium hysteresis,3: High hysteresis"
bitfld.long 0x0 15. "POLARITY,Controlled by software (if not locked) selects the COMP1 output polarity." "0: Noninverted,1: Inverted"
newline
bitfld.long 0x0 14. "WINOUT,Controlled by software (if not locked) selects the COMP1 output." "0: COMP1_VALUE,1: COMP1_VALUE xOR COMP2_VALUE"
bitfld.long 0x0 11. "WINMODE,Controlled by software (if not locked) selects the signal for the COMP1_INP input of the COMP1." "0: Signal selected with INPSEL[1:0],1: COMP2_INP signal of COMP2"
bitfld.long 0x0 8.--9. "INPSEL,Controlled by software (if not locked) selects the signal for the noninverting input COMP1_INP (see less than xe6 [COMP_pins_and_internal_signals/IDTBL00-3] [number]/> for the assignment)." "0,1,2,3"
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hexmask.long.byte 0x0 4.--7. 1. "INMSEL,Controlled by software (if not locked) selects the signal for the inverting input COMP1_INM (see less than xe3 [COMP_pins_and_internal_signals/IDTBL00-15] [number]/> for the assignment)."
bitfld.long 0x0 0. "EN,Controlled by software (if not locked) enables COMP1." "0: COMP1 disabled,1: COMP1 enabled"
line.long 0x4 "COMP2_CSR,COMP2 control and status register"
bitfld.long 0x4 31. "LOCK,This bit is set by software and cleared by reset. It locks the whole content of COMP2_CSR." "0: COMP2_CSR read/write bits can be written by..,1: COMP2_CSR bits can be read but not written by.."
rbitfld.long 0x4 30. "VALUE,This bit is read-only. It reflects the level of the COMP2 output after the polarity selector and blanking (see less than xe2 [Comparator_output_blanking_function/ID00-187] [number]/>)." "0,1"
hexmask.long.byte 0x4 20.--24. 1. "BLANKSEL,Controlled by software (if not locked) and selects the blanking source:"
newline
bitfld.long 0x4 18.--19. "PWRMODE,Controlled by software (if not locked) selects the power consumption and as a consequence the speed of the COMP2." "0: High speed,1: Intermediate speed and power,2: Medium speed and power,3: Ultra-low-power"
bitfld.long 0x4 16.--17. "HYST,Controlled by software (if not locked) selects the COMP2 hysteresis." "0: None,1: Low hysteresis,2: Medium hysteresis,3: High hysteresis"
bitfld.long 0x4 15. "POLARITY,Controlled by software (if not locked) selects the COMP2 output polarity." "0: Noninverted,1: Inverted"
newline
bitfld.long 0x4 14. "WINOUT,Controlled by software (if not locked) selects the COMP2 output." "0: COMP2_VALUE,1: COMP1_VALUE xOR COMP2_VALUE"
bitfld.long 0x4 11. "WINMODE,Controlled by software (if not locked) selects the signal for the COMP2_INP input of the COMP2." "0: Signal selected with INPSEL[1:0],1: COMP1_INP signal of COMP1"
bitfld.long 0x4 8.--9. "INPSEL,Controlled by software (if not locked) selects the signal for the noninverting input COMP2_INP (see less than xe4 [COMP_pins_and_internal_signals/IDTBL00-43] [number]/> for the assignment)." "0,1,2,3"
newline
hexmask.long.byte 0x4 4.--7. 1. "INMSEL,Controlled by software (if not locked) selects the signal for the inverting input COMP2_INM (see less than xe1 [COMP_pins_and_internal_signals/IDTBL00-55] [number]/> for the assignment)."
bitfld.long 0x4 0. "EN,Controlled by software (if not locked) enables COMP2." "0: COMP2 disabled,1: COMP2 enabled"
tree.end
tree.end
tree "CRC (Cyclic Redundancy Check Calculation Unit)"
base ad:0x0
tree "CRC"
base ad:0x40023000
group.long 0x0++0xB
line.long 0x0 "CRC_DR,CRC data register"
hexmask.long 0x0 0.--31. 1. "DR,Data register bits"
line.long 0x4 "CRC_IDR,CRC independent data register"
hexmask.long 0x4 0.--31. 1. "IDR,General-purpose 32-bit data register bits"
line.long 0x8 "CRC_CR,CRC control register"
bitfld.long 0x8 10. "RTYPE_OUT,Reverse type output" "0: Bit level output,1: Byte or half-word level output"
bitfld.long 0x8 9. "RTYPE_IN,Reverse type input" "0: Bit level input,1: Byte or half-word level input"
newline
bitfld.long 0x8 7.--8. "REV_OUT,Reverse output data" "0: Bit order not affected (RTYPE_OUT=0 or 1),1: Bit-reversed output format (RTYPE_OUT=0) or..,2: Bit order not affected (RTYPE_OUT=0) or byte..,3: Bit order not affected (RTYPE_OUT=0 or 1)"
bitfld.long 0x8 5.--6. "REV_IN,Reverse input data" "0: Bit order not affected (RTYPE_IN=0 or 1),1: Bit reversal done by byte (RTYPE_IN=0) or..,2: Bit reversal done by half-word (RTYPE_IN=0) or..,3: Bit reversal done by word (RTYPE_IN=0) or bit.."
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bitfld.long 0x8 3.--4. "POLYSIZE,Polynomial size" "0: 32 bit polynomial,1: 16 bit polynomial,2: 8 bit polynomial,3: 7 bit polynomial"
bitfld.long 0x8 0. "RESET,RESET bit" "0,1"
group.long 0x10++0x7
line.long 0x0 "CRC_INIT,CRC initial value"
hexmask.long 0x0 0.--31. 1. "CRC_INIT,Programmable initial CRC value"
line.long 0x4 "CRC_POL,CRC polynomial"
hexmask.long 0x4 0.--31. 1. "POL,Programmable polynomial"
tree.end
tree "SEC_CRC"
base ad:0x50023000
group.long 0x0++0xB
line.long 0x0 "CRC_DR,CRC data register"
hexmask.long 0x0 0.--31. 1. "DR,Data register bits"
line.long 0x4 "CRC_IDR,CRC independent data register"
hexmask.long 0x4 0.--31. 1. "IDR,General-purpose 32-bit data register bits"
line.long 0x8 "CRC_CR,CRC control register"
bitfld.long 0x8 10. "RTYPE_OUT,Reverse type output" "0: Bit level output,1: Byte or half-word level output"
bitfld.long 0x8 9. "RTYPE_IN,Reverse type input" "0: Bit level input,1: Byte or half-word level input"
newline
bitfld.long 0x8 7.--8. "REV_OUT,Reverse output data" "0: Bit order not affected (RTYPE_OUT=0 or 1),1: Bit-reversed output format (RTYPE_OUT=0) or..,2: Bit order not affected (RTYPE_OUT=0) or byte..,3: Bit order not affected (RTYPE_OUT=0 or 1)"
bitfld.long 0x8 5.--6. "REV_IN,Reverse input data" "0: Bit order not affected (RTYPE_IN=0 or 1),1: Bit reversal done by byte (RTYPE_IN=0) or..,2: Bit reversal done by half-word (RTYPE_IN=0) or..,3: Bit reversal done by word (RTYPE_IN=0) or bit.."
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bitfld.long 0x8 3.--4. "POLYSIZE,Polynomial size" "0: 32 bit polynomial,1: 16 bit polynomial,2: 8 bit polynomial,3: 7 bit polynomial"
bitfld.long 0x8 0. "RESET,RESET bit" "0,1"
group.long 0x10++0x7
line.long 0x0 "CRC_INIT,CRC initial value"
hexmask.long 0x0 0.--31. 1. "CRC_INIT,Programmable initial CRC value"
line.long 0x4 "CRC_POL,CRC polynomial"
hexmask.long 0x4 0.--31. 1. "POL,Programmable polynomial"
tree.end
tree.end
tree "CRS (Clock Recovery System)"
base ad:0x0
tree "CRS"
base ad:0x40006000
group.long 0x0++0x7
line.long 0x0 "CRS_CR,CRS control register"
hexmask.long.byte 0x0 8.--14. 1. "TRIM,HSI48 oscillator smooth trimming"
bitfld.long 0x0 7. "SWSYNC,Generate software SYNC event" "0: No action,1: A software SYNC event is generated."
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bitfld.long 0x0 6. "AUTOTRIMEN,Automatic trimming enable" "0: Automatic trimming disabled TRIM bits can be..,1: Automatic trimming enabled TRIM bits are.."
bitfld.long 0x0 5. "CEN,Frequency error counter enable" "0: Frequency error counter disabled,1: Frequency error counter enabled"
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bitfld.long 0x0 3. "ESYNCIE,Expected SYNC interrupt enable" "0: Expected SYNC (ESYNCF) interrupt disabled,1: Expected SYNC (ESYNCF) interrupt enabled"
bitfld.long 0x0 2. "ERRIE,Synchronization or trimming error interrupt enable" "0: Synchronization or trimming error (ERRF)..,1: Synchronization or trimming error (ERRF).."
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bitfld.long 0x0 1. "SYNCWARNIE,SYNC warning interrupt enable" "0: SYNC warning (SYNCWARNF) interrupt disabled,1: SYNC warning (SYNCWARNF) interrupt enabled"
bitfld.long 0x0 0. "SYNCOKIE,SYNC event OK interrupt enable" "0: SYNC event OK (SYNCOKF) interrupt disabled,1: SYNC event OK (SYNCOKF) interrupt enabled"
line.long 0x4 "CRS_CFGR,CRS configuration register"
bitfld.long 0x4 31. "SYNCPOL,SYNC polarity selection" "0: SYNC active on rising edge (default),1: SYNC active on falling edge"
bitfld.long 0x4 28.--29. "SYNCSRC,SYNC signal source selection" "0: crs_sync_in_1 selected as SYNC signal source,1: crs_sync_in_2 selected as SYNC signal source,2: crs_sync_in_3 selected as SYNC signal source,3: crs_sync_in_4 selected as SYNC signal source"
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bitfld.long 0x4 24.--26. "SYNCDIV,SYNC divider" "0: SYNC not divided (default),1: SYNC divided by 2,2: SYNC divided by 4,3: SYNC divided by 8,4: SYNC divided by 16,5: SYNC divided by 32,6: SYNC divided by 64,7: SYNC divided by 128"
hexmask.long.byte 0x4 16.--23. 1. "FELIM,Frequency error limit"
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hexmask.long.word 0x4 0.--15. 1. "RELOAD,Counter reload value"
rgroup.long 0x8++0x3
line.long 0x0 "CRS_ISR,CRS interrupt and status register"
hexmask.long.word 0x0 16.--31. 1. "FECAP,Frequency error capture"
bitfld.long 0x0 15. "FEDIR,Frequency error direction" "0: Up-counting direction the actual frequency is..,1: Down-counting direction the actual frequency is.."
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bitfld.long 0x0 10. "TRIMOVF,Trimming overflow or underflow" "0: No trimming error signaled,1: Trimming error signaled"
bitfld.long 0x0 9. "SYNCMISS,SYNC missed" "0: No SYNC missed error signaled,1: SYNC missed error signaled"
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bitfld.long 0x0 8. "SYNCERR,SYNC error" "0: No SYNC error signaled,1: SYNC error signaled"
bitfld.long 0x0 3. "ESYNCF,Expected SYNC flag" "0: No expected SYNC signaled,1: Expected SYNC signaled"
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bitfld.long 0x0 2. "ERRF,Error flag" "0: No synchronization or trimming error signaled,1: Synchronization or trimming error signaled"
bitfld.long 0x0 1. "SYNCWARNF,SYNC warning flag" "0: No SYNC warning signaled,1: SYNC warning signaled"
newline
bitfld.long 0x0 0. "SYNCOKF,SYNC event OK flag" "0: No SYNC event OK signaled,1: SYNC event OK signaled"
group.long 0xC++0x3
line.long 0x0 "CRS_ICR,CRS interrupt flag clear register"
bitfld.long 0x0 3. "ESYNCC,Expected SYNC clear flag" "0,1"
bitfld.long 0x0 2. "ERRC,Error clear flag" "0,1"
newline
bitfld.long 0x0 1. "SYNCWARNC,SYNC warning clear flag" "0,1"
bitfld.long 0x0 0. "SYNCOKC,SYNC event OK clear flag" "0,1"
tree.end
tree "SEC_CRS"
base ad:0x50006000
group.long 0x0++0x7
line.long 0x0 "CRS_CR,CRS control register"
hexmask.long.byte 0x0 8.--14. 1. "TRIM,HSI48 oscillator smooth trimming"
bitfld.long 0x0 7. "SWSYNC,Generate software SYNC event" "0: No action,1: A software SYNC event is generated."
newline
bitfld.long 0x0 6. "AUTOTRIMEN,Automatic trimming enable" "0: Automatic trimming disabled TRIM bits can be..,1: Automatic trimming enabled TRIM bits are.."
bitfld.long 0x0 5. "CEN,Frequency error counter enable" "0: Frequency error counter disabled,1: Frequency error counter enabled"
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bitfld.long 0x0 3. "ESYNCIE,Expected SYNC interrupt enable" "0: Expected SYNC (ESYNCF) interrupt disabled,1: Expected SYNC (ESYNCF) interrupt enabled"
bitfld.long 0x0 2. "ERRIE,Synchronization or trimming error interrupt enable" "0: Synchronization or trimming error (ERRF)..,1: Synchronization or trimming error (ERRF).."
newline
bitfld.long 0x0 1. "SYNCWARNIE,SYNC warning interrupt enable" "0: SYNC warning (SYNCWARNF) interrupt disabled,1: SYNC warning (SYNCWARNF) interrupt enabled"
bitfld.long 0x0 0. "SYNCOKIE,SYNC event OK interrupt enable" "0: SYNC event OK (SYNCOKF) interrupt disabled,1: SYNC event OK (SYNCOKF) interrupt enabled"
line.long 0x4 "CRS_CFGR,CRS configuration register"
bitfld.long 0x4 31. "SYNCPOL,SYNC polarity selection" "0: SYNC active on rising edge (default),1: SYNC active on falling edge"
bitfld.long 0x4 28.--29. "SYNCSRC,SYNC signal source selection" "0: crs_sync_in_1 selected as SYNC signal source,1: crs_sync_in_2 selected as SYNC signal source,2: crs_sync_in_3 selected as SYNC signal source,3: crs_sync_in_4 selected as SYNC signal source"
newline
bitfld.long 0x4 24.--26. "SYNCDIV,SYNC divider" "0: SYNC not divided (default),1: SYNC divided by 2,2: SYNC divided by 4,3: SYNC divided by 8,4: SYNC divided by 16,5: SYNC divided by 32,6: SYNC divided by 64,7: SYNC divided by 128"
hexmask.long.byte 0x4 16.--23. 1. "FELIM,Frequency error limit"
newline
hexmask.long.word 0x4 0.--15. 1. "RELOAD,Counter reload value"
rgroup.long 0x8++0x3
line.long 0x0 "CRS_ISR,CRS interrupt and status register"
hexmask.long.word 0x0 16.--31. 1. "FECAP,Frequency error capture"
bitfld.long 0x0 15. "FEDIR,Frequency error direction" "0: Up-counting direction the actual frequency is..,1: Down-counting direction the actual frequency is.."
newline
bitfld.long 0x0 10. "TRIMOVF,Trimming overflow or underflow" "0: No trimming error signaled,1: Trimming error signaled"
bitfld.long 0x0 9. "SYNCMISS,SYNC missed" "0: No SYNC missed error signaled,1: SYNC missed error signaled"
newline
bitfld.long 0x0 8. "SYNCERR,SYNC error" "0: No SYNC error signaled,1: SYNC error signaled"
bitfld.long 0x0 3. "ESYNCF,Expected SYNC flag" "0: No expected SYNC signaled,1: Expected SYNC signaled"
newline
bitfld.long 0x0 2. "ERRF,Error flag" "0: No synchronization or trimming error signaled,1: Synchronization or trimming error signaled"
bitfld.long 0x0 1. "SYNCWARNF,SYNC warning flag" "0: No SYNC warning signaled,1: SYNC warning signaled"
newline
bitfld.long 0x0 0. "SYNCOKF,SYNC event OK flag" "0: No SYNC event OK signaled,1: SYNC event OK signaled"
group.long 0xC++0x3
line.long 0x0 "CRS_ICR,CRS interrupt flag clear register"
bitfld.long 0x0 3. "ESYNCC,Expected SYNC clear flag" "0,1"
bitfld.long 0x0 2. "ERRC,Error clear flag" "0,1"
newline
bitfld.long 0x0 1. "SYNCWARNC,SYNC warning clear flag" "0,1"
bitfld.long 0x0 0. "SYNCOKC,SYNC event OK clear flag" "0,1"
tree.end
tree.end
tree "DAC (Digital-to-Analog Converter)"
base ad:0x0
tree "DAC"
base ad:0x42028400
group.long 0x0++0x3
line.long 0x0 "DAC_CR,DAC control register"
bitfld.long 0x0 30. "CEN2,This bit is set and cleared by software to enable/disable DAC channel2 calibration it can be written only if EN2 bit is set to 0 into DAC_CR (the calibration mode can be entered/exit only when the DAC channel is disabled) Otherwise the write.." "0: DAC channel2 in Normal operating mode,1: DAC channel2 in calibration mode"
bitfld.long 0x0 29. "DMAUDRIE2,This bit is set and cleared by software." "0: DAC channel2 DMA underrun interrupt disabled,1: DAC channel2 DMA underrun interrupt enabled"
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bitfld.long 0x0 28. "DMAEN2,This bit is set and cleared by software." "0: DAC channel2 DMA mode disabled,1: DAC channel2 DMA mode enabled"
hexmask.long.byte 0x0 24.--27. 1. "MAMP2,These bits are written by software to select mask in wave generation mode or amplitude in triangle generation mode."
newline
bitfld.long 0x0 22.--23. "WAVE2,These bits are set/reset by software." "0: wave generation disabled,1: Noise wave generation enabled,2: Triangle wave generation enabled,3: Triangle wave generation enabled"
hexmask.long.byte 0x0 18.--21. 1. "TSEL2,These bits select the external event used to trigger DAC channel2"
newline
bitfld.long 0x0 17. "TEN2,This bit is set and cleared by software to enable/disable DAC channel2 trigger." "0: DAC channel2 trigger disabled and data written..,1: DAC channel2 trigger enabled and data from the.."
bitfld.long 0x0 16. "EN2,This bit is set and cleared by software to enable/disable DAC channel2." "0: DAC channel2 disabled,1: DAC channel2 enabledSection 19"
newline
bitfld.long 0x0 14. "CEN1,This bit is set and cleared by software to enable/disable DAC channel1 calibration it can be written only if bit EN1 = 0 into DAC_CR (the calibration mode can be entered/exit only when the DAC channel is disabled) Otherwise the write operation is.." "0: DAC channel1 in Normal operating mode,1: DAC channel1 in calibration mode"
bitfld.long 0x0 13. "DMAUDRIE1,This bit is set and cleared by software." "0: DAC channel1 DMA Underrun Interrupt disabled,1: DAC channel1 DMA Underrun Interrupt enabled"
newline
bitfld.long 0x0 12. "DMAEN1,This bit is set and cleared by software." "0: DAC channel1 DMA mode disabled,1: DAC channel1 DMA mode enabled"
hexmask.long.byte 0x0 8.--11. 1. "MAMP1,These bits are written by software to select mask in wave generation mode or amplitude in triangle generation mode."
newline
bitfld.long 0x0 6.--7. "WAVE1,None" "0: wave generation disabled,1: Noise wave generation enabled,2: Triangle wave generation enabled,3: Triangle wave generation enabled"
hexmask.long.byte 0x0 2.--5. 1. "TSEL1,These bits select the external event used to trigger DAC channel2"
newline
bitfld.long 0x0 1. "TEN1,This bit is set and cleared by software to enable/disable DAC channel1 trigger." "0: DAC channel1 trigger disabled and data written..,1: DAC channel1 trigger enabled and data from the.."
bitfld.long 0x0 0. "EN1,This bit is set and cleared by software to enable/disable DAC channel1." "0: DAC channel1 disabled,1: DAC channel1 enabled"
wgroup.long 0x4++0x3
line.long 0x0 "DAC_SWTRGR,DAC software trigger register"
bitfld.long 0x0 1. "SWTRIG2,This bit is set by software to trigger the DAC in software trigger mode." "0: No trigger,1: Trigger"
bitfld.long 0x0 0. "SWTRIG1,This bit is set by software to trigger the DAC in software trigger mode." "0: No trigger,1: Trigger"
group.long 0x8++0x23
line.long 0x0 "DAC_DHR12R1,DAC channel1 12-bit right-aligned data holding register"
hexmask.long.word 0x0 16.--27. 1. "DACC1DHRB,These bits are written by software. They specify 12-bit data for DAC channel1 when the DAC operates in Double data mode."
hexmask.long.word 0x0 0.--11. 1. "DACC1DHR,These bits are written by software. They specify 12-bit data for DAC channel1."
line.long 0x4 "DAC_DHR12L1,DAC channel1 12-bit left aligned data holding register"
hexmask.long.word 0x4 20.--31. 1. "DACC1DHRB,These bits are written by software. They specify 12-bit data for DAC channel1 when the DAC operates in Double data mode."
hexmask.long.word 0x4 4.--15. 1. "DACC1DHR,These bits are written by software."
line.long 0x8 "DAC_DHR8R1,DAC channel1 8-bit right aligned data holding register"
hexmask.long.byte 0x8 8.--15. 1. "DACC1DHRB,These bits are written by software. They specify 8-bit data for DAC channel1 when the DAC operates in Double data mode."
hexmask.long.byte 0x8 0.--7. 1. "DACC1DHR,These bits are written by software. They specify 8-bit data for DAC channel1."
line.long 0xC "DAC_DHR12R2,DAC channel2 12-bit right aligned data holding register"
hexmask.long.word 0xC 16.--27. 1. "DACC2DHRB,These bits are written by software. They specify 12-bit data for DAC channel2 when the DAC operates in DMA Double data mode."
hexmask.long.word 0xC 0.--11. 1. "DACC2DHR,These bits are written by software. They specify 12-bit data for DAC channel2."
line.long 0x10 "DAC_DHR12L2,DAC channel2 12-bit left aligned data holding register"
hexmask.long.word 0x10 20.--31. 1. "DACC2DHRB,These bits are written by software. They specify 12-bit data for DAC channel2 when the DAC operates in Double data mode."
hexmask.long.word 0x10 4.--15. 1. "DACC2DHR,These bits are written by software which specify 12-bit data for DAC channel2."
line.long 0x14 "DAC_DHR8R2,DAC channel2 8-bit right-aligned data holding register"
hexmask.long.byte 0x14 8.--15. 1. "DACC2DHRB,These bits are written by software. They specify 8-bit data for DAC channel2 when the DAC operates in Double data mode."
hexmask.long.byte 0x14 0.--7. 1. "DACC2DHR,These bits are written by software which specifies 8-bit data for DAC channel2."
line.long 0x18 "DAC_DHR12RD,Dual DAC 12-bit right-aligned data holding register"
hexmask.long.word 0x18 16.--27. 1. "DACC2DHR,These bits are written by software which specifies 12-bit data for DAC channel2."
hexmask.long.word 0x18 0.--11. 1. "DACC1DHR,These bits are written by software which specifies 12-bit data for DAC channel1."
line.long 0x1C "DAC_DHR12LD,Dual DAC 12-bit left aligned data holding register"
hexmask.long.word 0x1C 20.--31. 1. "DACC2DHR,These bits are written by software which specifies 12-bit data for DAC channel2."
hexmask.long.word 0x1C 4.--15. 1. "DACC1DHR,These bits are written by software which specifies 12-bit data for DAC channel1."
line.long 0x20 "DAC_DHR8RD,Dual DAC 8-bit right aligned data holding register"
hexmask.long.byte 0x20 8.--15. 1. "DACC2DHR,These bits are written by software which specifies 8-bit data for DAC channel2."
hexmask.long.byte 0x20 0.--7. 1. "DACC1DHR,These bits are written by software which specifies 8-bit data for DAC channel1."
rgroup.long 0x2C++0x7
line.long 0x0 "DAC_DOR1,DAC channel1 data output register"
hexmask.long.word 0x0 16.--27. 1. "DACC1DORB,These bits are read-only. They contain data output for DAC channel1."
hexmask.long.word 0x0 0.--11. 1. "DACC1DOR,These bits are read-only they contain data output for DAC channel1."
line.long 0x4 "DAC_DOR2,DAC channel2 data output register"
hexmask.long.word 0x4 16.--27. 1. "DACC2DORB,These bits are read-only. They contain data output for DAC channel2."
hexmask.long.word 0x4 0.--11. 1. "DACC2DOR,These bits are read-only they contain data output for DAC channel2."
group.long 0x34++0x1B
line.long 0x0 "DAC_SR,DAC status register"
rbitfld.long 0x0 31. "BWST2,This bit is systematically set just after Sample and hold mode enable. It is set each time the software writes the register DAC_SHSR2 It is cleared by hardware when the write operation of DAC_SHSR2 is complete. (It takes about 3 LSI/LSE periods of.." "0: There is no write operation of DAC_SHSR2..,1: There is a write operation of DAC_SHSR2 ongoing:.."
rbitfld.long 0x0 30. "CAL_FLAG2,This bit is set and cleared by hardware" "0: calibration trimming value is lower than the..,1: calibration trimming value is equal or greater.."
newline
bitfld.long 0x0 29. "DMAUDR2,This bit is set by hardware and cleared by software (by writing it to 1)." "0: No DMA underrun error condition occurred for DAC..,?"
rbitfld.long 0x0 28. "DORSTAT2,This bit is set and cleared by hardware. It is applicable only when the DAC operates in Double data mode." "0: DOR[11:0] is used actual DAC output,1: DORB[11:0] is used actual DAC outputSection"
newline
rbitfld.long 0x0 27. "DAC2RDY,This bit is set and cleared by hardware." "0: DAC channel2 is not yet ready to accept the..,1: DAC channel2 is ready to accept the trigger or.."
rbitfld.long 0x0 15. "BWST1,None" "0: There is no write operation of DAC_SHSR1..,1: There is a write operation of DAC_SHSR1 ongoing:.."
newline
rbitfld.long 0x0 14. "CAL_FLAG1,None" "0: calibration trimming value is lower than the..,1: calibration trimming value is equal or greater.."
bitfld.long 0x0 13. "DMAUDR1,This bit is set by hardware and cleared by software (by writing it to 1)." "0: No DMA underrun error condition occurred for DAC..,1: DMA underrun error condition occurred for DAC.."
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rbitfld.long 0x0 12. "DORSTAT1,This bit is set and cleared by hardware. It is applicable only when the DAC operates in Double data mode." "0: DOR[11:0] is used actual DAC output,1: DORB[11:0] is used actual DAC output"
rbitfld.long 0x0 11. "DAC1RDY,This bit is set and cleared by hardware." "0: DAC channel1 is not yet ready to accept the..,1: DAC channel1 is ready to accept the trigger or.."
line.long 0x4 "DAC_CCR,DAC calibration control register"
hexmask.long.byte 0x4 16.--20. 1. "OTRIM2,These bits are available only on dual-channel DACs. Refer to less than xe1 [Implementation]/>."
hexmask.long.byte 0x4 0.--4. 1. "OTRIM1,None"
line.long 0x8 "DAC_MCR,DAC mode control register"
bitfld.long 0x8 25. "SINFORMAT2,This bit is set and cleared by software." "0: Input data is in unsigned format,1: Input data is in signed format"
bitfld.long 0x8 24. "DMADOUBLE2,This bit is set and cleared by software." "0: DMA Normal mode selected,1: DMA Double data mode selected"
newline
bitfld.long 0x8 16.--18. "MODE2,These bits can be written only when the DAC is disabled and not in the calibration mode (when bit EN2 = 0 and bit CEN2 = 0 in the DAC_CR register). If EN2 = 1 or CEN2 = 1 the write operation is ignored." "0: DAC channel2 in Normal mode is connected to..,1: DAC channel2 in Normal mode is connected to..,2: DAC channel2 in Normal mode is connected to..,3: DAC channel2 in Normal mode is connected to on..,4: DAC channel2 in Sample and hold mode is..,5: DAC channel2 in Sample and hold mode is..,6: DAC channel2 in Sample and hold mode is..,7: DAC channel2 in Sample and hold mode is.."
bitfld.long 0x8 14.--15. "HFSEL,None" "0: High frequency interface mode disabled,1: High frequency interface mode compatible to AHB..,?,?"
newline
bitfld.long 0x8 9. "SINFORMAT1,This bit is set and cleared by software." "0: Input data is in unsigned format,1: Input data is in signed format"
bitfld.long 0x8 8. "DMADOUBLE1,This bit is set and cleared by software." "0: DMA Normal mode selected,1: DMA Double data mode selected"
newline
bitfld.long 0x8 0.--2. "MODE1,These bits can be written only when the DAC is disabled and not in the calibration mode (when bit EN1 = 0 and bit CEN1 = 0 in the DAC_CR register). If EN1 = 1 or CEN1 = 1 the write operation is ignored." "0: DAC channel1 in Normal mode is connected to..,1: DAC channel1 in Normal mode is connected to..,2: DAC channel1 in Normal mode is connected to..,3: DAC channel1 in Normal mode is connected to on..,4: DAC channel1 in Sample and hold mode is..,5: DAC channel1 in Sample and hold mode is..,6: DAC channel1 in Sample and hold mode is..,7: DAC channel1 in Sample and hold mode is.."
line.long 0xC "DAC_SHSR1,DAC channel1 sample and hold sample time register"
hexmask.long.word 0xC 0.--9. 1. "TSAMPLE1,These bits can be written when the DAC channel1 is disabled or also during normal operation. in the latter case the write can be done only when BWST1 of DAC_SR register is low If BWST1 = 1 the write operation is ignored."
line.long 0x10 "DAC_SHSR2,DAC channel2 sample and hold sample time register"
hexmask.long.word 0x10 0.--9. 1. "TSAMPLE2,These bits can be written when the DAC channel2 is disabled or also during normal operation."
line.long 0x14 "DAC_SHHR,DAC sample and hold time register"
hexmask.long.word 0x14 16.--25. 1. "THOLD2,Hold time = (THOLD[9:0]) x LSI/LSE clock period"
hexmask.long.word 0x14 0.--9. 1. "THOLD1,Hold time = (THOLD[9:0]) x LSI/LSE clock period"
line.long 0x18 "DAC_SHRR,DAC sample and hold refresh time register"
hexmask.long.byte 0x18 16.--23. 1. "TREFRESH2,Refresh time = (TREFRESH[7:0]) x LSI / LSE clock period"
hexmask.long.byte 0x18 0.--7. 1. "TREFRESH1,Refresh time = (TREFRESH[7:0]) x LSI / LSE clock period"
group.long 0x54++0x3
line.long 0x0 "DAC_AUTOCR,DAC Autonomous mode control register"
bitfld.long 0x0 22. "AUTOMODE,This bit is set and cleared by software." "0: DAC Autonomous mode disabled,1: DAC Autonomous mode enabled"
tree.end
tree "SEC_DAC"
base ad:0x52028400
group.long 0x0++0x3
line.long 0x0 "DAC_CR,DAC control register"
bitfld.long 0x0 30. "CEN2,This bit is set and cleared by software to enable/disable DAC channel2 calibration it can be written only if EN2 bit is set to 0 into DAC_CR (the calibration mode can be entered/exit only when the DAC channel is disabled) Otherwise the write.." "0: DAC channel2 in Normal operating mode,1: DAC channel2 in calibration mode"
bitfld.long 0x0 29. "DMAUDRIE2,This bit is set and cleared by software." "0: DAC channel2 DMA underrun interrupt disabled,1: DAC channel2 DMA underrun interrupt enabled"
newline
bitfld.long 0x0 28. "DMAEN2,This bit is set and cleared by software." "0: DAC channel2 DMA mode disabled,1: DAC channel2 DMA mode enabled"
hexmask.long.byte 0x0 24.--27. 1. "MAMP2,These bits are written by software to select mask in wave generation mode or amplitude in triangle generation mode."
newline
bitfld.long 0x0 22.--23. "WAVE2,These bits are set/reset by software." "0: wave generation disabled,1: Noise wave generation enabled,2: Triangle wave generation enabled,3: Triangle wave generation enabled"
hexmask.long.byte 0x0 18.--21. 1. "TSEL2,These bits select the external event used to trigger DAC channel2"
newline
bitfld.long 0x0 17. "TEN2,This bit is set and cleared by software to enable/disable DAC channel2 trigger." "0: DAC channel2 trigger disabled and data written..,1: DAC channel2 trigger enabled and data from the.."
bitfld.long 0x0 16. "EN2,This bit is set and cleared by software to enable/disable DAC channel2." "0: DAC channel2 disabled,1: DAC channel2 enabledSection 19"
newline
bitfld.long 0x0 14. "CEN1,This bit is set and cleared by software to enable/disable DAC channel1 calibration it can be written only if bit EN1 = 0 into DAC_CR (the calibration mode can be entered/exit only when the DAC channel is disabled) Otherwise the write operation is.." "0: DAC channel1 in Normal operating mode,1: DAC channel1 in calibration mode"
bitfld.long 0x0 13. "DMAUDRIE1,This bit is set and cleared by software." "0: DAC channel1 DMA Underrun Interrupt disabled,1: DAC channel1 DMA Underrun Interrupt enabled"
newline
bitfld.long 0x0 12. "DMAEN1,This bit is set and cleared by software." "0: DAC channel1 DMA mode disabled,1: DAC channel1 DMA mode enabled"
hexmask.long.byte 0x0 8.--11. 1. "MAMP1,These bits are written by software to select mask in wave generation mode or amplitude in triangle generation mode."
newline
bitfld.long 0x0 6.--7. "WAVE1,None" "0: wave generation disabled,1: Noise wave generation enabled,2: Triangle wave generation enabled,3: Triangle wave generation enabled"
hexmask.long.byte 0x0 2.--5. 1. "TSEL1,These bits select the external event used to trigger DAC channel2"
newline
bitfld.long 0x0 1. "TEN1,This bit is set and cleared by software to enable/disable DAC channel1 trigger." "0: DAC channel1 trigger disabled and data written..,1: DAC channel1 trigger enabled and data from the.."
bitfld.long 0x0 0. "EN1,This bit is set and cleared by software to enable/disable DAC channel1." "0: DAC channel1 disabled,1: DAC channel1 enabled"
wgroup.long 0x4++0x3
line.long 0x0 "DAC_SWTRGR,DAC software trigger register"
bitfld.long 0x0 1. "SWTRIG2,This bit is set by software to trigger the DAC in software trigger mode." "0: No trigger,1: Trigger"
bitfld.long 0x0 0. "SWTRIG1,This bit is set by software to trigger the DAC in software trigger mode." "0: No trigger,1: Trigger"
group.long 0x8++0x23
line.long 0x0 "DAC_DHR12R1,DAC channel1 12-bit right-aligned data holding register"
hexmask.long.word 0x0 16.--27. 1. "DACC1DHRB,These bits are written by software. They specify 12-bit data for DAC channel1 when the DAC operates in Double data mode."
hexmask.long.word 0x0 0.--11. 1. "DACC1DHR,These bits are written by software. They specify 12-bit data for DAC channel1."
line.long 0x4 "DAC_DHR12L1,DAC channel1 12-bit left aligned data holding register"
hexmask.long.word 0x4 20.--31. 1. "DACC1DHRB,These bits are written by software. They specify 12-bit data for DAC channel1 when the DAC operates in Double data mode."
hexmask.long.word 0x4 4.--15. 1. "DACC1DHR,These bits are written by software."
line.long 0x8 "DAC_DHR8R1,DAC channel1 8-bit right aligned data holding register"
hexmask.long.byte 0x8 8.--15. 1. "DACC1DHRB,These bits are written by software. They specify 8-bit data for DAC channel1 when the DAC operates in Double data mode."
hexmask.long.byte 0x8 0.--7. 1. "DACC1DHR,These bits are written by software. They specify 8-bit data for DAC channel1."
line.long 0xC "DAC_DHR12R2,DAC channel2 12-bit right aligned data holding register"
hexmask.long.word 0xC 16.--27. 1. "DACC2DHRB,These bits are written by software. They specify 12-bit data for DAC channel2 when the DAC operates in DMA Double data mode."
hexmask.long.word 0xC 0.--11. 1. "DACC2DHR,These bits are written by software. They specify 12-bit data for DAC channel2."
line.long 0x10 "DAC_DHR12L2,DAC channel2 12-bit left aligned data holding register"
hexmask.long.word 0x10 20.--31. 1. "DACC2DHRB,These bits are written by software. They specify 12-bit data for DAC channel2 when the DAC operates in Double data mode."
hexmask.long.word 0x10 4.--15. 1. "DACC2DHR,These bits are written by software which specify 12-bit data for DAC channel2."
line.long 0x14 "DAC_DHR8R2,DAC channel2 8-bit right-aligned data holding register"
hexmask.long.byte 0x14 8.--15. 1. "DACC2DHRB,These bits are written by software. They specify 8-bit data for DAC channel2 when the DAC operates in Double data mode."
hexmask.long.byte 0x14 0.--7. 1. "DACC2DHR,These bits are written by software which specifies 8-bit data for DAC channel2."
line.long 0x18 "DAC_DHR12RD,Dual DAC 12-bit right-aligned data holding register"
hexmask.long.word 0x18 16.--27. 1. "DACC2DHR,These bits are written by software which specifies 12-bit data for DAC channel2."
hexmask.long.word 0x18 0.--11. 1. "DACC1DHR,These bits are written by software which specifies 12-bit data for DAC channel1."
line.long 0x1C "DAC_DHR12LD,Dual DAC 12-bit left aligned data holding register"
hexmask.long.word 0x1C 20.--31. 1. "DACC2DHR,These bits are written by software which specifies 12-bit data for DAC channel2."
hexmask.long.word 0x1C 4.--15. 1. "DACC1DHR,These bits are written by software which specifies 12-bit data for DAC channel1."
line.long 0x20 "DAC_DHR8RD,Dual DAC 8-bit right aligned data holding register"
hexmask.long.byte 0x20 8.--15. 1. "DACC2DHR,These bits are written by software which specifies 8-bit data for DAC channel2."
hexmask.long.byte 0x20 0.--7. 1. "DACC1DHR,These bits are written by software which specifies 8-bit data for DAC channel1."
rgroup.long 0x2C++0x7
line.long 0x0 "DAC_DOR1,DAC channel1 data output register"
hexmask.long.word 0x0 16.--27. 1. "DACC1DORB,These bits are read-only. They contain data output for DAC channel1."
hexmask.long.word 0x0 0.--11. 1. "DACC1DOR,These bits are read-only they contain data output for DAC channel1."
line.long 0x4 "DAC_DOR2,DAC channel2 data output register"
hexmask.long.word 0x4 16.--27. 1. "DACC2DORB,These bits are read-only. They contain data output for DAC channel2."
hexmask.long.word 0x4 0.--11. 1. "DACC2DOR,These bits are read-only they contain data output for DAC channel2."
group.long 0x34++0x1B
line.long 0x0 "DAC_SR,DAC status register"
rbitfld.long 0x0 31. "BWST2,This bit is systematically set just after Sample and hold mode enable. It is set each time the software writes the register DAC_SHSR2 It is cleared by hardware when the write operation of DAC_SHSR2 is complete. (It takes about 3 LSI/LSE periods of.." "0: There is no write operation of DAC_SHSR2..,1: There is a write operation of DAC_SHSR2 ongoing:.."
rbitfld.long 0x0 30. "CAL_FLAG2,This bit is set and cleared by hardware" "0: calibration trimming value is lower than the..,1: calibration trimming value is equal or greater.."
newline
bitfld.long 0x0 29. "DMAUDR2,This bit is set by hardware and cleared by software (by writing it to 1)." "0: No DMA underrun error condition occurred for DAC..,?"
rbitfld.long 0x0 28. "DORSTAT2,This bit is set and cleared by hardware. It is applicable only when the DAC operates in Double data mode." "0: DOR[11:0] is used actual DAC output,1: DORB[11:0] is used actual DAC outputSection"
newline
rbitfld.long 0x0 27. "DAC2RDY,This bit is set and cleared by hardware." "0: DAC channel2 is not yet ready to accept the..,1: DAC channel2 is ready to accept the trigger or.."
rbitfld.long 0x0 15. "BWST1,None" "0: There is no write operation of DAC_SHSR1..,1: There is a write operation of DAC_SHSR1 ongoing:.."
newline
rbitfld.long 0x0 14. "CAL_FLAG1,None" "0: calibration trimming value is lower than the..,1: calibration trimming value is equal or greater.."
bitfld.long 0x0 13. "DMAUDR1,This bit is set by hardware and cleared by software (by writing it to 1)." "0: No DMA underrun error condition occurred for DAC..,1: DMA underrun error condition occurred for DAC.."
newline
rbitfld.long 0x0 12. "DORSTAT1,This bit is set and cleared by hardware. It is applicable only when the DAC operates in Double data mode." "0: DOR[11:0] is used actual DAC output,1: DORB[11:0] is used actual DAC output"
rbitfld.long 0x0 11. "DAC1RDY,This bit is set and cleared by hardware." "0: DAC channel1 is not yet ready to accept the..,1: DAC channel1 is ready to accept the trigger or.."
line.long 0x4 "DAC_CCR,DAC calibration control register"
hexmask.long.byte 0x4 16.--20. 1. "OTRIM2,These bits are available only on dual-channel DACs. Refer to less than xe1 [Implementation]/>."
hexmask.long.byte 0x4 0.--4. 1. "OTRIM1,None"
line.long 0x8 "DAC_MCR,DAC mode control register"
bitfld.long 0x8 25. "SINFORMAT2,This bit is set and cleared by software." "0: Input data is in unsigned format,1: Input data is in signed format"
bitfld.long 0x8 24. "DMADOUBLE2,This bit is set and cleared by software." "0: DMA Normal mode selected,1: DMA Double data mode selected"
newline
bitfld.long 0x8 16.--18. "MODE2,These bits can be written only when the DAC is disabled and not in the calibration mode (when bit EN2 = 0 and bit CEN2 = 0 in the DAC_CR register). If EN2 = 1 or CEN2 = 1 the write operation is ignored." "0: DAC channel2 in Normal mode is connected to..,1: DAC channel2 in Normal mode is connected to..,2: DAC channel2 in Normal mode is connected to..,3: DAC channel2 in Normal mode is connected to on..,4: DAC channel2 in Sample and hold mode is..,5: DAC channel2 in Sample and hold mode is..,6: DAC channel2 in Sample and hold mode is..,7: DAC channel2 in Sample and hold mode is.."
bitfld.long 0x8 14.--15. "HFSEL,None" "0: High frequency interface mode disabled,1: High frequency interface mode compatible to AHB..,?,?"
newline
bitfld.long 0x8 9. "SINFORMAT1,This bit is set and cleared by software." "0: Input data is in unsigned format,1: Input data is in signed format"
bitfld.long 0x8 8. "DMADOUBLE1,This bit is set and cleared by software." "0: DMA Normal mode selected,1: DMA Double data mode selected"
newline
bitfld.long 0x8 0.--2. "MODE1,These bits can be written only when the DAC is disabled and not in the calibration mode (when bit EN1 = 0 and bit CEN1 = 0 in the DAC_CR register). If EN1 = 1 or CEN1 = 1 the write operation is ignored." "0: DAC channel1 in Normal mode is connected to..,1: DAC channel1 in Normal mode is connected to..,2: DAC channel1 in Normal mode is connected to..,3: DAC channel1 in Normal mode is connected to on..,4: DAC channel1 in Sample and hold mode is..,5: DAC channel1 in Sample and hold mode is..,6: DAC channel1 in Sample and hold mode is..,7: DAC channel1 in Sample and hold mode is.."
line.long 0xC "DAC_SHSR1,DAC channel1 sample and hold sample time register"
hexmask.long.word 0xC 0.--9. 1. "TSAMPLE1,These bits can be written when the DAC channel1 is disabled or also during normal operation. in the latter case the write can be done only when BWST1 of DAC_SR register is low If BWST1 = 1 the write operation is ignored."
line.long 0x10 "DAC_SHSR2,DAC channel2 sample and hold sample time register"
hexmask.long.word 0x10 0.--9. 1. "TSAMPLE2,These bits can be written when the DAC channel2 is disabled or also during normal operation."
line.long 0x14 "DAC_SHHR,DAC sample and hold time register"
hexmask.long.word 0x14 16.--25. 1. "THOLD2,Hold time = (THOLD[9:0]) x LSI/LSE clock period"
hexmask.long.word 0x14 0.--9. 1. "THOLD1,Hold time = (THOLD[9:0]) x LSI/LSE clock period"
line.long 0x18 "DAC_SHRR,DAC sample and hold refresh time register"
hexmask.long.byte 0x18 16.--23. 1. "TREFRESH2,Refresh time = (TREFRESH[7:0]) x LSI / LSE clock period"
hexmask.long.byte 0x18 0.--7. 1. "TREFRESH1,Refresh time = (TREFRESH[7:0]) x LSI / LSE clock period"
group.long 0x54++0x3
line.long 0x0 "DAC_AUTOCR,DAC Autonomous mode control register"
bitfld.long 0x0 22. "AUTOMODE,This bit is set and cleared by software." "0: DAC Autonomous mode disabled,1: DAC Autonomous mode enabled"
tree.end
tree.end
tree "DBGMCU (MCU Debug Component)"
base ad:0xE0044000
rgroup.long 0x0++0x3
line.long 0x0 "DBGMCU_IDCODE,DBGMCU identity code register"
hexmask.long.word 0x0 16.--31. 1. "REV_ID,None"
newline
hexmask.long.word 0x0 0.--11. 1. "DEV_ID,None"
group.long 0x4++0x13
line.long 0x0 "DBGMCU_CR,DBGMCU configuration register"
bitfld.long 0x0 6.--7. "TRACE_MODE,None" "0: trace pins assigned for asynchronous mode,1: trace pins assigned for synchronous mode with a..,2: trace pins assigned for synchronous mode with a..,3: trace pins assigned for synchronous mode with a.."
newline
bitfld.long 0x0 5. "TRACE_EN,This bit enables the trace port clock TRACECK." "0: disabled,1: enabled"
newline
bitfld.long 0x0 4. "TRACE_IOEN,None" "0: disabled-trace pins not assigned,1: enabled-trace pins assigned according to the.."
newline
bitfld.long 0x0 2. "DBG_STANDBY,All clocks are disabled and the core powered down automatically in Standby mode." "0: normal operation,1: automatic clock stop/power down disabled"
newline
bitfld.long 0x0 1. "DBG_STOP,All clocks are disabled automatically in Stop mode." "0: normal operation,1: automatic clock stop disabled"
line.long 0x4 "DBGMCU_APB1LFZR,DBGMCU APB1L peripheral freeze register"
bitfld.long 0x4 30. "DBG_RTC_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x4 23. "DBG_I3C1_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x4 22. "DBG_I2C2_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x4 21. "DBG_I2C1_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x4 12. "DBG_IWDG_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x4 11. "DBG_WWDG_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x4 5. "DBG_TIM7_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x4 4. "DBG_TIM6_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x4 2. "DBG_TIM4_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x4 1. "DBG_TIM3_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x4 0. "DBG_TIM2_STOP,None" "0: normal operation,1: stop in debug"
line.long 0x8 "DBGMCU_APB1HFZR,DBGMCU APB1H peripheral freeze register"
bitfld.long 0x8 5. "DBG_LPTIM2_STOP,None" "0: normal operation,1: stop in debug"
line.long 0xC "DBGMCU_APB2FZR,DBGMCU APB2 peripheral freeze register"
bitfld.long 0xC 27. "DBG_I3C2_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0xC 18. "DBG_TIM17_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0xC 17. "DBG_TIM16_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0xC 16. "DBG_TIM15_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0xC 11. "DBG_TIM1_STOP,None" "0: normal operation,1: stop in debug"
line.long 0x10 "DBGMCU_APB3FZR,DBGMCU APB3 peripheral freeze register"
bitfld.long 0x10 19. "DBG_LPTIM4_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x10 18. "DBG_LPTIM3_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x10 17. "DBG_LPTIM1_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x10 10. "DBG_I2C3_STOP,None" "0: normal operation,1: stop in debug"
group.long 0x20++0x3
line.long 0x0 "DBGMCU_AHB1FZR,DBGMCU AHB1 peripheral freeze register"
bitfld.long 0x0 11. "DBG_GPDMA11_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x0 10. "DBG_GPDMA10_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x0 9. "DBG_GPDMA9_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x0 8. "DBG_GPDMA8_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x0 7. "DBG_GPDMA7_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x0 6. "DBG_GPDMA6_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x0 5. "DBG_GPDMA5_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x0 4. "DBG_GPDMA4_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x0 3. "DBG_GPDMA3_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x0 2. "DBG_GPDMA2_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x0 1. "DBG_GPDMA1_STOP,None" "0: normal operation,1: stop in debug"
newline
bitfld.long 0x0 0. "DBG_GPDMA0_STOP,None" "0: normal operation,1: stop in debug"
wgroup.long 0xFC++0x7
line.long 0x0 "DBGMCU_SR,DBGMCU status register"
hexmask.long.word 0x0 16.--31. 1. "AP_ENABLED,Bit n=0: APn locked"
newline
hexmask.long.word 0x0 0.--15. 1. "AP_PRESENT,Bit n=0: APn absent"
line.long 0x4 "DBGMCU_DBG_AUTH_HOST,DBGMCU debug host authentication register"
hexmask.long 0x4 0.--31. 1. "AUTH_KEY,The device specific 64-bit authentication key (OEM key) must be written to this register (in two successive 32-bit writes least significant word first) to permit RDP regression. Writing a wrong key locks access to the device and prevent code.."
rgroup.long 0x104++0x3
line.long 0x0 "DBGMCU_DBG_AUTH_DEVICE,DBGMCU debug device authentication register"
hexmask.long 0x0 0.--31. 1. "AUTH_ID,Device specific ID used for RDP regression."
rgroup.long 0xFD0++0x3
line.long 0x0 "DBGMCU_PIDR4,DBGMCU CoreSight peripheral identity register 4"
hexmask.long.byte 0x0 4.--7. 1. "SIZE,None"
newline
hexmask.long.byte 0x0 0.--3. 1. "JEP106CON,None"
rgroup.long 0xFE0++0x1F
line.long 0x0 "DBGMCU_PIDR0,DBGMCU CoreSight peripheral identity register 0"
hexmask.long.byte 0x0 0.--7. 1. "PARTNUM,None"
line.long 0x4 "DBGMCU_PIDR1,DBGMCU CoreSight peripheral identity register 1"
hexmask.long.byte 0x4 4.--7. 1. "JEP106ID,None"
newline
hexmask.long.byte 0x4 0.--3. 1. "PARTNUM,None"
line.long 0x8 "DBGMCU_PIDR2,DBGMCU CoreSight peripheral identity register 2"
hexmask.long.byte 0x8 4.--7. 1. "REVISION,None"
newline
bitfld.long 0x8 3. "JEDEC,None" "?,1: designer identification specified by JEDEC"
newline
bitfld.long 0x8 0.--2. "JEP106ID,None" "?,?,2: STMicroelectronics JEDEC code,?,?,?,?,?"
line.long 0xC "DBGMCU_PIDR3,DBGMCU CoreSight peripheral identity register 3"
hexmask.long.byte 0xC 4.--7. 1. "REVAND,None"
newline
hexmask.long.byte 0xC 0.--3. 1. "CMOD,None"
line.long 0x10 "DBGMCU_CIDR0,DBGMCU CoreSight component identity register 0"
hexmask.long.byte 0x10 0.--7. 1. "PREAMBLE,None"
line.long 0x14 "DBGMCU_CIDR1,DBGMCU CoreSight component identity register 1"
hexmask.long.byte 0x14 4.--7. 1. "CLASS,None"
newline
hexmask.long.byte 0x14 0.--3. 1. "PREAMBLE,None"
line.long 0x18 "DBGMCU_CIDR2,DBGMCU CoreSight component identity register 2"
hexmask.long.byte 0x18 0.--7. 1. "PREAMBLE,None"
line.long 0x1C "DBGMCU_CIDR3,DBGMCU CoreSight component identity register 3"
hexmask.long.byte 0x1C 0.--7. 1. "PREAMBLE,None"
tree.end
tree "DLYB (Delay block)"
base ad:0x0
tree "DLYBSD1"
base ad:0x420C8400
group.long 0x0++0x7
line.long 0x0 "DLYB_CR,DLYB control register"
bitfld.long 0x0 1. "SEN,0: Sampler length and register access to UNIT[6:0] and SEL[3:0] disabled output clock enabled." "0: Sampler length and register access to UNIT[6:0]..,1: Sampler length and register access to UNIT[6:0].."
bitfld.long 0x0 0. "DEN,0: DLYB disabled." "0: DLYB disabled,1: DLYB enabled"
line.long 0x4 "DLYB_CFGR,DLYB configuration register"
rbitfld.long 0x4 31. "LNGF,This flag indicates when the delay line length value contained in LNG[11:0] is valid after UNIT[6:0] bits changed." "0: Length value in LNG is not valid,1: Length value in LNG is valid"
hexmask.long.word 0x4 16.--27. 1. "LNG,These bits reflect the 12 unit delay values sampled at the rising edge of the input clock."
hexmask.long.byte 0x4 8.--14. 1. "UNIT,These bits can only be written when SEN = 1."
hexmask.long.byte 0x4 0.--3. 1. "SEL,These bits can only be written when SEN = 1."
tree.end
tree "SEC_DLYBSD1"
base ad:0x520C8400
group.long 0x0++0x7
line.long 0x0 "DLYB_CR,DLYB control register"
bitfld.long 0x0 1. "SEN,0: Sampler length and register access to UNIT[6:0] and SEL[3:0] disabled output clock enabled." "0: Sampler length and register access to UNIT[6:0]..,1: Sampler length and register access to UNIT[6:0].."
bitfld.long 0x0 0. "DEN,0: DLYB disabled." "0: DLYB disabled,1: DLYB enabled"
line.long 0x4 "DLYB_CFGR,DLYB configuration register"
rbitfld.long 0x4 31. "LNGF,This flag indicates when the delay line length value contained in LNG[11:0] is valid after UNIT[6:0] bits changed." "0: Length value in LNG is not valid,1: Length value in LNG is valid"
hexmask.long.word 0x4 16.--27. 1. "LNG,These bits reflect the 12 unit delay values sampled at the rising edge of the input clock."
hexmask.long.byte 0x4 8.--14. 1. "UNIT,These bits can only be written when SEN = 1."
hexmask.long.byte 0x4 0.--3. 1. "SEL,These bits can only be written when SEN = 1."
tree.end
tree "DLYBOS1"
base ad:0x420CF000
group.long 0x0++0x7
line.long 0x0 "DLYB_CR,DLYB control register"
bitfld.long 0x0 1. "SEN,0: Sampler length and register access to UNIT[6:0] and SEL[3:0] disabled output clock enabled." "0: Sampler length and register access to UNIT[6:0]..,1: Sampler length and register access to UNIT[6:0].."
bitfld.long 0x0 0. "DEN,0: DLYB disabled." "0: DLYB disabled,1: DLYB enabled"
line.long 0x4 "DLYB_CFGR,DLYB configuration register"
rbitfld.long 0x4 31. "LNGF,This flag indicates when the delay line length value contained in LNG[11:0] is valid after UNIT[6:0] bits changed." "0: Length value in LNG is not valid,1: Length value in LNG is valid"
hexmask.long.word 0x4 16.--27. 1. "LNG,These bits reflect the 12 unit delay values sampled at the rising edge of the input clock."
hexmask.long.byte 0x4 8.--14. 1. "UNIT,These bits can only be written when SEN = 1."
hexmask.long.byte 0x4 0.--3. 1. "SEL,These bits can only be written when SEN = 1."
tree.end
tree "SEC_DLYBOS1"
base ad:0x520CF000
group.long 0x0++0x7
line.long 0x0 "DLYB_CR,DLYB control register"
bitfld.long 0x0 1. "SEN,0: Sampler length and register access to UNIT[6:0] and SEL[3:0] disabled output clock enabled." "0: Sampler length and register access to UNIT[6:0]..,1: Sampler length and register access to UNIT[6:0].."
bitfld.long 0x0 0. "DEN,0: DLYB disabled." "0: DLYB disabled,1: DLYB enabled"
line.long 0x4 "DLYB_CFGR,DLYB configuration register"
rbitfld.long 0x4 31. "LNGF,This flag indicates when the delay line length value contained in LNG[11:0] is valid after UNIT[6:0] bits changed." "0: Length value in LNG is not valid,1: Length value in LNG is valid"
hexmask.long.word 0x4 16.--27. 1. "LNG,These bits reflect the 12 unit delay values sampled at the rising edge of the input clock."
hexmask.long.byte 0x4 8.--14. 1. "UNIT,These bits can only be written when SEN = 1."
hexmask.long.byte 0x4 0.--3. 1. "SEL,These bits can only be written when SEN = 1."
tree.end
tree.end
tree "ExTI (Extended Interrupt/Event Controller)"
base ad:0x0
tree "ExTI"
base ad:0x40032000
group.long 0x0++0x1B
line.long 0x0 "ExTI_RTSR1,ExTI rising trigger selection register"
bitfld.long 0x0 22. "RT22,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 21. "RT21,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 20. "RT20,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 19. "RT19,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 18. "RT18,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 17. "RT17,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 16. "RT16,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 15. "RT15,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 14. "RT14,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 13. "RT13,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 12. "RT12,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 11. "RT11,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 10. "RT10,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 9. "RT9,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 8. "RT8,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 7. "RT7,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 6. "RT6,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 5. "RT5,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 4. "RT4,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 3. "RT3,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 2. "RT2,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 1. "RT1,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 0. "RT0,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
line.long 0x4 "ExTI_FTSR1,ExTI falling trigger selection register"
bitfld.long 0x4 22. "FT22,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 21. "FT21,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 20. "FT20,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 19. "FT19,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 18. "FT18,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 17. "FT17,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 16. "FT16,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 15. "FT15,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 14. "FT14,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 13. "FT13,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 12. "FT12,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 11. "FT11,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 10. "FT10,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 9. "FT9,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 8. "FT8,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 7. "FT7,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 6. "FT6,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 5. "FT5,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 4. "FT4,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 3. "FT3,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 2. "FT2,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 1. "FT1,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 0. "FT0,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
line.long 0x8 "ExTI_SWIER1,ExTI software interrupt event register"
bitfld.long 0x8 22. "SWI22,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 21. "SWI21,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 20. "SWI20,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 19. "SWI19,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 18. "SWI18,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 17. "SWI17,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 16. "SWI16,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 15. "SWI15,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 14. "SWI14,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 13. "SWI13,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 12. "SWI12,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 11. "SWI11,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 10. "SWI10,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 9. "SWI9,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 8. "SWI8,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 7. "SWI7,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 6. "SWI6,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 5. "SWI5,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 4. "SWI4,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 3. "SWI3,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 2. "SWI2,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 1. "SWI1,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 0. "SWI0,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
line.long 0xC "ExTI_RPR1,ExTI rising edge pending register"
bitfld.long 0xC 22. "RPIF22,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 21. "RPIF21,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 20. "RPIF20,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 19. "RPIF19,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 18. "RPIF18,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 17. "RPIF17,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 16. "RPIF16,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 15. "RPIF15,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 14. "RPIF14,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 13. "RPIF13,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 12. "RPIF12,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 11. "RPIF11,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 10. "RPIF10,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 9. "RPIF9,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 8. "RPIF8,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 7. "RPIF7,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 6. "RPIF6,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 5. "RPIF5,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 4. "RPIF4,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 3. "RPIF3,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 2. "RPIF2,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 1. "RPIF1,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 0. "RPIF0,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
line.long 0x10 "ExTI_FPR1,ExTI falling edge pending register"
bitfld.long 0x10 22. "FPIF22,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 21. "FPIF21,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 20. "FPIF20,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 19. "FPIF19,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 18. "FPIF18,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 17. "FPIF17,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 16. "FPIF16,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 15. "FPIF15,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 14. "FPIF14,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 13. "FPIF13,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 12. "FPIF12,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 11. "FPIF11,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 10. "FPIF10,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 9. "FPIF9,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 8. "FPIF8,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 7. "FPIF7,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 6. "FPIF6,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 5. "FPIF5,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 4. "FPIF4,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 3. "FPIF3,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 2. "FPIF2,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 1. "FPIF1,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 0. "FPIF0,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
line.long 0x14 "ExTI_SECCFGR1,ExTI security configuration register"
bitfld.long 0x14 22. "SEC22,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 21. "SEC21,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 20. "SEC20,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 19. "SEC19,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 18. "SEC18,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 17. "SEC17,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 16. "SEC16,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 15. "SEC15,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 14. "SEC14,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 13. "SEC13,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 12. "SEC12,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 11. "SEC11,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 10. "SEC10,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 9. "SEC9,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 8. "SEC8,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 7. "SEC7,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 6. "SEC6,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 5. "SEC5,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 4. "SEC4,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 3. "SEC3,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 2. "SEC2,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 1. "SEC1,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 0. "SEC0,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
line.long 0x18 "ExTI_PRIVCFGR1,ExTI privilege configuration register"
bitfld.long 0x18 22. "PRIV22,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 21. "PRIV21,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 20. "PRIV20,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 19. "PRIV19,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 18. "PRIV18,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 17. "PRIV17,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 16. "PRIV16,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 15. "PRIV15,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 14. "PRIV14,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 13. "PRIV13,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 12. "PRIV12,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 11. "PRIV11,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 10. "PRIV10,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 9. "PRIV9,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 8. "PRIV8,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 7. "PRIV7,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 6. "PRIV6,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 5. "PRIV5,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 4. "PRIV4,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 3. "PRIV3,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 2. "PRIV2,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 1. "PRIV1,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 0. "PRIV0,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
group.long 0x60++0x13
line.long 0x0 "ExTI_ExTICR1,ExTI external interrupt selection register"
hexmask.long.byte 0x0 24.--31. 1. "ExTI3,ExTI3 GPIO port selection"
hexmask.long.byte 0x0 16.--23. 1. "ExTI2,ExTI2 GPIO port selection"
newline
hexmask.long.byte 0x0 8.--15. 1. "ExTI1,None"
hexmask.long.byte 0x0 0.--7. 1. "ExTI0,None"
line.long 0x4 "ExTI_ExTICR2,ExTI external interrupt selection register"
hexmask.long.byte 0x4 24.--31. 1. "ExTI7,ExTI7 GPIO port selection"
hexmask.long.byte 0x4 16.--23. 1. "ExTI6,ExTI6 GPIO port selection"
newline
hexmask.long.byte 0x4 8.--15. 1. "ExTI5,None"
hexmask.long.byte 0x4 0.--7. 1. "ExTI4,None"
line.long 0x8 "ExTI_ExTICR3,ExTI external interrupt selection register"
hexmask.long.byte 0x8 24.--31. 1. "ExTI11,ExTI11 GPIO port selection"
hexmask.long.byte 0x8 16.--23. 1. "ExTI10,ExTI10 GPIO port selection"
newline
hexmask.long.byte 0x8 8.--15. 1. "ExTI9,None"
hexmask.long.byte 0x8 0.--7. 1. "ExTI8,None"
line.long 0xC "ExTI_ExTICR4,ExTI external interrupt selection register"
hexmask.long.byte 0xC 24.--31. 1. "ExTI15,ExTI15 GPIO port selection"
hexmask.long.byte 0xC 16.--23. 1. "ExTI14,ExTI14 GPIO port selection"
newline
hexmask.long.byte 0xC 8.--15. 1. "ExTI13,None"
hexmask.long.byte 0xC 0.--7. 1. "ExTI12,None"
line.long 0x10 "ExTI_LOCKR,ExTI lock register"
bitfld.long 0x10 0. "LOCK,Global security and privilege configuration registers (ExTI_SECCFGR and ExTI_PRIVCFGR) lock" "0: Security and privilege configuration open can be..,1: Security and privilege configuration locked can.."
group.long 0x80++0x7
line.long 0x0 "ExTI_IMR1,ExTI CPU wake-up with interrupt mask register"
bitfld.long 0x0 22. "IM22,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 21. "IM21,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 20. "IM20,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 19. "IM19,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 18. "IM18,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 17. "IM17,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 16. "IM16,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 15. "IM15,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 14. "IM14,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 13. "IM13,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 12. "IM12,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 11. "IM11,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 10. "IM10,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 9. "IM9,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 8. "IM8,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 7. "IM7,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 6. "IM6,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 5. "IM5,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 4. "IM4,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 3. "IM3,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 2. "IM2,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 1. "IM1,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 0. "IM0,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
line.long 0x4 "ExTI_EMR1,ExTI CPU wake-up with event mask register"
bitfld.long 0x4 22. "EM22,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 21. "EM21,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 20. "EM20,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 19. "EM19,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 18. "EM18,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 17. "EM17,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 16. "EM16,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 15. "EM15,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 14. "EM14,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 13. "EM13,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 12. "EM12,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 11. "EM11,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 10. "EM10,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 9. "EM9,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 8. "EM8,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 7. "EM7,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 6. "EM6,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 5. "EM5,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 4. "EM4,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 3. "EM3,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 2. "EM2,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 1. "EM1,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 0. "EM0,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
tree.end
tree "SEC_ExTI"
base ad:0x50032000
group.long 0x0++0x1B
line.long 0x0 "ExTI_RTSR1,ExTI rising trigger selection register"
bitfld.long 0x0 22. "RT22,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 21. "RT21,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 20. "RT20,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 19. "RT19,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 18. "RT18,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 17. "RT17,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 16. "RT16,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 15. "RT15,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 14. "RT14,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 13. "RT13,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 12. "RT12,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 11. "RT11,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 10. "RT10,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 9. "RT9,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 8. "RT8,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 7. "RT7,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 6. "RT6,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 5. "RT5,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 4. "RT4,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 3. "RT3,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 2. "RT2,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
bitfld.long 0x0 1. "RT1,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
newline
bitfld.long 0x0 0. "RT0,Rising trigger event configuration bit of configurable event input i" "0: Rising trigger disabled (for event and..,1: Rising trigger enabled (for event and interrupt).."
line.long 0x4 "ExTI_FTSR1,ExTI falling trigger selection register"
bitfld.long 0x4 22. "FT22,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 21. "FT21,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 20. "FT20,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 19. "FT19,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 18. "FT18,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 17. "FT17,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 16. "FT16,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 15. "FT15,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 14. "FT14,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 13. "FT13,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 12. "FT12,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 11. "FT11,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 10. "FT10,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 9. "FT9,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 8. "FT8,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 7. "FT7,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 6. "FT6,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 5. "FT5,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 4. "FT4,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 3. "FT3,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 2. "FT2,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
bitfld.long 0x4 1. "FT1,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
newline
bitfld.long 0x4 0. "FT0,Falling trigger event configuration bit of configurable event input i" "0: Falling trigger disabled (for event and..,1: Falling trigger enabled (for event and.."
line.long 0x8 "ExTI_SWIER1,ExTI software interrupt event register"
bitfld.long 0x8 22. "SWI22,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 21. "SWI21,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 20. "SWI20,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 19. "SWI19,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 18. "SWI18,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 17. "SWI17,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 16. "SWI16,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 15. "SWI15,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 14. "SWI14,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 13. "SWI13,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 12. "SWI12,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 11. "SWI11,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 10. "SWI10,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 9. "SWI9,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 8. "SWI8,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 7. "SWI7,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 6. "SWI6,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 5. "SWI5,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 4. "SWI4,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 3. "SWI3,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 2. "SWI2,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
bitfld.long 0x8 1. "SWI1,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
newline
bitfld.long 0x8 0. "SWI0,Software interrupt on event i" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event i."
line.long 0xC "ExTI_RPR1,ExTI rising edge pending register"
bitfld.long 0xC 22. "RPIF22,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 21. "RPIF21,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 20. "RPIF20,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 19. "RPIF19,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 18. "RPIF18,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 17. "RPIF17,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 16. "RPIF16,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 15. "RPIF15,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 14. "RPIF14,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 13. "RPIF13,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 12. "RPIF12,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 11. "RPIF11,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 10. "RPIF10,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 9. "RPIF9,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 8. "RPIF8,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 7. "RPIF7,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 6. "RPIF6,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 5. "RPIF5,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 4. "RPIF4,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 3. "RPIF3,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 2. "RPIF2,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
bitfld.long 0xC 1. "RPIF1,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
newline
bitfld.long 0xC 0. "RPIF0,Configurable event input i rising edge pending bit" "0: No rising edge trigger request occurred.,1: Rising edge trigger request occurred."
line.long 0x10 "ExTI_FPR1,ExTI falling edge pending register"
bitfld.long 0x10 22. "FPIF22,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 21. "FPIF21,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 20. "FPIF20,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 19. "FPIF19,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 18. "FPIF18,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 17. "FPIF17,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 16. "FPIF16,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 15. "FPIF15,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 14. "FPIF14,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 13. "FPIF13,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 12. "FPIF12,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 11. "FPIF11,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 10. "FPIF10,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 9. "FPIF9,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 8. "FPIF8,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 7. "FPIF7,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 6. "FPIF6,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 5. "FPIF5,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 4. "FPIF4,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 3. "FPIF3,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 2. "FPIF2,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 1. "FPIF1,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 0. "FPIF0,configurable event inputs i falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
line.long 0x14 "ExTI_SECCFGR1,ExTI security configuration register"
bitfld.long 0x14 22. "SEC22,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 21. "SEC21,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 20. "SEC20,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 19. "SEC19,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 18. "SEC18,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 17. "SEC17,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 16. "SEC16,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 15. "SEC15,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 14. "SEC14,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 13. "SEC13,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 12. "SEC12,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 11. "SEC11,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 10. "SEC10,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 9. "SEC9,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 8. "SEC8,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 7. "SEC7,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 6. "SEC6,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 5. "SEC5,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 4. "SEC4,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 3. "SEC3,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 2. "SEC2,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
bitfld.long 0x14 1. "SEC1,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 0. "SEC0,Security enable on event input i" "0: Event security disabled (nonsecure),1: Event security enabled (secure)"
line.long 0x18 "ExTI_PRIVCFGR1,ExTI privilege configuration register"
bitfld.long 0x18 22. "PRIV22,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 21. "PRIV21,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 20. "PRIV20,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 19. "PRIV19,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 18. "PRIV18,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 17. "PRIV17,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 16. "PRIV16,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 15. "PRIV15,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 14. "PRIV14,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 13. "PRIV13,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 12. "PRIV12,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 11. "PRIV11,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 10. "PRIV10,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 9. "PRIV9,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 8. "PRIV8,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 7. "PRIV7,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 6. "PRIV6,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 5. "PRIV5,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 4. "PRIV4,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 3. "PRIV3,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 2. "PRIV2,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 1. "PRIV1,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 0. "PRIV0,Security enable on event input i" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
group.long 0x60++0x13
line.long 0x0 "ExTI_ExTICR1,ExTI external interrupt selection register"
hexmask.long.byte 0x0 24.--31. 1. "ExTI3,ExTI3 GPIO port selection"
hexmask.long.byte 0x0 16.--23. 1. "ExTI2,ExTI2 GPIO port selection"
newline
hexmask.long.byte 0x0 8.--15. 1. "ExTI1,None"
hexmask.long.byte 0x0 0.--7. 1. "ExTI0,None"
line.long 0x4 "ExTI_ExTICR2,ExTI external interrupt selection register"
hexmask.long.byte 0x4 24.--31. 1. "ExTI7,ExTI7 GPIO port selection"
hexmask.long.byte 0x4 16.--23. 1. "ExTI6,ExTI6 GPIO port selection"
newline
hexmask.long.byte 0x4 8.--15. 1. "ExTI5,None"
hexmask.long.byte 0x4 0.--7. 1. "ExTI4,None"
line.long 0x8 "ExTI_ExTICR3,ExTI external interrupt selection register"
hexmask.long.byte 0x8 24.--31. 1. "ExTI11,ExTI11 GPIO port selection"
hexmask.long.byte 0x8 16.--23. 1. "ExTI10,ExTI10 GPIO port selection"
newline
hexmask.long.byte 0x8 8.--15. 1. "ExTI9,None"
hexmask.long.byte 0x8 0.--7. 1. "ExTI8,None"
line.long 0xC "ExTI_ExTICR4,ExTI external interrupt selection register"
hexmask.long.byte 0xC 24.--31. 1. "ExTI15,ExTI15 GPIO port selection"
hexmask.long.byte 0xC 16.--23. 1. "ExTI14,ExTI14 GPIO port selection"
newline
hexmask.long.byte 0xC 8.--15. 1. "ExTI13,None"
hexmask.long.byte 0xC 0.--7. 1. "ExTI12,None"
line.long 0x10 "ExTI_LOCKR,ExTI lock register"
bitfld.long 0x10 0. "LOCK,Global security and privilege configuration registers (ExTI_SECCFGR and ExTI_PRIVCFGR) lock" "0: Security and privilege configuration open can be..,1: Security and privilege configuration locked can.."
group.long 0x80++0x7
line.long 0x0 "ExTI_IMR1,ExTI CPU wake-up with interrupt mask register"
bitfld.long 0x0 22. "IM22,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 21. "IM21,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 20. "IM20,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 19. "IM19,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 18. "IM18,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 17. "IM17,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 16. "IM16,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 15. "IM15,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 14. "IM14,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 13. "IM13,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 12. "IM12,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 11. "IM11,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 10. "IM10,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 9. "IM9,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 8. "IM8,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 7. "IM7,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 6. "IM6,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 5. "IM5,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 4. "IM4,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 3. "IM3,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 2. "IM2,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
bitfld.long 0x0 1. "IM1,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
newline
bitfld.long 0x0 0. "IM0,CPU wake-up with interrupt mask on event input i" "0: Wake-up with interrupt request from input event..,1: Wake-up with interrupt request from input event.."
line.long 0x4 "ExTI_EMR1,ExTI CPU wake-up with event mask register"
bitfld.long 0x4 22. "EM22,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 21. "EM21,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 20. "EM20,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 19. "EM19,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 18. "EM18,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 17. "EM17,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 16. "EM16,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 15. "EM15,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 14. "EM14,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 13. "EM13,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 12. "EM12,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 11. "EM11,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 10. "EM10,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 9. "EM9,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 8. "EM8,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 7. "EM7,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 6. "EM6,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 5. "EM5,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 4. "EM4,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 3. "EM3,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 2. "EM2,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
bitfld.long 0x4 1. "EM1,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
newline
bitfld.long 0x4 0. "EM0,CPU wake-up with event generation mask on event input i" "0: Wake-up with event generation from line i is..,1: Wake-up with event generation from line i is.."
tree.end
tree.end
tree "FDCAN (Controller Area Network)"
base ad:0x0
tree "FDCAN1"
base ad:0x4000A400
rgroup.long 0x0++0x7
line.long 0x0 "FDCAN_CREL,FDCAN core release register"
hexmask.long.byte 0x0 28.--31. 1. "REL,3"
hexmask.long.byte 0x0 24.--27. 1. "STEP,2"
newline
hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,1"
hexmask.long.byte 0x0 16.--19. 1. "YEAR,4"
newline
hexmask.long.byte 0x0 8.--15. 1. "MON,12"
hexmask.long.byte 0x0 0.--7. 1. "DAY,18"
line.long 0x4 "FDCAN_ENDN,FDCAN endian register"
hexmask.long 0x4 0.--31. 1. "ETV,Endianness test value"
group.long 0xC++0x23
line.long 0x0 "FDCAN_DBTP,FDCAN data bit timing and prescaler register"
bitfld.long 0x0 23. "TDC,Transceiver delay compensation" "0: Transceiver delay compensation disabled,1: Transceiver delay compensation enabled"
hexmask.long.byte 0x0 16.--20. 1. "DBRP,Data bit rate prescaler"
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hexmask.long.byte 0x0 8.--12. 1. "DTSEG1,Data time segment before sample point"
hexmask.long.byte 0x0 4.--7. 1. "DTSEG2,Data time segment after sample point"
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hexmask.long.byte 0x0 0.--3. 1. "DSJW,Synchronization jump width"
line.long 0x4 "FDCAN_TEST,FDCAN test register"
rbitfld.long 0x4 7. "Rx,Receive pin" "0: The CAN bus is dominant (FDCANx_Rx=0),1: The CAN bus is recessive (FDCANx_Rx=1)"
bitfld.long 0x4 5.--6. "Tx,Control of transmit pin" "0: Reset value FDCANx_Tx Tx is controlled by the..,1: Sample point can be monitored at pin FDCANx_Tx,2: Dominant (0) level at pin FDCANx_Tx,3: Recessive (1) at pin FDCANx_Tx"
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bitfld.long 0x4 4. "LBCK,Loop-back mode" "0: Reset value loop-back mode is disabled,1: Loop-back mode is enabled (see Power-down (Sleep.."
line.long 0x8 "FDCAN_RWD,FDCAN RAM watchdog register"
hexmask.long.byte 0x8 8.--15. 1. "WDV,Watchdog value"
hexmask.long.byte 0x8 0.--7. 1. "WDC,Watchdog configuration"
line.long 0xC "FDCAN_CCCR,FDCAN CC control register"
bitfld.long 0xC 15. "NISO,Non-ISO operation" "0: CAN FD frame format according to ISO11898-1,1: CAN FD frame format according to Bosch CAN FD.."
bitfld.long 0xC 14. "TxP,Transmit pause enable" "0: Disabled,1: Enabled"
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bitfld.long 0xC 13. "EFBI,Edge filtering during bus integration" "0: Edge filtering disabled,1: Two consecutive dominant tless thansub>qless.."
bitfld.long 0xC 12. "PxHD,Protocol exception handling disable" "0: Protocol exception handling enabled,1: Protocol exception handling disabled"
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bitfld.long 0xC 9. "BRSE,FDCAN bit rate switching" "0: Bit rate switching for transmissions disabled,1: Bit rate switching for transmissions enabled"
bitfld.long 0xC 8. "FDOE,FD operation enable" "0: FD operation disabled,1: FD operation enabled"
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bitfld.long 0xC 7. "TEST,Test mode enable" "0: Normal operation FDCAN_TEST holds reset values,1: Test mode write access to FDCAN_TEST enabled"
bitfld.long 0xC 6. "DAR,Disable automatic retransmission" "0: Automatic retransmission of messages not..,1: Automatic retransmission disabled"
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bitfld.long 0xC 5. "MON,Bus monitoring mode" "0: Bus monitoring mode disabled,1: Bus monitoring mode enabled"
bitfld.long 0xC 4. "CSR,Clock stop request" "0: No clock stop requested,1: Clock stop requested."
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rbitfld.long 0xC 3. "CSA,Clock stop acknowledge" "0: No clock stop acknowledged,1: FDCAN can be set in power-down by stopping APB.."
bitfld.long 0xC 2. "ASM,ASM restricted operation mode" "0: Normal CAN operation,1: Restricted operation mode active"
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bitfld.long 0xC 1. "CCE,Configuration change enable" "0: The CPU has no write access to the protected..,1: The CPU has write access to the protected.."
bitfld.long 0xC 0. "INIT,Initialization" "0: Normal operation,1: Initialization started"
line.long 0x10 "FDCAN_NBTP,FDCAN nominal bit timing and prescaler register"
hexmask.long.byte 0x10 25.--31. 1. "NSJW,Nominal (re)synchronization jump width"
hexmask.long.word 0x10 16.--24. 1. "NBRP,Bit rate prescaler"
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hexmask.long.byte 0x10 8.--15. 1. "NTSEG1,Nominal time segment before sample point"
hexmask.long.byte 0x10 0.--6. 1. "NTSEG2,Nominal time segment after sample point"
line.long 0x14 "FDCAN_TSCC,FDCAN timestamp counter configuration register"
hexmask.long.byte 0x14 16.--19. 1. "TCP,Timestamp counter prescaler"
bitfld.long 0x14 0.--1. "TSS,Timestamp select" "0: Timestamp counter value always 0x0000,1: Timestamp counter value incremented according to..,2: External timestamp counter from TIM3 value..,3: Same as 00."
line.long 0x18 "FDCAN_TSCV,FDCAN timestamp counter value register"
hexmask.long.word 0x18 0.--15. 1. "TSC,Timestamp counter"
line.long 0x1C "FDCAN_TOCC,FDCAN timeout counter configuration register"
hexmask.long.word 0x1C 16.--31. 1. "TOP,Timeout period"
bitfld.long 0x1C 1.--2. "TOS,Timeout select" "0: Continuous operation,1: Timeout controlled by Tx event FIFO,2: Timeout controlled by Rx FIFO 0,3: Timeout controlled by Rx FIFO 1"
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bitfld.long 0x1C 0. "ETOC,Timeout counter enable" "0: Timeout counter disabled,1: Timeout counter enabled"
line.long 0x20 "FDCAN_TOCV,FDCAN timeout counter value register"
hexmask.long.word 0x20 0.--15. 1. "TOC,Timeout counter"
group.long 0x40++0xB
line.long 0x0 "FDCAN_ECR,FDCAN error counter register"
hexmask.long.byte 0x0 16.--23. 1. "CEL,CAN error logging"
rbitfld.long 0x0 15. "RP,Receive error passive" "0: The receive error counter is below the error..,1: The receive error counter has reached the error.."
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hexmask.long.byte 0x0 8.--14. 1. "REC,Receive error counter"
hexmask.long.byte 0x0 0.--7. 1. "TEC,Transmit error counter"
line.long 0x4 "FDCAN_PSR,FDCAN protocol status register"
hexmask.long.byte 0x4 16.--22. 1. "TDCV,Transmitter delay compensation value"
bitfld.long 0x4 14. "PxE,Protocol exception event" "0: No protocol exception event occurred since last..,1: Protocol exception event occurred"
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bitfld.long 0x4 13. "REDL,Received FDCAN message" "0: Since this bit was cleared by the CPU no FDCAN..,1: Message in FDCAN format with EDL flag set has.."
bitfld.long 0x4 12. "RBRS,BRS flag of last received FDCAN message" "0: Last received FDCAN message did not have its BRS..,1: Last received FDCAN message had its BRS flag set."
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bitfld.long 0x4 11. "RESI,ESI flag of last received FDCAN message" "0: Last received FDCAN message did not have its ESI..,1: Last received FDCAN message had its ESI flag set."
bitfld.long 0x4 8.--10. "DLEC,Data last error code" "0,1,2,3,4,5,6,7"
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rbitfld.long 0x4 7. "BO,Bus-off status" "0: The FDCAN is not in bus-off state.,1: The FDCAN is in bus-off state."
rbitfld.long 0x4 6. "EW,Warning status" "0: Both error counters are below the error-warning..,1: At least one of error counter has reached the.."
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rbitfld.long 0x4 5. "EP,Error passive" "0: The FDCAN is in the error-active state.,1: The FDCAN is in the error-passive state."
rbitfld.long 0x4 3.--4. "ACT,Activity" "0: Synchronizing: node is synchronizing on CAN..,1: Idle: node is neither receiver nor transmitter.,2: Receiver: node is operating as receiver.,3: Transmitter: node is operating as transmitter."
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bitfld.long 0x4 0.--2. "LEC,Last error code" "0: No error occurred since LEC[2:0] has been..,1: Stuff error.,2: Form error.,3: Ack error.,4: Bit1 error.,5: Bit0 error.,6: CRC error.,7: No change."
line.long 0x8 "FDCAN_TDCR,FDCAN transmitter delay compensation register"
hexmask.long.byte 0x8 8.--14. 1. "TDCO,Transmitter delay compensation offset"
hexmask.long.byte 0x8 0.--6. 1. "TDCF,Transmitter delay compensation filter window length"
group.long 0x50++0xF
line.long 0x0 "FDCAN_IR,FDCAN interrupt register"
bitfld.long 0x0 23. "ARA,Access to reserved address" "0: No access to reserved address occurred,1: Access to reserved address occurred"
bitfld.long 0x0 22. "PED,Protocol error in data phase (data bit time is used)" "0: No protocol error in data phase,1: Protocol error in data phase detected (DLEC[2:0].."
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bitfld.long 0x0 21. "PEA,Protocol error in arbitration phase (nominal bit time is used)" "0: No protocol error in arbitration phase,1: Protocol error in arbitration phase detected.."
bitfld.long 0x0 20. "WDI,Watchdog interrupt" "0: No message RAM watchdog event occurred,1: Message RAM watchdog event due to missing READY"
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bitfld.long 0x0 19. "BO,Bus-off status" "0: Bus-off status unchanged,1: Bus-off status changed"
bitfld.long 0x0 18. "EW,Warning status" "0: Error-warning status unchanged,1: Error-warning status changed"
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bitfld.long 0x0 17. "EP,Error passive" "0: Error-passive status unchanged,1: Error-passive status changed"
bitfld.long 0x0 16. "ELO,Error logging overflow" "0: CAN error logging counter did not overflow.,1: Overflow of CAN error logging counter occurred."
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bitfld.long 0x0 15. "TOO,Timeout occurred" "0: No timeout,1: Timeout reached"
bitfld.long 0x0 14. "MRAF,Message RAM access failure" "0: No message RAM access failure occurred,1: Message RAM access failure occurred"
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bitfld.long 0x0 13. "TSW,Timestamp wraparound" "0: No timestamp counter wrap-around,1: Timestamp counter wrapped around"
bitfld.long 0x0 12. "TEFL,Tx event FIFO element lost" "0: No Tx event FIFO element lost,1: Tx event FIFO element lost"
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bitfld.long 0x0 11. "TEFF,Tx event FIFO full" "0: Tx event FIFO Not full,1: Tx event FIFO full"
bitfld.long 0x0 10. "TEFN,Tx event FIFO new entry" "0: Tx event FIFO unchanged,1: Tx handler wrote Tx event FIFO element."
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bitfld.long 0x0 9. "TFE,Tx FIFO empty" "0: Tx FIFO non-empty,1: Tx FIFO empty"
bitfld.long 0x0 8. "TCF,Transmission cancellation finished" "0: No transmission cancellation finished,1: Transmission cancellation finished"
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bitfld.long 0x0 7. "TC,Transmission completed" "0: No transmission completed,1: Transmission completed"
bitfld.long 0x0 6. "HPM,High-priority message" "0: No high-priority message received,1: High-priority message received"
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bitfld.long 0x0 5. "RF1L,Rx FIFO 1 message lost" "0: No Rx FIFO 1 message lost,1: Rx FIFO 1 message lost"
bitfld.long 0x0 4. "RF1F,Rx FIFO 1 full" "0: Rx FIFO 1 not full,1: Rx FIFO 1 full"
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bitfld.long 0x0 3. "RF1N,Rx FIFO 1 new message" "0: No new message written to Rx FIFO 1,1: New message written to Rx FIFO 1"
bitfld.long 0x0 2. "RF0L,Rx FIFO 0 message lost" "0: No Rx FIFO 0 message lost,1: Rx FIFO 0 message lost"
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bitfld.long 0x0 1. "RF0F,Rx FIFO 0 full" "0: Rx FIFO 0 not full,1: Rx FIFO 0 full"
bitfld.long 0x0 0. "RF0N,Rx FIFO 0 new message" "0: No new message written to Rx FIFO 0,1: New message written to Rx FIFO 0"
line.long 0x4 "FDCAN_IE,FDCAN interrupt enable register"
bitfld.long 0x4 23. "ARAE,Access to reserved address enable" "0,1"
bitfld.long 0x4 22. "PEDE,Protocol error in data phase enable" "0,1"
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bitfld.long 0x4 21. "PEAE,Protocol error in arbitration phase enable" "0,1"
bitfld.long 0x4 20. "WDIE,Watchdog interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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bitfld.long 0x4 19. "BOE,Bus-off status" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 18. "EWE,Warning status interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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bitfld.long 0x4 17. "EPE,Error passive interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 16. "ELOE,Error logging overflow interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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bitfld.long 0x4 15. "TOOE,Timeout occurred interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 14. "MRAFE,Message RAM access failure interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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bitfld.long 0x4 13. "TSWE,Timestamp wraparound interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 12. "TEFLE,Tx event FIFO element lost interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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bitfld.long 0x4 11. "TEFFE,Tx event FIFO full interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 10. "TEFNE,Tx event FIFO new entry interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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bitfld.long 0x4 9. "TFEE,Tx FIFO empty interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 8. "TCFE,Transmission cancellation finished interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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bitfld.long 0x4 7. "TCE,Transmission completed interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 6. "HPME,High-priority message interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x4 5. "RF1LE,Rx FIFO 1 message lost interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 4. "RF1FE,Rx FIFO 1 full interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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bitfld.long 0x4 3. "RF1NE,Rx FIFO 1 new message interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 2. "RF0LE,Rx FIFO 0 message lost interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
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bitfld.long 0x4 1. "RF0FE,Rx FIFO 0 full interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 0. "RF0NE,Rx FIFO 0 new message interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
line.long 0x8 "FDCAN_ILS,FDCAN interrupt line select register"
bitfld.long 0x8 6. "PERR,Protocol error grouping the following interruption" "0,1"
bitfld.long 0x8 5. "BERR,Bit and line error grouping the following interruption" "0,1"
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bitfld.long 0x8 4. "MISC,Interrupt regrouping the following interruption" "0,1"
bitfld.long 0x8 3. "TFERR,Tx FIFO ERROR grouping the following interruption" "0,1"
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bitfld.long 0x8 2. "SMSG,Status message bit grouping the following interruption" "0,1"
bitfld.long 0x8 1. "RxFIFO1,Rx FIFO bit grouping the following interruption" "0,1"
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bitfld.long 0x8 0. "RxFIFO0,Rx FIFO bit grouping the following interruption" "0,1"
line.long 0xC "FDCAN_ILE,FDCAN interrupt line enable register"
bitfld.long 0xC 1. "EINT1,Enable interrupt line 1" "0: Interrupt line fdcan_intr0_it disabled,1: Interrupt line fdcan_intr0_it enabled"
bitfld.long 0xC 0. "EINT0,Enable interrupt line 0" "0: Interrupt line fdcan_intr1_it disabled,1: Interrupt line fdcan_intr1_it enabled"
group.long 0x80++0x7
line.long 0x0 "FDCAN_RxGFC,FDCAN global filter configuration register"
hexmask.long.byte 0x0 24.--27. 1. "LSE,Number of extended filter elements in the list"
hexmask.long.byte 0x0 16.--20. 1. "LSS,Number of standard filter elements in the list"
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bitfld.long 0x0 9. "F0OM,FIFO 0 operation mode (overwrite or blocking)" "0,1"
bitfld.long 0x0 8. "F1OM,FIFO 1 operation mode (overwrite or blocking)" "0,1"
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bitfld.long 0x0 4.--5. "ANFS,Accept Non-matching frames standard" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,2: Reject,3: Reject"
bitfld.long 0x0 2.--3. "ANFE,Accept non-matching frames extended" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,2: Reject,3: Reject"
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bitfld.long 0x0 1. "RRFS,Reject remote frames standard" "0: Filter remote frames with 11-bit standard IDs,1: Reject all remote frames with 11-bit standard IDs"
bitfld.long 0x0 0. "RRFE,Reject remote frames extended" "0: Filter remote frames with 29-bit standard IDs,1: Reject all remote frames with 29-bit standard IDs"
line.long 0x4 "FDCAN_xIDAM,FDCAN extended ID and mask register"
hexmask.long 0x4 0.--28. 1. "EIDM,Extended ID mask"
rgroup.long 0x88++0x3
line.long 0x0 "FDCAN_HPMS,FDCAN high-priority message status register"
bitfld.long 0x0 15. "FLST,Filter list" "0: Standard filter list,1: Extended filter list"
hexmask.long.byte 0x0 8.--12. 1. "FIDx,Filter index"
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bitfld.long 0x0 6.--7. "MSI,Message storage indicator" "0: No FIFO selected,1: FIFO overrun,2: Message stored in FIFO 0,3: Message stored in FIFO 1"
bitfld.long 0x0 0.--2. "BIDx,Buffer index" "0,1,2,3,4,5,6,7"
rgroup.long 0x90++0x3
line.long 0x0 "FDCAN_RxF0S,FDCAN Rx FIFO 0 status register"
bitfld.long 0x0 25. "RF0L,Rx FIFO 0 message lost" "0: No Rx FIFO 0 message lost,1: Rx FIFO 0 message lost also set after write.."
bitfld.long 0x0 24. "F0F,Rx FIFO 0 full" "0: Rx FIFO 0 not full,1: Rx FIFO 0 full"
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bitfld.long 0x0 16.--17. "F0PI,Rx FIFO 0 put index" "0,1,2,3"
bitfld.long 0x0 8.--9. "F0GI,Rx FIFO 0 get index" "0,1,2,3"
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hexmask.long.byte 0x0 0.--3. 1. "F0FL,Rx FIFO 0 fill level"
group.long 0x94++0x3
line.long 0x0 "FDCAN_RxF0A,CAN Rx FIFO 0 acknowledge register"
bitfld.long 0x0 0.--2. "F0AI,Rx FIFO 0 acknowledge index" "0,1,2,3,4,5,6,7"
rgroup.long 0x98++0x3
line.long 0x0 "FDCAN_RxF1S,FDCAN Rx FIFO 1 status register"
bitfld.long 0x0 25. "RF1L,Rx FIFO 1 message lost" "0: No Rx FIFO 1 message lost,1: Rx FIFO 1 message lost also set after write.."
bitfld.long 0x0 24. "F1F,Rx FIFO 1 full" "0: Rx FIFO 1 not full,1: Rx FIFO 1 full"
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bitfld.long 0x0 16.--17. "F1PI,Rx FIFO 1 put index" "0,1,2,3"
bitfld.long 0x0 8.--9. "F1GI,Rx FIFO 1 get index" "0,1,2,3"
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hexmask.long.byte 0x0 0.--3. 1. "F1FL,Rx FIFO 1 fill level"
group.long 0x9C++0x3
line.long 0x0 "FDCAN_RxF1A,FDCAN Rx FIFO 1 acknowledge register"
bitfld.long 0x0 0.--2. "F1AI,Rx FIFO 1 acknowledge index" "0,1,2,3,4,5,6,7"
group.long 0xC0++0x3
line.long 0x0 "FDCAN_TxBC,FDCAN Tx buffer configuration register"
bitfld.long 0x0 24. "TFQM,Tx FIFO/queue mode" "0: Tx FIFO operation,1: Tx queue operation."
rgroup.long 0xC4++0x7
line.long 0x0 "FDCAN_TxFQS,FDCAN Tx FIFO/queue status register"
bitfld.long 0x0 21. "TFQF,Tx FIFO/queue full" "0: Tx FIFO/queue not full,1: Tx FIFO/queue full"
bitfld.long 0x0 16.--17. "TFQPI,Tx FIFO/queue put index" "0,1,2,3"
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bitfld.long 0x0 8.--9. "TFGI,Tx FIFO get index" "0,1,2,3"
bitfld.long 0x0 0.--2. "TFFL,Tx FIFO free level" "0,1,2,3,4,5,6,7"
line.long 0x4 "FDCAN_TxBRP,FDCAN Tx buffer request pending register"
bitfld.long 0x4 0.--2. "TRP,Transmission request pending" "0: No transmission request pending,1: Transmission request pending,?,?,?,?,?,?"
group.long 0xCC++0x7
line.long 0x0 "FDCAN_TxBAR,FDCAN Tx buffer add request register"
bitfld.long 0x0 0.--2. "AR,Add request" "0: No transmission request added,1: Transmission requested added.,?,?,?,?,?,?"
line.long 0x4 "FDCAN_TxBCR,FDCAN Tx buffer cancellation request register"
bitfld.long 0x4 0.--2. "CR,Cancellation request" "0: No cancellation pending,1: Cancellation pending,?,?,?,?,?,?"
rgroup.long 0xD4++0x7
line.long 0x0 "FDCAN_TxBTO,FDCAN Tx buffer transmission occurred register"
bitfld.long 0x0 0.--2. "TO,Transmission occurred." "0: No transmission occurred,1: Transmission occurred,?,?,?,?,?,?"
line.long 0x4 "FDCAN_TxBCF,FDCAN Tx buffer cancellation finished register"
bitfld.long 0x4 0.--2. "CF,Cancellation finished" "0: No transmit buffer cancellation,1: Transmit buffer cancellation finished,?,?,?,?,?,?"
group.long 0xDC++0x7
line.long 0x0 "FDCAN_TxBTIE,FDCAN Tx buffer transmission interrupt enable register"
bitfld.long 0x0 0.--2. "TIE,Transmission interrupt enable" "0: Transmission interrupt disabled,1: Transmission interrupt enable,?,?,?,?,?,?"
line.long 0x4 "FDCAN_TxBCIE,FDCAN Tx buffer cancellation finished interrupt enable register"
bitfld.long 0x4 0.--2. "CFIE,Cancellation finished interrupt enable." "0: Cancellation finished interrupt disabled,1: Cancellation finished interrupt enabled,?,?,?,?,?,?"
rgroup.long 0xE4++0x3
line.long 0x0 "FDCAN_TxEFS,FDCAN Tx event FIFO status register"
bitfld.long 0x0 25. "TEFL,Tx event FIFO element lost" "0,1"
bitfld.long 0x0 24. "EFF,Event FIFO full" "0: Tx event FIFO not full,1: Tx event FIFO full"
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bitfld.long 0x0 16.--17. "EFPI,Event FIFO put index" "0,1,2,3"
bitfld.long 0x0 8.--9. "EFGI,Event FIFO get index" "0,1,2,3"
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bitfld.long 0x0 0.--2. "EFFL,Event FIFO fill level" "0,1,2,3,4,5,6,7"
group.long 0xE8++0x3
line.long 0x0 "FDCAN_TxEFA,FDCAN Tx event FIFO acknowledge register"
bitfld.long 0x0 0.--1. "EFAI,Event FIFO acknowledge index" "0,1,2,3"
group.long 0x100++0x3
line.long 0x0 "FDCAN_CKDIV,FDCAN CFG clock divider register"
hexmask.long.byte 0x0 0.--3. 1. "PDIV,input clock divider"
tree.end
tree "SEC_FDCAN1"
base ad:0x5000A400
rgroup.long 0x0++0x7
line.long 0x0 "FDCAN_CREL,FDCAN core release register"
hexmask.long.byte 0x0 28.--31. 1. "REL,3"
hexmask.long.byte 0x0 24.--27. 1. "STEP,2"
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hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,1"
hexmask.long.byte 0x0 16.--19. 1. "YEAR,4"
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hexmask.long.byte 0x0 8.--15. 1. "MON,12"
hexmask.long.byte 0x0 0.--7. 1. "DAY,18"
line.long 0x4 "FDCAN_ENDN,FDCAN endian register"
hexmask.long 0x4 0.--31. 1. "ETV,Endianness test value"
group.long 0xC++0x23
line.long 0x0 "FDCAN_DBTP,FDCAN data bit timing and prescaler register"
bitfld.long 0x0 23. "TDC,Transceiver delay compensation" "0: Transceiver delay compensation disabled,1: Transceiver delay compensation enabled"
hexmask.long.byte 0x0 16.--20. 1. "DBRP,Data bit rate prescaler"
newline
hexmask.long.byte 0x0 8.--12. 1. "DTSEG1,Data time segment before sample point"
hexmask.long.byte 0x0 4.--7. 1. "DTSEG2,Data time segment after sample point"
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hexmask.long.byte 0x0 0.--3. 1. "DSJW,Synchronization jump width"
line.long 0x4 "FDCAN_TEST,FDCAN test register"
rbitfld.long 0x4 7. "Rx,Receive pin" "0: The CAN bus is dominant (FDCANx_Rx=0),1: The CAN bus is recessive (FDCANx_Rx=1)"
bitfld.long 0x4 5.--6. "Tx,Control of transmit pin" "0: Reset value FDCANx_Tx Tx is controlled by the..,1: Sample point can be monitored at pin FDCANx_Tx,2: Dominant (0) level at pin FDCANx_Tx,3: Recessive (1) at pin FDCANx_Tx"
newline
bitfld.long 0x4 4. "LBCK,Loop-back mode" "0: Reset value loop-back mode is disabled,1: Loop-back mode is enabled (see Power-down (Sleep.."
line.long 0x8 "FDCAN_RWD,FDCAN RAM watchdog register"
hexmask.long.byte 0x8 8.--15. 1. "WDV,Watchdog value"
hexmask.long.byte 0x8 0.--7. 1. "WDC,Watchdog configuration"
line.long 0xC "FDCAN_CCCR,FDCAN CC control register"
bitfld.long 0xC 15. "NISO,Non-ISO operation" "0: CAN FD frame format according to ISO11898-1,1: CAN FD frame format according to Bosch CAN FD.."
bitfld.long 0xC 14. "TxP,Transmit pause enable" "0: Disabled,1: Enabled"
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bitfld.long 0xC 13. "EFBI,Edge filtering during bus integration" "0: Edge filtering disabled,1: Two consecutive dominant tless thansub>qless.."
bitfld.long 0xC 12. "PxHD,Protocol exception handling disable" "0: Protocol exception handling enabled,1: Protocol exception handling disabled"
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bitfld.long 0xC 9. "BRSE,FDCAN bit rate switching" "0: Bit rate switching for transmissions disabled,1: Bit rate switching for transmissions enabled"
bitfld.long 0xC 8. "FDOE,FD operation enable" "0: FD operation disabled,1: FD operation enabled"
newline
bitfld.long 0xC 7. "TEST,Test mode enable" "0: Normal operation FDCAN_TEST holds reset values,1: Test mode write access to FDCAN_TEST enabled"
bitfld.long 0xC 6. "DAR,Disable automatic retransmission" "0: Automatic retransmission of messages not..,1: Automatic retransmission disabled"
newline
bitfld.long 0xC 5. "MON,Bus monitoring mode" "0: Bus monitoring mode disabled,1: Bus monitoring mode enabled"
bitfld.long 0xC 4. "CSR,Clock stop request" "0: No clock stop requested,1: Clock stop requested."
newline
rbitfld.long 0xC 3. "CSA,Clock stop acknowledge" "0: No clock stop acknowledged,1: FDCAN can be set in power-down by stopping APB.."
bitfld.long 0xC 2. "ASM,ASM restricted operation mode" "0: Normal CAN operation,1: Restricted operation mode active"
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bitfld.long 0xC 1. "CCE,Configuration change enable" "0: The CPU has no write access to the protected..,1: The CPU has write access to the protected.."
bitfld.long 0xC 0. "INIT,Initialization" "0: Normal operation,1: Initialization started"
line.long 0x10 "FDCAN_NBTP,FDCAN nominal bit timing and prescaler register"
hexmask.long.byte 0x10 25.--31. 1. "NSJW,Nominal (re)synchronization jump width"
hexmask.long.word 0x10 16.--24. 1. "NBRP,Bit rate prescaler"
newline
hexmask.long.byte 0x10 8.--15. 1. "NTSEG1,Nominal time segment before sample point"
hexmask.long.byte 0x10 0.--6. 1. "NTSEG2,Nominal time segment after sample point"
line.long 0x14 "FDCAN_TSCC,FDCAN timestamp counter configuration register"
hexmask.long.byte 0x14 16.--19. 1. "TCP,Timestamp counter prescaler"
bitfld.long 0x14 0.--1. "TSS,Timestamp select" "0: Timestamp counter value always 0x0000,1: Timestamp counter value incremented according to..,2: External timestamp counter from TIM3 value..,3: Same as 00."
line.long 0x18 "FDCAN_TSCV,FDCAN timestamp counter value register"
hexmask.long.word 0x18 0.--15. 1. "TSC,Timestamp counter"
line.long 0x1C "FDCAN_TOCC,FDCAN timeout counter configuration register"
hexmask.long.word 0x1C 16.--31. 1. "TOP,Timeout period"
bitfld.long 0x1C 1.--2. "TOS,Timeout select" "0: Continuous operation,1: Timeout controlled by Tx event FIFO,2: Timeout controlled by Rx FIFO 0,3: Timeout controlled by Rx FIFO 1"
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bitfld.long 0x1C 0. "ETOC,Timeout counter enable" "0: Timeout counter disabled,1: Timeout counter enabled"
line.long 0x20 "FDCAN_TOCV,FDCAN timeout counter value register"
hexmask.long.word 0x20 0.--15. 1. "TOC,Timeout counter"
group.long 0x40++0xB
line.long 0x0 "FDCAN_ECR,FDCAN error counter register"
hexmask.long.byte 0x0 16.--23. 1. "CEL,CAN error logging"
rbitfld.long 0x0 15. "RP,Receive error passive" "0: The receive error counter is below the error..,1: The receive error counter has reached the error.."
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hexmask.long.byte 0x0 8.--14. 1. "REC,Receive error counter"
hexmask.long.byte 0x0 0.--7. 1. "TEC,Transmit error counter"
line.long 0x4 "FDCAN_PSR,FDCAN protocol status register"
hexmask.long.byte 0x4 16.--22. 1. "TDCV,Transmitter delay compensation value"
bitfld.long 0x4 14. "PxE,Protocol exception event" "0: No protocol exception event occurred since last..,1: Protocol exception event occurred"
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bitfld.long 0x4 13. "REDL,Received FDCAN message" "0: Since this bit was cleared by the CPU no FDCAN..,1: Message in FDCAN format with EDL flag set has.."
bitfld.long 0x4 12. "RBRS,BRS flag of last received FDCAN message" "0: Last received FDCAN message did not have its BRS..,1: Last received FDCAN message had its BRS flag set."
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bitfld.long 0x4 11. "RESI,ESI flag of last received FDCAN message" "0: Last received FDCAN message did not have its ESI..,1: Last received FDCAN message had its ESI flag set."
bitfld.long 0x4 8.--10. "DLEC,Data last error code" "0,1,2,3,4,5,6,7"
newline
rbitfld.long 0x4 7. "BO,Bus-off status" "0: The FDCAN is not in bus-off state.,1: The FDCAN is in bus-off state."
rbitfld.long 0x4 6. "EW,Warning status" "0: Both error counters are below the error-warning..,1: At least one of error counter has reached the.."
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rbitfld.long 0x4 5. "EP,Error passive" "0: The FDCAN is in the error-active state.,1: The FDCAN is in the error-passive state."
rbitfld.long 0x4 3.--4. "ACT,Activity" "0: Synchronizing: node is synchronizing on CAN..,1: Idle: node is neither receiver nor transmitter.,2: Receiver: node is operating as receiver.,3: Transmitter: node is operating as transmitter."
newline
bitfld.long 0x4 0.--2. "LEC,Last error code" "0: No error occurred since LEC[2:0] has been..,1: Stuff error.,2: Form error.,3: Ack error.,4: Bit1 error.,5: Bit0 error.,6: CRC error.,7: No change."
line.long 0x8 "FDCAN_TDCR,FDCAN transmitter delay compensation register"
hexmask.long.byte 0x8 8.--14. 1. "TDCO,Transmitter delay compensation offset"
hexmask.long.byte 0x8 0.--6. 1. "TDCF,Transmitter delay compensation filter window length"
group.long 0x50++0xF
line.long 0x0 "FDCAN_IR,FDCAN interrupt register"
bitfld.long 0x0 23. "ARA,Access to reserved address" "0: No access to reserved address occurred,1: Access to reserved address occurred"
bitfld.long 0x0 22. "PED,Protocol error in data phase (data bit time is used)" "0: No protocol error in data phase,1: Protocol error in data phase detected (DLEC[2:0].."
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bitfld.long 0x0 21. "PEA,Protocol error in arbitration phase (nominal bit time is used)" "0: No protocol error in arbitration phase,1: Protocol error in arbitration phase detected.."
bitfld.long 0x0 20. "WDI,Watchdog interrupt" "0: No message RAM watchdog event occurred,1: Message RAM watchdog event due to missing READY"
newline
bitfld.long 0x0 19. "BO,Bus-off status" "0: Bus-off status unchanged,1: Bus-off status changed"
bitfld.long 0x0 18. "EW,Warning status" "0: Error-warning status unchanged,1: Error-warning status changed"
newline
bitfld.long 0x0 17. "EP,Error passive" "0: Error-passive status unchanged,1: Error-passive status changed"
bitfld.long 0x0 16. "ELO,Error logging overflow" "0: CAN error logging counter did not overflow.,1: Overflow of CAN error logging counter occurred."
newline
bitfld.long 0x0 15. "TOO,Timeout occurred" "0: No timeout,1: Timeout reached"
bitfld.long 0x0 14. "MRAF,Message RAM access failure" "0: No message RAM access failure occurred,1: Message RAM access failure occurred"
newline
bitfld.long 0x0 13. "TSW,Timestamp wraparound" "0: No timestamp counter wrap-around,1: Timestamp counter wrapped around"
bitfld.long 0x0 12. "TEFL,Tx event FIFO element lost" "0: No Tx event FIFO element lost,1: Tx event FIFO element lost"
newline
bitfld.long 0x0 11. "TEFF,Tx event FIFO full" "0: Tx event FIFO Not full,1: Tx event FIFO full"
bitfld.long 0x0 10. "TEFN,Tx event FIFO new entry" "0: Tx event FIFO unchanged,1: Tx handler wrote Tx event FIFO element."
newline
bitfld.long 0x0 9. "TFE,Tx FIFO empty" "0: Tx FIFO non-empty,1: Tx FIFO empty"
bitfld.long 0x0 8. "TCF,Transmission cancellation finished" "0: No transmission cancellation finished,1: Transmission cancellation finished"
newline
bitfld.long 0x0 7. "TC,Transmission completed" "0: No transmission completed,1: Transmission completed"
bitfld.long 0x0 6. "HPM,High-priority message" "0: No high-priority message received,1: High-priority message received"
newline
bitfld.long 0x0 5. "RF1L,Rx FIFO 1 message lost" "0: No Rx FIFO 1 message lost,1: Rx FIFO 1 message lost"
bitfld.long 0x0 4. "RF1F,Rx FIFO 1 full" "0: Rx FIFO 1 not full,1: Rx FIFO 1 full"
newline
bitfld.long 0x0 3. "RF1N,Rx FIFO 1 new message" "0: No new message written to Rx FIFO 1,1: New message written to Rx FIFO 1"
bitfld.long 0x0 2. "RF0L,Rx FIFO 0 message lost" "0: No Rx FIFO 0 message lost,1: Rx FIFO 0 message lost"
newline
bitfld.long 0x0 1. "RF0F,Rx FIFO 0 full" "0: Rx FIFO 0 not full,1: Rx FIFO 0 full"
bitfld.long 0x0 0. "RF0N,Rx FIFO 0 new message" "0: No new message written to Rx FIFO 0,1: New message written to Rx FIFO 0"
line.long 0x4 "FDCAN_IE,FDCAN interrupt enable register"
bitfld.long 0x4 23. "ARAE,Access to reserved address enable" "0,1"
bitfld.long 0x4 22. "PEDE,Protocol error in data phase enable" "0,1"
newline
bitfld.long 0x4 21. "PEAE,Protocol error in arbitration phase enable" "0,1"
bitfld.long 0x4 20. "WDIE,Watchdog interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x4 19. "BOE,Bus-off status" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 18. "EWE,Warning status interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x4 17. "EPE,Error passive interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 16. "ELOE,Error logging overflow interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x4 15. "TOOE,Timeout occurred interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 14. "MRAFE,Message RAM access failure interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x4 13. "TSWE,Timestamp wraparound interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 12. "TEFLE,Tx event FIFO element lost interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x4 11. "TEFFE,Tx event FIFO full interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 10. "TEFNE,Tx event FIFO new entry interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x4 9. "TFEE,Tx FIFO empty interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 8. "TCFE,Transmission cancellation finished interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x4 7. "TCE,Transmission completed interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 6. "HPME,High-priority message interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x4 5. "RF1LE,Rx FIFO 1 message lost interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 4. "RF1FE,Rx FIFO 1 full interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x4 3. "RF1NE,Rx FIFO 1 new message interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 2. "RF0LE,Rx FIFO 0 message lost interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x4 1. "RF0FE,Rx FIFO 0 full interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x4 0. "RF0NE,Rx FIFO 0 new message interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
line.long 0x8 "FDCAN_ILS,FDCAN interrupt line select register"
bitfld.long 0x8 6. "PERR,Protocol error grouping the following interruption" "0,1"
bitfld.long 0x8 5. "BERR,Bit and line error grouping the following interruption" "0,1"
newline
bitfld.long 0x8 4. "MISC,Interrupt regrouping the following interruption" "0,1"
bitfld.long 0x8 3. "TFERR,Tx FIFO ERROR grouping the following interruption" "0,1"
newline
bitfld.long 0x8 2. "SMSG,Status message bit grouping the following interruption" "0,1"
bitfld.long 0x8 1. "RxFIFO1,Rx FIFO bit grouping the following interruption" "0,1"
newline
bitfld.long 0x8 0. "RxFIFO0,Rx FIFO bit grouping the following interruption" "0,1"
line.long 0xC "FDCAN_ILE,FDCAN interrupt line enable register"
bitfld.long 0xC 1. "EINT1,Enable interrupt line 1" "0: Interrupt line fdcan_intr0_it disabled,1: Interrupt line fdcan_intr0_it enabled"
bitfld.long 0xC 0. "EINT0,Enable interrupt line 0" "0: Interrupt line fdcan_intr1_it disabled,1: Interrupt line fdcan_intr1_it enabled"
group.long 0x80++0x7
line.long 0x0 "FDCAN_RxGFC,FDCAN global filter configuration register"
hexmask.long.byte 0x0 24.--27. 1. "LSE,Number of extended filter elements in the list"
hexmask.long.byte 0x0 16.--20. 1. "LSS,Number of standard filter elements in the list"
newline
bitfld.long 0x0 9. "F0OM,FIFO 0 operation mode (overwrite or blocking)" "0,1"
bitfld.long 0x0 8. "F1OM,FIFO 1 operation mode (overwrite or blocking)" "0,1"
newline
bitfld.long 0x0 4.--5. "ANFS,Accept Non-matching frames standard" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,2: Reject,3: Reject"
bitfld.long 0x0 2.--3. "ANFE,Accept non-matching frames extended" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,2: Reject,3: Reject"
newline
bitfld.long 0x0 1. "RRFS,Reject remote frames standard" "0: Filter remote frames with 11-bit standard IDs,1: Reject all remote frames with 11-bit standard IDs"
bitfld.long 0x0 0. "RRFE,Reject remote frames extended" "0: Filter remote frames with 29-bit standard IDs,1: Reject all remote frames with 29-bit standard IDs"
line.long 0x4 "FDCAN_xIDAM,FDCAN extended ID and mask register"
hexmask.long 0x4 0.--28. 1. "EIDM,Extended ID mask"
rgroup.long 0x88++0x3
line.long 0x0 "FDCAN_HPMS,FDCAN high-priority message status register"
bitfld.long 0x0 15. "FLST,Filter list" "0: Standard filter list,1: Extended filter list"
hexmask.long.byte 0x0 8.--12. 1. "FIDx,Filter index"
newline
bitfld.long 0x0 6.--7. "MSI,Message storage indicator" "0: No FIFO selected,1: FIFO overrun,2: Message stored in FIFO 0,3: Message stored in FIFO 1"
bitfld.long 0x0 0.--2. "BIDx,Buffer index" "0,1,2,3,4,5,6,7"
rgroup.long 0x90++0x3
line.long 0x0 "FDCAN_RxF0S,FDCAN Rx FIFO 0 status register"
bitfld.long 0x0 25. "RF0L,Rx FIFO 0 message lost" "0: No Rx FIFO 0 message lost,1: Rx FIFO 0 message lost also set after write.."
bitfld.long 0x0 24. "F0F,Rx FIFO 0 full" "0: Rx FIFO 0 not full,1: Rx FIFO 0 full"
newline
bitfld.long 0x0 16.--17. "F0PI,Rx FIFO 0 put index" "0,1,2,3"
bitfld.long 0x0 8.--9. "F0GI,Rx FIFO 0 get index" "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--3. 1. "F0FL,Rx FIFO 0 fill level"
group.long 0x94++0x3
line.long 0x0 "FDCAN_RxF0A,CAN Rx FIFO 0 acknowledge register"
bitfld.long 0x0 0.--2. "F0AI,Rx FIFO 0 acknowledge index" "0,1,2,3,4,5,6,7"
rgroup.long 0x98++0x3
line.long 0x0 "FDCAN_RxF1S,FDCAN Rx FIFO 1 status register"
bitfld.long 0x0 25. "RF1L,Rx FIFO 1 message lost" "0: No Rx FIFO 1 message lost,1: Rx FIFO 1 message lost also set after write.."
bitfld.long 0x0 24. "F1F,Rx FIFO 1 full" "0: Rx FIFO 1 not full,1: Rx FIFO 1 full"
newline
bitfld.long 0x0 16.--17. "F1PI,Rx FIFO 1 put index" "0,1,2,3"
bitfld.long 0x0 8.--9. "F1GI,Rx FIFO 1 get index" "0,1,2,3"
newline
hexmask.long.byte 0x0 0.--3. 1. "F1FL,Rx FIFO 1 fill level"
group.long 0x9C++0x3
line.long 0x0 "FDCAN_RxF1A,FDCAN Rx FIFO 1 acknowledge register"
bitfld.long 0x0 0.--2. "F1AI,Rx FIFO 1 acknowledge index" "0,1,2,3,4,5,6,7"
group.long 0xC0++0x3
line.long 0x0 "FDCAN_TxBC,FDCAN Tx buffer configuration register"
bitfld.long 0x0 24. "TFQM,Tx FIFO/queue mode" "0: Tx FIFO operation,1: Tx queue operation."
rgroup.long 0xC4++0x7
line.long 0x0 "FDCAN_TxFQS,FDCAN Tx FIFO/queue status register"
bitfld.long 0x0 21. "TFQF,Tx FIFO/queue full" "0: Tx FIFO/queue not full,1: Tx FIFO/queue full"
bitfld.long 0x0 16.--17. "TFQPI,Tx FIFO/queue put index" "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "TFGI,Tx FIFO get index" "0,1,2,3"
bitfld.long 0x0 0.--2. "TFFL,Tx FIFO free level" "0,1,2,3,4,5,6,7"
line.long 0x4 "FDCAN_TxBRP,FDCAN Tx buffer request pending register"
bitfld.long 0x4 0.--2. "TRP,Transmission request pending" "0: No transmission request pending,1: Transmission request pending,?,?,?,?,?,?"
group.long 0xCC++0x7
line.long 0x0 "FDCAN_TxBAR,FDCAN Tx buffer add request register"
bitfld.long 0x0 0.--2. "AR,Add request" "0: No transmission request added,1: Transmission requested added.,?,?,?,?,?,?"
line.long 0x4 "FDCAN_TxBCR,FDCAN Tx buffer cancellation request register"
bitfld.long 0x4 0.--2. "CR,Cancellation request" "0: No cancellation pending,1: Cancellation pending,?,?,?,?,?,?"
rgroup.long 0xD4++0x7
line.long 0x0 "FDCAN_TxBTO,FDCAN Tx buffer transmission occurred register"
bitfld.long 0x0 0.--2. "TO,Transmission occurred." "0: No transmission occurred,1: Transmission occurred,?,?,?,?,?,?"
line.long 0x4 "FDCAN_TxBCF,FDCAN Tx buffer cancellation finished register"
bitfld.long 0x4 0.--2. "CF,Cancellation finished" "0: No transmit buffer cancellation,1: Transmit buffer cancellation finished,?,?,?,?,?,?"
group.long 0xDC++0x7
line.long 0x0 "FDCAN_TxBTIE,FDCAN Tx buffer transmission interrupt enable register"
bitfld.long 0x0 0.--2. "TIE,Transmission interrupt enable" "0: Transmission interrupt disabled,1: Transmission interrupt enable,?,?,?,?,?,?"
line.long 0x4 "FDCAN_TxBCIE,FDCAN Tx buffer cancellation finished interrupt enable register"
bitfld.long 0x4 0.--2. "CFIE,Cancellation finished interrupt enable." "0: Cancellation finished interrupt disabled,1: Cancellation finished interrupt enabled,?,?,?,?,?,?"
rgroup.long 0xE4++0x3
line.long 0x0 "FDCAN_TxEFS,FDCAN Tx event FIFO status register"
bitfld.long 0x0 25. "TEFL,Tx event FIFO element lost" "0,1"
bitfld.long 0x0 24. "EFF,Event FIFO full" "0: Tx event FIFO not full,1: Tx event FIFO full"
newline
bitfld.long 0x0 16.--17. "EFPI,Event FIFO put index" "0,1,2,3"
bitfld.long 0x0 8.--9. "EFGI,Event FIFO get index" "0,1,2,3"
newline
bitfld.long 0x0 0.--2. "EFFL,Event FIFO fill level" "0,1,2,3,4,5,6,7"
group.long 0xE8++0x3
line.long 0x0 "FDCAN_TxEFA,FDCAN Tx event FIFO acknowledge register"
bitfld.long 0x0 0.--1. "EFAI,Event FIFO acknowledge index" "0,1,2,3"
group.long 0x100++0x3
line.long 0x0 "FDCAN_CKDIV,FDCAN CFG clock divider register"
hexmask.long.byte 0x0 0.--3. 1. "PDIV,input clock divider"
tree.end
tree.end
tree "FLASH (Embedded Flash Memory)"
base ad:0x0
tree "FLASH"
base ad:0x40022000
group.long 0x0++0x3
line.long 0x0 "FLASH_ACR,FLASH access control register"
bitfld.long 0x0 14. "SLEEP_PD,Flash memory power-down mode during Sleep mode" "0: Flash memory in Idle mode during Sleep mode,1: Flash memory in power-down mode during Sleep mode"
newline
bitfld.long 0x0 13. "PDREQ2,Bank 2 power-down mode request" "0: No request for bank 2 to enter power-down mode,1: Bank 2 requested to enter power-down mode"
newline
bitfld.long 0x0 12. "PDREQ1,Bank 1 power-down mode request" "0: No request for bank 1 to enter power-down mode,1: Bank 1 requested to enter power-down mode"
newline
bitfld.long 0x0 11. "LPM,Low-power read mode" "0: FLASH not in low-power read mode,1: FLASH in low-power read mode"
newline
bitfld.long 0x0 8. "PRFTEN,Prefetch enable" "0: Prefetch disabled,1: Prefetch enabled"
newline
hexmask.long.byte 0x0 0.--3. 1. "LATENCY,Latency"
wgroup.long 0x8++0xB
line.long 0x0 "FLASH_KEYR,FLASH nonsecure key register"
hexmask.long 0x0 0.--31. 1. "KEY,Flash memory nonsecure key"
line.long 0x4 "FLASH_SKEYR,FLASH secure key register"
hexmask.long 0x4 0.--31. 1. "KEY,Flash memory secure key"
line.long 0x8 "FLASH_OPTKEYR,FLASH option key register"
hexmask.long 0x8 0.--31. 1. "KEY,Option-byte key"
wgroup.long 0x18++0x7
line.long 0x0 "FLASH_PDKEY1R,FLASH bank 1 power-down key register"
hexmask.long 0x0 0.--31. 1. "KEY1,Bank 1 power-down key"
line.long 0x4 "FLASH_PDKEY2R,FLASH bank 2 power-down key register"
hexmask.long 0x4 0.--31. 1. "KEY2,Bank 2 power-down key"
group.long 0x20++0x17
line.long 0x0 "FLASH_SR,FLASH nonsecure status register"
rbitfld.long 0x0 21. "PD2,Bank 2 in power-down mode" "0,1"
newline
rbitfld.long 0x0 20. "PD1,Bank 1 in power-down mode" "0,1"
newline
rbitfld.long 0x0 19. "OEM2LOCK,OEM2 lock" "0,1"
newline
rbitfld.long 0x0 18. "OEM1LOCK,OEM1 lock" "0,1"
newline
rbitfld.long 0x0 17. "WDW,Nonsecure wait data to write" "0,1"
newline
rbitfld.long 0x0 16. "BSY,Nonsecure busy" "0,1"
newline
bitfld.long 0x0 13. "OPTWERR,Option write error" "0,1"
newline
bitfld.long 0x0 7. "PGSERR,Nonsecure programming sequence error" "0,1"
newline
bitfld.long 0x0 6. "SIZERR,Nonsecure size error" "0,1"
newline
bitfld.long 0x0 5. "PGAERR,Nonsecure programming alignment error" "0,1"
newline
bitfld.long 0x0 4. "WRPERR,Nonsecure write protection error" "0,1"
newline
bitfld.long 0x0 3. "PROGERR,Nonsecure programming error" "0,1"
newline
bitfld.long 0x0 1. "OPERR,Nonsecure operation error" "0,1"
newline
bitfld.long 0x0 0. "EOP,Nonsecure end of operation" "0,1"
line.long 0x4 "FLASH_SSR,FLASH secure status register"
rbitfld.long 0x4 17. "WDW,Secure wait data to write" "0,1"
newline
rbitfld.long 0x4 16. "BSY,Secure busy" "0,1"
newline
bitfld.long 0x4 7. "PGSERR,Secure programming sequence error" "0,1"
newline
bitfld.long 0x4 6. "SIZERR,Secure size error" "0,1"
newline
bitfld.long 0x4 5. "PGAERR,Secure programming alignment error" "0,1"
newline
bitfld.long 0x4 4. "WRPERR,Secure write protection error" "0,1"
newline
bitfld.long 0x4 3. "PROGERR,Secure programming error" "0,1"
newline
bitfld.long 0x4 1. "OPERR,Secure operation error" "0,1"
newline
bitfld.long 0x4 0. "EOP,Secure end of operation" "0,1"
line.long 0x8 "FLASH_CR,FLASH nonsecure control register"
bitfld.long 0x8 31. "LOCK,Nonsecure lock" "0,1"
newline
bitfld.long 0x8 30. "OPTLOCK,Option lock" "0,1"
newline
bitfld.long 0x8 27. "OBL_LAUNCH,Option-byte loading forced" "0: Option-byte loading complete,1: Option-byte loading requested"
newline
bitfld.long 0x8 25. "ERRIE,Nonsecure error interrupt enable" "0: Nonsecure OPERR error interrupt disabled,1: Nonsecure OPERR error interrupt enabled"
newline
bitfld.long 0x8 24. "EOPIE,Nonsecure end of operation interrupt enable" "0: Nonsecure EOP Interrupt disabled,1: Nonsecure EOP Interrupt enabled"
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bitfld.long 0x8 17. "OPTSTRT,Option modification start" "0,1"
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bitfld.long 0x8 16. "STRT,Nonsecure start" "0,1"
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bitfld.long 0x8 15. "MER2,Nonsecure bank 2 mass erase" "0,1"
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bitfld.long 0x8 14. "BWR,Nonsecure burst write programming mode" "0,1"
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bitfld.long 0x8 11. "BKER,Nonsecure bank selection for page erase" "0: Bank 1 selected for nonsecure page erase,1: Bank 2 selected for nonsecure page erase"
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hexmask.long.byte 0x8 3.--9. 1. "PNB,Nonsecure page number selection"
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bitfld.long 0x8 2. "MER1,Nonsecure bank 1 mass erase" "0,1"
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bitfld.long 0x8 1. "PER,Nonsecure page erase" "0: Nonsecure page erase disabled,1: Nonsecure page erase enabled"
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bitfld.long 0x8 0. "PG,Nonsecure programming" "0: Nonsecure FLASH programming disabled,1: Nonsecure FLASH programming enabled"
line.long 0xC "FLASH_SCR,FLASH secure control register"
bitfld.long 0xC 31. "LOCK,Secure lock" "0,1"
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bitfld.long 0xC 29. "INV,Flash memory security state invert" "0,1"
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bitfld.long 0xC 25. "ERRIE,Secure error interrupt enable" "0: Secure OPERR error interrupt disabled,1: Secure OPERR error interrupt enabled"
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bitfld.long 0xC 24. "EOPIE,Secure end of operation interrupt enable" "0: Secure EOP Interrupt disabled,1: Secure EOP Interrupt enabled"
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bitfld.long 0xC 16. "STRT,Secure start" "0,1"
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bitfld.long 0xC 15. "MER2,Secure bank 2 mass erase" "0,1"
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bitfld.long 0xC 14. "BWR,Secure burst write programming mode" "0,1"
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bitfld.long 0xC 11. "BKER,Secure bank selection for page erase" "0: Bank 1 selected for secure page erase,1: Bank 2 selected for secure page erase"
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hexmask.long.byte 0xC 3.--9. 1. "PNB,Secure page number selection"
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bitfld.long 0xC 2. "MER1,Secure bank 1 mass erase" "0,1"
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bitfld.long 0xC 1. "PER,Secure page erase" "0: Secure page erase disabled,1: Secure page erase enabled"
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bitfld.long 0xC 0. "PG,Secure programming" "0: Secure FLASH programming disabled,1: Secure FLASH programming enabled"
line.long 0x10 "FLASH_ECCCORR,FLASH ECC register"
bitfld.long 0x10 30. "ECCC,ECC correction" "0,1"
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bitfld.long 0x10 24. "ECCIE,ECC correction interrupt enable" "0: ECCC interrupt disabled,1: ECCC interrupt enabled."
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rbitfld.long 0x10 22. "SYSF_ECC,System flash memory ECC fail" "0,1"
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rbitfld.long 0x10 21. "BK_ECC,ECC fail bank" "0: Bank 1,1: Bank 2"
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hexmask.long.tbyte 0x10 0.--18. 1. "ADDR_ECC,ECC fail address"
line.long 0x14 "FLASH_ECCDETR,FLASH ECC detection register"
bitfld.long 0x14 31. "ECCD,ECC detection" "0,1"
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rbitfld.long 0x14 22. "SYSF_ECC,System flash memory ECC fail" "0,1"
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rbitfld.long 0x14 21. "BK_ECC,ECC fail bank" "0: Bank 1,1: Bank 2"
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hexmask.long.tbyte 0x14 0.--18. 1. "ADDR_ECC,ECC fail address"
rgroup.long 0x38++0x3
line.long 0x0 "FLASH_OPSR,FLASH operation status register"
bitfld.long 0x0 29.--31. "CODE_OP,Flash memory operation code" "0: No flash operation interrupted by previous reset,1: Single write operation interrupted,2: Burst write operation interrupted,3: Page erase operation interrupted,4: Bank erase operation interrupted,5: Mass erase operation interrupted,6: Option change operation interrupted,?"
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bitfld.long 0x0 22. "SYSF_OP,Operation in system flash memory interrupted" "0,1"
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bitfld.long 0x0 21. "BK_OP,Interrupted operation bank" "0: Bank 1,1: Bank 2"
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hexmask.long.tbyte 0x0 0.--18. 1. "ADDR_OP,Interrupted operation address"
group.long 0x40++0x2F
line.long 0x0 "FLASH_OPTR,FLASH option register"
bitfld.long 0x0 31. "TZEN,Global TrustZone security enable" "0: Global TrustZone security disabled,1: Global TrustZone security enabled"
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bitfld.long 0x0 30. "IO_VDDIO2_HSLV,High-speed I/O at low Vless thansub>DDIO2less than/sub> voltage configuration bit" "0: High-speed I/O at low Vless thansub>DDIO2 less..,1: High-speed I/O at low Vless thansub>DDIO2 less.."
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bitfld.long 0x0 29. "IO_VDD_HSLV,High-speed I/O at low Vless thansub>DD less than/sub>voltage configuration bit" "0: High-speed I/O at low Vless thansub>DD less..,1: High-speed I/O at low Vless thansub>DD less.."
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bitfld.long 0x0 27. "NBOOT0,NBOOT0 option bit" "0: NBOOT0 = 0,1: NBOOT0 = 1"
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bitfld.long 0x0 26. "NSWBOOT0,Software BOOT0" "0: BOOT0 taken from the option bit NBOOT0,1: BOOT0 taken from PH3/BOOT0 pin"
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bitfld.long 0x0 25. "SRAM2_RST,SRAM2 erase when system reset" "0: SRAM2 erased when a system reset occurs,1: SRAM2 not erased when a system reset occurs"
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bitfld.long 0x0 24. "SRAM2_PE,SRAM2 parity check enable" "0: SRAM2 parity check enabled,1: SRAM2 parity check disabled"
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bitfld.long 0x0 21. "DUALBANK,Dual-bank on 512-Kbyte flash memory devices" "0: Single-bank FLASH with contiguous address in..,1: Dual-bank FLASH with contiguous addresses"
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bitfld.long 0x0 20. "SWAP_BANK,Swap banks" "0: Bank 1 and bank 2 addresses not swapped,1: Bank 1 and bank 2 addresses swapped"
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bitfld.long 0x0 19. "WWDG_SW,Window watchdog selection" "0: Hardware WWDG selected,1: Software WWDG selected"
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bitfld.long 0x0 18. "IWDG_STDBY,Independent watchdog counter freeze in Standby mode" "0: IWDG counter frozen in Standby mode,1: IWDG counter running in Standby mode"
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bitfld.long 0x0 17. "IWDG_STOP,Independent watchdog counter freeze in Stop mode" "0: IWDG counter frozen in Stop mode,1: IIWDG counter running in Stop mode"
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bitfld.long 0x0 16. "IWDG_SW,Independent watchdog selection" "0: Hardware IWDG selected,1: Software IWDG selected"
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bitfld.long 0x0 15. "SRAM1_RST,SRAM1 erase upon system reset" "0: SRAM1 erased when a system reset occurs,1: SRAM1 not erased when a system reset occurs"
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bitfld.long 0x0 14. "NRST_SHDW,Reset generation in Shutdown mode" "0: Reset generated when entering the Shutdown mode,1: No reset generated when entering the Shutdown mode"
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bitfld.long 0x0 13. "NRST_STDBY,Reset generation in Standby mode" "0: Reset generated when entering the Standby mode,1: No reset generate when entering the Standby mode"
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bitfld.long 0x0 12. "NRST_STOP,Reset generation in Stop mode" "0: Reset generated when entering the Stop mode,1: No reset generated when entering the Stop mode"
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bitfld.long 0x0 11. "BDRST_POR,Backup domain reset with power-on reset" "0: The backup domain is not reset after a Vless..,1: The backup domain is reset after a Vless.."
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bitfld.long 0x0 8.--10. "BOR_LEV,BOR reset level" "0: BOR level 0 (reset level threshold around 1.,1: BOR level 1 (reset level threshold around 2.,2: BOR level 2 (reset level threshold around 2.,3: BOR level 3 (reset level threshold around 2.,4: BOR level 4 (reset level threshold around 2.,?,?,?"
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hexmask.long.byte 0x0 0.--7. 1. "RDP,Readout protection level"
line.long 0x4 "FLASH_BOOT0R,FLASH nonsecure boot address 0 register"
hexmask.long 0x4 7.--31. 1. "ADD,Nonsecure boot base address 0"
line.long 0x8 "FLASH_BOOT1R,FLASH nonsecure boot address 1 register"
hexmask.long 0x8 7.--31. 1. "ADD,nonsecure boot address 1"
line.long 0xC "FLASH_SBOOT0R,FLASH secure boot address 0 register"
hexmask.long 0xC 7.--31. 1. "ADD,Secure boot base address 0"
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bitfld.long 0xC 0. "BOOT_LOCK,Boot lock" "0,1"
line.long 0x10 "FLASH_SECWM1R1,FLASH secure watermark1 register 1"
hexmask.long.byte 0x10 16.--22. 1. "SECWM1_END,End page of first secure area"
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hexmask.long.byte 0x10 0.--6. 1. "SECWM1_STRT,Start page of first secure area"
line.long 0x14 "FLASH_SECWM1R2,FLASH secure watermark1 register 2"
hexmask.long.byte 0x14 24.--31. 1. "HDP1EN,Hide protection first area enable"
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hexmask.long.byte 0x14 16.--22. 1. "HDP1_END,End page of first hide protection area"
line.long 0x18 "FLASH_WRP1AR,FLASH WRP1 area A address register"
bitfld.long 0x18 31. "UNLOCK,Bank 1 WPR first area A unlock" "0: WRP1A start and end pages locked,1: WRP1A start and end pages unlocked"
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hexmask.long.byte 0x18 16.--22. 1. "END,Bank 1 WPR first area A end page"
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hexmask.long.byte 0x18 0.--6. 1. "STRT,Bank 1 WPR first area A start page"
line.long 0x1C "FLASH_WRP1BR,FLASH WRP1 area B address register"
bitfld.long 0x1C 31. "UNLOCK,Bank 1 WPR second area B unlock" "0: WRP1B start and end pages locked,1: WRP1B start and end pages unlocked"
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hexmask.long.byte 0x1C 16.--22. 1. "END,Bank 1 WRP second area B end page"
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hexmask.long.byte 0x1C 0.--6. 1. "STRT,Bank 1 WRP second area B start page"
line.long 0x20 "FLASH_SECWM2R1,FLASH secure watermark2 register 1"
hexmask.long.byte 0x20 16.--22. 1. "SECWM2_END,End page of second secure area"
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hexmask.long.byte 0x20 0.--6. 1. "SECWM2_STRT,Start page of second secure area"
line.long 0x24 "FLASH_SECWM2R2,FLASH secure watermark2 register 2"
hexmask.long.byte 0x24 24.--31. 1. "HDP2EN,Hide protection second area enable"
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hexmask.long.byte 0x24 16.--22. 1. "HDP2_END,End page of hide protection second area"
line.long 0x28 "FLASH_WRP2AR,FLASH WPR2 area A address register"
bitfld.long 0x28 31. "UNLOCK,Bank 2 WPR first area A unlock" "0: WRP2A start and end pages locked,1: WRP2A start and end pages unlocked"
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hexmask.long.byte 0x28 16.--22. 1. "END,Bank 2 WPR first area A end page"
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hexmask.long.byte 0x28 0.--6. 1. "STRT,Bank 2 WPR first area A start page"
line.long 0x2C "FLASH_WRP2BR,FLASH WPR2 area B address register"
bitfld.long 0x2C 31. "UNLOCK,Bank 2 WPR second area B unlock" "0: WRP2B start and end pages locked,1: WRP2B start and end pages unlocked"
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hexmask.long.byte 0x2C 16.--22. 1. "END,Bank 2 WPR second area B end page"
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hexmask.long.byte 0x2C 0.--6. 1. "STRT,Bank 2 WPR second area B start page"
group.long 0x80++0xF
line.long 0x0 "FLASH_SECBB1R1,FLASH secure block based bank 1 register 1"
bitfld.long 0x0 31. "SEC31,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 30. "SEC30,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 29. "SEC29,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 28. "SEC28,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 27. "SEC27,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 26. "SEC26,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 25. "SEC25,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 24. "SEC24,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 23. "SEC23,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 22. "SEC22,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 21. "SEC21,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 20. "SEC20,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 19. "SEC19,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 18. "SEC18,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 17. "SEC17,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 16. "SEC16,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 15. "SEC15,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 14. "SEC14,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 13. "SEC13,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 12. "SEC12,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 11. "SEC11,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 10. "SEC10,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 9. "SEC9,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 8. "SEC8,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 7. "SEC7,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 6. "SEC6,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 5. "SEC5,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 4. "SEC4,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 3. "SEC3,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 2. "SEC2,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 1. "SEC1,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 0. "SEC0,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
line.long 0x4 "FLASH_SECBB1R2,FLASH secure block based bank 1 register 2"
bitfld.long 0x4 31. "SEC31,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 30. "SEC30,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 29. "SEC29,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 28. "SEC28,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 27. "SEC27,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 26. "SEC26,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 25. "SEC25,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 24. "SEC24,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 23. "SEC23,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 22. "SEC22,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 21. "SEC21,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 20. "SEC20,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 19. "SEC19,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 18. "SEC18,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 17. "SEC17,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 16. "SEC16,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 15. "SEC15,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 14. "SEC14,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 13. "SEC13,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 12. "SEC12,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 11. "SEC11,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 10. "SEC10,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 9. "SEC9,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 8. "SEC8,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 7. "SEC7,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 6. "SEC6,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x4 5. "SEC5,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 4. "SEC4,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 3. "SEC3,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 2. "SEC2,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 1. "SEC1,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 0. "SEC0,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
line.long 0x8 "FLASH_SECBB1R3,FLASH secure block based bank 1 register 3"
bitfld.long 0x8 31. "SEC31,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 30. "SEC30,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 29. "SEC29,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 28. "SEC28,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 27. "SEC27,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 26. "SEC26,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 25. "SEC25,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 24. "SEC24,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 23. "SEC23,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 22. "SEC22,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 21. "SEC21,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 20. "SEC20,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 19. "SEC19,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 18. "SEC18,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 17. "SEC17,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 16. "SEC16,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 15. "SEC15,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 14. "SEC14,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 13. "SEC13,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 12. "SEC12,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 11. "SEC11,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 10. "SEC10,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 9. "SEC9,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 8. "SEC8,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 7. "SEC7,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 6. "SEC6,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 5. "SEC5,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 4. "SEC4,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 3. "SEC3,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 2. "SEC2,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 1. "SEC1,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 0. "SEC0,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
line.long 0xC "FLASH_SECBB1R4,FLASH secure block based bank 1 register 4"
bitfld.long 0xC 31. "SEC31,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 30. "SEC30,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 29. "SEC29,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 28. "SEC28,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 27. "SEC27,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 26. "SEC26,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 25. "SEC25,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 24. "SEC24,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 23. "SEC23,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 22. "SEC22,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 21. "SEC21,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 20. "SEC20,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 19. "SEC19,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 18. "SEC18,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 17. "SEC17,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 16. "SEC16,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 15. "SEC15,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 14. "SEC14,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 13. "SEC13,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 12. "SEC12,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 11. "SEC11,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 10. "SEC10,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 9. "SEC9,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 8. "SEC8,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 7. "SEC7,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 6. "SEC6,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 5. "SEC5,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 4. "SEC4,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 3. "SEC3,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 2. "SEC2,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 1. "SEC1,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 0. "SEC0,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
group.long 0xA0++0xF
line.long 0x0 "FLASH_SECBB2R1,FLASH secure block based bank 2 register 1"
bitfld.long 0x0 31. "SEC31,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 30. "SEC30,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 29. "SEC29,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 28. "SEC28,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 27. "SEC27,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 26. "SEC26,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 25. "SEC25,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 24. "SEC24,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 23. "SEC23,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 22. "SEC22,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 21. "SEC21,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 20. "SEC20,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 19. "SEC19,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 18. "SEC18,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 17. "SEC17,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 16. "SEC16,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 15. "SEC15,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 14. "SEC14,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 13. "SEC13,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 12. "SEC12,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 11. "SEC11,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 10. "SEC10,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 9. "SEC9,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 8. "SEC8,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 7. "SEC7,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 6. "SEC6,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 5. "SEC5,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 4. "SEC4,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 3. "SEC3,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 2. "SEC2,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 1. "SEC1,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 0. "SEC0,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
line.long 0x4 "FLASH_SECBB2R2,FLASH secure block based bank 2 register 2"
bitfld.long 0x4 31. "SEC31,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 30. "SEC30,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 29. "SEC29,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 28. "SEC28,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 27. "SEC27,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 26. "SEC26,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 25. "SEC25,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 24. "SEC24,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 23. "SEC23,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 22. "SEC22,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 21. "SEC21,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 20. "SEC20,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 19. "SEC19,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 18. "SEC18,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 17. "SEC17,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 16. "SEC16,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 15. "SEC15,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 14. "SEC14,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 13. "SEC13,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 12. "SEC12,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 11. "SEC11,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 10. "SEC10,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 9. "SEC9,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 8. "SEC8,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 7. "SEC7,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 6. "SEC6,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 5. "SEC5,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 4. "SEC4,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0x4 3. "SEC3,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 2. "SEC2,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 1. "SEC1,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 0. "SEC0,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
line.long 0x8 "FLASH_SECBB2R3,FLASH secure block based bank 2 register 3"
bitfld.long 0x8 31. "SEC31,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 30. "SEC30,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 29. "SEC29,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0x8 28. "SEC28,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0x8 27. "SEC27,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 26. "SEC26,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 25. "SEC25,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0x8 24. "SEC24,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0x8 23. "SEC23,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 22. "SEC22,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 21. "SEC21,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 20. "SEC20,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 19. "SEC19,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 18. "SEC18,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 17. "SEC17,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 16. "SEC16,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 15. "SEC15,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 14. "SEC14,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 13. "SEC13,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 12. "SEC12,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 11. "SEC11,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0x8 10. "SEC10,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0x8 9. "SEC9,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 8. "SEC8,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 7. "SEC7,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0x8 6. "SEC6,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 5. "SEC5,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 4. "SEC4,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 3. "SEC3,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 2. "SEC2,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0x8 1. "SEC1,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0x8 0. "SEC0,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
line.long 0xC "FLASH_SECBB2R4,FLASH secure block based bank 2 register 4"
bitfld.long 0xC 31. "SEC31,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 30. "SEC30,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 29. "SEC29,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 28. "SEC28,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 27. "SEC27,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 26. "SEC26,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 25. "SEC25,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 24. "SEC24,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 23. "SEC23,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 22. "SEC22,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 21. "SEC21,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 20. "SEC20,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0xC 19. "SEC19,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0xC 18. "SEC18,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 17. "SEC17,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0xC 16. "SEC16,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0xC 15. "SEC15,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0xC 14. "SEC14,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0xC 13. "SEC13,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0xC 12. "SEC12,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0xC 11. "SEC11,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0xC 10. "SEC10,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 9. "SEC9,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0xC 8. "SEC8,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 7. "SEC7,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 6. "SEC6,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 5. "SEC5,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0xC 4. "SEC4,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 3. "SEC3,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0xC 2. "SEC2,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0xC 1. "SEC1,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 0. "SEC0,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
group.long 0xC0++0xB
line.long 0x0 "FLASH_SECHDPCR,FLASH secure HDP control register"
hexmask.long.byte 0x0 24.--31. 1. "HDP2ExT_ACCDIS,HDP2 extension area access disable"
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hexmask.long.byte 0x0 16.--23. 1. "HDP1ExT_ACCDIS,HDP1 extension area access disable"
newline
hexmask.long.byte 0x0 8.--15. 1. "HDP2_ACCDIS,HDP2 area access disable"
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hexmask.long.byte 0x0 0.--7. 1. "HDP1_ACCDIS,HDP1 area access disable"
line.long 0x4 "FLASH_PRIVCFGR,FLASH privilege configuration register"
bitfld.long 0x4 1. "PRIV,Privileged protection for nonsecure registers" "0: Nonsecure FLASH registers can be read and..,1: Nonsecure FLASH registers can be read and.."
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bitfld.long 0x4 0. "SPRIV,Privileged protection for secure registers" "0: Secure FLASH registers can be read and written..,1: Secure FLASH registers can be read and written.."
line.long 0x8 "FLASH_SECHDPExTR,FLASH HDP extension register"
hexmask.long.byte 0x8 16.--23. 1. "HDP2_ExT,HDP area extension in 4-Kbyte pages in bank 2"
newline
hexmask.long.byte 0x8 0.--7. 1. "HDP1_ExT,HDP area extension in 4-Kbyte pages in bank 1"
group.long 0xD0++0xF
line.long 0x0 "FLASH_PRIVBB1R1,FLASH privilege block-based bank 1 register 1"
bitfld.long 0x0 31. "PRIV31,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 30. "PRIV30,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 29. "PRIV29,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 28. "PRIV28,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x0 27. "PRIV27,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 26. "PRIV26,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 25. "PRIV25,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 24. "PRIV24,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 23. "PRIV23,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 22. "PRIV22,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 21. "PRIV21,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 20. "PRIV20,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 19. "PRIV19,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 18. "PRIV18,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x0 17. "PRIV17,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x0 16. "PRIV16,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x0 15. "PRIV15,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x0 14. "PRIV14,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x0 13. "PRIV13,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x0 12. "PRIV12,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x0 11. "PRIV11,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x0 10. "PRIV10,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x0 9. "PRIV9,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x0 8. "PRIV8,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x0 7. "PRIV7,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x0 6. "PRIV6,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x0 5. "PRIV5,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x0 4. "PRIV4,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x0 3. "PRIV3,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x0 2. "PRIV2,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x0 1. "PRIV1,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x0 0. "PRIV0,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
line.long 0x4 "FLASH_PRIVBB1R2,FLASH privilege block-based bank 1 register 2"
bitfld.long 0x4 31. "PRIV31,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 30. "PRIV30,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 29. "PRIV29,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 28. "PRIV28,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 27. "PRIV27,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 26. "PRIV26,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 25. "PRIV25,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 24. "PRIV24,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 23. "PRIV23,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 22. "PRIV22,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 21. "PRIV21,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 20. "PRIV20,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 19. "PRIV19,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 18. "PRIV18,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 17. "PRIV17,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 16. "PRIV16,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 15. "PRIV15,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 14. "PRIV14,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 13. "PRIV13,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 12. "PRIV12,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 11. "PRIV11,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 10. "PRIV10,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 9. "PRIV9,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 8. "PRIV8,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 7. "PRIV7,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 6. "PRIV6,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 5. "PRIV5,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 4. "PRIV4,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 3. "PRIV3,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 2. "PRIV2,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 1. "PRIV1,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x4 0. "PRIV0,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
line.long 0x8 "FLASH_PRIVBB1R3,FLASH privilege block-based bank 1 register 3"
bitfld.long 0x8 31. "PRIV31,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 30. "PRIV30,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 29. "PRIV29,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 28. "PRIV28,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 27. "PRIV27,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 26. "PRIV26,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 25. "PRIV25,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 24. "PRIV24,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 23. "PRIV23,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 22. "PRIV22,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 21. "PRIV21,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 20. "PRIV20,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 19. "PRIV19,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 18. "PRIV18,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 17. "PRIV17,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 16. "PRIV16,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 15. "PRIV15,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 14. "PRIV14,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 13. "PRIV13,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 12. "PRIV12,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 11. "PRIV11,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 10. "PRIV10,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 9. "PRIV9,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 8. "PRIV8,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 7. "PRIV7,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 6. "PRIV6,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 5. "PRIV5,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 4. "PRIV4,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 3. "PRIV3,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 2. "PRIV2,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 1. "PRIV1,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 0. "PRIV0,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
line.long 0xC "FLASH_PRIVBB1R4,FLASH privilege block-based bank 1 register 4"
bitfld.long 0xC 31. "PRIV31,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 30. "PRIV30,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 29. "PRIV29,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 28. "PRIV28,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 27. "PRIV27,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 26. "PRIV26,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 25. "PRIV25,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 24. "PRIV24,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 23. "PRIV23,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 22. "PRIV22,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 21. "PRIV21,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 20. "PRIV20,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 19. "PRIV19,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 18. "PRIV18,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 17. "PRIV17,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 16. "PRIV16,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 15. "PRIV15,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 14. "PRIV14,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 13. "PRIV13,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 12. "PRIV12,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 11. "PRIV11,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 10. "PRIV10,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 9. "PRIV9,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 8. "PRIV8,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 7. "PRIV7,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 6. "PRIV6,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 5. "PRIV5,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 4. "PRIV4,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 3. "PRIV3,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 2. "PRIV2,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 1. "PRIV1,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 0. "PRIV0,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
group.long 0xF0++0xF
line.long 0x0 "FLASH_PRIVBB2R1,FLASH privilege block based bank 2 register 1"
bitfld.long 0x0 31. "PRIV31,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 30. "PRIV30,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 29. "PRIV29,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 28. "PRIV28,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 27. "PRIV27,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 26. "PRIV26,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 25. "PRIV25,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 24. "PRIV24,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 23. "PRIV23,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 22. "PRIV22,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 21. "PRIV21,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 20. "PRIV20,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 19. "PRIV19,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 18. "PRIV18,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 17. "PRIV17,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 16. "PRIV16,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 15. "PRIV15,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 14. "PRIV14,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 13. "PRIV13,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 12. "PRIV12,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 11. "PRIV11,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 10. "PRIV10,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 9. "PRIV9,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 8. "PRIV8,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 7. "PRIV7,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 6. "PRIV6,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 5. "PRIV5,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 4. "PRIV4,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 3. "PRIV3,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 2. "PRIV2,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 1. "PRIV1,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 0. "PRIV0,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
line.long 0x4 "FLASH_PRIVBB2R2,FLASH privilege block based bank 2 register 2"
bitfld.long 0x4 31. "PRIV31,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 30. "PRIV30,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 29. "PRIV29,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 28. "PRIV28,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 27. "PRIV27,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 26. "PRIV26,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 25. "PRIV25,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 24. "PRIV24,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 23. "PRIV23,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 22. "PRIV22,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 21. "PRIV21,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 20. "PRIV20,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 19. "PRIV19,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 18. "PRIV18,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 17. "PRIV17,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 16. "PRIV16,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 15. "PRIV15,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 14. "PRIV14,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 13. "PRIV13,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 12. "PRIV12,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 11. "PRIV11,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 10. "PRIV10,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 9. "PRIV9,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 8. "PRIV8,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 7. "PRIV7,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 6. "PRIV6,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 5. "PRIV5,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 4. "PRIV4,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 3. "PRIV3,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 2. "PRIV2,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 1. "PRIV1,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 0. "PRIV0,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
line.long 0x8 "FLASH_PRIVBB2R3,FLASH privilege block based bank 2 register 3"
bitfld.long 0x8 31. "PRIV31,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 30. "PRIV30,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 29. "PRIV29,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 28. "PRIV28,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 27. "PRIV27,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 26. "PRIV26,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 25. "PRIV25,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 24. "PRIV24,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 23. "PRIV23,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 22. "PRIV22,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 21. "PRIV21,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 20. "PRIV20,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 19. "PRIV19,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 18. "PRIV18,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 17. "PRIV17,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 16. "PRIV16,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 15. "PRIV15,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 14. "PRIV14,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 13. "PRIV13,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 12. "PRIV12,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 11. "PRIV11,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 10. "PRIV10,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 9. "PRIV9,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 8. "PRIV8,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 7. "PRIV7,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 6. "PRIV6,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 5. "PRIV5,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 4. "PRIV4,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 3. "PRIV3,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 2. "PRIV2,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 1. "PRIV1,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 0. "PRIV0,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
line.long 0xC "FLASH_PRIVBB2R4,FLASH privilege block based bank 2 register 4"
bitfld.long 0xC 31. "PRIV31,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 30. "PRIV30,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 29. "PRIV29,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 28. "PRIV28,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 27. "PRIV27,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 26. "PRIV26,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 25. "PRIV25,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 24. "PRIV24,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 23. "PRIV23,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 22. "PRIV22,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 21. "PRIV21,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 20. "PRIV20,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 19. "PRIV19,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 18. "PRIV18,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 17. "PRIV17,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 16. "PRIV16,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 15. "PRIV15,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 14. "PRIV14,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 13. "PRIV13,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 12. "PRIV12,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 11. "PRIV11,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 10. "PRIV10,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 9. "PRIV9,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 8. "PRIV8,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 7. "PRIV7,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 6. "PRIV6,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 5. "PRIV5,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 4. "PRIV4,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 3. "PRIV3,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 2. "PRIV2,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 1. "PRIV1,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
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bitfld.long 0xC 0. "PRIV0,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
wgroup.long 0x110++0x1F
line.long 0x0 "FLASH_OEM1KEYR1,FLASH OEM1 key register 1"
hexmask.long 0x0 0.--31. 1. "OEM1KEY,OEM1[31:0] bytes key"
line.long 0x4 "FLASH_OEM1KEYR2,FLASH OEM1 key register 2"
hexmask.long 0x4 0.--31. 1. "OEM1KEY,OEM1[63:32] bytes key"
line.long 0x8 "FLASH_OEM1KEYR3,FLASH OEM1 key register 3"
hexmask.long 0x8 0.--31. 1. "OEM1KEY,OEM1[95:64] bytes key"
line.long 0xC "FLASH_OEM1KEYR4,FLASH OEM1 key register 4"
hexmask.long 0xC 0.--31. 1. "OEM1KEY,OEM1[127:96] bytes key"
line.long 0x10 "FLASH_OEM2KEYR1,FLASH OEM2 key register 1"
hexmask.long 0x10 0.--31. 1. "OEM2KEY,OEM2[31:0] bytes key"
line.long 0x14 "FLASH_OEM2KEYR2,FLASH OEM2 key register 2"
hexmask.long 0x14 0.--31. 1. "OEM2KEY,OEM2[63:32] bytes key"
line.long 0x18 "FLASH_OEM2KEYR3,FLASH OEM2 key register 3"
hexmask.long 0x18 0.--31. 1. "OEM2KEY,OEM2[95:64] bytes key"
line.long 0x1C "FLASH_OEM2KEYR4,FLASH OEM2 key register 4"
hexmask.long 0x1C 0.--31. 1. "OEM2KEY,OEM2[127:96] bytes key"
rgroup.long 0x130++0x3
line.long 0x0 "FLASH_OEMKEYSR,FLASH OEM key status register"
hexmask.long.byte 0x0 16.--23. 1. "OEM2KEYCRC,8-bit OEM2KEY CRC"
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hexmask.long.byte 0x0 0.--7. 1. "OEM1KEYCRC,8-bit OEMKEY1 CRC"
tree.end
tree "SEC_FLASH"
base ad:0x50022000
group.long 0x0++0x3
line.long 0x0 "FLASH_ACR,FLASH access control register"
bitfld.long 0x0 14. "SLEEP_PD,Flash memory power-down mode during Sleep mode" "0: Flash memory in Idle mode during Sleep mode,1: Flash memory in power-down mode during Sleep mode"
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bitfld.long 0x0 13. "PDREQ2,Bank 2 power-down mode request" "0: No request for bank 2 to enter power-down mode,1: Bank 2 requested to enter power-down mode"
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bitfld.long 0x0 12. "PDREQ1,Bank 1 power-down mode request" "0: No request for bank 1 to enter power-down mode,1: Bank 1 requested to enter power-down mode"
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bitfld.long 0x0 11. "LPM,Low-power read mode" "0: FLASH not in low-power read mode,1: FLASH in low-power read mode"
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bitfld.long 0x0 8. "PRFTEN,Prefetch enable" "0: Prefetch disabled,1: Prefetch enabled"
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hexmask.long.byte 0x0 0.--3. 1. "LATENCY,Latency"
wgroup.long 0x8++0xB
line.long 0x0 "FLASH_KEYR,FLASH nonsecure key register"
hexmask.long 0x0 0.--31. 1. "KEY,Flash memory nonsecure key"
line.long 0x4 "FLASH_SKEYR,FLASH secure key register"
hexmask.long 0x4 0.--31. 1. "KEY,Flash memory secure key"
line.long 0x8 "FLASH_OPTKEYR,FLASH option key register"
hexmask.long 0x8 0.--31. 1. "KEY,Option-byte key"
wgroup.long 0x18++0x7
line.long 0x0 "FLASH_PDKEY1R,FLASH bank 1 power-down key register"
hexmask.long 0x0 0.--31. 1. "KEY1,Bank 1 power-down key"
line.long 0x4 "FLASH_PDKEY2R,FLASH bank 2 power-down key register"
hexmask.long 0x4 0.--31. 1. "KEY2,Bank 2 power-down key"
group.long 0x20++0x17
line.long 0x0 "FLASH_SR,FLASH nonsecure status register"
rbitfld.long 0x0 21. "PD2,Bank 2 in power-down mode" "0,1"
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rbitfld.long 0x0 20. "PD1,Bank 1 in power-down mode" "0,1"
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rbitfld.long 0x0 19. "OEM2LOCK,OEM2 lock" "0,1"
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rbitfld.long 0x0 18. "OEM1LOCK,OEM1 lock" "0,1"
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rbitfld.long 0x0 17. "WDW,Nonsecure wait data to write" "0,1"
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rbitfld.long 0x0 16. "BSY,Nonsecure busy" "0,1"
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bitfld.long 0x0 13. "OPTWERR,Option write error" "0,1"
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bitfld.long 0x0 7. "PGSERR,Nonsecure programming sequence error" "0,1"
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bitfld.long 0x0 6. "SIZERR,Nonsecure size error" "0,1"
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bitfld.long 0x0 5. "PGAERR,Nonsecure programming alignment error" "0,1"
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bitfld.long 0x0 4. "WRPERR,Nonsecure write protection error" "0,1"
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bitfld.long 0x0 3. "PROGERR,Nonsecure programming error" "0,1"
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bitfld.long 0x0 1. "OPERR,Nonsecure operation error" "0,1"
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bitfld.long 0x0 0. "EOP,Nonsecure end of operation" "0,1"
line.long 0x4 "FLASH_SSR,FLASH secure status register"
rbitfld.long 0x4 17. "WDW,Secure wait data to write" "0,1"
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rbitfld.long 0x4 16. "BSY,Secure busy" "0,1"
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bitfld.long 0x4 7. "PGSERR,Secure programming sequence error" "0,1"
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bitfld.long 0x4 6. "SIZERR,Secure size error" "0,1"
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bitfld.long 0x4 5. "PGAERR,Secure programming alignment error" "0,1"
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bitfld.long 0x4 4. "WRPERR,Secure write protection error" "0,1"
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bitfld.long 0x4 3. "PROGERR,Secure programming error" "0,1"
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bitfld.long 0x4 1. "OPERR,Secure operation error" "0,1"
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bitfld.long 0x4 0. "EOP,Secure end of operation" "0,1"
line.long 0x8 "FLASH_CR,FLASH nonsecure control register"
bitfld.long 0x8 31. "LOCK,Nonsecure lock" "0,1"
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bitfld.long 0x8 30. "OPTLOCK,Option lock" "0,1"
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bitfld.long 0x8 27. "OBL_LAUNCH,Option-byte loading forced" "0: Option-byte loading complete,1: Option-byte loading requested"
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bitfld.long 0x8 25. "ERRIE,Nonsecure error interrupt enable" "0: Nonsecure OPERR error interrupt disabled,1: Nonsecure OPERR error interrupt enabled"
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bitfld.long 0x8 24. "EOPIE,Nonsecure end of operation interrupt enable" "0: Nonsecure EOP Interrupt disabled,1: Nonsecure EOP Interrupt enabled"
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bitfld.long 0x8 17. "OPTSTRT,Option modification start" "0,1"
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bitfld.long 0x8 16. "STRT,Nonsecure start" "0,1"
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bitfld.long 0x8 15. "MER2,Nonsecure bank 2 mass erase" "0,1"
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bitfld.long 0x8 14. "BWR,Nonsecure burst write programming mode" "0,1"
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bitfld.long 0x8 11. "BKER,Nonsecure bank selection for page erase" "0: Bank 1 selected for nonsecure page erase,1: Bank 2 selected for nonsecure page erase"
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hexmask.long.byte 0x8 3.--9. 1. "PNB,Nonsecure page number selection"
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bitfld.long 0x8 2. "MER1,Nonsecure bank 1 mass erase" "0,1"
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bitfld.long 0x8 1. "PER,Nonsecure page erase" "0: Nonsecure page erase disabled,1: Nonsecure page erase enabled"
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bitfld.long 0x8 0. "PG,Nonsecure programming" "0: Nonsecure FLASH programming disabled,1: Nonsecure FLASH programming enabled"
line.long 0xC "FLASH_SCR,FLASH secure control register"
bitfld.long 0xC 31. "LOCK,Secure lock" "0,1"
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bitfld.long 0xC 29. "INV,Flash memory security state invert" "0,1"
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bitfld.long 0xC 25. "ERRIE,Secure error interrupt enable" "0: Secure OPERR error interrupt disabled,1: Secure OPERR error interrupt enabled"
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bitfld.long 0xC 24. "EOPIE,Secure end of operation interrupt enable" "0: Secure EOP Interrupt disabled,1: Secure EOP Interrupt enabled"
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bitfld.long 0xC 16. "STRT,Secure start" "0,1"
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bitfld.long 0xC 15. "MER2,Secure bank 2 mass erase" "0,1"
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bitfld.long 0xC 14. "BWR,Secure burst write programming mode" "0,1"
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bitfld.long 0xC 11. "BKER,Secure bank selection for page erase" "0: Bank 1 selected for secure page erase,1: Bank 2 selected for secure page erase"
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hexmask.long.byte 0xC 3.--9. 1. "PNB,Secure page number selection"
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bitfld.long 0xC 2. "MER1,Secure bank 1 mass erase" "0,1"
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bitfld.long 0xC 1. "PER,Secure page erase" "0: Secure page erase disabled,1: Secure page erase enabled"
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bitfld.long 0xC 0. "PG,Secure programming" "0: Secure FLASH programming disabled,1: Secure FLASH programming enabled"
line.long 0x10 "FLASH_ECCCORR,FLASH ECC register"
bitfld.long 0x10 30. "ECCC,ECC correction" "0,1"
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bitfld.long 0x10 24. "ECCIE,ECC correction interrupt enable" "0: ECCC interrupt disabled,1: ECCC interrupt enabled."
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rbitfld.long 0x10 22. "SYSF_ECC,System flash memory ECC fail" "0,1"
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rbitfld.long 0x10 21. "BK_ECC,ECC fail bank" "0: Bank 1,1: Bank 2"
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hexmask.long.tbyte 0x10 0.--18. 1. "ADDR_ECC,ECC fail address"
line.long 0x14 "FLASH_ECCDETR,FLASH ECC detection register"
bitfld.long 0x14 31. "ECCD,ECC detection" "0,1"
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rbitfld.long 0x14 22. "SYSF_ECC,System flash memory ECC fail" "0,1"
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rbitfld.long 0x14 21. "BK_ECC,ECC fail bank" "0: Bank 1,1: Bank 2"
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hexmask.long.tbyte 0x14 0.--18. 1. "ADDR_ECC,ECC fail address"
rgroup.long 0x38++0x3
line.long 0x0 "FLASH_OPSR,FLASH operation status register"
bitfld.long 0x0 29.--31. "CODE_OP,Flash memory operation code" "0: No flash operation interrupted by previous reset,1: Single write operation interrupted,2: Burst write operation interrupted,3: Page erase operation interrupted,4: Bank erase operation interrupted,5: Mass erase operation interrupted,6: Option change operation interrupted,?"
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bitfld.long 0x0 22. "SYSF_OP,Operation in system flash memory interrupted" "0,1"
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bitfld.long 0x0 21. "BK_OP,Interrupted operation bank" "0: Bank 1,1: Bank 2"
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hexmask.long.tbyte 0x0 0.--18. 1. "ADDR_OP,Interrupted operation address"
group.long 0x40++0x2F
line.long 0x0 "FLASH_OPTR,FLASH option register"
bitfld.long 0x0 31. "TZEN,Global TrustZone security enable" "0: Global TrustZone security disabled,1: Global TrustZone security enabled"
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bitfld.long 0x0 30. "IO_VDDIO2_HSLV,High-speed I/O at low Vless thansub>DDIO2less than/sub> voltage configuration bit" "0: High-speed I/O at low Vless thansub>DDIO2 less..,1: High-speed I/O at low Vless thansub>DDIO2 less.."
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bitfld.long 0x0 29. "IO_VDD_HSLV,High-speed I/O at low Vless thansub>DD less than/sub>voltage configuration bit" "0: High-speed I/O at low Vless thansub>DD less..,1: High-speed I/O at low Vless thansub>DD less.."
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bitfld.long 0x0 27. "NBOOT0,NBOOT0 option bit" "0: NBOOT0 = 0,1: NBOOT0 = 1"
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bitfld.long 0x0 26. "NSWBOOT0,Software BOOT0" "0: BOOT0 taken from the option bit NBOOT0,1: BOOT0 taken from PH3/BOOT0 pin"
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bitfld.long 0x0 25. "SRAM2_RST,SRAM2 erase when system reset" "0: SRAM2 erased when a system reset occurs,1: SRAM2 not erased when a system reset occurs"
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bitfld.long 0x0 24. "SRAM2_PE,SRAM2 parity check enable" "0: SRAM2 parity check enabled,1: SRAM2 parity check disabled"
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bitfld.long 0x0 21. "DUALBANK,Dual-bank on 512-Kbyte flash memory devices" "0: Single-bank FLASH with contiguous address in..,1: Dual-bank FLASH with contiguous addresses"
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bitfld.long 0x0 20. "SWAP_BANK,Swap banks" "0: Bank 1 and bank 2 addresses not swapped,1: Bank 1 and bank 2 addresses swapped"
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bitfld.long 0x0 19. "WWDG_SW,Window watchdog selection" "0: Hardware WWDG selected,1: Software WWDG selected"
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bitfld.long 0x0 18. "IWDG_STDBY,Independent watchdog counter freeze in Standby mode" "0: IWDG counter frozen in Standby mode,1: IWDG counter running in Standby mode"
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bitfld.long 0x0 17. "IWDG_STOP,Independent watchdog counter freeze in Stop mode" "0: IWDG counter frozen in Stop mode,1: IIWDG counter running in Stop mode"
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bitfld.long 0x0 16. "IWDG_SW,Independent watchdog selection" "0: Hardware IWDG selected,1: Software IWDG selected"
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bitfld.long 0x0 15. "SRAM1_RST,SRAM1 erase upon system reset" "0: SRAM1 erased when a system reset occurs,1: SRAM1 not erased when a system reset occurs"
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bitfld.long 0x0 14. "NRST_SHDW,Reset generation in Shutdown mode" "0: Reset generated when entering the Shutdown mode,1: No reset generated when entering the Shutdown mode"
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bitfld.long 0x0 13. "NRST_STDBY,Reset generation in Standby mode" "0: Reset generated when entering the Standby mode,1: No reset generate when entering the Standby mode"
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bitfld.long 0x0 12. "NRST_STOP,Reset generation in Stop mode" "0: Reset generated when entering the Stop mode,1: No reset generated when entering the Stop mode"
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bitfld.long 0x0 11. "BDRST_POR,Backup domain reset with power-on reset" "0: The backup domain is not reset after a Vless..,1: The backup domain is reset after a Vless.."
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bitfld.long 0x0 8.--10. "BOR_LEV,BOR reset level" "0: BOR level 0 (reset level threshold around 1.,1: BOR level 1 (reset level threshold around 2.,2: BOR level 2 (reset level threshold around 2.,3: BOR level 3 (reset level threshold around 2.,4: BOR level 4 (reset level threshold around 2.,?,?,?"
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hexmask.long.byte 0x0 0.--7. 1. "RDP,Readout protection level"
line.long 0x4 "FLASH_BOOT0R,FLASH nonsecure boot address 0 register"
hexmask.long 0x4 7.--31. 1. "ADD,Nonsecure boot base address 0"
line.long 0x8 "FLASH_BOOT1R,FLASH nonsecure boot address 1 register"
hexmask.long 0x8 7.--31. 1. "ADD,nonsecure boot address 1"
line.long 0xC "FLASH_SBOOT0R,FLASH secure boot address 0 register"
hexmask.long 0xC 7.--31. 1. "ADD,Secure boot base address 0"
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bitfld.long 0xC 0. "BOOT_LOCK,Boot lock" "0,1"
line.long 0x10 "FLASH_SECWM1R1,FLASH secure watermark1 register 1"
hexmask.long.byte 0x10 16.--22. 1. "SECWM1_END,End page of first secure area"
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hexmask.long.byte 0x10 0.--6. 1. "SECWM1_STRT,Start page of first secure area"
line.long 0x14 "FLASH_SECWM1R2,FLASH secure watermark1 register 2"
hexmask.long.byte 0x14 24.--31. 1. "HDP1EN,Hide protection first area enable"
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hexmask.long.byte 0x14 16.--22. 1. "HDP1_END,End page of first hide protection area"
line.long 0x18 "FLASH_WRP1AR,FLASH WRP1 area A address register"
bitfld.long 0x18 31. "UNLOCK,Bank 1 WPR first area A unlock" "0: WRP1A start and end pages locked,1: WRP1A start and end pages unlocked"
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hexmask.long.byte 0x18 16.--22. 1. "END,Bank 1 WPR first area A end page"
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hexmask.long.byte 0x18 0.--6. 1. "STRT,Bank 1 WPR first area A start page"
line.long 0x1C "FLASH_WRP1BR,FLASH WRP1 area B address register"
bitfld.long 0x1C 31. "UNLOCK,Bank 1 WPR second area B unlock" "0: WRP1B start and end pages locked,1: WRP1B start and end pages unlocked"
newline
hexmask.long.byte 0x1C 16.--22. 1. "END,Bank 1 WRP second area B end page"
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hexmask.long.byte 0x1C 0.--6. 1. "STRT,Bank 1 WRP second area B start page"
line.long 0x20 "FLASH_SECWM2R1,FLASH secure watermark2 register 1"
hexmask.long.byte 0x20 16.--22. 1. "SECWM2_END,End page of second secure area"
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hexmask.long.byte 0x20 0.--6. 1. "SECWM2_STRT,Start page of second secure area"
line.long 0x24 "FLASH_SECWM2R2,FLASH secure watermark2 register 2"
hexmask.long.byte 0x24 24.--31. 1. "HDP2EN,Hide protection second area enable"
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hexmask.long.byte 0x24 16.--22. 1. "HDP2_END,End page of hide protection second area"
line.long 0x28 "FLASH_WRP2AR,FLASH WPR2 area A address register"
bitfld.long 0x28 31. "UNLOCK,Bank 2 WPR first area A unlock" "0: WRP2A start and end pages locked,1: WRP2A start and end pages unlocked"
newline
hexmask.long.byte 0x28 16.--22. 1. "END,Bank 2 WPR first area A end page"
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hexmask.long.byte 0x28 0.--6. 1. "STRT,Bank 2 WPR first area A start page"
line.long 0x2C "FLASH_WRP2BR,FLASH WPR2 area B address register"
bitfld.long 0x2C 31. "UNLOCK,Bank 2 WPR second area B unlock" "0: WRP2B start and end pages locked,1: WRP2B start and end pages unlocked"
newline
hexmask.long.byte 0x2C 16.--22. 1. "END,Bank 2 WPR second area B end page"
newline
hexmask.long.byte 0x2C 0.--6. 1. "STRT,Bank 2 WPR second area B start page"
group.long 0x80++0xF
line.long 0x0 "FLASH_SECBB1R1,FLASH secure block based bank 1 register 1"
bitfld.long 0x0 31. "SEC31,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 30. "SEC30,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 29. "SEC29,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 28. "SEC28,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 27. "SEC27,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 26. "SEC26,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
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bitfld.long 0x0 25. "SEC25,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 24. "SEC24,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 23. "SEC23,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 22. "SEC22,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 21. "SEC21,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 20. "SEC20,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 19. "SEC19,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 18. "SEC18,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 17. "SEC17,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 16. "SEC16,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 15. "SEC15,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 14. "SEC14,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 13. "SEC13,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 12. "SEC12,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 11. "SEC11,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 10. "SEC10,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 9. "SEC9,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 8. "SEC8,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 7. "SEC7,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 6. "SEC6,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 5. "SEC5,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 4. "SEC4,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 3. "SEC3,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 2. "SEC2,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 1. "SEC1,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x0 0. "SEC0,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
line.long 0x4 "FLASH_SECBB1R2,FLASH secure block based bank 1 register 2"
bitfld.long 0x4 31. "SEC31,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 30. "SEC30,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 29. "SEC29,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 28. "SEC28,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 27. "SEC27,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 26. "SEC26,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 25. "SEC25,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 24. "SEC24,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 23. "SEC23,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 22. "SEC22,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 21. "SEC21,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 20. "SEC20,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 19. "SEC19,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 18. "SEC18,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 17. "SEC17,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 16. "SEC16,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 15. "SEC15,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 14. "SEC14,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 13. "SEC13,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 12. "SEC12,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 11. "SEC11,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 10. "SEC10,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 9. "SEC9,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 8. "SEC8,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 7. "SEC7,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 6. "SEC6,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 5. "SEC5,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 4. "SEC4,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 3. "SEC3,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 2. "SEC2,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 1. "SEC1,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x4 0. "SEC0,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
line.long 0x8 "FLASH_SECBB1R3,FLASH secure block based bank 1 register 3"
bitfld.long 0x8 31. "SEC31,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 30. "SEC30,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 29. "SEC29,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 28. "SEC28,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 27. "SEC27,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 26. "SEC26,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 25. "SEC25,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 24. "SEC24,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 23. "SEC23,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 22. "SEC22,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 21. "SEC21,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 20. "SEC20,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 19. "SEC19,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 18. "SEC18,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 17. "SEC17,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 16. "SEC16,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 15. "SEC15,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 14. "SEC14,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 13. "SEC13,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 12. "SEC12,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 11. "SEC11,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 10. "SEC10,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 9. "SEC9,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 8. "SEC8,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 7. "SEC7,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 6. "SEC6,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 5. "SEC5,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 4. "SEC4,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 3. "SEC3,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 2. "SEC2,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 1. "SEC1,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0x8 0. "SEC0,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
line.long 0xC "FLASH_SECBB1R4,FLASH secure block based bank 1 register 4"
bitfld.long 0xC 31. "SEC31,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 30. "SEC30,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 29. "SEC29,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 28. "SEC28,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 27. "SEC27,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 26. "SEC26,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 25. "SEC25,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 24. "SEC24,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 23. "SEC23,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 22. "SEC22,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 21. "SEC21,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 20. "SEC20,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 19. "SEC19,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 18. "SEC18,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 17. "SEC17,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 16. "SEC16,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 15. "SEC15,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 14. "SEC14,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 13. "SEC13,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 12. "SEC12,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 11. "SEC11,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 10. "SEC10,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 9. "SEC9,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 8. "SEC8,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 7. "SEC7,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 6. "SEC6,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 5. "SEC5,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 4. "SEC4,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 3. "SEC3,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 2. "SEC2,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 1. "SEC1,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
newline
bitfld.long 0xC 0. "SEC0,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 1 not block-based..,1: Page (32 x (x-1) + i) in bank 1 block-based secure"
group.long 0xA0++0xF
line.long 0x0 "FLASH_SECBB2R1,FLASH secure block based bank 2 register 1"
bitfld.long 0x0 31. "SEC31,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 30. "SEC30,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 29. "SEC29,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 28. "SEC28,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 27. "SEC27,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 26. "SEC26,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 25. "SEC25,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 24. "SEC24,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 23. "SEC23,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 22. "SEC22,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 21. "SEC21,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 20. "SEC20,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 19. "SEC19,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 18. "SEC18,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 17. "SEC17,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 16. "SEC16,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 15. "SEC15,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 14. "SEC14,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 13. "SEC13,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 12. "SEC12,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 11. "SEC11,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 10. "SEC10,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 9. "SEC9,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 8. "SEC8,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 7. "SEC7,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 6. "SEC6,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 5. "SEC5,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 4. "SEC4,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 3. "SEC3,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 2. "SEC2,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 1. "SEC1,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x0 0. "SEC0,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
line.long 0x4 "FLASH_SECBB2R2,FLASH secure block based bank 2 register 2"
bitfld.long 0x4 31. "SEC31,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 30. "SEC30,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 29. "SEC29,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 28. "SEC28,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 27. "SEC27,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 26. "SEC26,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 25. "SEC25,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 24. "SEC24,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 23. "SEC23,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 22. "SEC22,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 21. "SEC21,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 20. "SEC20,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 19. "SEC19,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 18. "SEC18,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 17. "SEC17,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 16. "SEC16,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 15. "SEC15,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 14. "SEC14,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 13. "SEC13,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 12. "SEC12,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 11. "SEC11,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 10. "SEC10,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 9. "SEC9,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 8. "SEC8,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 7. "SEC7,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 6. "SEC6,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 5. "SEC5,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 4. "SEC4,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 3. "SEC3,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 2. "SEC2,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 1. "SEC1,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x4 0. "SEC0,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
line.long 0x8 "FLASH_SECBB2R3,FLASH secure block based bank 2 register 3"
bitfld.long 0x8 31. "SEC31,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 30. "SEC30,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 29. "SEC29,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 28. "SEC28,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 27. "SEC27,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 26. "SEC26,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 25. "SEC25,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 24. "SEC24,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 23. "SEC23,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 22. "SEC22,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 21. "SEC21,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 20. "SEC20,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 19. "SEC19,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 18. "SEC18,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 17. "SEC17,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 16. "SEC16,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 15. "SEC15,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 14. "SEC14,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 13. "SEC13,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 12. "SEC12,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 11. "SEC11,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 10. "SEC10,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 9. "SEC9,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 8. "SEC8,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 7. "SEC7,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 6. "SEC6,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 5. "SEC5,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 4. "SEC4,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 3. "SEC3,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 2. "SEC2,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 1. "SEC1,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
newline
bitfld.long 0x8 0. "SEC0,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
line.long 0xC "FLASH_SECBB2R4,FLASH secure block based bank 2 register 4"
bitfld.long 0xC 31. "SEC31,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 30. "SEC30,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 29. "SEC29,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 28. "SEC28,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 27. "SEC27,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 26. "SEC26,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 25. "SEC25,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 24. "SEC24,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 23. "SEC23,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 22. "SEC22,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 21. "SEC21,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 20. "SEC20,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 19. "SEC19,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 18. "SEC18,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 17. "SEC17,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 16. "SEC16,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 15. "SEC15,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 14. "SEC14,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 13. "SEC13,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 12. "SEC12,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 11. "SEC11,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 10. "SEC10,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 9. "SEC9,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 8. "SEC8,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 7. "SEC7,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 6. "SEC6,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 5. "SEC5,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 4. "SEC4,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 3. "SEC3,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 2. "SEC2,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 1. "SEC1,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
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bitfld.long 0xC 0. "SEC0,Page secure/nonsecure attribution" "0: Page (32 x (x-1) + i) in bank 2 not block-based..,1: Page (32 x (x-1) + i) in bank 2 block-based secure"
group.long 0xC0++0xB
line.long 0x0 "FLASH_SECHDPCR,FLASH secure HDP control register"
hexmask.long.byte 0x0 24.--31. 1. "HDP2ExT_ACCDIS,HDP2 extension area access disable"
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hexmask.long.byte 0x0 16.--23. 1. "HDP1ExT_ACCDIS,HDP1 extension area access disable"
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hexmask.long.byte 0x0 8.--15. 1. "HDP2_ACCDIS,HDP2 area access disable"
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hexmask.long.byte 0x0 0.--7. 1. "HDP1_ACCDIS,HDP1 area access disable"
line.long 0x4 "FLASH_PRIVCFGR,FLASH privilege configuration register"
bitfld.long 0x4 1. "PRIV,Privileged protection for nonsecure registers" "0: Nonsecure FLASH registers can be read and..,1: Nonsecure FLASH registers can be read and.."
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bitfld.long 0x4 0. "SPRIV,Privileged protection for secure registers" "0: Secure FLASH registers can be read and written..,1: Secure FLASH registers can be read and written.."
line.long 0x8 "FLASH_SECHDPExTR,FLASH HDP extension register"
hexmask.long.byte 0x8 16.--23. 1. "HDP2_ExT,HDP area extension in 4-Kbyte pages in bank 2"
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hexmask.long.byte 0x8 0.--7. 1. "HDP1_ExT,HDP area extension in 4-Kbyte pages in bank 1"
group.long 0xD0++0xF
line.long 0x0 "FLASH_PRIVBB1R1,FLASH privilege block-based bank 1 register 1"
bitfld.long 0x0 31. "PRIV31,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 30. "PRIV30,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 29. "PRIV29,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 28. "PRIV28,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 27. "PRIV27,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 26. "PRIV26,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 25. "PRIV25,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 24. "PRIV24,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 23. "PRIV23,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 22. "PRIV22,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 21. "PRIV21,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 20. "PRIV20,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 19. "PRIV19,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 18. "PRIV18,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 17. "PRIV17,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 16. "PRIV16,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 15. "PRIV15,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 14. "PRIV14,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 13. "PRIV13,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 12. "PRIV12,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 11. "PRIV11,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 10. "PRIV10,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 9. "PRIV9,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 8. "PRIV8,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 7. "PRIV7,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 6. "PRIV6,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 5. "PRIV5,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 4. "PRIV4,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 3. "PRIV3,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 2. "PRIV2,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 1. "PRIV1,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x0 0. "PRIV0,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
line.long 0x4 "FLASH_PRIVBB1R2,FLASH privilege block-based bank 1 register 2"
bitfld.long 0x4 31. "PRIV31,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 30. "PRIV30,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 29. "PRIV29,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 28. "PRIV28,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 27. "PRIV27,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 26. "PRIV26,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 25. "PRIV25,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 24. "PRIV24,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 23. "PRIV23,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 22. "PRIV22,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 21. "PRIV21,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 20. "PRIV20,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 19. "PRIV19,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 18. "PRIV18,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 17. "PRIV17,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 16. "PRIV16,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 15. "PRIV15,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 14. "PRIV14,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 13. "PRIV13,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 12. "PRIV12,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 11. "PRIV11,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 10. "PRIV10,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 9. "PRIV9,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 8. "PRIV8,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 7. "PRIV7,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 6. "PRIV6,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 5. "PRIV5,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 4. "PRIV4,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 3. "PRIV3,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 2. "PRIV2,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 1. "PRIV1,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x4 0. "PRIV0,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
line.long 0x8 "FLASH_PRIVBB1R3,FLASH privilege block-based bank 1 register 3"
bitfld.long 0x8 31. "PRIV31,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x8 30. "PRIV30,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x8 29. "PRIV29,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x8 28. "PRIV28,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x8 27. "PRIV27,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x8 26. "PRIV26,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
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bitfld.long 0x8 25. "PRIV25,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 24. "PRIV24,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 23. "PRIV23,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 22. "PRIV22,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 21. "PRIV21,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 20. "PRIV20,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 19. "PRIV19,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 18. "PRIV18,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 17. "PRIV17,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 16. "PRIV16,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 15. "PRIV15,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 14. "PRIV14,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 13. "PRIV13,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 12. "PRIV12,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 11. "PRIV11,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 10. "PRIV10,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 9. "PRIV9,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 8. "PRIV8,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 7. "PRIV7,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 6. "PRIV6,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 5. "PRIV5,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 4. "PRIV4,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 3. "PRIV3,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 2. "PRIV2,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 1. "PRIV1,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0x8 0. "PRIV0,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
line.long 0xC "FLASH_PRIVBB1R4,FLASH privilege block-based bank 1 register 4"
bitfld.long 0xC 31. "PRIV31,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 30. "PRIV30,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 29. "PRIV29,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 28. "PRIV28,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 27. "PRIV27,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 26. "PRIV26,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 25. "PRIV25,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 24. "PRIV24,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 23. "PRIV23,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 22. "PRIV22,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 21. "PRIV21,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 20. "PRIV20,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 19. "PRIV19,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 18. "PRIV18,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 17. "PRIV17,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 16. "PRIV16,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 15. "PRIV15,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 14. "PRIV14,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 13. "PRIV13,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 12. "PRIV12,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 11. "PRIV11,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 10. "PRIV10,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 9. "PRIV9,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 8. "PRIV8,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 7. "PRIV7,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 6. "PRIV6,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 5. "PRIV5,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 4. "PRIV4,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 3. "PRIV3,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 2. "PRIV2,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 1. "PRIV1,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
newline
bitfld.long 0xC 0. "PRIV0,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 1 accessible by..,1: Page (32 x (x-1) + i) in bank 1 only accessible.."
group.long 0xF0++0xF
line.long 0x0 "FLASH_PRIVBB2R1,FLASH privilege block based bank 2 register 1"
bitfld.long 0x0 31. "PRIV31,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 30. "PRIV30,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 29. "PRIV29,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 28. "PRIV28,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 27. "PRIV27,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 26. "PRIV26,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 25. "PRIV25,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 24. "PRIV24,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 23. "PRIV23,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 22. "PRIV22,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 21. "PRIV21,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 20. "PRIV20,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 19. "PRIV19,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 18. "PRIV18,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 17. "PRIV17,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 16. "PRIV16,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 15. "PRIV15,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 14. "PRIV14,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 13. "PRIV13,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 12. "PRIV12,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 11. "PRIV11,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 10. "PRIV10,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 9. "PRIV9,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 8. "PRIV8,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 7. "PRIV7,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 6. "PRIV6,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 5. "PRIV5,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 4. "PRIV4,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 3. "PRIV3,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 2. "PRIV2,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 1. "PRIV1,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x0 0. "PRIV0,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
line.long 0x4 "FLASH_PRIVBB2R2,FLASH privilege block based bank 2 register 2"
bitfld.long 0x4 31. "PRIV31,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 30. "PRIV30,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 29. "PRIV29,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 28. "PRIV28,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 27. "PRIV27,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 26. "PRIV26,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 25. "PRIV25,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 24. "PRIV24,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 23. "PRIV23,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 22. "PRIV22,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 21. "PRIV21,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 20. "PRIV20,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 19. "PRIV19,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 18. "PRIV18,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 17. "PRIV17,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 16. "PRIV16,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 15. "PRIV15,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 14. "PRIV14,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 13. "PRIV13,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 12. "PRIV12,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 11. "PRIV11,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 10. "PRIV10,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 9. "PRIV9,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 8. "PRIV8,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 7. "PRIV7,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 6. "PRIV6,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 5. "PRIV5,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 4. "PRIV4,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 3. "PRIV3,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 2. "PRIV2,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 1. "PRIV1,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x4 0. "PRIV0,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
line.long 0x8 "FLASH_PRIVBB2R3,FLASH privilege block based bank 2 register 3"
bitfld.long 0x8 31. "PRIV31,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 30. "PRIV30,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 29. "PRIV29,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 28. "PRIV28,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 27. "PRIV27,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 26. "PRIV26,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 25. "PRIV25,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 24. "PRIV24,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 23. "PRIV23,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 22. "PRIV22,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 21. "PRIV21,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 20. "PRIV20,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 19. "PRIV19,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 18. "PRIV18,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 17. "PRIV17,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 16. "PRIV16,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 15. "PRIV15,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 14. "PRIV14,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 13. "PRIV13,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 12. "PRIV12,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 11. "PRIV11,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 10. "PRIV10,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 9. "PRIV9,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 8. "PRIV8,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 7. "PRIV7,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 6. "PRIV6,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 5. "PRIV5,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 4. "PRIV4,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 3. "PRIV3,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 2. "PRIV2,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 1. "PRIV1,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0x8 0. "PRIV0,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
line.long 0xC "FLASH_PRIVBB2R4,FLASH privilege block based bank 2 register 4"
bitfld.long 0xC 31. "PRIV31,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 30. "PRIV30,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 29. "PRIV29,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 28. "PRIV28,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 27. "PRIV27,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 26. "PRIV26,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 25. "PRIV25,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 24. "PRIV24,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 23. "PRIV23,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 22. "PRIV22,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 21. "PRIV21,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 20. "PRIV20,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 19. "PRIV19,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 18. "PRIV18,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 17. "PRIV17,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 16. "PRIV16,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 15. "PRIV15,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 14. "PRIV14,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 13. "PRIV13,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 12. "PRIV12,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 11. "PRIV11,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 10. "PRIV10,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 9. "PRIV9,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 8. "PRIV8,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 7. "PRIV7,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 6. "PRIV6,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 5. "PRIV5,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 4. "PRIV4,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 3. "PRIV3,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 2. "PRIV2,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 1. "PRIV1,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
newline
bitfld.long 0xC 0. "PRIV0,Page privileged/unprivileged attribution" "0: Page (32 x (x-1) + i) in bank 2 accessible by..,1: Page (32 x (x-1) + i) in bank 2 only accessible.."
wgroup.long 0x110++0x1F
line.long 0x0 "FLASH_OEM1KEYR1,FLASH OEM1 key register 1"
hexmask.long 0x0 0.--31. 1. "OEM1KEY,OEM1[31:0] bytes key"
line.long 0x4 "FLASH_OEM1KEYR2,FLASH OEM1 key register 2"
hexmask.long 0x4 0.--31. 1. "OEM1KEY,OEM1[63:32] bytes key"
line.long 0x8 "FLASH_OEM1KEYR3,FLASH OEM1 key register 3"
hexmask.long 0x8 0.--31. 1. "OEM1KEY,OEM1[95:64] bytes key"
line.long 0xC "FLASH_OEM1KEYR4,FLASH OEM1 key register 4"
hexmask.long 0xC 0.--31. 1. "OEM1KEY,OEM1[127:96] bytes key"
line.long 0x10 "FLASH_OEM2KEYR1,FLASH OEM2 key register 1"
hexmask.long 0x10 0.--31. 1. "OEM2KEY,OEM2[31:0] bytes key"
line.long 0x14 "FLASH_OEM2KEYR2,FLASH OEM2 key register 2"
hexmask.long 0x14 0.--31. 1. "OEM2KEY,OEM2[63:32] bytes key"
line.long 0x18 "FLASH_OEM2KEYR3,FLASH OEM2 key register 3"
hexmask.long 0x18 0.--31. 1. "OEM2KEY,OEM2[95:64] bytes key"
line.long 0x1C "FLASH_OEM2KEYR4,FLASH OEM2 key register 4"
hexmask.long 0x1C 0.--31. 1. "OEM2KEY,OEM2[127:96] bytes key"
rgroup.long 0x130++0x3
line.long 0x0 "FLASH_OEMKEYSR,FLASH OEM key status register"
hexmask.long.byte 0x0 16.--23. 1. "OEM2KEYCRC,8-bit OEM2KEY CRC"
newline
hexmask.long.byte 0x0 0.--7. 1. "OEM1KEYCRC,8-bit OEMKEY1 CRC"
tree.end
tree.end
tree "GPDMA (General Purpose Direct Memory Access Controller)"
base ad:0x0
tree "GPDMA1"
base ad:0x40020000
group.long 0x0++0xB
line.long 0x0 "GPDMA_SECCFGR,GPDMA secure configuration register"
bitfld.long 0x0 11. "SEC11,None" "0: non-secure,1: secure"
bitfld.long 0x0 10. "SEC10,None" "0: non-secure,1: secure"
newline
bitfld.long 0x0 9. "SEC9,None" "0: non-secure,1: secure"
bitfld.long 0x0 8. "SEC8,None" "0: non-secure,1: secure"
newline
bitfld.long 0x0 7. "SEC7,None" "0: non-secure,1: secure"
bitfld.long 0x0 6. "SEC6,None" "0: non-secure,1: secure"
newline
bitfld.long 0x0 5. "SEC5,None" "0: non-secure,1: secure"
bitfld.long 0x0 4. "SEC4,None" "0: non-secure,1: secure"
newline
bitfld.long 0x0 3. "SEC3,None" "0: non-secure,1: secure"
bitfld.long 0x0 2. "SEC2,None" "0: non-secure,1: secure"
newline
bitfld.long 0x0 1. "SEC1,None" "0: non-secure,1: secure"
bitfld.long 0x0 0. "SEC0,None" "0: non-secure,1: secure"
line.long 0x4 "GPDMA_PRIVCFGR,GPDMA privileged configuration register"
bitfld.long 0x4 11. "PRIV11,None" "0: unprivileged,1: privileged"
bitfld.long 0x4 10. "PRIV10,None" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 9. "PRIV9,None" "0: unprivileged,1: privileged"
bitfld.long 0x4 8. "PRIV8,None" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 7. "PRIV7,None" "0: unprivileged,1: privileged"
bitfld.long 0x4 6. "PRIV6,None" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 5. "PRIV5,None" "0: unprivileged,1: privileged"
bitfld.long 0x4 4. "PRIV4,None" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 3. "PRIV3,None" "0: unprivileged,1: privileged"
bitfld.long 0x4 2. "PRIV2,None" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 1. "PRIV1,None" "0: unprivileged,1: privileged"
bitfld.long 0x4 0. "PRIV0,None" "0: unprivileged,1: privileged"
line.long 0x8 "GPDMA_RCFGLOCKR,GPDMA configuration lock register"
bitfld.long 0x8 11. "LOCK11,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 11..,1: secure privilege configuration of the channel 11.."
bitfld.long 0x8 10. "LOCK10,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 10..,1: secure privilege configuration of the channel 10.."
newline
bitfld.long 0x8 9. "LOCK9,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 9..,1: secure privilege configuration of the channel 9.."
bitfld.long 0x8 8. "LOCK8,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 8..,1: secure privilege configuration of the channel 8.."
newline
bitfld.long 0x8 7. "LOCK7,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 7..,1: secure privilege configuration of the channel 7.."
bitfld.long 0x8 6. "LOCK6,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 6..,1: secure privilege configuration of the channel 6.."
newline
bitfld.long 0x8 5. "LOCK5,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 5..,1: secure privilege configuration of the channel 5.."
bitfld.long 0x8 4. "LOCK4,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 4..,1: secure privilege configuration of the channel 4.."
newline
bitfld.long 0x8 3. "LOCK3,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 3..,1: secure privilege configuration of the channel 3.."
bitfld.long 0x8 2. "LOCK2,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 2..,1: secure privilege configuration of the channel 2.."
newline
bitfld.long 0x8 1. "LOCK1,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 1..,1: secure privilege configuration of the channel 1.."
bitfld.long 0x8 0. "LOCK0,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 0..,1: secure privilege configuration of the channel 0.."
rgroup.long 0xC++0x7
line.long 0x0 "GPDMA_MISR,GPDMA non-secure masked interrupt status register"
bitfld.long 0x0 11. "MIS11,None" "0: no interrupt occurred on channel 11,1: an interrupt occurred on channel 11"
bitfld.long 0x0 10. "MIS10,None" "0: no interrupt occurred on channel 10,1: an interrupt occurred on channel 10"
newline
bitfld.long 0x0 9. "MIS9,None" "0: no interrupt occurred on channel 9,1: an interrupt occurred on channel 9"
bitfld.long 0x0 8. "MIS8,None" "0: no interrupt occurred on channel 8,1: an interrupt occurred on channel 8"
newline
bitfld.long 0x0 7. "MIS7,None" "0: no interrupt occurred on channel 7,1: an interrupt occurred on channel 7"
bitfld.long 0x0 6. "MIS6,None" "0: no interrupt occurred on channel 6,1: an interrupt occurred on channel 6"
newline
bitfld.long 0x0 5. "MIS5,None" "0: no interrupt occurred on channel 5,1: an interrupt occurred on channel 5"
bitfld.long 0x0 4. "MIS4,None" "0: no interrupt occurred on channel 4,1: an interrupt occurred on channel 4"
newline
bitfld.long 0x0 3. "MIS3,None" "0: no interrupt occurred on channel 3,1: an interrupt occurred on channel 3"
bitfld.long 0x0 2. "MIS2,None" "0: no interrupt occurred on channel 2,1: an interrupt occurred on channel 2"
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bitfld.long 0x0 1. "MIS1,None" "0: no interrupt occurred on channel 1,1: an interrupt occurred on channel 1"
bitfld.long 0x0 0. "MIS0,None" "0: no interrupt occurred on channel 0,1: an interrupt occurred on channel 0"
line.long 0x4 "GPDMA_SMISR,GPDMA secure masked interrupt status register"
bitfld.long 0x4 11. "MIS11,None" "0: no interrupt occurred on the secure channel 11,1: an interrupt occurred on the secure channel 11"
bitfld.long 0x4 10. "MIS10,None" "0: no interrupt occurred on the secure channel 10,1: an interrupt occurred on the secure channel 10"
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bitfld.long 0x4 9. "MIS9,None" "0: no interrupt occurred on the secure channel 9,1: an interrupt occurred on the secure channel 9"
bitfld.long 0x4 8. "MIS8,None" "0: no interrupt occurred on the secure channel 8,1: an interrupt occurred on the secure channel 8"
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bitfld.long 0x4 7. "MIS7,None" "0: no interrupt occurred on the secure channel 7,1: an interrupt occurred on the secure channel 7"
bitfld.long 0x4 6. "MIS6,None" "0: no interrupt occurred on the secure channel 6,1: an interrupt occurred on the secure channel 6"
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bitfld.long 0x4 5. "MIS5,None" "0: no interrupt occurred on the secure channel 5,1: an interrupt occurred on the secure channel 5"
bitfld.long 0x4 4. "MIS4,None" "0: no interrupt occurred on the secure channel 4,1: an interrupt occurred on the secure channel 4"
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bitfld.long 0x4 3. "MIS3,None" "0: no interrupt occurred on the secure channel 3,1: an interrupt occurred on the secure channel 3"
bitfld.long 0x4 2. "MIS2,None" "0: no interrupt occurred on the secure channel 2,1: an interrupt occurred on the secure channel 2"
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bitfld.long 0x4 1. "MIS1,None" "0: no interrupt occurred on the secure channel 1,1: an interrupt occurred on the secure channel 1"
bitfld.long 0x4 0. "MIS0,None" "0: no interrupt occurred on the secure channel 0,1: an interrupt occurred on the secure channel 0"
group.long 0x50++0x3
line.long 0x0 "GPDMA_C0LBAR,GPDMA channel 0 linked-list base address register"
hexmask.long.word 0x0 16.--31. 1. "LBA,None"
wgroup.long 0x5C++0x3
line.long 0x0 "GPDMA_C0FCR,GPDMA channel 0 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x60++0x3
line.long 0x0 "GPDMA_C0SR,GPDMA channel 0 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C0TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C0TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C0CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x64++0x3
line.long 0x0 "GPDMA_C0CR,GPDMA channel 0 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C0BR1.BNDT[15:0] = 0 and GPDMA_C0BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
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bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x90++0x13
line.long 0x0 "GPDMA_C0TR1,GPDMA channel 0 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC0 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
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bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
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hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
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bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC0 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
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bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
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bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C0TR2,GPDMA channel 0 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 0,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
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hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: 0 to,1: channel,?,?"
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bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 0 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 0 is activated (GPDMA_C0CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
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bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 0 is activated (GPDMA_C0CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C0CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
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hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 0 is activated (GPDMA_C0CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4 [GPDMA_requests]/>."
line.long 0x8 "GPDMA_C0BR1,GPDMA channel 0 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
line.long 0xC "GPDMA_C0SAR,GPDMA channel 0 source address register"
hexmask.long 0xC 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x10 "GPDMA_C0DAR,GPDMA channel 0 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
group.long 0xCC++0x7
line.long 0x0 "GPDMA_C0LLR,GPDMA channel 0 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C0TR1 from the memory during the link transfer." "0: no GPDMA_C0TR1 update,1: GPDMA_C0TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C0TR2 from the memory during the link transfer." "0: no GPDMA_C0TR2 update,1: GPDMA_C0TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C0BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C0LLR is not equal to 0 the linked-list is not completed. GPDMA_C0BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C0BR1 update from memory,1: GPDMA_C0BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C0LLR from the memory during the link transfer." "0: no GPDMA_C0LLR update,1: GPDMA_C0LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
line.long 0x4 "GPDMA_C1LBAR,GPDMA channel 1 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,None"
wgroup.long 0xDC++0x3
line.long 0x0 "GPDMA_C1FCR,GPDMA channel 1 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
newline
bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
newline
bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
newline
bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0xE0++0x3
line.long 0x0 "GPDMA_C1SR,GPDMA channel 1 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C1TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
newline
bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
newline
bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
newline
bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C1TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
newline
bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C1CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0xE4++0x3
line.long 0x0 "GPDMA_C1CR,GPDMA channel 1 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
newline
bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C1BR1.BNDT[15:0] = 0 and GPDMA_C1BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
newline
bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x110++0x13
line.long 0x0 "GPDMA_C1TR1,GPDMA channel 1 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC1 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
newline
bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
newline
hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
newline
bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC1 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
newline
bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
newline
bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C1TR2,GPDMA channel 1 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 1,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
newline
hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: 0 to,?,?"
newline
bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 1 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 1 is activated (GPDMA_C1CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
newline
bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 1 is activated (GPDMA_C1CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C1CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
newline
hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 1 is activated (GPDMA_C1CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4 [GPDMA_requests]/>."
line.long 0x8 "GPDMA_C1BR1,GPDMA channel 1 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
line.long 0xC "GPDMA_C1SAR,GPDMA channel 1 source address register"
hexmask.long 0xC 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x10 "GPDMA_C1DAR,GPDMA channel 1 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
group.long 0x14C++0x7
line.long 0x0 "GPDMA_C1LLR,GPDMA channel 1 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C1TR1 from the memory during the link transfer." "0: no GPDMA_C1TR1 update,1: GPDMA_C1TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C1TR2 from the memory during the link transfer." "0: no GPDMA_C1TR2 update,1: GPDMA_C1TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C1BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C1LLR is not equal to 0 the linked-list is not completed. GPDMA_C1BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C1BR1 update from memory,1: GPDMA_C1BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C1LLR from the memory during the link transfer." "0: no GPDMA_C1LLR update,1: GPDMA_C1LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
line.long 0x4 "GPDMA_C2LBAR,GPDMA channel 2 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,None"
wgroup.long 0x15C++0x3
line.long 0x0 "GPDMA_C2FCR,GPDMA channel 2 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x160++0x3
line.long 0x0 "GPDMA_C2SR,GPDMA channel 2 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C2TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C2TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C2CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x164++0x3
line.long 0x0 "GPDMA_C2CR,GPDMA channel 2 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C2BR1.BNDT[15:0] = 0 and GPDMA_C2BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
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bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x190++0x13
line.long 0x0 "GPDMA_C2TR1,GPDMA channel 2 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC2 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
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bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
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hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
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bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC2 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
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bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
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bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
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bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C2TR2,GPDMA channel 2 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 2,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
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hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: channel,2: 0 to,?"
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bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 2 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 2 is activated (GPDMA_C2CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
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bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 2 is activated (GPDMA_C2CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C2CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
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hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 2 is activated (GPDMA_C2CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4 [GPDMA_requests]/>."
line.long 0x8 "GPDMA_C2BR1,GPDMA channel 2 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
line.long 0xC "GPDMA_C2SAR,GPDMA channel 2 source address register"
hexmask.long 0xC 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x10 "GPDMA_C2DAR,GPDMA channel 2 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
group.long 0x1CC++0x7
line.long 0x0 "GPDMA_C2LLR,GPDMA channel 2 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C2TR1 from the memory during the link transfer." "0: no GPDMA_C2TR1 update,1: GPDMA_C2TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C2TR2 from the memory during the link transfer." "0: no GPDMA_C2TR2 update,1: GPDMA_C2TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C2BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C2LLR is not equal to 0 the linked-list is not completed. GPDMA_C2BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C2BR1 update from memory,1: GPDMA_C2BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C2LLR from the memory during the link transfer." "0: no GPDMA_C2LLR update,1: GPDMA_C2LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
line.long 0x4 "GPDMA_C3LBAR,GPDMA channel 3 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,None"
wgroup.long 0x1DC++0x3
line.long 0x0 "GPDMA_C3FCR,GPDMA channel 3 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x1E0++0x3
line.long 0x0 "GPDMA_C3SR,GPDMA channel 3 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C3TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C3TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C3CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x1E4++0x3
line.long 0x0 "GPDMA_C3CR,GPDMA channel 3 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C3BR1.BNDT[15:0] = 0 and GPDMA_C3BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
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bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x210++0x13
line.long 0x0 "GPDMA_C3TR1,GPDMA channel 3 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC3 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
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bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
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hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
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bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC3 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
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bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
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bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
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bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C3TR2,GPDMA channel 3 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 3,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
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hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: channel,?,3: 0 to"
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bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 3 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 3 is activated (GPDMA_C3CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
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bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 3 is activated (GPDMA_C3CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C3CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
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hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 3 is activated (GPDMA_C3CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4 [GPDMA_requests]/>."
line.long 0x8 "GPDMA_C3BR1,GPDMA channel 3 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
line.long 0xC "GPDMA_C3SAR,GPDMA channel 3 source address register"
hexmask.long 0xC 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x10 "GPDMA_C3DAR,GPDMA channel 3 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
group.long 0x24C++0x7
line.long 0x0 "GPDMA_C3LLR,GPDMA channel 3 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C3TR1 from the memory during the link transfer." "0: no GPDMA_C3TR1 update,1: GPDMA_C3TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C3TR2 from the memory during the link transfer." "0: no GPDMA_C3TR2 update,1: GPDMA_C3TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C3BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C3LLR is not equal to 0 the linked-list is not completed. GPDMA_C3BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C3BR1 update from memory,1: GPDMA_C3BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C3LLR from the memory during the link transfer." "0: no GPDMA_C3LLR update,1: GPDMA_C3LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
line.long 0x4 "GPDMA_C4LBAR,GPDMA channel 4 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,None"
wgroup.long 0x25C++0x3
line.long 0x0 "GPDMA_C4FCR,GPDMA channel 4 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x260++0x3
line.long 0x0 "GPDMA_C4SR,GPDMA channel 4 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C4TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C4TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C4CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x264++0x3
line.long 0x0 "GPDMA_C4CR,GPDMA channel 4 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C4BR1.BNDT[15:0] = 0 and GPDMA_C4BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
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bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x290++0x13
line.long 0x0 "GPDMA_C4TR1,GPDMA channel 4 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC4 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
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bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
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hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
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bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC4 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
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bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
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bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored.." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
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bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C4TR2,GPDMA channel 4 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 4,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
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hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: channel,?,?"
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bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 4 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 4 is activated (GPDMA_C4CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
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bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 4 is activated (GPDMA_C4CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C4CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
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hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 4 is activated (GPDMA_C4CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4 [GPDMA_requests]/>."
line.long 0x8 "GPDMA_C4BR1,GPDMA channel 4 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
line.long 0xC "GPDMA_C4SAR,GPDMA channel 4 source address register"
hexmask.long 0xC 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x10 "GPDMA_C4DAR,GPDMA channel 4 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
group.long 0x2CC++0x7
line.long 0x0 "GPDMA_C4LLR,GPDMA channel 4 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C4TR1 from the memory during the link transfer." "0: no GPDMA_C4TR1 update,1: GPDMA_C4TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C4TR2 from the memory during the link transfer." "0: no GPDMA_C4TR2 update,1: GPDMA_C4TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C4BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C4LLR is not equal to 0 the linked-list is not completed. GPDMA_C4BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C4BR1 update from memory,1: GPDMA_C4BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C4LLR from the memory during the link transfer." "0: no GPDMA_C4LLR update,1: GPDMA_C4LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
line.long 0x4 "GPDMA_C5LBAR,GPDMA channel 5 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,None"
wgroup.long 0x2DC++0x3
line.long 0x0 "GPDMA_C5FCR,GPDMA channel 5 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x2E0++0x3
line.long 0x0 "GPDMA_C5SR,GPDMA channel 5 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C5TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C5TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C5CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x2E4++0x3
line.long 0x0 "GPDMA_C5CR,GPDMA channel 5 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C5BR1.BNDT[15:0] = 0 and GPDMA_C5BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
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bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x310++0x13
line.long 0x0 "GPDMA_C5TR1,GPDMA channel 5 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC5 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
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bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
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hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
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bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC5 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
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bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
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bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
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bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C5TR2,GPDMA channel 5 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 5,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
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hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: channel,?,?"
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bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 5 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 5 is activated (GPDMA_C5CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
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bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 5 is activated (GPDMA_C5CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C5CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
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hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 5 is activated (GPDMA_C5CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4 [GPDMA_requests]/>."
line.long 0x8 "GPDMA_C5BR1,GPDMA channel 5 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
line.long 0xC "GPDMA_C5SAR,GPDMA channel 5 source address register"
hexmask.long 0xC 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x10 "GPDMA_C5DAR,GPDMA channel 5 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
group.long 0x34C++0x7
line.long 0x0 "GPDMA_C5LLR,GPDMA channel 5 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C5TR1 from the memory during the link transfer." "0: no GPDMA_C5TR1 update,1: GPDMA_C5TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C5TR2 from the memory during the link transfer." "0: no GPDMA_C5TR2 update,1: GPDMA_C5TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C5BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C5LLR is not equal to 0 the linked-list is not completed. GPDMA_C5BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C5BR1 update from memory,1: GPDMA_C5BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C5LLR from the memory during the link transfer." "0: no GPDMA_C5LLR update,1: GPDMA_C5LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
line.long 0x4 "GPDMA_C6LBAR,GPDMA channel 6 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,None"
wgroup.long 0x35C++0x3
line.long 0x0 "GPDMA_C6FCR,GPDMA channel 6 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x360++0x3
line.long 0x0 "GPDMA_C6SR,GPDMA channel 6 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C6TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C6TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C6CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x364++0x3
line.long 0x0 "GPDMA_C6CR,GPDMA channel 6 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C6BR1.BNDT[15:0] = 0 and GPDMA_C6BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
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bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x390++0x13
line.long 0x0 "GPDMA_C6TR1,GPDMA channel 6 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC6 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
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bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
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hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
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bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC6 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
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bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
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bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
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bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C6TR2,GPDMA channel 6 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 6,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
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hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: channel,?,?"
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bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 6 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 6 is activated (GPDMA_C6CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
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bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 6 is activated (GPDMA_C6CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C6CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
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hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 6 is activated (GPDMA_C6CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4 [GPDMA_requests]/>."
line.long 0x8 "GPDMA_C6BR1,GPDMA channel 6 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
line.long 0xC "GPDMA_C6SAR,GPDMA channel 6 source address register"
hexmask.long 0xC 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x10 "GPDMA_C6DAR,GPDMA channel 6 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
group.long 0x3CC++0x7
line.long 0x0 "GPDMA_C6LLR,GPDMA channel 6 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C6TR1 from the memory during the link transfer." "0: no GPDMA_C6TR1 update,1: GPDMA_C6TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C6TR2 from the memory during the link transfer." "0: no GPDMA_C6TR2 update,1: GPDMA_C6TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C6BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C6LLR is not equal to 0 the linked-list is not completed. GPDMA_C6BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C6BR1 update from memory,1: GPDMA_C6BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C6LLR from the memory during the link transfer." "0: no GPDMA_C6LLR update,1: GPDMA_C6LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
line.long 0x4 "GPDMA_C7LBAR,GPDMA channel 7 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,None"
wgroup.long 0x3DC++0x3
line.long 0x0 "GPDMA_C7FCR,GPDMA channel 7 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x3E0++0x3
line.long 0x0 "GPDMA_C7SR,GPDMA channel 7 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C7TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C7TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C7CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x3E4++0x3
line.long 0x0 "GPDMA_C7CR,GPDMA channel 7 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C7BR1.BNDT[15:0] = 0 and GPDMA_C7BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
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bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x410++0x13
line.long 0x0 "GPDMA_C7TR1,GPDMA channel 7 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC7 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
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bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
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hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
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bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC7 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
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bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
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bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
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bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C7TR2,GPDMA channel 7 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 7,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
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hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: channel,?,?"
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bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 7 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 7 is activated (GPDMA_C7CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
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bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 7 is activated (GPDMA_C7CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C7CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
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hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 7 is activated (GPDMA_C7CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4 [GPDMA_requests]/>."
line.long 0x8 "GPDMA_C7BR1,GPDMA channel 7 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
line.long 0xC "GPDMA_C7SAR,GPDMA channel 7 source address register"
hexmask.long 0xC 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x10 "GPDMA_C7DAR,GPDMA channel 7 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
group.long 0x44C++0x7
line.long 0x0 "GPDMA_C7LLR,GPDMA channel 7 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C7TR1 from the memory during the link transfer." "0: no GPDMA_C7TR1 update,1: GPDMA_C7TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C7TR2 from the memory during the link transfer." "0: no GPDMA_C7TR2 update,1: GPDMA_C7TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C7BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C7LLR is not equal to 0 the linked-list is not completed. GPDMA_C7BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C7BR1 update from memory,1: GPDMA_C7BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C7LLR from the memory during the link transfer." "0: no GPDMA_C7LLR update,1: GPDMA_C7LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
line.long 0x4 "GPDMA_C8LBAR,GPDMA channel 8 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,None"
wgroup.long 0x45C++0x3
line.long 0x0 "GPDMA_C8FCR,GPDMA channel 8 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x460++0x3
line.long 0x0 "GPDMA_C8SR,GPDMA channel 8 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C8TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C8TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C8CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x464++0x3
line.long 0x0 "GPDMA_C8CR,GPDMA channel 8 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C8BR1.BNDT[15:0] = 0 and GPDMA_C8BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
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bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x490++0xB
line.long 0x0 "GPDMA_C8TR1,GPDMA channel 8 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC8 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
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bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
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hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
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bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC8 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
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bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
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bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
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bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C8TR2,GPDMA channel 8 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 8,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
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hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: channel,?,?"
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bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 8 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 8 is activated (GPDMA_C8CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
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bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 8 is activated (GPDMA_C8CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C8CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
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hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 8 is activated (GPDMA_C8CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4 [GPDMA_requests]/>."
line.long 0x8 "GPDMA_C8BR1,GPDMA channel 8 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
group.long 0x498++0x13
line.long 0x0 "GPDMA_C10BR1,GPDMA channel 10 block register 1"
bitfld.long 0x0 31. "BRDDEC,None" "0: at the end of a block transfer,1: at the end of a block transfer"
bitfld.long 0x0 30. "BRSDEC,None" "0: at the end of a block transfer,1: at the end of a block transfer"
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bitfld.long 0x0 29. "DDEC,None" "0: At the end of a programmed burst transfer to the..,1: At the end of a programmed burst transfer to the.."
bitfld.long 0x0 28. "SDEC,None" "0: At the end of a programmed burst transfer from..,1: At the end of a programmed burst transfer from.."
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hexmask.long.word 0x0 16.--26. 1. "BRC,This field contains the number of repetitions of the current block (0 to 2047)."
hexmask.long.word 0x0 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
line.long 0x4 "GPDMA_C8SAR,GPDMA channel 8 source address register"
hexmask.long 0x4 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x8 "GPDMA_C8DAR,GPDMA channel 8 destination address register"
hexmask.long 0x8 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
line.long 0xC "GPDMA_C10TR3,GPDMA channel 10 transfer register 3"
hexmask.long.word 0xC 16.--28. 1. "DAO,The destination address pointed by GPDMA_CxDAR is incremented or decremented (depending on GPDMA_C10BR1.DDEC) by this offset DAO[12:0] for each programmed destination burst. This offset is not including and is added to the programmed burst size.."
hexmask.long.word 0xC 0.--12. 1. "SAO,The source address pointed by GPDMA_CxSAR is incremented or decremented (depending on GPDMA_C10BR1.SDEC) by this offset SAO[12:0] for each programmed source burst. This offset is not including and is added to the programmed burst size when the.."
line.long 0x10 "GPDMA_C10BR2,GPDMA channel 10 block register 2"
hexmask.long.word 0x10 16.--31. 1. "BRDAO,For a channel with 2D addressing capability this field is used to update (by addition or subtraction depending on GPDMA_C10BR1.BRDDEC) the current destination address (GPDMA_CxDAR) at the end of a block transfer."
hexmask.long.word 0x10 0.--15. 1. "BRSAO,For a channel with 2D addressing capability this field is used to update (by addition or subtraction depending on GPDMA_C10BR1.BRSDEC) the current source address (GPDMA_CxSAR) at the end of a block transfer."
group.long 0x4CC++0x3
line.long 0x0 "GPDMA_C8LLR,GPDMA channel 8 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C8TR1 from the memory during the link transfer." "0: no GPDMA_C8TR1 update,1: GPDMA_C8TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C8TR2 from the memory during the link transfer." "0: no GPDMA_C8TR2 update,1: GPDMA_C8TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C8BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C8LLR is not equal to 0 the linked-list is not completed. GPDMA_C8BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C8BR1 update from memory,1: GPDMA_C8BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C8LLR from the memory during the link transfer." "0: no GPDMA_C8LLR update,1: GPDMA_C8LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
group.long 0x4CC++0x7
line.long 0x0 "GPDMA_C10LLR,GPDMA channel 10 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C10TR1 from the memory during the link transfer." "0: no GPDMA_C10TR1 update,1: GPDMA_C10TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C10TR2 from the memory during the link transfer." "0: no GPDMA_C10TR2 update,1: GPDMA_C10TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C10BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C10LLR is not equal to 0 the linked-list is not completed. GPDMA_C10BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C10BR1 update from memory,1: GPDMA_C10BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 26. "UT3,This bit controls the update of GPDMA_CxTR3 from the memory during the link transfer." "0: no GPDMA_CxTR3 update,1: GPDMA_CxTR3 update"
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bitfld.long 0x0 25. "UB2,This bit controls the update of GPDMA_CxBR2 from the memory during the link transfer." "0: no GPDMA_CxBR2 update,1: GPDMA_CxBR2 update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C10LLR from the memory during the link transfer." "0: no GPDMA_C10LLR update,1: GPDMA_C10LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
line.long 0x4 "GPDMA_C9LBAR,GPDMA channel 9 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,None"
wgroup.long 0x4DC++0x3
line.long 0x0 "GPDMA_C9FCR,GPDMA channel 9 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x4E0++0x3
line.long 0x0 "GPDMA_C9SR,GPDMA channel 9 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C9TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C9TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C9CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x4E4++0x3
line.long 0x0 "GPDMA_C9CR,GPDMA channel 9 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C9BR1.BNDT[15:0] = 0 and GPDMA_C9BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
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bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x510++0xB
line.long 0x0 "GPDMA_C9TR1,GPDMA channel 9 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC9 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
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bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
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hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
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bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC9 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
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bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
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bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
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bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C9TR2,GPDMA channel 9 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 9,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
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hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: channel,?,?"
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bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 9 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 9 is activated (GPDMA_C9CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
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bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 9 is activated (GPDMA_C9CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C9CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
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hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 9 is activated (GPDMA_C9CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4 [GPDMA_requests]/>."
line.long 0x8 "GPDMA_C9BR1,GPDMA channel 9 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
group.long 0x518++0x13
line.long 0x0 "GPDMA_C11BR1,GPDMA channel 11 block register 1"
bitfld.long 0x0 31. "BRDDEC,None" "0: at the end of a block transfer,1: at the end of a block transfer"
bitfld.long 0x0 30. "BRSDEC,None" "0: at the end of a block transfer,1: at the end of a block transfer"
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bitfld.long 0x0 29. "DDEC,None" "0: At the end of a programmed burst transfer to the..,1: At the end of a programmed burst transfer to the.."
bitfld.long 0x0 28. "SDEC,None" "0: At the end of a programmed burst transfer from..,1: At the end of a programmed burst transfer from.."
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hexmask.long.word 0x0 16.--26. 1. "BRC,This field contains the number of repetitions of the current block (0 to 2047)."
hexmask.long.word 0x0 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
line.long 0x4 "GPDMA_C9SAR,GPDMA channel 9 source address register"
hexmask.long 0x4 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x8 "GPDMA_C9DAR,GPDMA channel 9 destination address register"
hexmask.long 0x8 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
line.long 0xC "GPDMA_C11TR3,GPDMA channel 11 transfer register 3"
hexmask.long.word 0xC 16.--28. 1. "DAO,The destination address pointed by GPDMA_CxDAR is incremented or decremented (depending on GPDMA_C11BR1.DDEC) by this offset DAO[12:0] for each programmed destination burst. This offset is not including and is added to the programmed burst size.."
hexmask.long.word 0xC 0.--12. 1. "SAO,The source address pointed by GPDMA_CxSAR is incremented or decremented (depending on GPDMA_C11BR1.SDEC) by this offset SAO[12:0] for each programmed source burst. This offset is not including and is added to the programmed burst size when the.."
line.long 0x10 "GPDMA_C11BR2,GPDMA channel 11 block register 2"
hexmask.long.word 0x10 16.--31. 1. "BRDAO,For a channel with 2D addressing capability this field is used to update (by addition or subtraction depending on GPDMA_C11BR1.BRDDEC) the current destination address (GPDMA_CxDAR) at the end of a block transfer."
hexmask.long.word 0x10 0.--15. 1. "BRSAO,For a channel with 2D addressing capability this field is used to update (by addition or subtraction depending on GPDMA_C11BR1.BRSDEC) the current source address (GPDMA_CxSAR) at the end of a block transfer."
group.long 0x54C++0x3
line.long 0x0 "GPDMA_C9LLR,GPDMA channel 9 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C9TR1 from the memory during the link transfer." "0: no GPDMA_C9TR1 update,1: GPDMA_C9TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C9TR2 from the memory during the link transfer." "0: no GPDMA_C9TR2 update,1: GPDMA_C9TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C9BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C9LLR is not equal to 0 the linked-list is not completed. GPDMA_C9BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C9BR1 update from memory,1: GPDMA_C9BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C9LLR from the memory during the link transfer." "0: no GPDMA_C9LLR update,1: GPDMA_C9LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
group.long 0x54C++0x7
line.long 0x0 "GPDMA_C11LLR,GPDMA channel 11 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C11TR1 from the memory during the link transfer." "0: no GPDMA_C11TR1 update,1: GPDMA_C11TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C11TR2 from the memory during the link transfer." "0: no GPDMA_C11TR2 update,1: GPDMA_C11TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C11BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C11LLR is not equal to 0 the linked-list is not completed. GPDMA_C11BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C11BR1 update from memory,1: GPDMA_C11BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 26. "UT3,This bit controls the update of GPDMA_CxTR3 from the memory during the link transfer." "0: no GPDMA_CxTR3 update,1: GPDMA_CxTR3 update"
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bitfld.long 0x0 25. "UB2,This bit controls the update of GPDMA_CxBR2 from the memory during the link transfer." "0: no GPDMA_CxBR2 update,1: GPDMA_CxBR2 update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C11LLR from the memory during the link transfer." "0: no GPDMA_C11LLR update,1: GPDMA_C11LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
line.long 0x4 "GPDMA_C10LBAR,GPDMA channel 10 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,None"
wgroup.long 0x55C++0x3
line.long 0x0 "GPDMA_C10FCR,GPDMA channel 10 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x560++0x3
line.long 0x0 "GPDMA_C10SR,GPDMA channel 10 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C10TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C10TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C10CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x564++0x3
line.long 0x0 "GPDMA_C10CR,GPDMA channel 10 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C10BR1.BNDT[15:0] = 0 and GPDMA_C10BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
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bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x590++0x7
line.long 0x0 "GPDMA_C10TR1,GPDMA channel 10 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC10 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
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bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
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hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
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bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC10 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
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bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
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bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
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bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C10TR2,GPDMA channel 10 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 10,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
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hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: channel,?,?"
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bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 10 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 10 is activated (GPDMA_C10CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
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bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 10 is activated (GPDMA_C10CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C10CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
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hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 10 is activated (GPDMA_C10CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4.."
group.long 0x59C++0x7
line.long 0x0 "GPDMA_C10SAR,GPDMA channel 10 source address register"
hexmask.long 0x0 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x4 "GPDMA_C10DAR,GPDMA channel 10 destination address register"
hexmask.long 0x4 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
group.long 0x5D0++0x3
line.long 0x0 "GPDMA_C11LBAR,GPDMA channel 11 linked-list base address register"
hexmask.long.word 0x0 16.--31. 1. "LBA,None"
wgroup.long 0x5DC++0x3
line.long 0x0 "GPDMA_C11FCR,GPDMA channel 11 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x5E0++0x3
line.long 0x0 "GPDMA_C11SR,GPDMA channel 11 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C11TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C11TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C11CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x5E4++0x3
line.long 0x0 "GPDMA_C11CR,GPDMA channel 11 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C11BR1.BNDT[15:0] = 0 and GPDMA_C11BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
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bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x610++0x7
line.long 0x0 "GPDMA_C11TR1,GPDMA channel 11 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC11 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
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bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
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hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
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bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC11 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
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bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
newline
bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C11TR2,GPDMA channel 11 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 11,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
newline
hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: channel,?,?"
newline
bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 11 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 11 is activated (GPDMA_C11CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
newline
bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 11 is activated (GPDMA_C11CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C11CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
newline
hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 11 is activated (GPDMA_C11CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4.."
group.long 0x61C++0x7
line.long 0x0 "GPDMA_C11SAR,GPDMA channel 11 source address register"
hexmask.long 0x0 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x4 "GPDMA_C11DAR,GPDMA channel 11 destination address register"
hexmask.long 0x4 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
tree.end
tree "SEC_GPDMA1"
base ad:0x50020000
group.long 0x0++0xB
line.long 0x0 "GPDMA_SECCFGR,GPDMA secure configuration register"
bitfld.long 0x0 11. "SEC11,None" "0: non-secure,1: secure"
bitfld.long 0x0 10. "SEC10,None" "0: non-secure,1: secure"
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bitfld.long 0x0 9. "SEC9,None" "0: non-secure,1: secure"
bitfld.long 0x0 8. "SEC8,None" "0: non-secure,1: secure"
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bitfld.long 0x0 7. "SEC7,None" "0: non-secure,1: secure"
bitfld.long 0x0 6. "SEC6,None" "0: non-secure,1: secure"
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bitfld.long 0x0 5. "SEC5,None" "0: non-secure,1: secure"
bitfld.long 0x0 4. "SEC4,None" "0: non-secure,1: secure"
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bitfld.long 0x0 3. "SEC3,None" "0: non-secure,1: secure"
bitfld.long 0x0 2. "SEC2,None" "0: non-secure,1: secure"
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bitfld.long 0x0 1. "SEC1,None" "0: non-secure,1: secure"
bitfld.long 0x0 0. "SEC0,None" "0: non-secure,1: secure"
line.long 0x4 "GPDMA_PRIVCFGR,GPDMA privileged configuration register"
bitfld.long 0x4 11. "PRIV11,None" "0: unprivileged,1: privileged"
bitfld.long 0x4 10. "PRIV10,None" "0: unprivileged,1: privileged"
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bitfld.long 0x4 9. "PRIV9,None" "0: unprivileged,1: privileged"
bitfld.long 0x4 8. "PRIV8,None" "0: unprivileged,1: privileged"
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bitfld.long 0x4 7. "PRIV7,None" "0: unprivileged,1: privileged"
bitfld.long 0x4 6. "PRIV6,None" "0: unprivileged,1: privileged"
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bitfld.long 0x4 5. "PRIV5,None" "0: unprivileged,1: privileged"
bitfld.long 0x4 4. "PRIV4,None" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 3. "PRIV3,None" "0: unprivileged,1: privileged"
bitfld.long 0x4 2. "PRIV2,None" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 1. "PRIV1,None" "0: unprivileged,1: privileged"
bitfld.long 0x4 0. "PRIV0,None" "0: unprivileged,1: privileged"
line.long 0x8 "GPDMA_RCFGLOCKR,GPDMA configuration lock register"
bitfld.long 0x8 11. "LOCK11,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 11..,1: secure privilege configuration of the channel 11.."
bitfld.long 0x8 10. "LOCK10,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 10..,1: secure privilege configuration of the channel 10.."
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bitfld.long 0x8 9. "LOCK9,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 9..,1: secure privilege configuration of the channel 9.."
bitfld.long 0x8 8. "LOCK8,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 8..,1: secure privilege configuration of the channel 8.."
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bitfld.long 0x8 7. "LOCK7,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 7..,1: secure privilege configuration of the channel 7.."
bitfld.long 0x8 6. "LOCK6,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 6..,1: secure privilege configuration of the channel 6.."
newline
bitfld.long 0x8 5. "LOCK5,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 5..,1: secure privilege configuration of the channel 5.."
bitfld.long 0x8 4. "LOCK4,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 4..,1: secure privilege configuration of the channel 4.."
newline
bitfld.long 0x8 3. "LOCK3,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 3..,1: secure privilege configuration of the channel 3.."
bitfld.long 0x8 2. "LOCK2,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 2..,1: secure privilege configuration of the channel 2.."
newline
bitfld.long 0x8 1. "LOCK1,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 1..,1: secure privilege configuration of the channel 1.."
bitfld.long 0x8 0. "LOCK0,This bit is cleared after reset and once set it cannot be reset until a global GPDMA reset." "0: secure privilege configuration of the channel 0..,1: secure privilege configuration of the channel 0.."
rgroup.long 0xC++0x7
line.long 0x0 "GPDMA_MISR,GPDMA non-secure masked interrupt status register"
bitfld.long 0x0 11. "MIS11,None" "0: no interrupt occurred on channel 11,1: an interrupt occurred on channel 11"
bitfld.long 0x0 10. "MIS10,None" "0: no interrupt occurred on channel 10,1: an interrupt occurred on channel 10"
newline
bitfld.long 0x0 9. "MIS9,None" "0: no interrupt occurred on channel 9,1: an interrupt occurred on channel 9"
bitfld.long 0x0 8. "MIS8,None" "0: no interrupt occurred on channel 8,1: an interrupt occurred on channel 8"
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bitfld.long 0x0 7. "MIS7,None" "0: no interrupt occurred on channel 7,1: an interrupt occurred on channel 7"
bitfld.long 0x0 6. "MIS6,None" "0: no interrupt occurred on channel 6,1: an interrupt occurred on channel 6"
newline
bitfld.long 0x0 5. "MIS5,None" "0: no interrupt occurred on channel 5,1: an interrupt occurred on channel 5"
bitfld.long 0x0 4. "MIS4,None" "0: no interrupt occurred on channel 4,1: an interrupt occurred on channel 4"
newline
bitfld.long 0x0 3. "MIS3,None" "0: no interrupt occurred on channel 3,1: an interrupt occurred on channel 3"
bitfld.long 0x0 2. "MIS2,None" "0: no interrupt occurred on channel 2,1: an interrupt occurred on channel 2"
newline
bitfld.long 0x0 1. "MIS1,None" "0: no interrupt occurred on channel 1,1: an interrupt occurred on channel 1"
bitfld.long 0x0 0. "MIS0,None" "0: no interrupt occurred on channel 0,1: an interrupt occurred on channel 0"
line.long 0x4 "GPDMA_SMISR,GPDMA secure masked interrupt status register"
bitfld.long 0x4 11. "MIS11,None" "0: no interrupt occurred on the secure channel 11,1: an interrupt occurred on the secure channel 11"
bitfld.long 0x4 10. "MIS10,None" "0: no interrupt occurred on the secure channel 10,1: an interrupt occurred on the secure channel 10"
newline
bitfld.long 0x4 9. "MIS9,None" "0: no interrupt occurred on the secure channel 9,1: an interrupt occurred on the secure channel 9"
bitfld.long 0x4 8. "MIS8,None" "0: no interrupt occurred on the secure channel 8,1: an interrupt occurred on the secure channel 8"
newline
bitfld.long 0x4 7. "MIS7,None" "0: no interrupt occurred on the secure channel 7,1: an interrupt occurred on the secure channel 7"
bitfld.long 0x4 6. "MIS6,None" "0: no interrupt occurred on the secure channel 6,1: an interrupt occurred on the secure channel 6"
newline
bitfld.long 0x4 5. "MIS5,None" "0: no interrupt occurred on the secure channel 5,1: an interrupt occurred on the secure channel 5"
bitfld.long 0x4 4. "MIS4,None" "0: no interrupt occurred on the secure channel 4,1: an interrupt occurred on the secure channel 4"
newline
bitfld.long 0x4 3. "MIS3,None" "0: no interrupt occurred on the secure channel 3,1: an interrupt occurred on the secure channel 3"
bitfld.long 0x4 2. "MIS2,None" "0: no interrupt occurred on the secure channel 2,1: an interrupt occurred on the secure channel 2"
newline
bitfld.long 0x4 1. "MIS1,None" "0: no interrupt occurred on the secure channel 1,1: an interrupt occurred on the secure channel 1"
bitfld.long 0x4 0. "MIS0,None" "0: no interrupt occurred on the secure channel 0,1: an interrupt occurred on the secure channel 0"
group.long 0x50++0x3
line.long 0x0 "GPDMA_C0LBAR,GPDMA channel 0 linked-list base address register"
hexmask.long.word 0x0 16.--31. 1. "LBA,None"
wgroup.long 0x5C++0x3
line.long 0x0 "GPDMA_C0FCR,GPDMA channel 0 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
newline
bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
newline
bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
newline
bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x60++0x3
line.long 0x0 "GPDMA_C0SR,GPDMA channel 0 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C0TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
newline
bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
newline
bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
newline
bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C0TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
newline
bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C0CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x64++0x3
line.long 0x0 "GPDMA_C0CR,GPDMA channel 0 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
newline
bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C0BR1.BNDT[15:0] = 0 and GPDMA_C0BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
newline
bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x90++0x13
line.long 0x0 "GPDMA_C0TR1,GPDMA channel 0 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC0 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
newline
bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
newline
hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
newline
bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC0 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
newline
bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
newline
bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C0TR2,GPDMA channel 0 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 0,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
newline
hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: 0 to,1: channel,?,?"
newline
bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 0 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 0 is activated (GPDMA_C0CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
newline
bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 0 is activated (GPDMA_C0CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C0CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
newline
hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 0 is activated (GPDMA_C0CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4 [GPDMA_requests]/>."
line.long 0x8 "GPDMA_C0BR1,GPDMA channel 0 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
line.long 0xC "GPDMA_C0SAR,GPDMA channel 0 source address register"
hexmask.long 0xC 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x10 "GPDMA_C0DAR,GPDMA channel 0 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
group.long 0xCC++0x7
line.long 0x0 "GPDMA_C0LLR,GPDMA channel 0 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C0TR1 from the memory during the link transfer." "0: no GPDMA_C0TR1 update,1: GPDMA_C0TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C0TR2 from the memory during the link transfer." "0: no GPDMA_C0TR2 update,1: GPDMA_C0TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C0BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C0LLR is not equal to 0 the linked-list is not completed. GPDMA_C0BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C0BR1 update from memory,1: GPDMA_C0BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C0LLR from the memory during the link transfer." "0: no GPDMA_C0LLR update,1: GPDMA_C0LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
line.long 0x4 "GPDMA_C1LBAR,GPDMA channel 1 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,None"
wgroup.long 0xDC++0x3
line.long 0x0 "GPDMA_C1FCR,GPDMA channel 1 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0xE0++0x3
line.long 0x0 "GPDMA_C1SR,GPDMA channel 1 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C1TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C1TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C1CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0xE4++0x3
line.long 0x0 "GPDMA_C1CR,GPDMA channel 1 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C1BR1.BNDT[15:0] = 0 and GPDMA_C1BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
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bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x110++0x13
line.long 0x0 "GPDMA_C1TR1,GPDMA channel 1 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC1 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
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bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
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hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
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bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC1 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
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bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
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bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
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bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C1TR2,GPDMA channel 1 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 1,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
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hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: 0 to,?,?"
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bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 1 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 1 is activated (GPDMA_C1CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
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bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 1 is activated (GPDMA_C1CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C1CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
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hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 1 is activated (GPDMA_C1CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4 [GPDMA_requests]/>."
line.long 0x8 "GPDMA_C1BR1,GPDMA channel 1 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
line.long 0xC "GPDMA_C1SAR,GPDMA channel 1 source address register"
hexmask.long 0xC 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x10 "GPDMA_C1DAR,GPDMA channel 1 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
group.long 0x14C++0x7
line.long 0x0 "GPDMA_C1LLR,GPDMA channel 1 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C1TR1 from the memory during the link transfer." "0: no GPDMA_C1TR1 update,1: GPDMA_C1TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C1TR2 from the memory during the link transfer." "0: no GPDMA_C1TR2 update,1: GPDMA_C1TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C1BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C1LLR is not equal to 0 the linked-list is not completed. GPDMA_C1BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C1BR1 update from memory,1: GPDMA_C1BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C1LLR from the memory during the link transfer." "0: no GPDMA_C1LLR update,1: GPDMA_C1LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
line.long 0x4 "GPDMA_C2LBAR,GPDMA channel 2 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,None"
wgroup.long 0x15C++0x3
line.long 0x0 "GPDMA_C2FCR,GPDMA channel 2 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x160++0x3
line.long 0x0 "GPDMA_C2SR,GPDMA channel 2 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C2TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C2TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C2CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x164++0x3
line.long 0x0 "GPDMA_C2CR,GPDMA channel 2 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C2BR1.BNDT[15:0] = 0 and GPDMA_C2BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
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bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x190++0x13
line.long 0x0 "GPDMA_C2TR1,GPDMA channel 2 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC2 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
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bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
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hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
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bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC2 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
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bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
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bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
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bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C2TR2,GPDMA channel 2 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 2,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
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hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: channel,2: 0 to,?"
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bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 2 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 2 is activated (GPDMA_C2CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
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bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 2 is activated (GPDMA_C2CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C2CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
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hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 2 is activated (GPDMA_C2CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4 [GPDMA_requests]/>."
line.long 0x8 "GPDMA_C2BR1,GPDMA channel 2 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
line.long 0xC "GPDMA_C2SAR,GPDMA channel 2 source address register"
hexmask.long 0xC 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x10 "GPDMA_C2DAR,GPDMA channel 2 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
group.long 0x1CC++0x7
line.long 0x0 "GPDMA_C2LLR,GPDMA channel 2 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C2TR1 from the memory during the link transfer." "0: no GPDMA_C2TR1 update,1: GPDMA_C2TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C2TR2 from the memory during the link transfer." "0: no GPDMA_C2TR2 update,1: GPDMA_C2TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C2BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C2LLR is not equal to 0 the linked-list is not completed. GPDMA_C2BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C2BR1 update from memory,1: GPDMA_C2BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C2LLR from the memory during the link transfer." "0: no GPDMA_C2LLR update,1: GPDMA_C2LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
line.long 0x4 "GPDMA_C3LBAR,GPDMA channel 3 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,None"
wgroup.long 0x1DC++0x3
line.long 0x0 "GPDMA_C3FCR,GPDMA channel 3 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x1E0++0x3
line.long 0x0 "GPDMA_C3SR,GPDMA channel 3 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C3TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C3TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C3CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x1E4++0x3
line.long 0x0 "GPDMA_C3CR,GPDMA channel 3 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C3BR1.BNDT[15:0] = 0 and GPDMA_C3BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
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bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x210++0x13
line.long 0x0 "GPDMA_C3TR1,GPDMA channel 3 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC3 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
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bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
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hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
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bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC3 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
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bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
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bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
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bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C3TR2,GPDMA channel 3 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 3,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
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hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: channel,?,3: 0 to"
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bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 3 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 3 is activated (GPDMA_C3CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
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bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 3 is activated (GPDMA_C3CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C3CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
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hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 3 is activated (GPDMA_C3CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4 [GPDMA_requests]/>."
line.long 0x8 "GPDMA_C3BR1,GPDMA channel 3 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
line.long 0xC "GPDMA_C3SAR,GPDMA channel 3 source address register"
hexmask.long 0xC 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x10 "GPDMA_C3DAR,GPDMA channel 3 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
group.long 0x24C++0x7
line.long 0x0 "GPDMA_C3LLR,GPDMA channel 3 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C3TR1 from the memory during the link transfer." "0: no GPDMA_C3TR1 update,1: GPDMA_C3TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C3TR2 from the memory during the link transfer." "0: no GPDMA_C3TR2 update,1: GPDMA_C3TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C3BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C3LLR is not equal to 0 the linked-list is not completed. GPDMA_C3BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C3BR1 update from memory,1: GPDMA_C3BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C3LLR from the memory during the link transfer." "0: no GPDMA_C3LLR update,1: GPDMA_C3LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
line.long 0x4 "GPDMA_C4LBAR,GPDMA channel 4 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,None"
wgroup.long 0x25C++0x3
line.long 0x0 "GPDMA_C4FCR,GPDMA channel 4 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x260++0x3
line.long 0x0 "GPDMA_C4SR,GPDMA channel 4 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C4TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C4TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C4CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x264++0x3
line.long 0x0 "GPDMA_C4CR,GPDMA channel 4 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C4BR1.BNDT[15:0] = 0 and GPDMA_C4BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
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bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x290++0x13
line.long 0x0 "GPDMA_C4TR1,GPDMA channel 4 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC4 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
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bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
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hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
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bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC4 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
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bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
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bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored.." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
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bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C4TR2,GPDMA channel 4 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 4,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
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hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: channel,?,?"
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bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 4 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 4 is activated (GPDMA_C4CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
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bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 4 is activated (GPDMA_C4CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C4CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
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hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 4 is activated (GPDMA_C4CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4 [GPDMA_requests]/>."
line.long 0x8 "GPDMA_C4BR1,GPDMA channel 4 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
line.long 0xC "GPDMA_C4SAR,GPDMA channel 4 source address register"
hexmask.long 0xC 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x10 "GPDMA_C4DAR,GPDMA channel 4 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
group.long 0x2CC++0x7
line.long 0x0 "GPDMA_C4LLR,GPDMA channel 4 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C4TR1 from the memory during the link transfer." "0: no GPDMA_C4TR1 update,1: GPDMA_C4TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C4TR2 from the memory during the link transfer." "0: no GPDMA_C4TR2 update,1: GPDMA_C4TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C4BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C4LLR is not equal to 0 the linked-list is not completed. GPDMA_C4BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C4BR1 update from memory,1: GPDMA_C4BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C4LLR from the memory during the link transfer." "0: no GPDMA_C4LLR update,1: GPDMA_C4LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
line.long 0x4 "GPDMA_C5LBAR,GPDMA channel 5 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,None"
wgroup.long 0x2DC++0x3
line.long 0x0 "GPDMA_C5FCR,GPDMA channel 5 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x2E0++0x3
line.long 0x0 "GPDMA_C5SR,GPDMA channel 5 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C5TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C5TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C5CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x2E4++0x3
line.long 0x0 "GPDMA_C5CR,GPDMA channel 5 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C5BR1.BNDT[15:0] = 0 and GPDMA_C5BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
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bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x310++0x13
line.long 0x0 "GPDMA_C5TR1,GPDMA channel 5 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC5 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
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bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
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hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
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bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC5 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
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bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
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bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
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bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C5TR2,GPDMA channel 5 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 5,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
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hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: channel,?,?"
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bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 5 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 5 is activated (GPDMA_C5CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
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bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 5 is activated (GPDMA_C5CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C5CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
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hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 5 is activated (GPDMA_C5CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4 [GPDMA_requests]/>."
line.long 0x8 "GPDMA_C5BR1,GPDMA channel 5 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
line.long 0xC "GPDMA_C5SAR,GPDMA channel 5 source address register"
hexmask.long 0xC 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x10 "GPDMA_C5DAR,GPDMA channel 5 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
group.long 0x34C++0x7
line.long 0x0 "GPDMA_C5LLR,GPDMA channel 5 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C5TR1 from the memory during the link transfer." "0: no GPDMA_C5TR1 update,1: GPDMA_C5TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C5TR2 from the memory during the link transfer." "0: no GPDMA_C5TR2 update,1: GPDMA_C5TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C5BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C5LLR is not equal to 0 the linked-list is not completed. GPDMA_C5BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C5BR1 update from memory,1: GPDMA_C5BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C5LLR from the memory during the link transfer." "0: no GPDMA_C5LLR update,1: GPDMA_C5LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
line.long 0x4 "GPDMA_C6LBAR,GPDMA channel 6 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,None"
wgroup.long 0x35C++0x3
line.long 0x0 "GPDMA_C6FCR,GPDMA channel 6 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x360++0x3
line.long 0x0 "GPDMA_C6SR,GPDMA channel 6 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C6TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C6TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C6CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x364++0x3
line.long 0x0 "GPDMA_C6CR,GPDMA channel 6 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C6BR1.BNDT[15:0] = 0 and GPDMA_C6BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
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bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x390++0x13
line.long 0x0 "GPDMA_C6TR1,GPDMA channel 6 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC6 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
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bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
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hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
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bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC6 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
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bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
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bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
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bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C6TR2,GPDMA channel 6 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 6,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
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hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: channel,?,?"
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bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 6 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 6 is activated (GPDMA_C6CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
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bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 6 is activated (GPDMA_C6CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C6CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
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hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 6 is activated (GPDMA_C6CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4 [GPDMA_requests]/>."
line.long 0x8 "GPDMA_C6BR1,GPDMA channel 6 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
line.long 0xC "GPDMA_C6SAR,GPDMA channel 6 source address register"
hexmask.long 0xC 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x10 "GPDMA_C6DAR,GPDMA channel 6 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
group.long 0x3CC++0x7
line.long 0x0 "GPDMA_C6LLR,GPDMA channel 6 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C6TR1 from the memory during the link transfer." "0: no GPDMA_C6TR1 update,1: GPDMA_C6TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C6TR2 from the memory during the link transfer." "0: no GPDMA_C6TR2 update,1: GPDMA_C6TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C6BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C6LLR is not equal to 0 the linked-list is not completed. GPDMA_C6BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C6BR1 update from memory,1: GPDMA_C6BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C6LLR from the memory during the link transfer." "0: no GPDMA_C6LLR update,1: GPDMA_C6LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
line.long 0x4 "GPDMA_C7LBAR,GPDMA channel 7 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,None"
wgroup.long 0x3DC++0x3
line.long 0x0 "GPDMA_C7FCR,GPDMA channel 7 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x3E0++0x3
line.long 0x0 "GPDMA_C7SR,GPDMA channel 7 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C7TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C7TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C7CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x3E4++0x3
line.long 0x0 "GPDMA_C7CR,GPDMA channel 7 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C7BR1.BNDT[15:0] = 0 and GPDMA_C7BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
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bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x410++0x13
line.long 0x0 "GPDMA_C7TR1,GPDMA channel 7 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC7 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
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bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
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hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
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bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC7 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
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bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
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bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
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bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C7TR2,GPDMA channel 7 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 7,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
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hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: channel,?,?"
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bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 7 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 7 is activated (GPDMA_C7CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
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bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 7 is activated (GPDMA_C7CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C7CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
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hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 7 is activated (GPDMA_C7CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4 [GPDMA_requests]/>."
line.long 0x8 "GPDMA_C7BR1,GPDMA channel 7 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
line.long 0xC "GPDMA_C7SAR,GPDMA channel 7 source address register"
hexmask.long 0xC 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x10 "GPDMA_C7DAR,GPDMA channel 7 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
group.long 0x44C++0x7
line.long 0x0 "GPDMA_C7LLR,GPDMA channel 7 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C7TR1 from the memory during the link transfer." "0: no GPDMA_C7TR1 update,1: GPDMA_C7TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C7TR2 from the memory during the link transfer." "0: no GPDMA_C7TR2 update,1: GPDMA_C7TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C7BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C7LLR is not equal to 0 the linked-list is not completed. GPDMA_C7BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C7BR1 update from memory,1: GPDMA_C7BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C7LLR from the memory during the link transfer." "0: no GPDMA_C7LLR update,1: GPDMA_C7LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
line.long 0x4 "GPDMA_C8LBAR,GPDMA channel 8 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,None"
wgroup.long 0x45C++0x3
line.long 0x0 "GPDMA_C8FCR,GPDMA channel 8 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x460++0x3
line.long 0x0 "GPDMA_C8SR,GPDMA channel 8 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C8TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C8TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C8CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x464++0x3
line.long 0x0 "GPDMA_C8CR,GPDMA channel 8 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C8BR1.BNDT[15:0] = 0 and GPDMA_C8BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
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bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x490++0xB
line.long 0x0 "GPDMA_C8TR1,GPDMA channel 8 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC8 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
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bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
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hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
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bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC8 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
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bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
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bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
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bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C8TR2,GPDMA channel 8 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 8,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
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hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: channel,?,?"
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bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 8 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 8 is activated (GPDMA_C8CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
newline
bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 8 is activated (GPDMA_C8CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C8CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
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hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 8 is activated (GPDMA_C8CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4 [GPDMA_requests]/>."
line.long 0x8 "GPDMA_C8BR1,GPDMA channel 8 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
group.long 0x498++0x13
line.long 0x0 "GPDMA_C10BR1,GPDMA channel 10 block register 1"
bitfld.long 0x0 31. "BRDDEC,None" "0: at the end of a block transfer,1: at the end of a block transfer"
bitfld.long 0x0 30. "BRSDEC,None" "0: at the end of a block transfer,1: at the end of a block transfer"
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bitfld.long 0x0 29. "DDEC,None" "0: At the end of a programmed burst transfer to the..,1: At the end of a programmed burst transfer to the.."
bitfld.long 0x0 28. "SDEC,None" "0: At the end of a programmed burst transfer from..,1: At the end of a programmed burst transfer from.."
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hexmask.long.word 0x0 16.--26. 1. "BRC,This field contains the number of repetitions of the current block (0 to 2047)."
hexmask.long.word 0x0 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
line.long 0x4 "GPDMA_C8SAR,GPDMA channel 8 source address register"
hexmask.long 0x4 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x8 "GPDMA_C8DAR,GPDMA channel 8 destination address register"
hexmask.long 0x8 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
line.long 0xC "GPDMA_C10TR3,GPDMA channel 10 transfer register 3"
hexmask.long.word 0xC 16.--28. 1. "DAO,The destination address pointed by GPDMA_CxDAR is incremented or decremented (depending on GPDMA_C10BR1.DDEC) by this offset DAO[12:0] for each programmed destination burst. This offset is not including and is added to the programmed burst size.."
hexmask.long.word 0xC 0.--12. 1. "SAO,The source address pointed by GPDMA_CxSAR is incremented or decremented (depending on GPDMA_C10BR1.SDEC) by this offset SAO[12:0] for each programmed source burst. This offset is not including and is added to the programmed burst size when the.."
line.long 0x10 "GPDMA_C10BR2,GPDMA channel 10 block register 2"
hexmask.long.word 0x10 16.--31. 1. "BRDAO,For a channel with 2D addressing capability this field is used to update (by addition or subtraction depending on GPDMA_C10BR1.BRDDEC) the current destination address (GPDMA_CxDAR) at the end of a block transfer."
hexmask.long.word 0x10 0.--15. 1. "BRSAO,For a channel with 2D addressing capability this field is used to update (by addition or subtraction depending on GPDMA_C10BR1.BRSDEC) the current source address (GPDMA_CxSAR) at the end of a block transfer."
group.long 0x4CC++0x3
line.long 0x0 "GPDMA_C8LLR,GPDMA channel 8 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C8TR1 from the memory during the link transfer." "0: no GPDMA_C8TR1 update,1: GPDMA_C8TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C8TR2 from the memory during the link transfer." "0: no GPDMA_C8TR2 update,1: GPDMA_C8TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C8BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C8LLR is not equal to 0 the linked-list is not completed. GPDMA_C8BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C8BR1 update from memory,1: GPDMA_C8BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C8LLR from the memory during the link transfer." "0: no GPDMA_C8LLR update,1: GPDMA_C8LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
group.long 0x4CC++0x7
line.long 0x0 "GPDMA_C10LLR,GPDMA channel 10 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C10TR1 from the memory during the link transfer." "0: no GPDMA_C10TR1 update,1: GPDMA_C10TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C10TR2 from the memory during the link transfer." "0: no GPDMA_C10TR2 update,1: GPDMA_C10TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C10BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C10LLR is not equal to 0 the linked-list is not completed. GPDMA_C10BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C10BR1 update from memory,1: GPDMA_C10BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 26. "UT3,This bit controls the update of GPDMA_CxTR3 from the memory during the link transfer." "0: no GPDMA_CxTR3 update,1: GPDMA_CxTR3 update"
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bitfld.long 0x0 25. "UB2,This bit controls the update of GPDMA_CxBR2 from the memory during the link transfer." "0: no GPDMA_CxBR2 update,1: GPDMA_CxBR2 update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C10LLR from the memory during the link transfer." "0: no GPDMA_C10LLR update,1: GPDMA_C10LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
line.long 0x4 "GPDMA_C9LBAR,GPDMA channel 9 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,None"
wgroup.long 0x4DC++0x3
line.long 0x0 "GPDMA_C9FCR,GPDMA channel 9 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x4E0++0x3
line.long 0x0 "GPDMA_C9SR,GPDMA channel 9 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C9TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C9TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C9CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x4E4++0x3
line.long 0x0 "GPDMA_C9CR,GPDMA channel 9 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C9BR1.BNDT[15:0] = 0 and GPDMA_C9BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
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bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x510++0xB
line.long 0x0 "GPDMA_C9TR1,GPDMA channel 9 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC9 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
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bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
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hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
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bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC9 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
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bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
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bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
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bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C9TR2,GPDMA channel 9 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 9,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
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hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: channel,?,?"
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bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 9 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 9 is activated (GPDMA_C9CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
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bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 9 is activated (GPDMA_C9CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C9CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
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hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 9 is activated (GPDMA_C9CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4 [GPDMA_requests]/>."
line.long 0x8 "GPDMA_C9BR1,GPDMA channel 9 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
group.long 0x518++0x13
line.long 0x0 "GPDMA_C11BR1,GPDMA channel 11 block register 1"
bitfld.long 0x0 31. "BRDDEC,None" "0: at the end of a block transfer,1: at the end of a block transfer"
bitfld.long 0x0 30. "BRSDEC,None" "0: at the end of a block transfer,1: at the end of a block transfer"
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bitfld.long 0x0 29. "DDEC,None" "0: At the end of a programmed burst transfer to the..,1: At the end of a programmed burst transfer to the.."
bitfld.long 0x0 28. "SDEC,None" "0: At the end of a programmed burst transfer from..,1: At the end of a programmed burst transfer from.."
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hexmask.long.word 0x0 16.--26. 1. "BRC,This field contains the number of repetitions of the current block (0 to 2047)."
hexmask.long.word 0x0 0.--15. 1. "BNDT,Block size transferred from the source. When the channel is enabled this field becomes read-only and is decremented indicating the remaining number of data items in the current source block to be transferred. BNDT[15:0] is programmed in number of.."
line.long 0x4 "GPDMA_C9SAR,GPDMA channel 9 source address register"
hexmask.long 0x4 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x8 "GPDMA_C9DAR,GPDMA channel 9 destination address register"
hexmask.long 0x8 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
line.long 0xC "GPDMA_C11TR3,GPDMA channel 11 transfer register 3"
hexmask.long.word 0xC 16.--28. 1. "DAO,The destination address pointed by GPDMA_CxDAR is incremented or decremented (depending on GPDMA_C11BR1.DDEC) by this offset DAO[12:0] for each programmed destination burst. This offset is not including and is added to the programmed burst size.."
hexmask.long.word 0xC 0.--12. 1. "SAO,The source address pointed by GPDMA_CxSAR is incremented or decremented (depending on GPDMA_C11BR1.SDEC) by this offset SAO[12:0] for each programmed source burst. This offset is not including and is added to the programmed burst size when the.."
line.long 0x10 "GPDMA_C11BR2,GPDMA channel 11 block register 2"
hexmask.long.word 0x10 16.--31. 1. "BRDAO,For a channel with 2D addressing capability this field is used to update (by addition or subtraction depending on GPDMA_C11BR1.BRDDEC) the current destination address (GPDMA_CxDAR) at the end of a block transfer."
hexmask.long.word 0x10 0.--15. 1. "BRSAO,For a channel with 2D addressing capability this field is used to update (by addition or subtraction depending on GPDMA_C11BR1.BRSDEC) the current source address (GPDMA_CxSAR) at the end of a block transfer."
group.long 0x54C++0x3
line.long 0x0 "GPDMA_C9LLR,GPDMA channel 9 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C9TR1 from the memory during the link transfer." "0: no GPDMA_C9TR1 update,1: GPDMA_C9TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C9TR2 from the memory during the link transfer." "0: no GPDMA_C9TR2 update,1: GPDMA_C9TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C9BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C9LLR is not equal to 0 the linked-list is not completed. GPDMA_C9BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C9BR1 update from memory,1: GPDMA_C9BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C9LLR from the memory during the link transfer." "0: no GPDMA_C9LLR update,1: GPDMA_C9LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
group.long 0x54C++0x7
line.long 0x0 "GPDMA_C11LLR,GPDMA channel 11 linked-list address register"
bitfld.long 0x0 31. "UT1,This bit controls the update of GPDMA_C11TR1 from the memory during the link transfer." "0: no GPDMA_C11TR1 update,1: GPDMA_C11TR1 update"
bitfld.long 0x0 30. "UT2,This bit controls the update of GPDMA_C11TR2 from the memory during the link transfer." "0: no GPDMA_C11TR2 update,1: GPDMA_C11TR2 update"
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bitfld.long 0x0 29. "UB1,This bit controls the update of GPDMA_C11BR1 from the memory during the link transfer. If UB1 = 0 and if GPDMA_C11LLR is not equal to 0 the linked-list is not completed. GPDMA_C11BR1.BNDT[15:0] is then restored to the programmed value after data.." "0: no GPDMA_C11BR1 update from memory,1: GPDMA_C11BR1 update"
bitfld.long 0x0 28. "USA,This bit controls the update of GPDMA_CxSAR from the memory during the link transfer." "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
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bitfld.long 0x0 27. "UDA,This bit is used to control the update of GPDMA_CxDAR from the memory during the link transfer." "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 26. "UT3,This bit controls the update of GPDMA_CxTR3 from the memory during the link transfer." "0: no GPDMA_CxTR3 update,1: GPDMA_CxTR3 update"
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bitfld.long 0x0 25. "UB2,This bit controls the update of GPDMA_CxBR2 from the memory during the link transfer." "0: no GPDMA_CxBR2 update,1: GPDMA_CxBR2 update"
bitfld.long 0x0 16. "ULL,This bit is used to control the update of GPDMA_C11LLR from the memory during the link transfer." "0: no GPDMA_C11LLR update,1: GPDMA_C11LLR update"
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hexmask.long.word 0x0 2.--15. 1. "LA,If UT1 = UT2 = UB1 = USA = UDA = ULL = 0 and if LA[15:20] = 0 the current LLI is the last one. The channel transfer is completed without any update of the linked-list GPDMA register file."
line.long 0x4 "GPDMA_C10LBAR,GPDMA channel 10 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,None"
wgroup.long 0x55C++0x3
line.long 0x0 "GPDMA_C10FCR,GPDMA channel 10 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
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bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x560++0x3
line.long 0x0 "GPDMA_C10SR,GPDMA channel 10 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C10TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
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bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
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bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
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bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C10TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
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bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C10CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x564++0x3
line.long 0x0 "GPDMA_C10CR,GPDMA channel 10 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
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bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C10BR1.BNDT[15:0] = 0 and GPDMA_C10BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
newline
bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x590++0x7
line.long 0x0 "GPDMA_C10TR1,GPDMA channel 10 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC10 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
newline
bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
newline
hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
newline
bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC10 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
newline
bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
newline
bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C10TR2,GPDMA channel 10 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 10,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
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hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: channel,?,?"
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bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 10 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 10 is activated (GPDMA_C10CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
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bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 10 is activated (GPDMA_C10CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C10CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
newline
hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 10 is activated (GPDMA_C10CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4.."
group.long 0x59C++0x7
line.long 0x0 "GPDMA_C10SAR,GPDMA channel 10 source address register"
hexmask.long 0x0 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x4 "GPDMA_C10DAR,GPDMA channel 10 destination address register"
hexmask.long 0x4 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
group.long 0x5D0++0x3
line.long 0x0 "GPDMA_C11LBAR,GPDMA channel 11 linked-list base address register"
hexmask.long.word 0x0 16.--31. 1. "LBA,None"
wgroup.long 0x5DC++0x3
line.long 0x0 "GPDMA_C11FCR,GPDMA channel 11 flag clear register"
bitfld.long 0x0 14. "TOF,None" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,None" "0: no effect,1: corresponding SUSPF flag cleared"
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bitfld.long 0x0 12. "USEF,None" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,None" "0: no effect,1: corresponding ULEF flag cleared"
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bitfld.long 0x0 10. "DTEF,None" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,None" "0: no effect,1: corresponding HTF flag cleared"
newline
bitfld.long 0x0 8. "TCF,None" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x5E0++0x3
line.long 0x0 "GPDMA_C11SR,GPDMA channel 11 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,Number of available write beats in the FIFO in units of the programmed destination data width (see GPDMA_C11TR1.DDW_LOG2[1:0] in units of bytes half-words or words)."
bitfld.long 0x0 14. "TOF,None" "0: no trigger overrun event,1: a trigger overrun event occurred"
newline
bitfld.long 0x0 13. "SUSPF,None" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,None" "0: no user setting error event,1: a user setting error event occurred"
newline
bitfld.long 0x0 11. "ULEF,None" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,None" "0: no data transfer error event,1: a master bus error event occurred on a data.."
newline
bitfld.long 0x0 9. "HTF,A half transfer event is either a half block transfer or a half 2D/repeated block transfer depending on the transfer complete event mode (GPDMA_C11TR2.TCEM[1:0])." "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,A transfer complete event is either a block transfer complete a 2D/repeated block transfer complete or a LLI transfer complete including the upload of the next LLI if any or the full linked-list completion depending on the transfer complete event.." "0: no transfer complete event,1: a transfer complete event occurred"
newline
bitfld.long 0x0 0. "IDLEF,This idle flag is deasserted by hardware when the channel is enabled (GPDMA_C11CR.EN = 1) with a valid channel configuration (no USEF to be immediately reported)." "0: channel not in idle state,1: channel in idle state"
group.long 0x5E4++0x3
line.long 0x0 "GPDMA_C11CR,GPDMA channel 11 control register"
bitfld.long 0x0 22.--23. "PRIO,None" "0: low priority,1: low priority,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,This bit is used to allocate the master port for the update of the GPDMA linked-list registers from the memory." "0: port 0,1: port 1"
newline
bitfld.long 0x0 16. "LSM,First the (possible 1D/repeated) block transfer is executed as defined by the current internal register file until GPDMA_C11BR1.BNDT[15:0] = 0 and GPDMA_C11BR1.BRC[10:0] = 0. Secondly the next linked-list data structure is conditionally uploaded from.." "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,None" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 13. "SUSPIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,None" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 11. "ULEIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,None" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "HTIE,None" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,None" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "SUSP,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 2. Else:" "0: write: resume channel,1: write: suspend channel"
bitfld.long 0x0 1. "RESET,This bit is write only. Writing 0 has no impact. Writing 1 implies the reset of the following: the FIFO the channel internal state SUSP and EN bits (whatever is written receptively in bit 2 and bit 0)." "0: no channel reset,1: channel reset"
newline
bitfld.long 0x0 0. "EN,Writing 1 into the field RESET (bit 1) causes the hardware to de-assert this bit whatever is written into this bit 0. Else:" "0: write: ignored,1: write: enable channel"
group.long 0x610++0x7
line.long 0x0 "GPDMA_C11TR1,GPDMA channel 11 transfer register 1"
bitfld.long 0x0 31. "DSEC,If GPDMA_SECCFGR.SEC11 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,This bit is used to allocate the master port for the destination transfer" "0: port 0,1: port 1"
newline
bitfld.long 0x0 27. "DHx,If the destination data size is shorter than a word this bit is ignored." "0: no halfword-based exchanged within word,1: the two consecutive"
bitfld.long 0x0 26. "DBx,If the destination data size is a byte this bit is ignored." "0: no byte-based exchange within half-word,1: the two consecutive"
newline
hexmask.long.byte 0x0 20.--25. 1. "DBL_1,The burst length unit is one data named beat within a burst. If DBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width DDW_LOG2[1:0]."
bitfld.long 0x0 19. "DINC,The destination address pointed by GPDMA_CxDAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
newline
bitfld.long 0x0 16.--17. "DDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,If GPDMA_SECCFGR.SEC11 = 1 and the access is secure:" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,This bit is used to allocate the master port for the source transfer" "0: port 0,1: port 1"
bitfld.long 0x0 13. "SBx,If the source data width is shorter than a word this bit is ignored." "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
newline
bitfld.long 0x0 11.--12. "PAM,If DDW_LOG2[1:0] = SDW_LOG2[1:0]: if the data width of a burst destination transfer is equal to the data width of a burst source transfer these bits are ignored." "0: COND1 is [PAM_1] source data is transferred as..,1: COND1 is [PAM_1] source data is transferred as..,2: COND1 is [PAM_1] successive source data are FIFO..,3: COND1 is [PAM_1] successive source data are FIFO.."
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,The burst length unit is one data named beat within a burst. If SBL_1[5:0] = 0 the burst can be named as single. Each data/beat has a width defined by the destination data width SDW_LOG2[1:0]."
newline
bitfld.long 0x0 3. "SINC,The source address pointed by GPDMA_CxSAR is kept constant after a burst beat/single transfer or is incremented by the offset value corresponding to a contiguous data after a burst beat/single transfer." "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,None" "0: byte,1: half-word,2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C11TR2,GPDMA channel 11 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,These bits define the transfer granularity for the transfer complete and half transfer complete events generation." "0: at block level,1: channel 11,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,These bits define the polarity of the selected trigger event input defined by TRIGSEL[5:0]." "0: no trigger,1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
newline
hexmask.long.byte 0x4 16.--21. 1. "TRIGSEL,These bits select the trigger event input of the GPDMA transfer (as per less than xe3 [GPDMA_triggers]/>) with anactive trigger event if TRIGPOL[1:0] is not equal to 00."
bitfld.long 0x4 14.--15. "TRIGM,These bits define the transfer granularity for its conditioning by the trigger." "0: at block level: the first burst read of each..,1: channel,?,?"
newline
bitfld.long 0x4 12. "PFREQ,Caution: If a given channel 11 is not implemented with this feature this bit is reserved and PFREQ is not present (see less than xe1 [GPDMA_channels]/> for the list of the implemented channels with this feature)." "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 11. "BREQ,If the channel 11 is activated (GPDMA_C11CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer) this bit is ignored. Else:" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
newline
bitfld.long 0x4 10. "DREQ,This bit is ignored if channel 11 is activated (GPDMA_C11CR.EN asserted) with SWREQ = 1 (software request for a memory-to-memory transfer). Else:" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
bitfld.long 0x4 9. "SWREQ,This bit is internally taken into account when GPDMA_C11CR.EN is asserted." "0: no software request,1: software request for a memory-to-memory transfer"
newline
hexmask.long.byte 0x4 0.--6. 1. "REQSEL,These bits are ignored if channel 11 is activated (GPDMA_C11CR.EN asserted) with SWREQ=1 (software request for a memory-to-memory transfer). Else the selected hardware request is internally taken into account as per less than xe4.."
group.long 0x61C++0x7
line.long 0x0 "GPDMA_C11SAR,GPDMA channel 11 source address register"
hexmask.long 0x0 0.--31. 1. "SA,This field is the pointer to the address from which the next data is read."
line.long 0x4 "GPDMA_C11DAR,GPDMA channel 11 destination address register"
hexmask.long 0x4 0.--31. 1. "DA,This field is the pointer to the address from which the next data is written."
tree.end
tree.end
tree "GPIO (General Purpose Inputs/Outputs)"
base ad:0x0
tree "GPIOA"
base ad:0x42020000
group.long 0x0++0xF
line.long 0x0 "GPIOA_MODER,GPIO port mode register"
bitfld.long 0x0 30.--31. "MODE15,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 28.--29. "MODE14,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 26.--27. "MODE13,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 24.--25. "MODE12,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 22.--23. "MODE11,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 20.--21. "MODE10,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 18.--19. "MODE9,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 16.--17. "MODE8,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 14.--15. "MODE7,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 12.--13. "MODE6,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 10.--11. "MODE5,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 8.--9. "MODE4,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 6.--7. "MODE3,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 4.--5. "MODE2,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 2.--3. "MODE1,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 0.--1. "MODE0,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
line.long 0x4 "GPIOA_OTYPER,GPIO port output type register"
bitfld.long 0x4 15. "OT15,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 14. "OT14,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 13. "OT13,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 12. "OT12,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 11. "OT11,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 10. "OT10,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 9. "OT9,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 8. "OT8,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 7. "OT7,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 6. "OT6,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 5. "OT5,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 4. "OT4,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 3. "OT3,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 2. "OT2,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 1. "OT1,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 0. "OT0,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOA_OSPEEDR,GPIO port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 28.--29. "OSPEED14,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 26.--27. "OSPEED13,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 24.--25. "OSPEED12,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 22.--23. "OSPEED11,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 20.--21. "OSPEED10,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 18.--19. "OSPEED9,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 16.--17. "OSPEED8,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 14.--15. "OSPEED7,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 12.--13. "OSPEED6,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 8.--9. "OSPEED4,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 6.--7. "OSPEED3,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 4.--5. "OSPEED2,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 2.--3. "OSPEED1,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 0.--1. "OSPEED0,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
line.long 0xC "GPIOA_PUPDR,GPIO port pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 28.--29. "PUPD14,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 26.--27. "PUPD13,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 24.--25. "PUPD12,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 22.--23. "PUPD11,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 20.--21. "PUPD10,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 18.--19. "PUPD9,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 16.--17. "PUPD8,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 14.--15. "PUPD7,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 12.--13. "PUPD6,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 8.--9. "PUPD4,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 6.--7. "PUPD3,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 4.--5. "PUPD2,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 2.--3. "PUPD1,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 0.--1. "PUPD0,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOA_IDR,GPIO port input data register"
bitfld.long 0x0 15. "ID15,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 14. "ID14,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 13. "ID13,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 12. "ID12,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 11. "ID11,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 10. "ID10,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 9. "ID9,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 8. "ID8,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 7. "ID7,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 6. "ID6,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 4. "ID4,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 3. "ID3,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 2. "ID2,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 1. "ID1,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 0. "ID0,Port x I/O pin y input data" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOA_ODR,GPIO port output data register"
bitfld.long 0x0 15. "OD15,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 14. "OD14,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 13. "OD13,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 12. "OD12,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 11. "OD11,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 10. "OD10,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 9. "OD9,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 8. "OD8,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 7. "OD7,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 6. "OD6,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 4. "OD4,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 3. "OD3,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 2. "OD2,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 1. "OD1,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 0. "OD0,Port x I/O pin y output data" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOA_BSRR,GPIO port bit set/reset register"
bitfld.long 0x0 31. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 30. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 29. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 28. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 27. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 26. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 25. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 24. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 23. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 22. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 21. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 20. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 19. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 18. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 17. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 16. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 15. "BS15,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 14. "BS14,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BS13,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 12. "BS12,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BS11,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 10. "BS10,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BS9,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 8. "BS8,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BS7,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 6. "BS6,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BS5,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 4. "BS4,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BS3,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 2. "BS2,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BS1,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 0. "BS0,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
group.long 0x1C++0xB
line.long 0x0 "GPIOA_LCKR,GPIO port configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active."
bitfld.long 0x0 15. "LCK15,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 14. "LCK14,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 13. "LCK13,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 12. "LCK12,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 11. "LCK11,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 10. "LCK10,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 9. "LCK9,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 8. "LCK8,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 7. "LCK7,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 6. "LCK6,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 5. "LCK5,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 4. "LCK4,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 3. "LCK3,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 2. "LCK2,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 1. "LCK1,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 0. "LCK0,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
line.long 0x4 "GPIOA_AFRL,GPIO alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Port x I/O pin y alternate function selection for"
line.long 0x8 "GPIOA_AFRH,GPIO alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Port x I/O pin y alternate function selection"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOA_BRR,GPIO port bit reset register"
bitfld.long 0x0 15. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 14. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 12. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 10. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 8. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 6. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 4. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 2. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 0. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
group.long 0x2C++0x7
line.long 0x0 "GPIOA_HSLVR,GPIO high-speed low-voltage register"
bitfld.long 0x0 15. "HSLV15,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 14. "HSLV14,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 13. "HSLV13,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 12. "HSLV12,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 11. "HSLV11,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 10. "HSLV10,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 9. "HSLV9,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 8. "HSLV8,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 7. "HSLV7,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 6. "HSLV6,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 5. "HSLV5,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 4. "HSLV4,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 3. "HSLV3,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 2. "HSLV2,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 1. "HSLV1,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 0. "HSLV0,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
line.long 0x4 "GPIOA_SECCFGR,GPIO secure configuration register"
bitfld.long 0x4 15. "SEC15,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 14. "SEC14,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 13. "SEC13,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 12. "SEC12,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 11. "SEC11,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 10. "SEC10,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 9. "SEC9,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 8. "SEC8,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 7. "SEC7,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 6. "SEC6,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 5. "SEC5,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 4. "SEC4,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 3. "SEC3,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 2. "SEC2,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 1. "SEC1,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 0. "SEC0,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
tree.end
tree "SEC_GPIOA"
base ad:0x52020000
group.long 0x0++0xF
line.long 0x0 "GPIOA_MODER,GPIO port mode register"
bitfld.long 0x0 30.--31. "MODE15,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 28.--29. "MODE14,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 26.--27. "MODE13,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 24.--25. "MODE12,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 22.--23. "MODE11,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 20.--21. "MODE10,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 18.--19. "MODE9,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 16.--17. "MODE8,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 14.--15. "MODE7,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 12.--13. "MODE6,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 10.--11. "MODE5,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 8.--9. "MODE4,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 6.--7. "MODE3,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 4.--5. "MODE2,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 2.--3. "MODE1,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 0.--1. "MODE0,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
line.long 0x4 "GPIOA_OTYPER,GPIO port output type register"
bitfld.long 0x4 15. "OT15,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 14. "OT14,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 13. "OT13,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 12. "OT12,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 11. "OT11,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 10. "OT10,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 9. "OT9,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 8. "OT8,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 7. "OT7,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 6. "OT6,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 5. "OT5,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 4. "OT4,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 3. "OT3,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 2. "OT2,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 1. "OT1,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 0. "OT0,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOA_OSPEEDR,GPIO port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 28.--29. "OSPEED14,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 26.--27. "OSPEED13,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 24.--25. "OSPEED12,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 22.--23. "OSPEED11,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 20.--21. "OSPEED10,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 18.--19. "OSPEED9,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 16.--17. "OSPEED8,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 14.--15. "OSPEED7,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 12.--13. "OSPEED6,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 8.--9. "OSPEED4,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 6.--7. "OSPEED3,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 4.--5. "OSPEED2,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 2.--3. "OSPEED1,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 0.--1. "OSPEED0,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
line.long 0xC "GPIOA_PUPDR,GPIO port pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 28.--29. "PUPD14,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 26.--27. "PUPD13,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 24.--25. "PUPD12,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 22.--23. "PUPD11,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 20.--21. "PUPD10,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 18.--19. "PUPD9,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 16.--17. "PUPD8,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 14.--15. "PUPD7,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 12.--13. "PUPD6,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 8.--9. "PUPD4,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 6.--7. "PUPD3,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 4.--5. "PUPD2,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 2.--3. "PUPD1,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 0.--1. "PUPD0,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOA_IDR,GPIO port input data register"
bitfld.long 0x0 15. "ID15,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 14. "ID14,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 13. "ID13,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 12. "ID12,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 11. "ID11,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 10. "ID10,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 9. "ID9,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 8. "ID8,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 7. "ID7,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 6. "ID6,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 4. "ID4,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 3. "ID3,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 2. "ID2,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 1. "ID1,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 0. "ID0,Port x I/O pin y input data" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOA_ODR,GPIO port output data register"
bitfld.long 0x0 15. "OD15,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 14. "OD14,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 13. "OD13,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 12. "OD12,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 11. "OD11,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 10. "OD10,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 9. "OD9,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 8. "OD8,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 7. "OD7,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 6. "OD6,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 4. "OD4,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 3. "OD3,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 2. "OD2,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 1. "OD1,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 0. "OD0,Port x I/O pin y output data" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOA_BSRR,GPIO port bit set/reset register"
bitfld.long 0x0 31. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 30. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 29. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 28. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 27. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 26. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 25. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 24. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 23. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 22. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 21. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 20. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 19. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 18. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 17. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 16. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 15. "BS15,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 14. "BS14,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BS13,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 12. "BS12,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BS11,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 10. "BS10,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BS9,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 8. "BS8,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BS7,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 6. "BS6,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BS5,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 4. "BS4,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BS3,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 2. "BS2,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BS1,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 0. "BS0,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
group.long 0x1C++0xB
line.long 0x0 "GPIOA_LCKR,GPIO port configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active."
bitfld.long 0x0 15. "LCK15,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 14. "LCK14,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 13. "LCK13,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 12. "LCK12,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 11. "LCK11,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 10. "LCK10,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 9. "LCK9,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 8. "LCK8,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 7. "LCK7,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 6. "LCK6,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 5. "LCK5,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 4. "LCK4,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 3. "LCK3,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 2. "LCK2,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 1. "LCK1,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 0. "LCK0,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
line.long 0x4 "GPIOA_AFRL,GPIO alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Port x I/O pin y alternate function selection for"
line.long 0x8 "GPIOA_AFRH,GPIO alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Port x I/O pin y alternate function selection"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOA_BRR,GPIO port bit reset register"
bitfld.long 0x0 15. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 14. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 12. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 10. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 8. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 6. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 4. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 2. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 0. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
group.long 0x2C++0x7
line.long 0x0 "GPIOA_HSLVR,GPIO high-speed low-voltage register"
bitfld.long 0x0 15. "HSLV15,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 14. "HSLV14,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 13. "HSLV13,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 12. "HSLV12,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 11. "HSLV11,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 10. "HSLV10,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 9. "HSLV9,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 8. "HSLV8,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 7. "HSLV7,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 6. "HSLV6,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 5. "HSLV5,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 4. "HSLV4,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 3. "HSLV3,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 2. "HSLV2,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 1. "HSLV1,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 0. "HSLV0,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
line.long 0x4 "GPIOA_SECCFGR,GPIO secure configuration register"
bitfld.long 0x4 15. "SEC15,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 14. "SEC14,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 13. "SEC13,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 12. "SEC12,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 11. "SEC11,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 10. "SEC10,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 9. "SEC9,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 8. "SEC8,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 7. "SEC7,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 6. "SEC6,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 5. "SEC5,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 4. "SEC4,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 3. "SEC3,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 2. "SEC2,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 1. "SEC1,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 0. "SEC0,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
tree.end
tree "GPIOB"
base ad:0x42020400
group.long 0x0++0xF
line.long 0x0 "GPIOB_MODER,GPIO port mode register"
bitfld.long 0x0 30.--31. "MODE15,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 28.--29. "MODE14,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 26.--27. "MODE13,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 24.--25. "MODE12,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 22.--23. "MODE11,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 20.--21. "MODE10,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 18.--19. "MODE9,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 16.--17. "MODE8,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 14.--15. "MODE7,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 12.--13. "MODE6,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 10.--11. "MODE5,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 8.--9. "MODE4,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 6.--7. "MODE3,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 4.--5. "MODE2,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 2.--3. "MODE1,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 0.--1. "MODE0,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
line.long 0x4 "GPIOB_OTYPER,GPIO port output type register"
bitfld.long 0x4 15. "OT15,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 14. "OT14,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 13. "OT13,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 12. "OT12,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 11. "OT11,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 10. "OT10,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 9. "OT9,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 8. "OT8,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 7. "OT7,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 6. "OT6,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 5. "OT5,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 4. "OT4,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 3. "OT3,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 2. "OT2,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 1. "OT1,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 0. "OT0,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOB_OSPEEDR,GPIO port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 28.--29. "OSPEED14,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 26.--27. "OSPEED13,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 24.--25. "OSPEED12,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 22.--23. "OSPEED11,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 20.--21. "OSPEED10,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 18.--19. "OSPEED9,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 16.--17. "OSPEED8,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 14.--15. "OSPEED7,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 12.--13. "OSPEED6,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 8.--9. "OSPEED4,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 6.--7. "OSPEED3,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 4.--5. "OSPEED2,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 2.--3. "OSPEED1,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 0.--1. "OSPEED0,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
line.long 0xC "GPIOB_PUPDR,GPIO port pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 28.--29. "PUPD14,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 26.--27. "PUPD13,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 24.--25. "PUPD12,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 22.--23. "PUPD11,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 20.--21. "PUPD10,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 18.--19. "PUPD9,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 16.--17. "PUPD8,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 14.--15. "PUPD7,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 12.--13. "PUPD6,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 8.--9. "PUPD4,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 6.--7. "PUPD3,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 4.--5. "PUPD2,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 2.--3. "PUPD1,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 0.--1. "PUPD0,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOB_IDR,GPIO port input data register"
bitfld.long 0x0 15. "ID15,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 14. "ID14,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 13. "ID13,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 12. "ID12,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 11. "ID11,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 10. "ID10,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 9. "ID9,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 8. "ID8,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 7. "ID7,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 6. "ID6,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 4. "ID4,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 3. "ID3,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 2. "ID2,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 1. "ID1,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 0. "ID0,Port x I/O pin y input data" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOB_ODR,GPIO port output data register"
bitfld.long 0x0 15. "OD15,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 14. "OD14,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 13. "OD13,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 12. "OD12,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 11. "OD11,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 10. "OD10,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 9. "OD9,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 8. "OD8,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 7. "OD7,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 6. "OD6,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 4. "OD4,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 3. "OD3,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 2. "OD2,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 1. "OD1,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 0. "OD0,Port x I/O pin y output data" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOB_BSRR,GPIO port bit set/reset register"
bitfld.long 0x0 31. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 30. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 29. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 28. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 27. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 26. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 25. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 24. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 23. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 22. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 21. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 20. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 19. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 18. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 17. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 16. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 15. "BS15,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 14. "BS14,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BS13,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 12. "BS12,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BS11,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 10. "BS10,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BS9,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 8. "BS8,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BS7,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 6. "BS6,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BS5,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 4. "BS4,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BS3,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 2. "BS2,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BS1,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 0. "BS0,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
group.long 0x1C++0xB
line.long 0x0 "GPIOB_LCKR,GPIO port configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active."
bitfld.long 0x0 15. "LCK15,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 14. "LCK14,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 13. "LCK13,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 12. "LCK12,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 11. "LCK11,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 10. "LCK10,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 9. "LCK9,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 8. "LCK8,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 7. "LCK7,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 6. "LCK6,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 5. "LCK5,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 4. "LCK4,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 3. "LCK3,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 2. "LCK2,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 1. "LCK1,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 0. "LCK0,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
line.long 0x4 "GPIOB_AFRL,GPIO alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Port x I/O pin y alternate function selection for"
line.long 0x8 "GPIOB_AFRH,GPIO alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Port x I/O pin y alternate function selection"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOB_BRR,GPIO port bit reset register"
bitfld.long 0x0 15. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 14. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 12. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 10. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 8. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 6. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 4. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 2. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 0. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
group.long 0x2C++0x7
line.long 0x0 "GPIOB_HSLVR,GPIO high-speed low-voltage register"
bitfld.long 0x0 15. "HSLV15,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 14. "HSLV14,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 13. "HSLV13,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 12. "HSLV12,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 11. "HSLV11,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 10. "HSLV10,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 9. "HSLV9,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 8. "HSLV8,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 7. "HSLV7,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 6. "HSLV6,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 5. "HSLV5,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 4. "HSLV4,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 3. "HSLV3,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 2. "HSLV2,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 1. "HSLV1,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 0. "HSLV0,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
line.long 0x4 "GPIOB_SECCFGR,GPIO secure configuration register"
bitfld.long 0x4 15. "SEC15,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 14. "SEC14,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 13. "SEC13,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 12. "SEC12,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 11. "SEC11,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 10. "SEC10,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 9. "SEC9,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 8. "SEC8,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 7. "SEC7,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 6. "SEC6,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 5. "SEC5,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 4. "SEC4,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 3. "SEC3,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 2. "SEC2,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 1. "SEC1,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 0. "SEC0,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
tree.end
tree "SEC_GPIOB"
base ad:0x52020400
group.long 0x0++0xF
line.long 0x0 "GPIOB_MODER,GPIO port mode register"
bitfld.long 0x0 30.--31. "MODE15,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 28.--29. "MODE14,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 26.--27. "MODE13,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 24.--25. "MODE12,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 22.--23. "MODE11,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 20.--21. "MODE10,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 18.--19. "MODE9,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 16.--17. "MODE8,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 14.--15. "MODE7,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 12.--13. "MODE6,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 10.--11. "MODE5,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 8.--9. "MODE4,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 6.--7. "MODE3,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 4.--5. "MODE2,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 2.--3. "MODE1,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 0.--1. "MODE0,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
line.long 0x4 "GPIOB_OTYPER,GPIO port output type register"
bitfld.long 0x4 15. "OT15,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 14. "OT14,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 13. "OT13,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 12. "OT12,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 11. "OT11,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 10. "OT10,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 9. "OT9,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 8. "OT8,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 7. "OT7,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 6. "OT6,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 5. "OT5,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 4. "OT4,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 3. "OT3,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 2. "OT2,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 1. "OT1,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 0. "OT0,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOB_OSPEEDR,GPIO port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 28.--29. "OSPEED14,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 26.--27. "OSPEED13,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 24.--25. "OSPEED12,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 22.--23. "OSPEED11,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 20.--21. "OSPEED10,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 18.--19. "OSPEED9,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 16.--17. "OSPEED8,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 14.--15. "OSPEED7,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 12.--13. "OSPEED6,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 8.--9. "OSPEED4,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 6.--7. "OSPEED3,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 4.--5. "OSPEED2,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 2.--3. "OSPEED1,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 0.--1. "OSPEED0,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
line.long 0xC "GPIOB_PUPDR,GPIO port pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 28.--29. "PUPD14,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 26.--27. "PUPD13,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 24.--25. "PUPD12,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 22.--23. "PUPD11,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 20.--21. "PUPD10,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 18.--19. "PUPD9,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 16.--17. "PUPD8,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 14.--15. "PUPD7,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 12.--13. "PUPD6,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 8.--9. "PUPD4,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 6.--7. "PUPD3,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 4.--5. "PUPD2,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 2.--3. "PUPD1,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 0.--1. "PUPD0,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOB_IDR,GPIO port input data register"
bitfld.long 0x0 15. "ID15,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 14. "ID14,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 13. "ID13,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 12. "ID12,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 11. "ID11,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 10. "ID10,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 9. "ID9,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 8. "ID8,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 7. "ID7,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 6. "ID6,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 4. "ID4,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 3. "ID3,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 2. "ID2,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 1. "ID1,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 0. "ID0,Port x I/O pin y input data" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOB_ODR,GPIO port output data register"
bitfld.long 0x0 15. "OD15,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 14. "OD14,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 13. "OD13,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 12. "OD12,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 11. "OD11,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 10. "OD10,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 9. "OD9,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 8. "OD8,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 7. "OD7,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 6. "OD6,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 4. "OD4,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 3. "OD3,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 2. "OD2,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 1. "OD1,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 0. "OD0,Port x I/O pin y output data" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOB_BSRR,GPIO port bit set/reset register"
bitfld.long 0x0 31. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 30. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 29. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 28. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 27. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 26. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 25. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 24. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 23. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 22. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 21. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 20. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 19. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 18. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 17. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 16. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 15. "BS15,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 14. "BS14,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BS13,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 12. "BS12,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BS11,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 10. "BS10,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BS9,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 8. "BS8,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BS7,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 6. "BS6,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BS5,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 4. "BS4,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BS3,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 2. "BS2,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BS1,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 0. "BS0,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
group.long 0x1C++0xB
line.long 0x0 "GPIOB_LCKR,GPIO port configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active."
bitfld.long 0x0 15. "LCK15,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 14. "LCK14,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 13. "LCK13,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 12. "LCK12,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 11. "LCK11,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 10. "LCK10,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 9. "LCK9,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 8. "LCK8,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 7. "LCK7,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 6. "LCK6,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 5. "LCK5,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 4. "LCK4,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 3. "LCK3,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 2. "LCK2,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 1. "LCK1,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 0. "LCK0,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
line.long 0x4 "GPIOB_AFRL,GPIO alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Port x I/O pin y alternate function selection for"
line.long 0x8 "GPIOB_AFRH,GPIO alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Port x I/O pin y alternate function selection"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOB_BRR,GPIO port bit reset register"
bitfld.long 0x0 15. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 14. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 12. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 10. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 8. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 6. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 4. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 2. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 0. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
group.long 0x2C++0x7
line.long 0x0 "GPIOB_HSLVR,GPIO high-speed low-voltage register"
bitfld.long 0x0 15. "HSLV15,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 14. "HSLV14,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 13. "HSLV13,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 12. "HSLV12,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 11. "HSLV11,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 10. "HSLV10,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 9. "HSLV9,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 8. "HSLV8,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 7. "HSLV7,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 6. "HSLV6,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 5. "HSLV5,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 4. "HSLV4,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 3. "HSLV3,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 2. "HSLV2,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 1. "HSLV1,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 0. "HSLV0,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
line.long 0x4 "GPIOB_SECCFGR,GPIO secure configuration register"
bitfld.long 0x4 15. "SEC15,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 14. "SEC14,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 13. "SEC13,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 12. "SEC12,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 11. "SEC11,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 10. "SEC10,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 9. "SEC9,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 8. "SEC8,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 7. "SEC7,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 6. "SEC6,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 5. "SEC5,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 4. "SEC4,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 3. "SEC3,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 2. "SEC2,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 1. "SEC1,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 0. "SEC0,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
tree.end
tree "GPIOC"
base ad:0x42020800
group.long 0x0++0xF
line.long 0x0 "GPIOC_MODER,GPIO port mode register"
bitfld.long 0x0 30.--31. "MODE15,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 28.--29. "MODE14,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 26.--27. "MODE13,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 24.--25. "MODE12,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 22.--23. "MODE11,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 20.--21. "MODE10,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 18.--19. "MODE9,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 16.--17. "MODE8,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 14.--15. "MODE7,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 12.--13. "MODE6,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 10.--11. "MODE5,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 8.--9. "MODE4,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 6.--7. "MODE3,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 4.--5. "MODE2,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 2.--3. "MODE1,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 0.--1. "MODE0,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
line.long 0x4 "GPIOC_OTYPER,GPIO port output type register"
bitfld.long 0x4 15. "OT15,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 14. "OT14,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 13. "OT13,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 12. "OT12,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 11. "OT11,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 10. "OT10,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 9. "OT9,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 8. "OT8,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 7. "OT7,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 6. "OT6,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 5. "OT5,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 4. "OT4,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 3. "OT3,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 2. "OT2,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 1. "OT1,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 0. "OT0,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOC_OSPEEDR,GPIO port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 28.--29. "OSPEED14,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 26.--27. "OSPEED13,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 24.--25. "OSPEED12,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 22.--23. "OSPEED11,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 20.--21. "OSPEED10,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 18.--19. "OSPEED9,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 16.--17. "OSPEED8,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 14.--15. "OSPEED7,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 12.--13. "OSPEED6,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 8.--9. "OSPEED4,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 6.--7. "OSPEED3,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 4.--5. "OSPEED2,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 2.--3. "OSPEED1,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 0.--1. "OSPEED0,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
line.long 0xC "GPIOC_PUPDR,GPIO port pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 28.--29. "PUPD14,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 26.--27. "PUPD13,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 24.--25. "PUPD12,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 22.--23. "PUPD11,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 20.--21. "PUPD10,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 18.--19. "PUPD9,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 16.--17. "PUPD8,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 14.--15. "PUPD7,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 12.--13. "PUPD6,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 8.--9. "PUPD4,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 6.--7. "PUPD3,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 4.--5. "PUPD2,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 2.--3. "PUPD1,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 0.--1. "PUPD0,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOC_IDR,GPIO port input data register"
bitfld.long 0x0 15. "ID15,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 14. "ID14,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 13. "ID13,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 12. "ID12,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 11. "ID11,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 10. "ID10,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 9. "ID9,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 8. "ID8,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 7. "ID7,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 6. "ID6,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 4. "ID4,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 3. "ID3,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 2. "ID2,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 1. "ID1,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 0. "ID0,Port x I/O pin y input data" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOC_ODR,GPIO port output data register"
bitfld.long 0x0 15. "OD15,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 14. "OD14,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 13. "OD13,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 12. "OD12,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 11. "OD11,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 10. "OD10,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 9. "OD9,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 8. "OD8,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 7. "OD7,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 6. "OD6,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 4. "OD4,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 3. "OD3,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 2. "OD2,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 1. "OD1,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 0. "OD0,Port x I/O pin y output data" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOC_BSRR,GPIO port bit set/reset register"
bitfld.long 0x0 31. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 30. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 29. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 28. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 27. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 26. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 25. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 24. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 23. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 22. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 21. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 20. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 19. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 18. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 17. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 16. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 15. "BS15,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 14. "BS14,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BS13,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 12. "BS12,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BS11,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 10. "BS10,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BS9,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 8. "BS8,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BS7,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 6. "BS6,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BS5,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 4. "BS4,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BS3,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 2. "BS2,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BS1,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 0. "BS0,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
group.long 0x1C++0xB
line.long 0x0 "GPIOC_LCKR,GPIO port configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active."
bitfld.long 0x0 15. "LCK15,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 14. "LCK14,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 13. "LCK13,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 12. "LCK12,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 11. "LCK11,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 10. "LCK10,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 9. "LCK9,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 8. "LCK8,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 7. "LCK7,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 6. "LCK6,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 5. "LCK5,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 4. "LCK4,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 3. "LCK3,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 2. "LCK2,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 1. "LCK1,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 0. "LCK0,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
line.long 0x4 "GPIOC_AFRL,GPIO alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Port x I/O pin y alternate function selection for"
line.long 0x8 "GPIOC_AFRH,GPIO alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Port x I/O pin y alternate function selection"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOC_BRR,GPIO port bit reset register"
bitfld.long 0x0 15. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 14. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 12. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 10. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 8. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 6. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 4. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 2. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 0. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
group.long 0x2C++0x7
line.long 0x0 "GPIOC_HSLVR,GPIO high-speed low-voltage register"
bitfld.long 0x0 15. "HSLV15,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 14. "HSLV14,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 13. "HSLV13,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 12. "HSLV12,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 11. "HSLV11,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 10. "HSLV10,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 9. "HSLV9,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 8. "HSLV8,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 7. "HSLV7,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 6. "HSLV6,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 5. "HSLV5,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 4. "HSLV4,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 3. "HSLV3,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 2. "HSLV2,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 1. "HSLV1,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 0. "HSLV0,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
line.long 0x4 "GPIOC_SECCFGR,GPIO secure configuration register"
bitfld.long 0x4 15. "SEC15,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 14. "SEC14,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 13. "SEC13,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 12. "SEC12,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 11. "SEC11,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 10. "SEC10,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 9. "SEC9,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 8. "SEC8,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 7. "SEC7,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 6. "SEC6,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 5. "SEC5,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 4. "SEC4,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 3. "SEC3,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 2. "SEC2,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 1. "SEC1,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 0. "SEC0,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
tree.end
tree "SEC_GPIOC"
base ad:0x52020800
group.long 0x0++0xF
line.long 0x0 "GPIOC_MODER,GPIO port mode register"
bitfld.long 0x0 30.--31. "MODE15,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 28.--29. "MODE14,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 26.--27. "MODE13,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 24.--25. "MODE12,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 22.--23. "MODE11,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 20.--21. "MODE10,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 18.--19. "MODE9,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 16.--17. "MODE8,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 14.--15. "MODE7,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 12.--13. "MODE6,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 10.--11. "MODE5,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 8.--9. "MODE4,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 6.--7. "MODE3,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 4.--5. "MODE2,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 2.--3. "MODE1,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 0.--1. "MODE0,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
line.long 0x4 "GPIOC_OTYPER,GPIO port output type register"
bitfld.long 0x4 15. "OT15,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 14. "OT14,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 13. "OT13,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 12. "OT12,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 11. "OT11,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 10. "OT10,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 9. "OT9,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 8. "OT8,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 7. "OT7,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 6. "OT6,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 5. "OT5,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 4. "OT4,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 3. "OT3,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 2. "OT2,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 1. "OT1,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 0. "OT0,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOC_OSPEEDR,GPIO port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 28.--29. "OSPEED14,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 26.--27. "OSPEED13,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 24.--25. "OSPEED12,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 22.--23. "OSPEED11,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 20.--21. "OSPEED10,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 18.--19. "OSPEED9,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 16.--17. "OSPEED8,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 14.--15. "OSPEED7,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 12.--13. "OSPEED6,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 8.--9. "OSPEED4,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 6.--7. "OSPEED3,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 4.--5. "OSPEED2,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 2.--3. "OSPEED1,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 0.--1. "OSPEED0,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
line.long 0xC "GPIOC_PUPDR,GPIO port pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 28.--29. "PUPD14,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 26.--27. "PUPD13,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 24.--25. "PUPD12,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 22.--23. "PUPD11,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 20.--21. "PUPD10,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 18.--19. "PUPD9,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 16.--17. "PUPD8,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 14.--15. "PUPD7,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 12.--13. "PUPD6,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 8.--9. "PUPD4,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 6.--7. "PUPD3,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 4.--5. "PUPD2,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 2.--3. "PUPD1,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 0.--1. "PUPD0,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOC_IDR,GPIO port input data register"
bitfld.long 0x0 15. "ID15,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 14. "ID14,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 13. "ID13,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 12. "ID12,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 11. "ID11,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 10. "ID10,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 9. "ID9,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 8. "ID8,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 7. "ID7,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 6. "ID6,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 4. "ID4,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 3. "ID3,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 2. "ID2,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 1. "ID1,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 0. "ID0,Port x I/O pin y input data" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOC_ODR,GPIO port output data register"
bitfld.long 0x0 15. "OD15,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 14. "OD14,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 13. "OD13,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 12. "OD12,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 11. "OD11,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 10. "OD10,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 9. "OD9,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 8. "OD8,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 7. "OD7,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 6. "OD6,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 4. "OD4,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 3. "OD3,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 2. "OD2,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 1. "OD1,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 0. "OD0,Port x I/O pin y output data" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOC_BSRR,GPIO port bit set/reset register"
bitfld.long 0x0 31. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 30. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 29. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 28. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 27. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 26. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 25. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 24. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 23. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 22. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 21. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 20. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 19. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 18. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 17. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 16. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 15. "BS15,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 14. "BS14,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BS13,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 12. "BS12,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BS11,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 10. "BS10,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BS9,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 8. "BS8,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BS7,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 6. "BS6,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BS5,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 4. "BS4,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BS3,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 2. "BS2,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BS1,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 0. "BS0,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
group.long 0x1C++0xB
line.long 0x0 "GPIOC_LCKR,GPIO port configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active."
bitfld.long 0x0 15. "LCK15,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 14. "LCK14,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 13. "LCK13,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 12. "LCK12,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 11. "LCK11,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 10. "LCK10,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 9. "LCK9,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 8. "LCK8,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 7. "LCK7,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 6. "LCK6,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 5. "LCK5,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 4. "LCK4,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 3. "LCK3,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 2. "LCK2,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 1. "LCK1,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 0. "LCK0,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
line.long 0x4 "GPIOC_AFRL,GPIO alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Port x I/O pin y alternate function selection for"
line.long 0x8 "GPIOC_AFRH,GPIO alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Port x I/O pin y alternate function selection"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOC_BRR,GPIO port bit reset register"
bitfld.long 0x0 15. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 14. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 12. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 10. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 8. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 6. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 4. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 2. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 0. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
group.long 0x2C++0x7
line.long 0x0 "GPIOC_HSLVR,GPIO high-speed low-voltage register"
bitfld.long 0x0 15. "HSLV15,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 14. "HSLV14,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 13. "HSLV13,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 12. "HSLV12,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 11. "HSLV11,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 10. "HSLV10,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 9. "HSLV9,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 8. "HSLV8,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 7. "HSLV7,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 6. "HSLV6,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 5. "HSLV5,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 4. "HSLV4,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 3. "HSLV3,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 2. "HSLV2,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 1. "HSLV1,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 0. "HSLV0,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
line.long 0x4 "GPIOC_SECCFGR,GPIO secure configuration register"
bitfld.long 0x4 15. "SEC15,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 14. "SEC14,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 13. "SEC13,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 12. "SEC12,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 11. "SEC11,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 10. "SEC10,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 9. "SEC9,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 8. "SEC8,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 7. "SEC7,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 6. "SEC6,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 5. "SEC5,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 4. "SEC4,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 3. "SEC3,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 2. "SEC2,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 1. "SEC1,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 0. "SEC0,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
tree.end
tree "GPIOD"
base ad:0x42020C00
group.long 0x0++0xF
line.long 0x0 "GPIOD_MODER,GPIO port mode register"
bitfld.long 0x0 30.--31. "MODE15,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 28.--29. "MODE14,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 26.--27. "MODE13,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 24.--25. "MODE12,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 22.--23. "MODE11,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 20.--21. "MODE10,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 18.--19. "MODE9,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 16.--17. "MODE8,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 14.--15. "MODE7,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 12.--13. "MODE6,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 10.--11. "MODE5,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 8.--9. "MODE4,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 6.--7. "MODE3,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 4.--5. "MODE2,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 2.--3. "MODE1,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 0.--1. "MODE0,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
line.long 0x4 "GPIOD_OTYPER,GPIO port output type register"
bitfld.long 0x4 15. "OT15,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 14. "OT14,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 13. "OT13,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 12. "OT12,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 11. "OT11,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 10. "OT10,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 9. "OT9,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 8. "OT8,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 7. "OT7,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 6. "OT6,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 5. "OT5,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 4. "OT4,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 3. "OT3,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 2. "OT2,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 1. "OT1,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 0. "OT0,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOD_OSPEEDR,GPIO port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 28.--29. "OSPEED14,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 26.--27. "OSPEED13,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 24.--25. "OSPEED12,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 22.--23. "OSPEED11,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 20.--21. "OSPEED10,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 18.--19. "OSPEED9,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 16.--17. "OSPEED8,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 14.--15. "OSPEED7,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 12.--13. "OSPEED6,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 8.--9. "OSPEED4,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 6.--7. "OSPEED3,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 4.--5. "OSPEED2,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 2.--3. "OSPEED1,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 0.--1. "OSPEED0,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
line.long 0xC "GPIOD_PUPDR,GPIO port pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 28.--29. "PUPD14,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 26.--27. "PUPD13,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 24.--25. "PUPD12,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 22.--23. "PUPD11,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 20.--21. "PUPD10,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 18.--19. "PUPD9,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 16.--17. "PUPD8,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 14.--15. "PUPD7,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 12.--13. "PUPD6,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 8.--9. "PUPD4,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 6.--7. "PUPD3,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 4.--5. "PUPD2,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 2.--3. "PUPD1,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 0.--1. "PUPD0,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOD_IDR,GPIO port input data register"
bitfld.long 0x0 15. "ID15,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 14. "ID14,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 13. "ID13,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 12. "ID12,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 11. "ID11,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 10. "ID10,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 9. "ID9,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 8. "ID8,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 7. "ID7,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 6. "ID6,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 4. "ID4,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 3. "ID3,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 2. "ID2,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 1. "ID1,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 0. "ID0,Port x I/O pin y input data" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOD_ODR,GPIO port output data register"
bitfld.long 0x0 15. "OD15,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 14. "OD14,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 13. "OD13,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 12. "OD12,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 11. "OD11,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 10. "OD10,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 9. "OD9,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 8. "OD8,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 7. "OD7,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 6. "OD6,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 4. "OD4,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 3. "OD3,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 2. "OD2,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 1. "OD1,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 0. "OD0,Port x I/O pin y output data" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOD_BSRR,GPIO port bit set/reset register"
bitfld.long 0x0 31. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 30. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 29. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 28. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 27. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 26. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 25. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 24. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 23. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 22. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 21. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 20. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 19. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 18. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 17. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 16. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 15. "BS15,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 14. "BS14,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BS13,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 12. "BS12,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BS11,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 10. "BS10,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BS9,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 8. "BS8,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BS7,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 6. "BS6,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BS5,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 4. "BS4,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BS3,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 2. "BS2,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BS1,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 0. "BS0,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
group.long 0x1C++0xB
line.long 0x0 "GPIOD_LCKR,GPIO port configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active."
bitfld.long 0x0 15. "LCK15,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 14. "LCK14,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 13. "LCK13,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 12. "LCK12,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 11. "LCK11,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 10. "LCK10,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 9. "LCK9,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 8. "LCK8,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 7. "LCK7,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 6. "LCK6,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 5. "LCK5,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 4. "LCK4,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 3. "LCK3,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 2. "LCK2,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 1. "LCK1,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 0. "LCK0,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
line.long 0x4 "GPIOD_AFRL,GPIO alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Port x I/O pin y alternate function selection for"
line.long 0x8 "GPIOD_AFRH,GPIO alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Port x I/O pin y alternate function selection"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOD_BRR,GPIO port bit reset register"
bitfld.long 0x0 15. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 14. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 12. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 10. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 8. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 6. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 4. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 2. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 0. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
group.long 0x2C++0x7
line.long 0x0 "GPIOD_HSLVR,GPIO high-speed low-voltage register"
bitfld.long 0x0 15. "HSLV15,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 14. "HSLV14,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 13. "HSLV13,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 12. "HSLV12,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 11. "HSLV11,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 10. "HSLV10,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 9. "HSLV9,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 8. "HSLV8,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 7. "HSLV7,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 6. "HSLV6,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 5. "HSLV5,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 4. "HSLV4,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 3. "HSLV3,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 2. "HSLV2,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 1. "HSLV1,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 0. "HSLV0,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
line.long 0x4 "GPIOD_SECCFGR,GPIO secure configuration register"
bitfld.long 0x4 15. "SEC15,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 14. "SEC14,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 13. "SEC13,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 12. "SEC12,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 11. "SEC11,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 10. "SEC10,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 9. "SEC9,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 8. "SEC8,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 7. "SEC7,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 6. "SEC6,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 5. "SEC5,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 4. "SEC4,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 3. "SEC3,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 2. "SEC2,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 1. "SEC1,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 0. "SEC0,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
tree.end
tree "SEC_GPIOD"
base ad:0x52020C00
group.long 0x0++0xF
line.long 0x0 "GPIOD_MODER,GPIO port mode register"
bitfld.long 0x0 30.--31. "MODE15,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 28.--29. "MODE14,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 26.--27. "MODE13,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 24.--25. "MODE12,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 22.--23. "MODE11,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 20.--21. "MODE10,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 18.--19. "MODE9,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 16.--17. "MODE8,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 14.--15. "MODE7,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 12.--13. "MODE6,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 10.--11. "MODE5,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 8.--9. "MODE4,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 6.--7. "MODE3,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 4.--5. "MODE2,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 2.--3. "MODE1,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 0.--1. "MODE0,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
line.long 0x4 "GPIOD_OTYPER,GPIO port output type register"
bitfld.long 0x4 15. "OT15,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 14. "OT14,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 13. "OT13,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 12. "OT12,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 11. "OT11,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 10. "OT10,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 9. "OT9,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 8. "OT8,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 7. "OT7,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 6. "OT6,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 5. "OT5,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 4. "OT4,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 3. "OT3,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 2. "OT2,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 1. "OT1,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 0. "OT0,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOD_OSPEEDR,GPIO port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 28.--29. "OSPEED14,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 26.--27. "OSPEED13,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 24.--25. "OSPEED12,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 22.--23. "OSPEED11,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 20.--21. "OSPEED10,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 18.--19. "OSPEED9,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 16.--17. "OSPEED8,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 14.--15. "OSPEED7,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 12.--13. "OSPEED6,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 8.--9. "OSPEED4,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 6.--7. "OSPEED3,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 4.--5. "OSPEED2,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 2.--3. "OSPEED1,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 0.--1. "OSPEED0,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
line.long 0xC "GPIOD_PUPDR,GPIO port pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 28.--29. "PUPD14,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 26.--27. "PUPD13,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 24.--25. "PUPD12,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 22.--23. "PUPD11,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 20.--21. "PUPD10,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 18.--19. "PUPD9,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 16.--17. "PUPD8,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 14.--15. "PUPD7,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 12.--13. "PUPD6,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 8.--9. "PUPD4,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 6.--7. "PUPD3,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 4.--5. "PUPD2,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 2.--3. "PUPD1,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 0.--1. "PUPD0,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOD_IDR,GPIO port input data register"
bitfld.long 0x0 15. "ID15,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 14. "ID14,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 13. "ID13,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 12. "ID12,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 11. "ID11,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 10. "ID10,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 9. "ID9,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 8. "ID8,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 7. "ID7,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 6. "ID6,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 4. "ID4,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 3. "ID3,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 2. "ID2,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 1. "ID1,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 0. "ID0,Port x I/O pin y input data" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOD_ODR,GPIO port output data register"
bitfld.long 0x0 15. "OD15,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 14. "OD14,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 13. "OD13,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 12. "OD12,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 11. "OD11,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 10. "OD10,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 9. "OD9,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 8. "OD8,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 7. "OD7,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 6. "OD6,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 4. "OD4,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 3. "OD3,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 2. "OD2,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 1. "OD1,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 0. "OD0,Port x I/O pin y output data" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOD_BSRR,GPIO port bit set/reset register"
bitfld.long 0x0 31. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 30. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 29. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 28. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 27. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 26. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 25. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 24. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 23. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 22. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 21. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 20. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 19. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 18. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 17. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 16. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 15. "BS15,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 14. "BS14,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BS13,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 12. "BS12,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BS11,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 10. "BS10,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BS9,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 8. "BS8,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BS7,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 6. "BS6,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BS5,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 4. "BS4,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BS3,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 2. "BS2,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BS1,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 0. "BS0,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
group.long 0x1C++0xB
line.long 0x0 "GPIOD_LCKR,GPIO port configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active."
bitfld.long 0x0 15. "LCK15,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 14. "LCK14,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 13. "LCK13,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 12. "LCK12,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 11. "LCK11,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 10. "LCK10,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 9. "LCK9,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 8. "LCK8,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 7. "LCK7,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 6. "LCK6,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 5. "LCK5,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 4. "LCK4,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 3. "LCK3,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 2. "LCK2,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 1. "LCK1,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 0. "LCK0,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
line.long 0x4 "GPIOD_AFRL,GPIO alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Port x I/O pin y alternate function selection for"
line.long 0x8 "GPIOD_AFRH,GPIO alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Port x I/O pin y alternate function selection"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOD_BRR,GPIO port bit reset register"
bitfld.long 0x0 15. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 14. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 12. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 10. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 8. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 6. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 4. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 2. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 0. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
group.long 0x2C++0x7
line.long 0x0 "GPIOD_HSLVR,GPIO high-speed low-voltage register"
bitfld.long 0x0 15. "HSLV15,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 14. "HSLV14,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 13. "HSLV13,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 12. "HSLV12,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 11. "HSLV11,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 10. "HSLV10,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 9. "HSLV9,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 8. "HSLV8,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 7. "HSLV7,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 6. "HSLV6,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 5. "HSLV5,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 4. "HSLV4,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 3. "HSLV3,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 2. "HSLV2,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 1. "HSLV1,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 0. "HSLV0,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
line.long 0x4 "GPIOD_SECCFGR,GPIO secure configuration register"
bitfld.long 0x4 15. "SEC15,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 14. "SEC14,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 13. "SEC13,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 12. "SEC12,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 11. "SEC11,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 10. "SEC10,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 9. "SEC9,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 8. "SEC8,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 7. "SEC7,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 6. "SEC6,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 5. "SEC5,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 4. "SEC4,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 3. "SEC3,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 2. "SEC2,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 1. "SEC1,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 0. "SEC0,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
tree.end
tree "GPIOE"
base ad:0x42021000
group.long 0x0++0xF
line.long 0x0 "GPIOE_MODER,GPIO port mode register"
bitfld.long 0x0 30.--31. "MODE15,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 28.--29. "MODE14,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 26.--27. "MODE13,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 24.--25. "MODE12,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 22.--23. "MODE11,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 20.--21. "MODE10,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 18.--19. "MODE9,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 16.--17. "MODE8,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 14.--15. "MODE7,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 12.--13. "MODE6,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 10.--11. "MODE5,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 8.--9. "MODE4,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 6.--7. "MODE3,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 4.--5. "MODE2,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 2.--3. "MODE1,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 0.--1. "MODE0,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
line.long 0x4 "GPIOE_OTYPER,GPIO port output type register"
bitfld.long 0x4 15. "OT15,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 14. "OT14,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 13. "OT13,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 12. "OT12,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 11. "OT11,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 10. "OT10,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 9. "OT9,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 8. "OT8,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 7. "OT7,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 6. "OT6,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 5. "OT5,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 4. "OT4,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 3. "OT3,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 2. "OT2,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 1. "OT1,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 0. "OT0,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOE_OSPEEDR,GPIO port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 28.--29. "OSPEED14,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 26.--27. "OSPEED13,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 24.--25. "OSPEED12,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 22.--23. "OSPEED11,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 20.--21. "OSPEED10,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 18.--19. "OSPEED9,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 16.--17. "OSPEED8,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 14.--15. "OSPEED7,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 12.--13. "OSPEED6,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 8.--9. "OSPEED4,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 6.--7. "OSPEED3,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 4.--5. "OSPEED2,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 2.--3. "OSPEED1,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 0.--1. "OSPEED0,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
line.long 0xC "GPIOE_PUPDR,GPIO port pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 28.--29. "PUPD14,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 26.--27. "PUPD13,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 24.--25. "PUPD12,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 22.--23. "PUPD11,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 20.--21. "PUPD10,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 18.--19. "PUPD9,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 16.--17. "PUPD8,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 14.--15. "PUPD7,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 12.--13. "PUPD6,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 8.--9. "PUPD4,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 6.--7. "PUPD3,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 4.--5. "PUPD2,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 2.--3. "PUPD1,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 0.--1. "PUPD0,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOE_IDR,GPIO port input data register"
bitfld.long 0x0 15. "ID15,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 14. "ID14,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 13. "ID13,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 12. "ID12,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 11. "ID11,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 10. "ID10,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 9. "ID9,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 8. "ID8,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 7. "ID7,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 6. "ID6,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 4. "ID4,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 3. "ID3,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 2. "ID2,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 1. "ID1,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 0. "ID0,Port x I/O pin y input data" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOE_ODR,GPIO port output data register"
bitfld.long 0x0 15. "OD15,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 14. "OD14,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 13. "OD13,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 12. "OD12,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 11. "OD11,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 10. "OD10,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 9. "OD9,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 8. "OD8,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 7. "OD7,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 6. "OD6,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 4. "OD4,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 3. "OD3,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 2. "OD2,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 1. "OD1,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 0. "OD0,Port x I/O pin y output data" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOE_BSRR,GPIO port bit set/reset register"
bitfld.long 0x0 31. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 30. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 29. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 28. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 27. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 26. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 25. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 24. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 23. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 22. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 21. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 20. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 19. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 18. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 17. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 16. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 15. "BS15,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 14. "BS14,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BS13,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 12. "BS12,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BS11,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 10. "BS10,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BS9,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 8. "BS8,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BS7,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 6. "BS6,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BS5,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 4. "BS4,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BS3,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 2. "BS2,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BS1,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 0. "BS0,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
group.long 0x1C++0xB
line.long 0x0 "GPIOE_LCKR,GPIO port configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active."
bitfld.long 0x0 15. "LCK15,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 14. "LCK14,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 13. "LCK13,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 12. "LCK12,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 11. "LCK11,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 10. "LCK10,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 9. "LCK9,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 8. "LCK8,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 7. "LCK7,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 6. "LCK6,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 5. "LCK5,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 4. "LCK4,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 3. "LCK3,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 2. "LCK2,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 1. "LCK1,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 0. "LCK0,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
line.long 0x4 "GPIOE_AFRL,GPIO alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Port x I/O pin y alternate function selection for"
line.long 0x8 "GPIOE_AFRH,GPIO alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Port x I/O pin y alternate function selection"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOE_BRR,GPIO port bit reset register"
bitfld.long 0x0 15. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 14. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 12. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 10. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 8. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 6. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 4. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 2. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 0. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
group.long 0x2C++0x7
line.long 0x0 "GPIOE_HSLVR,GPIO high-speed low-voltage register"
bitfld.long 0x0 15. "HSLV15,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 14. "HSLV14,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 13. "HSLV13,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 12. "HSLV12,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 11. "HSLV11,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 10. "HSLV10,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 9. "HSLV9,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 8. "HSLV8,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 7. "HSLV7,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 6. "HSLV6,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 5. "HSLV5,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 4. "HSLV4,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 3. "HSLV3,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 2. "HSLV2,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 1. "HSLV1,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 0. "HSLV0,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
line.long 0x4 "GPIOE_SECCFGR,GPIO secure configuration register"
bitfld.long 0x4 15. "SEC15,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 14. "SEC14,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 13. "SEC13,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 12. "SEC12,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 11. "SEC11,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 10. "SEC10,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 9. "SEC9,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 8. "SEC8,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 7. "SEC7,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 6. "SEC6,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 5. "SEC5,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 4. "SEC4,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 3. "SEC3,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 2. "SEC2,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 1. "SEC1,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 0. "SEC0,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
tree.end
tree "SEC_GPIOE"
base ad:0x52021000
group.long 0x0++0xF
line.long 0x0 "GPIOE_MODER,GPIO port mode register"
bitfld.long 0x0 30.--31. "MODE15,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 28.--29. "MODE14,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 26.--27. "MODE13,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 24.--25. "MODE12,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 22.--23. "MODE11,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 20.--21. "MODE10,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 18.--19. "MODE9,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 16.--17. "MODE8,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 14.--15. "MODE7,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 12.--13. "MODE6,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 10.--11. "MODE5,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 8.--9. "MODE4,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 6.--7. "MODE3,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 4.--5. "MODE2,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 2.--3. "MODE1,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 0.--1. "MODE0,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
line.long 0x4 "GPIOE_OTYPER,GPIO port output type register"
bitfld.long 0x4 15. "OT15,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 14. "OT14,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 13. "OT13,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 12. "OT12,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 11. "OT11,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 10. "OT10,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 9. "OT9,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 8. "OT8,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 7. "OT7,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 6. "OT6,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 5. "OT5,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 4. "OT4,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 3. "OT3,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 2. "OT2,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 1. "OT1,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 0. "OT0,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOE_OSPEEDR,GPIO port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 28.--29. "OSPEED14,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 26.--27. "OSPEED13,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 24.--25. "OSPEED12,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 22.--23. "OSPEED11,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 20.--21. "OSPEED10,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 18.--19. "OSPEED9,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 16.--17. "OSPEED8,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 14.--15. "OSPEED7,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 12.--13. "OSPEED6,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 8.--9. "OSPEED4,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 6.--7. "OSPEED3,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 4.--5. "OSPEED2,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 2.--3. "OSPEED1,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 0.--1. "OSPEED0,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
line.long 0xC "GPIOE_PUPDR,GPIO port pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 28.--29. "PUPD14,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 26.--27. "PUPD13,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 24.--25. "PUPD12,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 22.--23. "PUPD11,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 20.--21. "PUPD10,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 18.--19. "PUPD9,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 16.--17. "PUPD8,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 14.--15. "PUPD7,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 12.--13. "PUPD6,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 8.--9. "PUPD4,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 6.--7. "PUPD3,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 4.--5. "PUPD2,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 2.--3. "PUPD1,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 0.--1. "PUPD0,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOE_IDR,GPIO port input data register"
bitfld.long 0x0 15. "ID15,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 14. "ID14,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 13. "ID13,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 12. "ID12,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 11. "ID11,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 10. "ID10,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 9. "ID9,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 8. "ID8,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 7. "ID7,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 6. "ID6,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 4. "ID4,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 3. "ID3,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 2. "ID2,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 1. "ID1,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 0. "ID0,Port x I/O pin y input data" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOE_ODR,GPIO port output data register"
bitfld.long 0x0 15. "OD15,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 14. "OD14,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 13. "OD13,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 12. "OD12,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 11. "OD11,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 10. "OD10,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 9. "OD9,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 8. "OD8,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 7. "OD7,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 6. "OD6,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 4. "OD4,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 3. "OD3,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 2. "OD2,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 1. "OD1,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 0. "OD0,Port x I/O pin y output data" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOE_BSRR,GPIO port bit set/reset register"
bitfld.long 0x0 31. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 30. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 29. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 28. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 27. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 26. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 25. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 24. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 23. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 22. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 21. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 20. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 19. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 18. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 17. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 16. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 15. "BS15,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 14. "BS14,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BS13,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 12. "BS12,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BS11,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 10. "BS10,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BS9,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 8. "BS8,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BS7,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 6. "BS6,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BS5,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 4. "BS4,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BS3,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 2. "BS2,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BS1,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 0. "BS0,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
group.long 0x1C++0xB
line.long 0x0 "GPIOE_LCKR,GPIO port configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active."
bitfld.long 0x0 15. "LCK15,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 14. "LCK14,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 13. "LCK13,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 12. "LCK12,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 11. "LCK11,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 10. "LCK10,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 9. "LCK9,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 8. "LCK8,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 7. "LCK7,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 6. "LCK6,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 5. "LCK5,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 4. "LCK4,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 3. "LCK3,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 2. "LCK2,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 1. "LCK1,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 0. "LCK0,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
line.long 0x4 "GPIOE_AFRL,GPIO alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Port x I/O pin y alternate function selection for"
line.long 0x8 "GPIOE_AFRH,GPIO alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Port x I/O pin y alternate function selection"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOE_BRR,GPIO port bit reset register"
bitfld.long 0x0 15. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 14. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 12. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 10. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 8. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 6. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 4. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 2. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 0. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
group.long 0x2C++0x7
line.long 0x0 "GPIOE_HSLVR,GPIO high-speed low-voltage register"
bitfld.long 0x0 15. "HSLV15,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 14. "HSLV14,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 13. "HSLV13,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 12. "HSLV12,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 11. "HSLV11,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 10. "HSLV10,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 9. "HSLV9,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 8. "HSLV8,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 7. "HSLV7,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 6. "HSLV6,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 5. "HSLV5,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 4. "HSLV4,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 3. "HSLV3,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 2. "HSLV2,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 1. "HSLV1,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 0. "HSLV0,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
line.long 0x4 "GPIOE_SECCFGR,GPIO secure configuration register"
bitfld.long 0x4 15. "SEC15,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 14. "SEC14,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 13. "SEC13,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 12. "SEC12,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 11. "SEC11,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 10. "SEC10,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 9. "SEC9,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 8. "SEC8,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 7. "SEC7,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 6. "SEC6,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 5. "SEC5,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 4. "SEC4,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 3. "SEC3,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 2. "SEC2,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 1. "SEC1,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 0. "SEC0,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
tree.end
tree "GPIOG"
base ad:0x42021800
group.long 0x0++0xF
line.long 0x0 "GPIOG_MODER,GPIO port mode register"
bitfld.long 0x0 30.--31. "MODE15,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 28.--29. "MODE14,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 26.--27. "MODE13,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 24.--25. "MODE12,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 22.--23. "MODE11,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 20.--21. "MODE10,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 18.--19. "MODE9,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 16.--17. "MODE8,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 14.--15. "MODE7,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 12.--13. "MODE6,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 10.--11. "MODE5,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 8.--9. "MODE4,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 6.--7. "MODE3,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 4.--5. "MODE2,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 2.--3. "MODE1,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 0.--1. "MODE0,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
line.long 0x4 "GPIOG_OTYPER,GPIO port output type register"
bitfld.long 0x4 15. "OT15,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 14. "OT14,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 13. "OT13,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 12. "OT12,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 11. "OT11,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 10. "OT10,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 9. "OT9,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 8. "OT8,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 7. "OT7,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 6. "OT6,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 5. "OT5,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 4. "OT4,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 3. "OT3,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 2. "OT2,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 1. "OT1,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 0. "OT0,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOG_OSPEEDR,GPIO port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 28.--29. "OSPEED14,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 26.--27. "OSPEED13,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 24.--25. "OSPEED12,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 22.--23. "OSPEED11,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 20.--21. "OSPEED10,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 18.--19. "OSPEED9,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 16.--17. "OSPEED8,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 14.--15. "OSPEED7,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 12.--13. "OSPEED6,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 8.--9. "OSPEED4,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 6.--7. "OSPEED3,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 4.--5. "OSPEED2,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 2.--3. "OSPEED1,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 0.--1. "OSPEED0,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
line.long 0xC "GPIOG_PUPDR,GPIO port pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 28.--29. "PUPD14,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 26.--27. "PUPD13,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 24.--25. "PUPD12,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 22.--23. "PUPD11,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 20.--21. "PUPD10,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 18.--19. "PUPD9,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 16.--17. "PUPD8,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 14.--15. "PUPD7,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 12.--13. "PUPD6,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 8.--9. "PUPD4,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 6.--7. "PUPD3,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 4.--5. "PUPD2,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 2.--3. "PUPD1,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 0.--1. "PUPD0,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOG_IDR,GPIO port input data register"
bitfld.long 0x0 15. "ID15,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 14. "ID14,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 13. "ID13,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 12. "ID12,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 11. "ID11,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 10. "ID10,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 9. "ID9,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 8. "ID8,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 7. "ID7,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 6. "ID6,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 4. "ID4,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 3. "ID3,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 2. "ID2,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 1. "ID1,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 0. "ID0,Port x I/O pin y input data" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOG_ODR,GPIO port output data register"
bitfld.long 0x0 15. "OD15,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 14. "OD14,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 13. "OD13,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 12. "OD12,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 11. "OD11,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 10. "OD10,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 9. "OD9,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 8. "OD8,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 7. "OD7,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 6. "OD6,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 4. "OD4,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 3. "OD3,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 2. "OD2,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 1. "OD1,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 0. "OD0,Port x I/O pin y output data" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOG_BSRR,GPIO port bit set/reset register"
bitfld.long 0x0 31. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 30. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 29. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 28. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 27. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 26. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 25. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 24. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 23. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 22. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 21. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 20. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 19. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 18. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 17. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 16. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 15. "BS15,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 14. "BS14,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BS13,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 12. "BS12,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BS11,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 10. "BS10,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BS9,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 8. "BS8,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BS7,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 6. "BS6,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BS5,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 4. "BS4,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BS3,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 2. "BS2,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BS1,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 0. "BS0,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
group.long 0x1C++0xB
line.long 0x0 "GPIOG_LCKR,GPIO port configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active."
bitfld.long 0x0 15. "LCK15,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 14. "LCK14,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 13. "LCK13,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 12. "LCK12,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 11. "LCK11,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 10. "LCK10,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 9. "LCK9,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 8. "LCK8,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 7. "LCK7,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 6. "LCK6,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 5. "LCK5,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 4. "LCK4,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 3. "LCK3,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 2. "LCK2,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 1. "LCK1,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 0. "LCK0,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
line.long 0x4 "GPIOG_AFRL,GPIO alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Port x I/O pin y alternate function selection for"
line.long 0x8 "GPIOG_AFRH,GPIO alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Port x I/O pin y alternate function selection"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOG_BRR,GPIO port bit reset register"
bitfld.long 0x0 15. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 14. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 12. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 10. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 8. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 6. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 4. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 2. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 0. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
group.long 0x2C++0x7
line.long 0x0 "GPIOG_HSLVR,GPIO high-speed low-voltage register"
bitfld.long 0x0 15. "HSLV15,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 14. "HSLV14,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 13. "HSLV13,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 12. "HSLV12,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 11. "HSLV11,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 10. "HSLV10,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 9. "HSLV9,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 8. "HSLV8,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 7. "HSLV7,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 6. "HSLV6,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 5. "HSLV5,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 4. "HSLV4,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 3. "HSLV3,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 2. "HSLV2,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 1. "HSLV1,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 0. "HSLV0,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
line.long 0x4 "GPIOG_SECCFGR,GPIO secure configuration register"
bitfld.long 0x4 15. "SEC15,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 14. "SEC14,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 13. "SEC13,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 12. "SEC12,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 11. "SEC11,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 10. "SEC10,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 9. "SEC9,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 8. "SEC8,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 7. "SEC7,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 6. "SEC6,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 5. "SEC5,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 4. "SEC4,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 3. "SEC3,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 2. "SEC2,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 1. "SEC1,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 0. "SEC0,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
tree.end
tree "SEC_GPIOG"
base ad:0x52021800
group.long 0x0++0xF
line.long 0x0 "GPIOG_MODER,GPIO port mode register"
bitfld.long 0x0 30.--31. "MODE15,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 28.--29. "MODE14,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 26.--27. "MODE13,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 24.--25. "MODE12,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 22.--23. "MODE11,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 20.--21. "MODE10,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 18.--19. "MODE9,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 16.--17. "MODE8,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 14.--15. "MODE7,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 12.--13. "MODE6,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 10.--11. "MODE5,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 8.--9. "MODE4,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 6.--7. "MODE3,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 4.--5. "MODE2,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 2.--3. "MODE1,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 0.--1. "MODE0,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
line.long 0x4 "GPIOG_OTYPER,GPIO port output type register"
bitfld.long 0x4 15. "OT15,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 14. "OT14,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 13. "OT13,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 12. "OT12,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 11. "OT11,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 10. "OT10,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 9. "OT9,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 8. "OT8,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 7. "OT7,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 6. "OT6,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 5. "OT5,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 4. "OT4,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 3. "OT3,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 2. "OT2,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 1. "OT1,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 0. "OT0,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOG_OSPEEDR,GPIO port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 28.--29. "OSPEED14,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 26.--27. "OSPEED13,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 24.--25. "OSPEED12,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 22.--23. "OSPEED11,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 20.--21. "OSPEED10,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 18.--19. "OSPEED9,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 16.--17. "OSPEED8,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 14.--15. "OSPEED7,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 12.--13. "OSPEED6,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 8.--9. "OSPEED4,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 6.--7. "OSPEED3,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 4.--5. "OSPEED2,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 2.--3. "OSPEED1,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 0.--1. "OSPEED0,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
line.long 0xC "GPIOG_PUPDR,GPIO port pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 28.--29. "PUPD14,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 26.--27. "PUPD13,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 24.--25. "PUPD12,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 22.--23. "PUPD11,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 20.--21. "PUPD10,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 18.--19. "PUPD9,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 16.--17. "PUPD8,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 14.--15. "PUPD7,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 12.--13. "PUPD6,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 8.--9. "PUPD4,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 6.--7. "PUPD3,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 4.--5. "PUPD2,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 2.--3. "PUPD1,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 0.--1. "PUPD0,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOG_IDR,GPIO port input data register"
bitfld.long 0x0 15. "ID15,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 14. "ID14,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 13. "ID13,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 12. "ID12,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 11. "ID11,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 10. "ID10,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 9. "ID9,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 8. "ID8,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 7. "ID7,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 6. "ID6,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 4. "ID4,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 3. "ID3,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 2. "ID2,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 1. "ID1,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 0. "ID0,Port x I/O pin y input data" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOG_ODR,GPIO port output data register"
bitfld.long 0x0 15. "OD15,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 14. "OD14,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 13. "OD13,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 12. "OD12,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 11. "OD11,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 10. "OD10,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 9. "OD9,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 8. "OD8,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 7. "OD7,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 6. "OD6,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 4. "OD4,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 3. "OD3,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 2. "OD2,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 1. "OD1,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 0. "OD0,Port x I/O pin y output data" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOG_BSRR,GPIO port bit set/reset register"
bitfld.long 0x0 31. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 30. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 29. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 28. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 27. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 26. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 25. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 24. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 23. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 22. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 21. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 20. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 19. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 18. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 17. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 16. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 15. "BS15,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 14. "BS14,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BS13,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 12. "BS12,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BS11,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 10. "BS10,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BS9,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 8. "BS8,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BS7,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 6. "BS6,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BS5,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 4. "BS4,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BS3,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 2. "BS2,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BS1,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 0. "BS0,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
group.long 0x1C++0xB
line.long 0x0 "GPIOG_LCKR,GPIO port configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active."
bitfld.long 0x0 15. "LCK15,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 14. "LCK14,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 13. "LCK13,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 12. "LCK12,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 11. "LCK11,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 10. "LCK10,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 9. "LCK9,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 8. "LCK8,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 7. "LCK7,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 6. "LCK6,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 5. "LCK5,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 4. "LCK4,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 3. "LCK3,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 2. "LCK2,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 1. "LCK1,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 0. "LCK0,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
line.long 0x4 "GPIOG_AFRL,GPIO alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Port x I/O pin y alternate function selection for"
line.long 0x8 "GPIOG_AFRH,GPIO alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Port x I/O pin y alternate function selection"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOG_BRR,GPIO port bit reset register"
bitfld.long 0x0 15. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 14. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 12. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 10. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 8. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 6. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 4. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 2. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 0. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
group.long 0x2C++0x7
line.long 0x0 "GPIOG_HSLVR,GPIO high-speed low-voltage register"
bitfld.long 0x0 15. "HSLV15,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 14. "HSLV14,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 13. "HSLV13,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 12. "HSLV12,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 11. "HSLV11,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 10. "HSLV10,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 9. "HSLV9,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 8. "HSLV8,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 7. "HSLV7,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 6. "HSLV6,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 5. "HSLV5,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 4. "HSLV4,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 3. "HSLV3,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 2. "HSLV2,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 1. "HSLV1,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 0. "HSLV0,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
line.long 0x4 "GPIOG_SECCFGR,GPIO secure configuration register"
bitfld.long 0x4 15. "SEC15,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 14. "SEC14,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 13. "SEC13,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 12. "SEC12,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 11. "SEC11,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 10. "SEC10,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 9. "SEC9,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 8. "SEC8,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 7. "SEC7,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 6. "SEC6,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 5. "SEC5,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 4. "SEC4,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 3. "SEC3,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 2. "SEC2,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 1. "SEC1,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 0. "SEC0,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
tree.end
tree "GPIOH"
base ad:0x42021C00
group.long 0x0++0xF
line.long 0x0 "GPIOH_MODER,GPIO port mode register"
bitfld.long 0x0 30.--31. "MODE15,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 28.--29. "MODE14,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 26.--27. "MODE13,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 24.--25. "MODE12,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 22.--23. "MODE11,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 20.--21. "MODE10,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 18.--19. "MODE9,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 16.--17. "MODE8,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 14.--15. "MODE7,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 12.--13. "MODE6,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 10.--11. "MODE5,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 8.--9. "MODE4,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 6.--7. "MODE3,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 4.--5. "MODE2,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 2.--3. "MODE1,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 0.--1. "MODE0,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
line.long 0x4 "GPIOH_OTYPER,GPIO port output type register"
bitfld.long 0x4 15. "OT15,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 14. "OT14,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 13. "OT13,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 12. "OT12,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 11. "OT11,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 10. "OT10,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 9. "OT9,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 8. "OT8,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 7. "OT7,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 6. "OT6,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 5. "OT5,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 4. "OT4,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 3. "OT3,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 2. "OT2,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 1. "OT1,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 0. "OT0,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOH_OSPEEDR,GPIO port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 28.--29. "OSPEED14,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 26.--27. "OSPEED13,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 24.--25. "OSPEED12,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 22.--23. "OSPEED11,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 20.--21. "OSPEED10,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 18.--19. "OSPEED9,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 16.--17. "OSPEED8,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 14.--15. "OSPEED7,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 12.--13. "OSPEED6,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 8.--9. "OSPEED4,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 6.--7. "OSPEED3,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 4.--5. "OSPEED2,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 2.--3. "OSPEED1,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 0.--1. "OSPEED0,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
line.long 0xC "GPIOH_PUPDR,GPIO port pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 28.--29. "PUPD14,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 26.--27. "PUPD13,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 24.--25. "PUPD12,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 22.--23. "PUPD11,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 20.--21. "PUPD10,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 18.--19. "PUPD9,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 16.--17. "PUPD8,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 14.--15. "PUPD7,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 12.--13. "PUPD6,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 8.--9. "PUPD4,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 6.--7. "PUPD3,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 4.--5. "PUPD2,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 2.--3. "PUPD1,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 0.--1. "PUPD0,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOH_IDR,GPIO port input data register"
bitfld.long 0x0 15. "ID15,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 14. "ID14,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 13. "ID13,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 12. "ID12,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 11. "ID11,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 10. "ID10,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 9. "ID9,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 8. "ID8,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 7. "ID7,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 6. "ID6,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 4. "ID4,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 3. "ID3,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 2. "ID2,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 1. "ID1,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 0. "ID0,Port x I/O pin y input data" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOH_ODR,GPIO port output data register"
bitfld.long 0x0 15. "OD15,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 14. "OD14,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 13. "OD13,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 12. "OD12,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 11. "OD11,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 10. "OD10,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 9. "OD9,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 8. "OD8,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 7. "OD7,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 6. "OD6,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 4. "OD4,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 3. "OD3,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 2. "OD2,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 1. "OD1,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 0. "OD0,Port x I/O pin y output data" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOH_BSRR,GPIO port bit set/reset register"
bitfld.long 0x0 31. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 30. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 29. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 28. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 27. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 26. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 25. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 24. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 23. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 22. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 21. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 20. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 19. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 18. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 17. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 16. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 15. "BS15,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 14. "BS14,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BS13,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 12. "BS12,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BS11,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 10. "BS10,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BS9,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 8. "BS8,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BS7,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 6. "BS6,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BS5,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 4. "BS4,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BS3,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 2. "BS2,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BS1,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 0. "BS0,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
group.long 0x1C++0xB
line.long 0x0 "GPIOH_LCKR,GPIO port configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active."
bitfld.long 0x0 15. "LCK15,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 14. "LCK14,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 13. "LCK13,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 12. "LCK12,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 11. "LCK11,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 10. "LCK10,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 9. "LCK9,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 8. "LCK8,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 7. "LCK7,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 6. "LCK6,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 5. "LCK5,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 4. "LCK4,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 3. "LCK3,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 2. "LCK2,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 1. "LCK1,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 0. "LCK0,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
line.long 0x4 "GPIOH_AFRL,GPIO alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Port x I/O pin y alternate function selection for"
line.long 0x8 "GPIOH_AFRH,GPIO alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Port x I/O pin y alternate function selection"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOH_BRR,GPIO port bit reset register"
bitfld.long 0x0 15. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 14. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 12. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 10. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 8. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 6. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 4. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 2. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 0. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
group.long 0x2C++0x7
line.long 0x0 "GPIOH_HSLVR,GPIO high-speed low-voltage register"
bitfld.long 0x0 15. "HSLV15,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 14. "HSLV14,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 13. "HSLV13,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 12. "HSLV12,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 11. "HSLV11,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 10. "HSLV10,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 9. "HSLV9,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 8. "HSLV8,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 7. "HSLV7,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 6. "HSLV6,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 5. "HSLV5,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 4. "HSLV4,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 3. "HSLV3,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 2. "HSLV2,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 1. "HSLV1,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 0. "HSLV0,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
line.long 0x4 "GPIOH_SECCFGR,GPIO secure configuration register"
bitfld.long 0x4 15. "SEC15,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 14. "SEC14,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 13. "SEC13,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 12. "SEC12,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 11. "SEC11,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 10. "SEC10,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 9. "SEC9,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 8. "SEC8,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 7. "SEC7,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 6. "SEC6,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 5. "SEC5,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 4. "SEC4,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 3. "SEC3,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 2. "SEC2,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 1. "SEC1,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 0. "SEC0,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
tree.end
tree "SEC_GPIOH"
base ad:0x52021C00
group.long 0x0++0xF
line.long 0x0 "GPIOH_MODER,GPIO port mode register"
bitfld.long 0x0 30.--31. "MODE15,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 28.--29. "MODE14,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 26.--27. "MODE13,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 24.--25. "MODE12,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 22.--23. "MODE11,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 20.--21. "MODE10,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 18.--19. "MODE9,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 16.--17. "MODE8,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 14.--15. "MODE7,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 12.--13. "MODE6,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 10.--11. "MODE5,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 8.--9. "MODE4,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 6.--7. "MODE3,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 4.--5. "MODE2,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
newline
bitfld.long 0x0 2.--3. "MODE1,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 0.--1. "MODE0,Port x I/O pin y mode configuration" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
line.long 0x4 "GPIOH_OTYPER,GPIO port output type register"
bitfld.long 0x4 15. "OT15,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 14. "OT14,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 13. "OT13,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 12. "OT12,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 11. "OT11,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 10. "OT10,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 9. "OT9,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 8. "OT8,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 7. "OT7,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 6. "OT6,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 5. "OT5,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 4. "OT4,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 3. "OT3,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 2. "OT2,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 1. "OT1,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 0. "OT0,Port x I/O pin y output type configuration" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOH_OSPEEDR,GPIO port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 28.--29. "OSPEED14,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 26.--27. "OSPEED13,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 24.--25. "OSPEED12,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 22.--23. "OSPEED11,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 20.--21. "OSPEED10,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 18.--19. "OSPEED9,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 16.--17. "OSPEED8,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 14.--15. "OSPEED7,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 12.--13. "OSPEED6,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 8.--9. "OSPEED4,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 6.--7. "OSPEED3,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 4.--5. "OSPEED2,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
newline
bitfld.long 0x8 2.--3. "OSPEED1,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
bitfld.long 0x8 0.--1. "OSPEED0,Port x I/O pin y output speed configuration" "0: Low speed,1: Medium speed,2: High speed,3: Very-high speed"
line.long 0xC "GPIOH_PUPDR,GPIO port pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 28.--29. "PUPD14,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 26.--27. "PUPD13,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 24.--25. "PUPD12,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 22.--23. "PUPD11,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 20.--21. "PUPD10,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 18.--19. "PUPD9,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 16.--17. "PUPD8,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 14.--15. "PUPD7,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 12.--13. "PUPD6,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 8.--9. "PUPD4,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 6.--7. "PUPD3,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 4.--5. "PUPD2,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
newline
bitfld.long 0xC 2.--3. "PUPD1,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
bitfld.long 0xC 0.--1. "PUPD0,Port x I/O pin y pull-up/pull-down configuration" "0: No pull-up or pull-down,1: Pull-up,2: Pull-down,?"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOH_IDR,GPIO port input data register"
bitfld.long 0x0 15. "ID15,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 14. "ID14,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 13. "ID13,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 12. "ID12,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 11. "ID11,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 10. "ID10,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 9. "ID9,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 8. "ID8,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 7. "ID7,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 6. "ID6,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 4. "ID4,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 3. "ID3,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 2. "ID2,Port x I/O pin y input data" "0,1"
newline
bitfld.long 0x0 1. "ID1,Port x I/O pin y input data" "0,1"
bitfld.long 0x0 0. "ID0,Port x I/O pin y input data" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOH_ODR,GPIO port output data register"
bitfld.long 0x0 15. "OD15,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 14. "OD14,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 13. "OD13,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 12. "OD12,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 11. "OD11,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 10. "OD10,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 9. "OD9,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 8. "OD8,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 7. "OD7,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 6. "OD6,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 4. "OD4,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 3. "OD3,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 2. "OD2,Port x I/O pin y output data" "0,1"
newline
bitfld.long 0x0 1. "OD1,Port x I/O pin y output data" "0,1"
bitfld.long 0x0 0. "OD0,Port x I/O pin y output data" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOH_BSRR,GPIO port bit set/reset register"
bitfld.long 0x0 31. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 30. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 29. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 28. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 27. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 26. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 25. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 24. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 23. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 22. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 21. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 20. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 19. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 18. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 17. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 16. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 15. "BS15,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 14. "BS14,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BS13,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 12. "BS12,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BS11,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 10. "BS10,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BS9,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 8. "BS8,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BS7,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 6. "BS6,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BS5,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 4. "BS4,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BS3,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 2. "BS2,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BS1,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 0. "BS0,Port x I/O pin y output set" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
group.long 0x1C++0xB
line.long 0x0 "GPIOH_LCKR,GPIO port configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active."
bitfld.long 0x0 15. "LCK15,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 14. "LCK14,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 13. "LCK13,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 12. "LCK12,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 11. "LCK11,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 10. "LCK10,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 9. "LCK9,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 8. "LCK8,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 7. "LCK7,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 6. "LCK6,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 5. "LCK5,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 4. "LCK4,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 3. "LCK3,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 2. "LCK2,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 1. "LCK1,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 0. "LCK0,Port x I/O pin y lock" "0: Port configuration not locked,1: Port configuration locked"
line.long 0x4 "GPIOH_AFRL,GPIO alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Port x I/O pin y alternate function selection for"
newline
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Port x I/O pin y alternate function selection for"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Port x I/O pin y alternate function selection for"
line.long 0x8 "GPIOH_AFRH,GPIO alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Port x I/O pin y alternate function selection"
newline
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Port x I/O pin y alternate function selection"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Port x I/O pin y alternate function selection"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOH_BRR,GPIO port bit reset register"
bitfld.long 0x0 15. "BR15,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 14. "BR14,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BR13,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 12. "BR12,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BR11,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 10. "BR10,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BR9,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 8. "BR8,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BR7,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 6. "BR6,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BR5,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 4. "BR4,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BR3,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 2. "BR2,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BR1,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 0. "BR0,Port x I/O pin y output reset" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
group.long 0x2C++0x7
line.long 0x0 "GPIOH_HSLVR,GPIO high-speed low-voltage register"
bitfld.long 0x0 15. "HSLV15,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 14. "HSLV14,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 13. "HSLV13,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 12. "HSLV12,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 11. "HSLV11,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 10. "HSLV10,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 9. "HSLV9,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 8. "HSLV8,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 7. "HSLV7,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 6. "HSLV6,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 5. "HSLV5,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 4. "HSLV4,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 3. "HSLV3,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 2. "HSLV2,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
newline
bitfld.long 0x0 1. "HSLV1,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
bitfld.long 0x0 0. "HSLV0,Port x I/O pin y high-speed low-voltage configuration" "0: I/O speed optimization disabled,1: I/O speed optimization enabled"
line.long 0x4 "GPIOH_SECCFGR,GPIO secure configuration register"
bitfld.long 0x4 15. "SEC15,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 14. "SEC14,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 13. "SEC13,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 12. "SEC12,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 11. "SEC11,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 10. "SEC10,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 9. "SEC9,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 8. "SEC8,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 7. "SEC7,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 6. "SEC6,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 5. "SEC5,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 4. "SEC4,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 3. "SEC3,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 2. "SEC2,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
newline
bitfld.long 0x4 1. "SEC1,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
bitfld.long 0x4 0. "SEC0,Port x I/O pin y security configuration" "0: The I/O pin is nonsecure,1: The I/O pin is secure."
tree.end
tree.end
tree "GTZC (Global TrustZone Controller)"
base ad:0x0
tree "GTZC1_TZSC"
base ad:0x40032400
group.long 0x0++0x3
line.long 0x0 "GTZC1_TZSC_CR,GTZC1 TZSC control register"
bitfld.long 0x0 0. "LCK,This bit is cleared by default and once set it can not be reset until system reset." "0: configuration of all GTZC1_TZSC_SECCFGRx and..,1: configuration of all GTZC1_TZSC_SECCFGRx and.."
group.long 0x10++0xB
line.long 0x0 "GTZC1_TZSC_SECCFGR1,GTZC1 TZSC secure configuration register 1"
bitfld.long 0x0 24. "VREFBUFSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 23. "OPAMPSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 22. "I3C1SEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x0 21. "SPI3SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 18. "FDCAN1SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 17. "LPTIM2SEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x0 15. "CRSSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 14. "I2C2SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 13. "I2C1SEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x0 12. "UART5SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 11. "UART4SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 10. "USART3SEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x0 9. "USART2SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 8. "SPI2SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 7. "IWDGSEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x0 6. "WWDGSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 5. "TIM7SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 4. "TIM6SEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x0 2. "TIM4SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 1. "TIM3SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 0. "TIM2SEC,0: non-secure" "0: non-secure,1: secure"
line.long 0x4 "GTZC1_TZSC_SECCFGR2,GTZC1 TZSC secure configuration register 2"
bitfld.long 0x4 16. "COMPSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x4 15. "LPTIM4SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x4 14. "LPTIM3SEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x4 13. "LPTIM1SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x4 12. "I2C3SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x4 11. "LPUART1SEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x4 10. "I3C2SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x4 9. "USBSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x4 7. "SAI1SEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x4 6. "TIM17SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x4 5. "TIM16SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x4 4. "TIM15SEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x4 3. "USART1SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x4 1. "SPI1SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x4 0. "TIM1SEC,0: non-secure" "0: non-secure,1: secure"
line.long 0x8 "GTZC1_TZSC_SECCFGR3,GTZC1 TZSC secure configuration register 3"
bitfld.long 0x8 24. "ADF1SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x8 23. "DAC1SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x8 22. "RAMCFGSEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x8 20. "OCTOSPI1_REGSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x8 17. "SDMMC1SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x8 16. "CCBSEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x8 15. "SAESSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x8 14. "PKASEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x8 13. "RNGSEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x8 12. "HASHSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x8 11. "AESSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x8 8. "ADC12SEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x8 6. "ICACHE_REGSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x8 4. "TSCSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x8 3. "CRCSEC,0: non-secure" "0: non-secure,1: secure"
group.long 0x20++0xB
line.long 0x0 "GTZC1_TZSC_PRIVCFGR1,GTZC1 TZSC privilege configuration register 1"
bitfld.long 0x0 24. "VREFBUFPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 23. "OPAMPPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 22. "I3C1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x0 21. "SPI3PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 18. "FDCAN1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 17. "LPTIM2PRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x0 15. "CRSPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 14. "I2C2PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 13. "I2C1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x0 12. "UART5PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 11. "UART4PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 10. "USART3PRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x0 9. "USART2PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 8. "SPI2PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 7. "IWDGPRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x0 6. "WWDGPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 5. "TIM7PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 4. "TIM6PRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x0 2. "TIM4PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 1. "TIM3PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 0. "TIM2PRIV,0: unprivileged" "0: unprivileged,1: privileged"
line.long 0x4 "GTZC1_TZSC_PRIVCFGR2,GTZC1 TZSC privilege configuration register 2"
bitfld.long 0x4 16. "COMPPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x4 15. "LPTIM4PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x4 14. "LPTIM3PRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 13. "LPTIM1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x4 12. "I2C3PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x4 11. "LPUART1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 10. "I3C2PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x4 9. "USBPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x4 7. "SAI1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 6. "TIM17PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x4 5. "TIM16PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x4 4. "TIM15PRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 3. "USART1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x4 1. "SPI1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x4 0. "TIM1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
line.long 0x8 "GTZC1_TZSC_PRIVCFGR3,GTZC1 TZSC privilege configuration register 3"
bitfld.long 0x8 24. "ADF1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x8 23. "DAC1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x8 22. "RAMCFGPRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x8 20. "OCTOSPI1_REGPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x8 17. "SDMMC1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x8 16. "CCBPRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x8 15. "SAESPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x8 14. "PKAPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x8 13. "RNGPRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x8 12. "HASHPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x8 11. "AESPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x8 8. "ADC12PRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x8 6. "ICACHE_REGPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x8 4. "TSCPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x8 3. "CRCPRIV,0: unprivileged" "0: unprivileged,1: privileged"
tree.end
tree "SEC_GTZC1_TZSC"
base ad:0x50032400
group.long 0x0++0x3
line.long 0x0 "GTZC1_TZSC_CR,GTZC1 TZSC control register"
bitfld.long 0x0 0. "LCK,This bit is cleared by default and once set it can not be reset until system reset." "0: configuration of all GTZC1_TZSC_SECCFGRx and..,1: configuration of all GTZC1_TZSC_SECCFGRx and.."
group.long 0x10++0xB
line.long 0x0 "GTZC1_TZSC_SECCFGR1,GTZC1 TZSC secure configuration register 1"
bitfld.long 0x0 24. "VREFBUFSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 23. "OPAMPSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 22. "I3C1SEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x0 21. "SPI3SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 18. "FDCAN1SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 17. "LPTIM2SEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x0 15. "CRSSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 14. "I2C2SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 13. "I2C1SEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x0 12. "UART5SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 11. "UART4SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 10. "USART3SEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x0 9. "USART2SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 8. "SPI2SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 7. "IWDGSEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x0 6. "WWDGSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 5. "TIM7SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 4. "TIM6SEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x0 2. "TIM4SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 1. "TIM3SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x0 0. "TIM2SEC,0: non-secure" "0: non-secure,1: secure"
line.long 0x4 "GTZC1_TZSC_SECCFGR2,GTZC1 TZSC secure configuration register 2"
bitfld.long 0x4 16. "COMPSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x4 15. "LPTIM4SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x4 14. "LPTIM3SEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x4 13. "LPTIM1SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x4 12. "I2C3SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x4 11. "LPUART1SEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x4 10. "I3C2SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x4 9. "USBSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x4 7. "SAI1SEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x4 6. "TIM17SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x4 5. "TIM16SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x4 4. "TIM15SEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x4 3. "USART1SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x4 1. "SPI1SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x4 0. "TIM1SEC,0: non-secure" "0: non-secure,1: secure"
line.long 0x8 "GTZC1_TZSC_SECCFGR3,GTZC1 TZSC secure configuration register 3"
bitfld.long 0x8 24. "ADF1SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x8 23. "DAC1SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x8 22. "RAMCFGSEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x8 20. "OCTOSPI1_REGSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x8 17. "SDMMC1SEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x8 16. "CCBSEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x8 15. "SAESSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x8 14. "PKASEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x8 13. "RNGSEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x8 12. "HASHSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x8 11. "AESSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x8 8. "ADC12SEC,0: non-secure" "0: non-secure,1: secure"
newline
bitfld.long 0x8 6. "ICACHE_REGSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x8 4. "TSCSEC,0: non-secure" "0: non-secure,1: secure"
bitfld.long 0x8 3. "CRCSEC,0: non-secure" "0: non-secure,1: secure"
group.long 0x20++0xB
line.long 0x0 "GTZC1_TZSC_PRIVCFGR1,GTZC1 TZSC privilege configuration register 1"
bitfld.long 0x0 24. "VREFBUFPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 23. "OPAMPPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 22. "I3C1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x0 21. "SPI3PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 18. "FDCAN1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 17. "LPTIM2PRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x0 15. "CRSPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 14. "I2C2PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 13. "I2C1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x0 12. "UART5PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 11. "UART4PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 10. "USART3PRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x0 9. "USART2PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 8. "SPI2PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 7. "IWDGPRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x0 6. "WWDGPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 5. "TIM7PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 4. "TIM6PRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x0 2. "TIM4PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 1. "TIM3PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x0 0. "TIM2PRIV,0: unprivileged" "0: unprivileged,1: privileged"
line.long 0x4 "GTZC1_TZSC_PRIVCFGR2,GTZC1 TZSC privilege configuration register 2"
bitfld.long 0x4 16. "COMPPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x4 15. "LPTIM4PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x4 14. "LPTIM3PRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 13. "LPTIM1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x4 12. "I2C3PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x4 11. "LPUART1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 10. "I3C2PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x4 9. "USBPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x4 7. "SAI1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 6. "TIM17PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x4 5. "TIM16PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x4 4. "TIM15PRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 3. "USART1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x4 1. "SPI1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x4 0. "TIM1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
line.long 0x8 "GTZC1_TZSC_PRIVCFGR3,GTZC1 TZSC privilege configuration register 3"
bitfld.long 0x8 24. "ADF1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x8 23. "DAC1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x8 22. "RAMCFGPRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x8 20. "OCTOSPI1_REGPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x8 17. "SDMMC1PRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x8 16. "CCBPRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x8 15. "SAESPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x8 14. "PKAPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x8 13. "RNGPRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x8 12. "HASHPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x8 11. "AESPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x8 8. "ADC12PRIV,0: unprivileged" "0: unprivileged,1: privileged"
newline
bitfld.long 0x8 6. "ICACHE_REGPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x8 4. "TSCPRIV,0: unprivileged" "0: unprivileged,1: privileged"
bitfld.long 0x8 3. "CRCPRIV,0: unprivileged" "0: unprivileged,1: privileged"
tree.end
tree "GTZC1_TZIC"
base ad:0x40032800
group.long 0x0++0x2F
line.long 0x0 "GTZC1_TZIC_IER1,GTZC1 TZIC interrupt enable register 1"
bitfld.long 0x0 24. "VREFBUFIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 23. "OPAMPIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 22. "I3C1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 21. "SPI3IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 18. "FDCAN1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 17. "LPTIM2IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 15. "CRSIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 14. "I2C2IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 13. "I2C1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 12. "UART5IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 11. "UART4IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "USART3IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "USART2IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "SPI2IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 7. "IWDGIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 6. "WWDGIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 5. "TIM7IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 4. "TIM6IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "TIM4IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 1. "TIM3IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 0. "TIM2IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
line.long 0x4 "GTZC1_TZIC_IER2,GTZC1 TZIC interrupt enable register 2"
bitfld.long 0x4 16. "COMPIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 15. "LPTIM4IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 14. "LPTIM3IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 13. "LPTIM1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 12. "I2C3IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 11. "LPUART1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 10. "I3C2IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 9. "USBIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 7. "SAI1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 6. "TIM17IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 5. "TIM16IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 4. "TIM15IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 3. "USART1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 1. "SPI1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 0. "TIM1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
line.long 0x8 "GTZC1_TZIC_IER3,GTZC1 TZIC interrupt enable register 3"
bitfld.long 0x8 24. "ADF1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 23. "DAC1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 22. "RAMCFGIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x8 20. "OCTOSPI1_REGIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 17. "SDMMC1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 16. "CCBIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x8 15. "SAESIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 14. "PKAIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 13. "RNGIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x8 12. "HASHIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 11. "AESIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 8. "ADC12IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x8 6. "ICACHE_REGIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 4. "TSCIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 3. "CRCIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
line.long 0xC "GTZC1_TZIC_IER4,GTZC1 TZIC interrupt enable register 4"
bitfld.long 0xC 27. "MPCBB2_REGIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 26. "SRAM2IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 25. "MPCBB1_REGIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0xC 24. "SRAM1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 15. "TZIC1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 14. "TZSC1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0xC 8. "TAMPIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 7. "RTCIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 6. "ExTIIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0xC 5. "SYSCFGIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 4. "RCCIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 3. "PWRIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0xC 2. "FLASHIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 1. "FLASH_REGIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 0. "GPDMA1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
line.long 0x10 "GTZC1_TZIC_SR1,GTZC1 TZIC status register 1"
bitfld.long 0x10 24. "VREFBUFF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 23. "OPAMPF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 22. "I3C1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x10 21. "SPI3F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 18. "FDCAN1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 17. "LPTIM2F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x10 15. "CRSF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 14. "I2C2F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 13. "I2C1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x10 12. "UART5F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 11. "UART4F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 10. "USART3F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x10 9. "USART2F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 8. "SPI2F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 7. "IWDGF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x10 6. "WWDGF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 5. "TIM7F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 4. "TIM6F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x10 2. "TIM4F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 1. "TIM3F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 0. "TIM2F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
line.long 0x14 "GTZC1_TZIC_SR2,GTZC1 TZIC status register 2"
bitfld.long 0x14 16. "COMPF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x14 15. "LPTIM4F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x14 14. "LPTIM3F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x14 13. "LPTIM1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x14 12. "I2C3F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x14 11. "LPUART1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x14 10. "I3C2F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x14 9. "USBF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x14 7. "SAI1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x14 6. "TIM17F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x14 5. "TIM16F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x14 4. "TIM15F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x14 3. "USART1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x14 1. "SPI1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x14 0. "TIM1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
line.long 0x18 "GTZC1_TZIC_SR3,GTZC1 TZIC status register 3"
bitfld.long 0x18 24. "ADF1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x18 23. "DAC1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x18 22. "RAMCFGF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x18 20. "OCTOSPI1_REGF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x18 17. "SDMMC1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x18 16. "CCBF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x18 15. "SAESF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x18 14. "PKAF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x18 13. "RNGF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x18 12. "HASHF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x18 11. "AESF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x18 8. "ADC12F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x18 6. "ICACHE_REGF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x18 4. "TSCF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x18 3. "CRCF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
line.long 0x1C "GTZC1_TZIC_SR4,GTZC1 TZIC status register 4"
bitfld.long 0x1C 27. "MPCBB2_REGF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x1C 26. "SRAM2F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x1C 25. "MPCBB1_REGF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x1C 24. "SRAM1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x1C 15. "TZIC1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x1C 14. "TZSC1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x1C 8. "TAMPF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x1C 7. "RTCF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x1C 6. "ExTIF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x1C 5. "SYSCFGF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x1C 4. "RCCF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x1C 3. "PWRF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x1C 2. "FLASHF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x1C 1. "FLASH_REGF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x1C 0. "GPDMA1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
line.long 0x20 "GTZC1_TZIC_FCR1,GTZC1 TZIC flag clear register 1"
bitfld.long 0x20 24. "CVREFBUFF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 23. "COPAMPF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 22. "CI3C1F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x20 21. "CSPI3F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 18. "CFDCAN1F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 17. "CLPTIM2F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x20 15. "CCRSF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 14. "CI2C2F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 13. "CI2C1F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x20 12. "CUART5F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 11. "CUART4F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 10. "CUSART3F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x20 9. "CUSART2F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 8. "CSPI2F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 7. "CIWDGF,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x20 6. "CWWDGF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 5. "CTIM7F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 4. "CTIM6F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x20 2. "CTIM4F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 1. "CTIM3F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 0. "CTIM2F,0: no action" "0: no action,1: status flag cleared"
line.long 0x24 "GTZC1_TZIC_FCR2,GTZC1 TZIC flag clear register 2"
bitfld.long 0x24 16. "CCOMPF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x24 15. "CLPTIM4F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x24 14. "CLPTIM3F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x24 13. "CLPTIM1F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x24 12. "CI2C3F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x24 11. "CLPUART1F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x24 10. "CI3C2F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x24 9. "CUSBF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x24 7. "CSAI1F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x24 6. "CTIM17F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x24 5. "CTIM16F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x24 4. "CTIM15F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x24 3. "CUSART1F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x24 1. "CSPI1F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x24 0. "CTIM1F,0: no action" "0: no action,1: status flag cleared"
line.long 0x28 "GTZC1_TZIC_FCR3,GTZC1 TZIC flag clear register 3"
bitfld.long 0x28 24. "CADF1F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x28 23. "CDAC1F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x28 22. "CRAMCFGF,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x28 20. "COCTOSPI1_REGF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x28 17. "CSDMMC1F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x28 16. "CCCBF,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x28 15. "CSAESF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x28 14. "CPKAF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x28 13. "CRNGF,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x28 12. "CHASHF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x28 11. "CAESF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x28 8. "CADC12F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x28 6. "CICACHE_REGF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x28 4. "CTSCF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x28 3. "CCRCF,0: no action" "0: no action,1: status flag cleared"
line.long 0x2C "GTZC1_TZIC_FCR4,GTZC1 TZIC flag clear register 4"
bitfld.long 0x2C 27. "CMPCBB2_REGF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x2C 26. "CSRAM2F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x2C 25. "CMPCBB1_REGF,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x2C 24. "CSRAM1F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x2C 15. "CTZIC1F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x2C 14. "CTZSC1F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x2C 8. "CTAMPF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x2C 7. "CRTCF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x2C 6. "CExTIF,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x2C 5. "CSYSCFGF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x2C 4. "CRCCF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x2C 3. "CPWRF,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x2C 2. "CFLASHF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x2C 1. "CFLASH_REGF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x2C 0. "CGPDMA1F,0: no action" "0: no action,1: status flag cleared"
tree.end
tree "SEC_GTZC1_TZIC"
base ad:0x50032800
group.long 0x0++0x2F
line.long 0x0 "GTZC1_TZIC_IER1,GTZC1 TZIC interrupt enable register 1"
bitfld.long 0x0 24. "VREFBUFIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 23. "OPAMPIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 22. "I3C1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 21. "SPI3IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 18. "FDCAN1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 17. "LPTIM2IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 15. "CRSIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 14. "I2C2IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 13. "I2C1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 12. "UART5IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 11. "UART4IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "USART3IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "USART2IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "SPI2IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 7. "IWDGIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 6. "WWDGIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 5. "TIM7IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 4. "TIM6IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "TIM4IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 1. "TIM3IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 0. "TIM2IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
line.long 0x4 "GTZC1_TZIC_IER2,GTZC1 TZIC interrupt enable register 2"
bitfld.long 0x4 16. "COMPIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 15. "LPTIM4IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 14. "LPTIM3IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 13. "LPTIM1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 12. "I2C3IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 11. "LPUART1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 10. "I3C2IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 9. "USBIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 7. "SAI1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 6. "TIM17IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 5. "TIM16IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 4. "TIM15IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 3. "USART1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 1. "SPI1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 0. "TIM1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
line.long 0x8 "GTZC1_TZIC_IER3,GTZC1 TZIC interrupt enable register 3"
bitfld.long 0x8 24. "ADF1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 23. "DAC1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 22. "RAMCFGIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x8 20. "OCTOSPI1_REGIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 17. "SDMMC1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 16. "CCBIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x8 15. "SAESIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 14. "PKAIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 13. "RNGIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x8 12. "HASHIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 11. "AESIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 8. "ADC12IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x8 6. "ICACHE_REGIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 4. "TSCIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 3. "CRCIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
line.long 0xC "GTZC1_TZIC_IER4,GTZC1 TZIC interrupt enable register 4"
bitfld.long 0xC 27. "MPCBB2_REGIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 26. "SRAM2IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 25. "MPCBB1_REGIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0xC 24. "SRAM1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 15. "TZIC1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 14. "TZSC1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0xC 8. "TAMPIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 7. "RTCIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 6. "ExTIIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0xC 5. "SYSCFGIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 4. "RCCIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 3. "PWRIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0xC 2. "FLASHIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 1. "FLASH_REGIE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 0. "GPDMA1IE,0: interrupt disabled" "0: interrupt disabled,1: interrupt enabled"
line.long 0x10 "GTZC1_TZIC_SR1,GTZC1 TZIC status register 1"
bitfld.long 0x10 24. "VREFBUFF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 23. "OPAMPF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 22. "I3C1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x10 21. "SPI3F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 18. "FDCAN1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 17. "LPTIM2F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x10 15. "CRSF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 14. "I2C2F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 13. "I2C1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x10 12. "UART5F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 11. "UART4F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 10. "USART3F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x10 9. "USART2F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 8. "SPI2F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 7. "IWDGF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x10 6. "WWDGF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 5. "TIM7F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 4. "TIM6F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x10 2. "TIM4F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 1. "TIM3F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x10 0. "TIM2F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
line.long 0x14 "GTZC1_TZIC_SR2,GTZC1 TZIC status register 2"
bitfld.long 0x14 16. "COMPF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x14 15. "LPTIM4F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x14 14. "LPTIM3F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x14 13. "LPTIM1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x14 12. "I2C3F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x14 11. "LPUART1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x14 10. "I3C2F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x14 9. "USBF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x14 7. "SAI1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x14 6. "TIM17F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x14 5. "TIM16F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x14 4. "TIM15F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x14 3. "USART1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x14 1. "SPI1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x14 0. "TIM1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
line.long 0x18 "GTZC1_TZIC_SR3,GTZC1 TZIC status register 3"
bitfld.long 0x18 24. "ADF1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x18 23. "DAC1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x18 22. "RAMCFGF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x18 20. "OCTOSPI1_REGF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x18 17. "SDMMC1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x18 16. "CCBF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x18 15. "SAESF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x18 14. "PKAF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x18 13. "RNGF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x18 12. "HASHF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x18 11. "AESF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x18 8. "ADC12F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x18 6. "ICACHE_REGF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x18 4. "TSCF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x18 3. "CRCF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
line.long 0x1C "GTZC1_TZIC_SR4,GTZC1 TZIC status register 4"
bitfld.long 0x1C 27. "MPCBB2_REGF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x1C 26. "SRAM2F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x1C 25. "MPCBB1_REGF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x1C 24. "SRAM1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x1C 15. "TZIC1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x1C 14. "TZSC1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x1C 8. "TAMPF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x1C 7. "RTCF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x1C 6. "ExTIF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x1C 5. "SYSCFGF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x1C 4. "RCCF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x1C 3. "PWRF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x1C 2. "FLASHF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x1C 1. "FLASH_REGF,0: no illegal access event" "0: no illegal access event,1: illegal access event"
bitfld.long 0x1C 0. "GPDMA1F,0: no illegal access event" "0: no illegal access event,1: illegal access event"
line.long 0x20 "GTZC1_TZIC_FCR1,GTZC1 TZIC flag clear register 1"
bitfld.long 0x20 24. "CVREFBUFF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 23. "COPAMPF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 22. "CI3C1F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x20 21. "CSPI3F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 18. "CFDCAN1F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 17. "CLPTIM2F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x20 15. "CCRSF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 14. "CI2C2F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 13. "CI2C1F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x20 12. "CUART5F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 11. "CUART4F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 10. "CUSART3F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x20 9. "CUSART2F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 8. "CSPI2F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 7. "CIWDGF,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x20 6. "CWWDGF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 5. "CTIM7F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 4. "CTIM6F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x20 2. "CTIM4F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 1. "CTIM3F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x20 0. "CTIM2F,0: no action" "0: no action,1: status flag cleared"
line.long 0x24 "GTZC1_TZIC_FCR2,GTZC1 TZIC flag clear register 2"
bitfld.long 0x24 16. "CCOMPF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x24 15. "CLPTIM4F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x24 14. "CLPTIM3F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x24 13. "CLPTIM1F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x24 12. "CI2C3F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x24 11. "CLPUART1F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x24 10. "CI3C2F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x24 9. "CUSBF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x24 7. "CSAI1F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x24 6. "CTIM17F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x24 5. "CTIM16F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x24 4. "CTIM15F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x24 3. "CUSART1F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x24 1. "CSPI1F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x24 0. "CTIM1F,0: no action" "0: no action,1: status flag cleared"
line.long 0x28 "GTZC1_TZIC_FCR3,GTZC1 TZIC flag clear register 3"
bitfld.long 0x28 24. "CADF1F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x28 23. "CDAC1F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x28 22. "CRAMCFGF,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x28 20. "COCTOSPI1_REGF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x28 17. "CSDMMC1F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x28 16. "CCCBF,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x28 15. "CSAESF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x28 14. "CPKAF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x28 13. "CRNGF,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x28 12. "CHASHF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x28 11. "CAESF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x28 8. "CADC12F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x28 6. "CICACHE_REGF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x28 4. "CTSCF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x28 3. "CCRCF,0: no action" "0: no action,1: status flag cleared"
line.long 0x2C "GTZC1_TZIC_FCR4,GTZC1 TZIC flag clear register 4"
bitfld.long 0x2C 27. "CMPCBB2_REGF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x2C 26. "CSRAM2F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x2C 25. "CMPCBB1_REGF,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x2C 24. "CSRAM1F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x2C 15. "CTZIC1F,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x2C 14. "CTZSC1F,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x2C 8. "CTAMPF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x2C 7. "CRTCF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x2C 6. "CExTIF,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x2C 5. "CSYSCFGF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x2C 4. "CRCCF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x2C 3. "CPWRF,0: no action" "0: no action,1: status flag cleared"
newline
bitfld.long 0x2C 2. "CFLASHF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x2C 1. "CFLASH_REGF,0: no action" "0: no action,1: status flag cleared"
bitfld.long 0x2C 0. "CGPDMA1F,0: no action" "0: no action,1: status flag cleared"
tree.end
tree "GTZC1_MPCBB1"
base ad:0x40032C00
group.long 0x0++0x3
line.long 0x0 "GTZC1_MPCBB1_CR,GTZC1 SRAM1 MPCBB control register"
bitfld.long 0x0 31. "SRWILADIS,This bit disables the detection of an illegal access when a secure read/write transaction access a non-secure blocks of the block-based SRAM (secure fetch on non-secure block is always considered illegal)." "0: enabled,1: disabled"
newline
bitfld.long 0x0 30. "INVSECSTATE,This bit is used to define the internal SRAMs clocks control in RCC as secure or not." "0: SRAMs clocks are secure if a secure area exists..,1: SRAMs clocks are non-secure even if a secure.."
newline
bitfld.long 0x0 0. "GLOCK,This bit is cleared by default and once set it can not be reset until system reset." "0: control register not locked,1: control register locked"
group.long 0x10++0x3
line.long 0x0 "GTZC1_MPCBB1_CFGLOCKR1,GTZC1 SRAM1 MPCBB configuration lock register 1"
bitfld.long 0x0 31. "SPLCK31,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR31 and..,1: Writes to GTZC1_MPCBB1_SECCFGR31 and.."
newline
bitfld.long 0x0 30. "SPLCK30,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR30 and..,1: Writes to GTZC1_MPCBB1_SECCFGR30 and.."
newline
bitfld.long 0x0 29. "SPLCK29,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR29 and..,1: Writes to GTZC1_MPCBB1_SECCFGR29 and.."
newline
bitfld.long 0x0 28. "SPLCK28,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR28 and..,1: Writes to GTZC1_MPCBB1_SECCFGR28 and.."
newline
bitfld.long 0x0 27. "SPLCK27,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR27 and..,1: Writes to GTZC1_MPCBB1_SECCFGR27 and.."
newline
bitfld.long 0x0 26. "SPLCK26,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR26 and..,1: Writes to GTZC1_MPCBB1_SECCFGR26 and.."
newline
bitfld.long 0x0 25. "SPLCK25,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR25 and..,1: Writes to GTZC1_MPCBB1_SECCFGR25 and.."
newline
bitfld.long 0x0 24. "SPLCK24,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR24 and..,1: Writes to GTZC1_MPCBB1_SECCFGR24 and.."
newline
bitfld.long 0x0 23. "SPLCK23,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR23 and..,1: Writes to GTZC1_MPCBB1_SECCFGR23 and.."
newline
bitfld.long 0x0 22. "SPLCK22,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR22 and..,1: Writes to GTZC1_MPCBB1_SECCFGR22 and.."
newline
bitfld.long 0x0 21. "SPLCK21,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR21 and..,1: Writes to GTZC1_MPCBB1_SECCFGR21 and.."
newline
bitfld.long 0x0 20. "SPLCK20,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR20 and..,1: Writes to GTZC1_MPCBB1_SECCFGR20 and.."
newline
bitfld.long 0x0 19. "SPLCK19,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR19 and..,1: Writes to GTZC1_MPCBB1_SECCFGR19 and.."
newline
bitfld.long 0x0 18. "SPLCK18,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR18 and..,1: Writes to GTZC1_MPCBB1_SECCFGR18 and.."
newline
bitfld.long 0x0 17. "SPLCK17,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR17 and..,1: Writes to GTZC1_MPCBB1_SECCFGR17 and.."
newline
bitfld.long 0x0 16. "SPLCK16,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR16 and..,1: Writes to GTZC1_MPCBB1_SECCFGR16 and.."
newline
bitfld.long 0x0 15. "SPLCK15,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR15 and..,1: Writes to GTZC1_MPCBB1_SECCFGR15 and.."
newline
bitfld.long 0x0 14. "SPLCK14,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR14 and..,1: Writes to GTZC1_MPCBB1_SECCFGR14 and.."
newline
bitfld.long 0x0 13. "SPLCK13,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR13 and..,1: Writes to GTZC1_MPCBB1_SECCFGR13 and.."
newline
bitfld.long 0x0 12. "SPLCK12,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR12 and..,1: Writes to GTZC1_MPCBB1_SECCFGR12 and.."
newline
bitfld.long 0x0 11. "SPLCK11,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR11 and..,1: Writes to GTZC1_MPCBB1_SECCFGR11 and.."
newline
bitfld.long 0x0 10. "SPLCK10,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR10 and..,1: Writes to GTZC1_MPCBB1_SECCFGR10 and.."
newline
bitfld.long 0x0 9. "SPLCK9,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR9 and GTZC1_MPCBB1_PRIVCFGR9..,1: Writes to GTZC1_MPCBB1_SECCFGR9 and.."
newline
bitfld.long 0x0 8. "SPLCK8,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR8 and GTZC1_MPCBB1_PRIVCFGR8..,1: Writes to GTZC1_MPCBB1_SECCFGR8 and.."
newline
bitfld.long 0x0 7. "SPLCK7,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR7 and GTZC1_MPCBB1_PRIVCFGR7..,1: Writes to GTZC1_MPCBB1_SECCFGR7 and.."
newline
bitfld.long 0x0 6. "SPLCK6,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR6 and GTZC1_MPCBB1_PRIVCFGR6..,1: Writes to GTZC1_MPCBB1_SECCFGR6 and.."
newline
bitfld.long 0x0 5. "SPLCK5,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR5 and GTZC1_MPCBB1_PRIVCFGR5..,1: Writes to GTZC1_MPCBB1_SECCFGR5 and.."
newline
bitfld.long 0x0 4. "SPLCK4,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR4 and GTZC1_MPCBB1_PRIVCFGR4..,1: Writes to GTZC1_MPCBB1_SECCFGR4 and.."
newline
bitfld.long 0x0 3. "SPLCK3,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR3 and GTZC1_MPCBB1_PRIVCFGR3..,1: Writes to GTZC1_MPCBB1_SECCFGR3 and.."
newline
bitfld.long 0x0 2. "SPLCK2,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR2 and GTZC1_MPCBB1_PRIVCFGR2..,1: Writes to GTZC1_MPCBB1_SECCFGR2 and.."
newline
bitfld.long 0x0 1. "SPLCK1,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR1 and GTZC1_MPCBB1_PRIVCFGR1..,1: Writes to GTZC1_MPCBB1_SECCFGR1 and.."
newline
bitfld.long 0x0 0. "SPLCK0,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR0 and GTZC1_MPCBB1_PRIVCFGR0..,1: Writes to GTZC1_MPCBB1_SECCFGR0 and.."
group.long 0x100++0x7F
line.long 0x0 "GTZC1_MPCBB1_SECCFGR0,GTZC1 SRAM1 MPCBB security configuration for super-block 0 register"
bitfld.long 0x0 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x0 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x0 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x0 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x0 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x0 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x0 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x0 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x0 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x0 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x0 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x0 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x0 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x0 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x0 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x0 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x0 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x0 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x0 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x0 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x0 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x0 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x0 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x0 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x0 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x0 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x0 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x0 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x0 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x0 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x0 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x0 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x4 "GTZC1_MPCBB1_SECCFGR1,GTZC1 SRAM1 MPCBB security configuration for super-block 1 register"
bitfld.long 0x4 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x4 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x4 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x4 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x4 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x4 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x4 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x4 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x4 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x4 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x4 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x4 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x4 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x4 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x4 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x4 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x4 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x4 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x4 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x4 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x4 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x4 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x4 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x4 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x4 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x4 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x4 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x4 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x4 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x4 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x4 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x4 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x8 "GTZC1_MPCBB1_SECCFGR2,GTZC1 SRAM1 MPCBB security configuration for super-block 2 register"
bitfld.long 0x8 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x8 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x8 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x8 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x8 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x8 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x8 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x8 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x8 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x8 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x8 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x8 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x8 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x8 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x8 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x8 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x8 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x8 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x8 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x8 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x8 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x8 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x8 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x8 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x8 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x8 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x8 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x8 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x8 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x8 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x8 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x8 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0xC "GTZC1_MPCBB1_SECCFGR3,GTZC1 SRAM1 MPCBB security configuration for super-block 3 register"
bitfld.long 0xC 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0xC 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0xC 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0xC 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0xC 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0xC 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0xC 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0xC 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0xC 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0xC 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0xC 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0xC 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0xC 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0xC 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0xC 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0xC 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0xC 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0xC 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0xC 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0xC 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0xC 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0xC 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0xC 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0xC 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0xC 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0xC 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0xC 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0xC 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0xC 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0xC 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0xC 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0xC 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x10 "GTZC1_MPCBB1_SECCFGR4,GTZC1 SRAM1 MPCBB security configuration for super-block 4 register"
bitfld.long 0x10 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x10 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x10 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x10 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x10 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x10 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x10 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x10 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x10 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x10 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x10 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x10 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x10 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x10 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x10 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x10 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x10 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x10 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x10 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x10 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x10 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x10 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x10 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x10 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x10 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x10 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x10 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x10 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x10 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x10 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x10 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x10 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x14 "GTZC1_MPCBB1_SECCFGR5,GTZC1 SRAM1 MPCBB security configuration for super-block 5 register"
bitfld.long 0x14 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x14 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x14 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x14 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x14 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x14 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x14 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x14 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x14 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x14 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x14 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x14 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x14 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x14 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x14 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x14 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x14 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x14 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x14 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x14 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x14 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x14 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x14 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x14 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x14 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x14 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x14 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x14 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x14 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x14 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x14 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x14 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x18 "GTZC1_MPCBB1_SECCFGR6,GTZC1 SRAM1 MPCBB security configuration for super-block 6 register"
bitfld.long 0x18 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x18 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x18 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x18 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x18 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x18 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x18 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x18 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x18 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x18 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x18 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x18 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x18 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x18 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x18 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x18 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x18 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x18 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x18 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x18 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x18 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x18 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x18 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x18 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x18 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x18 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x18 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x18 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x18 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x18 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x18 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x18 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x1C "GTZC1_MPCBB1_SECCFGR7,GTZC1 SRAM1 MPCBB security configuration for super-block 7 register"
bitfld.long 0x1C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x1C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x1C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x1C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x1C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x1C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x1C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x1C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x1C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x1C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x1C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x1C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x1C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x1C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x1C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x1C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x1C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x1C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x1C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x1C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x1C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x1C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x1C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x1C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x1C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x1C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x1C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x1C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x1C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x1C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x1C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x1C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x20 "GTZC1_MPCBB1_SECCFGR8,GTZC1 SRAM1 MPCBB security configuration for super-block 8 register"
bitfld.long 0x20 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x20 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x20 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x20 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x20 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x20 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x20 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x20 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x20 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x20 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x20 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x20 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x20 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x20 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x20 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x20 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x20 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x20 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x20 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x20 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x20 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x20 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x20 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x20 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x20 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x20 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x20 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x20 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x20 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x20 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x20 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x20 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x24 "GTZC1_MPCBB1_SECCFGR9,GTZC1 SRAM1 MPCBB security configuration for super-block 9 register"
bitfld.long 0x24 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x24 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x24 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x24 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x24 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x24 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x24 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x24 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x24 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x24 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x24 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x24 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x24 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x24 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x24 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x24 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x24 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x24 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x24 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x24 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x24 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x24 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x24 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x24 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x24 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x24 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x24 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x24 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x24 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x24 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x24 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x24 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x28 "GTZC1_MPCBB1_SECCFGR10,GTZC1 SRAM1 MPCBB security configuration for super-block 10 register"
bitfld.long 0x28 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x28 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x28 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x28 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x28 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x28 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x28 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x28 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x28 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x28 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x28 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x28 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x28 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x28 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x28 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x28 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x28 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x28 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x28 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x28 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x28 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x28 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x28 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x28 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x28 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x28 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x28 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x28 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x28 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x28 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x28 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x28 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x2C "GTZC1_MPCBB1_SECCFGR11,GTZC1 SRAM1 MPCBB security configuration for super-block 11 register"
bitfld.long 0x2C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x2C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x2C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x2C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x2C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x2C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x2C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x2C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x2C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x2C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x2C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x2C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x2C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x2C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x2C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x2C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x2C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x2C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x2C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x2C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x2C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x2C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x2C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x2C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x2C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x2C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x2C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x2C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x2C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x2C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x2C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x2C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x30 "GTZC1_MPCBB1_SECCFGR12,GTZC1 SRAM1 MPCBB security configuration for super-block 12 register"
bitfld.long 0x30 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x30 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x30 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x30 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x30 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x30 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x30 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x30 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x30 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x30 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x30 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x30 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x30 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x30 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x30 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x30 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x30 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x30 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x30 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x30 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x30 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x30 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x30 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x30 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x30 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x30 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x30 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x30 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x30 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x30 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x30 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x30 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x34 "GTZC1_MPCBB1_SECCFGR13,GTZC1 SRAM1 MPCBB security configuration for super-block 13 register"
bitfld.long 0x34 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x34 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x34 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x34 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x34 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x34 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x34 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x34 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x34 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x34 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x34 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x34 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x34 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x34 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x34 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x34 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x34 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x34 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x34 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x34 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x34 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x34 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x34 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x34 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x34 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x34 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x34 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x34 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x34 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x34 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x34 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x34 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x38 "GTZC1_MPCBB1_SECCFGR14,GTZC1 SRAM1 MPCBB security configuration for super-block 14 register"
bitfld.long 0x38 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x38 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x38 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x38 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x38 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x38 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x38 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x38 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x38 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x38 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x38 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x38 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x38 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x38 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x38 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x38 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x38 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x38 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x38 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x38 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x38 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x38 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x38 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x38 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x38 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x38 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x38 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x38 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x38 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x38 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x38 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x38 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x3C "GTZC1_MPCBB1_SECCFGR15,GTZC1 SRAM1 MPCBB security configuration for super-block 15 register"
bitfld.long 0x3C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x3C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x3C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x3C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x3C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x3C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x3C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x3C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x3C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x3C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x3C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x3C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x3C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x3C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x3C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x3C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x3C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x3C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x3C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x3C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x3C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x3C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x3C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x3C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x3C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x3C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x3C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x3C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x3C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x3C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x3C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x3C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x40 "GTZC1_MPCBB1_SECCFGR16,GTZC1 SRAM1 MPCBB security configuration for super-block 16 register"
bitfld.long 0x40 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x40 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x40 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x40 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x40 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x40 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x40 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x40 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x40 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x40 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x40 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x40 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x40 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x40 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x40 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x40 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x40 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x40 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x40 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x40 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x40 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x40 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x40 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x40 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x40 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x40 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x40 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x40 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x40 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x40 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x40 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x40 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x44 "GTZC1_MPCBB1_SECCFGR17,GTZC1 SRAM1 MPCBB security configuration for super-block 17 register"
bitfld.long 0x44 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x44 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x44 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x44 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x44 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x44 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x44 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x44 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x44 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x44 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x44 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x44 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x44 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x44 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x44 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x44 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x44 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x44 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x44 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x44 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x44 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x44 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x44 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x44 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x44 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x44 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x44 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x44 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x44 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x44 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x44 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x44 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x48 "GTZC1_MPCBB1_SECCFGR18,GTZC1 SRAM1 MPCBB security configuration for super-block 18 register"
bitfld.long 0x48 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x48 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x48 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x48 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x48 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x48 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x48 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x48 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x48 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x48 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x48 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x48 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x48 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x48 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x48 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x48 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x48 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x48 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x48 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x48 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x48 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x48 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x48 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x48 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x48 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x48 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x48 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x48 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x48 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x48 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x48 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x48 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x4C "GTZC1_MPCBB1_SECCFGR19,GTZC1 SRAM1 MPCBB security configuration for super-block 19 register"
bitfld.long 0x4C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x4C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x4C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x4C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x4C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x4C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x4C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x4C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x4C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x4C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x4C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x4C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x4C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x4C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x4C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x4C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x4C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x4C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x4C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x4C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x4C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x4C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x4C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x4C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x4C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x4C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x4C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x4C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x4C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x4C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x4C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x4C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x50 "GTZC1_MPCBB1_SECCFGR20,GTZC1 SRAM1 MPCBB security configuration for super-block 20 register"
bitfld.long 0x50 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x50 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x50 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x50 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x50 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x50 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x50 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x50 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x50 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x50 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x50 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x50 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x50 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x50 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x50 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x50 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x50 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x50 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x50 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x50 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x50 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x50 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x50 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x50 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x50 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x50 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x50 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x50 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x50 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x50 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x50 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x50 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x54 "GTZC1_MPCBB1_SECCFGR21,GTZC1 SRAM1 MPCBB security configuration for super-block 21 register"
bitfld.long 0x54 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x54 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x54 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x54 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x54 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x54 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x54 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x54 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x54 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x54 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x54 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x54 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x54 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x54 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x54 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x54 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x54 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x54 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x54 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x54 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x54 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x54 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x54 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x54 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x54 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x54 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x54 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x54 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x54 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x54 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x54 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x54 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x58 "GTZC1_MPCBB1_SECCFGR22,GTZC1 SRAM1 MPCBB security configuration for super-block 22 register"
bitfld.long 0x58 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x58 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x58 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x58 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x58 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x58 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x58 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x58 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x58 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x58 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x58 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x58 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x58 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x58 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x58 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x58 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x58 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x58 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x58 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x58 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x58 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x58 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x58 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x58 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x58 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x58 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x58 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x58 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x58 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x58 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x58 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x58 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x5C "GTZC1_MPCBB1_SECCFGR23,GTZC1 SRAM1 MPCBB security configuration for super-block 23 register"
bitfld.long 0x5C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x5C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x5C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x5C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x5C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x5C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x5C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x5C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x5C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x5C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x5C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x5C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x5C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x5C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x5C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x5C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x5C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x5C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x5C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x5C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x5C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x5C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x5C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x5C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x5C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x5C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x5C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x5C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x5C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x5C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x5C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x5C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x60 "GTZC1_MPCBB1_SECCFGR24,GTZC1 SRAM1 MPCBB security configuration for super-block 24 register"
bitfld.long 0x60 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x60 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x60 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x60 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x60 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x60 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x60 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x60 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x60 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x60 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x60 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x60 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x60 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x60 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x60 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x60 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x60 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x60 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x60 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x60 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x60 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x60 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x60 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x60 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x60 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x60 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x60 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x60 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x60 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x60 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x60 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x60 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x64 "GTZC1_MPCBB1_SECCFGR25,GTZC1 SRAM1 MPCBB security configuration for super-block 25 register"
bitfld.long 0x64 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x64 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x64 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x64 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x64 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x64 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x64 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x64 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x64 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x64 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x64 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x64 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x64 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x64 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x64 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x64 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x64 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x64 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x64 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x64 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x64 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x64 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x64 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x64 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x64 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x64 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x64 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x64 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x64 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x64 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x64 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x64 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x68 "GTZC1_MPCBB1_SECCFGR26,GTZC1 SRAM1 MPCBB security configuration for super-block 26 register"
bitfld.long 0x68 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x68 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x68 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x68 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x68 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x68 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x68 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x68 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x68 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x68 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x68 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x68 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x68 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x68 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x68 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x68 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x68 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x68 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x68 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x68 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x68 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x68 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x68 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x68 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x68 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x68 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x68 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x68 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x68 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x68 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x68 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x68 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x6C "GTZC1_MPCBB1_SECCFGR27,GTZC1 SRAM1 MPCBB security configuration for super-block 27 register"
bitfld.long 0x6C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x6C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x6C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x6C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x6C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x6C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x6C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x6C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x6C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x6C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x6C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x6C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x6C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x6C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x6C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x6C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x6C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x6C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x6C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x6C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x6C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x6C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x6C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x6C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x6C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x6C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x6C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x6C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x6C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x6C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x6C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x6C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x70 "GTZC1_MPCBB1_SECCFGR28,GTZC1 SRAM1 MPCBB security configuration for super-block 28 register"
bitfld.long 0x70 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x70 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x70 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x70 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x70 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x70 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x70 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x70 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x70 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x70 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x70 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x70 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x70 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x70 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x70 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x70 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x70 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x70 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x70 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x70 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x70 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x70 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x70 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x70 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x70 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x70 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x70 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x70 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x70 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x70 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x70 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x70 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x74 "GTZC1_MPCBB1_SECCFGR29,GTZC1 SRAM1 MPCBB security configuration for super-block 29 register"
bitfld.long 0x74 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x74 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x74 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x74 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x74 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x74 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x74 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x74 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x74 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x74 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x74 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x74 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x74 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x74 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x74 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x74 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x74 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x74 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x74 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x74 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x74 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x74 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x74 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x74 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x74 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x74 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x74 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x74 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x74 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x74 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x74 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x74 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x78 "GTZC1_MPCBB1_SECCFGR30,GTZC1 SRAM1 MPCBB security configuration for super-block 30 register"
bitfld.long 0x78 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x78 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x78 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x78 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x78 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x78 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x78 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x78 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x78 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x78 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x78 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x78 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x78 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x78 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x78 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x78 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x78 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x78 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x78 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x78 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x78 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x78 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x78 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x78 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x78 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x78 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x78 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x78 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x78 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x78 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x78 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x78 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x7C "GTZC1_MPCBB1_SECCFGR31,GTZC1 SRAM1 MPCBB security configuration for super-block 31 register"
bitfld.long 0x7C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x7C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x7C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x7C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x7C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x7C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x7C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x7C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x7C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x7C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x7C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x7C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x7C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x7C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x7C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x7C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x7C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x7C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x7C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x7C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x7C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x7C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x7C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x7C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x7C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x7C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x7C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x7C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x7C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x7C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x7C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x7C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 0,1: Secure access only to block 0"
group.long 0x200++0x7F
line.long 0x0 "GTZC1_MPCBB1_PRIVCFGR0,GTZC1 SRAM1 MPCBB privileged configuration for super-block 0 register"
bitfld.long 0x0 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x0 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x0 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x0 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x0 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x0 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x0 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x0 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x0 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x0 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x0 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x0 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x0 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x0 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x0 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x0 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x0 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x0 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x0 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x0 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x0 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x0 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x0 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x0 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x0 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x0 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x0 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x0 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x0 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x0 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x0 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x0 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x4 "GTZC1_MPCBB1_PRIVCFGR1,GTZC1 SRAM1 MPCBB privileged configuration for super-block 1 register"
bitfld.long 0x4 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x4 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x4 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x4 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x4 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x4 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x4 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x4 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x4 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x4 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x4 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x4 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x4 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x4 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x4 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x4 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x4 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x4 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x4 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x4 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x4 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x4 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x4 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x4 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x4 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x4 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x4 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x4 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x4 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x4 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x4 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x4 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x8 "GTZC1_MPCBB1_PRIVCFGR2,GTZC1 SRAM1 MPCBB privileged configuration for super-block 2 register"
bitfld.long 0x8 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x8 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x8 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x8 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x8 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x8 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x8 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x8 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x8 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x8 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x8 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x8 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x8 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x8 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x8 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x8 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x8 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x8 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x8 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x8 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x8 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x8 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x8 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x8 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x8 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x8 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x8 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x8 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x8 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x8 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x8 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x8 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0xC "GTZC1_MPCBB1_PRIVCFGR3,GTZC1 SRAM1 MPCBB privileged configuration for super-block 3 register"
bitfld.long 0xC 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0xC 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0xC 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0xC 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0xC 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0xC 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0xC 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0xC 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0xC 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0xC 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0xC 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0xC 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0xC 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0xC 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0xC 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0xC 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0xC 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0xC 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0xC 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0xC 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0xC 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0xC 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0xC 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0xC 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0xC 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0xC 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0xC 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0xC 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0xC 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0xC 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0xC 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0xC 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x10 "GTZC1_MPCBB1_PRIVCFGR4,GTZC1 SRAM1 MPCBB privileged configuration for super-block 4 register"
bitfld.long 0x10 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x10 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x10 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x10 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x10 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x10 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x10 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x10 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x10 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x10 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x10 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x10 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x10 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x10 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x10 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x10 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x10 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x10 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x10 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x10 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x10 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x10 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x10 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x10 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x10 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x10 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x10 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x10 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x10 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x10 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x10 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x10 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x14 "GTZC1_MPCBB1_PRIVCFGR5,GTZC1 SRAM1 MPCBB privileged configuration for super-block 5 register"
bitfld.long 0x14 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x14 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x14 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x14 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x14 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x14 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x14 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x14 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x14 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x14 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x14 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x14 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x14 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x14 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x14 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x14 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x14 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x14 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x14 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x14 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x14 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x14 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x14 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x14 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x14 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x14 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x14 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x14 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x14 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x14 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x14 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x14 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x18 "GTZC1_MPCBB1_PRIVCFGR6,GTZC1 SRAM1 MPCBB privileged configuration for super-block 6 register"
bitfld.long 0x18 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x18 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x18 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x18 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x18 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x18 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x18 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x18 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x18 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x18 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x18 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x18 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x18 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x18 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x18 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x18 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x18 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x18 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x18 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x18 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x18 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x18 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x18 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x18 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x18 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x18 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x18 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x18 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x18 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x18 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x18 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x18 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x1C "GTZC1_MPCBB1_PRIVCFGR7,GTZC1 SRAM1 MPCBB privileged configuration for super-block 7 register"
bitfld.long 0x1C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x1C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x1C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x1C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x1C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x1C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x1C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x1C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x1C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x1C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x1C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x1C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x1C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x1C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x1C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x1C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x1C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x1C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x1C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x1C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x1C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x1C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x1C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x1C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x1C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x1C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x1C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x1C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x1C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x1C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x1C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x1C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x20 "GTZC1_MPCBB1_PRIVCFGR8,GTZC1 SRAM1 MPCBB privileged configuration for super-block 8 register"
bitfld.long 0x20 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x20 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x20 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x20 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x20 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x20 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x20 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x20 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x20 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x20 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x20 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x20 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x20 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x20 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x20 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x20 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x20 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x20 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x20 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x20 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x20 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x20 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x20 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x20 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x20 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x20 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x20 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x20 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x20 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x20 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x20 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x20 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x24 "GTZC1_MPCBB1_PRIVCFGR9,GTZC1 SRAM1 MPCBB privileged configuration for super-block 9 register"
bitfld.long 0x24 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x24 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x24 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x24 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x24 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x24 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x24 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x24 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x24 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x24 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x24 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x24 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x24 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x24 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x24 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x24 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x24 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x24 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x24 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x24 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x24 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x24 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x24 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x24 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x24 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x24 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x24 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x24 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x24 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x24 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x24 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x24 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x28 "GTZC1_MPCBB1_PRIVCFGR10,GTZC1 SRAM1 MPCBB privileged configuration for super-block 10 register"
bitfld.long 0x28 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x28 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x28 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x28 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x28 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x28 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x28 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x28 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x28 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x28 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x28 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x28 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x28 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x28 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x28 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x28 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x28 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x28 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x28 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x28 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x28 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x28 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x28 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x28 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x28 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x28 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x28 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x28 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x28 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x28 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x28 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x28 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x2C "GTZC1_MPCBB1_PRIVCFGR11,GTZC1 SRAM1 MPCBB privileged configuration for super-block 11 register"
bitfld.long 0x2C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x2C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x2C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x2C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x2C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x2C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x2C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x2C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x2C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x2C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x2C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x2C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x2C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x2C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x2C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x2C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x2C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x2C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x2C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x2C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x2C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x2C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x2C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x2C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x2C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x2C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x2C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x2C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x2C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x2C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x2C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x2C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x30 "GTZC1_MPCBB1_PRIVCFGR12,GTZC1 SRAM1 MPCBB privileged configuration for super-block 12 register"
bitfld.long 0x30 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x30 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x30 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x30 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x30 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x30 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x30 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x30 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x30 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x30 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x30 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x30 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x30 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x30 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x30 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x30 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x30 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x30 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x30 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x30 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x30 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x30 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x30 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x30 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x30 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x30 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x30 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x30 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x30 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x30 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x30 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x30 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x34 "GTZC1_MPCBB1_PRIVCFGR13,GTZC1 SRAM1 MPCBB privileged configuration for super-block 13 register"
bitfld.long 0x34 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x34 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x34 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x34 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x34 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x34 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x34 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x34 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x34 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x34 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x34 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x34 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x34 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x34 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x34 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x34 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x34 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x34 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x34 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x34 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x34 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x34 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x34 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x34 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x34 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x34 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x34 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x34 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x34 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x34 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x34 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x34 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x38 "GTZC1_MPCBB1_PRIVCFGR14,GTZC1 SRAM1 MPCBB privileged configuration for super-block 14 register"
bitfld.long 0x38 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x38 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x38 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x38 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x38 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x38 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x38 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x38 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x38 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x38 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x38 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x38 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x38 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x38 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x38 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x38 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x38 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x38 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x38 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x38 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x38 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x38 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x38 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x38 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x38 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x38 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x38 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x38 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x38 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x38 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x38 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x38 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x3C "GTZC1_MPCBB1_PRIVCFGR15,GTZC1 SRAM1 MPCBB privileged configuration for super-block 15 register"
bitfld.long 0x3C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x3C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x3C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x3C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x3C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x3C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x3C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x3C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x3C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x3C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x3C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x3C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x3C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x3C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x3C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x3C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x3C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x3C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x3C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x3C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x3C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x3C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x3C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x3C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x3C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x3C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x3C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x3C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x3C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x3C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x3C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x3C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x40 "GTZC1_MPCBB1_PRIVCFGR16,GTZC1 SRAM1 MPCBB privileged configuration for super-block 16 register"
bitfld.long 0x40 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x40 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x40 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x40 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x40 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x40 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x40 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x40 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x40 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x40 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x40 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x40 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x40 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x40 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x40 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x40 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x40 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x40 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x40 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x40 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x40 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x40 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x40 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x40 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x40 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x40 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x40 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x40 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x40 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x40 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x40 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x40 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x44 "GTZC1_MPCBB1_PRIVCFGR17,GTZC1 SRAM1 MPCBB privileged configuration for super-block 17 register"
bitfld.long 0x44 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x44 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x44 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x44 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x44 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x44 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x44 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x44 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x44 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x44 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x44 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x44 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x44 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x44 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x44 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x44 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x44 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x44 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x44 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x44 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x44 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x44 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x44 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x44 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x44 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x44 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x44 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x44 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x44 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x44 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x44 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x44 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x48 "GTZC1_MPCBB1_PRIVCFGR18,GTZC1 SRAM1 MPCBB privileged configuration for super-block 18 register"
bitfld.long 0x48 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x48 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x48 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x48 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x48 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x48 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x48 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x48 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x48 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x48 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x48 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x48 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x48 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x48 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x48 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x48 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x48 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x48 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x48 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x48 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x48 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x48 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x48 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x48 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x48 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x48 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x48 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x48 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x48 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x48 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x48 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x48 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x4C "GTZC1_MPCBB1_PRIVCFGR19,GTZC1 SRAM1 MPCBB privileged configuration for super-block 19 register"
bitfld.long 0x4C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x4C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x4C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x4C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x4C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x4C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x4C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x4C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x4C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x4C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x4C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x4C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x4C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x4C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x4C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x4C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x4C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x4C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x4C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x4C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x4C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x4C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x4C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x4C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x4C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x4C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x4C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x4C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x4C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x4C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x4C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x4C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x50 "GTZC1_MPCBB1_PRIVCFGR20,GTZC1 SRAM1 MPCBB privileged configuration for super-block 20 register"
bitfld.long 0x50 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x50 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x50 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x50 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x50 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x50 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x50 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x50 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x50 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x50 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x50 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x50 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x50 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x50 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x50 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x50 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x50 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x50 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x50 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x50 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x50 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x50 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x50 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x50 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x50 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x50 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x50 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x50 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x50 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x50 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x50 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x50 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x54 "GTZC1_MPCBB1_PRIVCFGR21,GTZC1 SRAM1 MPCBB privileged configuration for super-block 21 register"
bitfld.long 0x54 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x54 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x54 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x54 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x54 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x54 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x54 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x54 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x54 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x54 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x54 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x54 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x54 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x54 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x54 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x54 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x54 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x54 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x54 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x54 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x54 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x54 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x54 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x54 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x54 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x54 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x54 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x54 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x54 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x54 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x54 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x54 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x58 "GTZC1_MPCBB1_PRIVCFGR22,GTZC1 SRAM1 MPCBB privileged configuration for super-block 22 register"
bitfld.long 0x58 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x58 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x58 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x58 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x58 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x58 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x58 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x58 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x58 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x58 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x58 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x58 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x58 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x58 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x58 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x58 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x58 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x58 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x58 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x58 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x58 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x58 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x58 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x58 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x58 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x58 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x58 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x58 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x58 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x58 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x58 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x58 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x5C "GTZC1_MPCBB1_PRIVCFGR23,GTZC1 SRAM1 MPCBB privileged configuration for super-block 23 register"
bitfld.long 0x5C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x5C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x5C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x5C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x5C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x5C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x5C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x5C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x5C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x5C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x5C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x5C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x5C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x5C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x5C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x5C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x5C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x5C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x5C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x5C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x5C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x5C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x5C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x5C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x5C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x5C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x5C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x5C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x5C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x5C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x5C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x5C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x60 "GTZC1_MPCBB1_PRIVCFGR24,GTZC1 SRAM1 MPCBB privileged configuration for super-block 24 register"
bitfld.long 0x60 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x60 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x60 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x60 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x60 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x60 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x60 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x60 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x60 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x60 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x60 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x60 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x60 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x60 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x60 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x60 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x60 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x60 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x60 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x60 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x60 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x60 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x60 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x60 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x60 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x60 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x60 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x60 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x60 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x60 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x60 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x60 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x64 "GTZC1_MPCBB1_PRIVCFGR25,GTZC1 SRAM1 MPCBB privileged configuration for super-block 25 register"
bitfld.long 0x64 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x64 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x64 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x64 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x64 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x64 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x64 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x64 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x64 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x64 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x64 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x64 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x64 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x64 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x64 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x64 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x64 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x64 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x64 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x64 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x64 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x64 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x64 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x64 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x64 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x64 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x64 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x64 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x64 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x64 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x64 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x64 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x68 "GTZC1_MPCBB1_PRIVCFGR26,GTZC1 SRAM1 MPCBB privileged configuration for super-block 26 register"
bitfld.long 0x68 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x68 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x68 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x68 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x68 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x68 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x68 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x68 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x68 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x68 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x68 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x68 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x68 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x68 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x68 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x68 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x68 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x68 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x68 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x68 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x68 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x68 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x68 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x68 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x68 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x68 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x68 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x68 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x68 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x68 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x68 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x68 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x6C "GTZC1_MPCBB1_PRIVCFGR27,GTZC1 SRAM1 MPCBB privileged configuration for super-block 27 register"
bitfld.long 0x6C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x6C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x6C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x6C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x6C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x6C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x6C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x6C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x6C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x6C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x6C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x6C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x6C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x6C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x6C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x6C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x6C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x6C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x6C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x6C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x6C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x6C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x6C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x6C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x6C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x6C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x6C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x6C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x6C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x6C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x6C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x6C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x70 "GTZC1_MPCBB1_PRIVCFGR28,GTZC1 SRAM1 MPCBB privileged configuration for super-block 28 register"
bitfld.long 0x70 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x70 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x70 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x70 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x70 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x70 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x70 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x70 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x70 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x70 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x70 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x70 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x70 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x70 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x70 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x70 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x70 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x70 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x70 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x70 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x70 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x70 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x70 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x70 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x70 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x70 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x70 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x70 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x70 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x70 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x70 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x70 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x74 "GTZC1_MPCBB1_PRIVCFGR29,GTZC1 SRAM1 MPCBB privileged configuration for super-block 29 register"
bitfld.long 0x74 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x74 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x74 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x74 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x74 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x74 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x74 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x74 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x74 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x74 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x74 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x74 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x74 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x74 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x74 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x74 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x74 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x74 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x74 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x74 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x74 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x74 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x74 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x74 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x74 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x74 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x74 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x74 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x74 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x74 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x74 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x74 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x78 "GTZC1_MPCBB1_PRIVCFGR30,GTZC1 SRAM1 MPCBB privileged configuration for super-block 30 register"
bitfld.long 0x78 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x78 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x78 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x78 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x78 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x78 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x78 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x78 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x78 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x78 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x78 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x78 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x78 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x78 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x78 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x78 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x78 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x78 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x78 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x78 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x78 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x78 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x78 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x78 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x78 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x78 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x78 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x78 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x78 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x78 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x78 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x78 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x7C "GTZC1_MPCBB1_PRIVCFGR31,GTZC1 SRAM1 MPCBB privileged configuration for super-block 31 register"
bitfld.long 0x7C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x7C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x7C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x7C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x7C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x7C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x7C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x7C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x7C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x7C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x7C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x7C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x7C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x7C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x7C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x7C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x7C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x7C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x7C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x7C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x7C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x7C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x7C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x7C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x7C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x7C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x7C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x7C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x7C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x7C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x7C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x7C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
tree.end
tree "SEC_GTZC1_MPCBB1"
base ad:0x50032C00
group.long 0x0++0x3
line.long 0x0 "GTZC1_MPCBB1_CR,GTZC1 SRAM1 MPCBB control register"
bitfld.long 0x0 31. "SRWILADIS,This bit disables the detection of an illegal access when a secure read/write transaction access a non-secure blocks of the block-based SRAM (secure fetch on non-secure block is always considered illegal)." "0: enabled,1: disabled"
newline
bitfld.long 0x0 30. "INVSECSTATE,This bit is used to define the internal SRAMs clocks control in RCC as secure or not." "0: SRAMs clocks are secure if a secure area exists..,1: SRAMs clocks are non-secure even if a secure.."
newline
bitfld.long 0x0 0. "GLOCK,This bit is cleared by default and once set it can not be reset until system reset." "0: control register not locked,1: control register locked"
group.long 0x10++0x3
line.long 0x0 "GTZC1_MPCBB1_CFGLOCKR1,GTZC1 SRAM1 MPCBB configuration lock register 1"
bitfld.long 0x0 31. "SPLCK31,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR31 and..,1: Writes to GTZC1_MPCBB1_SECCFGR31 and.."
newline
bitfld.long 0x0 30. "SPLCK30,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR30 and..,1: Writes to GTZC1_MPCBB1_SECCFGR30 and.."
newline
bitfld.long 0x0 29. "SPLCK29,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR29 and..,1: Writes to GTZC1_MPCBB1_SECCFGR29 and.."
newline
bitfld.long 0x0 28. "SPLCK28,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR28 and..,1: Writes to GTZC1_MPCBB1_SECCFGR28 and.."
newline
bitfld.long 0x0 27. "SPLCK27,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR27 and..,1: Writes to GTZC1_MPCBB1_SECCFGR27 and.."
newline
bitfld.long 0x0 26. "SPLCK26,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR26 and..,1: Writes to GTZC1_MPCBB1_SECCFGR26 and.."
newline
bitfld.long 0x0 25. "SPLCK25,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR25 and..,1: Writes to GTZC1_MPCBB1_SECCFGR25 and.."
newline
bitfld.long 0x0 24. "SPLCK24,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR24 and..,1: Writes to GTZC1_MPCBB1_SECCFGR24 and.."
newline
bitfld.long 0x0 23. "SPLCK23,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR23 and..,1: Writes to GTZC1_MPCBB1_SECCFGR23 and.."
newline
bitfld.long 0x0 22. "SPLCK22,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR22 and..,1: Writes to GTZC1_MPCBB1_SECCFGR22 and.."
newline
bitfld.long 0x0 21. "SPLCK21,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR21 and..,1: Writes to GTZC1_MPCBB1_SECCFGR21 and.."
newline
bitfld.long 0x0 20. "SPLCK20,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR20 and..,1: Writes to GTZC1_MPCBB1_SECCFGR20 and.."
newline
bitfld.long 0x0 19. "SPLCK19,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR19 and..,1: Writes to GTZC1_MPCBB1_SECCFGR19 and.."
newline
bitfld.long 0x0 18. "SPLCK18,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR18 and..,1: Writes to GTZC1_MPCBB1_SECCFGR18 and.."
newline
bitfld.long 0x0 17. "SPLCK17,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR17 and..,1: Writes to GTZC1_MPCBB1_SECCFGR17 and.."
newline
bitfld.long 0x0 16. "SPLCK16,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR16 and..,1: Writes to GTZC1_MPCBB1_SECCFGR16 and.."
newline
bitfld.long 0x0 15. "SPLCK15,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR15 and..,1: Writes to GTZC1_MPCBB1_SECCFGR15 and.."
newline
bitfld.long 0x0 14. "SPLCK14,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR14 and..,1: Writes to GTZC1_MPCBB1_SECCFGR14 and.."
newline
bitfld.long 0x0 13. "SPLCK13,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR13 and..,1: Writes to GTZC1_MPCBB1_SECCFGR13 and.."
newline
bitfld.long 0x0 12. "SPLCK12,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR12 and..,1: Writes to GTZC1_MPCBB1_SECCFGR12 and.."
newline
bitfld.long 0x0 11. "SPLCK11,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR11 and..,1: Writes to GTZC1_MPCBB1_SECCFGR11 and.."
newline
bitfld.long 0x0 10. "SPLCK10,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR10 and..,1: Writes to GTZC1_MPCBB1_SECCFGR10 and.."
newline
bitfld.long 0x0 9. "SPLCK9,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR9 and GTZC1_MPCBB1_PRIVCFGR9..,1: Writes to GTZC1_MPCBB1_SECCFGR9 and.."
newline
bitfld.long 0x0 8. "SPLCK8,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR8 and GTZC1_MPCBB1_PRIVCFGR8..,1: Writes to GTZC1_MPCBB1_SECCFGR8 and.."
newline
bitfld.long 0x0 7. "SPLCK7,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR7 and GTZC1_MPCBB1_PRIVCFGR7..,1: Writes to GTZC1_MPCBB1_SECCFGR7 and.."
newline
bitfld.long 0x0 6. "SPLCK6,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR6 and GTZC1_MPCBB1_PRIVCFGR6..,1: Writes to GTZC1_MPCBB1_SECCFGR6 and.."
newline
bitfld.long 0x0 5. "SPLCK5,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR5 and GTZC1_MPCBB1_PRIVCFGR5..,1: Writes to GTZC1_MPCBB1_SECCFGR5 and.."
newline
bitfld.long 0x0 4. "SPLCK4,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR4 and GTZC1_MPCBB1_PRIVCFGR4..,1: Writes to GTZC1_MPCBB1_SECCFGR4 and.."
newline
bitfld.long 0x0 3. "SPLCK3,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR3 and GTZC1_MPCBB1_PRIVCFGR3..,1: Writes to GTZC1_MPCBB1_SECCFGR3 and.."
newline
bitfld.long 0x0 2. "SPLCK2,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR2 and GTZC1_MPCBB1_PRIVCFGR2..,1: Writes to GTZC1_MPCBB1_SECCFGR2 and.."
newline
bitfld.long 0x0 1. "SPLCK1,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR1 and GTZC1_MPCBB1_PRIVCFGR1..,1: Writes to GTZC1_MPCBB1_SECCFGR1 and.."
newline
bitfld.long 0x0 0. "SPLCK0,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB1_SECCFGR0 and GTZC1_MPCBB1_PRIVCFGR0..,1: Writes to GTZC1_MPCBB1_SECCFGR0 and.."
group.long 0x100++0x7F
line.long 0x0 "GTZC1_MPCBB1_SECCFGR0,GTZC1 SRAM1 MPCBB security configuration for super-block 0 register"
bitfld.long 0x0 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x0 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x0 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x0 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x0 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x0 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x0 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x0 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x0 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x0 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x0 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x0 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x0 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x0 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x0 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x0 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x0 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x0 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x0 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x0 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x0 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x0 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x0 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x0 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x0 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x0 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x0 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x0 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x0 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x0 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x0 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x0 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR0." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x4 "GTZC1_MPCBB1_SECCFGR1,GTZC1 SRAM1 MPCBB security configuration for super-block 1 register"
bitfld.long 0x4 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x4 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x4 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x4 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x4 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x4 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x4 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x4 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x4 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x4 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x4 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x4 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x4 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x4 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x4 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x4 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x4 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x4 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x4 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x4 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x4 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x4 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x4 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x4 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x4 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x4 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x4 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x4 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x4 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x4 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x4 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x4 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR1." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x8 "GTZC1_MPCBB1_SECCFGR2,GTZC1 SRAM1 MPCBB security configuration for super-block 2 register"
bitfld.long 0x8 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x8 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x8 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x8 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x8 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x8 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x8 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x8 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x8 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x8 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x8 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x8 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x8 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x8 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x8 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x8 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x8 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x8 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x8 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x8 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x8 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x8 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x8 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x8 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x8 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x8 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x8 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x8 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x8 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x8 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x8 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x8 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR2." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0xC "GTZC1_MPCBB1_SECCFGR3,GTZC1 SRAM1 MPCBB security configuration for super-block 3 register"
bitfld.long 0xC 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0xC 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0xC 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0xC 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0xC 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0xC 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0xC 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0xC 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0xC 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0xC 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0xC 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0xC 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0xC 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0xC 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0xC 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0xC 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0xC 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0xC 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0xC 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0xC 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0xC 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0xC 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0xC 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0xC 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0xC 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0xC 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0xC 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0xC 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0xC 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0xC 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0xC 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0xC 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR3." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x10 "GTZC1_MPCBB1_SECCFGR4,GTZC1 SRAM1 MPCBB security configuration for super-block 4 register"
bitfld.long 0x10 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x10 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x10 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x10 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x10 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x10 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x10 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x10 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x10 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x10 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x10 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x10 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x10 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x10 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x10 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x10 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x10 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x10 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x10 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x10 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x10 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x10 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x10 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x10 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x10 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x10 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x10 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x10 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x10 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x10 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x10 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x10 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR4." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x14 "GTZC1_MPCBB1_SECCFGR5,GTZC1 SRAM1 MPCBB security configuration for super-block 5 register"
bitfld.long 0x14 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x14 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x14 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x14 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x14 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x14 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x14 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x14 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x14 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x14 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x14 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x14 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x14 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x14 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x14 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x14 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x14 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x14 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x14 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x14 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x14 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x14 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x14 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x14 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x14 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x14 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x14 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x14 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x14 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x14 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x14 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x14 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR5." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x18 "GTZC1_MPCBB1_SECCFGR6,GTZC1 SRAM1 MPCBB security configuration for super-block 6 register"
bitfld.long 0x18 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x18 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x18 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x18 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x18 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x18 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x18 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x18 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x18 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x18 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x18 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x18 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x18 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x18 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x18 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x18 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x18 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x18 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x18 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x18 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x18 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x18 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x18 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x18 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x18 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x18 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x18 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x18 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x18 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x18 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x18 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x18 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR6." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x1C "GTZC1_MPCBB1_SECCFGR7,GTZC1 SRAM1 MPCBB security configuration for super-block 7 register"
bitfld.long 0x1C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x1C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x1C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x1C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x1C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x1C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x1C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x1C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x1C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x1C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x1C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x1C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x1C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x1C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x1C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x1C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x1C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x1C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x1C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x1C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x1C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x1C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x1C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x1C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x1C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x1C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x1C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x1C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x1C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x1C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x1C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x1C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR7." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x20 "GTZC1_MPCBB1_SECCFGR8,GTZC1 SRAM1 MPCBB security configuration for super-block 8 register"
bitfld.long 0x20 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x20 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x20 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x20 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x20 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x20 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x20 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x20 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x20 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x20 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x20 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x20 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x20 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x20 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x20 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x20 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x20 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x20 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x20 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x20 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x20 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x20 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x20 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x20 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x20 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x20 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x20 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x20 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x20 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x20 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x20 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x20 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR8." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x24 "GTZC1_MPCBB1_SECCFGR9,GTZC1 SRAM1 MPCBB security configuration for super-block 9 register"
bitfld.long 0x24 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x24 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x24 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x24 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x24 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x24 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x24 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x24 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x24 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x24 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x24 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x24 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x24 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x24 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x24 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x24 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x24 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x24 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x24 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x24 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x24 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x24 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x24 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x24 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x24 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x24 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x24 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x24 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x24 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x24 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x24 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x24 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR9." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x28 "GTZC1_MPCBB1_SECCFGR10,GTZC1 SRAM1 MPCBB security configuration for super-block 10 register"
bitfld.long 0x28 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x28 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x28 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x28 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x28 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x28 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x28 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x28 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x28 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x28 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x28 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x28 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x28 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x28 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x28 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x28 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x28 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x28 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x28 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x28 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x28 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x28 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x28 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x28 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x28 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x28 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x28 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x28 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x28 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x28 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x28 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x28 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR10." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x2C "GTZC1_MPCBB1_SECCFGR11,GTZC1 SRAM1 MPCBB security configuration for super-block 11 register"
bitfld.long 0x2C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x2C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x2C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x2C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x2C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x2C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x2C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x2C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x2C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x2C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x2C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x2C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x2C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x2C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x2C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x2C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x2C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x2C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x2C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x2C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x2C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x2C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x2C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x2C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x2C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x2C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x2C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x2C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x2C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x2C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x2C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x2C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR11." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x30 "GTZC1_MPCBB1_SECCFGR12,GTZC1 SRAM1 MPCBB security configuration for super-block 12 register"
bitfld.long 0x30 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x30 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x30 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x30 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x30 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x30 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x30 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x30 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x30 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x30 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x30 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x30 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x30 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x30 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x30 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x30 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x30 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x30 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x30 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x30 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x30 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x30 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x30 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x30 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x30 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x30 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x30 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x30 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x30 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x30 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x30 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x30 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR12." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x34 "GTZC1_MPCBB1_SECCFGR13,GTZC1 SRAM1 MPCBB security configuration for super-block 13 register"
bitfld.long 0x34 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x34 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x34 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x34 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x34 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x34 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x34 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x34 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x34 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x34 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x34 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x34 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x34 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x34 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x34 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x34 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x34 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x34 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x34 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x34 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x34 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x34 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x34 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x34 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x34 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x34 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x34 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x34 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x34 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x34 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x34 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x34 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR13." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x38 "GTZC1_MPCBB1_SECCFGR14,GTZC1 SRAM1 MPCBB security configuration for super-block 14 register"
bitfld.long 0x38 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x38 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x38 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x38 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x38 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x38 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x38 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x38 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x38 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x38 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x38 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x38 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x38 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x38 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x38 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x38 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x38 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x38 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x38 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x38 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x38 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x38 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x38 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x38 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x38 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x38 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x38 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x38 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x38 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x38 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x38 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x38 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR14." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x3C "GTZC1_MPCBB1_SECCFGR15,GTZC1 SRAM1 MPCBB security configuration for super-block 15 register"
bitfld.long 0x3C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x3C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x3C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x3C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x3C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x3C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x3C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x3C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x3C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x3C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x3C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x3C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x3C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x3C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x3C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x3C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x3C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x3C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x3C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x3C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x3C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x3C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x3C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x3C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x3C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x3C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x3C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x3C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x3C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x3C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x3C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x3C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR15." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x40 "GTZC1_MPCBB1_SECCFGR16,GTZC1 SRAM1 MPCBB security configuration for super-block 16 register"
bitfld.long 0x40 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x40 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x40 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x40 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x40 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x40 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x40 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x40 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x40 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x40 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x40 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x40 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x40 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x40 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x40 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x40 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x40 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x40 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x40 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x40 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x40 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x40 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x40 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x40 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x40 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x40 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x40 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x40 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x40 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x40 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x40 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x40 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR16." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x44 "GTZC1_MPCBB1_SECCFGR17,GTZC1 SRAM1 MPCBB security configuration for super-block 17 register"
bitfld.long 0x44 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x44 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x44 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x44 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x44 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x44 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x44 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x44 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x44 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x44 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x44 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x44 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x44 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x44 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x44 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x44 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x44 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x44 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x44 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x44 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x44 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x44 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x44 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x44 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x44 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x44 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x44 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x44 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x44 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x44 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x44 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x44 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR17." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x48 "GTZC1_MPCBB1_SECCFGR18,GTZC1 SRAM1 MPCBB security configuration for super-block 18 register"
bitfld.long 0x48 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x48 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x48 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x48 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x48 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x48 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x48 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x48 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x48 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x48 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x48 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x48 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x48 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x48 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x48 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x48 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x48 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x48 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x48 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x48 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x48 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x48 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x48 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x48 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x48 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x48 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x48 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x48 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x48 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x48 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x48 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x48 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR18." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x4C "GTZC1_MPCBB1_SECCFGR19,GTZC1 SRAM1 MPCBB security configuration for super-block 19 register"
bitfld.long 0x4C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x4C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x4C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x4C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x4C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x4C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x4C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x4C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x4C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x4C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x4C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x4C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x4C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x4C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x4C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x4C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x4C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x4C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x4C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x4C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x4C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x4C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x4C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x4C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x4C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x4C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x4C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x4C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x4C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x4C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x4C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x4C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR19." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x50 "GTZC1_MPCBB1_SECCFGR20,GTZC1 SRAM1 MPCBB security configuration for super-block 20 register"
bitfld.long 0x50 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x50 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x50 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x50 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x50 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x50 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x50 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x50 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x50 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x50 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x50 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x50 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x50 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x50 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x50 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x50 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x50 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x50 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x50 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x50 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x50 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x50 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x50 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x50 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x50 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x50 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x50 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x50 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x50 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x50 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x50 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x50 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR20." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x54 "GTZC1_MPCBB1_SECCFGR21,GTZC1 SRAM1 MPCBB security configuration for super-block 21 register"
bitfld.long 0x54 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x54 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x54 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x54 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x54 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x54 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x54 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x54 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x54 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x54 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x54 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x54 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x54 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x54 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x54 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x54 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x54 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x54 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x54 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x54 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x54 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x54 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x54 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x54 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x54 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x54 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x54 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x54 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x54 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x54 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x54 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x54 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR21." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x58 "GTZC1_MPCBB1_SECCFGR22,GTZC1 SRAM1 MPCBB security configuration for super-block 22 register"
bitfld.long 0x58 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x58 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x58 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x58 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x58 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x58 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x58 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x58 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x58 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x58 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x58 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x58 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x58 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x58 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x58 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x58 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x58 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x58 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x58 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x58 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x58 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x58 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x58 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x58 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x58 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x58 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x58 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x58 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x58 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x58 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x58 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x58 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR22." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x5C "GTZC1_MPCBB1_SECCFGR23,GTZC1 SRAM1 MPCBB security configuration for super-block 23 register"
bitfld.long 0x5C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x5C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x5C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x5C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x5C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x5C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x5C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x5C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x5C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x5C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x5C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x5C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x5C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x5C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x5C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x5C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x5C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x5C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x5C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x5C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x5C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x5C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x5C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x5C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x5C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x5C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x5C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x5C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x5C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x5C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x5C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x5C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR23." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x60 "GTZC1_MPCBB1_SECCFGR24,GTZC1 SRAM1 MPCBB security configuration for super-block 24 register"
bitfld.long 0x60 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x60 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x60 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x60 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x60 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x60 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x60 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x60 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x60 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x60 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x60 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x60 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x60 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x60 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x60 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x60 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x60 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x60 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x60 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x60 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x60 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x60 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x60 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x60 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x60 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x60 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x60 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x60 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x60 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x60 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x60 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x60 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR24." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x64 "GTZC1_MPCBB1_SECCFGR25,GTZC1 SRAM1 MPCBB security configuration for super-block 25 register"
bitfld.long 0x64 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x64 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x64 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x64 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x64 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x64 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x64 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x64 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x64 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x64 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x64 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x64 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x64 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x64 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x64 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x64 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x64 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x64 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x64 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x64 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x64 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x64 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x64 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x64 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x64 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x64 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x64 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x64 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x64 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x64 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x64 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x64 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR25." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x68 "GTZC1_MPCBB1_SECCFGR26,GTZC1 SRAM1 MPCBB security configuration for super-block 26 register"
bitfld.long 0x68 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x68 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x68 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x68 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x68 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x68 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x68 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x68 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x68 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x68 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x68 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x68 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x68 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x68 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x68 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x68 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x68 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x68 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x68 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x68 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x68 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x68 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x68 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x68 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x68 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x68 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x68 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x68 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x68 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x68 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x68 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x68 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR26." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x6C "GTZC1_MPCBB1_SECCFGR27,GTZC1 SRAM1 MPCBB security configuration for super-block 27 register"
bitfld.long 0x6C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x6C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x6C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x6C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x6C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x6C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x6C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x6C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x6C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x6C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x6C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x6C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x6C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x6C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x6C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x6C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x6C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x6C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x6C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x6C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x6C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x6C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x6C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x6C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x6C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x6C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x6C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x6C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x6C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x6C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x6C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x6C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR27." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x70 "GTZC1_MPCBB1_SECCFGR28,GTZC1 SRAM1 MPCBB security configuration for super-block 28 register"
bitfld.long 0x70 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x70 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x70 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x70 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x70 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x70 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x70 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x70 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x70 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x70 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x70 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x70 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x70 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x70 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x70 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x70 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x70 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x70 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x70 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x70 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x70 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x70 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x70 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x70 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x70 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x70 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x70 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x70 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x70 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x70 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x70 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x70 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR28." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x74 "GTZC1_MPCBB1_SECCFGR29,GTZC1 SRAM1 MPCBB security configuration for super-block 29 register"
bitfld.long 0x74 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x74 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x74 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x74 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x74 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x74 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x74 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x74 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x74 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x74 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x74 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x74 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x74 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x74 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x74 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x74 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x74 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x74 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x74 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x74 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x74 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x74 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x74 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x74 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x74 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x74 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x74 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x74 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x74 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x74 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x74 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x74 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR29." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x78 "GTZC1_MPCBB1_SECCFGR30,GTZC1 SRAM1 MPCBB security configuration for super-block 30 register"
bitfld.long 0x78 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x78 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x78 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x78 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x78 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x78 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x78 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x78 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x78 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x78 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x78 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x78 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x78 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x78 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x78 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x78 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x78 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x78 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x78 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x78 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x78 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x78 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x78 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x78 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x78 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x78 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x78 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x78 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x78 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x78 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x78 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x78 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR30." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x7C "GTZC1_MPCBB1_SECCFGR31,GTZC1 SRAM1 MPCBB security configuration for super-block 31 register"
bitfld.long 0x7C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x7C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x7C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x7C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x7C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x7C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x7C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x7C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x7C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x7C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x7C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x7C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x7C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x7C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x7C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x7C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x7C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x7C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x7C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x7C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x7C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x7C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x7C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x7C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x7C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x7C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x7C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x7C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x7C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x7C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x7C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x7C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB1_PRIVCFGR31." "0: Non-secure access only to block 0,1: Secure access only to block 0"
group.long 0x200++0x7F
line.long 0x0 "GTZC1_MPCBB1_PRIVCFGR0,GTZC1 SRAM1 MPCBB privileged configuration for super-block 0 register"
bitfld.long 0x0 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x0 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x0 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x0 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x0 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x0 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x0 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x0 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x0 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x0 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x0 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x0 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x0 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x0 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x0 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x0 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x0 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x0 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x0 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x0 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x0 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x0 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x0 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x0 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x0 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x0 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x0 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x0 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x0 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x0 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x0 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x0 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR0." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x4 "GTZC1_MPCBB1_PRIVCFGR1,GTZC1 SRAM1 MPCBB privileged configuration for super-block 1 register"
bitfld.long 0x4 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x4 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x4 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x4 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x4 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x4 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x4 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x4 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x4 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x4 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x4 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x4 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x4 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x4 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x4 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x4 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x4 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x4 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x4 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x4 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x4 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x4 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x4 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x4 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x4 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x4 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x4 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x4 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x4 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x4 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x4 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x4 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR1." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x8 "GTZC1_MPCBB1_PRIVCFGR2,GTZC1 SRAM1 MPCBB privileged configuration for super-block 2 register"
bitfld.long 0x8 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x8 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x8 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x8 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x8 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x8 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x8 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x8 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x8 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x8 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x8 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x8 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x8 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x8 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x8 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x8 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x8 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x8 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x8 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x8 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x8 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x8 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x8 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x8 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x8 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x8 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x8 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x8 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x8 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x8 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x8 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x8 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR2." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0xC "GTZC1_MPCBB1_PRIVCFGR3,GTZC1 SRAM1 MPCBB privileged configuration for super-block 3 register"
bitfld.long 0xC 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0xC 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0xC 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0xC 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0xC 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0xC 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0xC 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0xC 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0xC 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0xC 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0xC 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0xC 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0xC 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0xC 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0xC 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0xC 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0xC 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0xC 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0xC 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0xC 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0xC 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0xC 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0xC 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0xC 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0xC 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0xC 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0xC 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0xC 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0xC 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0xC 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0xC 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0xC 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR3." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x10 "GTZC1_MPCBB1_PRIVCFGR4,GTZC1 SRAM1 MPCBB privileged configuration for super-block 4 register"
bitfld.long 0x10 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x10 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x10 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x10 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x10 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x10 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x10 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x10 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x10 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x10 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x10 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x10 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x10 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x10 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x10 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x10 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x10 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x10 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x10 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x10 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x10 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x10 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x10 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x10 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x10 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x10 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x10 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x10 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x10 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x10 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x10 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x10 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR4." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x14 "GTZC1_MPCBB1_PRIVCFGR5,GTZC1 SRAM1 MPCBB privileged configuration for super-block 5 register"
bitfld.long 0x14 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x14 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x14 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x14 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x14 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x14 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x14 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x14 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x14 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x14 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x14 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x14 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x14 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x14 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x14 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x14 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x14 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x14 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x14 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x14 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x14 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x14 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x14 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x14 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x14 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x14 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x14 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x14 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x14 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x14 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x14 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x14 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR5." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x18 "GTZC1_MPCBB1_PRIVCFGR6,GTZC1 SRAM1 MPCBB privileged configuration for super-block 6 register"
bitfld.long 0x18 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x18 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x18 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x18 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x18 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x18 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x18 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x18 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x18 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x18 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x18 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x18 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x18 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x18 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x18 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x18 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x18 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x18 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x18 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x18 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x18 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x18 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x18 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x18 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x18 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x18 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x18 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x18 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x18 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x18 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x18 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x18 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR6." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x1C "GTZC1_MPCBB1_PRIVCFGR7,GTZC1 SRAM1 MPCBB privileged configuration for super-block 7 register"
bitfld.long 0x1C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x1C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x1C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x1C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x1C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x1C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x1C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x1C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x1C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x1C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x1C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x1C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x1C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x1C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x1C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x1C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x1C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x1C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x1C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x1C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x1C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x1C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x1C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x1C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x1C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x1C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x1C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x1C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x1C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x1C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x1C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x1C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR7." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x20 "GTZC1_MPCBB1_PRIVCFGR8,GTZC1 SRAM1 MPCBB privileged configuration for super-block 8 register"
bitfld.long 0x20 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x20 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x20 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x20 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x20 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x20 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x20 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x20 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x20 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x20 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x20 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x20 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x20 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x20 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x20 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x20 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x20 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x20 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x20 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x20 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x20 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x20 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x20 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x20 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x20 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x20 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x20 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x20 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x20 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x20 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x20 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x20 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR8." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x24 "GTZC1_MPCBB1_PRIVCFGR9,GTZC1 SRAM1 MPCBB privileged configuration for super-block 9 register"
bitfld.long 0x24 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x24 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x24 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x24 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x24 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x24 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x24 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x24 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x24 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x24 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x24 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x24 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x24 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x24 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x24 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x24 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x24 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x24 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x24 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x24 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x24 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x24 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x24 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x24 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x24 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x24 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x24 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x24 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x24 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x24 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x24 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x24 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR9." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x28 "GTZC1_MPCBB1_PRIVCFGR10,GTZC1 SRAM1 MPCBB privileged configuration for super-block 10 register"
bitfld.long 0x28 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x28 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x28 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x28 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x28 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x28 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x28 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x28 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x28 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x28 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x28 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x28 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x28 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x28 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x28 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x28 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x28 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x28 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x28 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x28 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x28 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x28 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x28 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x28 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x28 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x28 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x28 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x28 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x28 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x28 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x28 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x28 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR10." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x2C "GTZC1_MPCBB1_PRIVCFGR11,GTZC1 SRAM1 MPCBB privileged configuration for super-block 11 register"
bitfld.long 0x2C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x2C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x2C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x2C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x2C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x2C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x2C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x2C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x2C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x2C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x2C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x2C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x2C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x2C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x2C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x2C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x2C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x2C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x2C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x2C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x2C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x2C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x2C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x2C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x2C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x2C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x2C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x2C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x2C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x2C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x2C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x2C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR11." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x30 "GTZC1_MPCBB1_PRIVCFGR12,GTZC1 SRAM1 MPCBB privileged configuration for super-block 12 register"
bitfld.long 0x30 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x30 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x30 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x30 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x30 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x30 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x30 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x30 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x30 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x30 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x30 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x30 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x30 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x30 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x30 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x30 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x30 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x30 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x30 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x30 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x30 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x30 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x30 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x30 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x30 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x30 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x30 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x30 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x30 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x30 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x30 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x30 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR12." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x34 "GTZC1_MPCBB1_PRIVCFGR13,GTZC1 SRAM1 MPCBB privileged configuration for super-block 13 register"
bitfld.long 0x34 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x34 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x34 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x34 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x34 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x34 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x34 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x34 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x34 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x34 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x34 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x34 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x34 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x34 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x34 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x34 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x34 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x34 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x34 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x34 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x34 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x34 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x34 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x34 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x34 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x34 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x34 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x34 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x34 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x34 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x34 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x34 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR13." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x38 "GTZC1_MPCBB1_PRIVCFGR14,GTZC1 SRAM1 MPCBB privileged configuration for super-block 14 register"
bitfld.long 0x38 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x38 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x38 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x38 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x38 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x38 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x38 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x38 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x38 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x38 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x38 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x38 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x38 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x38 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x38 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x38 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x38 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x38 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x38 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x38 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x38 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x38 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x38 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x38 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x38 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x38 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x38 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x38 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x38 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x38 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x38 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x38 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR14." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x3C "GTZC1_MPCBB1_PRIVCFGR15,GTZC1 SRAM1 MPCBB privileged configuration for super-block 15 register"
bitfld.long 0x3C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x3C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x3C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x3C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x3C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x3C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x3C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x3C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x3C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x3C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x3C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x3C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x3C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x3C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x3C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x3C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x3C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x3C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x3C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x3C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x3C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x3C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x3C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x3C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x3C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x3C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x3C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x3C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x3C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x3C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x3C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x3C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR15." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x40 "GTZC1_MPCBB1_PRIVCFGR16,GTZC1 SRAM1 MPCBB privileged configuration for super-block 16 register"
bitfld.long 0x40 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x40 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x40 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x40 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x40 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x40 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x40 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x40 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x40 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x40 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x40 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x40 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x40 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x40 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x40 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x40 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x40 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x40 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x40 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x40 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x40 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x40 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x40 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x40 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x40 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x40 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x40 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x40 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x40 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x40 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x40 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x40 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR16." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x44 "GTZC1_MPCBB1_PRIVCFGR17,GTZC1 SRAM1 MPCBB privileged configuration for super-block 17 register"
bitfld.long 0x44 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x44 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x44 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x44 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x44 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x44 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x44 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x44 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x44 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x44 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x44 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x44 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x44 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x44 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x44 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x44 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x44 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x44 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x44 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x44 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x44 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x44 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x44 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x44 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x44 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x44 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x44 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x44 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x44 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x44 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x44 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x44 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR17." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x48 "GTZC1_MPCBB1_PRIVCFGR18,GTZC1 SRAM1 MPCBB privileged configuration for super-block 18 register"
bitfld.long 0x48 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x48 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x48 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x48 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x48 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x48 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x48 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x48 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x48 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x48 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x48 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x48 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x48 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x48 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x48 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x48 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x48 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x48 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x48 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x48 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x48 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x48 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x48 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x48 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x48 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x48 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x48 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x48 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x48 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x48 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x48 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x48 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR18." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x4C "GTZC1_MPCBB1_PRIVCFGR19,GTZC1 SRAM1 MPCBB privileged configuration for super-block 19 register"
bitfld.long 0x4C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x4C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x4C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x4C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x4C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x4C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x4C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x4C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x4C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x4C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x4C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x4C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x4C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x4C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x4C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x4C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x4C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x4C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x4C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x4C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x4C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x4C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x4C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x4C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x4C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x4C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x4C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x4C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x4C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x4C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x4C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x4C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR19." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x50 "GTZC1_MPCBB1_PRIVCFGR20,GTZC1 SRAM1 MPCBB privileged configuration for super-block 20 register"
bitfld.long 0x50 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x50 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x50 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x50 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x50 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x50 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x50 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x50 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x50 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x50 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x50 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x50 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x50 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x50 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x50 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x50 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x50 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x50 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x50 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x50 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x50 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x50 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x50 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x50 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x50 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x50 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x50 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x50 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x50 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x50 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x50 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x50 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR20." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x54 "GTZC1_MPCBB1_PRIVCFGR21,GTZC1 SRAM1 MPCBB privileged configuration for super-block 21 register"
bitfld.long 0x54 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x54 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x54 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x54 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x54 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x54 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x54 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x54 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x54 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x54 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x54 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x54 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x54 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x54 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x54 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x54 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x54 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x54 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x54 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x54 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x54 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x54 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x54 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x54 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x54 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x54 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x54 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x54 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x54 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x54 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x54 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x54 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR21." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x58 "GTZC1_MPCBB1_PRIVCFGR22,GTZC1 SRAM1 MPCBB privileged configuration for super-block 22 register"
bitfld.long 0x58 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x58 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x58 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x58 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x58 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x58 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x58 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x58 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x58 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x58 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x58 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x58 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x58 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x58 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x58 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x58 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x58 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x58 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x58 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x58 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x58 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x58 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x58 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x58 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x58 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x58 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x58 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x58 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x58 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x58 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x58 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x58 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR22." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x5C "GTZC1_MPCBB1_PRIVCFGR23,GTZC1 SRAM1 MPCBB privileged configuration for super-block 23 register"
bitfld.long 0x5C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x5C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x5C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x5C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x5C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x5C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x5C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x5C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x5C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x5C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x5C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x5C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x5C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x5C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x5C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x5C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x5C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x5C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x5C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x5C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x5C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x5C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x5C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x5C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x5C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x5C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x5C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x5C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x5C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x5C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x5C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x5C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR23." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x60 "GTZC1_MPCBB1_PRIVCFGR24,GTZC1 SRAM1 MPCBB privileged configuration for super-block 24 register"
bitfld.long 0x60 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x60 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x60 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x60 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x60 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x60 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x60 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x60 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x60 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x60 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x60 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x60 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x60 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x60 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x60 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x60 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x60 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x60 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x60 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x60 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x60 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x60 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x60 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x60 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x60 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x60 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x60 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x60 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x60 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x60 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x60 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x60 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR24." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x64 "GTZC1_MPCBB1_PRIVCFGR25,GTZC1 SRAM1 MPCBB privileged configuration for super-block 25 register"
bitfld.long 0x64 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x64 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x64 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x64 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x64 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x64 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x64 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x64 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x64 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x64 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x64 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x64 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x64 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x64 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x64 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x64 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x64 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x64 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x64 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x64 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x64 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x64 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x64 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x64 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x64 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x64 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x64 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x64 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x64 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x64 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x64 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x64 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR25." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x68 "GTZC1_MPCBB1_PRIVCFGR26,GTZC1 SRAM1 MPCBB privileged configuration for super-block 26 register"
bitfld.long 0x68 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x68 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x68 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x68 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x68 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x68 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x68 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x68 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x68 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x68 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x68 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x68 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x68 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x68 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x68 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x68 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x68 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x68 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x68 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x68 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x68 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x68 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x68 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x68 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x68 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x68 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x68 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x68 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x68 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x68 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x68 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x68 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR26." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x6C "GTZC1_MPCBB1_PRIVCFGR27,GTZC1 SRAM1 MPCBB privileged configuration for super-block 27 register"
bitfld.long 0x6C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x6C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x6C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x6C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x6C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x6C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x6C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x6C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x6C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x6C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x6C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x6C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x6C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x6C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x6C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x6C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x6C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x6C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x6C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x6C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x6C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x6C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x6C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x6C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x6C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x6C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x6C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x6C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x6C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x6C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x6C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x6C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR27." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x70 "GTZC1_MPCBB1_PRIVCFGR28,GTZC1 SRAM1 MPCBB privileged configuration for super-block 28 register"
bitfld.long 0x70 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x70 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x70 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x70 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x70 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x70 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x70 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x70 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x70 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x70 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x70 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x70 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x70 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x70 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x70 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x70 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x70 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x70 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x70 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x70 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x70 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x70 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x70 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x70 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x70 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x70 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x70 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x70 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x70 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x70 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x70 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x70 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR28." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x74 "GTZC1_MPCBB1_PRIVCFGR29,GTZC1 SRAM1 MPCBB privileged configuration for super-block 29 register"
bitfld.long 0x74 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x74 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x74 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x74 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x74 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x74 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x74 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x74 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x74 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x74 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x74 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x74 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x74 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x74 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x74 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x74 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x74 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x74 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x74 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x74 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x74 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x74 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x74 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x74 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x74 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x74 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x74 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x74 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x74 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x74 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x74 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x74 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR29." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x78 "GTZC1_MPCBB1_PRIVCFGR30,GTZC1 SRAM1 MPCBB privileged configuration for super-block 30 register"
bitfld.long 0x78 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x78 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x78 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x78 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x78 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x78 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x78 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x78 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x78 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x78 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x78 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x78 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x78 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x78 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x78 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x78 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x78 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x78 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x78 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x78 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x78 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x78 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x78 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x78 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x78 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x78 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x78 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x78 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x78 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x78 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x78 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x78 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR30." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x7C "GTZC1_MPCBB1_PRIVCFGR31,GTZC1 SRAM1 MPCBB privileged configuration for super-block 31 register"
bitfld.long 0x7C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x7C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x7C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x7C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x7C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x7C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x7C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x7C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x7C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x7C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x7C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x7C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x7C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x7C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x7C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x7C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x7C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x7C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x7C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x7C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x7C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x7C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x7C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x7C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x7C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x7C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x7C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x7C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x7C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x7C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x7C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x7C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB1_SECCFGR31." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
tree.end
tree "GTZC1_MPCBB2"
base ad:0x40033000
group.long 0x0++0x3
line.long 0x0 "GTZC1_MPCBB2_CR,GTZC1 SRAM2 MPCBB control register"
bitfld.long 0x0 31. "SRWILADIS,This bit disables the detection of an illegal access when a secure read/write transaction access a non-secure blocks of the block-based SRAM (secure fetch on non-secure block is always considered illegal)." "0: enabled,1: disabled"
newline
bitfld.long 0x0 30. "INVSECSTATE,This bit is used to define the internal SRAMs clocks control in RCC as secure or not." "0: SRAMs clocks are secure if a secure area exists..,1: SRAMs clocks are non-secure even if a secure.."
newline
bitfld.long 0x0 0. "GLOCK,This bit is cleared by default and once set it can not be reset until system reset." "0: control register not locked,1: control register locked"
group.long 0x10++0x3
line.long 0x0 "GTZC1_MPCBB2_CFGLOCKR1,GTZC1 SRAM2 MPCBB configuration lock register 1"
bitfld.long 0x0 31. "SPLCK31,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR31 and..,1: Writes to GTZC1_MPCBB2_SECCFGR31 and.."
newline
bitfld.long 0x0 30. "SPLCK30,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR30 and..,1: Writes to GTZC1_MPCBB2_SECCFGR30 and.."
newline
bitfld.long 0x0 29. "SPLCK29,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR29 and..,1: Writes to GTZC1_MPCBB2_SECCFGR29 and.."
newline
bitfld.long 0x0 28. "SPLCK28,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR28 and..,1: Writes to GTZC1_MPCBB2_SECCFGR28 and.."
newline
bitfld.long 0x0 27. "SPLCK27,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR27 and..,1: Writes to GTZC1_MPCBB2_SECCFGR27 and.."
newline
bitfld.long 0x0 26. "SPLCK26,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR26 and..,1: Writes to GTZC1_MPCBB2_SECCFGR26 and.."
newline
bitfld.long 0x0 25. "SPLCK25,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR25 and..,1: Writes to GTZC1_MPCBB2_SECCFGR25 and.."
newline
bitfld.long 0x0 24. "SPLCK24,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR24 and..,1: Writes to GTZC1_MPCBB2_SECCFGR24 and.."
newline
bitfld.long 0x0 23. "SPLCK23,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR23 and..,1: Writes to GTZC1_MPCBB2_SECCFGR23 and.."
newline
bitfld.long 0x0 22. "SPLCK22,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR22 and..,1: Writes to GTZC1_MPCBB2_SECCFGR22 and.."
newline
bitfld.long 0x0 21. "SPLCK21,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR21 and..,1: Writes to GTZC1_MPCBB2_SECCFGR21 and.."
newline
bitfld.long 0x0 20. "SPLCK20,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR20 and..,1: Writes to GTZC1_MPCBB2_SECCFGR20 and.."
newline
bitfld.long 0x0 19. "SPLCK19,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR19 and..,1: Writes to GTZC1_MPCBB2_SECCFGR19 and.."
newline
bitfld.long 0x0 18. "SPLCK18,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR18 and..,1: Writes to GTZC1_MPCBB2_SECCFGR18 and.."
newline
bitfld.long 0x0 17. "SPLCK17,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR17 and..,1: Writes to GTZC1_MPCBB2_SECCFGR17 and.."
newline
bitfld.long 0x0 16. "SPLCK16,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR16 and..,1: Writes to GTZC1_MPCBB2_SECCFGR16 and.."
newline
bitfld.long 0x0 15. "SPLCK15,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR15 and..,1: Writes to GTZC1_MPCBB2_SECCFGR15 and.."
newline
bitfld.long 0x0 14. "SPLCK14,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR14 and..,1: Writes to GTZC1_MPCBB2_SECCFGR14 and.."
newline
bitfld.long 0x0 13. "SPLCK13,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR13 and..,1: Writes to GTZC1_MPCBB2_SECCFGR13 and.."
newline
bitfld.long 0x0 12. "SPLCK12,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR12 and..,1: Writes to GTZC1_MPCBB2_SECCFGR12 and.."
newline
bitfld.long 0x0 11. "SPLCK11,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR11 and..,1: Writes to GTZC1_MPCBB2_SECCFGR11 and.."
newline
bitfld.long 0x0 10. "SPLCK10,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR10 and..,1: Writes to GTZC1_MPCBB2_SECCFGR10 and.."
newline
bitfld.long 0x0 9. "SPLCK9,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR9 and GTZC1_MPCBB2_PRIVCFGR9..,1: Writes to GTZC1_MPCBB2_SECCFGR9 and.."
newline
bitfld.long 0x0 8. "SPLCK8,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR8 and GTZC1_MPCBB2_PRIVCFGR8..,1: Writes to GTZC1_MPCBB2_SECCFGR8 and.."
newline
bitfld.long 0x0 7. "SPLCK7,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR7 and GTZC1_MPCBB2_PRIVCFGR7..,1: Writes to GTZC1_MPCBB2_SECCFGR7 and.."
newline
bitfld.long 0x0 6. "SPLCK6,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR6 and GTZC1_MPCBB2_PRIVCFGR6..,1: Writes to GTZC1_MPCBB2_SECCFGR6 and.."
newline
bitfld.long 0x0 5. "SPLCK5,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR5 and GTZC1_MPCBB2_PRIVCFGR5..,1: Writes to GTZC1_MPCBB2_SECCFGR5 and.."
newline
bitfld.long 0x0 4. "SPLCK4,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR4 and GTZC1_MPCBB2_PRIVCFGR4..,1: Writes to GTZC1_MPCBB2_SECCFGR4 and.."
newline
bitfld.long 0x0 3. "SPLCK3,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR3 and GTZC1_MPCBB2_PRIVCFGR3..,1: Writes to GTZC1_MPCBB2_SECCFGR3 and.."
newline
bitfld.long 0x0 2. "SPLCK2,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR2 and GTZC1_MPCBB2_PRIVCFGR2..,1: Writes to GTZC1_MPCBB2_SECCFGR2 and.."
newline
bitfld.long 0x0 1. "SPLCK1,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR1 and GTZC1_MPCBB2_PRIVCFGR1..,1: Writes to GTZC1_MPCBB2_SECCFGR1 and.."
newline
bitfld.long 0x0 0. "SPLCK0,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR0 and GTZC1_MPCBB2_PRIVCFGR0..,1: Writes to GTZC1_MPCBB2_SECCFGR0 and.."
group.long 0x100++0x7F
line.long 0x0 "GTZC1_MPCBB2_SECCFGR0,GTZC1 SRAM2 MPCBB security configuration for super-block 0 register"
bitfld.long 0x0 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x0 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x0 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x0 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x0 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x0 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x0 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x0 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x0 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x0 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x0 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x0 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x0 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x0 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x0 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x0 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x0 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x0 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x0 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x0 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x0 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x0 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x0 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x0 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x0 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x0 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x0 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x0 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x0 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x0 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x0 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x0 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x4 "GTZC1_MPCBB2_SECCFGR1,GTZC1 SRAM2 MPCBB security configuration for super-block 1 register"
bitfld.long 0x4 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x4 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x4 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x4 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x4 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x4 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x4 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x4 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x4 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x4 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x4 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x4 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x4 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x4 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x4 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x4 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x4 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x4 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x4 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x4 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x4 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x4 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x4 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x4 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x4 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x4 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x4 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x4 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x4 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x4 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x4 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x4 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x8 "GTZC1_MPCBB2_SECCFGR2,GTZC1 SRAM2 MPCBB security configuration for super-block 2 register"
bitfld.long 0x8 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x8 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x8 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x8 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x8 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x8 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x8 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x8 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x8 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x8 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x8 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x8 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x8 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x8 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x8 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x8 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x8 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x8 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x8 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x8 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x8 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x8 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x8 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x8 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x8 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x8 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x8 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x8 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x8 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x8 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x8 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x8 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0xC "GTZC1_MPCBB2_SECCFGR3,GTZC1 SRAM2 MPCBB security configuration for super-block 3 register"
bitfld.long 0xC 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0xC 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0xC 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0xC 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0xC 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0xC 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0xC 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0xC 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0xC 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0xC 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0xC 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0xC 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0xC 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0xC 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0xC 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0xC 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0xC 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0xC 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0xC 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0xC 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0xC 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0xC 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0xC 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0xC 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0xC 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0xC 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0xC 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0xC 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0xC 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0xC 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0xC 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0xC 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x10 "GTZC1_MPCBB2_SECCFGR4,GTZC1 SRAM2 MPCBB security configuration for super-block 4 register"
bitfld.long 0x10 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x10 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x10 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x10 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x10 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x10 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x10 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x10 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x10 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x10 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x10 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x10 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x10 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x10 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x10 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x10 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x10 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x10 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x10 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x10 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x10 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x10 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x10 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x10 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x10 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x10 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x10 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x10 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x10 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x10 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x10 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x10 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x14 "GTZC1_MPCBB2_SECCFGR5,GTZC1 SRAM2 MPCBB security configuration for super-block 5 register"
bitfld.long 0x14 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x14 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x14 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x14 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x14 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x14 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x14 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x14 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x14 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x14 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x14 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x14 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x14 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x14 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x14 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x14 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x14 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x14 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x14 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x14 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x14 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x14 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x14 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x14 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x14 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x14 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x14 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x14 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x14 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x14 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x14 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x14 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x18 "GTZC1_MPCBB2_SECCFGR6,GTZC1 SRAM2 MPCBB security configuration for super-block 6 register"
bitfld.long 0x18 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x18 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x18 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x18 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x18 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x18 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x18 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x18 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x18 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x18 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x18 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x18 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x18 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x18 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x18 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x18 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x18 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x18 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x18 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x18 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x18 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x18 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x18 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x18 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x18 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x18 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x18 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x18 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x18 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x18 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x18 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x18 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x1C "GTZC1_MPCBB2_SECCFGR7,GTZC1 SRAM2 MPCBB security configuration for super-block 7 register"
bitfld.long 0x1C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x1C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x1C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x1C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x1C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x1C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x1C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x1C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x1C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x1C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x1C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x1C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x1C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x1C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x1C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x1C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x1C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x1C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x1C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x1C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x1C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x1C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x1C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x1C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x1C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x1C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x1C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x1C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x1C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x1C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x1C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x1C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x20 "GTZC1_MPCBB2_SECCFGR8,GTZC1 SRAM2 MPCBB security configuration for super-block 8 register"
bitfld.long 0x20 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x20 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x20 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x20 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x20 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x20 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x20 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x20 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x20 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x20 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x20 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x20 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x20 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x20 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x20 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x20 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x20 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x20 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x20 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x20 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x20 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x20 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x20 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x20 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x20 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x20 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x20 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x20 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x20 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x20 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x20 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x20 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x24 "GTZC1_MPCBB2_SECCFGR9,GTZC1 SRAM2 MPCBB security configuration for super-block 9 register"
bitfld.long 0x24 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x24 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x24 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x24 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x24 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x24 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x24 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x24 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x24 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x24 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x24 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x24 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x24 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x24 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x24 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x24 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x24 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x24 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x24 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x24 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x24 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x24 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x24 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x24 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x24 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x24 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x24 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x24 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x24 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x24 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x24 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x24 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x28 "GTZC1_MPCBB2_SECCFGR10,GTZC1 SRAM2 MPCBB security configuration for super-block 10 register"
bitfld.long 0x28 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x28 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x28 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x28 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x28 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x28 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x28 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x28 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x28 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x28 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x28 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x28 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x28 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x28 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x28 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x28 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x28 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x28 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x28 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x28 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x28 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x28 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x28 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x28 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x28 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x28 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x28 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x28 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x28 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x28 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x28 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x28 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x2C "GTZC1_MPCBB2_SECCFGR11,GTZC1 SRAM2 MPCBB security configuration for super-block 11 register"
bitfld.long 0x2C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x2C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x2C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x2C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x2C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x2C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x2C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x2C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x2C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x2C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x2C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x2C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x2C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x2C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x2C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x2C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x2C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x2C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x2C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x2C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x2C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x2C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x2C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x2C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x2C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x2C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x2C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x2C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x2C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x2C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x2C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x2C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x30 "GTZC1_MPCBB2_SECCFGR12,GTZC1 SRAM2 MPCBB security configuration for super-block 12 register"
bitfld.long 0x30 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x30 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x30 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x30 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x30 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x30 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x30 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x30 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x30 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x30 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x30 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x30 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x30 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x30 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x30 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x30 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x30 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x30 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x30 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x30 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x30 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x30 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x30 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x30 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x30 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x30 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x30 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x30 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x30 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x30 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x30 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x30 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x34 "GTZC1_MPCBB2_SECCFGR13,GTZC1 SRAM2 MPCBB security configuration for super-block 13 register"
bitfld.long 0x34 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x34 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x34 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x34 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x34 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x34 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x34 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x34 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x34 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x34 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x34 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x34 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x34 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x34 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x34 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x34 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x34 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x34 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x34 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x34 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x34 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x34 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x34 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x34 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x34 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x34 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x34 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x34 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x34 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x34 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x34 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x34 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x38 "GTZC1_MPCBB2_SECCFGR14,GTZC1 SRAM2 MPCBB security configuration for super-block 14 register"
bitfld.long 0x38 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x38 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x38 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x38 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x38 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x38 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x38 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x38 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x38 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x38 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x38 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x38 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x38 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x38 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x38 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x38 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x38 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x38 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x38 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x38 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x38 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x38 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x38 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x38 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x38 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x38 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x38 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x38 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x38 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x38 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x38 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x38 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x3C "GTZC1_MPCBB2_SECCFGR15,GTZC1 SRAM2 MPCBB security configuration for super-block 15 register"
bitfld.long 0x3C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x3C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x3C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x3C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x3C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x3C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x3C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x3C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x3C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x3C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x3C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x3C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x3C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x3C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x3C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x3C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x3C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x3C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x3C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x3C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x3C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x3C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x3C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x3C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x3C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x3C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x3C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x3C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x3C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x3C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x3C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x3C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x40 "GTZC1_MPCBB2_SECCFGR16,GTZC1 SRAM2 MPCBB security configuration for super-block 16 register"
bitfld.long 0x40 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x40 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x40 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x40 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x40 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x40 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x40 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x40 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x40 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x40 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x40 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x40 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x40 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x40 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x40 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x40 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x40 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x40 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x40 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x40 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x40 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x40 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x40 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x40 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x40 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x40 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x40 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x40 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x40 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x40 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x40 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x40 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x44 "GTZC1_MPCBB2_SECCFGR17,GTZC1 SRAM2 MPCBB security configuration for super-block 17 register"
bitfld.long 0x44 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x44 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x44 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x44 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x44 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x44 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x44 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x44 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x44 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x44 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x44 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x44 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x44 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x44 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x44 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x44 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x44 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x44 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x44 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x44 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x44 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x44 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x44 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x44 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x44 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x44 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x44 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x44 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x44 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x44 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x44 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x44 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x48 "GTZC1_MPCBB2_SECCFGR18,GTZC1 SRAM2 MPCBB security configuration for super-block 18 register"
bitfld.long 0x48 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x48 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x48 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x48 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x48 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x48 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x48 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x48 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x48 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x48 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x48 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x48 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x48 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x48 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x48 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x48 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x48 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x48 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x48 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x48 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x48 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x48 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x48 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x48 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x48 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x48 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x48 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x48 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x48 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x48 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x48 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x48 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x4C "GTZC1_MPCBB2_SECCFGR19,GTZC1 SRAM2 MPCBB security configuration for super-block 19 register"
bitfld.long 0x4C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x4C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x4C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x4C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x4C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x4C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x4C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x4C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x4C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x4C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x4C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x4C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x4C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x4C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x4C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x4C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x4C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x4C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x4C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x4C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x4C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x4C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x4C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x4C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x4C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x4C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x4C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x4C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x4C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x4C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x4C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x4C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x50 "GTZC1_MPCBB2_SECCFGR20,GTZC1 SRAM2 MPCBB security configuration for super-block 20 register"
bitfld.long 0x50 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x50 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x50 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x50 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x50 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x50 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x50 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x50 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x50 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x50 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x50 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x50 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x50 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x50 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x50 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x50 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x50 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x50 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x50 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x50 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x50 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x50 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x50 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x50 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x50 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x50 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x50 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x50 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x50 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x50 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x50 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x50 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x54 "GTZC1_MPCBB2_SECCFGR21,GTZC1 SRAM2 MPCBB security configuration for super-block 21 register"
bitfld.long 0x54 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x54 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x54 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x54 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x54 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x54 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x54 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x54 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x54 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x54 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x54 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x54 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x54 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x54 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x54 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x54 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x54 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x54 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x54 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x54 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x54 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x54 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x54 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x54 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x54 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x54 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x54 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x54 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x54 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x54 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x54 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x54 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x58 "GTZC1_MPCBB2_SECCFGR22,GTZC1 SRAM2 MPCBB security configuration for super-block 22 register"
bitfld.long 0x58 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x58 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x58 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x58 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x58 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x58 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x58 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x58 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x58 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x58 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x58 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x58 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x58 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x58 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x58 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x58 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x58 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x58 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x58 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x58 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x58 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x58 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x58 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x58 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x58 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x58 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x58 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x58 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x58 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x58 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x58 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x58 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x5C "GTZC1_MPCBB2_SECCFGR23,GTZC1 SRAM2 MPCBB security configuration for super-block 23 register"
bitfld.long 0x5C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x5C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x5C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x5C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x5C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x5C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x5C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x5C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x5C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x5C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x5C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x5C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x5C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x5C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x5C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x5C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x5C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x5C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x5C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x5C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x5C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x5C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x5C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x5C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x5C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x5C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x5C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x5C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x5C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x5C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x5C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x5C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x60 "GTZC1_MPCBB2_SECCFGR24,GTZC1 SRAM2 MPCBB security configuration for super-block 24 register"
bitfld.long 0x60 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x60 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x60 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x60 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x60 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x60 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x60 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x60 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x60 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x60 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x60 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x60 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x60 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x60 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x60 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x60 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x60 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x60 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x60 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x60 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x60 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x60 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x60 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x60 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x60 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x60 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x60 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x60 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x60 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x60 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x60 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x60 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x64 "GTZC1_MPCBB2_SECCFGR25,GTZC1 SRAM2 MPCBB security configuration for super-block 25 register"
bitfld.long 0x64 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x64 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x64 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x64 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x64 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x64 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x64 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x64 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x64 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x64 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x64 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x64 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x64 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x64 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x64 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x64 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x64 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x64 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x64 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x64 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x64 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x64 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x64 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x64 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x64 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x64 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x64 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x64 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x64 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x64 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x64 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x64 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x68 "GTZC1_MPCBB2_SECCFGR26,GTZC1 SRAM2 MPCBB security configuration for super-block 26 register"
bitfld.long 0x68 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x68 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x68 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x68 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x68 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x68 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x68 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x68 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x68 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x68 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x68 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x68 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x68 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x68 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x68 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x68 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x68 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x68 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x68 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x68 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x68 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x68 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x68 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x68 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x68 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x68 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x68 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x68 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x68 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x68 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x68 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x68 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x6C "GTZC1_MPCBB2_SECCFGR27,GTZC1 SRAM2 MPCBB security configuration for super-block 27 register"
bitfld.long 0x6C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x6C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x6C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x6C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x6C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x6C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x6C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x6C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x6C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x6C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x6C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x6C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x6C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x6C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x6C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x6C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x6C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x6C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x6C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x6C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x6C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x6C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x6C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x6C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x6C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x6C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x6C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x6C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x6C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x6C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x6C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x6C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x70 "GTZC1_MPCBB2_SECCFGR28,GTZC1 SRAM2 MPCBB security configuration for super-block 28 register"
bitfld.long 0x70 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x70 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x70 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x70 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x70 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x70 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x70 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x70 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x70 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x70 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x70 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x70 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x70 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x70 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x70 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x70 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x70 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x70 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x70 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x70 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x70 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x70 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x70 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x70 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x70 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x70 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x70 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x70 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x70 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x70 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x70 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x70 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x74 "GTZC1_MPCBB2_SECCFGR29,GTZC1 SRAM2 MPCBB security configuration for super-block 29 register"
bitfld.long 0x74 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x74 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x74 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x74 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x74 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x74 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x74 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x74 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x74 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x74 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x74 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x74 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x74 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x74 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x74 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x74 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x74 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x74 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x74 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x74 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x74 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x74 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x74 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x74 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x74 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x74 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x74 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x74 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x74 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x74 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x74 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x74 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x78 "GTZC1_MPCBB2_SECCFGR30,GTZC1 SRAM2 MPCBB security configuration for super-block 30 register"
bitfld.long 0x78 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x78 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x78 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x78 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x78 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x78 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x78 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x78 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x78 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x78 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x78 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x78 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x78 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x78 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x78 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x78 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x78 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x78 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x78 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x78 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x78 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x78 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x78 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x78 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x78 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x78 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x78 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x78 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x78 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x78 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x78 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x78 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x7C "GTZC1_MPCBB2_SECCFGR31,GTZC1 SRAM2 MPCBB security configuration for super-block 31 register"
bitfld.long 0x7C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x7C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x7C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x7C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x7C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x7C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x7C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x7C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x7C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x7C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x7C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x7C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x7C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x7C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x7C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x7C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x7C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x7C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x7C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x7C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x7C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x7C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x7C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x7C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x7C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x7C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x7C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x7C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x7C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x7C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x7C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x7C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 0,1: Secure access only to block 0"
group.long 0x200++0x7F
line.long 0x0 "GTZC1_MPCBB2_PRIVCFGR0,GTZC1 SRAM2 MPCBB privileged configuration for super-block 0 register"
bitfld.long 0x0 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x0 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x0 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x0 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x0 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x0 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x0 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x0 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x0 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x0 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x0 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x0 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x0 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x0 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x0 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x0 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x0 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x0 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x0 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x0 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x0 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x0 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x0 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x0 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x0 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x0 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x0 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x0 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x0 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x0 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x0 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x0 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x4 "GTZC1_MPCBB2_PRIVCFGR1,GTZC1 SRAM2 MPCBB privileged configuration for super-block 1 register"
bitfld.long 0x4 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x4 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x4 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x4 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x4 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x4 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x4 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x4 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x4 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x4 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x4 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x4 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x4 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x4 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x4 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x4 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x4 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x4 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x4 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x4 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x4 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x4 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x4 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x4 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x4 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x4 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x4 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x4 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x4 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x4 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x4 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x4 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x8 "GTZC1_MPCBB2_PRIVCFGR2,GTZC1 SRAM2 MPCBB privileged configuration for super-block 2 register"
bitfld.long 0x8 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x8 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x8 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x8 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x8 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x8 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x8 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x8 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x8 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x8 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x8 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x8 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x8 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x8 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x8 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x8 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x8 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x8 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x8 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x8 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x8 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x8 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x8 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x8 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x8 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x8 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x8 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x8 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x8 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x8 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x8 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x8 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0xC "GTZC1_MPCBB2_PRIVCFGR3,GTZC1 SRAM2 MPCBB privileged configuration for super-block 3 register"
bitfld.long 0xC 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0xC 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0xC 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0xC 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0xC 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0xC 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0xC 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0xC 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0xC 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0xC 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0xC 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0xC 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0xC 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0xC 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0xC 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0xC 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0xC 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0xC 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0xC 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0xC 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0xC 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0xC 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0xC 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0xC 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0xC 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0xC 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0xC 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0xC 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0xC 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0xC 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0xC 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0xC 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x10 "GTZC1_MPCBB2_PRIVCFGR4,GTZC1 SRAM2 MPCBB privileged configuration for super-block 4 register"
bitfld.long 0x10 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x10 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x10 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x10 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x10 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x10 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x10 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x10 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x10 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x10 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x10 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x10 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x10 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x10 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x10 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x10 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x10 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x10 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x10 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x10 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x10 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x10 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x10 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x10 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x10 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x10 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x10 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x10 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x10 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x10 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x10 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x10 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x14 "GTZC1_MPCBB2_PRIVCFGR5,GTZC1 SRAM2 MPCBB privileged configuration for super-block 5 register"
bitfld.long 0x14 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x14 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x14 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x14 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x14 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x14 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x14 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x14 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x14 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x14 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x14 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x14 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x14 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x14 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x14 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x14 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x14 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x14 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x14 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x14 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x14 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x14 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x14 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x14 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x14 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x14 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x14 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x14 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x14 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x14 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x14 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x14 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x18 "GTZC1_MPCBB2_PRIVCFGR6,GTZC1 SRAM2 MPCBB privileged configuration for super-block 6 register"
bitfld.long 0x18 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x18 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x18 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x18 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x18 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x18 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x18 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x18 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x18 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x18 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x18 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x18 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x18 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x18 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x18 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x18 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x18 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x18 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x18 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x18 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x18 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x18 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x18 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x18 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x18 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x18 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x18 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x18 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x18 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x18 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x18 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x18 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x1C "GTZC1_MPCBB2_PRIVCFGR7,GTZC1 SRAM2 MPCBB privileged configuration for super-block 7 register"
bitfld.long 0x1C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x1C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x1C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x1C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x1C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x1C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x1C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x1C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x1C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x1C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x1C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x1C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x1C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x1C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x1C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x1C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x1C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x1C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x1C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x1C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x1C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x1C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x1C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x1C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x1C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x1C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x1C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x1C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x1C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x1C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x1C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x1C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x20 "GTZC1_MPCBB2_PRIVCFGR8,GTZC1 SRAM2 MPCBB privileged configuration for super-block 8 register"
bitfld.long 0x20 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x20 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x20 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x20 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x20 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x20 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x20 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x20 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x20 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x20 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x20 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x20 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x20 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x20 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x20 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x20 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x20 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x20 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x20 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x20 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x20 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x20 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x20 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x20 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x20 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x20 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x20 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x20 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x20 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x20 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x20 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x20 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x24 "GTZC1_MPCBB2_PRIVCFGR9,GTZC1 SRAM2 MPCBB privileged configuration for super-block 9 register"
bitfld.long 0x24 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x24 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x24 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x24 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x24 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x24 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x24 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x24 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x24 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x24 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x24 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x24 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x24 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x24 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x24 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x24 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x24 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x24 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x24 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x24 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x24 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x24 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x24 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x24 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x24 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x24 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x24 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x24 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x24 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x24 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x24 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x24 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x28 "GTZC1_MPCBB2_PRIVCFGR10,GTZC1 SRAM2 MPCBB privileged configuration for super-block 10 register"
bitfld.long 0x28 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x28 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x28 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x28 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x28 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x28 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x28 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x28 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x28 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x28 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x28 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x28 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x28 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x28 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x28 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x28 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x28 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x28 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x28 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x28 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x28 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x28 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x28 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x28 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x28 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x28 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x28 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x28 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x28 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x28 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x28 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x28 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x2C "GTZC1_MPCBB2_PRIVCFGR11,GTZC1 SRAM2 MPCBB privileged configuration for super-block 11 register"
bitfld.long 0x2C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x2C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x2C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x2C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x2C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x2C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x2C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x2C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x2C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x2C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x2C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x2C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x2C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x2C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x2C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x2C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x2C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x2C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x2C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x2C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x2C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x2C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x2C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x2C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x2C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x2C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x2C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x2C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x2C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x2C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x2C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x2C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x30 "GTZC1_MPCBB2_PRIVCFGR12,GTZC1 SRAM2 MPCBB privileged configuration for super-block 12 register"
bitfld.long 0x30 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x30 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x30 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x30 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x30 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x30 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x30 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x30 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x30 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x30 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x30 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x30 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x30 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x30 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x30 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x30 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x30 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x30 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x30 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x30 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x30 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x30 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x30 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x30 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x30 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x30 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x30 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x30 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x30 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x30 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x30 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x30 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x34 "GTZC1_MPCBB2_PRIVCFGR13,GTZC1 SRAM2 MPCBB privileged configuration for super-block 13 register"
bitfld.long 0x34 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x34 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x34 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x34 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x34 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x34 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x34 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x34 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x34 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x34 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x34 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x34 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x34 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x34 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x34 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x34 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x34 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x34 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x34 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x34 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x34 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x34 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x34 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x34 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x34 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x34 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x34 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x34 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x34 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x34 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x34 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x34 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x38 "GTZC1_MPCBB2_PRIVCFGR14,GTZC1 SRAM2 MPCBB privileged configuration for super-block 14 register"
bitfld.long 0x38 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x38 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x38 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x38 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x38 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x38 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x38 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x38 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x38 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x38 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x38 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x38 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x38 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x38 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x38 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x38 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x38 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x38 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x38 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x38 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x38 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x38 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x38 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x38 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x38 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x38 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x38 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x38 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x38 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x38 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x38 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x38 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x3C "GTZC1_MPCBB2_PRIVCFGR15,GTZC1 SRAM2 MPCBB privileged configuration for super-block 15 register"
bitfld.long 0x3C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x3C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x3C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x3C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x3C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x3C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x3C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x3C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x3C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x3C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x3C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x3C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x3C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x3C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x3C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x3C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x3C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x3C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x3C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x3C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x3C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x3C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x3C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x3C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x3C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x3C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x3C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x3C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x3C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x3C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x3C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x3C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x40 "GTZC1_MPCBB2_PRIVCFGR16,GTZC1 SRAM2 MPCBB privileged configuration for super-block 16 register"
bitfld.long 0x40 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x40 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x40 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x40 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x40 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x40 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x40 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x40 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x40 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x40 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x40 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x40 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x40 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x40 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x40 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x40 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x40 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x40 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x40 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x40 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x40 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x40 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x40 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x40 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x40 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x40 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x40 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x40 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x40 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x40 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x40 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x40 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x44 "GTZC1_MPCBB2_PRIVCFGR17,GTZC1 SRAM2 MPCBB privileged configuration for super-block 17 register"
bitfld.long 0x44 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x44 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x44 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x44 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x44 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x44 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x44 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x44 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x44 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x44 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x44 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x44 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x44 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x44 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x44 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x44 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x44 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x44 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x44 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x44 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x44 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x44 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x44 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x44 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x44 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x44 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x44 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x44 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x44 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x44 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x44 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x44 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x48 "GTZC1_MPCBB2_PRIVCFGR18,GTZC1 SRAM2 MPCBB privileged configuration for super-block 18 register"
bitfld.long 0x48 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x48 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x48 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x48 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x48 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x48 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x48 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x48 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x48 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x48 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x48 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x48 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x48 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x48 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x48 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x48 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x48 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x48 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x48 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x48 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x48 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x48 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x48 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x48 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x48 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x48 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x48 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x48 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x48 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x48 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x48 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x48 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x4C "GTZC1_MPCBB2_PRIVCFGR19,GTZC1 SRAM2 MPCBB privileged configuration for super-block 19 register"
bitfld.long 0x4C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x4C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x4C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x4C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x4C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x4C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x4C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x4C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x4C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x4C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x4C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x4C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x4C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x4C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x4C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x4C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x4C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x4C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x4C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x4C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x4C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x4C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x4C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x4C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x4C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x4C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x4C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x4C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x4C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x4C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x4C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x4C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x50 "GTZC1_MPCBB2_PRIVCFGR20,GTZC1 SRAM2 MPCBB privileged configuration for super-block 20 register"
bitfld.long 0x50 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x50 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x50 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x50 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x50 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x50 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x50 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x50 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x50 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x50 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x50 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x50 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x50 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x50 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x50 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x50 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x50 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x50 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x50 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x50 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x50 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x50 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x50 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x50 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x50 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x50 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x50 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x50 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x50 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x50 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x50 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x50 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x54 "GTZC1_MPCBB2_PRIVCFGR21,GTZC1 SRAM2 MPCBB privileged configuration for super-block 21 register"
bitfld.long 0x54 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x54 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x54 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x54 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x54 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x54 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x54 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x54 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x54 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x54 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x54 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x54 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x54 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x54 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x54 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x54 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x54 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x54 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x54 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x54 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x54 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x54 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x54 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x54 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x54 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x54 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x54 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x54 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x54 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x54 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x54 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x54 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x58 "GTZC1_MPCBB2_PRIVCFGR22,GTZC1 SRAM2 MPCBB privileged configuration for super-block 22 register"
bitfld.long 0x58 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x58 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x58 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x58 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x58 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x58 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x58 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x58 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x58 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x58 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x58 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x58 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x58 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x58 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x58 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x58 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x58 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x58 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x58 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x58 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x58 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x58 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x58 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x58 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x58 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x58 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x58 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x58 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x58 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x58 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x58 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x58 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x5C "GTZC1_MPCBB2_PRIVCFGR23,GTZC1 SRAM2 MPCBB privileged configuration for super-block 23 register"
bitfld.long 0x5C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x5C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x5C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x5C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x5C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x5C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x5C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x5C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x5C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x5C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x5C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x5C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x5C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x5C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x5C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x5C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x5C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x5C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x5C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x5C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x5C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x5C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x5C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x5C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x5C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x5C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x5C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x5C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x5C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x5C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x5C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x5C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x60 "GTZC1_MPCBB2_PRIVCFGR24,GTZC1 SRAM2 MPCBB privileged configuration for super-block 24 register"
bitfld.long 0x60 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x60 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x60 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x60 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x60 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x60 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x60 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x60 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x60 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x60 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x60 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x60 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x60 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x60 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x60 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x60 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x60 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x60 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x60 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x60 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x60 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x60 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x60 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x60 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x60 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x60 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x60 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x60 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x60 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x60 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x60 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x60 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x64 "GTZC1_MPCBB2_PRIVCFGR25,GTZC1 SRAM2 MPCBB privileged configuration for super-block 25 register"
bitfld.long 0x64 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x64 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x64 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x64 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x64 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x64 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x64 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x64 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x64 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x64 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x64 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x64 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x64 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x64 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x64 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x64 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x64 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x64 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x64 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x64 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x64 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x64 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x64 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x64 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x64 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x64 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x64 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x64 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x64 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x64 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x64 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x64 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x68 "GTZC1_MPCBB2_PRIVCFGR26,GTZC1 SRAM2 MPCBB privileged configuration for super-block 26 register"
bitfld.long 0x68 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x68 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x68 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x68 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x68 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x68 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x68 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x68 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x68 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x68 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x68 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x68 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x68 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x68 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x68 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x68 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x68 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x68 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x68 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x68 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x68 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x68 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x68 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x68 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x68 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x68 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x68 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x68 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x68 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x68 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x68 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x68 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x6C "GTZC1_MPCBB2_PRIVCFGR27,GTZC1 SRAM2 MPCBB privileged configuration for super-block 27 register"
bitfld.long 0x6C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x6C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x6C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x6C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x6C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x6C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x6C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x6C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x6C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x6C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x6C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x6C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x6C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x6C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x6C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x6C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x6C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x6C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x6C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x6C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x6C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x6C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x6C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x6C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x6C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x6C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x6C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x6C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x6C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x6C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x6C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x6C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x70 "GTZC1_MPCBB2_PRIVCFGR28,GTZC1 SRAM2 MPCBB privileged configuration for super-block 28 register"
bitfld.long 0x70 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x70 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x70 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x70 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x70 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x70 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x70 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x70 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x70 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x70 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x70 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x70 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x70 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x70 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x70 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x70 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x70 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x70 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x70 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x70 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x70 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x70 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x70 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x70 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x70 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x70 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x70 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x70 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x70 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x70 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x70 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x70 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x74 "GTZC1_MPCBB2_PRIVCFGR29,GTZC1 SRAM2 MPCBB privileged configuration for super-block 29 register"
bitfld.long 0x74 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x74 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x74 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x74 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x74 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x74 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x74 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x74 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x74 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x74 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x74 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x74 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x74 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x74 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x74 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x74 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x74 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x74 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x74 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x74 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x74 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x74 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x74 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x74 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x74 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x74 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x74 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x74 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x74 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x74 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x74 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x74 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x78 "GTZC1_MPCBB2_PRIVCFGR30,GTZC1 SRAM2 MPCBB privileged configuration for super-block 30 register"
bitfld.long 0x78 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x78 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x78 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x78 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x78 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x78 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x78 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x78 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x78 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x78 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x78 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x78 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x78 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x78 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x78 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x78 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x78 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x78 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x78 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x78 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x78 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x78 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x78 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x78 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x78 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x78 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x78 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x78 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x78 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x78 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x78 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x78 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x7C "GTZC1_MPCBB2_PRIVCFGR31,GTZC1 SRAM2 MPCBB privileged configuration for super-block 31 register"
bitfld.long 0x7C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x7C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x7C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x7C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x7C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x7C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x7C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x7C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x7C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x7C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x7C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x7C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x7C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x7C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x7C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x7C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x7C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x7C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x7C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x7C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x7C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x7C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x7C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x7C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x7C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x7C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x7C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x7C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x7C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x7C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x7C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x7C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
tree.end
tree "SEC_GTZC1_MPCBB2"
base ad:0x50033000
group.long 0x0++0x3
line.long 0x0 "GTZC1_MPCBB2_CR,GTZC1 SRAM2 MPCBB control register"
bitfld.long 0x0 31. "SRWILADIS,This bit disables the detection of an illegal access when a secure read/write transaction access a non-secure blocks of the block-based SRAM (secure fetch on non-secure block is always considered illegal)." "0: enabled,1: disabled"
newline
bitfld.long 0x0 30. "INVSECSTATE,This bit is used to define the internal SRAMs clocks control in RCC as secure or not." "0: SRAMs clocks are secure if a secure area exists..,1: SRAMs clocks are non-secure even if a secure.."
newline
bitfld.long 0x0 0. "GLOCK,This bit is cleared by default and once set it can not be reset until system reset." "0: control register not locked,1: control register locked"
group.long 0x10++0x3
line.long 0x0 "GTZC1_MPCBB2_CFGLOCKR1,GTZC1 SRAM2 MPCBB configuration lock register 1"
bitfld.long 0x0 31. "SPLCK31,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR31 and..,1: Writes to GTZC1_MPCBB2_SECCFGR31 and.."
newline
bitfld.long 0x0 30. "SPLCK30,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR30 and..,1: Writes to GTZC1_MPCBB2_SECCFGR30 and.."
newline
bitfld.long 0x0 29. "SPLCK29,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR29 and..,1: Writes to GTZC1_MPCBB2_SECCFGR29 and.."
newline
bitfld.long 0x0 28. "SPLCK28,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR28 and..,1: Writes to GTZC1_MPCBB2_SECCFGR28 and.."
newline
bitfld.long 0x0 27. "SPLCK27,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR27 and..,1: Writes to GTZC1_MPCBB2_SECCFGR27 and.."
newline
bitfld.long 0x0 26. "SPLCK26,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR26 and..,1: Writes to GTZC1_MPCBB2_SECCFGR26 and.."
newline
bitfld.long 0x0 25. "SPLCK25,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR25 and..,1: Writes to GTZC1_MPCBB2_SECCFGR25 and.."
newline
bitfld.long 0x0 24. "SPLCK24,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR24 and..,1: Writes to GTZC1_MPCBB2_SECCFGR24 and.."
newline
bitfld.long 0x0 23. "SPLCK23,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR23 and..,1: Writes to GTZC1_MPCBB2_SECCFGR23 and.."
newline
bitfld.long 0x0 22. "SPLCK22,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR22 and..,1: Writes to GTZC1_MPCBB2_SECCFGR22 and.."
newline
bitfld.long 0x0 21. "SPLCK21,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR21 and..,1: Writes to GTZC1_MPCBB2_SECCFGR21 and.."
newline
bitfld.long 0x0 20. "SPLCK20,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR20 and..,1: Writes to GTZC1_MPCBB2_SECCFGR20 and.."
newline
bitfld.long 0x0 19. "SPLCK19,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR19 and..,1: Writes to GTZC1_MPCBB2_SECCFGR19 and.."
newline
bitfld.long 0x0 18. "SPLCK18,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR18 and..,1: Writes to GTZC1_MPCBB2_SECCFGR18 and.."
newline
bitfld.long 0x0 17. "SPLCK17,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR17 and..,1: Writes to GTZC1_MPCBB2_SECCFGR17 and.."
newline
bitfld.long 0x0 16. "SPLCK16,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR16 and..,1: Writes to GTZC1_MPCBB2_SECCFGR16 and.."
newline
bitfld.long 0x0 15. "SPLCK15,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR15 and..,1: Writes to GTZC1_MPCBB2_SECCFGR15 and.."
newline
bitfld.long 0x0 14. "SPLCK14,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR14 and..,1: Writes to GTZC1_MPCBB2_SECCFGR14 and.."
newline
bitfld.long 0x0 13. "SPLCK13,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR13 and..,1: Writes to GTZC1_MPCBB2_SECCFGR13 and.."
newline
bitfld.long 0x0 12. "SPLCK12,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR12 and..,1: Writes to GTZC1_MPCBB2_SECCFGR12 and.."
newline
bitfld.long 0x0 11. "SPLCK11,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR11 and..,1: Writes to GTZC1_MPCBB2_SECCFGR11 and.."
newline
bitfld.long 0x0 10. "SPLCK10,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR10 and..,1: Writes to GTZC1_MPCBB2_SECCFGR10 and.."
newline
bitfld.long 0x0 9. "SPLCK9,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR9 and GTZC1_MPCBB2_PRIVCFGR9..,1: Writes to GTZC1_MPCBB2_SECCFGR9 and.."
newline
bitfld.long 0x0 8. "SPLCK8,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR8 and GTZC1_MPCBB2_PRIVCFGR8..,1: Writes to GTZC1_MPCBB2_SECCFGR8 and.."
newline
bitfld.long 0x0 7. "SPLCK7,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR7 and GTZC1_MPCBB2_PRIVCFGR7..,1: Writes to GTZC1_MPCBB2_SECCFGR7 and.."
newline
bitfld.long 0x0 6. "SPLCK6,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR6 and GTZC1_MPCBB2_PRIVCFGR6..,1: Writes to GTZC1_MPCBB2_SECCFGR6 and.."
newline
bitfld.long 0x0 5. "SPLCK5,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR5 and GTZC1_MPCBB2_PRIVCFGR5..,1: Writes to GTZC1_MPCBB2_SECCFGR5 and.."
newline
bitfld.long 0x0 4. "SPLCK4,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR4 and GTZC1_MPCBB2_PRIVCFGR4..,1: Writes to GTZC1_MPCBB2_SECCFGR4 and.."
newline
bitfld.long 0x0 3. "SPLCK3,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR3 and GTZC1_MPCBB2_PRIVCFGR3..,1: Writes to GTZC1_MPCBB2_SECCFGR3 and.."
newline
bitfld.long 0x0 2. "SPLCK2,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR2 and GTZC1_MPCBB2_PRIVCFGR2..,1: Writes to GTZC1_MPCBB2_SECCFGR2 and.."
newline
bitfld.long 0x0 1. "SPLCK1,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR1 and GTZC1_MPCBB2_PRIVCFGR1..,1: Writes to GTZC1_MPCBB2_SECCFGR1 and.."
newline
bitfld.long 0x0 0. "SPLCK0,This bit is set by software and can be cleared only by system reset." "0: GTZC1_MPCBB2_SECCFGR0 and GTZC1_MPCBB2_PRIVCFGR0..,1: Writes to GTZC1_MPCBB2_SECCFGR0 and.."
group.long 0x100++0x7F
line.long 0x0 "GTZC1_MPCBB2_SECCFGR0,GTZC1 SRAM2 MPCBB security configuration for super-block 0 register"
bitfld.long 0x0 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x0 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x0 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x0 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x0 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x0 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x0 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x0 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x0 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x0 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x0 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x0 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x0 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x0 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x0 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x0 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x0 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x0 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x0 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x0 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x0 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x0 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x0 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x0 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x0 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x0 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x0 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x0 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x0 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x0 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x0 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x0 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR0." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x4 "GTZC1_MPCBB2_SECCFGR1,GTZC1 SRAM2 MPCBB security configuration for super-block 1 register"
bitfld.long 0x4 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x4 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x4 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x4 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x4 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x4 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x4 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x4 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x4 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x4 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x4 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x4 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x4 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x4 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x4 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x4 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x4 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x4 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x4 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x4 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x4 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x4 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x4 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x4 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x4 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x4 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x4 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x4 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x4 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x4 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x4 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x4 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR1." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x8 "GTZC1_MPCBB2_SECCFGR2,GTZC1 SRAM2 MPCBB security configuration for super-block 2 register"
bitfld.long 0x8 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x8 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x8 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x8 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x8 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x8 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x8 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x8 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x8 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x8 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x8 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x8 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x8 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x8 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x8 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x8 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x8 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x8 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x8 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x8 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x8 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x8 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x8 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x8 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x8 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x8 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x8 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x8 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x8 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x8 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x8 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x8 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR2." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0xC "GTZC1_MPCBB2_SECCFGR3,GTZC1 SRAM2 MPCBB security configuration for super-block 3 register"
bitfld.long 0xC 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0xC 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0xC 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0xC 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0xC 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0xC 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0xC 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0xC 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0xC 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0xC 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0xC 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0xC 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0xC 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0xC 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0xC 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0xC 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0xC 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0xC 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0xC 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0xC 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0xC 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0xC 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0xC 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0xC 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0xC 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0xC 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0xC 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0xC 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0xC 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0xC 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0xC 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0xC 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR3." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x10 "GTZC1_MPCBB2_SECCFGR4,GTZC1 SRAM2 MPCBB security configuration for super-block 4 register"
bitfld.long 0x10 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x10 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x10 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x10 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x10 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x10 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x10 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x10 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x10 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x10 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x10 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x10 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x10 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x10 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x10 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x10 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x10 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x10 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x10 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x10 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x10 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x10 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x10 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x10 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x10 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x10 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x10 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x10 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x10 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x10 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x10 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x10 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR4." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x14 "GTZC1_MPCBB2_SECCFGR5,GTZC1 SRAM2 MPCBB security configuration for super-block 5 register"
bitfld.long 0x14 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x14 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x14 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x14 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x14 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x14 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x14 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x14 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x14 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x14 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x14 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x14 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x14 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x14 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x14 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x14 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x14 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x14 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x14 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x14 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x14 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x14 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x14 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x14 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x14 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x14 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x14 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x14 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x14 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x14 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x14 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x14 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR5." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x18 "GTZC1_MPCBB2_SECCFGR6,GTZC1 SRAM2 MPCBB security configuration for super-block 6 register"
bitfld.long 0x18 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x18 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x18 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x18 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x18 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x18 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x18 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x18 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x18 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x18 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x18 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x18 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x18 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x18 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x18 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x18 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x18 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x18 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x18 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x18 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x18 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x18 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x18 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x18 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x18 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x18 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x18 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x18 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x18 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x18 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x18 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x18 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR6." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x1C "GTZC1_MPCBB2_SECCFGR7,GTZC1 SRAM2 MPCBB security configuration for super-block 7 register"
bitfld.long 0x1C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x1C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x1C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x1C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x1C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x1C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x1C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x1C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x1C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x1C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x1C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x1C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x1C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x1C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x1C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x1C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x1C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x1C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x1C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x1C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x1C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x1C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x1C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x1C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x1C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x1C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x1C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x1C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x1C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x1C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x1C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x1C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR7." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x20 "GTZC1_MPCBB2_SECCFGR8,GTZC1 SRAM2 MPCBB security configuration for super-block 8 register"
bitfld.long 0x20 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x20 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x20 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x20 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x20 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x20 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x20 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x20 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x20 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x20 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x20 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x20 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x20 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x20 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x20 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x20 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x20 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x20 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x20 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x20 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x20 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x20 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x20 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x20 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x20 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x20 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x20 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x20 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x20 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x20 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x20 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x20 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR8." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x24 "GTZC1_MPCBB2_SECCFGR9,GTZC1 SRAM2 MPCBB security configuration for super-block 9 register"
bitfld.long 0x24 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x24 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x24 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x24 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x24 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x24 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x24 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x24 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x24 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x24 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x24 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x24 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x24 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x24 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x24 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x24 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x24 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x24 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x24 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x24 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x24 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x24 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x24 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x24 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x24 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x24 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x24 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x24 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x24 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x24 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x24 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x24 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR9." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x28 "GTZC1_MPCBB2_SECCFGR10,GTZC1 SRAM2 MPCBB security configuration for super-block 10 register"
bitfld.long 0x28 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x28 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x28 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x28 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x28 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x28 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x28 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x28 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x28 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x28 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x28 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x28 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x28 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x28 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x28 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x28 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x28 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x28 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x28 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x28 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x28 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x28 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x28 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x28 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x28 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x28 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x28 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x28 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x28 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x28 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x28 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x28 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR10." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x2C "GTZC1_MPCBB2_SECCFGR11,GTZC1 SRAM2 MPCBB security configuration for super-block 11 register"
bitfld.long 0x2C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x2C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x2C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x2C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x2C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x2C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x2C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x2C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x2C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x2C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x2C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x2C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x2C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x2C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x2C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x2C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x2C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x2C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x2C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x2C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x2C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x2C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x2C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x2C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x2C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x2C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x2C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x2C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x2C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x2C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x2C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x2C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR11." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x30 "GTZC1_MPCBB2_SECCFGR12,GTZC1 SRAM2 MPCBB security configuration for super-block 12 register"
bitfld.long 0x30 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x30 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x30 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x30 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x30 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x30 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x30 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x30 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x30 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x30 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x30 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x30 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x30 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x30 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x30 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x30 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x30 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x30 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x30 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x30 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x30 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x30 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x30 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x30 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x30 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x30 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x30 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x30 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x30 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x30 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x30 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x30 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR12." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x34 "GTZC1_MPCBB2_SECCFGR13,GTZC1 SRAM2 MPCBB security configuration for super-block 13 register"
bitfld.long 0x34 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x34 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x34 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x34 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x34 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x34 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x34 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x34 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x34 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x34 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x34 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x34 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x34 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x34 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x34 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x34 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x34 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x34 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x34 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x34 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x34 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x34 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x34 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x34 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x34 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x34 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x34 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x34 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x34 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x34 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x34 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x34 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR13." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x38 "GTZC1_MPCBB2_SECCFGR14,GTZC1 SRAM2 MPCBB security configuration for super-block 14 register"
bitfld.long 0x38 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x38 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x38 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x38 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x38 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x38 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x38 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x38 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x38 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x38 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x38 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x38 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x38 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x38 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x38 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x38 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x38 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x38 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x38 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x38 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x38 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x38 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x38 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x38 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x38 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x38 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x38 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x38 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x38 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x38 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x38 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x38 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR14." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x3C "GTZC1_MPCBB2_SECCFGR15,GTZC1 SRAM2 MPCBB security configuration for super-block 15 register"
bitfld.long 0x3C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x3C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x3C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x3C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x3C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x3C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x3C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x3C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x3C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x3C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x3C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x3C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x3C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x3C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x3C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x3C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x3C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x3C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x3C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x3C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x3C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x3C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x3C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x3C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x3C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x3C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x3C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x3C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x3C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x3C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x3C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x3C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR15." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x40 "GTZC1_MPCBB2_SECCFGR16,GTZC1 SRAM2 MPCBB security configuration for super-block 16 register"
bitfld.long 0x40 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x40 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x40 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x40 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x40 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x40 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x40 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x40 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x40 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x40 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x40 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x40 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x40 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x40 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x40 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x40 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x40 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x40 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x40 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x40 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x40 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x40 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x40 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x40 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x40 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x40 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x40 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x40 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x40 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x40 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x40 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x40 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR16." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x44 "GTZC1_MPCBB2_SECCFGR17,GTZC1 SRAM2 MPCBB security configuration for super-block 17 register"
bitfld.long 0x44 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x44 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x44 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x44 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x44 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x44 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x44 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x44 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x44 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x44 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x44 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x44 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x44 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x44 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x44 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x44 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x44 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x44 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x44 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x44 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x44 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x44 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x44 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x44 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x44 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x44 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x44 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x44 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x44 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x44 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x44 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x44 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR17." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x48 "GTZC1_MPCBB2_SECCFGR18,GTZC1 SRAM2 MPCBB security configuration for super-block 18 register"
bitfld.long 0x48 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x48 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x48 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x48 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x48 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x48 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x48 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x48 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x48 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x48 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x48 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x48 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x48 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x48 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x48 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x48 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x48 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x48 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x48 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x48 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x48 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x48 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x48 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x48 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x48 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x48 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x48 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x48 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x48 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x48 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x48 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x48 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR18." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x4C "GTZC1_MPCBB2_SECCFGR19,GTZC1 SRAM2 MPCBB security configuration for super-block 19 register"
bitfld.long 0x4C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x4C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x4C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x4C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x4C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x4C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x4C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x4C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x4C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x4C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x4C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x4C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x4C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x4C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x4C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x4C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x4C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x4C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x4C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x4C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x4C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x4C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x4C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x4C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x4C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x4C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x4C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x4C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x4C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x4C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x4C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x4C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR19." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x50 "GTZC1_MPCBB2_SECCFGR20,GTZC1 SRAM2 MPCBB security configuration for super-block 20 register"
bitfld.long 0x50 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x50 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x50 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x50 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x50 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x50 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x50 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x50 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x50 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x50 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x50 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x50 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x50 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x50 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x50 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x50 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x50 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x50 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x50 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x50 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x50 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x50 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x50 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x50 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x50 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x50 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x50 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x50 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x50 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x50 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x50 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x50 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR20." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x54 "GTZC1_MPCBB2_SECCFGR21,GTZC1 SRAM2 MPCBB security configuration for super-block 21 register"
bitfld.long 0x54 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x54 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x54 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x54 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x54 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x54 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x54 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x54 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x54 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x54 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x54 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x54 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x54 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x54 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x54 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x54 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x54 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x54 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x54 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x54 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x54 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x54 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x54 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x54 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x54 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x54 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x54 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x54 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x54 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x54 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x54 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x54 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR21." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x58 "GTZC1_MPCBB2_SECCFGR22,GTZC1 SRAM2 MPCBB security configuration for super-block 22 register"
bitfld.long 0x58 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x58 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x58 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x58 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x58 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x58 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x58 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x58 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x58 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x58 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x58 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x58 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x58 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x58 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x58 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x58 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x58 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x58 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x58 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x58 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x58 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x58 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x58 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x58 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x58 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x58 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x58 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x58 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x58 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x58 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x58 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x58 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR22." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x5C "GTZC1_MPCBB2_SECCFGR23,GTZC1 SRAM2 MPCBB security configuration for super-block 23 register"
bitfld.long 0x5C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x5C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x5C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x5C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x5C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x5C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x5C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x5C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x5C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x5C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x5C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x5C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x5C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x5C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x5C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x5C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x5C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x5C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x5C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x5C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x5C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x5C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x5C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x5C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x5C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x5C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x5C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x5C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x5C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x5C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x5C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x5C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR23." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x60 "GTZC1_MPCBB2_SECCFGR24,GTZC1 SRAM2 MPCBB security configuration for super-block 24 register"
bitfld.long 0x60 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x60 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x60 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x60 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x60 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x60 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x60 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x60 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x60 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x60 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x60 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x60 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x60 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x60 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x60 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x60 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x60 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x60 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x60 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x60 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x60 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x60 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x60 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x60 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x60 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x60 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x60 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x60 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x60 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x60 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x60 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x60 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR24." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x64 "GTZC1_MPCBB2_SECCFGR25,GTZC1 SRAM2 MPCBB security configuration for super-block 25 register"
bitfld.long 0x64 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x64 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x64 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x64 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x64 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x64 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x64 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x64 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x64 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x64 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x64 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x64 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x64 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x64 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x64 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x64 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x64 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x64 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x64 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x64 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x64 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x64 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x64 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x64 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x64 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x64 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x64 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x64 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x64 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x64 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x64 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x64 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR25." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x68 "GTZC1_MPCBB2_SECCFGR26,GTZC1 SRAM2 MPCBB security configuration for super-block 26 register"
bitfld.long 0x68 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x68 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x68 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x68 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x68 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x68 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x68 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x68 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x68 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x68 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x68 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x68 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x68 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x68 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x68 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x68 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x68 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x68 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x68 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x68 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x68 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x68 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x68 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x68 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x68 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x68 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x68 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x68 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x68 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x68 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x68 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x68 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR26." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x6C "GTZC1_MPCBB2_SECCFGR27,GTZC1 SRAM2 MPCBB security configuration for super-block 27 register"
bitfld.long 0x6C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x6C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x6C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x6C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x6C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x6C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x6C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x6C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x6C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x6C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x6C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x6C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x6C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x6C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x6C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x6C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x6C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x6C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x6C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x6C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x6C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x6C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x6C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x6C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x6C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x6C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x6C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x6C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x6C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x6C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x6C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x6C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR27." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x70 "GTZC1_MPCBB2_SECCFGR28,GTZC1 SRAM2 MPCBB security configuration for super-block 28 register"
bitfld.long 0x70 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x70 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x70 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x70 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x70 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x70 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x70 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x70 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x70 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x70 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x70 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x70 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x70 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x70 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x70 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x70 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x70 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x70 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x70 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x70 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x70 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x70 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x70 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x70 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x70 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x70 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x70 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x70 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x70 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x70 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x70 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x70 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR28." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x74 "GTZC1_MPCBB2_SECCFGR29,GTZC1 SRAM2 MPCBB security configuration for super-block 29 register"
bitfld.long 0x74 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x74 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x74 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x74 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x74 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x74 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x74 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x74 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x74 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x74 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x74 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x74 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x74 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x74 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x74 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x74 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x74 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x74 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x74 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x74 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x74 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x74 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x74 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x74 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x74 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x74 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x74 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x74 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x74 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x74 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x74 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x74 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR29." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x78 "GTZC1_MPCBB2_SECCFGR30,GTZC1 SRAM2 MPCBB security configuration for super-block 30 register"
bitfld.long 0x78 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x78 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x78 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x78 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x78 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x78 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x78 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x78 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x78 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x78 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x78 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x78 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x78 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x78 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x78 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x78 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x78 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x78 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x78 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x78 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x78 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x78 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x78 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x78 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x78 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x78 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x78 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x78 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x78 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x78 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x78 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x78 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR30." "0: Non-secure access only to block 0,1: Secure access only to block 0"
line.long 0x7C "GTZC1_MPCBB2_SECCFGR31,GTZC1 SRAM2 MPCBB security configuration for super-block 31 register"
bitfld.long 0x7C 31. "SEC31,Unprivileged write to this bit is ignored if PRIV31 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 31,1: Secure access only to block 31"
newline
bitfld.long 0x7C 30. "SEC30,Unprivileged write to this bit is ignored if PRIV30 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 30,1: Secure access only to block 30"
newline
bitfld.long 0x7C 29. "SEC29,Unprivileged write to this bit is ignored if PRIV29 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 29,1: Secure access only to block 29"
newline
bitfld.long 0x7C 28. "SEC28,Unprivileged write to this bit is ignored if PRIV28 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 28,1: Secure access only to block 28"
newline
bitfld.long 0x7C 27. "SEC27,Unprivileged write to this bit is ignored if PRIV27 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 27,1: Secure access only to block 27"
newline
bitfld.long 0x7C 26. "SEC26,Unprivileged write to this bit is ignored if PRIV26 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 26,1: Secure access only to block 26"
newline
bitfld.long 0x7C 25. "SEC25,Unprivileged write to this bit is ignored if PRIV25 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 25,1: Secure access only to block 25"
newline
bitfld.long 0x7C 24. "SEC24,Unprivileged write to this bit is ignored if PRIV24 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 24,1: Secure access only to block 24"
newline
bitfld.long 0x7C 23. "SEC23,Unprivileged write to this bit is ignored if PRIV23 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 23,1: Secure access only to block 23"
newline
bitfld.long 0x7C 22. "SEC22,Unprivileged write to this bit is ignored if PRIV22 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 22,1: Secure access only to block 22"
newline
bitfld.long 0x7C 21. "SEC21,Unprivileged write to this bit is ignored if PRIV21 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 21,1: Secure access only to block 21"
newline
bitfld.long 0x7C 20. "SEC20,Unprivileged write to this bit is ignored if PRIV20 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 20,1: Secure access only to block 20"
newline
bitfld.long 0x7C 19. "SEC19,Unprivileged write to this bit is ignored if PRIV19 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 19,1: Secure access only to block 19"
newline
bitfld.long 0x7C 18. "SEC18,Unprivileged write to this bit is ignored if PRIV18 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 18,1: Secure access only to block 18"
newline
bitfld.long 0x7C 17. "SEC17,Unprivileged write to this bit is ignored if PRIV17 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 17,1: Secure access only to block 17"
newline
bitfld.long 0x7C 16. "SEC16,Unprivileged write to this bit is ignored if PRIV16 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 16,1: Secure access only to block 16"
newline
bitfld.long 0x7C 15. "SEC15,Unprivileged write to this bit is ignored if PRIV15 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 15,1: Secure access only to block 15"
newline
bitfld.long 0x7C 14. "SEC14,Unprivileged write to this bit is ignored if PRIV14 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 14,1: Secure access only to block 14"
newline
bitfld.long 0x7C 13. "SEC13,Unprivileged write to this bit is ignored if PRIV13 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 13,1: Secure access only to block 13"
newline
bitfld.long 0x7C 12. "SEC12,Unprivileged write to this bit is ignored if PRIV12 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 12,1: Secure access only to block 12"
newline
bitfld.long 0x7C 11. "SEC11,Unprivileged write to this bit is ignored if PRIV11 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 11,1: Secure access only to block 11"
newline
bitfld.long 0x7C 10. "SEC10,Unprivileged write to this bit is ignored if PRIV10 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 10,1: Secure access only to block 10"
newline
bitfld.long 0x7C 9. "SEC9,Unprivileged write to this bit is ignored if PRIV9 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 9,1: Secure access only to block 9"
newline
bitfld.long 0x7C 8. "SEC8,Unprivileged write to this bit is ignored if PRIV8 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 8,1: Secure access only to block 8"
newline
bitfld.long 0x7C 7. "SEC7,Unprivileged write to this bit is ignored if PRIV7 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 7,1: Secure access only to block 7"
newline
bitfld.long 0x7C 6. "SEC6,Unprivileged write to this bit is ignored if PRIV6 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 6,1: Secure access only to block 6"
newline
bitfld.long 0x7C 5. "SEC5,Unprivileged write to this bit is ignored if PRIV5 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 5,1: Secure access only to block 5"
newline
bitfld.long 0x7C 4. "SEC4,Unprivileged write to this bit is ignored if PRIV4 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 4,1: Secure access only to block 4"
newline
bitfld.long 0x7C 3. "SEC3,Unprivileged write to this bit is ignored if PRIV3 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 3,1: Secure access only to block 3"
newline
bitfld.long 0x7C 2. "SEC2,Unprivileged write to this bit is ignored if PRIV2 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 2,1: Secure access only to block 2"
newline
bitfld.long 0x7C 1. "SEC1,Unprivileged write to this bit is ignored if PRIV1 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 1,1: Secure access only to block 1"
newline
bitfld.long 0x7C 0. "SEC0,Unprivileged write to this bit is ignored if PRIV0 bit is set in GTZC1_MPCBB2_PRIVCFGR31." "0: Non-secure access only to block 0,1: Secure access only to block 0"
group.long 0x200++0x7F
line.long 0x0 "GTZC1_MPCBB2_PRIVCFGR0,GTZC1 SRAM2 MPCBB privileged configuration for super-block 0 register"
bitfld.long 0x0 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x0 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x0 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x0 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x0 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x0 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x0 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x0 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x0 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x0 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x0 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x0 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x0 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x0 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x0 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x0 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x0 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x0 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x0 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x0 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x0 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x0 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x0 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x0 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x0 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x0 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x0 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x0 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x0 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x0 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x0 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x0 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR0." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x4 "GTZC1_MPCBB2_PRIVCFGR1,GTZC1 SRAM2 MPCBB privileged configuration for super-block 1 register"
bitfld.long 0x4 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x4 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x4 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x4 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x4 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x4 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x4 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x4 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x4 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x4 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x4 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x4 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x4 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x4 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x4 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x4 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x4 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x4 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x4 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x4 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x4 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x4 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x4 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x4 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x4 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x4 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x4 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x4 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x4 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x4 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x4 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x4 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR1." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x8 "GTZC1_MPCBB2_PRIVCFGR2,GTZC1 SRAM2 MPCBB privileged configuration for super-block 2 register"
bitfld.long 0x8 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x8 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x8 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x8 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x8 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x8 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x8 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x8 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x8 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x8 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x8 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x8 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x8 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x8 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x8 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x8 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x8 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x8 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x8 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x8 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x8 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x8 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x8 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x8 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x8 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x8 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x8 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x8 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x8 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x8 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x8 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x8 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR2." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0xC "GTZC1_MPCBB2_PRIVCFGR3,GTZC1 SRAM2 MPCBB privileged configuration for super-block 3 register"
bitfld.long 0xC 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0xC 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0xC 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0xC 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0xC 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0xC 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0xC 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0xC 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0xC 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0xC 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0xC 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0xC 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0xC 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0xC 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0xC 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0xC 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0xC 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0xC 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0xC 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0xC 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0xC 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0xC 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0xC 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0xC 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0xC 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0xC 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0xC 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0xC 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0xC 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0xC 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0xC 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0xC 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR3." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x10 "GTZC1_MPCBB2_PRIVCFGR4,GTZC1 SRAM2 MPCBB privileged configuration for super-block 4 register"
bitfld.long 0x10 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x10 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x10 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x10 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x10 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x10 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x10 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x10 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x10 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x10 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x10 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x10 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x10 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x10 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x10 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x10 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x10 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x10 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x10 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x10 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x10 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x10 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x10 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x10 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x10 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x10 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x10 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x10 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x10 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x10 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x10 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x10 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR4." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x14 "GTZC1_MPCBB2_PRIVCFGR5,GTZC1 SRAM2 MPCBB privileged configuration for super-block 5 register"
bitfld.long 0x14 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x14 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x14 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x14 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x14 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x14 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x14 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x14 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x14 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x14 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x14 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x14 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x14 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x14 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x14 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x14 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x14 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x14 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x14 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x14 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x14 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x14 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x14 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x14 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x14 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x14 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x14 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x14 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x14 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x14 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x14 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x14 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR5." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x18 "GTZC1_MPCBB2_PRIVCFGR6,GTZC1 SRAM2 MPCBB privileged configuration for super-block 6 register"
bitfld.long 0x18 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x18 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x18 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x18 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x18 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x18 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x18 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x18 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x18 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x18 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x18 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x18 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x18 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x18 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x18 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x18 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x18 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x18 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x18 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x18 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x18 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x18 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x18 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x18 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x18 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x18 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x18 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x18 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x18 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x18 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x18 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x18 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR6." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x1C "GTZC1_MPCBB2_PRIVCFGR7,GTZC1 SRAM2 MPCBB privileged configuration for super-block 7 register"
bitfld.long 0x1C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x1C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x1C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x1C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x1C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x1C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x1C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x1C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x1C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x1C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x1C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x1C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x1C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x1C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x1C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x1C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x1C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x1C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x1C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x1C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x1C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x1C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x1C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x1C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x1C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x1C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x1C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x1C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x1C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x1C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x1C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x1C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR7." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x20 "GTZC1_MPCBB2_PRIVCFGR8,GTZC1 SRAM2 MPCBB privileged configuration for super-block 8 register"
bitfld.long 0x20 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x20 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x20 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x20 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x20 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x20 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x20 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x20 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x20 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x20 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x20 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x20 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x20 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x20 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x20 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x20 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x20 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x20 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x20 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x20 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x20 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x20 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x20 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x20 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x20 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x20 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x20 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x20 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x20 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x20 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x20 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x20 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR8." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x24 "GTZC1_MPCBB2_PRIVCFGR9,GTZC1 SRAM2 MPCBB privileged configuration for super-block 9 register"
bitfld.long 0x24 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x24 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x24 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x24 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x24 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x24 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x24 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x24 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x24 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x24 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x24 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x24 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x24 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x24 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x24 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x24 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x24 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x24 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x24 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x24 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x24 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x24 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x24 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x24 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x24 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x24 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x24 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x24 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x24 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x24 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x24 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x24 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR9." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x28 "GTZC1_MPCBB2_PRIVCFGR10,GTZC1 SRAM2 MPCBB privileged configuration for super-block 10 register"
bitfld.long 0x28 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x28 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x28 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x28 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x28 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x28 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x28 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x28 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x28 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x28 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x28 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x28 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x28 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x28 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x28 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x28 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x28 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x28 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x28 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x28 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x28 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x28 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x28 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x28 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x28 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x28 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x28 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x28 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x28 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x28 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x28 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x28 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR10." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x2C "GTZC1_MPCBB2_PRIVCFGR11,GTZC1 SRAM2 MPCBB privileged configuration for super-block 11 register"
bitfld.long 0x2C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x2C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x2C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x2C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x2C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x2C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x2C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x2C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x2C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x2C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x2C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x2C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x2C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x2C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x2C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x2C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x2C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x2C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x2C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x2C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x2C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x2C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x2C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x2C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x2C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x2C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x2C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x2C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x2C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x2C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x2C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x2C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR11." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x30 "GTZC1_MPCBB2_PRIVCFGR12,GTZC1 SRAM2 MPCBB privileged configuration for super-block 12 register"
bitfld.long 0x30 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x30 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x30 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x30 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x30 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x30 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x30 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x30 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x30 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x30 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x30 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x30 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x30 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x30 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x30 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x30 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x30 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x30 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x30 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x30 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x30 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x30 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x30 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x30 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x30 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x30 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x30 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x30 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x30 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x30 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x30 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x30 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR12." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x34 "GTZC1_MPCBB2_PRIVCFGR13,GTZC1 SRAM2 MPCBB privileged configuration for super-block 13 register"
bitfld.long 0x34 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x34 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x34 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x34 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x34 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x34 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x34 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x34 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x34 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x34 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x34 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x34 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x34 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x34 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x34 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x34 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x34 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x34 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x34 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x34 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x34 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x34 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x34 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x34 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x34 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x34 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x34 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x34 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x34 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x34 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x34 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x34 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR13." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x38 "GTZC1_MPCBB2_PRIVCFGR14,GTZC1 SRAM2 MPCBB privileged configuration for super-block 14 register"
bitfld.long 0x38 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x38 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x38 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x38 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x38 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x38 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x38 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x38 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x38 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x38 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x38 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x38 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x38 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x38 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x38 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x38 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x38 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x38 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x38 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x38 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x38 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x38 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x38 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x38 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x38 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x38 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x38 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x38 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x38 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x38 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x38 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x38 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR14." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x3C "GTZC1_MPCBB2_PRIVCFGR15,GTZC1 SRAM2 MPCBB privileged configuration for super-block 15 register"
bitfld.long 0x3C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x3C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x3C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x3C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x3C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x3C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x3C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x3C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x3C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x3C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x3C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x3C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x3C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x3C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x3C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x3C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x3C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x3C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x3C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x3C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x3C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x3C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x3C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x3C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x3C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x3C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x3C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x3C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x3C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x3C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x3C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x3C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR15." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x40 "GTZC1_MPCBB2_PRIVCFGR16,GTZC1 SRAM2 MPCBB privileged configuration for super-block 16 register"
bitfld.long 0x40 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x40 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x40 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x40 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x40 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x40 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x40 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x40 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x40 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x40 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x40 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x40 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x40 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x40 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x40 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x40 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x40 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x40 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x40 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x40 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x40 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x40 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x40 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x40 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x40 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x40 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x40 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x40 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x40 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x40 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x40 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x40 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR16." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x44 "GTZC1_MPCBB2_PRIVCFGR17,GTZC1 SRAM2 MPCBB privileged configuration for super-block 17 register"
bitfld.long 0x44 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x44 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x44 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x44 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x44 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x44 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x44 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x44 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x44 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x44 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x44 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x44 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x44 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x44 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x44 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x44 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x44 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x44 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x44 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x44 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x44 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x44 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x44 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x44 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x44 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x44 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x44 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x44 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x44 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x44 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x44 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x44 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR17." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x48 "GTZC1_MPCBB2_PRIVCFGR18,GTZC1 SRAM2 MPCBB privileged configuration for super-block 18 register"
bitfld.long 0x48 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x48 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x48 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x48 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x48 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x48 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x48 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x48 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x48 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x48 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x48 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x48 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x48 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x48 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x48 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x48 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x48 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x48 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x48 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x48 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x48 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x48 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x48 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x48 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x48 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x48 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x48 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x48 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x48 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x48 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x48 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x48 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR18." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x4C "GTZC1_MPCBB2_PRIVCFGR19,GTZC1 SRAM2 MPCBB privileged configuration for super-block 19 register"
bitfld.long 0x4C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x4C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x4C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x4C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x4C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x4C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x4C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x4C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x4C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x4C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x4C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x4C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x4C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x4C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x4C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x4C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x4C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x4C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x4C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x4C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x4C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x4C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x4C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x4C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x4C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x4C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x4C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x4C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x4C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x4C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x4C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x4C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR19." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x50 "GTZC1_MPCBB2_PRIVCFGR20,GTZC1 SRAM2 MPCBB privileged configuration for super-block 20 register"
bitfld.long 0x50 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x50 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x50 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x50 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x50 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x50 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x50 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x50 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x50 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x50 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x50 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x50 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x50 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x50 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x50 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x50 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x50 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x50 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x50 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x50 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x50 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x50 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x50 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x50 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x50 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x50 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x50 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x50 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x50 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x50 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x50 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x50 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR20." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x54 "GTZC1_MPCBB2_PRIVCFGR21,GTZC1 SRAM2 MPCBB privileged configuration for super-block 21 register"
bitfld.long 0x54 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x54 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x54 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x54 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x54 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x54 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x54 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x54 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x54 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x54 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x54 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x54 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x54 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x54 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x54 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x54 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x54 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x54 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x54 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x54 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x54 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x54 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x54 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x54 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x54 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x54 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x54 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x54 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x54 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x54 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x54 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x54 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR21." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x58 "GTZC1_MPCBB2_PRIVCFGR22,GTZC1 SRAM2 MPCBB privileged configuration for super-block 22 register"
bitfld.long 0x58 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x58 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x58 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x58 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x58 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x58 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x58 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x58 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x58 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x58 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x58 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x58 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x58 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x58 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x58 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x58 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x58 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x58 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x58 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x58 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x58 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x58 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x58 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x58 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x58 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x58 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x58 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x58 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x58 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x58 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x58 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x58 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR22." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x5C "GTZC1_MPCBB2_PRIVCFGR23,GTZC1 SRAM2 MPCBB privileged configuration for super-block 23 register"
bitfld.long 0x5C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x5C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x5C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x5C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x5C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x5C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x5C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x5C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x5C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x5C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x5C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x5C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x5C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x5C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x5C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x5C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x5C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x5C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x5C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x5C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x5C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x5C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x5C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x5C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x5C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x5C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x5C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x5C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x5C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x5C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x5C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x5C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR23." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x60 "GTZC1_MPCBB2_PRIVCFGR24,GTZC1 SRAM2 MPCBB privileged configuration for super-block 24 register"
bitfld.long 0x60 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x60 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x60 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x60 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x60 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x60 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x60 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x60 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x60 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x60 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x60 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x60 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x60 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x60 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x60 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x60 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x60 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x60 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x60 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x60 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x60 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x60 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x60 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x60 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x60 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x60 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x60 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x60 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x60 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x60 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x60 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x60 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR24." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x64 "GTZC1_MPCBB2_PRIVCFGR25,GTZC1 SRAM2 MPCBB privileged configuration for super-block 25 register"
bitfld.long 0x64 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x64 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x64 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x64 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x64 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x64 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x64 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x64 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x64 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x64 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x64 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x64 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x64 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x64 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x64 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x64 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x64 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x64 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x64 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x64 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x64 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x64 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x64 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x64 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x64 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x64 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x64 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x64 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x64 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x64 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x64 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x64 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR25." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x68 "GTZC1_MPCBB2_PRIVCFGR26,GTZC1 SRAM2 MPCBB privileged configuration for super-block 26 register"
bitfld.long 0x68 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x68 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x68 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x68 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x68 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x68 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x68 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x68 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x68 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x68 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x68 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x68 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x68 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x68 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x68 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x68 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x68 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x68 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x68 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x68 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x68 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x68 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x68 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x68 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x68 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x68 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x68 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x68 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x68 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x68 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x68 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x68 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR26." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x6C "GTZC1_MPCBB2_PRIVCFGR27,GTZC1 SRAM2 MPCBB privileged configuration for super-block 27 register"
bitfld.long 0x6C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x6C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x6C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x6C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x6C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x6C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x6C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x6C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x6C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x6C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x6C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x6C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x6C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x6C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x6C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x6C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x6C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x6C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x6C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x6C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x6C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x6C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x6C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x6C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x6C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x6C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x6C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x6C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x6C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x6C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x6C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x6C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR27." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x70 "GTZC1_MPCBB2_PRIVCFGR28,GTZC1 SRAM2 MPCBB privileged configuration for super-block 28 register"
bitfld.long 0x70 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x70 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x70 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x70 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x70 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x70 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x70 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x70 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x70 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x70 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x70 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x70 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x70 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x70 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x70 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x70 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x70 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x70 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x70 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x70 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x70 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x70 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x70 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x70 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x70 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x70 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x70 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x70 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x70 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x70 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x70 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x70 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR28." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x74 "GTZC1_MPCBB2_PRIVCFGR29,GTZC1 SRAM2 MPCBB privileged configuration for super-block 29 register"
bitfld.long 0x74 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x74 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x74 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x74 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x74 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x74 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x74 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x74 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x74 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x74 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x74 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x74 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x74 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x74 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x74 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x74 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x74 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x74 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x74 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x74 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x74 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x74 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x74 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x74 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x74 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x74 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x74 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x74 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x74 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x74 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x74 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x74 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR29." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x78 "GTZC1_MPCBB2_PRIVCFGR30,GTZC1 SRAM2 MPCBB privileged configuration for super-block 30 register"
bitfld.long 0x78 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x78 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x78 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x78 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x78 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x78 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x78 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x78 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x78 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x78 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x78 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x78 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x78 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x78 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x78 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x78 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x78 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x78 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x78 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x78 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x78 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x78 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x78 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x78 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x78 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x78 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x78 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x78 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x78 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x78 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x78 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x78 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR30." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
line.long 0x7C "GTZC1_MPCBB2_PRIVCFGR31,GTZC1 SRAM2 MPCBB privileged configuration for super-block 31 register"
bitfld.long 0x7C 31. "PRIV31,Non-secure write to this bit is ignored if SEC31 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 31,1: Only privileged access to block 31"
newline
bitfld.long 0x7C 30. "PRIV30,Non-secure write to this bit is ignored if SEC30 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 30,1: Only privileged access to block 30"
newline
bitfld.long 0x7C 29. "PRIV29,Non-secure write to this bit is ignored if SEC29 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 29,1: Only privileged access to block 29"
newline
bitfld.long 0x7C 28. "PRIV28,Non-secure write to this bit is ignored if SEC28 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 28,1: Only privileged access to block 28"
newline
bitfld.long 0x7C 27. "PRIV27,Non-secure write to this bit is ignored if SEC27 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 27,1: Only privileged access to block 27"
newline
bitfld.long 0x7C 26. "PRIV26,Non-secure write to this bit is ignored if SEC26 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 26,1: Only privileged access to block 26"
newline
bitfld.long 0x7C 25. "PRIV25,Non-secure write to this bit is ignored if SEC25 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 25,1: Only privileged access to block 25"
newline
bitfld.long 0x7C 24. "PRIV24,Non-secure write to this bit is ignored if SEC24 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 24,1: Only privileged access to block 24"
newline
bitfld.long 0x7C 23. "PRIV23,Non-secure write to this bit is ignored if SEC23 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 23,1: Only privileged access to block 23"
newline
bitfld.long 0x7C 22. "PRIV22,Non-secure write to this bit is ignored if SEC22 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 22,1: Only privileged access to block 22"
newline
bitfld.long 0x7C 21. "PRIV21,Non-secure write to this bit is ignored if SEC21 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 21,1: Only privileged access to block 21"
newline
bitfld.long 0x7C 20. "PRIV20,Non-secure write to this bit is ignored if SEC20 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 20,1: Only privileged access to block 20"
newline
bitfld.long 0x7C 19. "PRIV19,Non-secure write to this bit is ignored if SEC19 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 19,1: Only privileged access to block 19"
newline
bitfld.long 0x7C 18. "PRIV18,Non-secure write to this bit is ignored if SEC18 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 18,1: Only privileged access to block 18"
newline
bitfld.long 0x7C 17. "PRIV17,Non-secure write to this bit is ignored if SEC17 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 17,1: Only privileged access to block 17"
newline
bitfld.long 0x7C 16. "PRIV16,Non-secure write to this bit is ignored if SEC16 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 16,1: Only privileged access to block 16"
newline
bitfld.long 0x7C 15. "PRIV15,Non-secure write to this bit is ignored if SEC15 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 15,1: Only privileged access to block 15"
newline
bitfld.long 0x7C 14. "PRIV14,Non-secure write to this bit is ignored if SEC14 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 14,1: Only privileged access to block 14"
newline
bitfld.long 0x7C 13. "PRIV13,Non-secure write to this bit is ignored if SEC13 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 13,1: Only privileged access to block 13"
newline
bitfld.long 0x7C 12. "PRIV12,Non-secure write to this bit is ignored if SEC12 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 12,1: Only privileged access to block 12"
newline
bitfld.long 0x7C 11. "PRIV11,Non-secure write to this bit is ignored if SEC11 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 11,1: Only privileged access to block 11"
newline
bitfld.long 0x7C 10. "PRIV10,Non-secure write to this bit is ignored if SEC10 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 10,1: Only privileged access to block 10"
newline
bitfld.long 0x7C 9. "PRIV9,Non-secure write to this bit is ignored if SEC9 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 9,1: Only privileged access to block 9"
newline
bitfld.long 0x7C 8. "PRIV8,Non-secure write to this bit is ignored if SEC8 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 8,1: Only privileged access to block 8"
newline
bitfld.long 0x7C 7. "PRIV7,Non-secure write to this bit is ignored if SEC7 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 7,1: Only privileged access to block 7"
newline
bitfld.long 0x7C 6. "PRIV6,Non-secure write to this bit is ignored if SEC6 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 6,1: Only privileged access to block 6"
newline
bitfld.long 0x7C 5. "PRIV5,Non-secure write to this bit is ignored if SEC5 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 5,1: Only privileged access to block 5"
newline
bitfld.long 0x7C 4. "PRIV4,Non-secure write to this bit is ignored if SEC4 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 4,1: Only privileged access to block 4"
newline
bitfld.long 0x7C 3. "PRIV3,Non-secure write to this bit is ignored if SEC3 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 3,1: Only privileged access to block 3"
newline
bitfld.long 0x7C 2. "PRIV2,Non-secure write to this bit is ignored if SEC2 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 2,1: Only privileged access to block 2"
newline
bitfld.long 0x7C 1. "PRIV1,Non-secure write to this bit is ignored if SEC1 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 1,1: Only privileged access to block 1"
newline
bitfld.long 0x7C 0. "PRIV0,Non-secure write to this bit is ignored if SEC0 bit is set in GTZC1_MPCBB2_SECCFGR31." "0: Privileged and unprivileged access to block 0,1: Only privileged access to block 0"
tree.end
tree.end
tree "HASH (HASH Hardware Accelerator)"
base ad:0x0
tree "HASH"
base ad:0x420C0400
group.long 0x0++0x3
line.long 0x0 "HASH_CR,HASH control register"
hexmask.long.byte 0x0 17.--20. 1. "ALGO,Algorithm selection"
bitfld.long 0x0 16. "LKEY,Long key selection" "0: HMAC key is shorter or equal to the block size..,1: HMAC key is longer than the block size (long key)."
newline
bitfld.long 0x0 13. "MDMAT,Multiple DMA transfers" "0: DCAL is automatically set at the end of a DMA..,1: DCAL is not automatically set at the end of a.."
rbitfld.long 0x0 12. "DINNE,DIN not empty" "0,1"
newline
hexmask.long.byte 0x0 8.--11. 1. "NBW,Number of words already pushed"
bitfld.long 0x0 6. "MODE,Mode selection" "0: Hash mode selected,1: HMAC mode selected."
newline
bitfld.long 0x0 4.--5. "DATATYPE,Data type selection" "0: 32-bit data.,1: 16-bit data or half-word.,2: 8-bit data or bytes.,3: bit data or bit string."
bitfld.long 0x0 3. "DMAE,DMA enable" "0: DMA transfers disabled,1: DMA transfers enabled."
newline
bitfld.long 0x0 2. "INIT,Initialize message digest calculation" "0,1"
wgroup.long 0x4++0x3
line.long 0x0 "HASH_DIN,HASH data input register"
hexmask.long 0x0 0.--31. 1. "DATAIN,Data input"
group.long 0x8++0x3
line.long 0x0 "HASH_STR,HASH start register"
bitfld.long 0x0 8. "DCAL,Digest calculation" "0,1"
hexmask.long.byte 0x0 0.--4. 1. "NBLW,Number of valid bits in the last word"
rgroup.long 0xC++0x13
line.long 0x0 "HASH_HRA0,HASH aliased digest register 0"
hexmask.long 0x0 0.--31. 1. "H0,Hash data x"
line.long 0x4 "HASH_HRA1,HASH aliased digest register 1"
hexmask.long 0x4 0.--31. 1. "H1,Hash data x"
line.long 0x8 "HASH_HRA2,HASH aliased digest register 2"
hexmask.long 0x8 0.--31. 1. "H2,Hash data x"
line.long 0xC "HASH_HRA3,HASH aliased digest register 3"
hexmask.long 0xC 0.--31. 1. "H3,Hash data x"
line.long 0x10 "HASH_HRA4,HASH aliased digest register 4"
hexmask.long 0x10 0.--31. 1. "H4,Hash data x"
group.long 0x20++0x7
line.long 0x0 "HASH_IMR,HASH interrupt enable register"
bitfld.long 0x0 1. "DCIE,Digest calculation completion interrupt enable" "0: Digest calculation completion interrupt disabled,1: Digest calculation completion interrupt enabled."
bitfld.long 0x0 0. "DINIE,Data input interrupt enable" "0: Data input interrupt disabled,1: Data input interrupt enabled"
line.long 0x4 "HASH_SR,HASH status register"
hexmask.long.byte 0x4 16.--20. 1. "NBWE,Number of words expected"
rbitfld.long 0x4 15. "DINNE,DIN not empty" "0: No data are present in the data input buffer,1: The input buffer contains at least one word of.."
newline
hexmask.long.byte 0x4 9.--13. 1. "NBWP,Number of words already pushed"
rbitfld.long 0x4 3. "BUSY,Busy bit" "0: No block is currently being processed,1: The hash core is processing a block of data"
newline
rbitfld.long 0x4 2. "DMAS,DMA Status" "0: DMA interface is disabled (DMAE=0) and no..,1: DMA interface is enabled (DMAE=1) or a transfer.."
bitfld.long 0x4 1. "DCIS,Digest calculation completion interrupt status" "0: No digest available in the HASH_HRx registers..,1: Digest calculation complete a digest is.."
newline
bitfld.long 0x4 0. "DINIS,Data input interrupt status" "0: Less than 16 locations are free in the input..,1: A new block can be entered into the input buffer."
group.long 0xF8++0x19B
line.long 0x0 "HASH_CSR0,HASH context swap register 0"
hexmask.long 0x0 0.--31. 1. "CS0,Context swap x"
line.long 0x4 "HASH_CSR1,HASH context swap register 1"
hexmask.long 0x4 0.--31. 1. "CS1,Context swap x"
line.long 0x8 "HASH_CSR2,HASH context swap register 2"
hexmask.long 0x8 0.--31. 1. "CS2,Context swap x"
line.long 0xC "HASH_CSR3,HASH context swap register 3"
hexmask.long 0xC 0.--31. 1. "CS3,Context swap x"
line.long 0x10 "HASH_CSR4,HASH context swap register 4"
hexmask.long 0x10 0.--31. 1. "CS4,Context swap x"
line.long 0x14 "HASH_CSR5,HASH context swap register 5"
hexmask.long 0x14 0.--31. 1. "CS5,Context swap x"
line.long 0x18 "HASH_CSR6,HASH context swap register 6"
hexmask.long 0x18 0.--31. 1. "CS6,Context swap x"
line.long 0x1C "HASH_CSR7,HASH context swap register 7"
hexmask.long 0x1C 0.--31. 1. "CS7,Context swap x"
line.long 0x20 "HASH_CSR8,HASH context swap register 8"
hexmask.long 0x20 0.--31. 1. "CS8,Context swap x"
line.long 0x24 "HASH_CSR9,HASH context swap register 9"
hexmask.long 0x24 0.--31. 1. "CS9,Context swap x"
line.long 0x28 "HASH_CSR10,HASH context swap register 10"
hexmask.long 0x28 0.--31. 1. "CS10,Context swap x"
line.long 0x2C "HASH_CSR11,HASH context swap register 11"
hexmask.long 0x2C 0.--31. 1. "CS11,Context swap x"
line.long 0x30 "HASH_CSR12,HASH context swap register 12"
hexmask.long 0x30 0.--31. 1. "CS12,Context swap x"
line.long 0x34 "HASH_CSR13,HASH context swap register 13"
hexmask.long 0x34 0.--31. 1. "CS13,Context swap x"
line.long 0x38 "HASH_CSR14,HASH context swap register 14"
hexmask.long 0x38 0.--31. 1. "CS14,Context swap x"
line.long 0x3C "HASH_CSR15,HASH context swap register 15"
hexmask.long 0x3C 0.--31. 1. "CS15,Context swap x"
line.long 0x40 "HASH_CSR16,HASH context swap register 16"
hexmask.long 0x40 0.--31. 1. "CS16,Context swap x"
line.long 0x44 "HASH_CSR17,HASH context swap register 17"
hexmask.long 0x44 0.--31. 1. "CS17,Context swap x"
line.long 0x48 "HASH_CSR18,HASH context swap register 18"
hexmask.long 0x48 0.--31. 1. "CS18,Context swap x"
line.long 0x4C "HASH_CSR19,HASH context swap register 19"
hexmask.long 0x4C 0.--31. 1. "CS19,Context swap x"
line.long 0x50 "HASH_CSR20,HASH context swap register 20"
hexmask.long 0x50 0.--31. 1. "CS20,Context swap x"
line.long 0x54 "HASH_CSR21,HASH context swap register 21"
hexmask.long 0x54 0.--31. 1. "CS21,Context swap x"
line.long 0x58 "HASH_CSR22,HASH context swap register 22"
hexmask.long 0x58 0.--31. 1. "CS22,Context swap x"
line.long 0x5C "HASH_CSR23,HASH context swap register 23"
hexmask.long 0x5C 0.--31. 1. "CS23,Context swap x"
line.long 0x60 "HASH_CSR24,HASH context swap register 24"
hexmask.long 0x60 0.--31. 1. "CS24,Context swap x"
line.long 0x64 "HASH_CSR25,HASH context swap register 25"
hexmask.long 0x64 0.--31. 1. "CS25,Context swap x"
line.long 0x68 "HASH_CSR26,HASH context swap register 26"
hexmask.long 0x68 0.--31. 1. "CS26,Context swap x"
line.long 0x6C "HASH_CSR27,HASH context swap register 27"
hexmask.long 0x6C 0.--31. 1. "CS27,Context swap x"
line.long 0x70 "HASH_CSR28,HASH context swap register 28"
hexmask.long 0x70 0.--31. 1. "CS28,Context swap x"
line.long 0x74 "HASH_CSR29,HASH context swap register 29"
hexmask.long 0x74 0.--31. 1. "CS29,Context swap x"
line.long 0x78 "HASH_CSR30,HASH context swap register 30"
hexmask.long 0x78 0.--31. 1. "CS30,Context swap x"
line.long 0x7C "HASH_CSR31,HASH context swap register 31"
hexmask.long 0x7C 0.--31. 1. "CS31,Context swap x"
line.long 0x80 "HASH_CSR32,HASH context swap register 32"
hexmask.long 0x80 0.--31. 1. "CS32,Context swap x"
line.long 0x84 "HASH_CSR33,HASH context swap register 33"
hexmask.long 0x84 0.--31. 1. "CS33,Context swap x"
line.long 0x88 "HASH_CSR34,HASH context swap register 34"
hexmask.long 0x88 0.--31. 1. "CS34,Context swap x"
line.long 0x8C "HASH_CSR35,HASH context swap register 35"
hexmask.long 0x8C 0.--31. 1. "CS35,Context swap x"
line.long 0x90 "HASH_CSR36,HASH context swap register 36"
hexmask.long 0x90 0.--31. 1. "CS36,Context swap x"
line.long 0x94 "HASH_CSR37,HASH context swap register 37"
hexmask.long 0x94 0.--31. 1. "CS37,Context swap x"
line.long 0x98 "HASH_CSR38,HASH context swap register 38"
hexmask.long 0x98 0.--31. 1. "CS38,Context swap x"
line.long 0x9C "HASH_CSR39,HASH context swap register 39"
hexmask.long 0x9C 0.--31. 1. "CS39,Context swap x"
line.long 0xA0 "HASH_CSR40,HASH context swap register 40"
hexmask.long 0xA0 0.--31. 1. "CS40,Context swap x"
line.long 0xA4 "HASH_CSR41,HASH context swap register 41"
hexmask.long 0xA4 0.--31. 1. "CS41,Context swap x"
line.long 0xA8 "HASH_CSR42,HASH context swap register 42"
hexmask.long 0xA8 0.--31. 1. "CS42,Context swap x"
line.long 0xAC "HASH_CSR43,HASH context swap register 43"
hexmask.long 0xAC 0.--31. 1. "CS43,Context swap x"
line.long 0xB0 "HASH_CSR44,HASH context swap register 44"
hexmask.long 0xB0 0.--31. 1. "CS44,Context swap x"
line.long 0xB4 "HASH_CSR45,HASH context swap register 45"
hexmask.long 0xB4 0.--31. 1. "CS45,Context swap x"
line.long 0xB8 "HASH_CSR46,HASH context swap register 46"
hexmask.long 0xB8 0.--31. 1. "CS46,Context swap x"
line.long 0xBC "HASH_CSR47,HASH context swap register 47"
hexmask.long 0xBC 0.--31. 1. "CS47,Context swap x"
line.long 0xC0 "HASH_CSR48,HASH context swap register 48"
hexmask.long 0xC0 0.--31. 1. "CS48,Context swap x"
line.long 0xC4 "HASH_CSR49,HASH context swap register 49"
hexmask.long 0xC4 0.--31. 1. "CS49,Context swap x"
line.long 0xC8 "HASH_CSR50,HASH context swap register 50"
hexmask.long 0xC8 0.--31. 1. "CS50,Context swap x"
line.long 0xCC "HASH_CSR51,HASH context swap register 51"
hexmask.long 0xCC 0.--31. 1. "CS51,Context swap x"
line.long 0xD0 "HASH_CSR52,HASH context swap register 52"
hexmask.long 0xD0 0.--31. 1. "CS52,Context swap x"
line.long 0xD4 "HASH_CSR53,HASH context swap register 53"
hexmask.long 0xD4 0.--31. 1. "CS53,Context swap x"
line.long 0xD8 "HASH_CSR54,HASH context swap register 54"
hexmask.long 0xD8 0.--31. 1. "CS54,Context swap x"
line.long 0xDC "HASH_CSR55,HASH context swap register 55"
hexmask.long 0xDC 0.--31. 1. "CS55,Context swap x"
line.long 0xE0 "HASH_CSR56,HASH context swap register 56"
hexmask.long 0xE0 0.--31. 1. "CS56,Context swap x"
line.long 0xE4 "HASH_CSR57,HASH context swap register 57"
hexmask.long 0xE4 0.--31. 1. "CS57,Context swap x"
line.long 0xE8 "HASH_CSR58,HASH context swap register 58"
hexmask.long 0xE8 0.--31. 1. "CS58,Context swap x"
line.long 0xEC "HASH_CSR59,HASH context swap register 59"
hexmask.long 0xEC 0.--31. 1. "CS59,Context swap x"
line.long 0xF0 "HASH_CSR60,HASH context swap register 60"
hexmask.long 0xF0 0.--31. 1. "CS60,Context swap x"
line.long 0xF4 "HASH_CSR61,HASH context swap register 61"
hexmask.long 0xF4 0.--31. 1. "CS61,Context swap x"
line.long 0xF8 "HASH_CSR62,HASH context swap register 62"
hexmask.long 0xF8 0.--31. 1. "CS62,Context swap x"
line.long 0xFC "HASH_CSR63,HASH context swap register 63"
hexmask.long 0xFC 0.--31. 1. "CS63,Context swap x"
line.long 0x100 "HASH_CSR64,HASH context swap register 64"
hexmask.long 0x100 0.--31. 1. "CS64,Context swap x"
line.long 0x104 "HASH_CSR65,HASH context swap register 65"
hexmask.long 0x104 0.--31. 1. "CS65,Context swap x"
line.long 0x108 "HASH_CSR66,HASH context swap register 66"
hexmask.long 0x108 0.--31. 1. "CS66,Context swap x"
line.long 0x10C "HASH_CSR67,HASH context swap register 67"
hexmask.long 0x10C 0.--31. 1. "CS67,Context swap x"
line.long 0x110 "HASH_CSR68,HASH context swap register 68"
hexmask.long 0x110 0.--31. 1. "CS68,Context swap x"
line.long 0x114 "HASH_CSR69,HASH context swap register 69"
hexmask.long 0x114 0.--31. 1. "CS69,Context swap x"
line.long 0x118 "HASH_CSR70,HASH context swap register 70"
hexmask.long 0x118 0.--31. 1. "CS70,Context swap x"
line.long 0x11C "HASH_CSR71,HASH context swap register 71"
hexmask.long 0x11C 0.--31. 1. "CS71,Context swap x"
line.long 0x120 "HASH_CSR72,HASH context swap register 72"
hexmask.long 0x120 0.--31. 1. "CS72,Context swap x"
line.long 0x124 "HASH_CSR73,HASH context swap register 73"
hexmask.long 0x124 0.--31. 1. "CS73,Context swap x"
line.long 0x128 "HASH_CSR74,HASH context swap register 74"
hexmask.long 0x128 0.--31. 1. "CS74,Context swap x"
line.long 0x12C "HASH_CSR75,HASH context swap register 75"
hexmask.long 0x12C 0.--31. 1. "CS75,Context swap x"
line.long 0x130 "HASH_CSR76,HASH context swap register 76"
hexmask.long 0x130 0.--31. 1. "CS76,Context swap x"
line.long 0x134 "HASH_CSR77,HASH context swap register 77"
hexmask.long 0x134 0.--31. 1. "CS77,Context swap x"
line.long 0x138 "HASH_CSR78,HASH context swap register 78"
hexmask.long 0x138 0.--31. 1. "CS78,Context swap x"
line.long 0x13C "HASH_CSR79,HASH context swap register 79"
hexmask.long 0x13C 0.--31. 1. "CS79,Context swap x"
line.long 0x140 "HASH_CSR80,HASH context swap register 80"
hexmask.long 0x140 0.--31. 1. "CS80,Context swap x"
line.long 0x144 "HASH_CSR81,HASH context swap register 81"
hexmask.long 0x144 0.--31. 1. "CS81,Context swap x"
line.long 0x148 "HASH_CSR82,HASH context swap register 82"
hexmask.long 0x148 0.--31. 1. "CS82,Context swap x"
line.long 0x14C "HASH_CSR83,HASH context swap register 83"
hexmask.long 0x14C 0.--31. 1. "CS83,Context swap x"
line.long 0x150 "HASH_CSR84,HASH context swap register 84"
hexmask.long 0x150 0.--31. 1. "CS84,Context swap x"
line.long 0x154 "HASH_CSR85,HASH context swap register 85"
hexmask.long 0x154 0.--31. 1. "CS85,Context swap x"
line.long 0x158 "HASH_CSR86,HASH context swap register 86"
hexmask.long 0x158 0.--31. 1. "CS86,Context swap x"
line.long 0x15C "HASH_CSR87,HASH context swap register 87"
hexmask.long 0x15C 0.--31. 1. "CS87,Context swap x"
line.long 0x160 "HASH_CSR88,HASH context swap register 88"
hexmask.long 0x160 0.--31. 1. "CS88,Context swap x"
line.long 0x164 "HASH_CSR89,HASH context swap register 89"
hexmask.long 0x164 0.--31. 1. "CS89,Context swap x"
line.long 0x168 "HASH_CSR90,HASH context swap register 90"
hexmask.long 0x168 0.--31. 1. "CS90,Context swap x"
line.long 0x16C "HASH_CSR91,HASH context swap register 91"
hexmask.long 0x16C 0.--31. 1. "CS91,Context swap x"
line.long 0x170 "HASH_CSR92,HASH context swap register 92"
hexmask.long 0x170 0.--31. 1. "CS92,Context swap x"
line.long 0x174 "HASH_CSR93,HASH context swap register 93"
hexmask.long 0x174 0.--31. 1. "CS93,Context swap x"
line.long 0x178 "HASH_CSR94,HASH context swap register 94"
hexmask.long 0x178 0.--31. 1. "CS94,Context swap x"
line.long 0x17C "HASH_CSR95,HASH context swap register 95"
hexmask.long 0x17C 0.--31. 1. "CS95,Context swap x"
line.long 0x180 "HASH_CSR96,HASH context swap register 96"
hexmask.long 0x180 0.--31. 1. "CS96,Context swap x"
line.long 0x184 "HASH_CSR97,HASH context swap register 97"
hexmask.long 0x184 0.--31. 1. "CS97,Context swap x"
line.long 0x188 "HASH_CSR98,HASH context swap register 98"
hexmask.long 0x188 0.--31. 1. "CS98,Context swap x"
line.long 0x18C "HASH_CSR99,HASH context swap register 99"
hexmask.long 0x18C 0.--31. 1. "CS99,Context swap x"
line.long 0x190 "HASH_CSR100,HASH context swap register 100"
hexmask.long 0x190 0.--31. 1. "CS100,Context swap x"
line.long 0x194 "HASH_CSR101,HASH context swap register 101"
hexmask.long 0x194 0.--31. 1. "CS101,Context swap x"
line.long 0x198 "HASH_CSR102,HASH context swap register 102"
hexmask.long 0x198 0.--31. 1. "CS102,Context swap x"
rgroup.long 0x310++0xC7
line.long 0x0 "HASH_HR0,HASH digest register 0"
hexmask.long 0x0 0.--31. 1. "H0,Hash data x"
line.long 0x4 "HASH_HR1,HASH digest register 1"
hexmask.long 0x4 0.--31. 1. "H1,Hash data x"
line.long 0x8 "HASH_HR2,HASH digest register 2"
hexmask.long 0x8 0.--31. 1. "H2,Hash data x"
line.long 0xC "HASH_HR3,HASH digest register 3"
hexmask.long 0xC 0.--31. 1. "H3,Hash data x"
line.long 0x10 "HASH_HR4,HASH digest register 4"
hexmask.long 0x10 0.--31. 1. "H4,Hash data x"
line.long 0x14 "HASH_HR5,HASH supplementary digest register 5"
hexmask.long 0x14 0.--31. 1. "H5,Hash data x"
line.long 0x18 "HASH_HR6,HASH supplementary digest register 6"
hexmask.long 0x18 0.--31. 1. "H6,Hash data x"
line.long 0x1C "HASH_HR7,HASH supplementary digest register 7"
hexmask.long 0x1C 0.--31. 1. "H7,Hash data x"
line.long 0x20 "HASH_HR8,HASH supplementary digest register 8"
hexmask.long 0x20 0.--31. 1. "H8,Hash data x"
line.long 0x24 "HASH_HR9,HASH supplementary digest register 9"
hexmask.long 0x24 0.--31. 1. "H9,Hash data x"
line.long 0x28 "HASH_HR10,HASH supplementary digest register 10"
hexmask.long 0x28 0.--31. 1. "H10,Hash data x"
line.long 0x2C "HASH_HR11,HASH supplementary digest register 11"
hexmask.long 0x2C 0.--31. 1. "H11,Hash data x"
line.long 0x30 "HASH_HR12,HASH supplementary digest register 12"
hexmask.long 0x30 0.--31. 1. "H12,Hash data x"
line.long 0x34 "HASH_HR13,HASH supplementary digest register 13"
hexmask.long 0x34 0.--31. 1. "H13,Hash data x"
line.long 0x38 "HASH_HR14,HASH supplementary digest register 14"
hexmask.long 0x38 0.--31. 1. "H14,Hash data x"
line.long 0x3C "HASH_HR15,HASH supplementary digest register 15"
hexmask.long 0x3C 0.--31. 1. "H15,Hash data x"
line.long 0x40 "HASH_HR16,HASH supplementary digest register 16"
hexmask.long 0x40 0.--31. 1. "H16,Hash data x"
line.long 0x44 "HASH_HR17,HASH supplementary digest register 17"
hexmask.long 0x44 0.--31. 1. "H17,Hash data x"
line.long 0x48 "HASH_HR18,HASH supplementary digest register 18"
hexmask.long 0x48 0.--31. 1. "H18,Hash data x"
line.long 0x4C "HASH_HR19,HASH supplementary digest register 19"
hexmask.long 0x4C 0.--31. 1. "H19,Hash data x"
line.long 0x50 "HASH_HR20,HASH supplementary digest register 20"
hexmask.long 0x50 0.--31. 1. "H20,Hash data x"
line.long 0x54 "HASH_HR21,HASH supplementary digest register 21"
hexmask.long 0x54 0.--31. 1. "H21,Hash data x"
line.long 0x58 "HASH_HR22,HASH supplementary digest register 22"
hexmask.long 0x58 0.--31. 1. "H22,Hash data x"
line.long 0x5C "HASH_HR23,HASH supplementary digest register 23"
hexmask.long 0x5C 0.--31. 1. "H23,Hash data x"
line.long 0x60 "HASH_HR24,HASH supplementary digest register 24"
hexmask.long 0x60 0.--31. 1. "H24,Hash data x"
line.long 0x64 "HASH_HR25,HASH supplementary digest register 25"
hexmask.long 0x64 0.--31. 1. "H25,Hash data x"
line.long 0x68 "HASH_HR26,HASH supplementary digest register 26"
hexmask.long 0x68 0.--31. 1. "H26,Hash data x"
line.long 0x6C "HASH_HR27,HASH supplementary digest register 27"
hexmask.long 0x6C 0.--31. 1. "H27,Hash data x"
line.long 0x70 "HASH_HR28,HASH supplementary digest register 28"
hexmask.long 0x70 0.--31. 1. "H28,Hash data x"
line.long 0x74 "HASH_HR29,HASH supplementary digest register 29"
hexmask.long 0x74 0.--31. 1. "H29,Hash data x"
line.long 0x78 "HASH_HR30,HASH supplementary digest register 30"
hexmask.long 0x78 0.--31. 1. "H30,Hash data x"
line.long 0x7C "HASH_HR31,HASH supplementary digest register 31"
hexmask.long 0x7C 0.--31. 1. "H31,Hash data x"
line.long 0x80 "HASH_HR32,HASH supplementary digest register 32"
hexmask.long 0x80 0.--31. 1. "H32,Hash data x"
line.long 0x84 "HASH_HR33,HASH supplementary digest register 33"
hexmask.long 0x84 0.--31. 1. "H33,Hash data x"
line.long 0x88 "HASH_HR34,HASH supplementary digest register 34"
hexmask.long 0x88 0.--31. 1. "H34,Hash data x"
line.long 0x8C "HASH_HR35,HASH supplementary digest register 35"
hexmask.long 0x8C 0.--31. 1. "H35,Hash data x"
line.long 0x90 "HASH_HR36,HASH supplementary digest register 36"
hexmask.long 0x90 0.--31. 1. "H36,Hash data x"
line.long 0x94 "HASH_HR37,HASH supplementary digest register 37"
hexmask.long 0x94 0.--31. 1. "H37,Hash data x"
line.long 0x98 "HASH_HR38,HASH supplementary digest register 38"
hexmask.long 0x98 0.--31. 1. "H38,Hash data x"
line.long 0x9C "HASH_HR39,HASH supplementary digest register 39"
hexmask.long 0x9C 0.--31. 1. "H39,Hash data x"
line.long 0xA0 "HASH_HR40,HASH supplementary digest register 40"
hexmask.long 0xA0 0.--31. 1. "H40,Hash data x"
line.long 0xA4 "HASH_HR41,HASH supplementary digest register 41"
hexmask.long 0xA4 0.--31. 1. "H41,Hash data x"
line.long 0xA8 "HASH_HR42,HASH supplementary digest register 42"
hexmask.long 0xA8 0.--31. 1. "H42,Hash data x"
line.long 0xAC "HASH_HR43,HASH supplementary digest register 43"
hexmask.long 0xAC 0.--31. 1. "H43,Hash data x"
line.long 0xB0 "HASH_HR44,HASH supplementary digest register 44"
hexmask.long 0xB0 0.--31. 1. "H44,Hash data x"
line.long 0xB4 "HASH_HR45,HASH supplementary digest register 45"
hexmask.long 0xB4 0.--31. 1. "H45,Hash data x"
line.long 0xB8 "HASH_HR46,HASH supplementary digest register 46"
hexmask.long 0xB8 0.--31. 1. "H46,Hash data x"
line.long 0xBC "HASH_HR47,HASH supplementary digest register 47"
hexmask.long 0xBC 0.--31. 1. "H47,Hash data x"
line.long 0xC0 "HASH_HR48,HASH supplementary digest register 48"
hexmask.long 0xC0 0.--31. 1. "H48,Hash data x"
line.long 0xC4 "HASH_HR49,HASH supplementary digest register 49"
hexmask.long 0xC4 0.--31. 1. "H49,Hash data x"
tree.end
tree "SEC_HASH"
base ad:0x520C0400
group.long 0x0++0x3
line.long 0x0 "HASH_CR,HASH control register"
hexmask.long.byte 0x0 17.--20. 1. "ALGO,Algorithm selection"
bitfld.long 0x0 16. "LKEY,Long key selection" "0: HMAC key is shorter or equal to the block size..,1: HMAC key is longer than the block size (long key)."
newline
bitfld.long 0x0 13. "MDMAT,Multiple DMA transfers" "0: DCAL is automatically set at the end of a DMA..,1: DCAL is not automatically set at the end of a.."
rbitfld.long 0x0 12. "DINNE,DIN not empty" "0,1"
newline
hexmask.long.byte 0x0 8.--11. 1. "NBW,Number of words already pushed"
bitfld.long 0x0 6. "MODE,Mode selection" "0: Hash mode selected,1: HMAC mode selected."
newline
bitfld.long 0x0 4.--5. "DATATYPE,Data type selection" "0: 32-bit data.,1: 16-bit data or half-word.,2: 8-bit data or bytes.,3: bit data or bit string."
bitfld.long 0x0 3. "DMAE,DMA enable" "0: DMA transfers disabled,1: DMA transfers enabled."
newline
bitfld.long 0x0 2. "INIT,Initialize message digest calculation" "0,1"
wgroup.long 0x4++0x3
line.long 0x0 "HASH_DIN,HASH data input register"
hexmask.long 0x0 0.--31. 1. "DATAIN,Data input"
group.long 0x8++0x3
line.long 0x0 "HASH_STR,HASH start register"
bitfld.long 0x0 8. "DCAL,Digest calculation" "0,1"
hexmask.long.byte 0x0 0.--4. 1. "NBLW,Number of valid bits in the last word"
rgroup.long 0xC++0x13
line.long 0x0 "HASH_HRA0,HASH aliased digest register 0"
hexmask.long 0x0 0.--31. 1. "H0,Hash data x"
line.long 0x4 "HASH_HRA1,HASH aliased digest register 1"
hexmask.long 0x4 0.--31. 1. "H1,Hash data x"
line.long 0x8 "HASH_HRA2,HASH aliased digest register 2"
hexmask.long 0x8 0.--31. 1. "H2,Hash data x"
line.long 0xC "HASH_HRA3,HASH aliased digest register 3"
hexmask.long 0xC 0.--31. 1. "H3,Hash data x"
line.long 0x10 "HASH_HRA4,HASH aliased digest register 4"
hexmask.long 0x10 0.--31. 1. "H4,Hash data x"
group.long 0x20++0x7
line.long 0x0 "HASH_IMR,HASH interrupt enable register"
bitfld.long 0x0 1. "DCIE,Digest calculation completion interrupt enable" "0: Digest calculation completion interrupt disabled,1: Digest calculation completion interrupt enabled."
bitfld.long 0x0 0. "DINIE,Data input interrupt enable" "0: Data input interrupt disabled,1: Data input interrupt enabled"
line.long 0x4 "HASH_SR,HASH status register"
hexmask.long.byte 0x4 16.--20. 1. "NBWE,Number of words expected"
rbitfld.long 0x4 15. "DINNE,DIN not empty" "0: No data are present in the data input buffer,1: The input buffer contains at least one word of.."
newline
hexmask.long.byte 0x4 9.--13. 1. "NBWP,Number of words already pushed"
rbitfld.long 0x4 3. "BUSY,Busy bit" "0: No block is currently being processed,1: The hash core is processing a block of data"
newline
rbitfld.long 0x4 2. "DMAS,DMA Status" "0: DMA interface is disabled (DMAE=0) and no..,1: DMA interface is enabled (DMAE=1) or a transfer.."
bitfld.long 0x4 1. "DCIS,Digest calculation completion interrupt status" "0: No digest available in the HASH_HRx registers..,1: Digest calculation complete a digest is.."
newline
bitfld.long 0x4 0. "DINIS,Data input interrupt status" "0: Less than 16 locations are free in the input..,1: A new block can be entered into the input buffer."
group.long 0xF8++0x19B
line.long 0x0 "HASH_CSR0,HASH context swap register 0"
hexmask.long 0x0 0.--31. 1. "CS0,Context swap x"
line.long 0x4 "HASH_CSR1,HASH context swap register 1"
hexmask.long 0x4 0.--31. 1. "CS1,Context swap x"
line.long 0x8 "HASH_CSR2,HASH context swap register 2"
hexmask.long 0x8 0.--31. 1. "CS2,Context swap x"
line.long 0xC "HASH_CSR3,HASH context swap register 3"
hexmask.long 0xC 0.--31. 1. "CS3,Context swap x"
line.long 0x10 "HASH_CSR4,HASH context swap register 4"
hexmask.long 0x10 0.--31. 1. "CS4,Context swap x"
line.long 0x14 "HASH_CSR5,HASH context swap register 5"
hexmask.long 0x14 0.--31. 1. "CS5,Context swap x"
line.long 0x18 "HASH_CSR6,HASH context swap register 6"
hexmask.long 0x18 0.--31. 1. "CS6,Context swap x"
line.long 0x1C "HASH_CSR7,HASH context swap register 7"
hexmask.long 0x1C 0.--31. 1. "CS7,Context swap x"
line.long 0x20 "HASH_CSR8,HASH context swap register 8"
hexmask.long 0x20 0.--31. 1. "CS8,Context swap x"
line.long 0x24 "HASH_CSR9,HASH context swap register 9"
hexmask.long 0x24 0.--31. 1. "CS9,Context swap x"
line.long 0x28 "HASH_CSR10,HASH context swap register 10"
hexmask.long 0x28 0.--31. 1. "CS10,Context swap x"
line.long 0x2C "HASH_CSR11,HASH context swap register 11"
hexmask.long 0x2C 0.--31. 1. "CS11,Context swap x"
line.long 0x30 "HASH_CSR12,HASH context swap register 12"
hexmask.long 0x30 0.--31. 1. "CS12,Context swap x"
line.long 0x34 "HASH_CSR13,HASH context swap register 13"
hexmask.long 0x34 0.--31. 1. "CS13,Context swap x"
line.long 0x38 "HASH_CSR14,HASH context swap register 14"
hexmask.long 0x38 0.--31. 1. "CS14,Context swap x"
line.long 0x3C "HASH_CSR15,HASH context swap register 15"
hexmask.long 0x3C 0.--31. 1. "CS15,Context swap x"
line.long 0x40 "HASH_CSR16,HASH context swap register 16"
hexmask.long 0x40 0.--31. 1. "CS16,Context swap x"
line.long 0x44 "HASH_CSR17,HASH context swap register 17"
hexmask.long 0x44 0.--31. 1. "CS17,Context swap x"
line.long 0x48 "HASH_CSR18,HASH context swap register 18"
hexmask.long 0x48 0.--31. 1. "CS18,Context swap x"
line.long 0x4C "HASH_CSR19,HASH context swap register 19"
hexmask.long 0x4C 0.--31. 1. "CS19,Context swap x"
line.long 0x50 "HASH_CSR20,HASH context swap register 20"
hexmask.long 0x50 0.--31. 1. "CS20,Context swap x"
line.long 0x54 "HASH_CSR21,HASH context swap register 21"
hexmask.long 0x54 0.--31. 1. "CS21,Context swap x"
line.long 0x58 "HASH_CSR22,HASH context swap register 22"
hexmask.long 0x58 0.--31. 1. "CS22,Context swap x"
line.long 0x5C "HASH_CSR23,HASH context swap register 23"
hexmask.long 0x5C 0.--31. 1. "CS23,Context swap x"
line.long 0x60 "HASH_CSR24,HASH context swap register 24"
hexmask.long 0x60 0.--31. 1. "CS24,Context swap x"
line.long 0x64 "HASH_CSR25,HASH context swap register 25"
hexmask.long 0x64 0.--31. 1. "CS25,Context swap x"
line.long 0x68 "HASH_CSR26,HASH context swap register 26"
hexmask.long 0x68 0.--31. 1. "CS26,Context swap x"
line.long 0x6C "HASH_CSR27,HASH context swap register 27"
hexmask.long 0x6C 0.--31. 1. "CS27,Context swap x"
line.long 0x70 "HASH_CSR28,HASH context swap register 28"
hexmask.long 0x70 0.--31. 1. "CS28,Context swap x"
line.long 0x74 "HASH_CSR29,HASH context swap register 29"
hexmask.long 0x74 0.--31. 1. "CS29,Context swap x"
line.long 0x78 "HASH_CSR30,HASH context swap register 30"
hexmask.long 0x78 0.--31. 1. "CS30,Context swap x"
line.long 0x7C "HASH_CSR31,HASH context swap register 31"
hexmask.long 0x7C 0.--31. 1. "CS31,Context swap x"
line.long 0x80 "HASH_CSR32,HASH context swap register 32"
hexmask.long 0x80 0.--31. 1. "CS32,Context swap x"
line.long 0x84 "HASH_CSR33,HASH context swap register 33"
hexmask.long 0x84 0.--31. 1. "CS33,Context swap x"
line.long 0x88 "HASH_CSR34,HASH context swap register 34"
hexmask.long 0x88 0.--31. 1. "CS34,Context swap x"
line.long 0x8C "HASH_CSR35,HASH context swap register 35"
hexmask.long 0x8C 0.--31. 1. "CS35,Context swap x"
line.long 0x90 "HASH_CSR36,HASH context swap register 36"
hexmask.long 0x90 0.--31. 1. "CS36,Context swap x"
line.long 0x94 "HASH_CSR37,HASH context swap register 37"
hexmask.long 0x94 0.--31. 1. "CS37,Context swap x"
line.long 0x98 "HASH_CSR38,HASH context swap register 38"
hexmask.long 0x98 0.--31. 1. "CS38,Context swap x"
line.long 0x9C "HASH_CSR39,HASH context swap register 39"
hexmask.long 0x9C 0.--31. 1. "CS39,Context swap x"
line.long 0xA0 "HASH_CSR40,HASH context swap register 40"
hexmask.long 0xA0 0.--31. 1. "CS40,Context swap x"
line.long 0xA4 "HASH_CSR41,HASH context swap register 41"
hexmask.long 0xA4 0.--31. 1. "CS41,Context swap x"
line.long 0xA8 "HASH_CSR42,HASH context swap register 42"
hexmask.long 0xA8 0.--31. 1. "CS42,Context swap x"
line.long 0xAC "HASH_CSR43,HASH context swap register 43"
hexmask.long 0xAC 0.--31. 1. "CS43,Context swap x"
line.long 0xB0 "HASH_CSR44,HASH context swap register 44"
hexmask.long 0xB0 0.--31. 1. "CS44,Context swap x"
line.long 0xB4 "HASH_CSR45,HASH context swap register 45"
hexmask.long 0xB4 0.--31. 1. "CS45,Context swap x"
line.long 0xB8 "HASH_CSR46,HASH context swap register 46"
hexmask.long 0xB8 0.--31. 1. "CS46,Context swap x"
line.long 0xBC "HASH_CSR47,HASH context swap register 47"
hexmask.long 0xBC 0.--31. 1. "CS47,Context swap x"
line.long 0xC0 "HASH_CSR48,HASH context swap register 48"
hexmask.long 0xC0 0.--31. 1. "CS48,Context swap x"
line.long 0xC4 "HASH_CSR49,HASH context swap register 49"
hexmask.long 0xC4 0.--31. 1. "CS49,Context swap x"
line.long 0xC8 "HASH_CSR50,HASH context swap register 50"
hexmask.long 0xC8 0.--31. 1. "CS50,Context swap x"
line.long 0xCC "HASH_CSR51,HASH context swap register 51"
hexmask.long 0xCC 0.--31. 1. "CS51,Context swap x"
line.long 0xD0 "HASH_CSR52,HASH context swap register 52"
hexmask.long 0xD0 0.--31. 1. "CS52,Context swap x"
line.long 0xD4 "HASH_CSR53,HASH context swap register 53"
hexmask.long 0xD4 0.--31. 1. "CS53,Context swap x"
line.long 0xD8 "HASH_CSR54,HASH context swap register 54"
hexmask.long 0xD8 0.--31. 1. "CS54,Context swap x"
line.long 0xDC "HASH_CSR55,HASH context swap register 55"
hexmask.long 0xDC 0.--31. 1. "CS55,Context swap x"
line.long 0xE0 "HASH_CSR56,HASH context swap register 56"
hexmask.long 0xE0 0.--31. 1. "CS56,Context swap x"
line.long 0xE4 "HASH_CSR57,HASH context swap register 57"
hexmask.long 0xE4 0.--31. 1. "CS57,Context swap x"
line.long 0xE8 "HASH_CSR58,HASH context swap register 58"
hexmask.long 0xE8 0.--31. 1. "CS58,Context swap x"
line.long 0xEC "HASH_CSR59,HASH context swap register 59"
hexmask.long 0xEC 0.--31. 1. "CS59,Context swap x"
line.long 0xF0 "HASH_CSR60,HASH context swap register 60"
hexmask.long 0xF0 0.--31. 1. "CS60,Context swap x"
line.long 0xF4 "HASH_CSR61,HASH context swap register 61"
hexmask.long 0xF4 0.--31. 1. "CS61,Context swap x"
line.long 0xF8 "HASH_CSR62,HASH context swap register 62"
hexmask.long 0xF8 0.--31. 1. "CS62,Context swap x"
line.long 0xFC "HASH_CSR63,HASH context swap register 63"
hexmask.long 0xFC 0.--31. 1. "CS63,Context swap x"
line.long 0x100 "HASH_CSR64,HASH context swap register 64"
hexmask.long 0x100 0.--31. 1. "CS64,Context swap x"
line.long 0x104 "HASH_CSR65,HASH context swap register 65"
hexmask.long 0x104 0.--31. 1. "CS65,Context swap x"
line.long 0x108 "HASH_CSR66,HASH context swap register 66"
hexmask.long 0x108 0.--31. 1. "CS66,Context swap x"
line.long 0x10C "HASH_CSR67,HASH context swap register 67"
hexmask.long 0x10C 0.--31. 1. "CS67,Context swap x"
line.long 0x110 "HASH_CSR68,HASH context swap register 68"
hexmask.long 0x110 0.--31. 1. "CS68,Context swap x"
line.long 0x114 "HASH_CSR69,HASH context swap register 69"
hexmask.long 0x114 0.--31. 1. "CS69,Context swap x"
line.long 0x118 "HASH_CSR70,HASH context swap register 70"
hexmask.long 0x118 0.--31. 1. "CS70,Context swap x"
line.long 0x11C "HASH_CSR71,HASH context swap register 71"
hexmask.long 0x11C 0.--31. 1. "CS71,Context swap x"
line.long 0x120 "HASH_CSR72,HASH context swap register 72"
hexmask.long 0x120 0.--31. 1. "CS72,Context swap x"
line.long 0x124 "HASH_CSR73,HASH context swap register 73"
hexmask.long 0x124 0.--31. 1. "CS73,Context swap x"
line.long 0x128 "HASH_CSR74,HASH context swap register 74"
hexmask.long 0x128 0.--31. 1. "CS74,Context swap x"
line.long 0x12C "HASH_CSR75,HASH context swap register 75"
hexmask.long 0x12C 0.--31. 1. "CS75,Context swap x"
line.long 0x130 "HASH_CSR76,HASH context swap register 76"
hexmask.long 0x130 0.--31. 1. "CS76,Context swap x"
line.long 0x134 "HASH_CSR77,HASH context swap register 77"
hexmask.long 0x134 0.--31. 1. "CS77,Context swap x"
line.long 0x138 "HASH_CSR78,HASH context swap register 78"
hexmask.long 0x138 0.--31. 1. "CS78,Context swap x"
line.long 0x13C "HASH_CSR79,HASH context swap register 79"
hexmask.long 0x13C 0.--31. 1. "CS79,Context swap x"
line.long 0x140 "HASH_CSR80,HASH context swap register 80"
hexmask.long 0x140 0.--31. 1. "CS80,Context swap x"
line.long 0x144 "HASH_CSR81,HASH context swap register 81"
hexmask.long 0x144 0.--31. 1. "CS81,Context swap x"
line.long 0x148 "HASH_CSR82,HASH context swap register 82"
hexmask.long 0x148 0.--31. 1. "CS82,Context swap x"
line.long 0x14C "HASH_CSR83,HASH context swap register 83"
hexmask.long 0x14C 0.--31. 1. "CS83,Context swap x"
line.long 0x150 "HASH_CSR84,HASH context swap register 84"
hexmask.long 0x150 0.--31. 1. "CS84,Context swap x"
line.long 0x154 "HASH_CSR85,HASH context swap register 85"
hexmask.long 0x154 0.--31. 1. "CS85,Context swap x"
line.long 0x158 "HASH_CSR86,HASH context swap register 86"
hexmask.long 0x158 0.--31. 1. "CS86,Context swap x"
line.long 0x15C "HASH_CSR87,HASH context swap register 87"
hexmask.long 0x15C 0.--31. 1. "CS87,Context swap x"
line.long 0x160 "HASH_CSR88,HASH context swap register 88"
hexmask.long 0x160 0.--31. 1. "CS88,Context swap x"
line.long 0x164 "HASH_CSR89,HASH context swap register 89"
hexmask.long 0x164 0.--31. 1. "CS89,Context swap x"
line.long 0x168 "HASH_CSR90,HASH context swap register 90"
hexmask.long 0x168 0.--31. 1. "CS90,Context swap x"
line.long 0x16C "HASH_CSR91,HASH context swap register 91"
hexmask.long 0x16C 0.--31. 1. "CS91,Context swap x"
line.long 0x170 "HASH_CSR92,HASH context swap register 92"
hexmask.long 0x170 0.--31. 1. "CS92,Context swap x"
line.long 0x174 "HASH_CSR93,HASH context swap register 93"
hexmask.long 0x174 0.--31. 1. "CS93,Context swap x"
line.long 0x178 "HASH_CSR94,HASH context swap register 94"
hexmask.long 0x178 0.--31. 1. "CS94,Context swap x"
line.long 0x17C "HASH_CSR95,HASH context swap register 95"
hexmask.long 0x17C 0.--31. 1. "CS95,Context swap x"
line.long 0x180 "HASH_CSR96,HASH context swap register 96"
hexmask.long 0x180 0.--31. 1. "CS96,Context swap x"
line.long 0x184 "HASH_CSR97,HASH context swap register 97"
hexmask.long 0x184 0.--31. 1. "CS97,Context swap x"
line.long 0x188 "HASH_CSR98,HASH context swap register 98"
hexmask.long 0x188 0.--31. 1. "CS98,Context swap x"
line.long 0x18C "HASH_CSR99,HASH context swap register 99"
hexmask.long 0x18C 0.--31. 1. "CS99,Context swap x"
line.long 0x190 "HASH_CSR100,HASH context swap register 100"
hexmask.long 0x190 0.--31. 1. "CS100,Context swap x"
line.long 0x194 "HASH_CSR101,HASH context swap register 101"
hexmask.long 0x194 0.--31. 1. "CS101,Context swap x"
line.long 0x198 "HASH_CSR102,HASH context swap register 102"
hexmask.long 0x198 0.--31. 1. "CS102,Context swap x"
rgroup.long 0x310++0xC7
line.long 0x0 "HASH_HR0,HASH digest register 0"
hexmask.long 0x0 0.--31. 1. "H0,Hash data x"
line.long 0x4 "HASH_HR1,HASH digest register 1"
hexmask.long 0x4 0.--31. 1. "H1,Hash data x"
line.long 0x8 "HASH_HR2,HASH digest register 2"
hexmask.long 0x8 0.--31. 1. "H2,Hash data x"
line.long 0xC "HASH_HR3,HASH digest register 3"
hexmask.long 0xC 0.--31. 1. "H3,Hash data x"
line.long 0x10 "HASH_HR4,HASH digest register 4"
hexmask.long 0x10 0.--31. 1. "H4,Hash data x"
line.long 0x14 "HASH_HR5,HASH supplementary digest register 5"
hexmask.long 0x14 0.--31. 1. "H5,Hash data x"
line.long 0x18 "HASH_HR6,HASH supplementary digest register 6"
hexmask.long 0x18 0.--31. 1. "H6,Hash data x"
line.long 0x1C "HASH_HR7,HASH supplementary digest register 7"
hexmask.long 0x1C 0.--31. 1. "H7,Hash data x"
line.long 0x20 "HASH_HR8,HASH supplementary digest register 8"
hexmask.long 0x20 0.--31. 1. "H8,Hash data x"
line.long 0x24 "HASH_HR9,HASH supplementary digest register 9"
hexmask.long 0x24 0.--31. 1. "H9,Hash data x"
line.long 0x28 "HASH_HR10,HASH supplementary digest register 10"
hexmask.long 0x28 0.--31. 1. "H10,Hash data x"
line.long 0x2C "HASH_HR11,HASH supplementary digest register 11"
hexmask.long 0x2C 0.--31. 1. "H11,Hash data x"
line.long 0x30 "HASH_HR12,HASH supplementary digest register 12"
hexmask.long 0x30 0.--31. 1. "H12,Hash data x"
line.long 0x34 "HASH_HR13,HASH supplementary digest register 13"
hexmask.long 0x34 0.--31. 1. "H13,Hash data x"
line.long 0x38 "HASH_HR14,HASH supplementary digest register 14"
hexmask.long 0x38 0.--31. 1. "H14,Hash data x"
line.long 0x3C "HASH_HR15,HASH supplementary digest register 15"
hexmask.long 0x3C 0.--31. 1. "H15,Hash data x"
line.long 0x40 "HASH_HR16,HASH supplementary digest register 16"
hexmask.long 0x40 0.--31. 1. "H16,Hash data x"
line.long 0x44 "HASH_HR17,HASH supplementary digest register 17"
hexmask.long 0x44 0.--31. 1. "H17,Hash data x"
line.long 0x48 "HASH_HR18,HASH supplementary digest register 18"
hexmask.long 0x48 0.--31. 1. "H18,Hash data x"
line.long 0x4C "HASH_HR19,HASH supplementary digest register 19"
hexmask.long 0x4C 0.--31. 1. "H19,Hash data x"
line.long 0x50 "HASH_HR20,HASH supplementary digest register 20"
hexmask.long 0x50 0.--31. 1. "H20,Hash data x"
line.long 0x54 "HASH_HR21,HASH supplementary digest register 21"
hexmask.long 0x54 0.--31. 1. "H21,Hash data x"
line.long 0x58 "HASH_HR22,HASH supplementary digest register 22"
hexmask.long 0x58 0.--31. 1. "H22,Hash data x"
line.long 0x5C "HASH_HR23,HASH supplementary digest register 23"
hexmask.long 0x5C 0.--31. 1. "H23,Hash data x"
line.long 0x60 "HASH_HR24,HASH supplementary digest register 24"
hexmask.long 0x60 0.--31. 1. "H24,Hash data x"
line.long 0x64 "HASH_HR25,HASH supplementary digest register 25"
hexmask.long 0x64 0.--31. 1. "H25,Hash data x"
line.long 0x68 "HASH_HR26,HASH supplementary digest register 26"
hexmask.long 0x68 0.--31. 1. "H26,Hash data x"
line.long 0x6C "HASH_HR27,HASH supplementary digest register 27"
hexmask.long 0x6C 0.--31. 1. "H27,Hash data x"
line.long 0x70 "HASH_HR28,HASH supplementary digest register 28"
hexmask.long 0x70 0.--31. 1. "H28,Hash data x"
line.long 0x74 "HASH_HR29,HASH supplementary digest register 29"
hexmask.long 0x74 0.--31. 1. "H29,Hash data x"
line.long 0x78 "HASH_HR30,HASH supplementary digest register 30"
hexmask.long 0x78 0.--31. 1. "H30,Hash data x"
line.long 0x7C "HASH_HR31,HASH supplementary digest register 31"
hexmask.long 0x7C 0.--31. 1. "H31,Hash data x"
line.long 0x80 "HASH_HR32,HASH supplementary digest register 32"
hexmask.long 0x80 0.--31. 1. "H32,Hash data x"
line.long 0x84 "HASH_HR33,HASH supplementary digest register 33"
hexmask.long 0x84 0.--31. 1. "H33,Hash data x"
line.long 0x88 "HASH_HR34,HASH supplementary digest register 34"
hexmask.long 0x88 0.--31. 1. "H34,Hash data x"
line.long 0x8C "HASH_HR35,HASH supplementary digest register 35"
hexmask.long 0x8C 0.--31. 1. "H35,Hash data x"
line.long 0x90 "HASH_HR36,HASH supplementary digest register 36"
hexmask.long 0x90 0.--31. 1. "H36,Hash data x"
line.long 0x94 "HASH_HR37,HASH supplementary digest register 37"
hexmask.long 0x94 0.--31. 1. "H37,Hash data x"
line.long 0x98 "HASH_HR38,HASH supplementary digest register 38"
hexmask.long 0x98 0.--31. 1. "H38,Hash data x"
line.long 0x9C "HASH_HR39,HASH supplementary digest register 39"
hexmask.long 0x9C 0.--31. 1. "H39,Hash data x"
line.long 0xA0 "HASH_HR40,HASH supplementary digest register 40"
hexmask.long 0xA0 0.--31. 1. "H40,Hash data x"
line.long 0xA4 "HASH_HR41,HASH supplementary digest register 41"
hexmask.long 0xA4 0.--31. 1. "H41,Hash data x"
line.long 0xA8 "HASH_HR42,HASH supplementary digest register 42"
hexmask.long 0xA8 0.--31. 1. "H42,Hash data x"
line.long 0xAC "HASH_HR43,HASH supplementary digest register 43"
hexmask.long 0xAC 0.--31. 1. "H43,Hash data x"
line.long 0xB0 "HASH_HR44,HASH supplementary digest register 44"
hexmask.long 0xB0 0.--31. 1. "H44,Hash data x"
line.long 0xB4 "HASH_HR45,HASH supplementary digest register 45"
hexmask.long 0xB4 0.--31. 1. "H45,Hash data x"
line.long 0xB8 "HASH_HR46,HASH supplementary digest register 46"
hexmask.long 0xB8 0.--31. 1. "H46,Hash data x"
line.long 0xBC "HASH_HR47,HASH supplementary digest register 47"
hexmask.long 0xBC 0.--31. 1. "H47,Hash data x"
line.long 0xC0 "HASH_HR48,HASH supplementary digest register 48"
hexmask.long 0xC0 0.--31. 1. "H48,Hash data x"
line.long 0xC4 "HASH_HR49,HASH supplementary digest register 49"
hexmask.long 0xC4 0.--31. 1. "H49,Hash data x"
tree.end
tree.end
tree "I2C (Inter-Integrated Circuit Interface)"
base ad:0x0
tree "I2C1"
base ad:0x40005400
group.long 0x0++0x1B
line.long 0x0 "I2C_CR1,I2C control register 1"
bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "0: STOPF flag is set by hardware cleared by..,1: STOPF flag remains cleared by hardware."
bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "0: ADDR flag is set by hardware cleared by software..,1: ADDR flag remains cleared by hardware."
newline
bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "0: 20 mA I/O drive disabled,1: 20 mA I/O drive enabled"
bitfld.long 0x0 23. "PECEN,PEC enable" "0: PEC calculation disabled,1: PEC calculation enabled"
newline
bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "0: The SMBALERT# signal on SMBA pin is not..,1: The SMBALERT# signal on SMBA pin is supported in.."
bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "0: Device default address disabled.,1: Device default address enabled."
newline
bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "0: Host address disabled.,1: Host address enabled."
bitfld.long 0x0 19. "GCEN,General call enable" "0: General call disabled.,1: General call enabled."
newline
bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "0: Wake-up from Stop mode disabled.,1: Wake-up from Stop mode enabled."
bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "0: Clock stretching enabled,1: Clock stretching disabled"
newline
bitfld.long 0x0 16. "SBC,Slave byte control" "0: Slave byte control disabled,1: Slave byte control enabled"
bitfld.long 0x0 15. "RxDMAEN,DMA reception requests enable" "0: DMA mode disabled for reception,1: DMA mode enabled for reception"
newline
bitfld.long 0x0 14. "TxDMAEN,DMA transmission requests enable" "0: DMA mode disabled for transmission,1: DMA mode enabled for transmission"
bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "0: Analog noise filter enabled,1: Analog noise filter disabled"
newline
hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter"
bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "0: Error detection interrupts disabled,1: Error detection interrupts enabled"
newline
bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "0: Transfer complete interrupt disabled,1: Transfer complete interrupt enabled"
bitfld.long 0x0 5. "STOPIE,STOP detection interrupt enable" "0: STOP detection (STOPF) interrupt disabled,1: STOP detection (STOPF) interrupt enabled"
newline
bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "0: Not acknowledge (NACKF) received interrupts..,1: Not acknowledge (NACKF) received interrupts.."
bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "0: Address match (ADDR) interrupts disabled,1: Address match (ADDR) interrupts enabled"
newline
bitfld.long 0x0 2. "RxIE,Rx interrupt enable" "0: Receive (RxNE) interrupt disabled,1: Receive (RxNE) interrupt enabled"
bitfld.long 0x0 1. "TxIE,Tx interrupt enable" "0: Transmit (TxIS) interrupt disabled,1: Transmit (TxIS) interrupt enabled"
newline
bitfld.long 0x0 0. "PE,Peripheral enable" "0: Peripheral disabled,1: Peripheral enabled"
line.long 0x4 "I2C_CR2,I2C control register 2"
bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "0: No PEC transfer,1: PEC transmission/reception is requested"
bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "0: software end mode: TC flag is set when NBYTES..,1: Automatic end mode: a STOP condition is.."
newline
bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "0: The transfer is completed after the NBYTES data..,1: The transfer is not completed after the NBYTES.."
hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes"
newline
bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "0: an ACK is sent after current received byte.,1: a NACK is sent after current received byte."
bitfld.long 0x4 14. "STOP,STOP condition generation" "0: No STOP generation,1: STOP generation after current byte transfer"
newline
bitfld.long 0x4 13. "START,START condition generation" "0: No START generation,1: RESTART/START generation:"
bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "0: The master sends the complete 10-bit slave..,1: The master sends only the first seven bits of.."
newline
bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "0: The master operates in 7-bit addressing mode,1: The master operates in 10-bit addressing mode"
bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "0: Master requests a write transfer,1: Master requests a read transfer"
newline
hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)"
line.long 0x8 "I2C_OAR1,I2C own address 1 register"
bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "0: Own address 1 disabled.,1: Own address 1 enabled."
bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "0: Own address 1 is a 7-bit address.,1: Own address 1 is a 10-bit address."
newline
hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address"
line.long 0xC "I2C_OAR2,I2C own address 2 register"
bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "0: Own address 2 disabled.,1: Own address 2 enabled."
bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "0: No mask,1: OA2[1] is masked and don't care.,2: OA2[2:1] are masked and don't care.,3: OA2[3:1] are masked and don't care.,4: OA2[4:1] are masked and don't care.,5: OA2[5:1] are masked and don't care.,6: OA2[6:1] are masked and don't care.,7: OA2[7:1] are masked and don't care."
newline
hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address"
line.long 0x10 "I2C_TIMINGR,I2C timing register"
hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler"
hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time"
newline
hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time"
hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)"
newline
hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)"
line.long 0x14 "I2C_TIMEOUTR,I2C timeout register"
bitfld.long 0x14 31. "TExTEN,Extended clock timeout enable" "0: Extended clock timeout detection is disabled,1: Extended clock timeout detection is enabled."
hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B"
newline
bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "0: SCL timeout detection is disabled,1: SCL timeout detection is enabled."
bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "0: TIMEOUTA is used to detect SCL low timeout,1: TIMEOUTA is used to detect both SCL and SDA high.."
newline
hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A"
line.long 0x18 "I2C_ISR,I2C interrupt and status register"
hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)"
rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "0: Write transfer slave enters receiver mode.,1: Read transfer slave enters transmitter mode."
newline
rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1"
rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1"
newline
rbitfld.long 0x18 12. "TIMEOUT,Timeout or tless thansub>LOWless than/sub> detection flag" "0,1"
rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1"
newline
rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1"
rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1"
newline
rbitfld.long 0x18 8. "BERR,Bus error" "0,1"
rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1"
newline
rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1"
rbitfld.long 0x18 5. "STOPF,STOP detection flag" "0,1"
newline
rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1"
rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1"
newline
rbitfld.long 0x18 2. "RxNE,Receive data register not empty (receivers)" "0,1"
bitfld.long 0x18 1. "TxIS,Transmit interrupt status (transmitters)" "0,1"
newline
bitfld.long 0x18 0. "TxE,Transmit data register empty (transmitters)" "0,1"
wgroup.long 0x1C++0x3
line.long 0x0 "I2C_ICR,I2C interrupt clear register"
bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1"
bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1"
newline
bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1"
bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1"
newline
bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1"
bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1"
newline
bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1"
bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1"
newline
bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1"
rgroup.long 0x20++0x7
line.long 0x0 "I2C_PECR,I2C PEC register"
hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register"
line.long 0x4 "I2C_RxDR,I2C receive data register"
hexmask.long.byte 0x4 0.--7. 1. "RxDATA,8-bit receive data"
group.long 0x28++0x7
line.long 0x0 "I2C_TxDR,I2C transmit data register"
hexmask.long.byte 0x0 0.--7. 1. "TxDATA,8-bit transmit data"
line.long 0x4 "I2C_AUTOCR,I2C autonomous mode control register"
bitfld.long 0x4 21. "TRIGEN,Trigger enable" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section45."
bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "0: DMA request not generated on Transfer Complete..,1: DMA request generated on Transfer Complete.."
newline
bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "0: DMA request not generated on Transfer Complete..,1: DMA request generated on Transfer Complete event"
tree.end
tree "SEC_I2C1"
base ad:0x50005400
group.long 0x0++0x1B
line.long 0x0 "I2C_CR1,I2C control register 1"
bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "0: STOPF flag is set by hardware cleared by..,1: STOPF flag remains cleared by hardware."
bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "0: ADDR flag is set by hardware cleared by software..,1: ADDR flag remains cleared by hardware."
newline
bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "0: 20 mA I/O drive disabled,1: 20 mA I/O drive enabled"
bitfld.long 0x0 23. "PECEN,PEC enable" "0: PEC calculation disabled,1: PEC calculation enabled"
newline
bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "0: The SMBALERT# signal on SMBA pin is not..,1: The SMBALERT# signal on SMBA pin is supported in.."
bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "0: Device default address disabled.,1: Device default address enabled."
newline
bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "0: Host address disabled.,1: Host address enabled."
bitfld.long 0x0 19. "GCEN,General call enable" "0: General call disabled.,1: General call enabled."
newline
bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "0: Wake-up from Stop mode disabled.,1: Wake-up from Stop mode enabled."
bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "0: Clock stretching enabled,1: Clock stretching disabled"
newline
bitfld.long 0x0 16. "SBC,Slave byte control" "0: Slave byte control disabled,1: Slave byte control enabled"
bitfld.long 0x0 15. "RxDMAEN,DMA reception requests enable" "0: DMA mode disabled for reception,1: DMA mode enabled for reception"
newline
bitfld.long 0x0 14. "TxDMAEN,DMA transmission requests enable" "0: DMA mode disabled for transmission,1: DMA mode enabled for transmission"
bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "0: Analog noise filter enabled,1: Analog noise filter disabled"
newline
hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter"
bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "0: Error detection interrupts disabled,1: Error detection interrupts enabled"
newline
bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "0: Transfer complete interrupt disabled,1: Transfer complete interrupt enabled"
bitfld.long 0x0 5. "STOPIE,STOP detection interrupt enable" "0: STOP detection (STOPF) interrupt disabled,1: STOP detection (STOPF) interrupt enabled"
newline
bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "0: Not acknowledge (NACKF) received interrupts..,1: Not acknowledge (NACKF) received interrupts.."
bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "0: Address match (ADDR) interrupts disabled,1: Address match (ADDR) interrupts enabled"
newline
bitfld.long 0x0 2. "RxIE,Rx interrupt enable" "0: Receive (RxNE) interrupt disabled,1: Receive (RxNE) interrupt enabled"
bitfld.long 0x0 1. "TxIE,Tx interrupt enable" "0: Transmit (TxIS) interrupt disabled,1: Transmit (TxIS) interrupt enabled"
newline
bitfld.long 0x0 0. "PE,Peripheral enable" "0: Peripheral disabled,1: Peripheral enabled"
line.long 0x4 "I2C_CR2,I2C control register 2"
bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "0: No PEC transfer,1: PEC transmission/reception is requested"
bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "0: software end mode: TC flag is set when NBYTES..,1: Automatic end mode: a STOP condition is.."
newline
bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "0: The transfer is completed after the NBYTES data..,1: The transfer is not completed after the NBYTES.."
hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes"
newline
bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "0: an ACK is sent after current received byte.,1: a NACK is sent after current received byte."
bitfld.long 0x4 14. "STOP,STOP condition generation" "0: No STOP generation,1: STOP generation after current byte transfer"
newline
bitfld.long 0x4 13. "START,START condition generation" "0: No START generation,1: RESTART/START generation:"
bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "0: The master sends the complete 10-bit slave..,1: The master sends only the first seven bits of.."
newline
bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "0: The master operates in 7-bit addressing mode,1: The master operates in 10-bit addressing mode"
bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "0: Master requests a write transfer,1: Master requests a read transfer"
newline
hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)"
line.long 0x8 "I2C_OAR1,I2C own address 1 register"
bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "0: Own address 1 disabled.,1: Own address 1 enabled."
bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "0: Own address 1 is a 7-bit address.,1: Own address 1 is a 10-bit address."
newline
hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address"
line.long 0xC "I2C_OAR2,I2C own address 2 register"
bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "0: Own address 2 disabled.,1: Own address 2 enabled."
bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "0: No mask,1: OA2[1] is masked and don't care.,2: OA2[2:1] are masked and don't care.,3: OA2[3:1] are masked and don't care.,4: OA2[4:1] are masked and don't care.,5: OA2[5:1] are masked and don't care.,6: OA2[6:1] are masked and don't care.,7: OA2[7:1] are masked and don't care."
newline
hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address"
line.long 0x10 "I2C_TIMINGR,I2C timing register"
hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler"
hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time"
newline
hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time"
hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)"
newline
hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)"
line.long 0x14 "I2C_TIMEOUTR,I2C timeout register"
bitfld.long 0x14 31. "TExTEN,Extended clock timeout enable" "0: Extended clock timeout detection is disabled,1: Extended clock timeout detection is enabled."
hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B"
newline
bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "0: SCL timeout detection is disabled,1: SCL timeout detection is enabled."
bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "0: TIMEOUTA is used to detect SCL low timeout,1: TIMEOUTA is used to detect both SCL and SDA high.."
newline
hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A"
line.long 0x18 "I2C_ISR,I2C interrupt and status register"
hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)"
rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "0: Write transfer slave enters receiver mode.,1: Read transfer slave enters transmitter mode."
newline
rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1"
rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1"
newline
rbitfld.long 0x18 12. "TIMEOUT,Timeout or tless thansub>LOWless than/sub> detection flag" "0,1"
rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1"
newline
rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1"
rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1"
newline
rbitfld.long 0x18 8. "BERR,Bus error" "0,1"
rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1"
newline
rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1"
rbitfld.long 0x18 5. "STOPF,STOP detection flag" "0,1"
newline
rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1"
rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1"
newline
rbitfld.long 0x18 2. "RxNE,Receive data register not empty (receivers)" "0,1"
bitfld.long 0x18 1. "TxIS,Transmit interrupt status (transmitters)" "0,1"
newline
bitfld.long 0x18 0. "TxE,Transmit data register empty (transmitters)" "0,1"
wgroup.long 0x1C++0x3
line.long 0x0 "I2C_ICR,I2C interrupt clear register"
bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1"
bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1"
newline
bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1"
bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1"
newline
bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1"
bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1"
newline
bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1"
bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1"
newline
bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1"
rgroup.long 0x20++0x7
line.long 0x0 "I2C_PECR,I2C PEC register"
hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register"
line.long 0x4 "I2C_RxDR,I2C receive data register"
hexmask.long.byte 0x4 0.--7. 1. "RxDATA,8-bit receive data"
group.long 0x28++0x7
line.long 0x0 "I2C_TxDR,I2C transmit data register"
hexmask.long.byte 0x0 0.--7. 1. "TxDATA,8-bit transmit data"
line.long 0x4 "I2C_AUTOCR,I2C autonomous mode control register"
bitfld.long 0x4 21. "TRIGEN,Trigger enable" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section45."
bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "0: DMA request not generated on Transfer Complete..,1: DMA request generated on Transfer Complete.."
newline
bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "0: DMA request not generated on Transfer Complete..,1: DMA request generated on Transfer Complete event"
tree.end
tree "I2C2"
base ad:0x40005800
group.long 0x0++0x1B
line.long 0x0 "I2C_CR1,I2C control register 1"
bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "0: STOPF flag is set by hardware cleared by..,1: STOPF flag remains cleared by hardware."
bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "0: ADDR flag is set by hardware cleared by software..,1: ADDR flag remains cleared by hardware."
newline
bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "0: 20 mA I/O drive disabled,1: 20 mA I/O drive enabled"
bitfld.long 0x0 23. "PECEN,PEC enable" "0: PEC calculation disabled,1: PEC calculation enabled"
newline
bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "0: The SMBALERT# signal on SMBA pin is not..,1: The SMBALERT# signal on SMBA pin is supported in.."
bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "0: Device default address disabled.,1: Device default address enabled."
newline
bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "0: Host address disabled.,1: Host address enabled."
bitfld.long 0x0 19. "GCEN,General call enable" "0: General call disabled.,1: General call enabled."
newline
bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "0: Wake-up from Stop mode disabled.,1: Wake-up from Stop mode enabled."
bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "0: Clock stretching enabled,1: Clock stretching disabled"
newline
bitfld.long 0x0 16. "SBC,Slave byte control" "0: Slave byte control disabled,1: Slave byte control enabled"
bitfld.long 0x0 15. "RxDMAEN,DMA reception requests enable" "0: DMA mode disabled for reception,1: DMA mode enabled for reception"
newline
bitfld.long 0x0 14. "TxDMAEN,DMA transmission requests enable" "0: DMA mode disabled for transmission,1: DMA mode enabled for transmission"
bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "0: Analog noise filter enabled,1: Analog noise filter disabled"
newline
hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter"
bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "0: Error detection interrupts disabled,1: Error detection interrupts enabled"
newline
bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "0: Transfer complete interrupt disabled,1: Transfer complete interrupt enabled"
bitfld.long 0x0 5. "STOPIE,STOP detection interrupt enable" "0: STOP detection (STOPF) interrupt disabled,1: STOP detection (STOPF) interrupt enabled"
newline
bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "0: Not acknowledge (NACKF) received interrupts..,1: Not acknowledge (NACKF) received interrupts.."
bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "0: Address match (ADDR) interrupts disabled,1: Address match (ADDR) interrupts enabled"
newline
bitfld.long 0x0 2. "RxIE,Rx interrupt enable" "0: Receive (RxNE) interrupt disabled,1: Receive (RxNE) interrupt enabled"
bitfld.long 0x0 1. "TxIE,Tx interrupt enable" "0: Transmit (TxIS) interrupt disabled,1: Transmit (TxIS) interrupt enabled"
newline
bitfld.long 0x0 0. "PE,Peripheral enable" "0: Peripheral disabled,1: Peripheral enabled"
line.long 0x4 "I2C_CR2,I2C control register 2"
bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "0: No PEC transfer,1: PEC transmission/reception is requested"
bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "0: software end mode: TC flag is set when NBYTES..,1: Automatic end mode: a STOP condition is.."
newline
bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "0: The transfer is completed after the NBYTES data..,1: The transfer is not completed after the NBYTES.."
hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes"
newline
bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "0: an ACK is sent after current received byte.,1: a NACK is sent after current received byte."
bitfld.long 0x4 14. "STOP,STOP condition generation" "0: No STOP generation,1: STOP generation after current byte transfer"
newline
bitfld.long 0x4 13. "START,START condition generation" "0: No START generation,1: RESTART/START generation:"
bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "0: The master sends the complete 10-bit slave..,1: The master sends only the first seven bits of.."
newline
bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "0: The master operates in 7-bit addressing mode,1: The master operates in 10-bit addressing mode"
bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "0: Master requests a write transfer,1: Master requests a read transfer"
newline
hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)"
line.long 0x8 "I2C_OAR1,I2C own address 1 register"
bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "0: Own address 1 disabled.,1: Own address 1 enabled."
bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "0: Own address 1 is a 7-bit address.,1: Own address 1 is a 10-bit address."
newline
hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address"
line.long 0xC "I2C_OAR2,I2C own address 2 register"
bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "0: Own address 2 disabled.,1: Own address 2 enabled."
bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "0: No mask,1: OA2[1] is masked and don't care.,2: OA2[2:1] are masked and don't care.,3: OA2[3:1] are masked and don't care.,4: OA2[4:1] are masked and don't care.,5: OA2[5:1] are masked and don't care.,6: OA2[6:1] are masked and don't care.,7: OA2[7:1] are masked and don't care."
newline
hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address"
line.long 0x10 "I2C_TIMINGR,I2C timing register"
hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler"
hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time"
newline
hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time"
hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)"
newline
hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)"
line.long 0x14 "I2C_TIMEOUTR,I2C timeout register"
bitfld.long 0x14 31. "TExTEN,Extended clock timeout enable" "0: Extended clock timeout detection is disabled,1: Extended clock timeout detection is enabled."
hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B"
newline
bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "0: SCL timeout detection is disabled,1: SCL timeout detection is enabled."
bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "0: TIMEOUTA is used to detect SCL low timeout,1: TIMEOUTA is used to detect both SCL and SDA high.."
newline
hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A"
line.long 0x18 "I2C_ISR,I2C interrupt and status register"
hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)"
rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "0: Write transfer slave enters receiver mode.,1: Read transfer slave enters transmitter mode."
newline
rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1"
rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1"
newline
rbitfld.long 0x18 12. "TIMEOUT,Timeout or tless thansub>LOWless than/sub> detection flag" "0,1"
rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1"
newline
rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1"
rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1"
newline
rbitfld.long 0x18 8. "BERR,Bus error" "0,1"
rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1"
newline
rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1"
rbitfld.long 0x18 5. "STOPF,STOP detection flag" "0,1"
newline
rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1"
rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1"
newline
rbitfld.long 0x18 2. "RxNE,Receive data register not empty (receivers)" "0,1"
bitfld.long 0x18 1. "TxIS,Transmit interrupt status (transmitters)" "0,1"
newline
bitfld.long 0x18 0. "TxE,Transmit data register empty (transmitters)" "0,1"
wgroup.long 0x1C++0x3
line.long 0x0 "I2C_ICR,I2C interrupt clear register"
bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1"
bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1"
newline
bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1"
bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1"
newline
bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1"
bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1"
newline
bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1"
bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1"
newline
bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1"
rgroup.long 0x20++0x7
line.long 0x0 "I2C_PECR,I2C PEC register"
hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register"
line.long 0x4 "I2C_RxDR,I2C receive data register"
hexmask.long.byte 0x4 0.--7. 1. "RxDATA,8-bit receive data"
group.long 0x28++0x7
line.long 0x0 "I2C_TxDR,I2C transmit data register"
hexmask.long.byte 0x0 0.--7. 1. "TxDATA,8-bit transmit data"
line.long 0x4 "I2C_AUTOCR,I2C autonomous mode control register"
bitfld.long 0x4 21. "TRIGEN,Trigger enable" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section45."
bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "0: DMA request not generated on Transfer Complete..,1: DMA request generated on Transfer Complete.."
newline
bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "0: DMA request not generated on Transfer Complete..,1: DMA request generated on Transfer Complete event"
tree.end
tree "SEC_I2C2"
base ad:0x50005800
group.long 0x0++0x1B
line.long 0x0 "I2C_CR1,I2C control register 1"
bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "0: STOPF flag is set by hardware cleared by..,1: STOPF flag remains cleared by hardware."
bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "0: ADDR flag is set by hardware cleared by software..,1: ADDR flag remains cleared by hardware."
newline
bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "0: 20 mA I/O drive disabled,1: 20 mA I/O drive enabled"
bitfld.long 0x0 23. "PECEN,PEC enable" "0: PEC calculation disabled,1: PEC calculation enabled"
newline
bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "0: The SMBALERT# signal on SMBA pin is not..,1: The SMBALERT# signal on SMBA pin is supported in.."
bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "0: Device default address disabled.,1: Device default address enabled."
newline
bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "0: Host address disabled.,1: Host address enabled."
bitfld.long 0x0 19. "GCEN,General call enable" "0: General call disabled.,1: General call enabled."
newline
bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "0: Wake-up from Stop mode disabled.,1: Wake-up from Stop mode enabled."
bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "0: Clock stretching enabled,1: Clock stretching disabled"
newline
bitfld.long 0x0 16. "SBC,Slave byte control" "0: Slave byte control disabled,1: Slave byte control enabled"
bitfld.long 0x0 15. "RxDMAEN,DMA reception requests enable" "0: DMA mode disabled for reception,1: DMA mode enabled for reception"
newline
bitfld.long 0x0 14. "TxDMAEN,DMA transmission requests enable" "0: DMA mode disabled for transmission,1: DMA mode enabled for transmission"
bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "0: Analog noise filter enabled,1: Analog noise filter disabled"
newline
hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter"
bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "0: Error detection interrupts disabled,1: Error detection interrupts enabled"
newline
bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "0: Transfer complete interrupt disabled,1: Transfer complete interrupt enabled"
bitfld.long 0x0 5. "STOPIE,STOP detection interrupt enable" "0: STOP detection (STOPF) interrupt disabled,1: STOP detection (STOPF) interrupt enabled"
newline
bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "0: Not acknowledge (NACKF) received interrupts..,1: Not acknowledge (NACKF) received interrupts.."
bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "0: Address match (ADDR) interrupts disabled,1: Address match (ADDR) interrupts enabled"
newline
bitfld.long 0x0 2. "RxIE,Rx interrupt enable" "0: Receive (RxNE) interrupt disabled,1: Receive (RxNE) interrupt enabled"
bitfld.long 0x0 1. "TxIE,Tx interrupt enable" "0: Transmit (TxIS) interrupt disabled,1: Transmit (TxIS) interrupt enabled"
newline
bitfld.long 0x0 0. "PE,Peripheral enable" "0: Peripheral disabled,1: Peripheral enabled"
line.long 0x4 "I2C_CR2,I2C control register 2"
bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "0: No PEC transfer,1: PEC transmission/reception is requested"
bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "0: software end mode: TC flag is set when NBYTES..,1: Automatic end mode: a STOP condition is.."
newline
bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "0: The transfer is completed after the NBYTES data..,1: The transfer is not completed after the NBYTES.."
hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes"
newline
bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "0: an ACK is sent after current received byte.,1: a NACK is sent after current received byte."
bitfld.long 0x4 14. "STOP,STOP condition generation" "0: No STOP generation,1: STOP generation after current byte transfer"
newline
bitfld.long 0x4 13. "START,START condition generation" "0: No START generation,1: RESTART/START generation:"
bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "0: The master sends the complete 10-bit slave..,1: The master sends only the first seven bits of.."
newline
bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "0: The master operates in 7-bit addressing mode,1: The master operates in 10-bit addressing mode"
bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "0: Master requests a write transfer,1: Master requests a read transfer"
newline
hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)"
line.long 0x8 "I2C_OAR1,I2C own address 1 register"
bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "0: Own address 1 disabled.,1: Own address 1 enabled."
bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "0: Own address 1 is a 7-bit address.,1: Own address 1 is a 10-bit address."
newline
hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address"
line.long 0xC "I2C_OAR2,I2C own address 2 register"
bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "0: Own address 2 disabled.,1: Own address 2 enabled."
bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "0: No mask,1: OA2[1] is masked and don't care.,2: OA2[2:1] are masked and don't care.,3: OA2[3:1] are masked and don't care.,4: OA2[4:1] are masked and don't care.,5: OA2[5:1] are masked and don't care.,6: OA2[6:1] are masked and don't care.,7: OA2[7:1] are masked and don't care."
newline
hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address"
line.long 0x10 "I2C_TIMINGR,I2C timing register"
hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler"
hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time"
newline
hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time"
hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)"
newline
hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)"
line.long 0x14 "I2C_TIMEOUTR,I2C timeout register"
bitfld.long 0x14 31. "TExTEN,Extended clock timeout enable" "0: Extended clock timeout detection is disabled,1: Extended clock timeout detection is enabled."
hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B"
newline
bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "0: SCL timeout detection is disabled,1: SCL timeout detection is enabled."
bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "0: TIMEOUTA is used to detect SCL low timeout,1: TIMEOUTA is used to detect both SCL and SDA high.."
newline
hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A"
line.long 0x18 "I2C_ISR,I2C interrupt and status register"
hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)"
rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "0: Write transfer slave enters receiver mode.,1: Read transfer slave enters transmitter mode."
newline
rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1"
rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1"
newline
rbitfld.long 0x18 12. "TIMEOUT,Timeout or tless thansub>LOWless than/sub> detection flag" "0,1"
rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1"
newline
rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1"
rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1"
newline
rbitfld.long 0x18 8. "BERR,Bus error" "0,1"
rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1"
newline
rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1"
rbitfld.long 0x18 5. "STOPF,STOP detection flag" "0,1"
newline
rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1"
rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1"
newline
rbitfld.long 0x18 2. "RxNE,Receive data register not empty (receivers)" "0,1"
bitfld.long 0x18 1. "TxIS,Transmit interrupt status (transmitters)" "0,1"
newline
bitfld.long 0x18 0. "TxE,Transmit data register empty (transmitters)" "0,1"
wgroup.long 0x1C++0x3
line.long 0x0 "I2C_ICR,I2C interrupt clear register"
bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1"
bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1"
newline
bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1"
bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1"
newline
bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1"
bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1"
newline
bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1"
bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1"
newline
bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1"
rgroup.long 0x20++0x7
line.long 0x0 "I2C_PECR,I2C PEC register"
hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register"
line.long 0x4 "I2C_RxDR,I2C receive data register"
hexmask.long.byte 0x4 0.--7. 1. "RxDATA,8-bit receive data"
group.long 0x28++0x7
line.long 0x0 "I2C_TxDR,I2C transmit data register"
hexmask.long.byte 0x0 0.--7. 1. "TxDATA,8-bit transmit data"
line.long 0x4 "I2C_AUTOCR,I2C autonomous mode control register"
bitfld.long 0x4 21. "TRIGEN,Trigger enable" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section45."
bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "0: DMA request not generated on Transfer Complete..,1: DMA request generated on Transfer Complete.."
newline
bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "0: DMA request not generated on Transfer Complete..,1: DMA request generated on Transfer Complete event"
tree.end
tree "I2C3"
base ad:0x40042800
group.long 0x0++0x1B
line.long 0x0 "I2C_CR1,I2C control register 1"
bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "0: STOPF flag is set by hardware cleared by..,1: STOPF flag remains cleared by hardware."
bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "0: ADDR flag is set by hardware cleared by software..,1: ADDR flag remains cleared by hardware."
newline
bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "0: 20 mA I/O drive disabled,1: 20 mA I/O drive enabled"
bitfld.long 0x0 23. "PECEN,PEC enable" "0: PEC calculation disabled,1: PEC calculation enabled"
newline
bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "0: The SMBALERT# signal on SMBA pin is not..,1: The SMBALERT# signal on SMBA pin is supported in.."
bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "0: Device default address disabled.,1: Device default address enabled."
newline
bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "0: Host address disabled.,1: Host address enabled."
bitfld.long 0x0 19. "GCEN,General call enable" "0: General call disabled.,1: General call enabled."
newline
bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "0: Wake-up from Stop mode disabled.,1: Wake-up from Stop mode enabled."
bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "0: Clock stretching enabled,1: Clock stretching disabled"
newline
bitfld.long 0x0 16. "SBC,Slave byte control" "0: Slave byte control disabled,1: Slave byte control enabled"
bitfld.long 0x0 15. "RxDMAEN,DMA reception requests enable" "0: DMA mode disabled for reception,1: DMA mode enabled for reception"
newline
bitfld.long 0x0 14. "TxDMAEN,DMA transmission requests enable" "0: DMA mode disabled for transmission,1: DMA mode enabled for transmission"
bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "0: Analog noise filter enabled,1: Analog noise filter disabled"
newline
hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter"
bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "0: Error detection interrupts disabled,1: Error detection interrupts enabled"
newline
bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "0: Transfer complete interrupt disabled,1: Transfer complete interrupt enabled"
bitfld.long 0x0 5. "STOPIE,STOP detection interrupt enable" "0: STOP detection (STOPF) interrupt disabled,1: STOP detection (STOPF) interrupt enabled"
newline
bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "0: Not acknowledge (NACKF) received interrupts..,1: Not acknowledge (NACKF) received interrupts.."
bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "0: Address match (ADDR) interrupts disabled,1: Address match (ADDR) interrupts enabled"
newline
bitfld.long 0x0 2. "RxIE,Rx interrupt enable" "0: Receive (RxNE) interrupt disabled,1: Receive (RxNE) interrupt enabled"
bitfld.long 0x0 1. "TxIE,Tx interrupt enable" "0: Transmit (TxIS) interrupt disabled,1: Transmit (TxIS) interrupt enabled"
newline
bitfld.long 0x0 0. "PE,Peripheral enable" "0: Peripheral disabled,1: Peripheral enabled"
line.long 0x4 "I2C_CR2,I2C control register 2"
bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "0: No PEC transfer,1: PEC transmission/reception is requested"
bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "0: software end mode: TC flag is set when NBYTES..,1: Automatic end mode: a STOP condition is.."
newline
bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "0: The transfer is completed after the NBYTES data..,1: The transfer is not completed after the NBYTES.."
hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes"
newline
bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "0: an ACK is sent after current received byte.,1: a NACK is sent after current received byte."
bitfld.long 0x4 14. "STOP,STOP condition generation" "0: No STOP generation,1: STOP generation after current byte transfer"
newline
bitfld.long 0x4 13. "START,START condition generation" "0: No START generation,1: RESTART/START generation:"
bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "0: The master sends the complete 10-bit slave..,1: The master sends only the first seven bits of.."
newline
bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "0: The master operates in 7-bit addressing mode,1: The master operates in 10-bit addressing mode"
bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "0: Master requests a write transfer,1: Master requests a read transfer"
newline
hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)"
line.long 0x8 "I2C_OAR1,I2C own address 1 register"
bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "0: Own address 1 disabled.,1: Own address 1 enabled."
bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "0: Own address 1 is a 7-bit address.,1: Own address 1 is a 10-bit address."
newline
hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address"
line.long 0xC "I2C_OAR2,I2C own address 2 register"
bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "0: Own address 2 disabled.,1: Own address 2 enabled."
bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "0: No mask,1: OA2[1] is masked and don't care.,2: OA2[2:1] are masked and don't care.,3: OA2[3:1] are masked and don't care.,4: OA2[4:1] are masked and don't care.,5: OA2[5:1] are masked and don't care.,6: OA2[6:1] are masked and don't care.,7: OA2[7:1] are masked and don't care."
newline
hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address"
line.long 0x10 "I2C_TIMINGR,I2C timing register"
hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler"
hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time"
newline
hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time"
hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)"
newline
hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)"
line.long 0x14 "I2C_TIMEOUTR,I2C timeout register"
bitfld.long 0x14 31. "TExTEN,Extended clock timeout enable" "0: Extended clock timeout detection is disabled,1: Extended clock timeout detection is enabled."
hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B"
newline
bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "0: SCL timeout detection is disabled,1: SCL timeout detection is enabled."
bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "0: TIMEOUTA is used to detect SCL low timeout,1: TIMEOUTA is used to detect both SCL and SDA high.."
newline
hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A"
line.long 0x18 "I2C_ISR,I2C interrupt and status register"
hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)"
rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "0: Write transfer slave enters receiver mode.,1: Read transfer slave enters transmitter mode."
newline
rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1"
rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1"
newline
rbitfld.long 0x18 12. "TIMEOUT,Timeout or tless thansub>LOWless than/sub> detection flag" "0,1"
rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1"
newline
rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1"
rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1"
newline
rbitfld.long 0x18 8. "BERR,Bus error" "0,1"
rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1"
newline
rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1"
rbitfld.long 0x18 5. "STOPF,STOP detection flag" "0,1"
newline
rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1"
rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1"
newline
rbitfld.long 0x18 2. "RxNE,Receive data register not empty (receivers)" "0,1"
bitfld.long 0x18 1. "TxIS,Transmit interrupt status (transmitters)" "0,1"
newline
bitfld.long 0x18 0. "TxE,Transmit data register empty (transmitters)" "0,1"
wgroup.long 0x1C++0x3
line.long 0x0 "I2C_ICR,I2C interrupt clear register"
bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1"
bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1"
newline
bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1"
bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1"
newline
bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1"
bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1"
newline
bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1"
bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1"
newline
bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1"
rgroup.long 0x20++0x7
line.long 0x0 "I2C_PECR,I2C PEC register"
hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register"
line.long 0x4 "I2C_RxDR,I2C receive data register"
hexmask.long.byte 0x4 0.--7. 1. "RxDATA,8-bit receive data"
group.long 0x28++0x7
line.long 0x0 "I2C_TxDR,I2C transmit data register"
hexmask.long.byte 0x0 0.--7. 1. "TxDATA,8-bit transmit data"
line.long 0x4 "I2C_AUTOCR,I2C autonomous mode control register"
bitfld.long 0x4 21. "TRIGEN,Trigger enable" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section45."
bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "0: DMA request not generated on Transfer Complete..,1: DMA request generated on Transfer Complete.."
newline
bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "0: DMA request not generated on Transfer Complete..,1: DMA request generated on Transfer Complete event"
tree.end
tree "SEC_I2C3"
base ad:0x50042800
group.long 0x0++0x1B
line.long 0x0 "I2C_CR1,I2C control register 1"
bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "0: STOPF flag is set by hardware cleared by..,1: STOPF flag remains cleared by hardware."
bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "0: ADDR flag is set by hardware cleared by software..,1: ADDR flag remains cleared by hardware."
newline
bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "0: 20 mA I/O drive disabled,1: 20 mA I/O drive enabled"
bitfld.long 0x0 23. "PECEN,PEC enable" "0: PEC calculation disabled,1: PEC calculation enabled"
newline
bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "0: The SMBALERT# signal on SMBA pin is not..,1: The SMBALERT# signal on SMBA pin is supported in.."
bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "0: Device default address disabled.,1: Device default address enabled."
newline
bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "0: Host address disabled.,1: Host address enabled."
bitfld.long 0x0 19. "GCEN,General call enable" "0: General call disabled.,1: General call enabled."
newline
bitfld.long 0x0 18. "WUPEN,Wake-up from Stop mode enable" "0: Wake-up from Stop mode disabled.,1: Wake-up from Stop mode enabled."
bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "0: Clock stretching enabled,1: Clock stretching disabled"
newline
bitfld.long 0x0 16. "SBC,Slave byte control" "0: Slave byte control disabled,1: Slave byte control enabled"
bitfld.long 0x0 15. "RxDMAEN,DMA reception requests enable" "0: DMA mode disabled for reception,1: DMA mode enabled for reception"
newline
bitfld.long 0x0 14. "TxDMAEN,DMA transmission requests enable" "0: DMA mode disabled for transmission,1: DMA mode enabled for transmission"
bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "0: Analog noise filter enabled,1: Analog noise filter disabled"
newline
hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter"
bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "0: Error detection interrupts disabled,1: Error detection interrupts enabled"
newline
bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "0: Transfer complete interrupt disabled,1: Transfer complete interrupt enabled"
bitfld.long 0x0 5. "STOPIE,STOP detection interrupt enable" "0: STOP detection (STOPF) interrupt disabled,1: STOP detection (STOPF) interrupt enabled"
newline
bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "0: Not acknowledge (NACKF) received interrupts..,1: Not acknowledge (NACKF) received interrupts.."
bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave only)" "0: Address match (ADDR) interrupts disabled,1: Address match (ADDR) interrupts enabled"
newline
bitfld.long 0x0 2. "RxIE,Rx interrupt enable" "0: Receive (RxNE) interrupt disabled,1: Receive (RxNE) interrupt enabled"
bitfld.long 0x0 1. "TxIE,Tx interrupt enable" "0: Transmit (TxIS) interrupt disabled,1: Transmit (TxIS) interrupt enabled"
newline
bitfld.long 0x0 0. "PE,Peripheral enable" "0: Peripheral disabled,1: Peripheral enabled"
line.long 0x4 "I2C_CR2,I2C control register 2"
bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "0: No PEC transfer,1: PEC transmission/reception is requested"
bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "0: software end mode: TC flag is set when NBYTES..,1: Automatic end mode: a STOP condition is.."
newline
bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "0: The transfer is completed after the NBYTES data..,1: The transfer is not completed after the NBYTES.."
hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes"
newline
bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "0: an ACK is sent after current received byte.,1: a NACK is sent after current received byte."
bitfld.long 0x4 14. "STOP,STOP condition generation" "0: No STOP generation,1: STOP generation after current byte transfer"
newline
bitfld.long 0x4 13. "START,START condition generation" "0: No START generation,1: RESTART/START generation:"
bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "0: The master sends the complete 10-bit slave..,1: The master sends only the first seven bits of.."
newline
bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "0: The master operates in 7-bit addressing mode,1: The master operates in 10-bit addressing mode"
bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "0: Master requests a write transfer,1: Master requests a read transfer"
newline
hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)"
line.long 0x8 "I2C_OAR1,I2C own address 1 register"
bitfld.long 0x8 15. "OA1EN,Own address 1 enable" "0: Own address 1 disabled.,1: Own address 1 enabled."
bitfld.long 0x8 10. "OA1MODE,Own address 1 10-bit mode" "0: Own address 1 is a 7-bit address.,1: Own address 1 is a 10-bit address."
newline
hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address"
line.long 0xC "I2C_OAR2,I2C own address 2 register"
bitfld.long 0xC 15. "OA2EN,Own address 2 enable" "0: Own address 2 disabled.,1: Own address 2 enabled."
bitfld.long 0xC 8.--10. "OA2MSK,Own address 2 masks" "0: No mask,1: OA2[1] is masked and don't care.,2: OA2[2:1] are masked and don't care.,3: OA2[3:1] are masked and don't care.,4: OA2[4:1] are masked and don't care.,5: OA2[5:1] are masked and don't care.,6: OA2[6:1] are masked and don't care.,7: OA2[7:1] are masked and don't care."
newline
hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address"
line.long 0x10 "I2C_TIMINGR,I2C timing register"
hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler"
hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time"
newline
hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time"
hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)"
newline
hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)"
line.long 0x14 "I2C_TIMEOUTR,I2C timeout register"
bitfld.long 0x14 31. "TExTEN,Extended clock timeout enable" "0: Extended clock timeout detection is disabled,1: Extended clock timeout detection is enabled."
hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B"
newline
bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "0: SCL timeout detection is disabled,1: SCL timeout detection is enabled."
bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "0: TIMEOUTA is used to detect SCL low timeout,1: TIMEOUTA is used to detect both SCL and SDA high.."
newline
hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A"
line.long 0x18 "I2C_ISR,I2C interrupt and status register"
hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (slave mode)"
rbitfld.long 0x18 16. "DIR,Transfer direction (slave mode)" "0: Write transfer slave enters receiver mode.,1: Read transfer slave enters transmitter mode."
newline
rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1"
rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1"
newline
rbitfld.long 0x18 12. "TIMEOUT,Timeout or tless thansub>LOWless than/sub> detection flag" "0,1"
rbitfld.long 0x18 11. "PECERR,PEC error in reception" "0,1"
newline
rbitfld.long 0x18 10. "OVR,Overrun/underrun (slave mode)" "0,1"
rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1"
newline
rbitfld.long 0x18 8. "BERR,Bus error" "0,1"
rbitfld.long 0x18 7. "TCR,Transfer complete reload" "0,1"
newline
rbitfld.long 0x18 6. "TC,Transfer complete (master mode)" "0,1"
rbitfld.long 0x18 5. "STOPF,STOP detection flag" "0,1"
newline
rbitfld.long 0x18 4. "NACKF,Not acknowledge received flag" "0,1"
rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1"
newline
rbitfld.long 0x18 2. "RxNE,Receive data register not empty (receivers)" "0,1"
bitfld.long 0x18 1. "TxIS,Transmit interrupt status (transmitters)" "0,1"
newline
bitfld.long 0x18 0. "TxE,Transmit data register empty (transmitters)" "0,1"
wgroup.long 0x1C++0x3
line.long 0x0 "I2C_ICR,I2C interrupt clear register"
bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1"
bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1"
newline
bitfld.long 0x0 11. "PECCF,PEC error flag clear" "0,1"
bitfld.long 0x0 10. "OVRCF,Overrun/underrun flag clear" "0,1"
newline
bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1"
bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1"
newline
bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1"
bitfld.long 0x0 4. "NACKCF,Not acknowledge flag clear" "0,1"
newline
bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1"
rgroup.long 0x20++0x7
line.long 0x0 "I2C_PECR,I2C PEC register"
hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register"
line.long 0x4 "I2C_RxDR,I2C receive data register"
hexmask.long.byte 0x4 0.--7. 1. "RxDATA,8-bit receive data"
group.long 0x28++0x7
line.long 0x0 "I2C_TxDR,I2C transmit data register"
hexmask.long.byte 0x0 0.--7. 1. "TxDATA,8-bit transmit data"
line.long 0x4 "I2C_AUTOCR,I2C autonomous mode control register"
bitfld.long 0x4 21. "TRIGEN,Trigger enable" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section45."
bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "0: DMA request not generated on Transfer Complete..,1: DMA request generated on Transfer Complete.."
newline
bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "0: DMA request not generated on Transfer Complete..,1: DMA request generated on Transfer Complete event"
tree.end
tree.end
tree "I3C (Improved Inter-Integrated Circuit Interface)"
base ad:0x0
tree "I3C1"
base ad:0x40005C00
wgroup.long 0x0++0x3
line.long 0x0 "I3C_CR,I3C message control register"
bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when the I3C acts as controller)" "0: this message from controller is followed by a..,1: this message from controller ends with a stop.."
hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (whatever I3C acts as controller/target)"
newline
hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / Iless thansup>2less than/sup>C static target address (when I3C acts as controller)"
bitfld.long 0x0 16. "RNW,Read / non-write message (when I3C acts as controller)" "0: write message,1: read message"
newline
hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of data to transfer during a read or write message in bytes (whatever I3C acts as controller/target)"
wgroup.long 0x0++0x3
line.long 0x0 "I3C_CR_ALTERNATE1,I3C message control register"
bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when I3C acts as controller)" "0: this message from controller is followed by a..,1: the message from the controller ends with a stop.."
hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (when I3C acts as controller)"
newline
hexmask.long.byte 0x0 16.--23. 1. "CCC,8-bit CCC code (when I3C acts as controller)"
hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of related data to the CCC command to transfer as CCC defining bytes or CCC sub-command bytes or CCC data bytes in bytes"
group.long 0x4++0x3
line.long 0x0 "I3C_CFGR,I3C configuration register"
bitfld.long 0x0 30. "TSFSET,Frame transfer set (software trigger) (when I3C acts as controller)" "0: no action,1: setting this bit initiates a frame transfer by.."
bitfld.long 0x0 29. "TRIGHWEN,Hardware trigger enable (when IP acts as controller)" "0: hardware trigger mode is disabled,1: hardware trigger mode is enabled"
newline
bitfld.long 0x0 28. "TRIGPOL,Hardware trigger signal polarity (when IP acts as controller)" "0: rising edge,1: falling edge"
hexmask.long.byte 0x0 24.--27. 1. "TRIGSEL,Hardware trigger signal selection (when IP acts as controller)"
newline
bitfld.long 0x0 23. "FCFDIS,FCF generation disable (when I3C acts as controller)" "0: enable the generation of the flag FCF in the..,1: disable the generation of the flag FCF in the.."
bitfld.long 0x0 21. "CFLUSH,C-FIFO flush (when I3C acts as controller)" "0: no action,1: flush C-FIFO"
newline
bitfld.long 0x0 20. "CDMAEN,C-FIFO DMA request enable (when I3C acts as controller)" "0: DMA mode is disabled for C-FIFO,1: DMA mode is enabled for C-FIFO"
bitfld.long 0x0 19. "TMODE,Transmit mode (when I3C acts as controller)" "0: C-FIFO and Tx-FIFO are not preloaded before..,1: C-FIFO and Tx-FIFO are first preloaded (also.."
newline
bitfld.long 0x0 18. "SMODE,S-FIFO enable / status receive mode (when I3C acts as controller)" "0: S-FIFO is disabled,1: S-FIFO is enabled."
bitfld.long 0x0 17. "SFLUSH,S-FIFO flush (when I3C acts as controller)" "0: no action,1: flush S-FIFO"
newline
bitfld.long 0x0 16. "SDMAEN,S-FIFO DMA request enable (when I3C acts as controller)" "0: DMA mode is disabled for reading status register..,1: DMA mode is enabled for reading status register.."
bitfld.long 0x0 14. "TxTHRES,Tx-FIFO threshold (whatever I3C acts as controller/target)" "0: 1-byte threshold,1: 1-word / 4-byte threshold"
newline
bitfld.long 0x0 13. "TxFLUSH,Tx-FIFO flush (whatever I3C acts as controller/target)" "0: no action,1: flush Tx-FIFO"
bitfld.long 0x0 12. "TxDMAEN,Tx-FIFO DMA request enable (whatever I3C acts as controller/target)" "0: DMA mode is disabled for Tx-FIFO,1: DMA mode is enabled for Tx-FIFO"
newline
bitfld.long 0x0 10. "RxTHRES,Rx-FIFO threshold (whatever I3C acts as controller/target)" "0: 1-byte threshold,1: 1-word/4-bytes threshold"
bitfld.long 0x0 9. "RxFLUSH,Rx-FIFO flush (whatever I3C acts as controller/target)" "0: no action,1: flush Rx-FIFO"
newline
bitfld.long 0x0 8. "RxDMAEN,Rx-FIFO DMA request enable (whatever I3C acts as controller/target)" "0: DMA mode is disabled for Rx-FIFO,1: DMA mode is enabled for Rx-FIFO"
bitfld.long 0x0 7. "HJACK,Hot-join request acknowledge (when I3C acts as a controller)" "0: hot-join request is not acknowledged,1: hot-join request is acknowledged"
newline
bitfld.long 0x0 5. "HKSDAEN,High-keeper enable on SDA line (when I3C acts as a controller)" "0: High-keeper is disabled,1: High-keeper is enabled and the weak pull-up is.."
bitfld.long 0x0 4. "ExITPTRN,HDR exit pattern enable (when I3C acts as a controller)" "0: HDR exit pattern is not sent after the issued..,1: HDR exit pattern is sent after the issued.."
newline
bitfld.long 0x0 3. "RSTPTRN,HDR reset pattern enable (when I3C acts as a controller)" "0: standard stop emitted at the end of a frame,1: HDR reset pattern is inserted before the stop of.."
bitfld.long 0x0 2. "NOARBH,No arbitrable header after a start (when I3C acts as a controller)" "0: An arbitrable header (0b111_1110 + RnW = 0) is..,1: No arbitrable header"
newline
bitfld.long 0x0 1. "CRINIT,Initial controller/target role" "0: target role,1: controller role"
bitfld.long 0x0 0. "EN,I3C enable (whatever I3C acts as controller/target)" "0: I3C is disabled,1: I3C is enabled"
rgroup.long 0x10++0x7
line.long 0x0 "I3C_RDR,I3C receive data byte register"
hexmask.long.byte 0x0 0.--7. 1. "RDB0,8-bit received data on I3C bus."
line.long 0x4 "I3C_RDWR,I3C receive data word register"
hexmask.long.byte 0x4 24.--31. 1. "RDB3,8-bit received data (latest byte on I3C bus)."
hexmask.long.byte 0x4 16.--23. 1. "RDB2,8-bit received data (next byte after RDB1 on I3C bus)."
newline
hexmask.long.byte 0x4 8.--15. 1. "RDB1,8-bit received data (next byte after RDB0 on I3C bus)."
hexmask.long.byte 0x4 0.--7. 1. "RDB0,8-bit received data (earliest byte on I3C bus)."
wgroup.long 0x18++0x7
line.long 0x0 "I3C_TDR,I3C transmit data byte register"
hexmask.long.byte 0x0 0.--7. 1. "TDB0,8-bit data to transmit on I3C bus."
line.long 0x4 "I3C_TDWR,I3C transmit data word register"
hexmask.long.byte 0x4 24.--31. 1. "TDB3,8-bit transmit data (latest byte on I3C bus)."
hexmask.long.byte 0x4 16.--23. 1. "TDB2,8-bit transmit data (next byte after TDB1[7:0] on I3C bus)."
newline
hexmask.long.byte 0x4 8.--15. 1. "TDB1,8-bit transmit data (next byte after TDB0[7:0] on I3C bus)."
hexmask.long.byte 0x4 0.--7. 1. "TDB0,8-bit transmit data (earliest byte on I3C bus)"
group.long 0x20++0x7
line.long 0x0 "I3C_IBIDR,I3C IBI payload data register"
hexmask.long.byte 0x0 24.--31. 1. "IBIDB3,8-bit IBI payload data (latest byte on I3C bus)."
hexmask.long.byte 0x0 16.--23. 1. "IBIDB2,8-bit IBI payload data (next byte on I3C bus after IBIDB1[7:0])."
newline
hexmask.long.byte 0x0 8.--15. 1. "IBIDB1,8-bit IBI payload data (next byte on I3C bus after IBIDB0[7:0])."
hexmask.long.byte 0x0 0.--7. 1. "IBIDB0,8-bit IBI payload data (earliest byte on I3C bus MDB[7:0] mandatory data byte)."
line.long 0x4 "I3C_TGTTDR,I3C target transmit configuration register"
bitfld.long 0x4 16. "PRELOAD,Preload of the Tx-FIFO (when I3C is configured as target)" "0: no Tx-FIFO preload,1: Tx-FIFO preload"
hexmask.long.word 0x4 0.--15. 1. "TGTTDCNT,Transmit data counter in bytes (when I3C is configured as target)"
rgroup.long 0x30++0x7
line.long 0x0 "I3C_SR,I3C status register"
hexmask.long.byte 0x0 24.--31. 1. "MID,Message identifier/counter of a given frame (when the I3C acts as controller)"
bitfld.long 0x0 18. "DIR,Message direction" "0: write,1: read"
newline
bitfld.long 0x0 17. "ABT,A private read message is ended prematurely by the target (when the I3C acts as controller)" "0: no early completion from the target,1: early completion from the target"
hexmask.long.word 0x0 0.--15. 1. "xDCNT,Data counter"
line.long 0x4 "I3C_SER,I3C status error register"
bitfld.long 0x4 10. "DERR,Data error (when the I3C acts as controller)" "0: no detected error,1: controller detected a data error during the.."
bitfld.long 0x4 9. "DNACK,Data not acknowledged (when the I3C acts as controller)" "0: no detected error,1: controller detected that a data byte is not.."
newline
bitfld.long 0x4 8. "ANACK,Address not acknowledged (when the I3C is configured as controller)" "0: no detected error,1: controller detected that the static/dynamic.."
bitfld.long 0x4 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C acts as controller)" "0: no detected error,1: controller detected either:"
newline
bitfld.long 0x4 6. "DOVR,Rx-FIFO overrun or Tx-FIFO underrun" "0: no detected error,1: whatever controller or target hardware detected.."
bitfld.long 0x4 5. "STALL,SCL stall error (when the I3C acts as target)" "0: no detected error,1: target detected that SCL was stable for more.."
newline
bitfld.long 0x4 4. "PERR,Protocol error" "0: no detected error,1: whatever controller or target hardware detected.."
hexmask.long.byte 0x4 0.--3. 1. "CODERR,Protocol error code/type"
rgroup.long 0x40++0x3
line.long 0x0 "I3C_RMR,I3C received message register"
hexmask.long.byte 0x0 17.--23. 1. "RADD,Received target address (when the I3C is configured as controller)"
hexmask.long.byte 0x0 8.--15. 1. "RCODE,Received CCC code (when the I3C is configured as target)"
newline
bitfld.long 0x0 0.--2. "IBIRDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7"
rgroup.long 0x50++0x7
line.long 0x0 "I3C_EVR,I3C event register"
bitfld.long 0x0 31. "GRPF,Group addressing flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 29. "INTUPDF,Interrupt/controller-role/hot-join update flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 28. "ASUPDF,Activity state update flag (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 27. "RSTF,Reset pattern flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 26. "MRLUPDF,Maximum read length update flag (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 25. "MWLUPDF,Maximum write length update flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 24. "DAUPDF,Dynamic address update flag (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 23. "STAF,Get status flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 22. "GETF,Get flag (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 21. "WKPF,Wake-up/missed start flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 19. "HJF,Hot-join flag (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 18. "CRUPDF,Controller-role update flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 17. "CRF,Controller-role request flag (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 15. "IBIF,IBI flag (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 11. "ERRF,Flag (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 10. "RxTGTENDF,Target-initiated read end flag (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 9. "FCF,Frame complete flag (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 7. "RxLASTF,Last read data byte/word flag (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 6. "TxLASTF,Last written data byte/word flag (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 5. "RxFNEF,Rx-FIFO not empty flag (whatever the I3C acts as controller/target)" "0,1"
newline
bitfld.long 0x0 4. "TxFNFF,Tx-FIFO not full flag (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C acts as controller)" "0,1"
bitfld.long 0x0 1. "TxFEF,Tx-FIFO empty flag (whatever the I3C acts as controller/target)" "0,1"
newline
bitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C acts as controller)" "0,1"
line.long 0x4 "I3C_IER,I3C interrupt enable register"
bitfld.long 0x4 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 27. "RSTIE,reset pattern interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 23. "STAIE,format 1 GETSTATUS CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 22. "GETIE,GETxxx CCC interrupt enable (except GETSTATUS of format 1) (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 21. "WKPIE,Wake-up interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 19. "HJIE,Hot-join interrupt enable (when the I3C acts as controller)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 18. "CRUPDIE,Controller-role update interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 17. "CRIE,Controller-role request interrupt enable (when the I3C acts as controller)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 16. "IBIENDIE,IBI end interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 15. "IBIIE,IBI request interrupt enable (when the I3C acts as controller)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 11. "ERRIE,error interrupt enable (whatever the I3C acts as controller/target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 10. "RxTGTENDIE,target-initiated read end interrupt enable (when the I3C acts as controller)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 9. "FCIE,frame complete interrupt enable (whatever the I3C acts as controller/target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 5. "RxFNEIE,Rx-FIFO not empty interrupt enable (whatever the I3C acts as controller/target)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 4. "TxFNFIE,Tx-FIFO not full interrupt enable (whatever the I3C acts as controller/target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 3. "SFNEIE,S-FIFO not empty interrupt enable when the I3C acts as controller" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 2. "CFNFIE,C-FIFO not full interrupt enable when the I3C acts as controller" "0: interrupt disabled,1: interrupt enabled"
wgroup.long 0x58++0x3
line.long 0x0 "I3C_CEVR,I3C clear event register"
bitfld.long 0x0 31. "CGRPF,Clear DEFGRPA CCC flag (when the I3C acts as target)" "0: no effect,1: clear GRPF"
bitfld.long 0x0 30. "CDEFF,Clear DEFTGTS CCC flag (when the I3C acts as target)" "0: no effect,1: clear DEFF"
newline
bitfld.long 0x0 29. "CINTUPDF,Clear ENEC/DISEC CCC flag (when the I3C acts as target)" "0: no effect,1: clear CINTUPDF"
bitfld.long 0x0 28. "CASUPDF,Clear ENTASx CCC flag (when the I3C acts as target)" "0: no effect,1: clear ASUPDF"
newline
bitfld.long 0x0 27. "CRSTF,Clear reset pattern flag (when the I3C acts as target)" "0: no effect,1: clear RSTF"
bitfld.long 0x0 26. "CMRLUPDF,Clear SETMRL CCC flag (when the I3C acts as target)" "0: no effect,1: clear MRLUPDF"
newline
bitfld.long 0x0 25. "CMWLUPDF,Clear SETMWL CCC flag (when the I3C acts as target)" "0: no effect,1: clear MWLUPDF"
bitfld.long 0x0 24. "CDAUPDF,Clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C acts as target)" "0: no effect,1: clear DAUPDF"
newline
bitfld.long 0x0 23. "CSTAF,Clear format 1 GETSTATUS CCC flag (when the I3C acts as target)" "0: no effect,1: clear STAF"
bitfld.long 0x0 22. "CGETF,Clear GETxxx CCC flag (except GETSTATUS of format 1) (when the I3C acts as target)" "0: no effect,1: clear GETF"
newline
bitfld.long 0x0 21. "CWKPF,Clear wake-up flag (when the I3C acts as target)" "0: no effect,1: clear WKPF"
bitfld.long 0x0 19. "CHJF,Clear hot-join flag (when the I3C acts as controller)" "0: no effect,1: clear HJF"
newline
bitfld.long 0x0 18. "CCRUPDF,Clear controller-role update flag (when the I3C acts as target)" "0: no effect,1: clear CRUPDF"
bitfld.long 0x0 17. "CCRF,Clear controller-role request flag (when the I3C acts as controller)" "0: no effect,1: clear CRF"
newline
bitfld.long 0x0 16. "CIBIENDF,Clear IBI end flag (when the I3C acts as target)" "0: no effect,1: clear IBIENDF"
bitfld.long 0x0 15. "CIBIF,Clear IBI request flag (when the I3C acts as controller)" "0: no effect,1: clear IBIF"
newline
bitfld.long 0x0 11. "CERRF,Clear error flag (whatever the I3C acts as controller/target)" "0: no effect,1: clear ERRF"
bitfld.long 0x0 10. "CRxTGTENDF,Clear target-initiated read end flag (when the I3C acts as controller)" "0: no effect,1: clear RxTGTENDF"
newline
bitfld.long 0x0 9. "CFCF,Clear frame complete flag (whatever the I3C acts as controller/target)" "0: no effect,1: clear FCF"
rgroup.long 0x5C++0x3
line.long 0x0 "I3C_MISR,I3C masked interrupt status register"
bitfld.long 0x0 31. "GRPMIS,DEFGRPA CCC masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 30. "DEFMIS,DEFTGTS CCC masked interrupt status (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 29. "INTUPDMIS,ENEC/DISEC CCC masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 28. "ASUPDMIS,ENTASx CCC masked interrupt status (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 27. "RSTMIS,reset pattern masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 26. "MRLUPDMIS,SETMRL CCC masked interrupt status (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 25. "MWLUPDMIS,SETMWL CCC masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 24. "DAUPDMIS,ENTDAA/RSTDAA/SETNEWDA CCC masked interrupt status (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 23. "STAMIS,format 1 GETSTATUS CCC masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 22. "GETMIS,GETxxx CCC masked interrupt status except GETSTATUS of format 1 (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 21. "WKPMIS,Wake-up/missed start masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 19. "HJMIS,Hot-join masked interrupt status (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 18. "CRUPDMIS,Controller-role update masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 17. "CRMIS,Controller-role request masked interrupt status (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 16. "IBIENDMIS,IBI end masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 15. "IBIMIS,IBI request masked interrupt status (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 11. "ERRMIS,error masked interrupt status (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 10. "RxTGTENDMIS,target-initiated read end masked interrupt status (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 9. "FCMIS,frame complete masked interrupt status (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 5. "RxFNEMIS,Rx-FIFO not empty masked interrupt status (whatever the I3C acts as controller/target)" "0,1"
newline
bitfld.long 0x0 4. "TxFNFMIS,Tx-FIFO not full masked interrupt status (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 3. "SFNEMIS,S-FIFO not empty masked interrupt status (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 2. "CFNFMIS,C-FIFO not full masked interrupt status (when the I3C acts as controller)" "0,1"
group.long 0x60++0x13
line.long 0x0 "I3C_DEVR0,I3C own device characteristics register"
rbitfld.long 0x0 24. "RSTVAL,Reset action is valid (when the I3C acts as target)" "0,1"
rbitfld.long 0x0 22.--23. "RSTACT,Reset action/level on received reset pattern (when the I3C acts as target)" "0: no reset action,1: first level of reset: the application software..,2: second level of reset: the application software..,3: no reset action"
newline
rbitfld.long 0x0 20.--21. "AS,Activity state (when the I3C acts as target)" "0: activity state 0,1: activity state 1,2: activity state 2,3: activity state 3"
bitfld.long 0x0 19. "HJEN,Hot-join request enable (when the I3C acts as target)" "0: hot-join request disabled,1: hot-join request enabled"
newline
bitfld.long 0x0 17. "CREN,Controller-role request enable (when the I3C acts as target)" "0: controller-role request disabled,1: controller-role request enabled"
bitfld.long 0x0 16. "IBIEN,IBI request enable (when the I3C acts as target)" "0: IBI request disabled,1: IBI request enabled"
newline
hexmask.long.byte 0x0 1.--7. 1. "DA,7-bit dynamic address"
bitfld.long 0x0 0. "DAVAL,Dynamic address is valid (when the I3C acts as target)" "0,1"
line.long 0x4 "I3C_DEVR1,I3C device 1 characteristics register"
rbitfld.long 0x4 31. "DIS,Disables writes to DA[6:0] (when the I3C acts as controller)" "0: write to DA[7:0] and to IBIDEN in the I3C_DEVRx..,1: write to DA[7:0] and to IBIDEN is disabled/locked"
bitfld.long 0x4 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "0: C-FIFO and Tx-FIFO are not flushed after an IBI..,1: I3C transfer is stopped and both C-FIFO and.."
newline
bitfld.long 0x4 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "0: no data byte follows the acknowledged IBI from..,1: the mandatory data byte MDB[7:0] follows the.."
bitfld.long 0x4 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "0: a controller-role request from target x must be..,1: a controller-role request (with 7-bit dynamic.."
newline
bitfld.long 0x4 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "0: an IBI request from target x must be NACK-ed,1: an IBI request (with 7-bit dynamic address.."
hexmask.long.byte 0x4 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)"
line.long 0x8 "I3C_DEVR2,I3C device 2 characteristics register"
rbitfld.long 0x8 31. "DIS,Disables writes to DA[6:0] (when the I3C acts as controller)" "0: write to DA[7:0] and to IBIDEN in the I3C_DEVRx..,1: write to DA[7:0] and to IBIDEN is disabled/locked"
bitfld.long 0x8 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "0: C-FIFO and Tx-FIFO are not flushed after an IBI..,1: I3C transfer is stopped and both C-FIFO and.."
newline
bitfld.long 0x8 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "0: no data byte follows the acknowledged IBI from..,1: the mandatory data byte MDB[7:0] follows the.."
bitfld.long 0x8 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "0: a controller-role request from target x must be..,1: a controller-role request (with 7-bit dynamic.."
newline
bitfld.long 0x8 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "0: an IBI request from target x must be NACK-ed,1: an IBI request (with 7-bit dynamic address.."
hexmask.long.byte 0x8 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)"
line.long 0xC "I3C_DEVR3,I3C device 3 characteristics register"
rbitfld.long 0xC 31. "DIS,Disables writes to DA[6:0] (when the I3C acts as controller)" "0: write to DA[7:0] and to IBIDEN in the I3C_DEVRx..,1: write to DA[7:0] and to IBIDEN is disabled/locked"
bitfld.long 0xC 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "0: C-FIFO and Tx-FIFO are not flushed after an IBI..,1: I3C transfer is stopped and both C-FIFO and.."
newline
bitfld.long 0xC 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "0: no data byte follows the acknowledged IBI from..,1: the mandatory data byte MDB[7:0] follows the.."
bitfld.long 0xC 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "0: a controller-role request from target x must be..,1: a controller-role request (with 7-bit dynamic.."
newline
bitfld.long 0xC 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "0: an IBI request from target x must be NACK-ed,1: an IBI request (with 7-bit dynamic address.."
hexmask.long.byte 0xC 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)"
line.long 0x10 "I3C_DEVR4,I3C device 4 characteristics register"
rbitfld.long 0x10 31. "DIS,Disables writes to DA[6:0] (when the I3C acts as controller)" "0: write to DA[7:0] and to IBIDEN in the I3C_DEVRx..,1: write to DA[7:0] and to IBIDEN is disabled/locked"
bitfld.long 0x10 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "0: C-FIFO and Tx-FIFO are not flushed after an IBI..,1: I3C transfer is stopped and both C-FIFO and.."
newline
bitfld.long 0x10 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "0: no data byte follows the acknowledged IBI from..,1: the mandatory data byte MDB[7:0] follows the.."
bitfld.long 0x10 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "0: a controller-role request from target x must be..,1: a controller-role request (with 7-bit dynamic.."
newline
bitfld.long 0x10 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "0: an IBI request from target x must be NACK-ed,1: an IBI request (with 7-bit dynamic address.."
hexmask.long.byte 0x10 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)"
group.long 0x90++0x7
line.long 0x0 "I3C_MAxRLR,I3C maximum read length register"
bitfld.long 0x0 16.--18. "IBIP,IBI payload data maximum size in bytes (when I3C acts as target)" "0: null payload data size (only allowed when BCR2 =..,1: 1 byte (mandatory data byte MDB[7:0],2: 2 bytes (including first MDB[7:0]),3: 3 bytes (including first MDB[7:0]),4: 4 bytes (including first MDB[7:0]),?,?,?"
hexmask.long.word 0x0 0.--15. 1. "MRL,Maximum data read length (when I3C acts as target)"
line.long 0x4 "I3C_MAxWLR,I3C maximum write length register"
hexmask.long.word 0x4 0.--15. 1. "MWL,Maximum data write length (when I3C acts as target)"
group.long 0xA0++0xB
line.long 0x0 "I3C_TIMINGR0,I3C timing register 0"
hexmask.long.byte 0x0 24.--31. 1. "SCLH_I2C,SCL high duration used for legacy Iless thansup>2less than/sup>C messages in number of kernel clocks cycles:"
hexmask.long.byte 0x0 16.--23. 1. "SCLL_OD,SCL low duration in open-drain phases used for legacy Iless thansup>2less than/sup>C messages and for I3C open-drain phases (address phase following a start ACK phase during controller-initiated messages and T bit phase during.."
newline
hexmask.long.byte 0x0 8.--15. 1. "SCLH_I3C,SCL high duration used for I3C messages (both in push-pull and open-drain phases) in number of kernel clocks cycles:"
hexmask.long.byte 0x0 0.--7. 1. "SCLL_PP,SCL low duration in I3C push-pull phases in number of kernel clocks cycles:"
line.long 0x4 "I3C_TIMINGR1,I3C timing register 1"
bitfld.long 0x4 28.--29. "SDA_HD,SDA hold time (when the I3C acts as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tless thansub>HD_PPless than/sub>):" "0,1,2,3"
hexmask.long.byte 0x4 16.--22. 1. "FREE,Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller)"
newline
bitfld.long 0x4 8.--9. "ASNCR,Activity state of the new controller (when I3C acts as active controller)" "0,1,2,3"
hexmask.long.byte 0x4 0.--7. 1. "AVAL,Number of kernel clock cycles to set a time unit of 1 us whatever I3C acts as controller or target."
line.long 0x8 "I3C_TIMINGR2,I3C timing register 2"
hexmask.long.byte 0x8 8.--15. 1. "STALL,Controller clock stall time in number of kernel clock cycles"
bitfld.long 0x8 6. "STALLL,Controller clock stall enable in the address ACK/NACK phase (before the ninth bit) of a legacy I2C read/write message." "0: no stall,1: stall enabled"
newline
bitfld.long 0x8 5. "STALLS,Controller clock stall enable in the data ACK/NACK phase of a legacy I2C write message." "0: no stall,1: stall enabled"
bitfld.long 0x8 4. "STALLR,Controller clock stall enable in the data ACK/NACK phase of a legacy I2C read message." "0: no stall,1: stall enabled"
newline
bitfld.long 0x8 3. "STALLA,Controller clock stall enable on ACK phase" "0: no stall,1: stall enabled"
bitfld.long 0x8 2. "STALLC,Controller clock stall enable on PAR phase of CCC" "0: no stall,1: stall enabled"
newline
bitfld.long 0x8 1. "STALLD,Controller clock stall enable on PAR phase of Data" "0: no stall,1: stall enabled"
bitfld.long 0x8 0. "STALLT,Controller clock stall enable on T-bit phase of data" "0: no stall,1: stall enabled"
group.long 0xC0++0x17
line.long 0x0 "I3C_BCR,I3C bus characteristics register"
bitfld.long 0x0 6. "BCR6,Controller capable" "0: I3C target (no controller capable),1: I3C controller capable"
bitfld.long 0x0 2. "BCR2,in-band interrupt (IBI) payload" "0: no data byte follows the accepted IBI,1: at least one mandatory data byte follows the.."
newline
bitfld.long 0x0 0. "BCR0,max data speed limitation" "0: no limitation,1: limitation as described by I3C_GETMxDSR."
line.long 0x4 "I3C_DCR,I3C device characteristics register"
hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID"
line.long 0x8 "I3C_GETCAPR,I3C get capability register"
bitfld.long 0x8 14. "CAPPEND,IBI MDB support for pending read notification" "0: this I3C when acting as target sends an IBI..,1: this I3C when acting as target sends an IBI.."
line.long 0xC "I3C_CRCAPR,I3C controller-role capability register"
bitfld.long 0xC 9. "CAPGRP,group management support (when acting as controller)" "0: this I3C does not support group address..,1: this I3C supports group address capabilities.."
bitfld.long 0xC 3. "CAPDHOFF,delayed controller-role hand-off" "0: this I3C does not needs additional time to..,1: this I3C needs additional time to process a.."
line.long 0x10 "I3C_GETMxDSR,I3C get max data speed register"
bitfld.long 0x10 24. "TSCO,clock-to-data turnaround time (tless thansub>SCOless than/sub>)" "0: tless thansub>SCOless than/sub> less than or..,1: tless thansub>SCOless than/sub> > 12 ns (refer.."
hexmask.long.byte 0x10 16.--23. 1. "RDTURN,programmed byte of the 3-byte MaxRdTurn (maximum read turnaround byte)"
newline
bitfld.long 0x10 8.--9. "FMT,GETMxDS CCC format" "0: format 1 (2 bytes with MaxWr with no defining..,1: format 2: (5 bytes w.,2: format 2 (5 bytes with MaxWr with no defining..,3: format 2 (5 bytes with MaxWr with no defining.."
bitfld.long 0x10 0.--1. "HOFFAS,Controller hand-off activity state" "0: activity state 0 is the initial activity state..,1: activity state 1 is the initial activity state..,2: activity state 2 is the initial activity state..,3: activity state 3 is the initial activity state.."
line.long 0x14 "I3C_EPIDR,I3C extended provisioned ID register"
hexmask.long.word 0x14 17.--31. 1. "MIPIMID,15-bit MIPI manufacturer ID"
rbitfld.long 0x14 16. "IDTSEL,provisioned ID type selector" "0,1"
newline
hexmask.long.byte 0x14 12.--15. 1. "MIPIID,4-bit MIPI Instance ID"
tree.end
tree "SEC_I3C1"
base ad:0x50005C00
wgroup.long 0x0++0x3
line.long 0x0 "I3C_CR,I3C message control register"
bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when the I3C acts as controller)" "0: this message from controller is followed by a..,1: this message from controller ends with a stop.."
hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (whatever I3C acts as controller/target)"
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hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / Iless thansup>2less than/sup>C static target address (when I3C acts as controller)"
bitfld.long 0x0 16. "RNW,Read / non-write message (when I3C acts as controller)" "0: write message,1: read message"
newline
hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of data to transfer during a read or write message in bytes (whatever I3C acts as controller/target)"
wgroup.long 0x0++0x3
line.long 0x0 "I3C_CR_ALTERNATE1,I3C message control register"
bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when I3C acts as controller)" "0: this message from controller is followed by a..,1: the message from the controller ends with a stop.."
hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (when I3C acts as controller)"
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hexmask.long.byte 0x0 16.--23. 1. "CCC,8-bit CCC code (when I3C acts as controller)"
hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of related data to the CCC command to transfer as CCC defining bytes or CCC sub-command bytes or CCC data bytes in bytes"
group.long 0x4++0x3
line.long 0x0 "I3C_CFGR,I3C configuration register"
bitfld.long 0x0 30. "TSFSET,Frame transfer set (software trigger) (when I3C acts as controller)" "0: no action,1: setting this bit initiates a frame transfer by.."
bitfld.long 0x0 29. "TRIGHWEN,Hardware trigger enable (when IP acts as controller)" "0: hardware trigger mode is disabled,1: hardware trigger mode is enabled"
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bitfld.long 0x0 28. "TRIGPOL,Hardware trigger signal polarity (when IP acts as controller)" "0: rising edge,1: falling edge"
hexmask.long.byte 0x0 24.--27. 1. "TRIGSEL,Hardware trigger signal selection (when IP acts as controller)"
newline
bitfld.long 0x0 23. "FCFDIS,FCF generation disable (when I3C acts as controller)" "0: enable the generation of the flag FCF in the..,1: disable the generation of the flag FCF in the.."
bitfld.long 0x0 21. "CFLUSH,C-FIFO flush (when I3C acts as controller)" "0: no action,1: flush C-FIFO"
newline
bitfld.long 0x0 20. "CDMAEN,C-FIFO DMA request enable (when I3C acts as controller)" "0: DMA mode is disabled for C-FIFO,1: DMA mode is enabled for C-FIFO"
bitfld.long 0x0 19. "TMODE,Transmit mode (when I3C acts as controller)" "0: C-FIFO and Tx-FIFO are not preloaded before..,1: C-FIFO and Tx-FIFO are first preloaded (also.."
newline
bitfld.long 0x0 18. "SMODE,S-FIFO enable / status receive mode (when I3C acts as controller)" "0: S-FIFO is disabled,1: S-FIFO is enabled."
bitfld.long 0x0 17. "SFLUSH,S-FIFO flush (when I3C acts as controller)" "0: no action,1: flush S-FIFO"
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bitfld.long 0x0 16. "SDMAEN,S-FIFO DMA request enable (when I3C acts as controller)" "0: DMA mode is disabled for reading status register..,1: DMA mode is enabled for reading status register.."
bitfld.long 0x0 14. "TxTHRES,Tx-FIFO threshold (whatever I3C acts as controller/target)" "0: 1-byte threshold,1: 1-word / 4-byte threshold"
newline
bitfld.long 0x0 13. "TxFLUSH,Tx-FIFO flush (whatever I3C acts as controller/target)" "0: no action,1: flush Tx-FIFO"
bitfld.long 0x0 12. "TxDMAEN,Tx-FIFO DMA request enable (whatever I3C acts as controller/target)" "0: DMA mode is disabled for Tx-FIFO,1: DMA mode is enabled for Tx-FIFO"
newline
bitfld.long 0x0 10. "RxTHRES,Rx-FIFO threshold (whatever I3C acts as controller/target)" "0: 1-byte threshold,1: 1-word/4-bytes threshold"
bitfld.long 0x0 9. "RxFLUSH,Rx-FIFO flush (whatever I3C acts as controller/target)" "0: no action,1: flush Rx-FIFO"
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bitfld.long 0x0 8. "RxDMAEN,Rx-FIFO DMA request enable (whatever I3C acts as controller/target)" "0: DMA mode is disabled for Rx-FIFO,1: DMA mode is enabled for Rx-FIFO"
bitfld.long 0x0 7. "HJACK,Hot-join request acknowledge (when I3C acts as a controller)" "0: hot-join request is not acknowledged,1: hot-join request is acknowledged"
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bitfld.long 0x0 5. "HKSDAEN,High-keeper enable on SDA line (when I3C acts as a controller)" "0: High-keeper is disabled,1: High-keeper is enabled and the weak pull-up is.."
bitfld.long 0x0 4. "ExITPTRN,HDR exit pattern enable (when I3C acts as a controller)" "0: HDR exit pattern is not sent after the issued..,1: HDR exit pattern is sent after the issued.."
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bitfld.long 0x0 3. "RSTPTRN,HDR reset pattern enable (when I3C acts as a controller)" "0: standard stop emitted at the end of a frame,1: HDR reset pattern is inserted before the stop of.."
bitfld.long 0x0 2. "NOARBH,No arbitrable header after a start (when I3C acts as a controller)" "0: An arbitrable header (0b111_1110 + RnW = 0) is..,1: No arbitrable header"
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bitfld.long 0x0 1. "CRINIT,Initial controller/target role" "0: target role,1: controller role"
bitfld.long 0x0 0. "EN,I3C enable (whatever I3C acts as controller/target)" "0: I3C is disabled,1: I3C is enabled"
rgroup.long 0x10++0x7
line.long 0x0 "I3C_RDR,I3C receive data byte register"
hexmask.long.byte 0x0 0.--7. 1. "RDB0,8-bit received data on I3C bus."
line.long 0x4 "I3C_RDWR,I3C receive data word register"
hexmask.long.byte 0x4 24.--31. 1. "RDB3,8-bit received data (latest byte on I3C bus)."
hexmask.long.byte 0x4 16.--23. 1. "RDB2,8-bit received data (next byte after RDB1 on I3C bus)."
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hexmask.long.byte 0x4 8.--15. 1. "RDB1,8-bit received data (next byte after RDB0 on I3C bus)."
hexmask.long.byte 0x4 0.--7. 1. "RDB0,8-bit received data (earliest byte on I3C bus)."
wgroup.long 0x18++0x7
line.long 0x0 "I3C_TDR,I3C transmit data byte register"
hexmask.long.byte 0x0 0.--7. 1. "TDB0,8-bit data to transmit on I3C bus."
line.long 0x4 "I3C_TDWR,I3C transmit data word register"
hexmask.long.byte 0x4 24.--31. 1. "TDB3,8-bit transmit data (latest byte on I3C bus)."
hexmask.long.byte 0x4 16.--23. 1. "TDB2,8-bit transmit data (next byte after TDB1[7:0] on I3C bus)."
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hexmask.long.byte 0x4 8.--15. 1. "TDB1,8-bit transmit data (next byte after TDB0[7:0] on I3C bus)."
hexmask.long.byte 0x4 0.--7. 1. "TDB0,8-bit transmit data (earliest byte on I3C bus)"
group.long 0x20++0x7
line.long 0x0 "I3C_IBIDR,I3C IBI payload data register"
hexmask.long.byte 0x0 24.--31. 1. "IBIDB3,8-bit IBI payload data (latest byte on I3C bus)."
hexmask.long.byte 0x0 16.--23. 1. "IBIDB2,8-bit IBI payload data (next byte on I3C bus after IBIDB1[7:0])."
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hexmask.long.byte 0x0 8.--15. 1. "IBIDB1,8-bit IBI payload data (next byte on I3C bus after IBIDB0[7:0])."
hexmask.long.byte 0x0 0.--7. 1. "IBIDB0,8-bit IBI payload data (earliest byte on I3C bus MDB[7:0] mandatory data byte)."
line.long 0x4 "I3C_TGTTDR,I3C target transmit configuration register"
bitfld.long 0x4 16. "PRELOAD,Preload of the Tx-FIFO (when I3C is configured as target)" "0: no Tx-FIFO preload,1: Tx-FIFO preload"
hexmask.long.word 0x4 0.--15. 1. "TGTTDCNT,Transmit data counter in bytes (when I3C is configured as target)"
rgroup.long 0x30++0x7
line.long 0x0 "I3C_SR,I3C status register"
hexmask.long.byte 0x0 24.--31. 1. "MID,Message identifier/counter of a given frame (when the I3C acts as controller)"
bitfld.long 0x0 18. "DIR,Message direction" "0: write,1: read"
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bitfld.long 0x0 17. "ABT,A private read message is ended prematurely by the target (when the I3C acts as controller)" "0: no early completion from the target,1: early completion from the target"
hexmask.long.word 0x0 0.--15. 1. "xDCNT,Data counter"
line.long 0x4 "I3C_SER,I3C status error register"
bitfld.long 0x4 10. "DERR,Data error (when the I3C acts as controller)" "0: no detected error,1: controller detected a data error during the.."
bitfld.long 0x4 9. "DNACK,Data not acknowledged (when the I3C acts as controller)" "0: no detected error,1: controller detected that a data byte is not.."
newline
bitfld.long 0x4 8. "ANACK,Address not acknowledged (when the I3C is configured as controller)" "0: no detected error,1: controller detected that the static/dynamic.."
bitfld.long 0x4 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C acts as controller)" "0: no detected error,1: controller detected either:"
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bitfld.long 0x4 6. "DOVR,Rx-FIFO overrun or Tx-FIFO underrun" "0: no detected error,1: whatever controller or target hardware detected.."
bitfld.long 0x4 5. "STALL,SCL stall error (when the I3C acts as target)" "0: no detected error,1: target detected that SCL was stable for more.."
newline
bitfld.long 0x4 4. "PERR,Protocol error" "0: no detected error,1: whatever controller or target hardware detected.."
hexmask.long.byte 0x4 0.--3. 1. "CODERR,Protocol error code/type"
rgroup.long 0x40++0x3
line.long 0x0 "I3C_RMR,I3C received message register"
hexmask.long.byte 0x0 17.--23. 1. "RADD,Received target address (when the I3C is configured as controller)"
hexmask.long.byte 0x0 8.--15. 1. "RCODE,Received CCC code (when the I3C is configured as target)"
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bitfld.long 0x0 0.--2. "IBIRDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7"
rgroup.long 0x50++0x7
line.long 0x0 "I3C_EVR,I3C event register"
bitfld.long 0x0 31. "GRPF,Group addressing flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 29. "INTUPDF,Interrupt/controller-role/hot-join update flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 28. "ASUPDF,Activity state update flag (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 27. "RSTF,Reset pattern flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 26. "MRLUPDF,Maximum read length update flag (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 25. "MWLUPDF,Maximum write length update flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 24. "DAUPDF,Dynamic address update flag (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 23. "STAF,Get status flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 22. "GETF,Get flag (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 21. "WKPF,Wake-up/missed start flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 19. "HJF,Hot-join flag (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 18. "CRUPDF,Controller-role update flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 17. "CRF,Controller-role request flag (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 15. "IBIF,IBI flag (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 11. "ERRF,Flag (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 10. "RxTGTENDF,Target-initiated read end flag (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 9. "FCF,Frame complete flag (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 7. "RxLASTF,Last read data byte/word flag (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 6. "TxLASTF,Last written data byte/word flag (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 5. "RxFNEF,Rx-FIFO not empty flag (whatever the I3C acts as controller/target)" "0,1"
newline
bitfld.long 0x0 4. "TxFNFF,Tx-FIFO not full flag (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C acts as controller)" "0,1"
bitfld.long 0x0 1. "TxFEF,Tx-FIFO empty flag (whatever the I3C acts as controller/target)" "0,1"
newline
bitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C acts as controller)" "0,1"
line.long 0x4 "I3C_IER,I3C interrupt enable register"
bitfld.long 0x4 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 27. "RSTIE,reset pattern interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 23. "STAIE,format 1 GETSTATUS CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 22. "GETIE,GETxxx CCC interrupt enable (except GETSTATUS of format 1) (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 21. "WKPIE,Wake-up interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 19. "HJIE,Hot-join interrupt enable (when the I3C acts as controller)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 18. "CRUPDIE,Controller-role update interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 17. "CRIE,Controller-role request interrupt enable (when the I3C acts as controller)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 16. "IBIENDIE,IBI end interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 15. "IBIIE,IBI request interrupt enable (when the I3C acts as controller)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 11. "ERRIE,error interrupt enable (whatever the I3C acts as controller/target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 10. "RxTGTENDIE,target-initiated read end interrupt enable (when the I3C acts as controller)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 9. "FCIE,frame complete interrupt enable (whatever the I3C acts as controller/target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 5. "RxFNEIE,Rx-FIFO not empty interrupt enable (whatever the I3C acts as controller/target)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 4. "TxFNFIE,Tx-FIFO not full interrupt enable (whatever the I3C acts as controller/target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 3. "SFNEIE,S-FIFO not empty interrupt enable when the I3C acts as controller" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 2. "CFNFIE,C-FIFO not full interrupt enable when the I3C acts as controller" "0: interrupt disabled,1: interrupt enabled"
wgroup.long 0x58++0x3
line.long 0x0 "I3C_CEVR,I3C clear event register"
bitfld.long 0x0 31. "CGRPF,Clear DEFGRPA CCC flag (when the I3C acts as target)" "0: no effect,1: clear GRPF"
bitfld.long 0x0 30. "CDEFF,Clear DEFTGTS CCC flag (when the I3C acts as target)" "0: no effect,1: clear DEFF"
newline
bitfld.long 0x0 29. "CINTUPDF,Clear ENEC/DISEC CCC flag (when the I3C acts as target)" "0: no effect,1: clear CINTUPDF"
bitfld.long 0x0 28. "CASUPDF,Clear ENTASx CCC flag (when the I3C acts as target)" "0: no effect,1: clear ASUPDF"
newline
bitfld.long 0x0 27. "CRSTF,Clear reset pattern flag (when the I3C acts as target)" "0: no effect,1: clear RSTF"
bitfld.long 0x0 26. "CMRLUPDF,Clear SETMRL CCC flag (when the I3C acts as target)" "0: no effect,1: clear MRLUPDF"
newline
bitfld.long 0x0 25. "CMWLUPDF,Clear SETMWL CCC flag (when the I3C acts as target)" "0: no effect,1: clear MWLUPDF"
bitfld.long 0x0 24. "CDAUPDF,Clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C acts as target)" "0: no effect,1: clear DAUPDF"
newline
bitfld.long 0x0 23. "CSTAF,Clear format 1 GETSTATUS CCC flag (when the I3C acts as target)" "0: no effect,1: clear STAF"
bitfld.long 0x0 22. "CGETF,Clear GETxxx CCC flag (except GETSTATUS of format 1) (when the I3C acts as target)" "0: no effect,1: clear GETF"
newline
bitfld.long 0x0 21. "CWKPF,Clear wake-up flag (when the I3C acts as target)" "0: no effect,1: clear WKPF"
bitfld.long 0x0 19. "CHJF,Clear hot-join flag (when the I3C acts as controller)" "0: no effect,1: clear HJF"
newline
bitfld.long 0x0 18. "CCRUPDF,Clear controller-role update flag (when the I3C acts as target)" "0: no effect,1: clear CRUPDF"
bitfld.long 0x0 17. "CCRF,Clear controller-role request flag (when the I3C acts as controller)" "0: no effect,1: clear CRF"
newline
bitfld.long 0x0 16. "CIBIENDF,Clear IBI end flag (when the I3C acts as target)" "0: no effect,1: clear IBIENDF"
bitfld.long 0x0 15. "CIBIF,Clear IBI request flag (when the I3C acts as controller)" "0: no effect,1: clear IBIF"
newline
bitfld.long 0x0 11. "CERRF,Clear error flag (whatever the I3C acts as controller/target)" "0: no effect,1: clear ERRF"
bitfld.long 0x0 10. "CRxTGTENDF,Clear target-initiated read end flag (when the I3C acts as controller)" "0: no effect,1: clear RxTGTENDF"
newline
bitfld.long 0x0 9. "CFCF,Clear frame complete flag (whatever the I3C acts as controller/target)" "0: no effect,1: clear FCF"
rgroup.long 0x5C++0x3
line.long 0x0 "I3C_MISR,I3C masked interrupt status register"
bitfld.long 0x0 31. "GRPMIS,DEFGRPA CCC masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 30. "DEFMIS,DEFTGTS CCC masked interrupt status (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 29. "INTUPDMIS,ENEC/DISEC CCC masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 28. "ASUPDMIS,ENTASx CCC masked interrupt status (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 27. "RSTMIS,reset pattern masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 26. "MRLUPDMIS,SETMRL CCC masked interrupt status (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 25. "MWLUPDMIS,SETMWL CCC masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 24. "DAUPDMIS,ENTDAA/RSTDAA/SETNEWDA CCC masked interrupt status (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 23. "STAMIS,format 1 GETSTATUS CCC masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 22. "GETMIS,GETxxx CCC masked interrupt status except GETSTATUS of format 1 (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 21. "WKPMIS,Wake-up/missed start masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 19. "HJMIS,Hot-join masked interrupt status (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 18. "CRUPDMIS,Controller-role update masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 17. "CRMIS,Controller-role request masked interrupt status (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 16. "IBIENDMIS,IBI end masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 15. "IBIMIS,IBI request masked interrupt status (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 11. "ERRMIS,error masked interrupt status (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 10. "RxTGTENDMIS,target-initiated read end masked interrupt status (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 9. "FCMIS,frame complete masked interrupt status (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 5. "RxFNEMIS,Rx-FIFO not empty masked interrupt status (whatever the I3C acts as controller/target)" "0,1"
newline
bitfld.long 0x0 4. "TxFNFMIS,Tx-FIFO not full masked interrupt status (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 3. "SFNEMIS,S-FIFO not empty masked interrupt status (when the I3C acts as controller)" "0,1"
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bitfld.long 0x0 2. "CFNFMIS,C-FIFO not full masked interrupt status (when the I3C acts as controller)" "0,1"
group.long 0x60++0x13
line.long 0x0 "I3C_DEVR0,I3C own device characteristics register"
rbitfld.long 0x0 24. "RSTVAL,Reset action is valid (when the I3C acts as target)" "0,1"
rbitfld.long 0x0 22.--23. "RSTACT,Reset action/level on received reset pattern (when the I3C acts as target)" "0: no reset action,1: first level of reset: the application software..,2: second level of reset: the application software..,3: no reset action"
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rbitfld.long 0x0 20.--21. "AS,Activity state (when the I3C acts as target)" "0: activity state 0,1: activity state 1,2: activity state 2,3: activity state 3"
bitfld.long 0x0 19. "HJEN,Hot-join request enable (when the I3C acts as target)" "0: hot-join request disabled,1: hot-join request enabled"
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bitfld.long 0x0 17. "CREN,Controller-role request enable (when the I3C acts as target)" "0: controller-role request disabled,1: controller-role request enabled"
bitfld.long 0x0 16. "IBIEN,IBI request enable (when the I3C acts as target)" "0: IBI request disabled,1: IBI request enabled"
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hexmask.long.byte 0x0 1.--7. 1. "DA,7-bit dynamic address"
bitfld.long 0x0 0. "DAVAL,Dynamic address is valid (when the I3C acts as target)" "0,1"
line.long 0x4 "I3C_DEVR1,I3C device 1 characteristics register"
rbitfld.long 0x4 31. "DIS,Disables writes to DA[6:0] (when the I3C acts as controller)" "0: write to DA[7:0] and to IBIDEN in the I3C_DEVRx..,1: write to DA[7:0] and to IBIDEN is disabled/locked"
bitfld.long 0x4 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "0: C-FIFO and Tx-FIFO are not flushed after an IBI..,1: I3C transfer is stopped and both C-FIFO and.."
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bitfld.long 0x4 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "0: no data byte follows the acknowledged IBI from..,1: the mandatory data byte MDB[7:0] follows the.."
bitfld.long 0x4 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "0: a controller-role request from target x must be..,1: a controller-role request (with 7-bit dynamic.."
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bitfld.long 0x4 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "0: an IBI request from target x must be NACK-ed,1: an IBI request (with 7-bit dynamic address.."
hexmask.long.byte 0x4 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)"
line.long 0x8 "I3C_DEVR2,I3C device 2 characteristics register"
rbitfld.long 0x8 31. "DIS,Disables writes to DA[6:0] (when the I3C acts as controller)" "0: write to DA[7:0] and to IBIDEN in the I3C_DEVRx..,1: write to DA[7:0] and to IBIDEN is disabled/locked"
bitfld.long 0x8 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "0: C-FIFO and Tx-FIFO are not flushed after an IBI..,1: I3C transfer is stopped and both C-FIFO and.."
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bitfld.long 0x8 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "0: no data byte follows the acknowledged IBI from..,1: the mandatory data byte MDB[7:0] follows the.."
bitfld.long 0x8 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "0: a controller-role request from target x must be..,1: a controller-role request (with 7-bit dynamic.."
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bitfld.long 0x8 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "0: an IBI request from target x must be NACK-ed,1: an IBI request (with 7-bit dynamic address.."
hexmask.long.byte 0x8 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)"
line.long 0xC "I3C_DEVR3,I3C device 3 characteristics register"
rbitfld.long 0xC 31. "DIS,Disables writes to DA[6:0] (when the I3C acts as controller)" "0: write to DA[7:0] and to IBIDEN in the I3C_DEVRx..,1: write to DA[7:0] and to IBIDEN is disabled/locked"
bitfld.long 0xC 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "0: C-FIFO and Tx-FIFO are not flushed after an IBI..,1: I3C transfer is stopped and both C-FIFO and.."
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bitfld.long 0xC 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "0: no data byte follows the acknowledged IBI from..,1: the mandatory data byte MDB[7:0] follows the.."
bitfld.long 0xC 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "0: a controller-role request from target x must be..,1: a controller-role request (with 7-bit dynamic.."
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bitfld.long 0xC 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "0: an IBI request from target x must be NACK-ed,1: an IBI request (with 7-bit dynamic address.."
hexmask.long.byte 0xC 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)"
line.long 0x10 "I3C_DEVR4,I3C device 4 characteristics register"
rbitfld.long 0x10 31. "DIS,Disables writes to DA[6:0] (when the I3C acts as controller)" "0: write to DA[7:0] and to IBIDEN in the I3C_DEVRx..,1: write to DA[7:0] and to IBIDEN is disabled/locked"
bitfld.long 0x10 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "0: C-FIFO and Tx-FIFO are not flushed after an IBI..,1: I3C transfer is stopped and both C-FIFO and.."
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bitfld.long 0x10 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "0: no data byte follows the acknowledged IBI from..,1: the mandatory data byte MDB[7:0] follows the.."
bitfld.long 0x10 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "0: a controller-role request from target x must be..,1: a controller-role request (with 7-bit dynamic.."
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bitfld.long 0x10 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "0: an IBI request from target x must be NACK-ed,1: an IBI request (with 7-bit dynamic address.."
hexmask.long.byte 0x10 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)"
group.long 0x90++0x7
line.long 0x0 "I3C_MAxRLR,I3C maximum read length register"
bitfld.long 0x0 16.--18. "IBIP,IBI payload data maximum size in bytes (when I3C acts as target)" "0: null payload data size (only allowed when BCR2 =..,1: 1 byte (mandatory data byte MDB[7:0],2: 2 bytes (including first MDB[7:0]),3: 3 bytes (including first MDB[7:0]),4: 4 bytes (including first MDB[7:0]),?,?,?"
hexmask.long.word 0x0 0.--15. 1. "MRL,Maximum data read length (when I3C acts as target)"
line.long 0x4 "I3C_MAxWLR,I3C maximum write length register"
hexmask.long.word 0x4 0.--15. 1. "MWL,Maximum data write length (when I3C acts as target)"
group.long 0xA0++0xB
line.long 0x0 "I3C_TIMINGR0,I3C timing register 0"
hexmask.long.byte 0x0 24.--31. 1. "SCLH_I2C,SCL high duration used for legacy Iless thansup>2less than/sup>C messages in number of kernel clocks cycles:"
hexmask.long.byte 0x0 16.--23. 1. "SCLL_OD,SCL low duration in open-drain phases used for legacy Iless thansup>2less than/sup>C messages and for I3C open-drain phases (address phase following a start ACK phase during controller-initiated messages and T bit phase during.."
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hexmask.long.byte 0x0 8.--15. 1. "SCLH_I3C,SCL high duration used for I3C messages (both in push-pull and open-drain phases) in number of kernel clocks cycles:"
hexmask.long.byte 0x0 0.--7. 1. "SCLL_PP,SCL low duration in I3C push-pull phases in number of kernel clocks cycles:"
line.long 0x4 "I3C_TIMINGR1,I3C timing register 1"
bitfld.long 0x4 28.--29. "SDA_HD,SDA hold time (when the I3C acts as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tless thansub>HD_PPless than/sub>):" "0,1,2,3"
hexmask.long.byte 0x4 16.--22. 1. "FREE,Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller)"
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bitfld.long 0x4 8.--9. "ASNCR,Activity state of the new controller (when I3C acts as active controller)" "0,1,2,3"
hexmask.long.byte 0x4 0.--7. 1. "AVAL,Number of kernel clock cycles to set a time unit of 1 us whatever I3C acts as controller or target."
line.long 0x8 "I3C_TIMINGR2,I3C timing register 2"
hexmask.long.byte 0x8 8.--15. 1. "STALL,Controller clock stall time in number of kernel clock cycles"
bitfld.long 0x8 6. "STALLL,Controller clock stall enable in the address ACK/NACK phase (before the ninth bit) of a legacy I2C read/write message." "0: no stall,1: stall enabled"
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bitfld.long 0x8 5. "STALLS,Controller clock stall enable in the data ACK/NACK phase of a legacy I2C write message." "0: no stall,1: stall enabled"
bitfld.long 0x8 4. "STALLR,Controller clock stall enable in the data ACK/NACK phase of a legacy I2C read message." "0: no stall,1: stall enabled"
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bitfld.long 0x8 3. "STALLA,Controller clock stall enable on ACK phase" "0: no stall,1: stall enabled"
bitfld.long 0x8 2. "STALLC,Controller clock stall enable on PAR phase of CCC" "0: no stall,1: stall enabled"
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bitfld.long 0x8 1. "STALLD,Controller clock stall enable on PAR phase of Data" "0: no stall,1: stall enabled"
bitfld.long 0x8 0. "STALLT,Controller clock stall enable on T-bit phase of data" "0: no stall,1: stall enabled"
group.long 0xC0++0x17
line.long 0x0 "I3C_BCR,I3C bus characteristics register"
bitfld.long 0x0 6. "BCR6,Controller capable" "0: I3C target (no controller capable),1: I3C controller capable"
bitfld.long 0x0 2. "BCR2,in-band interrupt (IBI) payload" "0: no data byte follows the accepted IBI,1: at least one mandatory data byte follows the.."
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bitfld.long 0x0 0. "BCR0,max data speed limitation" "0: no limitation,1: limitation as described by I3C_GETMxDSR."
line.long 0x4 "I3C_DCR,I3C device characteristics register"
hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID"
line.long 0x8 "I3C_GETCAPR,I3C get capability register"
bitfld.long 0x8 14. "CAPPEND,IBI MDB support for pending read notification" "0: this I3C when acting as target sends an IBI..,1: this I3C when acting as target sends an IBI.."
line.long 0xC "I3C_CRCAPR,I3C controller-role capability register"
bitfld.long 0xC 9. "CAPGRP,group management support (when acting as controller)" "0: this I3C does not support group address..,1: this I3C supports group address capabilities.."
bitfld.long 0xC 3. "CAPDHOFF,delayed controller-role hand-off" "0: this I3C does not needs additional time to..,1: this I3C needs additional time to process a.."
line.long 0x10 "I3C_GETMxDSR,I3C get max data speed register"
bitfld.long 0x10 24. "TSCO,clock-to-data turnaround time (tless thansub>SCOless than/sub>)" "0: tless thansub>SCOless than/sub> less than or..,1: tless thansub>SCOless than/sub> > 12 ns (refer.."
hexmask.long.byte 0x10 16.--23. 1. "RDTURN,programmed byte of the 3-byte MaxRdTurn (maximum read turnaround byte)"
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bitfld.long 0x10 8.--9. "FMT,GETMxDS CCC format" "0: format 1 (2 bytes with MaxWr with no defining..,1: format 2: (5 bytes w.,2: format 2 (5 bytes with MaxWr with no defining..,3: format 2 (5 bytes with MaxWr with no defining.."
bitfld.long 0x10 0.--1. "HOFFAS,Controller hand-off activity state" "0: activity state 0 is the initial activity state..,1: activity state 1 is the initial activity state..,2: activity state 2 is the initial activity state..,3: activity state 3 is the initial activity state.."
line.long 0x14 "I3C_EPIDR,I3C extended provisioned ID register"
hexmask.long.word 0x14 17.--31. 1. "MIPIMID,15-bit MIPI manufacturer ID"
rbitfld.long 0x14 16. "IDTSEL,provisioned ID type selector" "0,1"
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hexmask.long.byte 0x14 12.--15. 1. "MIPIID,4-bit MIPI Instance ID"
tree.end
tree "I3C2"
base ad:0x40016C00
wgroup.long 0x0++0x3
line.long 0x0 "I3C_CR,I3C message control register"
bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when the I3C acts as controller)" "0: this message from controller is followed by a..,1: this message from controller ends with a stop.."
hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (whatever I3C acts as controller/target)"
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hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / Iless thansup>2less than/sup>C static target address (when I3C acts as controller)"
bitfld.long 0x0 16. "RNW,Read / non-write message (when I3C acts as controller)" "0: write message,1: read message"
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hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of data to transfer during a read or write message in bytes (whatever I3C acts as controller/target)"
wgroup.long 0x0++0x3
line.long 0x0 "I3C_CR_ALTERNATE1,I3C message control register"
bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when I3C acts as controller)" "0: this message from controller is followed by a..,1: the message from the controller ends with a stop.."
hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (when I3C acts as controller)"
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hexmask.long.byte 0x0 16.--23. 1. "CCC,8-bit CCC code (when I3C acts as controller)"
hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of related data to the CCC command to transfer as CCC defining bytes or CCC sub-command bytes or CCC data bytes in bytes"
group.long 0x4++0x3
line.long 0x0 "I3C_CFGR,I3C configuration register"
bitfld.long 0x0 30. "TSFSET,Frame transfer set (software trigger) (when I3C acts as controller)" "0: no action,1: setting this bit initiates a frame transfer by.."
bitfld.long 0x0 29. "TRIGHWEN,Hardware trigger enable (when IP acts as controller)" "0: hardware trigger mode is disabled,1: hardware trigger mode is enabled"
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bitfld.long 0x0 28. "TRIGPOL,Hardware trigger signal polarity (when IP acts as controller)" "0: rising edge,1: falling edge"
hexmask.long.byte 0x0 24.--27. 1. "TRIGSEL,Hardware trigger signal selection (when IP acts as controller)"
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bitfld.long 0x0 23. "FCFDIS,FCF generation disable (when I3C acts as controller)" "0: enable the generation of the flag FCF in the..,1: disable the generation of the flag FCF in the.."
bitfld.long 0x0 21. "CFLUSH,C-FIFO flush (when I3C acts as controller)" "0: no action,1: flush C-FIFO"
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bitfld.long 0x0 20. "CDMAEN,C-FIFO DMA request enable (when I3C acts as controller)" "0: DMA mode is disabled for C-FIFO,1: DMA mode is enabled for C-FIFO"
bitfld.long 0x0 19. "TMODE,Transmit mode (when I3C acts as controller)" "0: C-FIFO and Tx-FIFO are not preloaded before..,1: C-FIFO and Tx-FIFO are first preloaded (also.."
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bitfld.long 0x0 18. "SMODE,S-FIFO enable / status receive mode (when I3C acts as controller)" "0: S-FIFO is disabled,1: S-FIFO is enabled."
bitfld.long 0x0 17. "SFLUSH,S-FIFO flush (when I3C acts as controller)" "0: no action,1: flush S-FIFO"
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bitfld.long 0x0 16. "SDMAEN,S-FIFO DMA request enable (when I3C acts as controller)" "0: DMA mode is disabled for reading status register..,1: DMA mode is enabled for reading status register.."
bitfld.long 0x0 14. "TxTHRES,Tx-FIFO threshold (whatever I3C acts as controller/target)" "0: 1-byte threshold,1: 1-word / 4-byte threshold"
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bitfld.long 0x0 13. "TxFLUSH,Tx-FIFO flush (whatever I3C acts as controller/target)" "0: no action,1: flush Tx-FIFO"
bitfld.long 0x0 12. "TxDMAEN,Tx-FIFO DMA request enable (whatever I3C acts as controller/target)" "0: DMA mode is disabled for Tx-FIFO,1: DMA mode is enabled for Tx-FIFO"
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bitfld.long 0x0 10. "RxTHRES,Rx-FIFO threshold (whatever I3C acts as controller/target)" "0: 1-byte threshold,1: 1-word/4-bytes threshold"
bitfld.long 0x0 9. "RxFLUSH,Rx-FIFO flush (whatever I3C acts as controller/target)" "0: no action,1: flush Rx-FIFO"
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bitfld.long 0x0 8. "RxDMAEN,Rx-FIFO DMA request enable (whatever I3C acts as controller/target)" "0: DMA mode is disabled for Rx-FIFO,1: DMA mode is enabled for Rx-FIFO"
bitfld.long 0x0 7. "HJACK,Hot-join request acknowledge (when I3C acts as a controller)" "0: hot-join request is not acknowledged,1: hot-join request is acknowledged"
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bitfld.long 0x0 5. "HKSDAEN,High-keeper enable on SDA line (when I3C acts as a controller)" "0: High-keeper is disabled,1: High-keeper is enabled and the weak pull-up is.."
bitfld.long 0x0 4. "ExITPTRN,HDR exit pattern enable (when I3C acts as a controller)" "0: HDR exit pattern is not sent after the issued..,1: HDR exit pattern is sent after the issued.."
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bitfld.long 0x0 3. "RSTPTRN,HDR reset pattern enable (when I3C acts as a controller)" "0: standard stop emitted at the end of a frame,1: HDR reset pattern is inserted before the stop of.."
bitfld.long 0x0 2. "NOARBH,No arbitrable header after a start (when I3C acts as a controller)" "0: An arbitrable header (0b111_1110 + RnW = 0) is..,1: No arbitrable header"
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bitfld.long 0x0 1. "CRINIT,Initial controller/target role" "0: target role,1: controller role"
bitfld.long 0x0 0. "EN,I3C enable (whatever I3C acts as controller/target)" "0: I3C is disabled,1: I3C is enabled"
rgroup.long 0x10++0x7
line.long 0x0 "I3C_RDR,I3C receive data byte register"
hexmask.long.byte 0x0 0.--7. 1. "RDB0,8-bit received data on I3C bus."
line.long 0x4 "I3C_RDWR,I3C receive data word register"
hexmask.long.byte 0x4 24.--31. 1. "RDB3,8-bit received data (latest byte on I3C bus)."
hexmask.long.byte 0x4 16.--23. 1. "RDB2,8-bit received data (next byte after RDB1 on I3C bus)."
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hexmask.long.byte 0x4 8.--15. 1. "RDB1,8-bit received data (next byte after RDB0 on I3C bus)."
hexmask.long.byte 0x4 0.--7. 1. "RDB0,8-bit received data (earliest byte on I3C bus)."
wgroup.long 0x18++0x7
line.long 0x0 "I3C_TDR,I3C transmit data byte register"
hexmask.long.byte 0x0 0.--7. 1. "TDB0,8-bit data to transmit on I3C bus."
line.long 0x4 "I3C_TDWR,I3C transmit data word register"
hexmask.long.byte 0x4 24.--31. 1. "TDB3,8-bit transmit data (latest byte on I3C bus)."
hexmask.long.byte 0x4 16.--23. 1. "TDB2,8-bit transmit data (next byte after TDB1[7:0] on I3C bus)."
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hexmask.long.byte 0x4 8.--15. 1. "TDB1,8-bit transmit data (next byte after TDB0[7:0] on I3C bus)."
hexmask.long.byte 0x4 0.--7. 1. "TDB0,8-bit transmit data (earliest byte on I3C bus)"
group.long 0x20++0x7
line.long 0x0 "I3C_IBIDR,I3C IBI payload data register"
hexmask.long.byte 0x0 24.--31. 1. "IBIDB3,8-bit IBI payload data (latest byte on I3C bus)."
hexmask.long.byte 0x0 16.--23. 1. "IBIDB2,8-bit IBI payload data (next byte on I3C bus after IBIDB1[7:0])."
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hexmask.long.byte 0x0 8.--15. 1. "IBIDB1,8-bit IBI payload data (next byte on I3C bus after IBIDB0[7:0])."
hexmask.long.byte 0x0 0.--7. 1. "IBIDB0,8-bit IBI payload data (earliest byte on I3C bus MDB[7:0] mandatory data byte)."
line.long 0x4 "I3C_TGTTDR,I3C target transmit configuration register"
bitfld.long 0x4 16. "PRELOAD,Preload of the Tx-FIFO (when I3C is configured as target)" "0: no Tx-FIFO preload,1: Tx-FIFO preload"
hexmask.long.word 0x4 0.--15. 1. "TGTTDCNT,Transmit data counter in bytes (when I3C is configured as target)"
rgroup.long 0x30++0x7
line.long 0x0 "I3C_SR,I3C status register"
hexmask.long.byte 0x0 24.--31. 1. "MID,Message identifier/counter of a given frame (when the I3C acts as controller)"
bitfld.long 0x0 18. "DIR,Message direction" "0: write,1: read"
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bitfld.long 0x0 17. "ABT,A private read message is ended prematurely by the target (when the I3C acts as controller)" "0: no early completion from the target,1: early completion from the target"
hexmask.long.word 0x0 0.--15. 1. "xDCNT,Data counter"
line.long 0x4 "I3C_SER,I3C status error register"
bitfld.long 0x4 10. "DERR,Data error (when the I3C acts as controller)" "0: no detected error,1: controller detected a data error during the.."
bitfld.long 0x4 9. "DNACK,Data not acknowledged (when the I3C acts as controller)" "0: no detected error,1: controller detected that a data byte is not.."
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bitfld.long 0x4 8. "ANACK,Address not acknowledged (when the I3C is configured as controller)" "0: no detected error,1: controller detected that the static/dynamic.."
bitfld.long 0x4 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C acts as controller)" "0: no detected error,1: controller detected either:"
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bitfld.long 0x4 6. "DOVR,Rx-FIFO overrun or Tx-FIFO underrun" "0: no detected error,1: whatever controller or target hardware detected.."
bitfld.long 0x4 5. "STALL,SCL stall error (when the I3C acts as target)" "0: no detected error,1: target detected that SCL was stable for more.."
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bitfld.long 0x4 4. "PERR,Protocol error" "0: no detected error,1: whatever controller or target hardware detected.."
hexmask.long.byte 0x4 0.--3. 1. "CODERR,Protocol error code/type"
rgroup.long 0x40++0x3
line.long 0x0 "I3C_RMR,I3C received message register"
hexmask.long.byte 0x0 17.--23. 1. "RADD,Received target address (when the I3C is configured as controller)"
hexmask.long.byte 0x0 8.--15. 1. "RCODE,Received CCC code (when the I3C is configured as target)"
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bitfld.long 0x0 0.--2. "IBIRDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7"
rgroup.long 0x50++0x7
line.long 0x0 "I3C_EVR,I3C event register"
bitfld.long 0x0 31. "GRPF,Group addressing flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C acts as target)" "0,1"
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bitfld.long 0x0 29. "INTUPDF,Interrupt/controller-role/hot-join update flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 28. "ASUPDF,Activity state update flag (when the I3C acts as target)" "0,1"
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bitfld.long 0x0 27. "RSTF,Reset pattern flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 26. "MRLUPDF,Maximum read length update flag (when the I3C acts as target)" "0,1"
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bitfld.long 0x0 25. "MWLUPDF,Maximum write length update flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 24. "DAUPDF,Dynamic address update flag (when the I3C acts as target)" "0,1"
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bitfld.long 0x0 23. "STAF,Get status flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 22. "GETF,Get flag (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 21. "WKPF,Wake-up/missed start flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 19. "HJF,Hot-join flag (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 18. "CRUPDF,Controller-role update flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 17. "CRF,Controller-role request flag (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 15. "IBIF,IBI flag (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 11. "ERRF,Flag (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 10. "RxTGTENDF,Target-initiated read end flag (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 9. "FCF,Frame complete flag (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 7. "RxLASTF,Last read data byte/word flag (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 6. "TxLASTF,Last written data byte/word flag (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 5. "RxFNEF,Rx-FIFO not empty flag (whatever the I3C acts as controller/target)" "0,1"
newline
bitfld.long 0x0 4. "TxFNFF,Tx-FIFO not full flag (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C acts as controller)" "0,1"
bitfld.long 0x0 1. "TxFEF,Tx-FIFO empty flag (whatever the I3C acts as controller/target)" "0,1"
newline
bitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C acts as controller)" "0,1"
line.long 0x4 "I3C_IER,I3C interrupt enable register"
bitfld.long 0x4 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 27. "RSTIE,reset pattern interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 23. "STAIE,format 1 GETSTATUS CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 22. "GETIE,GETxxx CCC interrupt enable (except GETSTATUS of format 1) (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 21. "WKPIE,Wake-up interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 19. "HJIE,Hot-join interrupt enable (when the I3C acts as controller)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 18. "CRUPDIE,Controller-role update interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 17. "CRIE,Controller-role request interrupt enable (when the I3C acts as controller)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 16. "IBIENDIE,IBI end interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 15. "IBIIE,IBI request interrupt enable (when the I3C acts as controller)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 11. "ERRIE,error interrupt enable (whatever the I3C acts as controller/target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 10. "RxTGTENDIE,target-initiated read end interrupt enable (when the I3C acts as controller)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 9. "FCIE,frame complete interrupt enable (whatever the I3C acts as controller/target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 5. "RxFNEIE,Rx-FIFO not empty interrupt enable (whatever the I3C acts as controller/target)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 4. "TxFNFIE,Tx-FIFO not full interrupt enable (whatever the I3C acts as controller/target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 3. "SFNEIE,S-FIFO not empty interrupt enable when the I3C acts as controller" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 2. "CFNFIE,C-FIFO not full interrupt enable when the I3C acts as controller" "0: interrupt disabled,1: interrupt enabled"
wgroup.long 0x58++0x3
line.long 0x0 "I3C_CEVR,I3C clear event register"
bitfld.long 0x0 31. "CGRPF,Clear DEFGRPA CCC flag (when the I3C acts as target)" "0: no effect,1: clear GRPF"
bitfld.long 0x0 30. "CDEFF,Clear DEFTGTS CCC flag (when the I3C acts as target)" "0: no effect,1: clear DEFF"
newline
bitfld.long 0x0 29. "CINTUPDF,Clear ENEC/DISEC CCC flag (when the I3C acts as target)" "0: no effect,1: clear CINTUPDF"
bitfld.long 0x0 28. "CASUPDF,Clear ENTASx CCC flag (when the I3C acts as target)" "0: no effect,1: clear ASUPDF"
newline
bitfld.long 0x0 27. "CRSTF,Clear reset pattern flag (when the I3C acts as target)" "0: no effect,1: clear RSTF"
bitfld.long 0x0 26. "CMRLUPDF,Clear SETMRL CCC flag (when the I3C acts as target)" "0: no effect,1: clear MRLUPDF"
newline
bitfld.long 0x0 25. "CMWLUPDF,Clear SETMWL CCC flag (when the I3C acts as target)" "0: no effect,1: clear MWLUPDF"
bitfld.long 0x0 24. "CDAUPDF,Clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C acts as target)" "0: no effect,1: clear DAUPDF"
newline
bitfld.long 0x0 23. "CSTAF,Clear format 1 GETSTATUS CCC flag (when the I3C acts as target)" "0: no effect,1: clear STAF"
bitfld.long 0x0 22. "CGETF,Clear GETxxx CCC flag (except GETSTATUS of format 1) (when the I3C acts as target)" "0: no effect,1: clear GETF"
newline
bitfld.long 0x0 21. "CWKPF,Clear wake-up flag (when the I3C acts as target)" "0: no effect,1: clear WKPF"
bitfld.long 0x0 19. "CHJF,Clear hot-join flag (when the I3C acts as controller)" "0: no effect,1: clear HJF"
newline
bitfld.long 0x0 18. "CCRUPDF,Clear controller-role update flag (when the I3C acts as target)" "0: no effect,1: clear CRUPDF"
bitfld.long 0x0 17. "CCRF,Clear controller-role request flag (when the I3C acts as controller)" "0: no effect,1: clear CRF"
newline
bitfld.long 0x0 16. "CIBIENDF,Clear IBI end flag (when the I3C acts as target)" "0: no effect,1: clear IBIENDF"
bitfld.long 0x0 15. "CIBIF,Clear IBI request flag (when the I3C acts as controller)" "0: no effect,1: clear IBIF"
newline
bitfld.long 0x0 11. "CERRF,Clear error flag (whatever the I3C acts as controller/target)" "0: no effect,1: clear ERRF"
bitfld.long 0x0 10. "CRxTGTENDF,Clear target-initiated read end flag (when the I3C acts as controller)" "0: no effect,1: clear RxTGTENDF"
newline
bitfld.long 0x0 9. "CFCF,Clear frame complete flag (whatever the I3C acts as controller/target)" "0: no effect,1: clear FCF"
rgroup.long 0x5C++0x3
line.long 0x0 "I3C_MISR,I3C masked interrupt status register"
bitfld.long 0x0 31. "GRPMIS,DEFGRPA CCC masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 30. "DEFMIS,DEFTGTS CCC masked interrupt status (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 29. "INTUPDMIS,ENEC/DISEC CCC masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 28. "ASUPDMIS,ENTASx CCC masked interrupt status (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 27. "RSTMIS,reset pattern masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 26. "MRLUPDMIS,SETMRL CCC masked interrupt status (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 25. "MWLUPDMIS,SETMWL CCC masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 24. "DAUPDMIS,ENTDAA/RSTDAA/SETNEWDA CCC masked interrupt status (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 23. "STAMIS,format 1 GETSTATUS CCC masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 22. "GETMIS,GETxxx CCC masked interrupt status except GETSTATUS of format 1 (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 21. "WKPMIS,Wake-up/missed start masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 19. "HJMIS,Hot-join masked interrupt status (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 18. "CRUPDMIS,Controller-role update masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 17. "CRMIS,Controller-role request masked interrupt status (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 16. "IBIENDMIS,IBI end masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 15. "IBIMIS,IBI request masked interrupt status (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 11. "ERRMIS,error masked interrupt status (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 10. "RxTGTENDMIS,target-initiated read end masked interrupt status (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 9. "FCMIS,frame complete masked interrupt status (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 5. "RxFNEMIS,Rx-FIFO not empty masked interrupt status (whatever the I3C acts as controller/target)" "0,1"
newline
bitfld.long 0x0 4. "TxFNFMIS,Tx-FIFO not full masked interrupt status (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 3. "SFNEMIS,S-FIFO not empty masked interrupt status (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 2. "CFNFMIS,C-FIFO not full masked interrupt status (when the I3C acts as controller)" "0,1"
group.long 0x60++0x13
line.long 0x0 "I3C_DEVR0,I3C own device characteristics register"
rbitfld.long 0x0 24. "RSTVAL,Reset action is valid (when the I3C acts as target)" "0,1"
rbitfld.long 0x0 22.--23. "RSTACT,Reset action/level on received reset pattern (when the I3C acts as target)" "0: no reset action,1: first level of reset: the application software..,2: second level of reset: the application software..,3: no reset action"
newline
rbitfld.long 0x0 20.--21. "AS,Activity state (when the I3C acts as target)" "0: activity state 0,1: activity state 1,2: activity state 2,3: activity state 3"
bitfld.long 0x0 19. "HJEN,Hot-join request enable (when the I3C acts as target)" "0: hot-join request disabled,1: hot-join request enabled"
newline
bitfld.long 0x0 17. "CREN,Controller-role request enable (when the I3C acts as target)" "0: controller-role request disabled,1: controller-role request enabled"
bitfld.long 0x0 16. "IBIEN,IBI request enable (when the I3C acts as target)" "0: IBI request disabled,1: IBI request enabled"
newline
hexmask.long.byte 0x0 1.--7. 1. "DA,7-bit dynamic address"
bitfld.long 0x0 0. "DAVAL,Dynamic address is valid (when the I3C acts as target)" "0,1"
line.long 0x4 "I3C_DEVR1,I3C device 1 characteristics register"
rbitfld.long 0x4 31. "DIS,Disables writes to DA[6:0] (when the I3C acts as controller)" "0: write to DA[7:0] and to IBIDEN in the I3C_DEVRx..,1: write to DA[7:0] and to IBIDEN is disabled/locked"
bitfld.long 0x4 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "0: C-FIFO and Tx-FIFO are not flushed after an IBI..,1: I3C transfer is stopped and both C-FIFO and.."
newline
bitfld.long 0x4 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "0: no data byte follows the acknowledged IBI from..,1: the mandatory data byte MDB[7:0] follows the.."
bitfld.long 0x4 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "0: a controller-role request from target x must be..,1: a controller-role request (with 7-bit dynamic.."
newline
bitfld.long 0x4 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "0: an IBI request from target x must be NACK-ed,1: an IBI request (with 7-bit dynamic address.."
hexmask.long.byte 0x4 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)"
line.long 0x8 "I3C_DEVR2,I3C device 2 characteristics register"
rbitfld.long 0x8 31. "DIS,Disables writes to DA[6:0] (when the I3C acts as controller)" "0: write to DA[7:0] and to IBIDEN in the I3C_DEVRx..,1: write to DA[7:0] and to IBIDEN is disabled/locked"
bitfld.long 0x8 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "0: C-FIFO and Tx-FIFO are not flushed after an IBI..,1: I3C transfer is stopped and both C-FIFO and.."
newline
bitfld.long 0x8 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "0: no data byte follows the acknowledged IBI from..,1: the mandatory data byte MDB[7:0] follows the.."
bitfld.long 0x8 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "0: a controller-role request from target x must be..,1: a controller-role request (with 7-bit dynamic.."
newline
bitfld.long 0x8 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "0: an IBI request from target x must be NACK-ed,1: an IBI request (with 7-bit dynamic address.."
hexmask.long.byte 0x8 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)"
line.long 0xC "I3C_DEVR3,I3C device 3 characteristics register"
rbitfld.long 0xC 31. "DIS,Disables writes to DA[6:0] (when the I3C acts as controller)" "0: write to DA[7:0] and to IBIDEN in the I3C_DEVRx..,1: write to DA[7:0] and to IBIDEN is disabled/locked"
bitfld.long 0xC 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "0: C-FIFO and Tx-FIFO are not flushed after an IBI..,1: I3C transfer is stopped and both C-FIFO and.."
newline
bitfld.long 0xC 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "0: no data byte follows the acknowledged IBI from..,1: the mandatory data byte MDB[7:0] follows the.."
bitfld.long 0xC 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "0: a controller-role request from target x must be..,1: a controller-role request (with 7-bit dynamic.."
newline
bitfld.long 0xC 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "0: an IBI request from target x must be NACK-ed,1: an IBI request (with 7-bit dynamic address.."
hexmask.long.byte 0xC 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)"
line.long 0x10 "I3C_DEVR4,I3C device 4 characteristics register"
rbitfld.long 0x10 31. "DIS,Disables writes to DA[6:0] (when the I3C acts as controller)" "0: write to DA[7:0] and to IBIDEN in the I3C_DEVRx..,1: write to DA[7:0] and to IBIDEN is disabled/locked"
bitfld.long 0x10 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "0: C-FIFO and Tx-FIFO are not flushed after an IBI..,1: I3C transfer is stopped and both C-FIFO and.."
newline
bitfld.long 0x10 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "0: no data byte follows the acknowledged IBI from..,1: the mandatory data byte MDB[7:0] follows the.."
bitfld.long 0x10 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "0: a controller-role request from target x must be..,1: a controller-role request (with 7-bit dynamic.."
newline
bitfld.long 0x10 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "0: an IBI request from target x must be NACK-ed,1: an IBI request (with 7-bit dynamic address.."
hexmask.long.byte 0x10 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)"
group.long 0x90++0x7
line.long 0x0 "I3C_MAxRLR,I3C maximum read length register"
bitfld.long 0x0 16.--18. "IBIP,IBI payload data maximum size in bytes (when I3C acts as target)" "0: null payload data size (only allowed when BCR2 =..,1: 1 byte (mandatory data byte MDB[7:0],2: 2 bytes (including first MDB[7:0]),3: 3 bytes (including first MDB[7:0]),4: 4 bytes (including first MDB[7:0]),?,?,?"
hexmask.long.word 0x0 0.--15. 1. "MRL,Maximum data read length (when I3C acts as target)"
line.long 0x4 "I3C_MAxWLR,I3C maximum write length register"
hexmask.long.word 0x4 0.--15. 1. "MWL,Maximum data write length (when I3C acts as target)"
group.long 0xA0++0xB
line.long 0x0 "I3C_TIMINGR0,I3C timing register 0"
hexmask.long.byte 0x0 24.--31. 1. "SCLH_I2C,SCL high duration used for legacy Iless thansup>2less than/sup>C messages in number of kernel clocks cycles:"
hexmask.long.byte 0x0 16.--23. 1. "SCLL_OD,SCL low duration in open-drain phases used for legacy Iless thansup>2less than/sup>C messages and for I3C open-drain phases (address phase following a start ACK phase during controller-initiated messages and T bit phase during.."
newline
hexmask.long.byte 0x0 8.--15. 1. "SCLH_I3C,SCL high duration used for I3C messages (both in push-pull and open-drain phases) in number of kernel clocks cycles:"
hexmask.long.byte 0x0 0.--7. 1. "SCLL_PP,SCL low duration in I3C push-pull phases in number of kernel clocks cycles:"
line.long 0x4 "I3C_TIMINGR1,I3C timing register 1"
bitfld.long 0x4 28.--29. "SDA_HD,SDA hold time (when the I3C acts as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tless thansub>HD_PPless than/sub>):" "0,1,2,3"
hexmask.long.byte 0x4 16.--22. 1. "FREE,Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller)"
newline
bitfld.long 0x4 8.--9. "ASNCR,Activity state of the new controller (when I3C acts as active controller)" "0,1,2,3"
hexmask.long.byte 0x4 0.--7. 1. "AVAL,Number of kernel clock cycles to set a time unit of 1 us whatever I3C acts as controller or target."
line.long 0x8 "I3C_TIMINGR2,I3C timing register 2"
hexmask.long.byte 0x8 8.--15. 1. "STALL,Controller clock stall time in number of kernel clock cycles"
bitfld.long 0x8 6. "STALLL,Controller clock stall enable in the address ACK/NACK phase (before the ninth bit) of a legacy I2C read/write message." "0: no stall,1: stall enabled"
newline
bitfld.long 0x8 5. "STALLS,Controller clock stall enable in the data ACK/NACK phase of a legacy I2C write message." "0: no stall,1: stall enabled"
bitfld.long 0x8 4. "STALLR,Controller clock stall enable in the data ACK/NACK phase of a legacy I2C read message." "0: no stall,1: stall enabled"
newline
bitfld.long 0x8 3. "STALLA,Controller clock stall enable on ACK phase" "0: no stall,1: stall enabled"
bitfld.long 0x8 2. "STALLC,Controller clock stall enable on PAR phase of CCC" "0: no stall,1: stall enabled"
newline
bitfld.long 0x8 1. "STALLD,Controller clock stall enable on PAR phase of Data" "0: no stall,1: stall enabled"
bitfld.long 0x8 0. "STALLT,Controller clock stall enable on T-bit phase of data" "0: no stall,1: stall enabled"
group.long 0xC0++0x17
line.long 0x0 "I3C_BCR,I3C bus characteristics register"
bitfld.long 0x0 6. "BCR6,Controller capable" "0: I3C target (no controller capable),1: I3C controller capable"
bitfld.long 0x0 2. "BCR2,in-band interrupt (IBI) payload" "0: no data byte follows the accepted IBI,1: at least one mandatory data byte follows the.."
newline
bitfld.long 0x0 0. "BCR0,max data speed limitation" "0: no limitation,1: limitation as described by I3C_GETMxDSR."
line.long 0x4 "I3C_DCR,I3C device characteristics register"
hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID"
line.long 0x8 "I3C_GETCAPR,I3C get capability register"
bitfld.long 0x8 14. "CAPPEND,IBI MDB support for pending read notification" "0: this I3C when acting as target sends an IBI..,1: this I3C when acting as target sends an IBI.."
line.long 0xC "I3C_CRCAPR,I3C controller-role capability register"
bitfld.long 0xC 9. "CAPGRP,group management support (when acting as controller)" "0: this I3C does not support group address..,1: this I3C supports group address capabilities.."
bitfld.long 0xC 3. "CAPDHOFF,delayed controller-role hand-off" "0: this I3C does not needs additional time to..,1: this I3C needs additional time to process a.."
line.long 0x10 "I3C_GETMxDSR,I3C get max data speed register"
bitfld.long 0x10 24. "TSCO,clock-to-data turnaround time (tless thansub>SCOless than/sub>)" "0: tless thansub>SCOless than/sub> less than or..,1: tless thansub>SCOless than/sub> > 12 ns (refer.."
hexmask.long.byte 0x10 16.--23. 1. "RDTURN,programmed byte of the 3-byte MaxRdTurn (maximum read turnaround byte)"
newline
bitfld.long 0x10 8.--9. "FMT,GETMxDS CCC format" "0: format 1 (2 bytes with MaxWr with no defining..,1: format 2: (5 bytes w.,2: format 2 (5 bytes with MaxWr with no defining..,3: format 2 (5 bytes with MaxWr with no defining.."
bitfld.long 0x10 0.--1. "HOFFAS,Controller hand-off activity state" "0: activity state 0 is the initial activity state..,1: activity state 1 is the initial activity state..,2: activity state 2 is the initial activity state..,3: activity state 3 is the initial activity state.."
line.long 0x14 "I3C_EPIDR,I3C extended provisioned ID register"
hexmask.long.word 0x14 17.--31. 1. "MIPIMID,15-bit MIPI manufacturer ID"
rbitfld.long 0x14 16. "IDTSEL,provisioned ID type selector" "0,1"
newline
hexmask.long.byte 0x14 12.--15. 1. "MIPIID,4-bit MIPI Instance ID"
tree.end
tree "SEC_I3C2"
base ad:0x50016C00
wgroup.long 0x0++0x3
line.long 0x0 "I3C_CR,I3C message control register"
bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when the I3C acts as controller)" "0: this message from controller is followed by a..,1: this message from controller ends with a stop.."
hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (whatever I3C acts as controller/target)"
newline
hexmask.long.byte 0x0 17.--23. 1. "ADD,7-bit I3C dynamic / Iless thansup>2less than/sup>C static target address (when I3C acts as controller)"
bitfld.long 0x0 16. "RNW,Read / non-write message (when I3C acts as controller)" "0: write message,1: read message"
newline
hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of data to transfer during a read or write message in bytes (whatever I3C acts as controller/target)"
wgroup.long 0x0++0x3
line.long 0x0 "I3C_CR_ALTERNATE1,I3C message control register"
bitfld.long 0x0 31. "MEND,Message end type/last message of a frame (when I3C acts as controller)" "0: this message from controller is followed by a..,1: the message from the controller ends with a stop.."
hexmask.long.byte 0x0 27.--30. 1. "MTYPE,Message type (when I3C acts as controller)"
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hexmask.long.byte 0x0 16.--23. 1. "CCC,8-bit CCC code (when I3C acts as controller)"
hexmask.long.word 0x0 0.--15. 1. "DCNT,Count of related data to the CCC command to transfer as CCC defining bytes or CCC sub-command bytes or CCC data bytes in bytes"
group.long 0x4++0x3
line.long 0x0 "I3C_CFGR,I3C configuration register"
bitfld.long 0x0 30. "TSFSET,Frame transfer set (software trigger) (when I3C acts as controller)" "0: no action,1: setting this bit initiates a frame transfer by.."
bitfld.long 0x0 29. "TRIGHWEN,Hardware trigger enable (when IP acts as controller)" "0: hardware trigger mode is disabled,1: hardware trigger mode is enabled"
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bitfld.long 0x0 28. "TRIGPOL,Hardware trigger signal polarity (when IP acts as controller)" "0: rising edge,1: falling edge"
hexmask.long.byte 0x0 24.--27. 1. "TRIGSEL,Hardware trigger signal selection (when IP acts as controller)"
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bitfld.long 0x0 23. "FCFDIS,FCF generation disable (when I3C acts as controller)" "0: enable the generation of the flag FCF in the..,1: disable the generation of the flag FCF in the.."
bitfld.long 0x0 21. "CFLUSH,C-FIFO flush (when I3C acts as controller)" "0: no action,1: flush C-FIFO"
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bitfld.long 0x0 20. "CDMAEN,C-FIFO DMA request enable (when I3C acts as controller)" "0: DMA mode is disabled for C-FIFO,1: DMA mode is enabled for C-FIFO"
bitfld.long 0x0 19. "TMODE,Transmit mode (when I3C acts as controller)" "0: C-FIFO and Tx-FIFO are not preloaded before..,1: C-FIFO and Tx-FIFO are first preloaded (also.."
newline
bitfld.long 0x0 18. "SMODE,S-FIFO enable / status receive mode (when I3C acts as controller)" "0: S-FIFO is disabled,1: S-FIFO is enabled."
bitfld.long 0x0 17. "SFLUSH,S-FIFO flush (when I3C acts as controller)" "0: no action,1: flush S-FIFO"
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bitfld.long 0x0 16. "SDMAEN,S-FIFO DMA request enable (when I3C acts as controller)" "0: DMA mode is disabled for reading status register..,1: DMA mode is enabled for reading status register.."
bitfld.long 0x0 14. "TxTHRES,Tx-FIFO threshold (whatever I3C acts as controller/target)" "0: 1-byte threshold,1: 1-word / 4-byte threshold"
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bitfld.long 0x0 13. "TxFLUSH,Tx-FIFO flush (whatever I3C acts as controller/target)" "0: no action,1: flush Tx-FIFO"
bitfld.long 0x0 12. "TxDMAEN,Tx-FIFO DMA request enable (whatever I3C acts as controller/target)" "0: DMA mode is disabled for Tx-FIFO,1: DMA mode is enabled for Tx-FIFO"
newline
bitfld.long 0x0 10. "RxTHRES,Rx-FIFO threshold (whatever I3C acts as controller/target)" "0: 1-byte threshold,1: 1-word/4-bytes threshold"
bitfld.long 0x0 9. "RxFLUSH,Rx-FIFO flush (whatever I3C acts as controller/target)" "0: no action,1: flush Rx-FIFO"
newline
bitfld.long 0x0 8. "RxDMAEN,Rx-FIFO DMA request enable (whatever I3C acts as controller/target)" "0: DMA mode is disabled for Rx-FIFO,1: DMA mode is enabled for Rx-FIFO"
bitfld.long 0x0 7. "HJACK,Hot-join request acknowledge (when I3C acts as a controller)" "0: hot-join request is not acknowledged,1: hot-join request is acknowledged"
newline
bitfld.long 0x0 5. "HKSDAEN,High-keeper enable on SDA line (when I3C acts as a controller)" "0: High-keeper is disabled,1: High-keeper is enabled and the weak pull-up is.."
bitfld.long 0x0 4. "ExITPTRN,HDR exit pattern enable (when I3C acts as a controller)" "0: HDR exit pattern is not sent after the issued..,1: HDR exit pattern is sent after the issued.."
newline
bitfld.long 0x0 3. "RSTPTRN,HDR reset pattern enable (when I3C acts as a controller)" "0: standard stop emitted at the end of a frame,1: HDR reset pattern is inserted before the stop of.."
bitfld.long 0x0 2. "NOARBH,No arbitrable header after a start (when I3C acts as a controller)" "0: An arbitrable header (0b111_1110 + RnW = 0) is..,1: No arbitrable header"
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bitfld.long 0x0 1. "CRINIT,Initial controller/target role" "0: target role,1: controller role"
bitfld.long 0x0 0. "EN,I3C enable (whatever I3C acts as controller/target)" "0: I3C is disabled,1: I3C is enabled"
rgroup.long 0x10++0x7
line.long 0x0 "I3C_RDR,I3C receive data byte register"
hexmask.long.byte 0x0 0.--7. 1. "RDB0,8-bit received data on I3C bus."
line.long 0x4 "I3C_RDWR,I3C receive data word register"
hexmask.long.byte 0x4 24.--31. 1. "RDB3,8-bit received data (latest byte on I3C bus)."
hexmask.long.byte 0x4 16.--23. 1. "RDB2,8-bit received data (next byte after RDB1 on I3C bus)."
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hexmask.long.byte 0x4 8.--15. 1. "RDB1,8-bit received data (next byte after RDB0 on I3C bus)."
hexmask.long.byte 0x4 0.--7. 1. "RDB0,8-bit received data (earliest byte on I3C bus)."
wgroup.long 0x18++0x7
line.long 0x0 "I3C_TDR,I3C transmit data byte register"
hexmask.long.byte 0x0 0.--7. 1. "TDB0,8-bit data to transmit on I3C bus."
line.long 0x4 "I3C_TDWR,I3C transmit data word register"
hexmask.long.byte 0x4 24.--31. 1. "TDB3,8-bit transmit data (latest byte on I3C bus)."
hexmask.long.byte 0x4 16.--23. 1. "TDB2,8-bit transmit data (next byte after TDB1[7:0] on I3C bus)."
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hexmask.long.byte 0x4 8.--15. 1. "TDB1,8-bit transmit data (next byte after TDB0[7:0] on I3C bus)."
hexmask.long.byte 0x4 0.--7. 1. "TDB0,8-bit transmit data (earliest byte on I3C bus)"
group.long 0x20++0x7
line.long 0x0 "I3C_IBIDR,I3C IBI payload data register"
hexmask.long.byte 0x0 24.--31. 1. "IBIDB3,8-bit IBI payload data (latest byte on I3C bus)."
hexmask.long.byte 0x0 16.--23. 1. "IBIDB2,8-bit IBI payload data (next byte on I3C bus after IBIDB1[7:0])."
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hexmask.long.byte 0x0 8.--15. 1. "IBIDB1,8-bit IBI payload data (next byte on I3C bus after IBIDB0[7:0])."
hexmask.long.byte 0x0 0.--7. 1. "IBIDB0,8-bit IBI payload data (earliest byte on I3C bus MDB[7:0] mandatory data byte)."
line.long 0x4 "I3C_TGTTDR,I3C target transmit configuration register"
bitfld.long 0x4 16. "PRELOAD,Preload of the Tx-FIFO (when I3C is configured as target)" "0: no Tx-FIFO preload,1: Tx-FIFO preload"
hexmask.long.word 0x4 0.--15. 1. "TGTTDCNT,Transmit data counter in bytes (when I3C is configured as target)"
rgroup.long 0x30++0x7
line.long 0x0 "I3C_SR,I3C status register"
hexmask.long.byte 0x0 24.--31. 1. "MID,Message identifier/counter of a given frame (when the I3C acts as controller)"
bitfld.long 0x0 18. "DIR,Message direction" "0: write,1: read"
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bitfld.long 0x0 17. "ABT,A private read message is ended prematurely by the target (when the I3C acts as controller)" "0: no early completion from the target,1: early completion from the target"
hexmask.long.word 0x0 0.--15. 1. "xDCNT,Data counter"
line.long 0x4 "I3C_SER,I3C status error register"
bitfld.long 0x4 10. "DERR,Data error (when the I3C acts as controller)" "0: no detected error,1: controller detected a data error during the.."
bitfld.long 0x4 9. "DNACK,Data not acknowledged (when the I3C acts as controller)" "0: no detected error,1: controller detected that a data byte is not.."
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bitfld.long 0x4 8. "ANACK,Address not acknowledged (when the I3C is configured as controller)" "0: no detected error,1: controller detected that the static/dynamic.."
bitfld.long 0x4 7. "COVR,C-FIFO underrun or S-FIFO overrun (when the I3C acts as controller)" "0: no detected error,1: controller detected either:"
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bitfld.long 0x4 6. "DOVR,Rx-FIFO overrun or Tx-FIFO underrun" "0: no detected error,1: whatever controller or target hardware detected.."
bitfld.long 0x4 5. "STALL,SCL stall error (when the I3C acts as target)" "0: no detected error,1: target detected that SCL was stable for more.."
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bitfld.long 0x4 4. "PERR,Protocol error" "0: no detected error,1: whatever controller or target hardware detected.."
hexmask.long.byte 0x4 0.--3. 1. "CODERR,Protocol error code/type"
rgroup.long 0x40++0x3
line.long 0x0 "I3C_RMR,I3C received message register"
hexmask.long.byte 0x0 17.--23. 1. "RADD,Received target address (when the I3C is configured as controller)"
hexmask.long.byte 0x0 8.--15. 1. "RCODE,Received CCC code (when the I3C is configured as target)"
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bitfld.long 0x0 0.--2. "IBIRDCNT,IBI received payload data count (when the I3C is configured as controller)" "0,1,2,3,4,5,6,7"
rgroup.long 0x50++0x7
line.long 0x0 "I3C_EVR,I3C event register"
bitfld.long 0x0 31. "GRPF,Group addressing flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 30. "DEFF,DEFTGTS flag (when the I3C acts as target)" "0,1"
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bitfld.long 0x0 29. "INTUPDF,Interrupt/controller-role/hot-join update flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 28. "ASUPDF,Activity state update flag (when the I3C acts as target)" "0,1"
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bitfld.long 0x0 27. "RSTF,Reset pattern flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 26. "MRLUPDF,Maximum read length update flag (when the I3C acts as target)" "0,1"
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bitfld.long 0x0 25. "MWLUPDF,Maximum write length update flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 24. "DAUPDF,Dynamic address update flag (when the I3C acts as target)" "0,1"
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bitfld.long 0x0 23. "STAF,Get status flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 22. "GETF,Get flag (when the I3C acts as target)" "0,1"
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bitfld.long 0x0 21. "WKPF,Wake-up/missed start flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 19. "HJF,Hot-join flag (when the I3C acts as controller)" "0,1"
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bitfld.long 0x0 18. "CRUPDF,Controller-role update flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 17. "CRF,Controller-role request flag (when the I3C acts as controller)" "0,1"
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bitfld.long 0x0 16. "IBIENDF,IBI end flag (when the I3C acts as target)" "0,1"
bitfld.long 0x0 15. "IBIF,IBI flag (when the I3C acts as controller)" "0,1"
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bitfld.long 0x0 11. "ERRF,Flag (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 10. "RxTGTENDF,Target-initiated read end flag (when the I3C acts as controller)" "0,1"
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bitfld.long 0x0 9. "FCF,Frame complete flag (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 7. "RxLASTF,Last read data byte/word flag (when the I3C acts as controller)" "0,1"
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bitfld.long 0x0 6. "TxLASTF,Last written data byte/word flag (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 5. "RxFNEF,Rx-FIFO not empty flag (whatever the I3C acts as controller/target)" "0,1"
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bitfld.long 0x0 4. "TxFNFF,Tx-FIFO not full flag (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 3. "SFNEF,S-FIFO not empty flag (when the I3C acts as controller)" "0,1"
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bitfld.long 0x0 2. "CFNFF,C-FIFO not full flag (when the I3C acts as controller)" "0,1"
bitfld.long 0x0 1. "TxFEF,Tx-FIFO empty flag (whatever the I3C acts as controller/target)" "0,1"
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bitfld.long 0x0 0. "CFEF,C-FIFO empty flag (whatever the I3C acts as controller)" "0,1"
line.long 0x4 "I3C_IER,I3C interrupt enable register"
bitfld.long 0x4 31. "GRPIE,DEFGRPA CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 30. "DEFIE,DEFTGTS CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x4 29. "INTUPDIE,ENEC/DISEC CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 28. "ASUPDIE,ENTASx CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x4 27. "RSTIE,reset pattern interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 26. "MRLUPDIE,SETMRL CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x4 25. "MWLUPDIE,SETMWL CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 24. "DAUPDIE,ENTDAA/RSTDAA/SETNEWDA CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x4 23. "STAIE,format 1 GETSTATUS CCC interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 22. "GETIE,GETxxx CCC interrupt enable (except GETSTATUS of format 1) (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x4 21. "WKPIE,Wake-up interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 19. "HJIE,Hot-join interrupt enable (when the I3C acts as controller)" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x4 18. "CRUPDIE,Controller-role update interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 17. "CRIE,Controller-role request interrupt enable (when the I3C acts as controller)" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x4 16. "IBIENDIE,IBI end interrupt enable (when the I3C acts as target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 15. "IBIIE,IBI request interrupt enable (when the I3C acts as controller)" "0: interrupt disabled,1: interrupt enabled"
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bitfld.long 0x4 11. "ERRIE,error interrupt enable (whatever the I3C acts as controller/target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 10. "RxTGTENDIE,target-initiated read end interrupt enable (when the I3C acts as controller)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 9. "FCIE,frame complete interrupt enable (whatever the I3C acts as controller/target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 5. "RxFNEIE,Rx-FIFO not empty interrupt enable (whatever the I3C acts as controller/target)" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 4. "TxFNFIE,Tx-FIFO not full interrupt enable (whatever the I3C acts as controller/target)" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 3. "SFNEIE,S-FIFO not empty interrupt enable when the I3C acts as controller" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 2. "CFNFIE,C-FIFO not full interrupt enable when the I3C acts as controller" "0: interrupt disabled,1: interrupt enabled"
wgroup.long 0x58++0x3
line.long 0x0 "I3C_CEVR,I3C clear event register"
bitfld.long 0x0 31. "CGRPF,Clear DEFGRPA CCC flag (when the I3C acts as target)" "0: no effect,1: clear GRPF"
bitfld.long 0x0 30. "CDEFF,Clear DEFTGTS CCC flag (when the I3C acts as target)" "0: no effect,1: clear DEFF"
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bitfld.long 0x0 29. "CINTUPDF,Clear ENEC/DISEC CCC flag (when the I3C acts as target)" "0: no effect,1: clear CINTUPDF"
bitfld.long 0x0 28. "CASUPDF,Clear ENTASx CCC flag (when the I3C acts as target)" "0: no effect,1: clear ASUPDF"
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bitfld.long 0x0 27. "CRSTF,Clear reset pattern flag (when the I3C acts as target)" "0: no effect,1: clear RSTF"
bitfld.long 0x0 26. "CMRLUPDF,Clear SETMRL CCC flag (when the I3C acts as target)" "0: no effect,1: clear MRLUPDF"
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bitfld.long 0x0 25. "CMWLUPDF,Clear SETMWL CCC flag (when the I3C acts as target)" "0: no effect,1: clear MWLUPDF"
bitfld.long 0x0 24. "CDAUPDF,Clear ENTDAA/RSTDAA/SETNEWDA CCC flag (when the I3C acts as target)" "0: no effect,1: clear DAUPDF"
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bitfld.long 0x0 23. "CSTAF,Clear format 1 GETSTATUS CCC flag (when the I3C acts as target)" "0: no effect,1: clear STAF"
bitfld.long 0x0 22. "CGETF,Clear GETxxx CCC flag (except GETSTATUS of format 1) (when the I3C acts as target)" "0: no effect,1: clear GETF"
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bitfld.long 0x0 21. "CWKPF,Clear wake-up flag (when the I3C acts as target)" "0: no effect,1: clear WKPF"
bitfld.long 0x0 19. "CHJF,Clear hot-join flag (when the I3C acts as controller)" "0: no effect,1: clear HJF"
newline
bitfld.long 0x0 18. "CCRUPDF,Clear controller-role update flag (when the I3C acts as target)" "0: no effect,1: clear CRUPDF"
bitfld.long 0x0 17. "CCRF,Clear controller-role request flag (when the I3C acts as controller)" "0: no effect,1: clear CRF"
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bitfld.long 0x0 16. "CIBIENDF,Clear IBI end flag (when the I3C acts as target)" "0: no effect,1: clear IBIENDF"
bitfld.long 0x0 15. "CIBIF,Clear IBI request flag (when the I3C acts as controller)" "0: no effect,1: clear IBIF"
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bitfld.long 0x0 11. "CERRF,Clear error flag (whatever the I3C acts as controller/target)" "0: no effect,1: clear ERRF"
bitfld.long 0x0 10. "CRxTGTENDF,Clear target-initiated read end flag (when the I3C acts as controller)" "0: no effect,1: clear RxTGTENDF"
newline
bitfld.long 0x0 9. "CFCF,Clear frame complete flag (whatever the I3C acts as controller/target)" "0: no effect,1: clear FCF"
rgroup.long 0x5C++0x3
line.long 0x0 "I3C_MISR,I3C masked interrupt status register"
bitfld.long 0x0 31. "GRPMIS,DEFGRPA CCC masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 30. "DEFMIS,DEFTGTS CCC masked interrupt status (when the I3C acts as target)" "0,1"
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bitfld.long 0x0 29. "INTUPDMIS,ENEC/DISEC CCC masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 28. "ASUPDMIS,ENTASx CCC masked interrupt status (when the I3C acts as target)" "0,1"
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bitfld.long 0x0 27. "RSTMIS,reset pattern masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 26. "MRLUPDMIS,SETMRL CCC masked interrupt status (when the I3C acts as target)" "0,1"
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bitfld.long 0x0 25. "MWLUPDMIS,SETMWL CCC masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 24. "DAUPDMIS,ENTDAA/RSTDAA/SETNEWDA CCC masked interrupt status (when the I3C acts as target)" "0,1"
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bitfld.long 0x0 23. "STAMIS,format 1 GETSTATUS CCC masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 22. "GETMIS,GETxxx CCC masked interrupt status except GETSTATUS of format 1 (when the I3C acts as target)" "0,1"
newline
bitfld.long 0x0 21. "WKPMIS,Wake-up/missed start masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 19. "HJMIS,Hot-join masked interrupt status (when the I3C acts as controller)" "0,1"
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bitfld.long 0x0 18. "CRUPDMIS,Controller-role update masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 17. "CRMIS,Controller-role request masked interrupt status (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 16. "IBIENDMIS,IBI end masked interrupt status (when the I3C acts as target)" "0,1"
bitfld.long 0x0 15. "IBIMIS,IBI request masked interrupt status (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 11. "ERRMIS,error masked interrupt status (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 10. "RxTGTENDMIS,target-initiated read end masked interrupt status (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 9. "FCMIS,frame complete masked interrupt status (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 5. "RxFNEMIS,Rx-FIFO not empty masked interrupt status (whatever the I3C acts as controller/target)" "0,1"
newline
bitfld.long 0x0 4. "TxFNFMIS,Tx-FIFO not full masked interrupt status (whatever the I3C acts as controller/target)" "0,1"
bitfld.long 0x0 3. "SFNEMIS,S-FIFO not empty masked interrupt status (when the I3C acts as controller)" "0,1"
newline
bitfld.long 0x0 2. "CFNFMIS,C-FIFO not full masked interrupt status (when the I3C acts as controller)" "0,1"
group.long 0x60++0x13
line.long 0x0 "I3C_DEVR0,I3C own device characteristics register"
rbitfld.long 0x0 24. "RSTVAL,Reset action is valid (when the I3C acts as target)" "0,1"
rbitfld.long 0x0 22.--23. "RSTACT,Reset action/level on received reset pattern (when the I3C acts as target)" "0: no reset action,1: first level of reset: the application software..,2: second level of reset: the application software..,3: no reset action"
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rbitfld.long 0x0 20.--21. "AS,Activity state (when the I3C acts as target)" "0: activity state 0,1: activity state 1,2: activity state 2,3: activity state 3"
bitfld.long 0x0 19. "HJEN,Hot-join request enable (when the I3C acts as target)" "0: hot-join request disabled,1: hot-join request enabled"
newline
bitfld.long 0x0 17. "CREN,Controller-role request enable (when the I3C acts as target)" "0: controller-role request disabled,1: controller-role request enabled"
bitfld.long 0x0 16. "IBIEN,IBI request enable (when the I3C acts as target)" "0: IBI request disabled,1: IBI request enabled"
newline
hexmask.long.byte 0x0 1.--7. 1. "DA,7-bit dynamic address"
bitfld.long 0x0 0. "DAVAL,Dynamic address is valid (when the I3C acts as target)" "0,1"
line.long 0x4 "I3C_DEVR1,I3C device 1 characteristics register"
rbitfld.long 0x4 31. "DIS,Disables writes to DA[6:0] (when the I3C acts as controller)" "0: write to DA[7:0] and to IBIDEN in the I3C_DEVRx..,1: write to DA[7:0] and to IBIDEN is disabled/locked"
bitfld.long 0x4 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "0: C-FIFO and Tx-FIFO are not flushed after an IBI..,1: I3C transfer is stopped and both C-FIFO and.."
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bitfld.long 0x4 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "0: no data byte follows the acknowledged IBI from..,1: the mandatory data byte MDB[7:0] follows the.."
bitfld.long 0x4 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "0: a controller-role request from target x must be..,1: a controller-role request (with 7-bit dynamic.."
newline
bitfld.long 0x4 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "0: an IBI request from target x must be NACK-ed,1: an IBI request (with 7-bit dynamic address.."
hexmask.long.byte 0x4 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)"
line.long 0x8 "I3C_DEVR2,I3C device 2 characteristics register"
rbitfld.long 0x8 31. "DIS,Disables writes to DA[6:0] (when the I3C acts as controller)" "0: write to DA[7:0] and to IBIDEN in the I3C_DEVRx..,1: write to DA[7:0] and to IBIDEN is disabled/locked"
bitfld.long 0x8 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "0: C-FIFO and Tx-FIFO are not flushed after an IBI..,1: I3C transfer is stopped and both C-FIFO and.."
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bitfld.long 0x8 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "0: no data byte follows the acknowledged IBI from..,1: the mandatory data byte MDB[7:0] follows the.."
bitfld.long 0x8 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "0: a controller-role request from target x must be..,1: a controller-role request (with 7-bit dynamic.."
newline
bitfld.long 0x8 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "0: an IBI request from target x must be NACK-ed,1: an IBI request (with 7-bit dynamic address.."
hexmask.long.byte 0x8 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)"
line.long 0xC "I3C_DEVR3,I3C device 3 characteristics register"
rbitfld.long 0xC 31. "DIS,Disables writes to DA[6:0] (when the I3C acts as controller)" "0: write to DA[7:0] and to IBIDEN in the I3C_DEVRx..,1: write to DA[7:0] and to IBIDEN is disabled/locked"
bitfld.long 0xC 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "0: C-FIFO and Tx-FIFO are not flushed after an IBI..,1: I3C transfer is stopped and both C-FIFO and.."
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bitfld.long 0xC 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "0: no data byte follows the acknowledged IBI from..,1: the mandatory data byte MDB[7:0] follows the.."
bitfld.long 0xC 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "0: a controller-role request from target x must be..,1: a controller-role request (with 7-bit dynamic.."
newline
bitfld.long 0xC 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "0: an IBI request from target x must be NACK-ed,1: an IBI request (with 7-bit dynamic address.."
hexmask.long.byte 0xC 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)"
line.long 0x10 "I3C_DEVR4,I3C device 4 characteristics register"
rbitfld.long 0x10 31. "DIS,Disables writes to DA[6:0] (when the I3C acts as controller)" "0: write to DA[7:0] and to IBIDEN in the I3C_DEVRx..,1: write to DA[7:0] and to IBIDEN is disabled/locked"
bitfld.long 0x10 19. "SUSP,Suspend/stop I3C transfer on received IBI (when the I3C acts as controller)" "0: C-FIFO and Tx-FIFO are not flushed after an IBI..,1: I3C transfer is stopped and both C-FIFO and.."
newline
bitfld.long 0x10 18. "IBIDEN,IBI data enable (when the I3C acts as controller)" "0: no data byte follows the acknowledged IBI from..,1: the mandatory data byte MDB[7:0] follows the.."
bitfld.long 0x10 17. "CRACK,Controller-role request acknowledge (when the I3C acts as controller)" "0: a controller-role request from target x must be..,1: a controller-role request (with 7-bit dynamic.."
newline
bitfld.long 0x10 16. "IBIACK,IBI request acknowledge (when the I3C acts as controller)" "0: an IBI request from target x must be NACK-ed,1: an IBI request (with 7-bit dynamic address.."
hexmask.long.byte 0x10 1.--7. 1. "DA,Assigned I3C dynamic address to target x (when the I3C acts as controller)"
group.long 0x90++0x7
line.long 0x0 "I3C_MAxRLR,I3C maximum read length register"
bitfld.long 0x0 16.--18. "IBIP,IBI payload data maximum size in bytes (when I3C acts as target)" "0: null payload data size (only allowed when BCR2 =..,1: 1 byte (mandatory data byte MDB[7:0],2: 2 bytes (including first MDB[7:0]),3: 3 bytes (including first MDB[7:0]),4: 4 bytes (including first MDB[7:0]),?,?,?"
hexmask.long.word 0x0 0.--15. 1. "MRL,Maximum data read length (when I3C acts as target)"
line.long 0x4 "I3C_MAxWLR,I3C maximum write length register"
hexmask.long.word 0x4 0.--15. 1. "MWL,Maximum data write length (when I3C acts as target)"
group.long 0xA0++0xB
line.long 0x0 "I3C_TIMINGR0,I3C timing register 0"
hexmask.long.byte 0x0 24.--31. 1. "SCLH_I2C,SCL high duration used for legacy Iless thansup>2less than/sup>C messages in number of kernel clocks cycles:"
hexmask.long.byte 0x0 16.--23. 1. "SCLL_OD,SCL low duration in open-drain phases used for legacy Iless thansup>2less than/sup>C messages and for I3C open-drain phases (address phase following a start ACK phase during controller-initiated messages and T bit phase during.."
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hexmask.long.byte 0x0 8.--15. 1. "SCLH_I3C,SCL high duration used for I3C messages (both in push-pull and open-drain phases) in number of kernel clocks cycles:"
hexmask.long.byte 0x0 0.--7. 1. "SCLL_PP,SCL low duration in I3C push-pull phases in number of kernel clocks cycles:"
line.long 0x4 "I3C_TIMINGR1,I3C timing register 1"
bitfld.long 0x4 28.--29. "SDA_HD,SDA hold time (when the I3C acts as controller) in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull tless thansub>HD_PPless than/sub>):" "0,1,2,3"
hexmask.long.byte 0x4 16.--22. 1. "FREE,Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller)"
newline
bitfld.long 0x4 8.--9. "ASNCR,Activity state of the new controller (when I3C acts as active controller)" "0,1,2,3"
hexmask.long.byte 0x4 0.--7. 1. "AVAL,Number of kernel clock cycles to set a time unit of 1 us whatever I3C acts as controller or target."
line.long 0x8 "I3C_TIMINGR2,I3C timing register 2"
hexmask.long.byte 0x8 8.--15. 1. "STALL,Controller clock stall time in number of kernel clock cycles"
bitfld.long 0x8 6. "STALLL,Controller clock stall enable in the address ACK/NACK phase (before the ninth bit) of a legacy I2C read/write message." "0: no stall,1: stall enabled"
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bitfld.long 0x8 5. "STALLS,Controller clock stall enable in the data ACK/NACK phase of a legacy I2C write message." "0: no stall,1: stall enabled"
bitfld.long 0x8 4. "STALLR,Controller clock stall enable in the data ACK/NACK phase of a legacy I2C read message." "0: no stall,1: stall enabled"
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bitfld.long 0x8 3. "STALLA,Controller clock stall enable on ACK phase" "0: no stall,1: stall enabled"
bitfld.long 0x8 2. "STALLC,Controller clock stall enable on PAR phase of CCC" "0: no stall,1: stall enabled"
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bitfld.long 0x8 1. "STALLD,Controller clock stall enable on PAR phase of Data" "0: no stall,1: stall enabled"
bitfld.long 0x8 0. "STALLT,Controller clock stall enable on T-bit phase of data" "0: no stall,1: stall enabled"
group.long 0xC0++0x17
line.long 0x0 "I3C_BCR,I3C bus characteristics register"
bitfld.long 0x0 6. "BCR6,Controller capable" "0: I3C target (no controller capable),1: I3C controller capable"
bitfld.long 0x0 2. "BCR2,in-band interrupt (IBI) payload" "0: no data byte follows the accepted IBI,1: at least one mandatory data byte follows the.."
newline
bitfld.long 0x0 0. "BCR0,max data speed limitation" "0: no limitation,1: limitation as described by I3C_GETMxDSR."
line.long 0x4 "I3C_DCR,I3C device characteristics register"
hexmask.long.byte 0x4 0.--7. 1. "DCR,device characteristics ID"
line.long 0x8 "I3C_GETCAPR,I3C get capability register"
bitfld.long 0x8 14. "CAPPEND,IBI MDB support for pending read notification" "0: this I3C when acting as target sends an IBI..,1: this I3C when acting as target sends an IBI.."
line.long 0xC "I3C_CRCAPR,I3C controller-role capability register"
bitfld.long 0xC 9. "CAPGRP,group management support (when acting as controller)" "0: this I3C does not support group address..,1: this I3C supports group address capabilities.."
bitfld.long 0xC 3. "CAPDHOFF,delayed controller-role hand-off" "0: this I3C does not needs additional time to..,1: this I3C needs additional time to process a.."
line.long 0x10 "I3C_GETMxDSR,I3C get max data speed register"
bitfld.long 0x10 24. "TSCO,clock-to-data turnaround time (tless thansub>SCOless than/sub>)" "0: tless thansub>SCOless than/sub> less than or..,1: tless thansub>SCOless than/sub> > 12 ns (refer.."
hexmask.long.byte 0x10 16.--23. 1. "RDTURN,programmed byte of the 3-byte MaxRdTurn (maximum read turnaround byte)"
newline
bitfld.long 0x10 8.--9. "FMT,GETMxDS CCC format" "0: format 1 (2 bytes with MaxWr with no defining..,1: format 2: (5 bytes w.,2: format 2 (5 bytes with MaxWr with no defining..,3: format 2 (5 bytes with MaxWr with no defining.."
bitfld.long 0x10 0.--1. "HOFFAS,Controller hand-off activity state" "0: activity state 0 is the initial activity state..,1: activity state 1 is the initial activity state..,2: activity state 2 is the initial activity state..,3: activity state 3 is the initial activity state.."
line.long 0x14 "I3C_EPIDR,I3C extended provisioned ID register"
hexmask.long.word 0x14 17.--31. 1. "MIPIMID,15-bit MIPI manufacturer ID"
rbitfld.long 0x14 16. "IDTSEL,provisioned ID type selector" "0,1"
newline
hexmask.long.byte 0x14 12.--15. 1. "MIPIID,4-bit MIPI Instance ID"
tree.end
tree.end
tree "ICACHE (Instruction Cache)"
base ad:0x0
tree "ICACHE"
base ad:0x40030400
group.long 0x0++0x3
line.long 0x0 "ICACHE_CR,ICACHE control register"
bitfld.long 0x0 19. "MISSMRST,miss monitor reset" "0: release the cache miss monitor reset (needed to..,1: reset cache miss monitor"
bitfld.long 0x0 18. "HITMRST,hit monitor reset" "0: release the cache miss monitor reset (needed to..,1: reset cache hit monitor"
newline
bitfld.long 0x0 17. "MISSMEN,miss monitor enable" "0: cache miss monitor switched off.,1: cache miss monitor enabled"
bitfld.long 0x0 16. "HITMEN,hit monitor enable" "0: cache hit monitor switched off.,1: cache hit monitor enabled"
newline
bitfld.long 0x0 2. "WAYSEL,cache associativity mode selection" "0: direct mapped cache (1-way cache),1: n-way set associative cache (reset value)"
bitfld.long 0x0 1. "CACHEINV,cache invalidation" "0: no effect,1: invalidate entire cache (all cache lines valid.."
newline
bitfld.long 0x0 0. "EN,enable" "0: cache disabled,1: cache enabled"
rgroup.long 0x4++0x3
line.long 0x0 "ICACHE_SR,ICACHE status register"
bitfld.long 0x0 2. "ERRF,cache error flag" "0: no error,1: an error occurred during the operation.."
bitfld.long 0x0 1. "BSYENDF,busy end flag" "0: cache busy,1: full invalidate CACHEINV operation finished"
newline
bitfld.long 0x0 0. "BUSYF,busy flag" "0: cache not busy on a CACHEINV operation,1: cache executing a full invalidate CACHEINV.."
group.long 0x8++0x3
line.long 0x0 "ICACHE_IER,ICACHE interrupt enable register"
bitfld.long 0x0 2. "ERRIE,interrupt enable on cache error" "0: interrupt disabled on error,1: interrupt enabled on error"
bitfld.long 0x0 1. "BSYENDIE,interrupt enable on busy end" "0: interrupt disabled on busy end,1: interrupt enabled on busy end"
wgroup.long 0xC++0x3
line.long 0x0 "ICACHE_FCR,ICACHE flag clear register"
bitfld.long 0x0 2. "CERRF,clear cache error flag" "0: no effect,1: clears ERRF flag in ICACHE_SR"
bitfld.long 0x0 1. "CBSYENDF,clear busy end flag" "0: no effect,1: clears BSYENDF flag in ICACHE_SR."
rgroup.long 0x10++0x7
line.long 0x0 "ICACHE_HMONR,ICACHE hit monitor register"
hexmask.long 0x0 0.--31. 1. "HITMON,cache hit monitor counter"
line.long 0x4 "ICACHE_MMONR,ICACHE miss monitor register"
hexmask.long.word 0x4 0.--15. 1. "MISSMON,cache miss monitor counter"
group.long 0x20++0xF
line.long 0x0 "ICACHE_CRR0,ICACHE region 0 configuration register"
bitfld.long 0x0 31. "HBURST,output burst type for region x" "0: WRAP,1: INCR"
bitfld.long 0x0 28. "MSTSEL,AHB cache master selection for region x" "0: no action (master1 selected by default),1: master2 selected"
newline
hexmask.long.word 0x0 16.--26. 1. "REMAPADDR,remapped address for region x"
bitfld.long 0x0 15. "REN,enable for region x" "0: disabled,1: enabled"
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bitfld.long 0x0 9.--11. "RSIZE,size for region x" "?,1: 2 Mbytes,2: 4 Mbytes,3: 8 Mbytes,4: 16 Mbytes,5: 32 Mbytes,6: 64 Mbytes,7: 128 Mbytes"
hexmask.long.byte 0x0 0.--7. 1. "BASEADDR,base address for region x"
line.long 0x4 "ICACHE_CRR1,ICACHE region 1 configuration register"
bitfld.long 0x4 31. "HBURST,output burst type for region x" "0: WRAP,1: INCR"
bitfld.long 0x4 28. "MSTSEL,AHB cache master selection for region x" "0: no action (master1 selected by default),1: master2 selected"
newline
hexmask.long.word 0x4 16.--26. 1. "REMAPADDR,remapped address for region x"
bitfld.long 0x4 15. "REN,enable for region x" "0: disabled,1: enabled"
newline
bitfld.long 0x4 9.--11. "RSIZE,size for region x" "?,1: 2 Mbytes,2: 4 Mbytes,3: 8 Mbytes,4: 16 Mbytes,5: 32 Mbytes,6: 64 Mbytes,7: 128 Mbytes"
hexmask.long.byte 0x4 0.--7. 1. "BASEADDR,base address for region x"
line.long 0x8 "ICACHE_CRR2,ICACHE region 2 configuration register"
bitfld.long 0x8 31. "HBURST,output burst type for region x" "0: WRAP,1: INCR"
bitfld.long 0x8 28. "MSTSEL,AHB cache master selection for region x" "0: no action (master1 selected by default),1: master2 selected"
newline
hexmask.long.word 0x8 16.--26. 1. "REMAPADDR,remapped address for region x"
bitfld.long 0x8 15. "REN,enable for region x" "0: disabled,1: enabled"
newline
bitfld.long 0x8 9.--11. "RSIZE,size for region x" "?,1: 2 Mbytes,2: 4 Mbytes,3: 8 Mbytes,4: 16 Mbytes,5: 32 Mbytes,6: 64 Mbytes,7: 128 Mbytes"
hexmask.long.byte 0x8 0.--7. 1. "BASEADDR,base address for region x"
line.long 0xC "ICACHE_CRR3,ICACHE region 3 configuration register"
bitfld.long 0xC 31. "HBURST,output burst type for region x" "0: WRAP,1: INCR"
bitfld.long 0xC 28. "MSTSEL,AHB cache master selection for region x" "0: no action (master1 selected by default),1: master2 selected"
newline
hexmask.long.word 0xC 16.--26. 1. "REMAPADDR,remapped address for region x"
bitfld.long 0xC 15. "REN,enable for region x" "0: disabled,1: enabled"
newline
bitfld.long 0xC 9.--11. "RSIZE,size for region x" "?,1: 2 Mbytes,2: 4 Mbytes,3: 8 Mbytes,4: 16 Mbytes,5: 32 Mbytes,6: 64 Mbytes,7: 128 Mbytes"
hexmask.long.byte 0xC 0.--7. 1. "BASEADDR,base address for region x"
tree.end
tree "SEC_ICACHE"
base ad:0x50030400
group.long 0x0++0x3
line.long 0x0 "ICACHE_CR,ICACHE control register"
bitfld.long 0x0 19. "MISSMRST,miss monitor reset" "0: release the cache miss monitor reset (needed to..,1: reset cache miss monitor"
bitfld.long 0x0 18. "HITMRST,hit monitor reset" "0: release the cache miss monitor reset (needed to..,1: reset cache hit monitor"
newline
bitfld.long 0x0 17. "MISSMEN,miss monitor enable" "0: cache miss monitor switched off.,1: cache miss monitor enabled"
bitfld.long 0x0 16. "HITMEN,hit monitor enable" "0: cache hit monitor switched off.,1: cache hit monitor enabled"
newline
bitfld.long 0x0 2. "WAYSEL,cache associativity mode selection" "0: direct mapped cache (1-way cache),1: n-way set associative cache (reset value)"
bitfld.long 0x0 1. "CACHEINV,cache invalidation" "0: no effect,1: invalidate entire cache (all cache lines valid.."
newline
bitfld.long 0x0 0. "EN,enable" "0: cache disabled,1: cache enabled"
rgroup.long 0x4++0x3
line.long 0x0 "ICACHE_SR,ICACHE status register"
bitfld.long 0x0 2. "ERRF,cache error flag" "0: no error,1: an error occurred during the operation.."
bitfld.long 0x0 1. "BSYENDF,busy end flag" "0: cache busy,1: full invalidate CACHEINV operation finished"
newline
bitfld.long 0x0 0. "BUSYF,busy flag" "0: cache not busy on a CACHEINV operation,1: cache executing a full invalidate CACHEINV.."
group.long 0x8++0x3
line.long 0x0 "ICACHE_IER,ICACHE interrupt enable register"
bitfld.long 0x0 2. "ERRIE,interrupt enable on cache error" "0: interrupt disabled on error,1: interrupt enabled on error"
bitfld.long 0x0 1. "BSYENDIE,interrupt enable on busy end" "0: interrupt disabled on busy end,1: interrupt enabled on busy end"
wgroup.long 0xC++0x3
line.long 0x0 "ICACHE_FCR,ICACHE flag clear register"
bitfld.long 0x0 2. "CERRF,clear cache error flag" "0: no effect,1: clears ERRF flag in ICACHE_SR"
bitfld.long 0x0 1. "CBSYENDF,clear busy end flag" "0: no effect,1: clears BSYENDF flag in ICACHE_SR."
rgroup.long 0x10++0x7
line.long 0x0 "ICACHE_HMONR,ICACHE hit monitor register"
hexmask.long 0x0 0.--31. 1. "HITMON,cache hit monitor counter"
line.long 0x4 "ICACHE_MMONR,ICACHE miss monitor register"
hexmask.long.word 0x4 0.--15. 1. "MISSMON,cache miss monitor counter"
group.long 0x20++0xF
line.long 0x0 "ICACHE_CRR0,ICACHE region 0 configuration register"
bitfld.long 0x0 31. "HBURST,output burst type for region x" "0: WRAP,1: INCR"
bitfld.long 0x0 28. "MSTSEL,AHB cache master selection for region x" "0: no action (master1 selected by default),1: master2 selected"
newline
hexmask.long.word 0x0 16.--26. 1. "REMAPADDR,remapped address for region x"
bitfld.long 0x0 15. "REN,enable for region x" "0: disabled,1: enabled"
newline
bitfld.long 0x0 9.--11. "RSIZE,size for region x" "?,1: 2 Mbytes,2: 4 Mbytes,3: 8 Mbytes,4: 16 Mbytes,5: 32 Mbytes,6: 64 Mbytes,7: 128 Mbytes"
hexmask.long.byte 0x0 0.--7. 1. "BASEADDR,base address for region x"
line.long 0x4 "ICACHE_CRR1,ICACHE region 1 configuration register"
bitfld.long 0x4 31. "HBURST,output burst type for region x" "0: WRAP,1: INCR"
bitfld.long 0x4 28. "MSTSEL,AHB cache master selection for region x" "0: no action (master1 selected by default),1: master2 selected"
newline
hexmask.long.word 0x4 16.--26. 1. "REMAPADDR,remapped address for region x"
bitfld.long 0x4 15. "REN,enable for region x" "0: disabled,1: enabled"
newline
bitfld.long 0x4 9.--11. "RSIZE,size for region x" "?,1: 2 Mbytes,2: 4 Mbytes,3: 8 Mbytes,4: 16 Mbytes,5: 32 Mbytes,6: 64 Mbytes,7: 128 Mbytes"
hexmask.long.byte 0x4 0.--7. 1. "BASEADDR,base address for region x"
line.long 0x8 "ICACHE_CRR2,ICACHE region 2 configuration register"
bitfld.long 0x8 31. "HBURST,output burst type for region x" "0: WRAP,1: INCR"
bitfld.long 0x8 28. "MSTSEL,AHB cache master selection for region x" "0: no action (master1 selected by default),1: master2 selected"
newline
hexmask.long.word 0x8 16.--26. 1. "REMAPADDR,remapped address for region x"
bitfld.long 0x8 15. "REN,enable for region x" "0: disabled,1: enabled"
newline
bitfld.long 0x8 9.--11. "RSIZE,size for region x" "?,1: 2 Mbytes,2: 4 Mbytes,3: 8 Mbytes,4: 16 Mbytes,5: 32 Mbytes,6: 64 Mbytes,7: 128 Mbytes"
hexmask.long.byte 0x8 0.--7. 1. "BASEADDR,base address for region x"
line.long 0xC "ICACHE_CRR3,ICACHE region 3 configuration register"
bitfld.long 0xC 31. "HBURST,output burst type for region x" "0: WRAP,1: INCR"
bitfld.long 0xC 28. "MSTSEL,AHB cache master selection for region x" "0: no action (master1 selected by default),1: master2 selected"
newline
hexmask.long.word 0xC 16.--26. 1. "REMAPADDR,remapped address for region x"
bitfld.long 0xC 15. "REN,enable for region x" "0: disabled,1: enabled"
newline
bitfld.long 0xC 9.--11. "RSIZE,size for region x" "?,1: 2 Mbytes,2: 4 Mbytes,3: 8 Mbytes,4: 16 Mbytes,5: 32 Mbytes,6: 64 Mbytes,7: 128 Mbytes"
hexmask.long.byte 0xC 0.--7. 1. "BASEADDR,base address for region x"
tree.end
tree.end
tree "IWDG (Independent Watchdog)"
base ad:0x0
tree "IWDG"
base ad:0x40003000
wgroup.long 0x0++0x3
line.long 0x0 "IWDG_KR,IWDG key register"
hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)"
group.long 0x4++0x7
line.long 0x0 "IWDG_PR,IWDG prescaler register"
hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider"
line.long 0x4 "IWDG_RLR,IWDG reload register"
hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value"
rgroup.long 0xC++0x3
line.long 0x0 "IWDG_SR,IWDG status register"
bitfld.long 0x0 14. "EWIF,Watchdog early interrupt flag" "0,1"
bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1"
bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1"
bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1"
bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1"
group.long 0x10++0x7
line.long 0x0 "IWDG_WINR,IWDG window register"
hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value"
line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register"
bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "0: The early interrupt interface is disabled.,1: The early interrupt interface is enabled."
bitfld.long 0x4 14. "EWIC,Watchdog early interrupt acknowledge" "0,1"
hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value"
tree.end
tree "SEC_IWDG"
base ad:0x50003000
wgroup.long 0x0++0x3
line.long 0x0 "IWDG_KR,IWDG key register"
hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read 0x0000)"
group.long 0x4++0x7
line.long 0x0 "IWDG_PR,IWDG prescaler register"
hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider"
line.long 0x4 "IWDG_RLR,IWDG reload register"
hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value"
rgroup.long 0xC++0x3
line.long 0x0 "IWDG_SR,IWDG status register"
bitfld.long 0x0 14. "EWIF,Watchdog early interrupt flag" "0,1"
bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1"
bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1"
bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1"
bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1"
group.long 0x10++0x7
line.long 0x0 "IWDG_WINR,IWDG window register"
hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value"
line.long 0x4 "IWDG_EWCR,IWDG early wake-up interrupt register"
bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "0: The early interrupt interface is disabled.,1: The early interrupt interface is enabled."
bitfld.long 0x4 14. "EWIC,Watchdog early interrupt acknowledge" "0,1"
hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value"
tree.end
tree.end
tree "LPTIM (Low-power Timer)"
base ad:0x0
tree "LPTIM1"
base ad:0x40044400
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM1_ISR,LPTIM1 interrupt and status register [alternate]"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 19. "CMP2OK,Compare register 2 update OK" "0,1"
newline
bitfld.long 0x0 9. "CC2IF,Compare 2 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
newline
bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
newline
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
newline
bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1"
bitfld.long 0x0 2. "ExTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM1_ISR_ALTERNATE1,LPTIM1 interrupt and status register"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 13. "CC2OF,Capture 2 over-capture flag" "0: No over-capture has been detected.,1: The counter value has been captured in.."
newline
bitfld.long 0x0 12. "CC1OF,Capture 1 over-capture flag" "0: No over-capture has been detected.,1: The counter value has been captured in.."
bitfld.long 0x0 9. "CC2IF,Capture 2 interrupt flag" "0: No input capture occurred,1: The counter value has been captured in the.."
newline
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
newline
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
newline
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
bitfld.long 0x0 2. "ExTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,capture 1 interrupt flag" "0: No input capture occurred,1: The counter value has been captured in the.."
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM1_ICR,LPTIM1 interrupt clear register [alternate]"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 19. "CMP2OKCF,Compare register 2 update OK clear flag" "0,1"
newline
bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1"
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
newline
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
newline
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
newline
bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1"
bitfld.long 0x0 2. "ExTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM1_ICR_ALTERNATE1,LPTIM1 interrupt clear register"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 13. "CC2OCF,Capture/compare 2 over-capture clear flag" "0,1"
newline
bitfld.long 0x0 12. "CC1OCF,Capture/compare 1 over-capture clear flag" "0,1"
bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1"
newline
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
newline
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
newline
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
bitfld.long 0x0 2. "ExTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
group.long 0x8++0x3
line.long 0x0 "LPTIM1_DIER,LPTIM1 interrupt enable register [alternate]"
bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "0: UE DMA request disabled.,1: UE DMA request enabled"
bitfld.long 0x0 19. "CMP2OKIE,Compare register 2 update OK interrupt enable" "0: CMPOK register 2 interrupt disabled,1: CMPOK register 2 interrupt enabled"
newline
bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "0: Capture/compare 2 interrupt disabled,1: Capture/compare 2 interrupt enabled"
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
newline
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
newline
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
newline
bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "0: CMPOK register 1 interrupt disabled,1: CMPOK register 1 interrupt enabled"
bitfld.long 0x0 2. "ExTTRIGIE,External trigger valid edge Interrupt Enable" "0: ExTTRIG interrupt disabled,1: ExTTRIG interrupt enabled"
newline
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
group.long 0x8++0x13
line.long 0x0 "LPTIM1_DIER_ALTERNATE1,LPTIM1 interrupt enable register"
bitfld.long 0x0 25. "CC2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled.,1: CC2 DMA request enabled"
bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "0: UE DMA request disabled.,1: UE DMA request enabled"
newline
bitfld.long 0x0 16. "CC1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled.,1: CC1 DMA request enabled"
bitfld.long 0x0 13. "CC2OIE,Capture/compare 2 over-capture interrupt enable" "0: CC2 over-capture interrupt disabled,1: CC2 over-capture interrupt enabled"
newline
bitfld.long 0x0 12. "CC1OIE,Capture/compare 1 over-capture interrupt enable" "0: CC1 over-capture interrupt disabled,1: CC1 over-capture interrupt enabled"
bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "0: Capture/compare 2 interrupt disabled,1: Capture/compare 2 interrupt enabled"
newline
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
newline
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
newline
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
bitfld.long 0x0 2. "ExTTRIGIE,External trigger valid edge Interrupt Enable" "0: ExTTRIG interrupt disabled,1: ExTTRIG interrupt enabled"
newline
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
line.long 0x4 "LPTIM1_CFGR,LPTIM configuration register"
bitfld.long 0x4 24. "ENC,Encoder mode enable" "0: Encoder mode disabled,1: Encoder mode enabled"
bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "0: the counter is incremented following each..,1: the counter is incremented following each valid.."
newline
bitfld.long 0x4 22. "PRELOAD,Registers update mode" "0: Registers are updated after each APB bus write..,1: Registers are updated at the end of the current.."
bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "0: The LPTIM output reflects the compare results..,1: The LPTIM output reflects the inverse of the.."
newline
bitfld.long 0x4 20. "WAVE,Waveform shape" "0: Deactivate Set-once mode,1: Activate the Set-once mode"
bitfld.long 0x4 19. "TIMOUT,Timeout enable" "0: A trigger event arriving when the timer is..,1: A trigger event arriving when the timer is.."
newline
bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and polarity" "0: software trigger (counting start is initiated by..,1: rising edge is the active edge,2: falling edge is the active edge,3: both edges are active edges"
bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "0: lptim_ext_trig0,1: lptim_ext_trig1,2: lptim_ext_trig2,3: lptim_ext_trig3,4: lptim_ext_trig4,5: lptim_ext_trig5,6: lptim_ext_trig6,7: lptim_ext_trig7"
newline
bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "0: /1,1: /2,2: /4,3: /8,4: /16,5: /32,6: /64,7: /128"
bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for trigger" "0: any trigger active level change is considered as..,1: trigger active level change must be stable for..,2: trigger active level change must be stable for..,3: trigger active level change must be stable for.."
newline
bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external clock" "0: any external clock signal level change is..,1: external clock signal level change must be..,2: external clock signal level change must be..,3: external clock signal level change must be.."
bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "0: the rising edge is the active edge used for..,1: the falling edge is the active edge used for..,2: both edges are active edges.,3: not allowed"
newline
bitfld.long 0x4 0. "CKSEL,Clock selector" "0: LPTIM is clocked by internal clock source (APB..,1: LPTIM is clocked by an external clock source.."
line.long 0x8 "LPTIM1_CR,LPTIM control register"
bitfld.long 0x8 4. "RSTARE,Reset after read enable" "0,1"
bitfld.long 0x8 3. "COUNTRST,Counter reset" "0,1"
newline
bitfld.long 0x8 2. "CNTSTRT,Timer start in Continuous mode" "0,1"
bitfld.long 0x8 1. "SNGSTRT,LPTIM start in Single mode" "0,1"
newline
bitfld.long 0x8 0. "ENABLE,LPTIM enable" "0: LPTIM is disabled.,1: LPTIM is enabled"
line.long 0xC "LPTIM1_CCR1,LPTIM compare register 1"
hexmask.long.word 0xC 0.--15. 1. "CCR1,Capture/compare 1 value"
line.long 0x10 "LPTIM1_ARR,LPTIM autoreload register"
hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value"
rgroup.long 0x1C++0x3
line.long 0x0 "LPTIM1_CNT,LPTIM counter register"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.long 0x24++0xB
line.long 0x0 "LPTIM1_CFGR2,LPTIM configuration register 2"
bitfld.long 0x0 20.--21. "IC2SEL,LPTIM input capture 2 selection" "0: lptim_ic2_mux0,1: lptim_ic2_mux1,2: lptim_ic2_mux2,3: lptim_ic2_mux3"
bitfld.long 0x0 16.--17. "IC1SEL,LPTIM input capture 1 selection" "0: lptim_ic1_mux0,1: lptim_ic1_mux1,2: lptim_ic1_mux2,3: lptim_ic1_mux3"
newline
bitfld.long 0x0 4.--5. "IN2SEL,LPTIM input 2 selection" "0: lptim_in2_mux0,1: lptim_in2_mux1,2: lptim_in2_mux2,3: lptim_in2_mux3"
bitfld.long 0x0 0.--1. "IN1SEL,LPTIM input 1 selection" "0: lptim_in1_mux0,1: lptim_in1_mux1,2: lptim_in1_mux2,3: lptim_in1_mux3"
line.long 0x4 "LPTIM1_RCR,LPTIM repetition register"
hexmask.long.byte 0x4 0.--7. 1. "REP,Repetition register value"
line.long 0x8 "LPTIM1_CCMR1,LPTIM capture/compare mode register 1"
bitfld.long 0x8 28.--29. "IC2F,Input capture 2 filter" "0: any external input capture signal level change..,1: external input capture signal level change must..,2: external input capture signal level change must..,3: external input capture signal level change must.."
bitfld.long 0x8 24.--25. "IC2PSC,Input capture 2 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
newline
bitfld.long 0x8 18.--19. "CC2P,Capture/compare 2 output polarity." "0: OC2 active high,1: OC2 active low,?,3: both edges circuit is sensitive to both IC2.."
bitfld.long 0x8 17. "CC2E,Capture/compare 2 output enable." "0: Off-OC2 is not active.,1: On-OC2 signal is output on the corresponding.."
newline
bitfld.long 0x8 16. "CC2SEL,Capture/compare 2 selection" "0: CC2 channel is configured in output PWM mode,1: CC2 channel is configured in input capture mode"
bitfld.long 0x8 12.--13. "IC1F,Input capture 1 filter" "0: any external input capture signal level change..,1: external input capture signal level change must..,2: external input capture signal level change must..,3: external input capture signal level change must.."
newline
bitfld.long 0x8 8.--9. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x8 2.--3. "CC1P,Capture/compare 1 output polarity." "0: OC1 active high the LPTIM output reflects the..,1: OC1 active low the LPTIM output reflects the..,?,3: both edges circuit is sensitive to both IC1.."
newline
bitfld.long 0x8 1. "CC1E,Capture/compare 1 output enable." "0: Off-OC1 is not active.,1: On-OC1 signal is output on the corresponding.."
bitfld.long 0x8 0. "CC1SEL,Capture/compare 1 selection" "0: CC1 channel is configured in output PWM mode,1: CC1 channel is configured in input capture mode"
group.long 0x34++0x3
line.long 0x0 "LPTIM1_CCR2,LPTIM compare register 2"
hexmask.long.word 0x0 0.--15. 1. "CCR2,Capture/compare 2 value"
tree.end
tree "SEC_LPTIM1"
base ad:0x50044400
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM1_ISR,LPTIM1 interrupt and status register [alternate]"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 19. "CMP2OK,Compare register 2 update OK" "0,1"
newline
bitfld.long 0x0 9. "CC2IF,Compare 2 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
newline
bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
newline
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
newline
bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1"
bitfld.long 0x0 2. "ExTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM1_ISR_ALTERNATE1,LPTIM1 interrupt and status register"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 13. "CC2OF,Capture 2 over-capture flag" "0: No over-capture has been detected.,1: The counter value has been captured in.."
newline
bitfld.long 0x0 12. "CC1OF,Capture 1 over-capture flag" "0: No over-capture has been detected.,1: The counter value has been captured in.."
bitfld.long 0x0 9. "CC2IF,Capture 2 interrupt flag" "0: No input capture occurred,1: The counter value has been captured in the.."
newline
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
newline
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
newline
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
bitfld.long 0x0 2. "ExTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,capture 1 interrupt flag" "0: No input capture occurred,1: The counter value has been captured in the.."
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM1_ICR,LPTIM1 interrupt clear register [alternate]"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 19. "CMP2OKCF,Compare register 2 update OK clear flag" "0,1"
newline
bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1"
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
newline
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
newline
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
newline
bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1"
bitfld.long 0x0 2. "ExTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM1_ICR_ALTERNATE1,LPTIM1 interrupt clear register"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 13. "CC2OCF,Capture/compare 2 over-capture clear flag" "0,1"
newline
bitfld.long 0x0 12. "CC1OCF,Capture/compare 1 over-capture clear flag" "0,1"
bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1"
newline
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
newline
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
newline
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
bitfld.long 0x0 2. "ExTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
group.long 0x8++0x3
line.long 0x0 "LPTIM1_DIER,LPTIM1 interrupt enable register [alternate]"
bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "0: UE DMA request disabled.,1: UE DMA request enabled"
bitfld.long 0x0 19. "CMP2OKIE,Compare register 2 update OK interrupt enable" "0: CMPOK register 2 interrupt disabled,1: CMPOK register 2 interrupt enabled"
newline
bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "0: Capture/compare 2 interrupt disabled,1: Capture/compare 2 interrupt enabled"
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
newline
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
newline
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
newline
bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "0: CMPOK register 1 interrupt disabled,1: CMPOK register 1 interrupt enabled"
bitfld.long 0x0 2. "ExTTRIGIE,External trigger valid edge Interrupt Enable" "0: ExTTRIG interrupt disabled,1: ExTTRIG interrupt enabled"
newline
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
group.long 0x8++0x13
line.long 0x0 "LPTIM1_DIER_ALTERNATE1,LPTIM1 interrupt enable register"
bitfld.long 0x0 25. "CC2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled.,1: CC2 DMA request enabled"
bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "0: UE DMA request disabled.,1: UE DMA request enabled"
newline
bitfld.long 0x0 16. "CC1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled.,1: CC1 DMA request enabled"
bitfld.long 0x0 13. "CC2OIE,Capture/compare 2 over-capture interrupt enable" "0: CC2 over-capture interrupt disabled,1: CC2 over-capture interrupt enabled"
newline
bitfld.long 0x0 12. "CC1OIE,Capture/compare 1 over-capture interrupt enable" "0: CC1 over-capture interrupt disabled,1: CC1 over-capture interrupt enabled"
bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "0: Capture/compare 2 interrupt disabled,1: Capture/compare 2 interrupt enabled"
newline
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
newline
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
newline
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
bitfld.long 0x0 2. "ExTTRIGIE,External trigger valid edge Interrupt Enable" "0: ExTTRIG interrupt disabled,1: ExTTRIG interrupt enabled"
newline
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
line.long 0x4 "LPTIM1_CFGR,LPTIM configuration register"
bitfld.long 0x4 24. "ENC,Encoder mode enable" "0: Encoder mode disabled,1: Encoder mode enabled"
bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "0: the counter is incremented following each..,1: the counter is incremented following each valid.."
newline
bitfld.long 0x4 22. "PRELOAD,Registers update mode" "0: Registers are updated after each APB bus write..,1: Registers are updated at the end of the current.."
bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "0: The LPTIM output reflects the compare results..,1: The LPTIM output reflects the inverse of the.."
newline
bitfld.long 0x4 20. "WAVE,Waveform shape" "0: Deactivate Set-once mode,1: Activate the Set-once mode"
bitfld.long 0x4 19. "TIMOUT,Timeout enable" "0: A trigger event arriving when the timer is..,1: A trigger event arriving when the timer is.."
newline
bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and polarity" "0: software trigger (counting start is initiated by..,1: rising edge is the active edge,2: falling edge is the active edge,3: both edges are active edges"
bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "0: lptim_ext_trig0,1: lptim_ext_trig1,2: lptim_ext_trig2,3: lptim_ext_trig3,4: lptim_ext_trig4,5: lptim_ext_trig5,6: lptim_ext_trig6,7: lptim_ext_trig7"
newline
bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "0: /1,1: /2,2: /4,3: /8,4: /16,5: /32,6: /64,7: /128"
bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for trigger" "0: any trigger active level change is considered as..,1: trigger active level change must be stable for..,2: trigger active level change must be stable for..,3: trigger active level change must be stable for.."
newline
bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external clock" "0: any external clock signal level change is..,1: external clock signal level change must be..,2: external clock signal level change must be..,3: external clock signal level change must be.."
bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "0: the rising edge is the active edge used for..,1: the falling edge is the active edge used for..,2: both edges are active edges.,3: not allowed"
newline
bitfld.long 0x4 0. "CKSEL,Clock selector" "0: LPTIM is clocked by internal clock source (APB..,1: LPTIM is clocked by an external clock source.."
line.long 0x8 "LPTIM1_CR,LPTIM control register"
bitfld.long 0x8 4. "RSTARE,Reset after read enable" "0,1"
bitfld.long 0x8 3. "COUNTRST,Counter reset" "0,1"
newline
bitfld.long 0x8 2. "CNTSTRT,Timer start in Continuous mode" "0,1"
bitfld.long 0x8 1. "SNGSTRT,LPTIM start in Single mode" "0,1"
newline
bitfld.long 0x8 0. "ENABLE,LPTIM enable" "0: LPTIM is disabled.,1: LPTIM is enabled"
line.long 0xC "LPTIM1_CCR1,LPTIM compare register 1"
hexmask.long.word 0xC 0.--15. 1. "CCR1,Capture/compare 1 value"
line.long 0x10 "LPTIM1_ARR,LPTIM autoreload register"
hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value"
rgroup.long 0x1C++0x3
line.long 0x0 "LPTIM1_CNT,LPTIM counter register"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.long 0x24++0xB
line.long 0x0 "LPTIM1_CFGR2,LPTIM configuration register 2"
bitfld.long 0x0 20.--21. "IC2SEL,LPTIM input capture 2 selection" "0: lptim_ic2_mux0,1: lptim_ic2_mux1,2: lptim_ic2_mux2,3: lptim_ic2_mux3"
bitfld.long 0x0 16.--17. "IC1SEL,LPTIM input capture 1 selection" "0: lptim_ic1_mux0,1: lptim_ic1_mux1,2: lptim_ic1_mux2,3: lptim_ic1_mux3"
newline
bitfld.long 0x0 4.--5. "IN2SEL,LPTIM input 2 selection" "0: lptim_in2_mux0,1: lptim_in2_mux1,2: lptim_in2_mux2,3: lptim_in2_mux3"
bitfld.long 0x0 0.--1. "IN1SEL,LPTIM input 1 selection" "0: lptim_in1_mux0,1: lptim_in1_mux1,2: lptim_in1_mux2,3: lptim_in1_mux3"
line.long 0x4 "LPTIM1_RCR,LPTIM repetition register"
hexmask.long.byte 0x4 0.--7. 1. "REP,Repetition register value"
line.long 0x8 "LPTIM1_CCMR1,LPTIM capture/compare mode register 1"
bitfld.long 0x8 28.--29. "IC2F,Input capture 2 filter" "0: any external input capture signal level change..,1: external input capture signal level change must..,2: external input capture signal level change must..,3: external input capture signal level change must.."
bitfld.long 0x8 24.--25. "IC2PSC,Input capture 2 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
newline
bitfld.long 0x8 18.--19. "CC2P,Capture/compare 2 output polarity." "0: OC2 active high,1: OC2 active low,?,3: both edges circuit is sensitive to both IC2.."
bitfld.long 0x8 17. "CC2E,Capture/compare 2 output enable." "0: Off-OC2 is not active.,1: On-OC2 signal is output on the corresponding.."
newline
bitfld.long 0x8 16. "CC2SEL,Capture/compare 2 selection" "0: CC2 channel is configured in output PWM mode,1: CC2 channel is configured in input capture mode"
bitfld.long 0x8 12.--13. "IC1F,Input capture 1 filter" "0: any external input capture signal level change..,1: external input capture signal level change must..,2: external input capture signal level change must..,3: external input capture signal level change must.."
newline
bitfld.long 0x8 8.--9. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x8 2.--3. "CC1P,Capture/compare 1 output polarity." "0: OC1 active high the LPTIM output reflects the..,1: OC1 active low the LPTIM output reflects the..,?,3: both edges circuit is sensitive to both IC1.."
newline
bitfld.long 0x8 1. "CC1E,Capture/compare 1 output enable." "0: Off-OC1 is not active.,1: On-OC1 signal is output on the corresponding.."
bitfld.long 0x8 0. "CC1SEL,Capture/compare 1 selection" "0: CC1 channel is configured in output PWM mode,1: CC1 channel is configured in input capture mode"
group.long 0x34++0x3
line.long 0x0 "LPTIM1_CCR2,LPTIM compare register 2"
hexmask.long.word 0x0 0.--15. 1. "CCR2,Capture/compare 2 value"
tree.end
tree "LPTIM2"
base ad:0x40009400
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM2_ISR,LPTIM2 interrupt and status register [alternate]"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 19. "CMP2OK,Compare register 2 update OK" "0,1"
newline
bitfld.long 0x0 9. "CC2IF,Compare 2 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
newline
bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
newline
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
newline
bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1"
bitfld.long 0x0 2. "ExTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM2_ISR_ALTERNATE1,LPTIM2 interrupt and status register"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 13. "CC2OF,Capture 2 over-capture flag" "0: No over-capture has been detected.,1: The counter value has been captured in.."
newline
bitfld.long 0x0 12. "CC1OF,Capture 1 over-capture flag" "0: No over-capture has been detected.,1: The counter value has been captured in.."
bitfld.long 0x0 9. "CC2IF,Capture 2 interrupt flag" "0: No input capture occurred,1: The counter value has been captured in the.."
newline
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
newline
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
newline
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
bitfld.long 0x0 2. "ExTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,capture 1 interrupt flag" "0: No input capture occurred,1: The counter value has been captured in the.."
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM2_ICR,LPTIM2 interrupt clear register [alternate]"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 19. "CMP2OKCF,Compare register 2 update OK clear flag" "0,1"
newline
bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1"
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
newline
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
newline
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
newline
bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1"
bitfld.long 0x0 2. "ExTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM2_ICR_ALTERNATE1,LPTIM2 interrupt clear register"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 13. "CC2OCF,Capture/compare 2 over-capture clear flag" "0,1"
newline
bitfld.long 0x0 12. "CC1OCF,Capture/compare 1 over-capture clear flag" "0,1"
bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1"
newline
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
newline
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
newline
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
bitfld.long 0x0 2. "ExTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
group.long 0x8++0x3
line.long 0x0 "LPTIM2_DIER,LPTIM2 interrupt enable register [alternate]"
bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "0: UE DMA request disabled.,1: UE DMA request enabled"
bitfld.long 0x0 19. "CMP2OKIE,Compare register 2 update OK interrupt enable" "0: CMPOK register 2 interrupt disabled,1: CMPOK register 2 interrupt enabled"
newline
bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "0: Capture/compare 2 interrupt disabled,1: Capture/compare 2 interrupt enabled"
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
newline
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
newline
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
newline
bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "0: CMPOK register 1 interrupt disabled,1: CMPOK register 1 interrupt enabled"
bitfld.long 0x0 2. "ExTTRIGIE,External trigger valid edge Interrupt Enable" "0: ExTTRIG interrupt disabled,1: ExTTRIG interrupt enabled"
newline
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
group.long 0x8++0x13
line.long 0x0 "LPTIM2_DIER_ALTERNATE1,LPTIM2 interrupt enable register"
bitfld.long 0x0 25. "CC2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled.,1: CC2 DMA request enabled"
bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "0: UE DMA request disabled.,1: UE DMA request enabled"
newline
bitfld.long 0x0 16. "CC1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled.,1: CC1 DMA request enabled"
bitfld.long 0x0 13. "CC2OIE,Capture/compare 2 over-capture interrupt enable" "0: CC2 over-capture interrupt disabled,1: CC2 over-capture interrupt enabled"
newline
bitfld.long 0x0 12. "CC1OIE,Capture/compare 1 over-capture interrupt enable" "0: CC1 over-capture interrupt disabled,1: CC1 over-capture interrupt enabled"
bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "0: Capture/compare 2 interrupt disabled,1: Capture/compare 2 interrupt enabled"
newline
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
newline
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
newline
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
bitfld.long 0x0 2. "ExTTRIGIE,External trigger valid edge Interrupt Enable" "0: ExTTRIG interrupt disabled,1: ExTTRIG interrupt enabled"
newline
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
line.long 0x4 "LPTIM2_CFGR,LPTIM configuration register"
bitfld.long 0x4 24. "ENC,Encoder mode enable" "0: Encoder mode disabled,1: Encoder mode enabled"
bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "0: the counter is incremented following each..,1: the counter is incremented following each valid.."
newline
bitfld.long 0x4 22. "PRELOAD,Registers update mode" "0: Registers are updated after each APB bus write..,1: Registers are updated at the end of the current.."
bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "0: The LPTIM output reflects the compare results..,1: The LPTIM output reflects the inverse of the.."
newline
bitfld.long 0x4 20. "WAVE,Waveform shape" "0: Deactivate Set-once mode,1: Activate the Set-once mode"
bitfld.long 0x4 19. "TIMOUT,Timeout enable" "0: A trigger event arriving when the timer is..,1: A trigger event arriving when the timer is.."
newline
bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and polarity" "0: software trigger (counting start is initiated by..,1: rising edge is the active edge,2: falling edge is the active edge,3: both edges are active edges"
bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "0: lptim_ext_trig0,1: lptim_ext_trig1,2: lptim_ext_trig2,3: lptim_ext_trig3,4: lptim_ext_trig4,5: lptim_ext_trig5,6: lptim_ext_trig6,7: lptim_ext_trig7"
newline
bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "0: /1,1: /2,2: /4,3: /8,4: /16,5: /32,6: /64,7: /128"
bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for trigger" "0: any trigger active level change is considered as..,1: trigger active level change must be stable for..,2: trigger active level change must be stable for..,3: trigger active level change must be stable for.."
newline
bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external clock" "0: any external clock signal level change is..,1: external clock signal level change must be..,2: external clock signal level change must be..,3: external clock signal level change must be.."
bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "0: the rising edge is the active edge used for..,1: the falling edge is the active edge used for..,2: both edges are active edges.,3: not allowed"
newline
bitfld.long 0x4 0. "CKSEL,Clock selector" "0: LPTIM is clocked by internal clock source (APB..,1: LPTIM is clocked by an external clock source.."
line.long 0x8 "LPTIM2_CR,LPTIM control register"
bitfld.long 0x8 4. "RSTARE,Reset after read enable" "0,1"
bitfld.long 0x8 3. "COUNTRST,Counter reset" "0,1"
newline
bitfld.long 0x8 2. "CNTSTRT,Timer start in Continuous mode" "0,1"
bitfld.long 0x8 1. "SNGSTRT,LPTIM start in Single mode" "0,1"
newline
bitfld.long 0x8 0. "ENABLE,LPTIM enable" "0: LPTIM is disabled.,1: LPTIM is enabled"
line.long 0xC "LPTIM2_CCR1,LPTIM compare register 1"
hexmask.long.word 0xC 0.--15. 1. "CCR1,Capture/compare 1 value"
line.long 0x10 "LPTIM2_ARR,LPTIM autoreload register"
hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value"
rgroup.long 0x1C++0x3
line.long 0x0 "LPTIM2_CNT,LPTIM counter register"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.long 0x24++0xB
line.long 0x0 "LPTIM2_CFGR2,LPTIM configuration register 2"
bitfld.long 0x0 20.--21. "IC2SEL,LPTIM input capture 2 selection" "0: lptim_ic2_mux0,1: lptim_ic2_mux1,2: lptim_ic2_mux2,3: lptim_ic2_mux3"
bitfld.long 0x0 16.--17. "IC1SEL,LPTIM input capture 1 selection" "0: lptim_ic1_mux0,1: lptim_ic1_mux1,2: lptim_ic1_mux2,3: lptim_ic1_mux3"
newline
bitfld.long 0x0 4.--5. "IN2SEL,LPTIM input 2 selection" "0: lptim_in2_mux0,1: lptim_in2_mux1,2: lptim_in2_mux2,3: lptim_in2_mux3"
bitfld.long 0x0 0.--1. "IN1SEL,LPTIM input 1 selection" "0: lptim_in1_mux0,1: lptim_in1_mux1,2: lptim_in1_mux2,3: lptim_in1_mux3"
line.long 0x4 "LPTIM2_RCR,LPTIM repetition register"
hexmask.long.byte 0x4 0.--7. 1. "REP,Repetition register value"
line.long 0x8 "LPTIM2_CCMR1,LPTIM capture/compare mode register 1"
bitfld.long 0x8 28.--29. "IC2F,Input capture 2 filter" "0: any external input capture signal level change..,1: external input capture signal level change must..,2: external input capture signal level change must..,3: external input capture signal level change must.."
bitfld.long 0x8 24.--25. "IC2PSC,Input capture 2 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
newline
bitfld.long 0x8 18.--19. "CC2P,Capture/compare 2 output polarity." "0: OC2 active high,1: OC2 active low,?,3: both edges circuit is sensitive to both IC2.."
bitfld.long 0x8 17. "CC2E,Capture/compare 2 output enable." "0: Off-OC2 is not active.,1: On-OC2 signal is output on the corresponding.."
newline
bitfld.long 0x8 16. "CC2SEL,Capture/compare 2 selection" "0: CC2 channel is configured in output PWM mode,1: CC2 channel is configured in input capture mode"
bitfld.long 0x8 12.--13. "IC1F,Input capture 1 filter" "0: any external input capture signal level change..,1: external input capture signal level change must..,2: external input capture signal level change must..,3: external input capture signal level change must.."
newline
bitfld.long 0x8 8.--9. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x8 2.--3. "CC1P,Capture/compare 1 output polarity." "0: OC1 active high the LPTIM output reflects the..,1: OC1 active low the LPTIM output reflects the..,?,3: both edges circuit is sensitive to both IC1.."
newline
bitfld.long 0x8 1. "CC1E,Capture/compare 1 output enable." "0: Off-OC1 is not active.,1: On-OC1 signal is output on the corresponding.."
bitfld.long 0x8 0. "CC1SEL,Capture/compare 1 selection" "0: CC1 channel is configured in output PWM mode,1: CC1 channel is configured in input capture mode"
group.long 0x34++0x3
line.long 0x0 "LPTIM2_CCR2,LPTIM compare register 2"
hexmask.long.word 0x0 0.--15. 1. "CCR2,Capture/compare 2 value"
tree.end
tree "SEC_LPTIM2"
base ad:0x50009400
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM2_ISR,LPTIM2 interrupt and status register [alternate]"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 19. "CMP2OK,Compare register 2 update OK" "0,1"
newline
bitfld.long 0x0 9. "CC2IF,Compare 2 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
newline
bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
newline
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
newline
bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1"
bitfld.long 0x0 2. "ExTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM2_ISR_ALTERNATE1,LPTIM2 interrupt and status register"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 13. "CC2OF,Capture 2 over-capture flag" "0: No over-capture has been detected.,1: The counter value has been captured in.."
newline
bitfld.long 0x0 12. "CC1OF,Capture 1 over-capture flag" "0: No over-capture has been detected.,1: The counter value has been captured in.."
bitfld.long 0x0 9. "CC2IF,Capture 2 interrupt flag" "0: No input capture occurred,1: The counter value has been captured in the.."
newline
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
newline
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
newline
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
bitfld.long 0x0 2. "ExTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,capture 1 interrupt flag" "0: No input capture occurred,1: The counter value has been captured in the.."
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM2_ICR,LPTIM2 interrupt clear register [alternate]"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 19. "CMP2OKCF,Compare register 2 update OK clear flag" "0,1"
newline
bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1"
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
newline
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
newline
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
newline
bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1"
bitfld.long 0x0 2. "ExTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM2_ICR_ALTERNATE1,LPTIM2 interrupt clear register"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 13. "CC2OCF,Capture/compare 2 over-capture clear flag" "0,1"
newline
bitfld.long 0x0 12. "CC1OCF,Capture/compare 1 over-capture clear flag" "0,1"
bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1"
newline
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
newline
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
newline
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
bitfld.long 0x0 2. "ExTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
group.long 0x8++0x3
line.long 0x0 "LPTIM2_DIER,LPTIM2 interrupt enable register [alternate]"
bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "0: UE DMA request disabled.,1: UE DMA request enabled"
bitfld.long 0x0 19. "CMP2OKIE,Compare register 2 update OK interrupt enable" "0: CMPOK register 2 interrupt disabled,1: CMPOK register 2 interrupt enabled"
newline
bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "0: Capture/compare 2 interrupt disabled,1: Capture/compare 2 interrupt enabled"
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
newline
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
newline
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
newline
bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "0: CMPOK register 1 interrupt disabled,1: CMPOK register 1 interrupt enabled"
bitfld.long 0x0 2. "ExTTRIGIE,External trigger valid edge Interrupt Enable" "0: ExTTRIG interrupt disabled,1: ExTTRIG interrupt enabled"
newline
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
group.long 0x8++0x13
line.long 0x0 "LPTIM2_DIER_ALTERNATE1,LPTIM2 interrupt enable register"
bitfld.long 0x0 25. "CC2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled.,1: CC2 DMA request enabled"
bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "0: UE DMA request disabled.,1: UE DMA request enabled"
newline
bitfld.long 0x0 16. "CC1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled.,1: CC1 DMA request enabled"
bitfld.long 0x0 13. "CC2OIE,Capture/compare 2 over-capture interrupt enable" "0: CC2 over-capture interrupt disabled,1: CC2 over-capture interrupt enabled"
newline
bitfld.long 0x0 12. "CC1OIE,Capture/compare 1 over-capture interrupt enable" "0: CC1 over-capture interrupt disabled,1: CC1 over-capture interrupt enabled"
bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "0: Capture/compare 2 interrupt disabled,1: Capture/compare 2 interrupt enabled"
newline
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
newline
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
newline
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
bitfld.long 0x0 2. "ExTTRIGIE,External trigger valid edge Interrupt Enable" "0: ExTTRIG interrupt disabled,1: ExTTRIG interrupt enabled"
newline
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
line.long 0x4 "LPTIM2_CFGR,LPTIM configuration register"
bitfld.long 0x4 24. "ENC,Encoder mode enable" "0: Encoder mode disabled,1: Encoder mode enabled"
bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "0: the counter is incremented following each..,1: the counter is incremented following each valid.."
newline
bitfld.long 0x4 22. "PRELOAD,Registers update mode" "0: Registers are updated after each APB bus write..,1: Registers are updated at the end of the current.."
bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "0: The LPTIM output reflects the compare results..,1: The LPTIM output reflects the inverse of the.."
newline
bitfld.long 0x4 20. "WAVE,Waveform shape" "0: Deactivate Set-once mode,1: Activate the Set-once mode"
bitfld.long 0x4 19. "TIMOUT,Timeout enable" "0: A trigger event arriving when the timer is..,1: A trigger event arriving when the timer is.."
newline
bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and polarity" "0: software trigger (counting start is initiated by..,1: rising edge is the active edge,2: falling edge is the active edge,3: both edges are active edges"
bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "0: lptim_ext_trig0,1: lptim_ext_trig1,2: lptim_ext_trig2,3: lptim_ext_trig3,4: lptim_ext_trig4,5: lptim_ext_trig5,6: lptim_ext_trig6,7: lptim_ext_trig7"
newline
bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "0: /1,1: /2,2: /4,3: /8,4: /16,5: /32,6: /64,7: /128"
bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for trigger" "0: any trigger active level change is considered as..,1: trigger active level change must be stable for..,2: trigger active level change must be stable for..,3: trigger active level change must be stable for.."
newline
bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external clock" "0: any external clock signal level change is..,1: external clock signal level change must be..,2: external clock signal level change must be..,3: external clock signal level change must be.."
bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "0: the rising edge is the active edge used for..,1: the falling edge is the active edge used for..,2: both edges are active edges.,3: not allowed"
newline
bitfld.long 0x4 0. "CKSEL,Clock selector" "0: LPTIM is clocked by internal clock source (APB..,1: LPTIM is clocked by an external clock source.."
line.long 0x8 "LPTIM2_CR,LPTIM control register"
bitfld.long 0x8 4. "RSTARE,Reset after read enable" "0,1"
bitfld.long 0x8 3. "COUNTRST,Counter reset" "0,1"
newline
bitfld.long 0x8 2. "CNTSTRT,Timer start in Continuous mode" "0,1"
bitfld.long 0x8 1. "SNGSTRT,LPTIM start in Single mode" "0,1"
newline
bitfld.long 0x8 0. "ENABLE,LPTIM enable" "0: LPTIM is disabled.,1: LPTIM is enabled"
line.long 0xC "LPTIM2_CCR1,LPTIM compare register 1"
hexmask.long.word 0xC 0.--15. 1. "CCR1,Capture/compare 1 value"
line.long 0x10 "LPTIM2_ARR,LPTIM autoreload register"
hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value"
rgroup.long 0x1C++0x3
line.long 0x0 "LPTIM2_CNT,LPTIM counter register"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.long 0x24++0xB
line.long 0x0 "LPTIM2_CFGR2,LPTIM configuration register 2"
bitfld.long 0x0 20.--21. "IC2SEL,LPTIM input capture 2 selection" "0: lptim_ic2_mux0,1: lptim_ic2_mux1,2: lptim_ic2_mux2,3: lptim_ic2_mux3"
bitfld.long 0x0 16.--17. "IC1SEL,LPTIM input capture 1 selection" "0: lptim_ic1_mux0,1: lptim_ic1_mux1,2: lptim_ic1_mux2,3: lptim_ic1_mux3"
newline
bitfld.long 0x0 4.--5. "IN2SEL,LPTIM input 2 selection" "0: lptim_in2_mux0,1: lptim_in2_mux1,2: lptim_in2_mux2,3: lptim_in2_mux3"
bitfld.long 0x0 0.--1. "IN1SEL,LPTIM input 1 selection" "0: lptim_in1_mux0,1: lptim_in1_mux1,2: lptim_in1_mux2,3: lptim_in1_mux3"
line.long 0x4 "LPTIM2_RCR,LPTIM repetition register"
hexmask.long.byte 0x4 0.--7. 1. "REP,Repetition register value"
line.long 0x8 "LPTIM2_CCMR1,LPTIM capture/compare mode register 1"
bitfld.long 0x8 28.--29. "IC2F,Input capture 2 filter" "0: any external input capture signal level change..,1: external input capture signal level change must..,2: external input capture signal level change must..,3: external input capture signal level change must.."
bitfld.long 0x8 24.--25. "IC2PSC,Input capture 2 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
newline
bitfld.long 0x8 18.--19. "CC2P,Capture/compare 2 output polarity." "0: OC2 active high,1: OC2 active low,?,3: both edges circuit is sensitive to both IC2.."
bitfld.long 0x8 17. "CC2E,Capture/compare 2 output enable." "0: Off-OC2 is not active.,1: On-OC2 signal is output on the corresponding.."
newline
bitfld.long 0x8 16. "CC2SEL,Capture/compare 2 selection" "0: CC2 channel is configured in output PWM mode,1: CC2 channel is configured in input capture mode"
bitfld.long 0x8 12.--13. "IC1F,Input capture 1 filter" "0: any external input capture signal level change..,1: external input capture signal level change must..,2: external input capture signal level change must..,3: external input capture signal level change must.."
newline
bitfld.long 0x8 8.--9. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x8 2.--3. "CC1P,Capture/compare 1 output polarity." "0: OC1 active high the LPTIM output reflects the..,1: OC1 active low the LPTIM output reflects the..,?,3: both edges circuit is sensitive to both IC1.."
newline
bitfld.long 0x8 1. "CC1E,Capture/compare 1 output enable." "0: Off-OC1 is not active.,1: On-OC1 signal is output on the corresponding.."
bitfld.long 0x8 0. "CC1SEL,Capture/compare 1 selection" "0: CC1 channel is configured in output PWM mode,1: CC1 channel is configured in input capture mode"
group.long 0x34++0x3
line.long 0x0 "LPTIM2_CCR2,LPTIM compare register 2"
hexmask.long.word 0x0 0.--15. 1. "CCR2,Capture/compare 2 value"
tree.end
tree "LPTIM3"
base ad:0x40044800
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM3_ISR,LPTIM3 interrupt and status register [alternate]"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 19. "CMP2OK,Compare register 2 update OK" "0,1"
newline
bitfld.long 0x0 9. "CC2IF,Compare 2 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
newline
bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
newline
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
newline
bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1"
bitfld.long 0x0 2. "ExTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM3_ISR_ALTERNATE1,LPTIM3 interrupt and status register"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 13. "CC2OF,Capture 2 over-capture flag" "0: No over-capture has been detected.,1: The counter value has been captured in.."
newline
bitfld.long 0x0 12. "CC1OF,Capture 1 over-capture flag" "0: No over-capture has been detected.,1: The counter value has been captured in.."
bitfld.long 0x0 9. "CC2IF,Capture 2 interrupt flag" "0: No input capture occurred,1: The counter value has been captured in the.."
newline
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
newline
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
newline
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
bitfld.long 0x0 2. "ExTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,capture 1 interrupt flag" "0: No input capture occurred,1: The counter value has been captured in the.."
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM3_ICR,LPTIM3 interrupt clear register [alternate]"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 19. "CMP2OKCF,Compare register 2 update OK clear flag" "0,1"
newline
bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1"
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
newline
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
newline
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
newline
bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1"
bitfld.long 0x0 2. "ExTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM3_ICR_ALTERNATE1,LPTIM3 interrupt clear register"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 13. "CC2OCF,Capture/compare 2 over-capture clear flag" "0,1"
newline
bitfld.long 0x0 12. "CC1OCF,Capture/compare 1 over-capture clear flag" "0,1"
bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1"
newline
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
newline
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
newline
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
bitfld.long 0x0 2. "ExTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
group.long 0x8++0x3
line.long 0x0 "LPTIM3_DIER,LPTIM3 interrupt enable register [alternate]"
bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "0: UE DMA request disabled.,1: UE DMA request enabled"
bitfld.long 0x0 19. "CMP2OKIE,Compare register 2 update OK interrupt enable" "0: CMPOK register 2 interrupt disabled,1: CMPOK register 2 interrupt enabled"
newline
bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "0: Capture/compare 2 interrupt disabled,1: Capture/compare 2 interrupt enabled"
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
newline
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
newline
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
newline
bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "0: CMPOK register 1 interrupt disabled,1: CMPOK register 1 interrupt enabled"
bitfld.long 0x0 2. "ExTTRIGIE,External trigger valid edge Interrupt Enable" "0: ExTTRIG interrupt disabled,1: ExTTRIG interrupt enabled"
newline
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
group.long 0x8++0x13
line.long 0x0 "LPTIM3_DIER_ALTERNATE1,LPTIM3 interrupt enable register"
bitfld.long 0x0 25. "CC2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled.,1: CC2 DMA request enabled"
bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "0: UE DMA request disabled.,1: UE DMA request enabled"
newline
bitfld.long 0x0 16. "CC1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled.,1: CC1 DMA request enabled"
bitfld.long 0x0 13. "CC2OIE,Capture/compare 2 over-capture interrupt enable" "0: CC2 over-capture interrupt disabled,1: CC2 over-capture interrupt enabled"
newline
bitfld.long 0x0 12. "CC1OIE,Capture/compare 1 over-capture interrupt enable" "0: CC1 over-capture interrupt disabled,1: CC1 over-capture interrupt enabled"
bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "0: Capture/compare 2 interrupt disabled,1: Capture/compare 2 interrupt enabled"
newline
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
newline
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
newline
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
bitfld.long 0x0 2. "ExTTRIGIE,External trigger valid edge Interrupt Enable" "0: ExTTRIG interrupt disabled,1: ExTTRIG interrupt enabled"
newline
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
line.long 0x4 "LPTIM3_CFGR,LPTIM configuration register"
bitfld.long 0x4 24. "ENC,Encoder mode enable" "0: Encoder mode disabled,1: Encoder mode enabled"
bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "0: the counter is incremented following each..,1: the counter is incremented following each valid.."
newline
bitfld.long 0x4 22. "PRELOAD,Registers update mode" "0: Registers are updated after each APB bus write..,1: Registers are updated at the end of the current.."
bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "0: The LPTIM output reflects the compare results..,1: The LPTIM output reflects the inverse of the.."
newline
bitfld.long 0x4 20. "WAVE,Waveform shape" "0: Deactivate Set-once mode,1: Activate the Set-once mode"
bitfld.long 0x4 19. "TIMOUT,Timeout enable" "0: A trigger event arriving when the timer is..,1: A trigger event arriving when the timer is.."
newline
bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and polarity" "0: software trigger (counting start is initiated by..,1: rising edge is the active edge,2: falling edge is the active edge,3: both edges are active edges"
bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "0: lptim_ext_trig0,1: lptim_ext_trig1,2: lptim_ext_trig2,3: lptim_ext_trig3,4: lptim_ext_trig4,5: lptim_ext_trig5,6: lptim_ext_trig6,7: lptim_ext_trig7"
newline
bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "0: /1,1: /2,2: /4,3: /8,4: /16,5: /32,6: /64,7: /128"
bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for trigger" "0: any trigger active level change is considered as..,1: trigger active level change must be stable for..,2: trigger active level change must be stable for..,3: trigger active level change must be stable for.."
newline
bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external clock" "0: any external clock signal level change is..,1: external clock signal level change must be..,2: external clock signal level change must be..,3: external clock signal level change must be.."
bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "0: the rising edge is the active edge used for..,1: the falling edge is the active edge used for..,2: both edges are active edges.,3: not allowed"
newline
bitfld.long 0x4 0. "CKSEL,Clock selector" "0: LPTIM is clocked by internal clock source (APB..,1: LPTIM is clocked by an external clock source.."
line.long 0x8 "LPTIM3_CR,LPTIM control register"
bitfld.long 0x8 4. "RSTARE,Reset after read enable" "0,1"
bitfld.long 0x8 3. "COUNTRST,Counter reset" "0,1"
newline
bitfld.long 0x8 2. "CNTSTRT,Timer start in Continuous mode" "0,1"
bitfld.long 0x8 1. "SNGSTRT,LPTIM start in Single mode" "0,1"
newline
bitfld.long 0x8 0. "ENABLE,LPTIM enable" "0: LPTIM is disabled.,1: LPTIM is enabled"
line.long 0xC "LPTIM3_CCR1,LPTIM compare register 1"
hexmask.long.word 0xC 0.--15. 1. "CCR1,Capture/compare 1 value"
line.long 0x10 "LPTIM3_ARR,LPTIM autoreload register"
hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value"
rgroup.long 0x1C++0x3
line.long 0x0 "LPTIM3_CNT,LPTIM counter register"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.long 0x24++0xB
line.long 0x0 "LPTIM3_CFGR2,LPTIM configuration register 2"
bitfld.long 0x0 20.--21. "IC2SEL,LPTIM input capture 2 selection" "0: lptim_ic2_mux0,1: lptim_ic2_mux1,2: lptim_ic2_mux2,3: lptim_ic2_mux3"
bitfld.long 0x0 16.--17. "IC1SEL,LPTIM input capture 1 selection" "0: lptim_ic1_mux0,1: lptim_ic1_mux1,2: lptim_ic1_mux2,3: lptim_ic1_mux3"
newline
bitfld.long 0x0 4.--5. "IN2SEL,LPTIM input 2 selection" "0: lptim_in2_mux0,1: lptim_in2_mux1,2: lptim_in2_mux2,3: lptim_in2_mux3"
bitfld.long 0x0 0.--1. "IN1SEL,LPTIM input 1 selection" "0: lptim_in1_mux0,1: lptim_in1_mux1,2: lptim_in1_mux2,3: lptim_in1_mux3"
line.long 0x4 "LPTIM3_RCR,LPTIM repetition register"
hexmask.long.byte 0x4 0.--7. 1. "REP,Repetition register value"
line.long 0x8 "LPTIM3_CCMR1,LPTIM capture/compare mode register 1"
bitfld.long 0x8 28.--29. "IC2F,Input capture 2 filter" "0: any external input capture signal level change..,1: external input capture signal level change must..,2: external input capture signal level change must..,3: external input capture signal level change must.."
bitfld.long 0x8 24.--25. "IC2PSC,Input capture 2 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
newline
bitfld.long 0x8 18.--19. "CC2P,Capture/compare 2 output polarity." "0: OC2 active high,1: OC2 active low,?,3: both edges circuit is sensitive to both IC2.."
bitfld.long 0x8 17. "CC2E,Capture/compare 2 output enable." "0: Off-OC2 is not active.,1: On-OC2 signal is output on the corresponding.."
newline
bitfld.long 0x8 16. "CC2SEL,Capture/compare 2 selection" "0: CC2 channel is configured in output PWM mode,1: CC2 channel is configured in input capture mode"
bitfld.long 0x8 12.--13. "IC1F,Input capture 1 filter" "0: any external input capture signal level change..,1: external input capture signal level change must..,2: external input capture signal level change must..,3: external input capture signal level change must.."
newline
bitfld.long 0x8 8.--9. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x8 2.--3. "CC1P,Capture/compare 1 output polarity." "0: OC1 active high the LPTIM output reflects the..,1: OC1 active low the LPTIM output reflects the..,?,3: both edges circuit is sensitive to both IC1.."
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bitfld.long 0x8 1. "CC1E,Capture/compare 1 output enable." "0: Off-OC1 is not active.,1: On-OC1 signal is output on the corresponding.."
bitfld.long 0x8 0. "CC1SEL,Capture/compare 1 selection" "0: CC1 channel is configured in output PWM mode,1: CC1 channel is configured in input capture mode"
group.long 0x34++0x3
line.long 0x0 "LPTIM3_CCR2,LPTIM compare register 2"
hexmask.long.word 0x0 0.--15. 1. "CCR2,Capture/compare 2 value"
tree.end
tree "SEC_LPTIM3"
base ad:0x50044800
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM3_ISR,LPTIM3 interrupt and status register [alternate]"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 19. "CMP2OK,Compare register 2 update OK" "0,1"
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bitfld.long 0x0 9. "CC2IF,Compare 2 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
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bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
newline
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
newline
bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1"
bitfld.long 0x0 2. "ExTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM3_ISR_ALTERNATE1,LPTIM3 interrupt and status register"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 13. "CC2OF,Capture 2 over-capture flag" "0: No over-capture has been detected.,1: The counter value has been captured in.."
newline
bitfld.long 0x0 12. "CC1OF,Capture 1 over-capture flag" "0: No over-capture has been detected.,1: The counter value has been captured in.."
bitfld.long 0x0 9. "CC2IF,Capture 2 interrupt flag" "0: No input capture occurred,1: The counter value has been captured in the.."
newline
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
newline
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
newline
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
bitfld.long 0x0 2. "ExTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,capture 1 interrupt flag" "0: No input capture occurred,1: The counter value has been captured in the.."
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM3_ICR,LPTIM3 interrupt clear register [alternate]"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 19. "CMP2OKCF,Compare register 2 update OK clear flag" "0,1"
newline
bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1"
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
newline
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
newline
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
newline
bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1"
bitfld.long 0x0 2. "ExTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM3_ICR_ALTERNATE1,LPTIM3 interrupt clear register"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 13. "CC2OCF,Capture/compare 2 over-capture clear flag" "0,1"
newline
bitfld.long 0x0 12. "CC1OCF,Capture/compare 1 over-capture clear flag" "0,1"
bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1"
newline
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
newline
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
newline
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
bitfld.long 0x0 2. "ExTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
group.long 0x8++0x3
line.long 0x0 "LPTIM3_DIER,LPTIM3 interrupt enable register [alternate]"
bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "0: UE DMA request disabled.,1: UE DMA request enabled"
bitfld.long 0x0 19. "CMP2OKIE,Compare register 2 update OK interrupt enable" "0: CMPOK register 2 interrupt disabled,1: CMPOK register 2 interrupt enabled"
newline
bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "0: Capture/compare 2 interrupt disabled,1: Capture/compare 2 interrupt enabled"
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
newline
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
newline
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
newline
bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "0: CMPOK register 1 interrupt disabled,1: CMPOK register 1 interrupt enabled"
bitfld.long 0x0 2. "ExTTRIGIE,External trigger valid edge Interrupt Enable" "0: ExTTRIG interrupt disabled,1: ExTTRIG interrupt enabled"
newline
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
group.long 0x8++0x13
line.long 0x0 "LPTIM3_DIER_ALTERNATE1,LPTIM3 interrupt enable register"
bitfld.long 0x0 25. "CC2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled.,1: CC2 DMA request enabled"
bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "0: UE DMA request disabled.,1: UE DMA request enabled"
newline
bitfld.long 0x0 16. "CC1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled.,1: CC1 DMA request enabled"
bitfld.long 0x0 13. "CC2OIE,Capture/compare 2 over-capture interrupt enable" "0: CC2 over-capture interrupt disabled,1: CC2 over-capture interrupt enabled"
newline
bitfld.long 0x0 12. "CC1OIE,Capture/compare 1 over-capture interrupt enable" "0: CC1 over-capture interrupt disabled,1: CC1 over-capture interrupt enabled"
bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "0: Capture/compare 2 interrupt disabled,1: Capture/compare 2 interrupt enabled"
newline
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
newline
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
newline
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
bitfld.long 0x0 2. "ExTTRIGIE,External trigger valid edge Interrupt Enable" "0: ExTTRIG interrupt disabled,1: ExTTRIG interrupt enabled"
newline
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
line.long 0x4 "LPTIM3_CFGR,LPTIM configuration register"
bitfld.long 0x4 24. "ENC,Encoder mode enable" "0: Encoder mode disabled,1: Encoder mode enabled"
bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "0: the counter is incremented following each..,1: the counter is incremented following each valid.."
newline
bitfld.long 0x4 22. "PRELOAD,Registers update mode" "0: Registers are updated after each APB bus write..,1: Registers are updated at the end of the current.."
bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "0: The LPTIM output reflects the compare results..,1: The LPTIM output reflects the inverse of the.."
newline
bitfld.long 0x4 20. "WAVE,Waveform shape" "0: Deactivate Set-once mode,1: Activate the Set-once mode"
bitfld.long 0x4 19. "TIMOUT,Timeout enable" "0: A trigger event arriving when the timer is..,1: A trigger event arriving when the timer is.."
newline
bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and polarity" "0: software trigger (counting start is initiated by..,1: rising edge is the active edge,2: falling edge is the active edge,3: both edges are active edges"
bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "0: lptim_ext_trig0,1: lptim_ext_trig1,2: lptim_ext_trig2,3: lptim_ext_trig3,4: lptim_ext_trig4,5: lptim_ext_trig5,6: lptim_ext_trig6,7: lptim_ext_trig7"
newline
bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "0: /1,1: /2,2: /4,3: /8,4: /16,5: /32,6: /64,7: /128"
bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for trigger" "0: any trigger active level change is considered as..,1: trigger active level change must be stable for..,2: trigger active level change must be stable for..,3: trigger active level change must be stable for.."
newline
bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external clock" "0: any external clock signal level change is..,1: external clock signal level change must be..,2: external clock signal level change must be..,3: external clock signal level change must be.."
bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "0: the rising edge is the active edge used for..,1: the falling edge is the active edge used for..,2: both edges are active edges.,3: not allowed"
newline
bitfld.long 0x4 0. "CKSEL,Clock selector" "0: LPTIM is clocked by internal clock source (APB..,1: LPTIM is clocked by an external clock source.."
line.long 0x8 "LPTIM3_CR,LPTIM control register"
bitfld.long 0x8 4. "RSTARE,Reset after read enable" "0,1"
bitfld.long 0x8 3. "COUNTRST,Counter reset" "0,1"
newline
bitfld.long 0x8 2. "CNTSTRT,Timer start in Continuous mode" "0,1"
bitfld.long 0x8 1. "SNGSTRT,LPTIM start in Single mode" "0,1"
newline
bitfld.long 0x8 0. "ENABLE,LPTIM enable" "0: LPTIM is disabled.,1: LPTIM is enabled"
line.long 0xC "LPTIM3_CCR1,LPTIM compare register 1"
hexmask.long.word 0xC 0.--15. 1. "CCR1,Capture/compare 1 value"
line.long 0x10 "LPTIM3_ARR,LPTIM autoreload register"
hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value"
rgroup.long 0x1C++0x3
line.long 0x0 "LPTIM3_CNT,LPTIM counter register"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.long 0x24++0xB
line.long 0x0 "LPTIM3_CFGR2,LPTIM configuration register 2"
bitfld.long 0x0 20.--21. "IC2SEL,LPTIM input capture 2 selection" "0: lptim_ic2_mux0,1: lptim_ic2_mux1,2: lptim_ic2_mux2,3: lptim_ic2_mux3"
bitfld.long 0x0 16.--17. "IC1SEL,LPTIM input capture 1 selection" "0: lptim_ic1_mux0,1: lptim_ic1_mux1,2: lptim_ic1_mux2,3: lptim_ic1_mux3"
newline
bitfld.long 0x0 4.--5. "IN2SEL,LPTIM input 2 selection" "0: lptim_in2_mux0,1: lptim_in2_mux1,2: lptim_in2_mux2,3: lptim_in2_mux3"
bitfld.long 0x0 0.--1. "IN1SEL,LPTIM input 1 selection" "0: lptim_in1_mux0,1: lptim_in1_mux1,2: lptim_in1_mux2,3: lptim_in1_mux3"
line.long 0x4 "LPTIM3_RCR,LPTIM repetition register"
hexmask.long.byte 0x4 0.--7. 1. "REP,Repetition register value"
line.long 0x8 "LPTIM3_CCMR1,LPTIM capture/compare mode register 1"
bitfld.long 0x8 28.--29. "IC2F,Input capture 2 filter" "0: any external input capture signal level change..,1: external input capture signal level change must..,2: external input capture signal level change must..,3: external input capture signal level change must.."
bitfld.long 0x8 24.--25. "IC2PSC,Input capture 2 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
newline
bitfld.long 0x8 18.--19. "CC2P,Capture/compare 2 output polarity." "0: OC2 active high,1: OC2 active low,?,3: both edges circuit is sensitive to both IC2.."
bitfld.long 0x8 17. "CC2E,Capture/compare 2 output enable." "0: Off-OC2 is not active.,1: On-OC2 signal is output on the corresponding.."
newline
bitfld.long 0x8 16. "CC2SEL,Capture/compare 2 selection" "0: CC2 channel is configured in output PWM mode,1: CC2 channel is configured in input capture mode"
bitfld.long 0x8 12.--13. "IC1F,Input capture 1 filter" "0: any external input capture signal level change..,1: external input capture signal level change must..,2: external input capture signal level change must..,3: external input capture signal level change must.."
newline
bitfld.long 0x8 8.--9. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x8 2.--3. "CC1P,Capture/compare 1 output polarity." "0: OC1 active high the LPTIM output reflects the..,1: OC1 active low the LPTIM output reflects the..,?,3: both edges circuit is sensitive to both IC1.."
newline
bitfld.long 0x8 1. "CC1E,Capture/compare 1 output enable." "0: Off-OC1 is not active.,1: On-OC1 signal is output on the corresponding.."
bitfld.long 0x8 0. "CC1SEL,Capture/compare 1 selection" "0: CC1 channel is configured in output PWM mode,1: CC1 channel is configured in input capture mode"
group.long 0x34++0x3
line.long 0x0 "LPTIM3_CCR2,LPTIM compare register 2"
hexmask.long.word 0x0 0.--15. 1. "CCR2,Capture/compare 2 value"
tree.end
tree "LPTIM4"
base ad:0x40044C00
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM4_ISR,LPTIM4 interrupt and status register"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
newline
bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
newline
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
newline
bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1"
bitfld.long 0x0 2. "ExTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM4_ICR,LPTIM4 interrupt clear register"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
newline
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
newline
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
newline
bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1"
bitfld.long 0x0 2. "ExTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
group.long 0x8++0x13
line.long 0x0 "LPTIM4_DIER,LPTIM4 interrupt enable register"
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
newline
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
newline
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "0: CMPOK register 1 interrupt disabled,1: CMPOK register 1 interrupt enabled"
newline
bitfld.long 0x0 2. "ExTTRIGIE,External trigger valid edge Interrupt Enable" "0: ExTTRIG interrupt disabled,1: ExTTRIG interrupt enabled"
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
newline
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
line.long 0x4 "LPTIM4_CFGR,LPTIM configuration register"
bitfld.long 0x4 24. "ENC,Encoder mode enable" "0: Encoder mode disabled,1: Encoder mode enabled"
bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "0: the counter is incremented following each..,1: the counter is incremented following each valid.."
newline
bitfld.long 0x4 22. "PRELOAD,Registers update mode" "0: Registers are updated after each APB bus write..,1: Registers are updated at the end of the current.."
bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "0: The LPTIM output reflects the compare results..,1: The LPTIM output reflects the inverse of the.."
newline
bitfld.long 0x4 20. "WAVE,Waveform shape" "0: Deactivate Set-once mode,1: Activate the Set-once mode"
bitfld.long 0x4 19. "TIMOUT,Timeout enable" "0: A trigger event arriving when the timer is..,1: A trigger event arriving when the timer is.."
newline
bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and polarity" "0: software trigger (counting start is initiated by..,1: rising edge is the active edge,2: falling edge is the active edge,3: both edges are active edges"
bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "0: lptim_ext_trig0,1: lptim_ext_trig1,2: lptim_ext_trig2,3: lptim_ext_trig3,4: lptim_ext_trig4,5: lptim_ext_trig5,6: lptim_ext_trig6,7: lptim_ext_trig7"
newline
bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "0: /1,1: /2,2: /4,3: /8,4: /16,5: /32,6: /64,7: /128"
bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for trigger" "0: any trigger active level change is considered as..,1: trigger active level change must be stable for..,2: trigger active level change must be stable for..,3: trigger active level change must be stable for.."
newline
bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external clock" "0: any external clock signal level change is..,1: external clock signal level change must be..,2: external clock signal level change must be..,3: external clock signal level change must be.."
bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "0: the rising edge is the active edge used for..,1: the falling edge is the active edge used for..,2: both edges are active edges.,3: not allowed"
newline
bitfld.long 0x4 0. "CKSEL,Clock selector" "0: LPTIM is clocked by internal clock source (APB..,1: LPTIM is clocked by an external clock source.."
line.long 0x8 "LPTIM4_CR,LPTIM control register"
bitfld.long 0x8 4. "RSTARE,Reset after read enable" "0,1"
bitfld.long 0x8 3. "COUNTRST,Counter reset" "0,1"
newline
bitfld.long 0x8 2. "CNTSTRT,Timer start in Continuous mode" "0,1"
bitfld.long 0x8 1. "SNGSTRT,LPTIM start in Single mode" "0,1"
newline
bitfld.long 0x8 0. "ENABLE,LPTIM enable" "0: LPTIM is disabled.,1: LPTIM is enabled"
line.long 0xC "LPTIM4_CCR1,LPTIM compare register 1"
hexmask.long.word 0xC 0.--15. 1. "CCR1,Capture/compare 1 value"
line.long 0x10 "LPTIM4_ARR,LPTIM autoreload register"
hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value"
rgroup.long 0x1C++0x3
line.long 0x0 "LPTIM4_CNT,LPTIM counter register"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.long 0x24++0xB
line.long 0x0 "LPTIM4_CFGR2,LPTIM configuration register 2"
bitfld.long 0x0 20.--21. "IC2SEL,LPTIM input capture 2 selection" "0: lptim_ic2_mux0,1: lptim_ic2_mux1,2: lptim_ic2_mux2,3: lptim_ic2_mux3"
bitfld.long 0x0 16.--17. "IC1SEL,LPTIM input capture 1 selection" "0: lptim_ic1_mux0,1: lptim_ic1_mux1,2: lptim_ic1_mux2,3: lptim_ic1_mux3"
newline
bitfld.long 0x0 4.--5. "IN2SEL,LPTIM input 2 selection" "0: lptim_in2_mux0,1: lptim_in2_mux1,2: lptim_in2_mux2,3: lptim_in2_mux3"
bitfld.long 0x0 0.--1. "IN1SEL,LPTIM input 1 selection" "0: lptim_in1_mux0,1: lptim_in1_mux1,2: lptim_in1_mux2,3: lptim_in1_mux3"
line.long 0x4 "LPTIM4_RCR,LPTIM repetition register"
hexmask.long.byte 0x4 0.--7. 1. "REP,Repetition register value"
line.long 0x8 "LPTIM4_CCMR1,LPTIM capture/compare mode register 1"
bitfld.long 0x8 28.--29. "IC2F,Input capture 2 filter" "0: any external input capture signal level change..,1: external input capture signal level change must..,2: external input capture signal level change must..,3: external input capture signal level change must.."
bitfld.long 0x8 24.--25. "IC2PSC,Input capture 2 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
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bitfld.long 0x8 18.--19. "CC2P,Capture/compare 2 output polarity." "0: OC2 active high,1: OC2 active low,?,3: both edges circuit is sensitive to both IC2.."
bitfld.long 0x8 17. "CC2E,Capture/compare 2 output enable." "0: Off-OC2 is not active.,1: On-OC2 signal is output on the corresponding.."
newline
bitfld.long 0x8 16. "CC2SEL,Capture/compare 2 selection" "0: CC2 channel is configured in output PWM mode,1: CC2 channel is configured in input capture mode"
bitfld.long 0x8 12.--13. "IC1F,Input capture 1 filter" "0: any external input capture signal level change..,1: external input capture signal level change must..,2: external input capture signal level change must..,3: external input capture signal level change must.."
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bitfld.long 0x8 8.--9. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x8 2.--3. "CC1P,Capture/compare 1 output polarity." "0: OC1 active high the LPTIM output reflects the..,1: OC1 active low the LPTIM output reflects the..,?,3: both edges circuit is sensitive to both IC1.."
newline
bitfld.long 0x8 1. "CC1E,Capture/compare 1 output enable." "0: Off-OC1 is not active.,1: On-OC1 signal is output on the corresponding.."
bitfld.long 0x8 0. "CC1SEL,Capture/compare 1 selection" "0: CC1 channel is configured in output PWM mode,1: CC1 channel is configured in input capture mode"
group.long 0x34++0x3
line.long 0x0 "LPTIM4_CCR2,LPTIM compare register 2"
hexmask.long.word 0x0 0.--15. 1. "CCR2,Capture/compare 2 value"
tree.end
tree "SEC_LPTIM4"
base ad:0x50044C00
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM4_ISR,LPTIM4 interrupt and status register"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
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bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
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bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
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bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1"
bitfld.long 0x0 2. "ExTTRIG,External trigger edge event" "0,1"
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bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM4_ICR,LPTIM4 interrupt clear register"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
newline
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
newline
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
newline
bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1"
bitfld.long 0x0 2. "ExTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
group.long 0x8++0x13
line.long 0x0 "LPTIM4_DIER,LPTIM4 interrupt enable register"
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
newline
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
newline
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "0: CMPOK register 1 interrupt disabled,1: CMPOK register 1 interrupt enabled"
newline
bitfld.long 0x0 2. "ExTTRIGIE,External trigger valid edge Interrupt Enable" "0: ExTTRIG interrupt disabled,1: ExTTRIG interrupt enabled"
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
newline
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
line.long 0x4 "LPTIM4_CFGR,LPTIM configuration register"
bitfld.long 0x4 24. "ENC,Encoder mode enable" "0: Encoder mode disabled,1: Encoder mode enabled"
bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "0: the counter is incremented following each..,1: the counter is incremented following each valid.."
newline
bitfld.long 0x4 22. "PRELOAD,Registers update mode" "0: Registers are updated after each APB bus write..,1: Registers are updated at the end of the current.."
bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "0: The LPTIM output reflects the compare results..,1: The LPTIM output reflects the inverse of the.."
newline
bitfld.long 0x4 20. "WAVE,Waveform shape" "0: Deactivate Set-once mode,1: Activate the Set-once mode"
bitfld.long 0x4 19. "TIMOUT,Timeout enable" "0: A trigger event arriving when the timer is..,1: A trigger event arriving when the timer is.."
newline
bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and polarity" "0: software trigger (counting start is initiated by..,1: rising edge is the active edge,2: falling edge is the active edge,3: both edges are active edges"
bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "0: lptim_ext_trig0,1: lptim_ext_trig1,2: lptim_ext_trig2,3: lptim_ext_trig3,4: lptim_ext_trig4,5: lptim_ext_trig5,6: lptim_ext_trig6,7: lptim_ext_trig7"
newline
bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "0: /1,1: /2,2: /4,3: /8,4: /16,5: /32,6: /64,7: /128"
bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for trigger" "0: any trigger active level change is considered as..,1: trigger active level change must be stable for..,2: trigger active level change must be stable for..,3: trigger active level change must be stable for.."
newline
bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external clock" "0: any external clock signal level change is..,1: external clock signal level change must be..,2: external clock signal level change must be..,3: external clock signal level change must be.."
bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "0: the rising edge is the active edge used for..,1: the falling edge is the active edge used for..,2: both edges are active edges.,3: not allowed"
newline
bitfld.long 0x4 0. "CKSEL,Clock selector" "0: LPTIM is clocked by internal clock source (APB..,1: LPTIM is clocked by an external clock source.."
line.long 0x8 "LPTIM4_CR,LPTIM control register"
bitfld.long 0x8 4. "RSTARE,Reset after read enable" "0,1"
bitfld.long 0x8 3. "COUNTRST,Counter reset" "0,1"
newline
bitfld.long 0x8 2. "CNTSTRT,Timer start in Continuous mode" "0,1"
bitfld.long 0x8 1. "SNGSTRT,LPTIM start in Single mode" "0,1"
newline
bitfld.long 0x8 0. "ENABLE,LPTIM enable" "0: LPTIM is disabled.,1: LPTIM is enabled"
line.long 0xC "LPTIM4_CCR1,LPTIM compare register 1"
hexmask.long.word 0xC 0.--15. 1. "CCR1,Capture/compare 1 value"
line.long 0x10 "LPTIM4_ARR,LPTIM autoreload register"
hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value"
rgroup.long 0x1C++0x3
line.long 0x0 "LPTIM4_CNT,LPTIM counter register"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.long 0x24++0xB
line.long 0x0 "LPTIM4_CFGR2,LPTIM configuration register 2"
bitfld.long 0x0 20.--21. "IC2SEL,LPTIM input capture 2 selection" "0: lptim_ic2_mux0,1: lptim_ic2_mux1,2: lptim_ic2_mux2,3: lptim_ic2_mux3"
bitfld.long 0x0 16.--17. "IC1SEL,LPTIM input capture 1 selection" "0: lptim_ic1_mux0,1: lptim_ic1_mux1,2: lptim_ic1_mux2,3: lptim_ic1_mux3"
newline
bitfld.long 0x0 4.--5. "IN2SEL,LPTIM input 2 selection" "0: lptim_in2_mux0,1: lptim_in2_mux1,2: lptim_in2_mux2,3: lptim_in2_mux3"
bitfld.long 0x0 0.--1. "IN1SEL,LPTIM input 1 selection" "0: lptim_in1_mux0,1: lptim_in1_mux1,2: lptim_in1_mux2,3: lptim_in1_mux3"
line.long 0x4 "LPTIM4_RCR,LPTIM repetition register"
hexmask.long.byte 0x4 0.--7. 1. "REP,Repetition register value"
line.long 0x8 "LPTIM4_CCMR1,LPTIM capture/compare mode register 1"
bitfld.long 0x8 28.--29. "IC2F,Input capture 2 filter" "0: any external input capture signal level change..,1: external input capture signal level change must..,2: external input capture signal level change must..,3: external input capture signal level change must.."
bitfld.long 0x8 24.--25. "IC2PSC,Input capture 2 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
newline
bitfld.long 0x8 18.--19. "CC2P,Capture/compare 2 output polarity." "0: OC2 active high,1: OC2 active low,?,3: both edges circuit is sensitive to both IC2.."
bitfld.long 0x8 17. "CC2E,Capture/compare 2 output enable." "0: Off-OC2 is not active.,1: On-OC2 signal is output on the corresponding.."
newline
bitfld.long 0x8 16. "CC2SEL,Capture/compare 2 selection" "0: CC2 channel is configured in output PWM mode,1: CC2 channel is configured in input capture mode"
bitfld.long 0x8 12.--13. "IC1F,Input capture 1 filter" "0: any external input capture signal level change..,1: external input capture signal level change must..,2: external input capture signal level change must..,3: external input capture signal level change must.."
newline
bitfld.long 0x8 8.--9. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x8 2.--3. "CC1P,Capture/compare 1 output polarity." "0: OC1 active high the LPTIM output reflects the..,1: OC1 active low the LPTIM output reflects the..,?,3: both edges circuit is sensitive to both IC1.."
newline
bitfld.long 0x8 1. "CC1E,Capture/compare 1 output enable." "0: Off-OC1 is not active.,1: On-OC1 signal is output on the corresponding.."
bitfld.long 0x8 0. "CC1SEL,Capture/compare 1 selection" "0: CC1 channel is configured in output PWM mode,1: CC1 channel is configured in input capture mode"
group.long 0x34++0x3
line.long 0x0 "LPTIM4_CCR2,LPTIM compare register 2"
hexmask.long.word 0x0 0.--15. 1. "CCR2,Capture/compare 2 value"
tree.end
tree.end
tree "LPUART (Low-power Universal Asynchronous Receiver Transmitter)"
base ad:0x0
tree "LPUART"
base ad:0x40042400
group.long 0x0++0x3
line.long 0x0 "LPUART_CR1,LPUART control register 1"
bitfld.long 0x0 31. "RxFFIE,RxFIFO Full interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when RxFF=1 in.."
bitfld.long 0x0 30. "TxFEIE,TxFIFO empty interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when TxFE=1 in.."
newline
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when the CMF bit.."
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between mute mode and active.."
newline
bitfld.long 0x0 12. "M0,Word length" "0,1"
bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "0: Idle line,1: Address mark"
newline
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
newline
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever PE=1.."
bitfld.long 0x0 7. "TxFNFIE,TxFIFO not full interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever TxFNF.."
newline
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever TC=1.."
bitfld.long 0x0 5. "RxFNEIE,RxFIFO not empty interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever ORE=1.."
newline
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever IDLE=1.."
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
newline
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
bitfld.long 0x0 1. "UESM,LPUART enable in low-power mode" "0: LPUART not functional in low-power mode.,1: LPUART functional in low-power mode."
newline
bitfld.long 0x0 0. "UE,LPUART enable" "0: LPUART prescaler and outputs disabled low-power..,1: LPUART enabled"
group.long 0x0++0xB
line.long 0x0 "LPUART_CR1_ALTERNATE1,LPUART control register 1"
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when the CMF bit.."
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between mute mode and active.."
newline
bitfld.long 0x0 12. "M0,Word length" "0,1"
bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "0: Idle line,1: Address mark"
newline
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
newline
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever PE=1.."
bitfld.long 0x0 7. "TxEIE,Transmit data register empty" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever TxE =1.."
newline
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever TC=1.."
bitfld.long 0x0 5. "RxNEIE,Receive data register not empty" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever ORE=1.."
newline
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever IDLE=1.."
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
newline
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
bitfld.long 0x0 1. "UESM,LPUART enable in low-power mode" "0: LPUART not functional in low-power mode.,1: LPUART functional in low-power mode."
newline
bitfld.long 0x0 0. "UE,LPUART enable" "0: LPUART prescaler and outputs disabled low-power..,1: LPUART enabled"
line.long 0x4 "LPUART_CR2,LPUART control register 2"
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the LPUART node"
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
newline
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
bitfld.long 0x4 17. "TxINV,Tx pin active level inversion" "0: Tx pin signal works using the standard logic..,1: Tx pin signal values are inverted."
newline
bitfld.long 0x4 16. "RxINV,Rx pin active level inversion" "0: Rx pin signal works using the standard logic..,1: Rx pin signal values are inverted."
bitfld.long 0x4 15. "SWAP,Swap Tx/Rx pins" "0: Tx/Rx pins are used as defined in standard pinout,1: The Tx and Rx pins functions are swapped."
newline
bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,?,2: 2 stop bits,?"
bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
line.long 0x8 "LPUART_CR3,LPUART control register 3"
bitfld.long 0x8 29.--31. "TxFTCFG,TxFIFO threshold configuration" "0: TxFIFO reaches 1/8 of its depth.,1: TxFIFO reaches 1/4 of its depth.,?,3: TxFIFO reaches 3/4 of its depth.,4: TxFIFO reaches 7/8 of its depth.,5: TxFIFO becomes empty.,6: TxFIFO reaches 1/2 of its depth.,?"
bitfld.long 0x8 28. "RxFTIE,RxFIFO threshold interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when Receive.."
newline
bitfld.long 0x8 25.--27. "RxFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth.,1: Receive FIFO reaches 1/4 of its depth.,?,3: Receive FIFO reaches 3/4 of its depth.,4: Receive FIFO reaches 7/8 of its depth.,5: Receive FIFO becomes full.,6: Receive FIFO reaches 1/2 of its depth.,?"
bitfld.long 0x8 23. "TxFTIE,TxFIFO threshold interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when TxFIFO.."
newline
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled."
newline
bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error."
bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled."
newline
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.."
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
newline
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
newline
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
newline
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated when FE=1 or ORE=1 or.."
group.long 0x8++0x7
line.long 0x0 "LPUART_CR3_ALTERNATE1,LPUART control register 3"
bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x0 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled."
newline
bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error."
bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled."
newline
bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.."
bitfld.long 0x0 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
newline
bitfld.long 0x0 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
newline
bitfld.long 0x0 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
newline
bitfld.long 0x0 0. "EIE,Error interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated when FE=1 or ORE=1 or.."
line.long 0x4 "LPUART_BRR,LPUART baud rate register"
hexmask.long.tbyte 0x4 0.--19. 1. "BRR,LPUART baud rate division (LPUARTDIV)"
wgroup.long 0x18++0x3
line.long 0x0 "LPUART_RQR,LPUART request register"
bitfld.long 0x0 4. "TxFRQ,Transmit data flush request" "0,1"
bitfld.long 0x0 3. "RxFRQ,Receive data flush request" "0,1"
newline
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
rgroup.long 0x1C++0x3
line.long 0x0 "LPUART_ISR,LPUART interrupt and status register"
bitfld.long 0x0 27. "TxFT,TxFIFO threshold flag" "0: TxFIFO does not reach the programmed threshold.,1: TxFIFO reached the programmed threshold."
bitfld.long 0x0 26. "RxFT,RxFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
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bitfld.long 0x0 24. "RxFF,RxFIFO Full" "0: RxFIFO is not Full.,1: RxFIFO is Full."
bitfld.long 0x0 23. "TxFE,TxFIFO Empty" "0: TxFIFO is not empty.,1: TxFIFO is empty."
newline
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
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bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "0: Receiver in active mode,1: Receiver in mute mode"
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
newline
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
bitfld.long 0x0 16. "BUSY,Busy flag" "0: LPUART is idle (no reception),1: reception ongoing"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
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bitfld.long 0x0 7. "TxFNF,TxFIFO not full" "0: Data register is full/Transmit FIFO is full.,1: Data register/Transmit FIFO is not full."
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
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bitfld.long 0x0 5. "RxFNE,RxFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
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bitfld.long 0x0 3. "ORE,Overrun error" "?,1: Overrun error is detected"
bitfld.long 0x0 2. "NE,Start bit noise detection flag" "0: No noise is detected,1: Noise is detected"
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bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
rgroup.long 0x1C++0x3
line.long 0x0 "LPUART_ISR_ALTERNATE1,LPUART interrupt and status register"
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
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bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "0: Receiver in active mode,1: Receiver in mute mode"
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
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bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
bitfld.long 0x0 16. "BUSY,Busy flag" "0: LPUART is idle (no reception),1: Reception ongoing"
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bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
newline
bitfld.long 0x0 7. "TxE,Transmit data register empty" "0: Data register full,1: Data register empty"
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
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bitfld.long 0x0 5. "RxNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
newline
bitfld.long 0x0 3. "ORE,Overrun error" "?,1: Overrun error is detected"
bitfld.long 0x0 2. "NE,Start bit noise detection flag" "0: No noise is detected,1: Noise is detected"
newline
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
wgroup.long 0x20++0x3
line.long 0x0 "LPUART_ICR,LPUART interrupt flag clear register"
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
newline
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
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bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
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bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "LPUART_RDR,LPUART receive data register"
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
group.long 0x28++0xB
line.long 0x0 "LPUART_TDR,LPUART transmit data register"
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
line.long 0x4 "LPUART_PRESC,LPUART prescaler register"
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
line.long 0x8 "LPUART_AUTOCR,LPUART autonomous mode control register"
hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits"
bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "0: Idle frame sent after enabling the transmitter..,1: Idle frame not sent after enabling the transmitter"
newline
bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.word 0x8 0.--15. 1. "TDN,TDC transmission data number"
tree.end
tree "SEC_LPUART"
base ad:0x50042400
group.long 0x0++0x3
line.long 0x0 "LPUART_CR1,LPUART control register 1"
bitfld.long 0x0 31. "RxFFIE,RxFIFO Full interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when RxFF=1 in.."
bitfld.long 0x0 30. "TxFEIE,TxFIFO empty interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when TxFE=1 in.."
newline
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when the CMF bit.."
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between mute mode and active.."
newline
bitfld.long 0x0 12. "M0,Word length" "0,1"
bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "0: Idle line,1: Address mark"
newline
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
newline
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever PE=1.."
bitfld.long 0x0 7. "TxFNFIE,TxFIFO not full interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever TxFNF.."
newline
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever TC=1.."
bitfld.long 0x0 5. "RxFNEIE,RxFIFO not empty interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever ORE=1.."
newline
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever IDLE=1.."
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
newline
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
bitfld.long 0x0 1. "UESM,LPUART enable in low-power mode" "0: LPUART not functional in low-power mode.,1: LPUART functional in low-power mode."
newline
bitfld.long 0x0 0. "UE,LPUART enable" "0: LPUART prescaler and outputs disabled low-power..,1: LPUART enabled"
group.long 0x0++0xB
line.long 0x0 "LPUART_CR1_ALTERNATE1,LPUART control register 1"
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when the CMF bit.."
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between mute mode and active.."
newline
bitfld.long 0x0 12. "M0,Word length" "0,1"
bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "0: Idle line,1: Address mark"
newline
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
newline
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever PE=1.."
bitfld.long 0x0 7. "TxEIE,Transmit data register empty" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever TxE =1.."
newline
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever TC=1.."
bitfld.long 0x0 5. "RxNEIE,Receive data register not empty" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever ORE=1.."
newline
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever IDLE=1.."
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
newline
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
bitfld.long 0x0 1. "UESM,LPUART enable in low-power mode" "0: LPUART not functional in low-power mode.,1: LPUART functional in low-power mode."
newline
bitfld.long 0x0 0. "UE,LPUART enable" "0: LPUART prescaler and outputs disabled low-power..,1: LPUART enabled"
line.long 0x4 "LPUART_CR2,LPUART control register 2"
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the LPUART node"
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
newline
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
bitfld.long 0x4 17. "TxINV,Tx pin active level inversion" "0: Tx pin signal works using the standard logic..,1: Tx pin signal values are inverted."
newline
bitfld.long 0x4 16. "RxINV,Rx pin active level inversion" "0: Rx pin signal works using the standard logic..,1: Rx pin signal values are inverted."
bitfld.long 0x4 15. "SWAP,Swap Tx/Rx pins" "0: Tx/Rx pins are used as defined in standard pinout,1: The Tx and Rx pins functions are swapped."
newline
bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,?,2: 2 stop bits,?"
bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
line.long 0x8 "LPUART_CR3,LPUART control register 3"
bitfld.long 0x8 29.--31. "TxFTCFG,TxFIFO threshold configuration" "0: TxFIFO reaches 1/8 of its depth.,1: TxFIFO reaches 1/4 of its depth.,?,3: TxFIFO reaches 3/4 of its depth.,4: TxFIFO reaches 7/8 of its depth.,5: TxFIFO becomes empty.,6: TxFIFO reaches 1/2 of its depth.,?"
bitfld.long 0x8 28. "RxFTIE,RxFIFO threshold interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when Receive.."
newline
bitfld.long 0x8 25.--27. "RxFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth.,1: Receive FIFO reaches 1/4 of its depth.,?,3: Receive FIFO reaches 3/4 of its depth.,4: Receive FIFO reaches 7/8 of its depth.,5: Receive FIFO becomes full.,6: Receive FIFO reaches 1/2 of its depth.,?"
bitfld.long 0x8 23. "TxFTIE,TxFIFO threshold interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when TxFIFO.."
newline
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled."
newline
bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error."
bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled."
newline
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.."
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
newline
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
newline
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
newline
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated when FE=1 or ORE=1 or.."
group.long 0x8++0x7
line.long 0x0 "LPUART_CR3_ALTERNATE1,LPUART control register 3"
bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x0 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled."
newline
bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error."
bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled."
newline
bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.."
bitfld.long 0x0 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
newline
bitfld.long 0x0 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
newline
bitfld.long 0x0 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
newline
bitfld.long 0x0 0. "EIE,Error interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated when FE=1 or ORE=1 or.."
line.long 0x4 "LPUART_BRR,LPUART baud rate register"
hexmask.long.tbyte 0x4 0.--19. 1. "BRR,LPUART baud rate division (LPUARTDIV)"
wgroup.long 0x18++0x3
line.long 0x0 "LPUART_RQR,LPUART request register"
bitfld.long 0x0 4. "TxFRQ,Transmit data flush request" "0,1"
bitfld.long 0x0 3. "RxFRQ,Receive data flush request" "0,1"
newline
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
rgroup.long 0x1C++0x3
line.long 0x0 "LPUART_ISR,LPUART interrupt and status register"
bitfld.long 0x0 27. "TxFT,TxFIFO threshold flag" "0: TxFIFO does not reach the programmed threshold.,1: TxFIFO reached the programmed threshold."
bitfld.long 0x0 26. "RxFT,RxFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
newline
bitfld.long 0x0 24. "RxFF,RxFIFO Full" "0: RxFIFO is not Full.,1: RxFIFO is Full."
bitfld.long 0x0 23. "TxFE,TxFIFO Empty" "0: TxFIFO is not empty.,1: TxFIFO is empty."
newline
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
newline
bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "0: Receiver in active mode,1: Receiver in mute mode"
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
newline
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
bitfld.long 0x0 16. "BUSY,Busy flag" "0: LPUART is idle (no reception),1: reception ongoing"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
newline
bitfld.long 0x0 7. "TxFNF,TxFIFO not full" "0: Data register is full/Transmit FIFO is full.,1: Data register/Transmit FIFO is not full."
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
newline
bitfld.long 0x0 5. "RxFNE,RxFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
newline
bitfld.long 0x0 3. "ORE,Overrun error" "?,1: Overrun error is detected"
bitfld.long 0x0 2. "NE,Start bit noise detection flag" "0: No noise is detected,1: Noise is detected"
newline
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
rgroup.long 0x1C++0x3
line.long 0x0 "LPUART_ISR_ALTERNATE1,LPUART interrupt and status register"
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
newline
bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "0: Receiver in active mode,1: Receiver in mute mode"
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
newline
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
bitfld.long 0x0 16. "BUSY,Busy flag" "0: LPUART is idle (no reception),1: Reception ongoing"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
newline
bitfld.long 0x0 7. "TxE,Transmit data register empty" "0: Data register full,1: Data register empty"
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
newline
bitfld.long 0x0 5. "RxNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
newline
bitfld.long 0x0 3. "ORE,Overrun error" "?,1: Overrun error is detected"
bitfld.long 0x0 2. "NE,Start bit noise detection flag" "0: No noise is detected,1: Noise is detected"
newline
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
wgroup.long 0x20++0x3
line.long 0x0 "LPUART_ICR,LPUART interrupt flag clear register"
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
newline
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
newline
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
newline
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "LPUART_RDR,LPUART receive data register"
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
group.long 0x28++0xB
line.long 0x0 "LPUART_TDR,LPUART transmit data register"
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
line.long 0x4 "LPUART_PRESC,LPUART prescaler register"
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
line.long 0x8 "LPUART_AUTOCR,LPUART autonomous mode control register"
hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits"
bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "0: Idle frame sent after enabling the transmitter..,1: Idle frame not sent after enabling the transmitter"
newline
bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.word 0x8 0.--15. 1. "TDN,TDC transmission data number"
tree.end
tree.end
tree "OCTOSPI (Octo-SPI Interface)"
base ad:0x0
tree "OCTOSPI"
base ad:0x420D1400
group.long 0x0++0x3
line.long 0x0 "OCTOSPI_CR,OCTOSPI control register"
bitfld.long 0x0 28.--29. "FMODE,Functional mode" "0: Indirect-write mode,1: Indirect-read mode,2: Automatic status-polling mode (relevant in..,3: Memory-mapped mode"
bitfld.long 0x0 23. "PMM,Polling match mode" "0: AND-match mode SMF is set if all the unmasked..,1: OR-match mode SMF is set if any of the unmasked.."
newline
bitfld.long 0x0 22. "APMS,Automatic status-polling mode stop" "0: Automatic status-polling mode is stopped only by..,1: Automatic status-polling mode stops as soon as.."
bitfld.long 0x0 20. "TOIE,Timeout interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x0 19. "SMIE,Status-match interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x0 18. "FTIE,FIFO threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x0 17. "TCIE,Transfer complete interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x0 16. "TEIE,Transfer error interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
newline
hexmask.long.byte 0x0 8.--12. 1. "FTHRES,FIFO threshold level"
bitfld.long 0x0 7. "MSEL,External memory select" "0: External memory 1 selected (data exchanged over..,1: External memory 2 selected (data exchanged over.."
newline
bitfld.long 0x0 6. "DMM,Dual-memory configuration" "0: Dual-memory configuration disabled,1: Dual-memory configuration enabled"
bitfld.long 0x0 3. "TCEN,Timeout counter enable" "0: The timeout counter is disabled and thus the..,1: The timeout counter is enabled and thus the.."
newline
bitfld.long 0x0 2. "DMAEN,DMA enable" "0: DMA disabled for indirect mode,1: DMA enabled for indirect mode"
bitfld.long 0x0 1. "ABORT,Abort request" "0: No abort requested,1: Abort requested"
newline
bitfld.long 0x0 0. "EN,Enable" "0: OCTOSPI disabled,1: OCTOSPI enabled"
group.long 0x8++0xF
line.long 0x0 "OCTOSPI_DCR1,OCTOSPI device configuration register 1"
bitfld.long 0x0 24.--26. "MTYP,Memory type" "0: Micron mode D0/D1 ordering in DTR 8-data-bit mode.,1: Macronix mode D1/D0 ordering in DTR 8-data-bit..,2: Standard mode,3: Macronix RAM mode D1/D0 ordering in DTR..,4: HyperBus memory mode the protocol follows the..,5: HyperBus register mode addressing register space.,?,?"
hexmask.long.byte 0x0 16.--20. 1. "DEVSIZE,Device size"
newline
hexmask.long.byte 0x0 8.--13. 1. "CSHT,Chip-select high time"
bitfld.long 0x0 3. "DLYBYP,Delay block bypass" "0: The internal sampling clock (called feedback..,1: The delay block is bypassed so the internal.."
newline
bitfld.long 0x0 1. "FRCK,Free running clock" "0: CLK is not free running.,1: CLK is free running (always provided)."
bitfld.long 0x0 0. "CKMODE,Clock mode 0/mode 3" "0: CLK must stay low while NCS is high (chip-select..,1: CLK must stay high while NCS is high.."
line.long 0x4 "OCTOSPI_DCR2,OCTOSPI device configuration register 2"
bitfld.long 0x4 16.--18. "WRAPSIZE,Wrap size" "0: Wrapped reads are not supported by the memory.,?,2: External memory supports wrap size of 16 bytes.,3: External memory supports wrap size of 32 bytes.,4: External memory supports wrap size of 64 bytes.,5: External memory supports wrap size of 128 bytes.,?,?"
hexmask.long.byte 0x4 0.--7. 1. "PRESCALER,Clock prescaler"
line.long 0x8 "OCTOSPI_DCR3,OCTOSPI device configuration register 3"
hexmask.long.byte 0x8 16.--20. 1. "CSBOUND,NCS boundary"
line.long 0xC "OCTOSPI_DCR4,OCTOSPI device configuration register 4"
hexmask.long 0xC 0.--31. 1. "REFRESH,Refresh rate"
rgroup.long 0x20++0x3
line.long 0x0 "OCTOSPI_SR,OCTOSPI status register"
hexmask.long.byte 0x0 8.--13. 1. "FLEVEL,FIFO level"
bitfld.long 0x0 5. "BUSY,Busy" "0,1"
newline
bitfld.long 0x0 4. "TOF,Timeout flag" "0,1"
bitfld.long 0x0 3. "SMF,Status match flag" "0,1"
newline
bitfld.long 0x0 2. "FTF,FIFO threshold flag" "0,1"
bitfld.long 0x0 1. "TCF,Transfer complete flag" "0,1"
newline
bitfld.long 0x0 0. "TEF,Transfer error flag" "0,1"
wgroup.long 0x24++0x3
line.long 0x0 "OCTOSPI_FCR,OCTOSPI flag clear register"
bitfld.long 0x0 4. "CTOF,Clear timeout flag" "0,1"
bitfld.long 0x0 3. "CSMF,Clear status match flag" "0,1"
newline
bitfld.long 0x0 1. "CTCF,Clear transfer complete flag" "0,1"
bitfld.long 0x0 0. "CTEF,Clear transfer error flag" "0,1"
group.long 0x40++0x3
line.long 0x0 "OCTOSPI_DLR,OCTOSPI data length register"
hexmask.long 0x0 0.--31. 1. "DL,Data length"
group.long 0x48++0x3
line.long 0x0 "OCTOSPI_AR,OCTOSPI address register"
hexmask.long 0x0 0.--31. 1. "ADDRESS,Address"
group.long 0x50++0x3
line.long 0x0 "OCTOSPI_DR,OCTOSPI data register"
hexmask.long 0x0 0.--31. 1. "DATA,Data"
group.long 0x80++0x3
line.long 0x0 "OCTOSPI_PSMKR,OCTOSPI polling status mask register"
hexmask.long 0x0 0.--31. 1. "MASK,Status mask"
group.long 0x88++0x3
line.long 0x0 "OCTOSPI_PSMAR,OCTOSPI polling status match register"
hexmask.long 0x0 0.--31. 1. "MATCH,Status match"
group.long 0x90++0x3
line.long 0x0 "OCTOSPI_PIR,OCTOSPI polling interval register"
hexmask.long.word 0x0 0.--15. 1. "INTERVAL,Polling interval"
group.long 0x100++0x3
line.long 0x0 "OCTOSPI_CCR,OCTOSPI communication configuration register"
bitfld.long 0x0 31. "SIOO,Send instruction only once mode" "0: Send instruction on every transaction,1: Send instruction only for the first command"
bitfld.long 0x0 29. "DQSE,DQS enable" "0: DQS disabled,1: DQS enabled"
newline
bitfld.long 0x0 27. "DDTR,Data double transfer rate" "0: DTR mode disabled for data phase,1: DTR mode enabled for data phase"
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0: No data,1: Data on a single line,2: Data on two lines,3: Data on four lines,4: Data on eight lines,?,?,?"
newline
bitfld.long 0x0 20.--21. "ABSIZE,Alternate-byte size" "0: 8-bit alternate bytes,1: 16-bit alternate bytes,2: 24-bit alternate bytes,3: 32-bit alternate bytes"
bitfld.long 0x0 19. "ABDTR,Alternate- byte double transfer rate" "0: DTR mode disabled for the alternate-byte phase,1: DTR mode enabled for the alternate-byte phase"
newline
bitfld.long 0x0 16.--18. "ABMODE,Alternate-byte mode" "0: No alternate bytes,1: Alternate bytes on a single line,2: Alternate bytes on two lines,3: Alternate bytes on four lines,4: Alternate bytes on eight lines,?,?,?"
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0: 8-bit address,1: 16-bit address,2: 24-bit address,3: 32-bit address"
newline
bitfld.long 0x0 11. "ADDTR,Address double transfer rate" "0: DTR mode disabled for the address phase,1: DTR mode enabled for the address phase"
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0: No address,1: Address on a single line,2: Address on two lines,3: Address on four lines,4: Address on eight lines,?,?,?"
newline
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0: 8-bit instruction,1: 16-bit instruction,2: 24-bit instruction,3: 32-bit instruction"
bitfld.long 0x0 3. "IDTR,Instruction double transfer rate" "0: DTR mode disabled for the instruction phase,1: DTR mode enabled for the instruction phase"
newline
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0: No instruction,1: Instruction on a single line,2: Instruction on two lines,3: Instruction on four lines,4: Instruction on eight lines,?,?,?"
group.long 0x108++0x3
line.long 0x0 "OCTOSPI_TCR,OCTOSPI timing configuration register"
bitfld.long 0x0 30. "SSHIFT,Sample shift" "0: No shift,1: 1/2 cycle shift"
bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "0: No delay hold,1: 1/4 cycle hold"
newline
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
group.long 0x110++0x3
line.long 0x0 "OCTOSPI_IR,OCTOSPI instruction register"
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,Instruction"
group.long 0x120++0x3
line.long 0x0 "OCTOSPI_ABR,OCTOSPI alternate bytes register"
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
group.long 0x130++0x3
line.long 0x0 "OCTOSPI_LPTR,OCTOSPI low-power timeout register"
hexmask.long.word 0x0 0.--15. 1. "TIMEOUT,Timeout period"
group.long 0x140++0x3
line.long 0x0 "OCTOSPI_WPCCR,OCTOSPI wrap communication configuration register"
bitfld.long 0x0 29. "DQSE,DQS enable" "0: DQS disabled,1: DQS enabled"
bitfld.long 0x0 27. "DDTR,Data double transfer rate" "0: DTR mode disabled for the data phase,1: DTR mode enabled for the data phase"
newline
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0: No data,1: Data on a single line,2: Data on two lines,3: Data on four lines,4: Data on eight lines,?,?,?"
bitfld.long 0x0 20.--21. "ABSIZE,Alternate-byte size" "0: 8-bit alternate bytes,1: 16-bit alternate bytes,2: 24-bit alternate bytes,3: 32-bit alternate bytes"
newline
bitfld.long 0x0 19. "ABDTR,Alternate-byte double transfer rate" "0: DTR mode disabled for the alternate-byte phase,1: DTR mode enabled for the alternate-byte phase"
bitfld.long 0x0 16.--18. "ABMODE,Alternate-byte mode" "0: no alternate bytes,1: alternate bytes on a single line,2: alternate bytes on two lines,3: alternate bytes on four lines,4: alternate bytes on eight lines,?,?,?"
newline
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0: 8-bit address,1: 16-bit address,2: 24-bit address,3: 32-bit address"
bitfld.long 0x0 11. "ADDTR,Address double transfer rate" "0: DTR mode disabled for address phase,1: DTR mode enabled for address phase"
newline
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0: No address,1: Address on a single line,2: Address on two lines,3: Address on four lines,4: Address on eight lines,?,?,?"
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0: 8-bit instruction,1: 16-bit instruction,2: 24-bit instruction,3: 32-bit instruction"
newline
bitfld.long 0x0 3. "IDTR,Instruction double transfer rate" "0: DTR mode disabled for the instruction phase,1: DTR mode enabled for the instruction phase"
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0: No instruction,1: Instruction on a single line,2: Instruction on two lines,3: Instruction on four lines,4: Instruction on eight lines,?,?,?"
group.long 0x148++0x3
line.long 0x0 "OCTOSPI_WPTCR,OCTOSPI wrap timing configuration register"
bitfld.long 0x0 30. "SSHIFT,Sample shift" "0: No shift,1: 1/2 cycle shift"
bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "0: No quarter cycle delay,1: 1/4 cycle delay inserted"
newline
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
group.long 0x150++0x3
line.long 0x0 "OCTOSPI_WPIR,OCTOSPI wrap instruction register"
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,Instruction"
group.long 0x160++0x3
line.long 0x0 "OCTOSPI_WPABR,OCTOSPI wrap alternate bytes register"
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
group.long 0x180++0x3
line.long 0x0 "OCTOSPI_WCCR,OCTOSPI write communication configuration register"
bitfld.long 0x0 29. "DQSE,DQS enable" "0: DQS disabled,1: DQS enabled"
bitfld.long 0x0 27. "DDTR,data double transfer rate" "0: DTR mode disabled for the data phase,1: DTR mode enabled for the data phase"
newline
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0: No data,1: Data on a single line,2: Data on two lines,3: Data on four lines,4: Data on eight lines,?,?,?"
bitfld.long 0x0 20.--21. "ABSIZE,Alternate-byte size" "0: 8-bit alternate bytes,1: 16-bit alternate bytes,2: 24-bit alternate bytes,3: 32-bit alternate bytes"
newline
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer rate" "0: DTR mode disabled for alternate-bytes phase,1: DTR mode enabled for alternate-bytes phase"
bitfld.long 0x0 16.--18. "ABMODE,Alternate-byte mode" "0: No alternate bytes,1: Alternate bytes on a single line,2: Alternate bytes on two lines,3: Alternate bytes on four lines,4: Alternate bytes on eight lines,?,?,?"
newline
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0: 8-bit address,1: 16-bit address,2: 24-bit address,3: 32-bit address"
bitfld.long 0x0 11. "ADDTR,Address double transfer rate" "0: DTR mode disabled for the address phase,1: DTR mode enabled for the address phase"
newline
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0: No address,1: Address on a single line,2: Address on two lines,3: Address on four lines,4: Address on eight lines,?,?,?"
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0: 8-bit instruction,1: 16-bit instruction,2: 24-bit instruction,3: 32-bit instruction"
newline
bitfld.long 0x0 3. "IDTR,Instruction double transfer rate" "0: DTR mode disabled for instruction phase,1: DTR mode enabled for instruction phase"
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0: No instruction,1: Instruction on a single line,2: Instruction on two lines,3: Instruction on four lines,4: Instruction on eight lines,?,?,?"
group.long 0x188++0x3
line.long 0x0 "OCTOSPI_WTCR,OCTOSPI write timing configuration register"
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
group.long 0x190++0x3
line.long 0x0 "OCTOSPI_WIR,OCTOSPI write instruction register"
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,Instruction"
group.long 0x1A0++0x3
line.long 0x0 "OCTOSPI_WABR,OCTOSPI write alternate bytes register"
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
group.long 0x200++0x3
line.long 0x0 "OCTOSPI_HLCR,OCTOSPI HyperBus latency configuration register"
hexmask.long.byte 0x0 16.--23. 1. "TRWR,Read-write minimum recovery time"
hexmask.long.byte 0x0 8.--15. 1. "TACC,Access time"
newline
bitfld.long 0x0 1. "WZL,Write zero latency" "0: Latency on write accesses,1: No latency on write accesses"
bitfld.long 0x0 0. "LM,Latency mode" "0: Variable initial latency,1: Fixed latency"
tree.end
tree "SEC_OCTOSPI"
base ad:0x520D1400
group.long 0x0++0x3
line.long 0x0 "OCTOSPI_CR,OCTOSPI control register"
bitfld.long 0x0 28.--29. "FMODE,Functional mode" "0: Indirect-write mode,1: Indirect-read mode,2: Automatic status-polling mode (relevant in..,3: Memory-mapped mode"
bitfld.long 0x0 23. "PMM,Polling match mode" "0: AND-match mode SMF is set if all the unmasked..,1: OR-match mode SMF is set if any of the unmasked.."
newline
bitfld.long 0x0 22. "APMS,Automatic status-polling mode stop" "0: Automatic status-polling mode is stopped only by..,1: Automatic status-polling mode stops as soon as.."
bitfld.long 0x0 20. "TOIE,Timeout interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x0 19. "SMIE,Status-match interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x0 18. "FTIE,FIFO threshold interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x0 17. "TCIE,Transfer complete interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x0 16. "TEIE,Transfer error interrupt enable" "0: Interrupt disabled,1: Interrupt enabled"
newline
hexmask.long.byte 0x0 8.--12. 1. "FTHRES,FIFO threshold level"
bitfld.long 0x0 7. "MSEL,External memory select" "0: External memory 1 selected (data exchanged over..,1: External memory 2 selected (data exchanged over.."
newline
bitfld.long 0x0 6. "DMM,Dual-memory configuration" "0: Dual-memory configuration disabled,1: Dual-memory configuration enabled"
bitfld.long 0x0 3. "TCEN,Timeout counter enable" "0: The timeout counter is disabled and thus the..,1: The timeout counter is enabled and thus the.."
newline
bitfld.long 0x0 2. "DMAEN,DMA enable" "0: DMA disabled for indirect mode,1: DMA enabled for indirect mode"
bitfld.long 0x0 1. "ABORT,Abort request" "0: No abort requested,1: Abort requested"
newline
bitfld.long 0x0 0. "EN,Enable" "0: OCTOSPI disabled,1: OCTOSPI enabled"
group.long 0x8++0xF
line.long 0x0 "OCTOSPI_DCR1,OCTOSPI device configuration register 1"
bitfld.long 0x0 24.--26. "MTYP,Memory type" "0: Micron mode D0/D1 ordering in DTR 8-data-bit mode.,1: Macronix mode D1/D0 ordering in DTR 8-data-bit..,2: Standard mode,3: Macronix RAM mode D1/D0 ordering in DTR..,4: HyperBus memory mode the protocol follows the..,5: HyperBus register mode addressing register space.,?,?"
hexmask.long.byte 0x0 16.--20. 1. "DEVSIZE,Device size"
newline
hexmask.long.byte 0x0 8.--13. 1. "CSHT,Chip-select high time"
bitfld.long 0x0 3. "DLYBYP,Delay block bypass" "0: The internal sampling clock (called feedback..,1: The delay block is bypassed so the internal.."
newline
bitfld.long 0x0 1. "FRCK,Free running clock" "0: CLK is not free running.,1: CLK is free running (always provided)."
bitfld.long 0x0 0. "CKMODE,Clock mode 0/mode 3" "0: CLK must stay low while NCS is high (chip-select..,1: CLK must stay high while NCS is high.."
line.long 0x4 "OCTOSPI_DCR2,OCTOSPI device configuration register 2"
bitfld.long 0x4 16.--18. "WRAPSIZE,Wrap size" "0: Wrapped reads are not supported by the memory.,?,2: External memory supports wrap size of 16 bytes.,3: External memory supports wrap size of 32 bytes.,4: External memory supports wrap size of 64 bytes.,5: External memory supports wrap size of 128 bytes.,?,?"
hexmask.long.byte 0x4 0.--7. 1. "PRESCALER,Clock prescaler"
line.long 0x8 "OCTOSPI_DCR3,OCTOSPI device configuration register 3"
hexmask.long.byte 0x8 16.--20. 1. "CSBOUND,NCS boundary"
line.long 0xC "OCTOSPI_DCR4,OCTOSPI device configuration register 4"
hexmask.long 0xC 0.--31. 1. "REFRESH,Refresh rate"
rgroup.long 0x20++0x3
line.long 0x0 "OCTOSPI_SR,OCTOSPI status register"
hexmask.long.byte 0x0 8.--13. 1. "FLEVEL,FIFO level"
bitfld.long 0x0 5. "BUSY,Busy" "0,1"
newline
bitfld.long 0x0 4. "TOF,Timeout flag" "0,1"
bitfld.long 0x0 3. "SMF,Status match flag" "0,1"
newline
bitfld.long 0x0 2. "FTF,FIFO threshold flag" "0,1"
bitfld.long 0x0 1. "TCF,Transfer complete flag" "0,1"
newline
bitfld.long 0x0 0. "TEF,Transfer error flag" "0,1"
wgroup.long 0x24++0x3
line.long 0x0 "OCTOSPI_FCR,OCTOSPI flag clear register"
bitfld.long 0x0 4. "CTOF,Clear timeout flag" "0,1"
bitfld.long 0x0 3. "CSMF,Clear status match flag" "0,1"
newline
bitfld.long 0x0 1. "CTCF,Clear transfer complete flag" "0,1"
bitfld.long 0x0 0. "CTEF,Clear transfer error flag" "0,1"
group.long 0x40++0x3
line.long 0x0 "OCTOSPI_DLR,OCTOSPI data length register"
hexmask.long 0x0 0.--31. 1. "DL,Data length"
group.long 0x48++0x3
line.long 0x0 "OCTOSPI_AR,OCTOSPI address register"
hexmask.long 0x0 0.--31. 1. "ADDRESS,Address"
group.long 0x50++0x3
line.long 0x0 "OCTOSPI_DR,OCTOSPI data register"
hexmask.long 0x0 0.--31. 1. "DATA,Data"
group.long 0x80++0x3
line.long 0x0 "OCTOSPI_PSMKR,OCTOSPI polling status mask register"
hexmask.long 0x0 0.--31. 1. "MASK,Status mask"
group.long 0x88++0x3
line.long 0x0 "OCTOSPI_PSMAR,OCTOSPI polling status match register"
hexmask.long 0x0 0.--31. 1. "MATCH,Status match"
group.long 0x90++0x3
line.long 0x0 "OCTOSPI_PIR,OCTOSPI polling interval register"
hexmask.long.word 0x0 0.--15. 1. "INTERVAL,Polling interval"
group.long 0x100++0x3
line.long 0x0 "OCTOSPI_CCR,OCTOSPI communication configuration register"
bitfld.long 0x0 31. "SIOO,Send instruction only once mode" "0: Send instruction on every transaction,1: Send instruction only for the first command"
bitfld.long 0x0 29. "DQSE,DQS enable" "0: DQS disabled,1: DQS enabled"
newline
bitfld.long 0x0 27. "DDTR,Data double transfer rate" "0: DTR mode disabled for data phase,1: DTR mode enabled for data phase"
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0: No data,1: Data on a single line,2: Data on two lines,3: Data on four lines,4: Data on eight lines,?,?,?"
newline
bitfld.long 0x0 20.--21. "ABSIZE,Alternate-byte size" "0: 8-bit alternate bytes,1: 16-bit alternate bytes,2: 24-bit alternate bytes,3: 32-bit alternate bytes"
bitfld.long 0x0 19. "ABDTR,Alternate- byte double transfer rate" "0: DTR mode disabled for the alternate-byte phase,1: DTR mode enabled for the alternate-byte phase"
newline
bitfld.long 0x0 16.--18. "ABMODE,Alternate-byte mode" "0: No alternate bytes,1: Alternate bytes on a single line,2: Alternate bytes on two lines,3: Alternate bytes on four lines,4: Alternate bytes on eight lines,?,?,?"
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0: 8-bit address,1: 16-bit address,2: 24-bit address,3: 32-bit address"
newline
bitfld.long 0x0 11. "ADDTR,Address double transfer rate" "0: DTR mode disabled for the address phase,1: DTR mode enabled for the address phase"
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0: No address,1: Address on a single line,2: Address on two lines,3: Address on four lines,4: Address on eight lines,?,?,?"
newline
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0: 8-bit instruction,1: 16-bit instruction,2: 24-bit instruction,3: 32-bit instruction"
bitfld.long 0x0 3. "IDTR,Instruction double transfer rate" "0: DTR mode disabled for the instruction phase,1: DTR mode enabled for the instruction phase"
newline
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0: No instruction,1: Instruction on a single line,2: Instruction on two lines,3: Instruction on four lines,4: Instruction on eight lines,?,?,?"
group.long 0x108++0x3
line.long 0x0 "OCTOSPI_TCR,OCTOSPI timing configuration register"
bitfld.long 0x0 30. "SSHIFT,Sample shift" "0: No shift,1: 1/2 cycle shift"
bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "0: No delay hold,1: 1/4 cycle hold"
newline
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
group.long 0x110++0x3
line.long 0x0 "OCTOSPI_IR,OCTOSPI instruction register"
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,Instruction"
group.long 0x120++0x3
line.long 0x0 "OCTOSPI_ABR,OCTOSPI alternate bytes register"
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
group.long 0x130++0x3
line.long 0x0 "OCTOSPI_LPTR,OCTOSPI low-power timeout register"
hexmask.long.word 0x0 0.--15. 1. "TIMEOUT,Timeout period"
group.long 0x140++0x3
line.long 0x0 "OCTOSPI_WPCCR,OCTOSPI wrap communication configuration register"
bitfld.long 0x0 29. "DQSE,DQS enable" "0: DQS disabled,1: DQS enabled"
bitfld.long 0x0 27. "DDTR,Data double transfer rate" "0: DTR mode disabled for the data phase,1: DTR mode enabled for the data phase"
newline
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0: No data,1: Data on a single line,2: Data on two lines,3: Data on four lines,4: Data on eight lines,?,?,?"
bitfld.long 0x0 20.--21. "ABSIZE,Alternate-byte size" "0: 8-bit alternate bytes,1: 16-bit alternate bytes,2: 24-bit alternate bytes,3: 32-bit alternate bytes"
newline
bitfld.long 0x0 19. "ABDTR,Alternate-byte double transfer rate" "0: DTR mode disabled for the alternate-byte phase,1: DTR mode enabled for the alternate-byte phase"
bitfld.long 0x0 16.--18. "ABMODE,Alternate-byte mode" "0: no alternate bytes,1: alternate bytes on a single line,2: alternate bytes on two lines,3: alternate bytes on four lines,4: alternate bytes on eight lines,?,?,?"
newline
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0: 8-bit address,1: 16-bit address,2: 24-bit address,3: 32-bit address"
bitfld.long 0x0 11. "ADDTR,Address double transfer rate" "0: DTR mode disabled for address phase,1: DTR mode enabled for address phase"
newline
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0: No address,1: Address on a single line,2: Address on two lines,3: Address on four lines,4: Address on eight lines,?,?,?"
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0: 8-bit instruction,1: 16-bit instruction,2: 24-bit instruction,3: 32-bit instruction"
newline
bitfld.long 0x0 3. "IDTR,Instruction double transfer rate" "0: DTR mode disabled for the instruction phase,1: DTR mode enabled for the instruction phase"
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0: No instruction,1: Instruction on a single line,2: Instruction on two lines,3: Instruction on four lines,4: Instruction on eight lines,?,?,?"
group.long 0x148++0x3
line.long 0x0 "OCTOSPI_WPTCR,OCTOSPI wrap timing configuration register"
bitfld.long 0x0 30. "SSHIFT,Sample shift" "0: No shift,1: 1/2 cycle shift"
bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "0: No quarter cycle delay,1: 1/4 cycle delay inserted"
newline
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
group.long 0x150++0x3
line.long 0x0 "OCTOSPI_WPIR,OCTOSPI wrap instruction register"
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,Instruction"
group.long 0x160++0x3
line.long 0x0 "OCTOSPI_WPABR,OCTOSPI wrap alternate bytes register"
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
group.long 0x180++0x3
line.long 0x0 "OCTOSPI_WCCR,OCTOSPI write communication configuration register"
bitfld.long 0x0 29. "DQSE,DQS enable" "0: DQS disabled,1: DQS enabled"
bitfld.long 0x0 27. "DDTR,data double transfer rate" "0: DTR mode disabled for the data phase,1: DTR mode enabled for the data phase"
newline
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0: No data,1: Data on a single line,2: Data on two lines,3: Data on four lines,4: Data on eight lines,?,?,?"
bitfld.long 0x0 20.--21. "ABSIZE,Alternate-byte size" "0: 8-bit alternate bytes,1: 16-bit alternate bytes,2: 24-bit alternate bytes,3: 32-bit alternate bytes"
newline
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer rate" "0: DTR mode disabled for alternate-bytes phase,1: DTR mode enabled for alternate-bytes phase"
bitfld.long 0x0 16.--18. "ABMODE,Alternate-byte mode" "0: No alternate bytes,1: Alternate bytes on a single line,2: Alternate bytes on two lines,3: Alternate bytes on four lines,4: Alternate bytes on eight lines,?,?,?"
newline
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0: 8-bit address,1: 16-bit address,2: 24-bit address,3: 32-bit address"
bitfld.long 0x0 11. "ADDTR,Address double transfer rate" "0: DTR mode disabled for the address phase,1: DTR mode enabled for the address phase"
newline
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0: No address,1: Address on a single line,2: Address on two lines,3: Address on four lines,4: Address on eight lines,?,?,?"
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0: 8-bit instruction,1: 16-bit instruction,2: 24-bit instruction,3: 32-bit instruction"
newline
bitfld.long 0x0 3. "IDTR,Instruction double transfer rate" "0: DTR mode disabled for instruction phase,1: DTR mode enabled for instruction phase"
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0: No instruction,1: Instruction on a single line,2: Instruction on two lines,3: Instruction on four lines,4: Instruction on eight lines,?,?,?"
group.long 0x188++0x3
line.long 0x0 "OCTOSPI_WTCR,OCTOSPI write timing configuration register"
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
group.long 0x190++0x3
line.long 0x0 "OCTOSPI_WIR,OCTOSPI write instruction register"
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,Instruction"
group.long 0x1A0++0x3
line.long 0x0 "OCTOSPI_WABR,OCTOSPI write alternate bytes register"
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
group.long 0x200++0x3
line.long 0x0 "OCTOSPI_HLCR,OCTOSPI HyperBus latency configuration register"
hexmask.long.byte 0x0 16.--23. 1. "TRWR,Read-write minimum recovery time"
hexmask.long.byte 0x0 8.--15. 1. "TACC,Access time"
newline
bitfld.long 0x0 1. "WZL,Write zero latency" "0: Latency on write accesses,1: No latency on write accesses"
bitfld.long 0x0 0. "LM,Latency mode" "0: Variable initial latency,1: Fixed latency"
tree.end
tree.end
tree "OPAMP (Operational Amplifiers)"
base ad:0x0
tree "OPAMP"
base ad:0x40007000
group.long 0x0++0xB
line.long 0x0 "OPAMP1_CSR,OPAMP1 control/status register"
bitfld.long 0x0 31. "OPA_RANGE,OPAMP range setting" "?,1: OPAMP range set"
bitfld.long 0x0 30. "OPAHSM,OPAMP high-speed mode" "0: Normal mode (standard slew rate),1: Increased consumption to improve the slew rate"
newline
rbitfld.long 0x0 15. "CALOUT,OPAMP calibration output" "0,1"
bitfld.long 0x0 14. "USERTRIM,Selection of factory or user offset trimmed values" "0: Factory trim code used,1: User trim code used"
newline
bitfld.long 0x0 13. "CALSEL,Calibration selection" "0: NMOS calibration (200mV applied on OPAMP inputs),1: PMOS calibration (Vless thansub>DDA less.."
bitfld.long 0x0 12. "CALON,Calibration mode enable" "0: Normal mode,1: Calibration mode (all switches opened by hardware)"
newline
bitfld.long 0x0 10. "VP_SEL,Noninverted input selection" "0: GPIO connected to VINP,1: DAC connected to VINP"
bitfld.long 0x0 9. "VM_SEL,Inverting input selection" "0: GPIO connected to VINM (valid also in PGA mode..,1: Inverting input not externally connected"
newline
bitfld.long 0x0 4.--5. "PGA_GAIN,OPAMP programmable amplifier gain value" "0: Internal PGA gain 2,1: Internal PGA gain 4,2: Internal PGA gain 8,3: Internal PGA gain 16"
bitfld.long 0x0 2.--3. "OPAMODE,OPAMP PGA mode" "0: Internal PGA disabled,1: Internal PGA disabled,2: Internal PGA enabled gain programmed in PGA_GAIN,3: Internal follower"
newline
bitfld.long 0x0 1. "OPALPM,OPAMP low-power mode" "0: Normal mode,1: Low-power mode"
bitfld.long 0x0 0. "OPAEN,OPAMP enable" "0: OPAMP disabled,1: OPAMP enabled"
line.long 0x4 "OPAMP1_OTR,OPAMP1 offset trimming register in normal mode"
hexmask.long.byte 0x4 8.--12. 1. "TRIMOFFSETP,Trim for PMOS differential pairs"
hexmask.long.byte 0x4 0.--4. 1. "TRIMOFFSETN,Trim for NMOS differential pairs"
line.long 0x8 "OPAMP1_LPOTR,OPAMP1 offset trimming register in low-power mode"
hexmask.long.byte 0x8 8.--12. 1. "TRIMLPOFFSETP,Low-power mode trim for PMOS differential pairs"
hexmask.long.byte 0x8 0.--4. 1. "TRIMLPOFFSETN,Low-power mode trim for NMOS differential pairs"
group.long 0x10++0xB
line.long 0x0 "OPAMP2_CRS,OPAMP2 control/status register"
bitfld.long 0x0 30. "OPAHSM,OPAMP high-speed mode" "0: Normal mode (standard slew rate),1: Increased consumption to improve the slew rate"
rbitfld.long 0x0 15. "CALOUT,OPAMP calibration output" "0,1"
newline
bitfld.long 0x0 14. "USERTRIM,Selection of factory or user offset trimmed values" "0: Factory trim code used,1: User trim code used"
bitfld.long 0x0 13. "CALSEL,Calibration selection" "0: NMOS calibration (200 mV applied on OPAMP inputs),1: PMOS calibration (Vless thansub>DDA less.."
newline
bitfld.long 0x0 12. "CALON,Calibration mode enable" "0: Normal mode,1: Calibration mode (all switches opened by hardware)"
bitfld.long 0x0 10. "VP_SEL,Noninverted input selection" "0: GPIO connected to VINP,1: DAC connected to VINP"
newline
bitfld.long 0x0 9. "VM_SEL,Inverting input selection" "0: GPIO connected to VINM (valid also in PGA mode..,1: Inverting input not externally connected"
bitfld.long 0x0 4.--5. "PGA_GAIN,OPAMP programmable amplifier gain value" "0: Internal PGA gain 2,1: Internal PGA gain 4,2: Internal PGA gain 8,3: Internal PGA gain 16"
newline
bitfld.long 0x0 2.--3. "OPAMODE,OPAMP PGA mode" "0: internal PGA disabled,1: internal PGA disabled,2: Internal PGA enabled gain programmed in PGA_GAIN,3: Internal follower"
bitfld.long 0x0 1. "OPALPM,OPAMP low-power mode" "0: Normal mode,1: Low-power mode"
newline
bitfld.long 0x0 0. "OPAEN,OPAMP enable" "0: OPAMP disabled,1: OPAMP enabled"
line.long 0x4 "OPAMP2_OTR,OPAMP2 offset trimming register in normal mode"
hexmask.long.byte 0x4 8.--12. 1. "TRIMOFFSETP,Trim for PMOS differential pairs"
hexmask.long.byte 0x4 0.--4. 1. "TRIMOFFSETN,Trim for NMOS differential pairs"
line.long 0x8 "OPAMP2_LPOTR,OPAMP2 offset trimming register in low-power mode"
hexmask.long.byte 0x8 8.--12. 1. "TRIMLPOFFSETP,Low-power mode trim for PMOS differential pairs"
hexmask.long.byte 0x8 0.--4. 1. "TRIMLPOFFSETN,Low-power mode trim for NMOS differential pairs"
tree.end
tree "SEC_OPAMP"
base ad:0x50007000
group.long 0x0++0xB
line.long 0x0 "OPAMP1_CSR,OPAMP1 control/status register"
bitfld.long 0x0 31. "OPA_RANGE,OPAMP range setting" "?,1: OPAMP range set"
bitfld.long 0x0 30. "OPAHSM,OPAMP high-speed mode" "0: Normal mode (standard slew rate),1: Increased consumption to improve the slew rate"
newline
rbitfld.long 0x0 15. "CALOUT,OPAMP calibration output" "0,1"
bitfld.long 0x0 14. "USERTRIM,Selection of factory or user offset trimmed values" "0: Factory trim code used,1: User trim code used"
newline
bitfld.long 0x0 13. "CALSEL,Calibration selection" "0: NMOS calibration (200mV applied on OPAMP inputs),1: PMOS calibration (Vless thansub>DDA less.."
bitfld.long 0x0 12. "CALON,Calibration mode enable" "0: Normal mode,1: Calibration mode (all switches opened by hardware)"
newline
bitfld.long 0x0 10. "VP_SEL,Noninverted input selection" "0: GPIO connected to VINP,1: DAC connected to VINP"
bitfld.long 0x0 9. "VM_SEL,Inverting input selection" "0: GPIO connected to VINM (valid also in PGA mode..,1: Inverting input not externally connected"
newline
bitfld.long 0x0 4.--5. "PGA_GAIN,OPAMP programmable amplifier gain value" "0: Internal PGA gain 2,1: Internal PGA gain 4,2: Internal PGA gain 8,3: Internal PGA gain 16"
bitfld.long 0x0 2.--3. "OPAMODE,OPAMP PGA mode" "0: Internal PGA disabled,1: Internal PGA disabled,2: Internal PGA enabled gain programmed in PGA_GAIN,3: Internal follower"
newline
bitfld.long 0x0 1. "OPALPM,OPAMP low-power mode" "0: Normal mode,1: Low-power mode"
bitfld.long 0x0 0. "OPAEN,OPAMP enable" "0: OPAMP disabled,1: OPAMP enabled"
line.long 0x4 "OPAMP1_OTR,OPAMP1 offset trimming register in normal mode"
hexmask.long.byte 0x4 8.--12. 1. "TRIMOFFSETP,Trim for PMOS differential pairs"
hexmask.long.byte 0x4 0.--4. 1. "TRIMOFFSETN,Trim for NMOS differential pairs"
line.long 0x8 "OPAMP1_LPOTR,OPAMP1 offset trimming register in low-power mode"
hexmask.long.byte 0x8 8.--12. 1. "TRIMLPOFFSETP,Low-power mode trim for PMOS differential pairs"
hexmask.long.byte 0x8 0.--4. 1. "TRIMLPOFFSETN,Low-power mode trim for NMOS differential pairs"
group.long 0x10++0xB
line.long 0x0 "OPAMP2_CRS,OPAMP2 control/status register"
bitfld.long 0x0 30. "OPAHSM,OPAMP high-speed mode" "0: Normal mode (standard slew rate),1: Increased consumption to improve the slew rate"
rbitfld.long 0x0 15. "CALOUT,OPAMP calibration output" "0,1"
newline
bitfld.long 0x0 14. "USERTRIM,Selection of factory or user offset trimmed values" "0: Factory trim code used,1: User trim code used"
bitfld.long 0x0 13. "CALSEL,Calibration selection" "0: NMOS calibration (200 mV applied on OPAMP inputs),1: PMOS calibration (Vless thansub>DDA less.."
newline
bitfld.long 0x0 12. "CALON,Calibration mode enable" "0: Normal mode,1: Calibration mode (all switches opened by hardware)"
bitfld.long 0x0 10. "VP_SEL,Noninverted input selection" "0: GPIO connected to VINP,1: DAC connected to VINP"
newline
bitfld.long 0x0 9. "VM_SEL,Inverting input selection" "0: GPIO connected to VINM (valid also in PGA mode..,1: Inverting input not externally connected"
bitfld.long 0x0 4.--5. "PGA_GAIN,OPAMP programmable amplifier gain value" "0: Internal PGA gain 2,1: Internal PGA gain 4,2: Internal PGA gain 8,3: Internal PGA gain 16"
newline
bitfld.long 0x0 2.--3. "OPAMODE,OPAMP PGA mode" "0: internal PGA disabled,1: internal PGA disabled,2: Internal PGA enabled gain programmed in PGA_GAIN,3: Internal follower"
bitfld.long 0x0 1. "OPALPM,OPAMP low-power mode" "0: Normal mode,1: Low-power mode"
newline
bitfld.long 0x0 0. "OPAEN,OPAMP enable" "0: OPAMP disabled,1: OPAMP enabled"
line.long 0x4 "OPAMP2_OTR,OPAMP2 offset trimming register in normal mode"
hexmask.long.byte 0x4 8.--12. 1. "TRIMOFFSETP,Trim for PMOS differential pairs"
hexmask.long.byte 0x4 0.--4. 1. "TRIMOFFSETN,Trim for NMOS differential pairs"
line.long 0x8 "OPAMP2_LPOTR,OPAMP2 offset trimming register in low-power mode"
hexmask.long.byte 0x8 8.--12. 1. "TRIMLPOFFSETP,Low-power mode trim for PMOS differential pairs"
hexmask.long.byte 0x8 0.--4. 1. "TRIMLPOFFSETN,Low-power mode trim for NMOS differential pairs"
tree.end
tree.end
tree "PKA (Private Key Accelerator)"
base ad:0x0
tree "PKA"
base ad:0x420C2000
group.long 0x0++0x3
line.long 0x0 "PKA_CR,PKA control register"
rbitfld.long 0x0 22. "CMFIE,Chaining mode flags interrupt enable" "0: No interrupt is generated when any flag in bits..,1: An interrupt is generated when any flag in bits.."
bitfld.long 0x0 21. "OPERRIE,Operation error interrupt enable" "0: No interrupt is generated when OPERRF flag is..,1: An interrupt is generated when OPERRF flag is.."
newline
bitfld.long 0x0 20. "ADDRERRIE,Address error interrupt enable" "0: No interrupt is generated when ADDRERRF flag is..,1: An interrupt is generated when ADDRERRF flag is.."
bitfld.long 0x0 19. "RAMERRIE,RAM error interrupt enable" "0: No interrupt is generated when RAMERRF flag is..,1: An interrupt is generated when RAMERRF flag is.."
newline
bitfld.long 0x0 17. "PROCENDIE,End of operation interrupt enable" "0: No interrupt is generated when PROCENDF flag is..,1: An interrupt is generated when PROCENDF flag is.."
hexmask.long.byte 0x0 8.--13. 1. "MODE,PKA operation code"
newline
bitfld.long 0x0 1. "START,start the operation" "0,1"
bitfld.long 0x0 0. "EN,PKA enable" "0: Disable PKA,1: Enable PKA."
rgroup.long 0x4++0x3
line.long 0x0 "PKA_SR,PKA status register"
bitfld.long 0x0 22. "CMF,Chaining mode flags" "0: No chaining mode events.,1: Running chaining mode sequence triggered at.."
bitfld.long 0x0 21. "OPERRF,Operation error flag" "0: No event error,1: An illegal or unknown operation has been.."
newline
bitfld.long 0x0 20. "ADDRERRF,Address error flag" "0: No address error,1: Address access is out of range (unmapped address)"
bitfld.long 0x0 19. "RAMERRF,PKA RAM error flag" "0: No PKA RAM access error,1: An AHB access to the PKA RAM occurred while the.."
newline
bitfld.long 0x0 17. "PROCENDF,PKA end of operation flag" "0: Operation in progress,1: PKA operation is completed."
bitfld.long 0x0 16. "BUSY,Busy flag" "0: No operation is in progress (default),1: An operation is in progress"
newline
bitfld.long 0x0 14. "RNGERRF,RNG error flag" "0: No random number drawn from RNG or generated ECC..,1: Random number drawn from RNG did not pass NIST.."
bitfld.long 0x0 13. "MDERRF,Mode error flag" "0: No mode error,1: The value written in MODE of PKA_CR registers is.."
newline
bitfld.long 0x0 12. "TRZERRF,Trailing 0s error flag" "0: No trailing 0s error,1: Clear-text coming from CPU or decrypted data.."
bitfld.long 0x0 11. "DATAZF,Data 0-ed error flag" "0,1"
newline
bitfld.long 0x0 10. "INCRERRF,Increment error flag" "0: No increment error,1: During the reading or writing of protected.."
bitfld.long 0x0 9. "DATAOKF,Data OK flag" "0: Data not OK (if applicable) otherwise no event.,1: Sequential writes to / read from PKA RAM.."
newline
bitfld.long 0x0 8. "RNGOKF,RNG OK flag" "0: Random number not OK (if applicable).,1: Sequential writes to PKA RAM successfully.."
bitfld.long 0x0 2. "CCEN,Coupling and chaining mode enable" "0: Access to PKA RAM and programming of PKA_CR has..,1: PKA RAM is write-only until START is set (it is.."
newline
bitfld.long 0x0 1. "LMF,Limited mode flag" "0: All values documented in MODE bit field can be..,1: Only ECDSA verification (MODE = 0x26) is.."
bitfld.long 0x0 0. "INITOK,PKA initialization OK" "0: PKA is not initialized correctly.,1: PKA is initialized correctly and can be used.."
group.long 0x8++0x3
line.long 0x0 "PKA_CLRFR,PKA clear flag register"
rbitfld.long 0x0 22. "CMFC,Clear chaining mode flag" "0: No action,1: Clear the CMF flag and the chaining mode status.."
bitfld.long 0x0 21. "OPERRFC,Clear operation error flag" "0: No action,1: Clear the OPERRF flag in PKA_SR"
newline
bitfld.long 0x0 20. "ADDRERRFC,Clear address error flag" "0: No action,1: Clear the ADDRERRF flag in PKA_SR"
bitfld.long 0x0 19. "RAMERRFC,Clear PKA RAM error flag" "0: No action,1: Clear the RAMERRF flag in PKA_SR"
newline
bitfld.long 0x0 17. "PROCENDFC,Clear PKA end of operation flag" "0: No action,1: Clear the PROCENDF flag in PKA_SR"
tree.end
tree "SEC_PKA"
base ad:0x520C2000
group.long 0x0++0x3
line.long 0x0 "PKA_CR,PKA control register"
rbitfld.long 0x0 22. "CMFIE,Chaining mode flags interrupt enable" "0: No interrupt is generated when any flag in bits..,1: An interrupt is generated when any flag in bits.."
bitfld.long 0x0 21. "OPERRIE,Operation error interrupt enable" "0: No interrupt is generated when OPERRF flag is..,1: An interrupt is generated when OPERRF flag is.."
newline
bitfld.long 0x0 20. "ADDRERRIE,Address error interrupt enable" "0: No interrupt is generated when ADDRERRF flag is..,1: An interrupt is generated when ADDRERRF flag is.."
bitfld.long 0x0 19. "RAMERRIE,RAM error interrupt enable" "0: No interrupt is generated when RAMERRF flag is..,1: An interrupt is generated when RAMERRF flag is.."
newline
bitfld.long 0x0 17. "PROCENDIE,End of operation interrupt enable" "0: No interrupt is generated when PROCENDF flag is..,1: An interrupt is generated when PROCENDF flag is.."
hexmask.long.byte 0x0 8.--13. 1. "MODE,PKA operation code"
newline
bitfld.long 0x0 1. "START,start the operation" "0,1"
bitfld.long 0x0 0. "EN,PKA enable" "0: Disable PKA,1: Enable PKA."
rgroup.long 0x4++0x3
line.long 0x0 "PKA_SR,PKA status register"
bitfld.long 0x0 22. "CMF,Chaining mode flags" "0: No chaining mode events.,1: Running chaining mode sequence triggered at.."
bitfld.long 0x0 21. "OPERRF,Operation error flag" "0: No event error,1: An illegal or unknown operation has been.."
newline
bitfld.long 0x0 20. "ADDRERRF,Address error flag" "0: No address error,1: Address access is out of range (unmapped address)"
bitfld.long 0x0 19. "RAMERRF,PKA RAM error flag" "0: No PKA RAM access error,1: An AHB access to the PKA RAM occurred while the.."
newline
bitfld.long 0x0 17. "PROCENDF,PKA end of operation flag" "0: Operation in progress,1: PKA operation is completed."
bitfld.long 0x0 16. "BUSY,Busy flag" "0: No operation is in progress (default),1: An operation is in progress"
newline
bitfld.long 0x0 14. "RNGERRF,RNG error flag" "0: No random number drawn from RNG or generated ECC..,1: Random number drawn from RNG did not pass NIST.."
bitfld.long 0x0 13. "MDERRF,Mode error flag" "0: No mode error,1: The value written in MODE of PKA_CR registers is.."
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bitfld.long 0x0 12. "TRZERRF,Trailing 0s error flag" "0: No trailing 0s error,1: Clear-text coming from CPU or decrypted data.."
bitfld.long 0x0 11. "DATAZF,Data 0-ed error flag" "0,1"
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bitfld.long 0x0 10. "INCRERRF,Increment error flag" "0: No increment error,1: During the reading or writing of protected.."
bitfld.long 0x0 9. "DATAOKF,Data OK flag" "0: Data not OK (if applicable) otherwise no event.,1: Sequential writes to / read from PKA RAM.."
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bitfld.long 0x0 8. "RNGOKF,RNG OK flag" "0: Random number not OK (if applicable).,1: Sequential writes to PKA RAM successfully.."
bitfld.long 0x0 2. "CCEN,Coupling and chaining mode enable" "0: Access to PKA RAM and programming of PKA_CR has..,1: PKA RAM is write-only until START is set (it is.."
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bitfld.long 0x0 1. "LMF,Limited mode flag" "0: All values documented in MODE bit field can be..,1: Only ECDSA verification (MODE = 0x26) is.."
bitfld.long 0x0 0. "INITOK,PKA initialization OK" "0: PKA is not initialized correctly.,1: PKA is initialized correctly and can be used.."
group.long 0x8++0x3
line.long 0x0 "PKA_CLRFR,PKA clear flag register"
rbitfld.long 0x0 22. "CMFC,Clear chaining mode flag" "0: No action,1: Clear the CMF flag and the chaining mode status.."
bitfld.long 0x0 21. "OPERRFC,Clear operation error flag" "0: No action,1: Clear the OPERRF flag in PKA_SR"
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bitfld.long 0x0 20. "ADDRERRFC,Clear address error flag" "0: No action,1: Clear the ADDRERRF flag in PKA_SR"
bitfld.long 0x0 19. "RAMERRFC,Clear PKA RAM error flag" "0: No action,1: Clear the RAMERRF flag in PKA_SR"
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bitfld.long 0x0 17. "PROCENDFC,Clear PKA end of operation flag" "0: No action,1: Clear the PROCENDF flag in PKA_SR"
tree.end
tree.end
tree "PWR (Power Control)"
base ad:0x0
tree "PWR"
base ad:0x40030800
group.long 0x0++0x1F
line.long 0x0 "PWR_CR1,PWR control register 1"
bitfld.long 0x0 9. "SRAM2PD,This bit is used to reduce the consumption by powering off the SRAM2." "0: SRAM2 powered on,1: SRAM2 powered off"
bitfld.long 0x0 8. "SRAM1PD,This bit is used to reduce the consumption by powering off the SRAM1." "0: SRAM1 powered on,1: SRAM1 powered off"
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bitfld.long 0x0 7. "ULPMEN,This bit is used to reduce the consumption by configuring the BOR in discontinuous mode. This bit has effect only when the BOR level 0 is selected and when the device is in Standby mode. This bit must be set to reach the lowest power consumption.." "0: BOR level 0 operating in continuous,1: BOR level 0 operating in discontinuous"
bitfld.long 0x0 6. "RRSB3,This bit is used to keep the SRAM2 page 3 content in Standby mode. The SRAM2 page 3 corresponds to the last 32 Kbytes of the SRAM2" "0: SRAM2 page3 content not retained in Standby mode,1: SRAM2 page3 content retained in Standby mode"
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bitfld.long 0x0 5. "RRSB2,This bit is used to keep the SRAM2 page 2 content in Standby mode. The SRAM2 page 2 corresponds to the 24 Kbytes of the SRAM2" "0: SRAM2 page2 content not retained in Standby mode,1: SRAM2 page2 content retained in Standby mode"
bitfld.long 0x0 4. "RRSB1,This bit is used to keep the SRAM2 page 1 content in Standby mode. The SRAM2 page 1 corresponds to the first 8 Kbytes of the SRAM2" "0: SRAM2 page1 content not retained in Standby mode,1: SRAM2 page1 content retained in Standby mode"
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bitfld.long 0x0 0.--2. "LPMS,These bits select the low-power mode entered when the CPU enters the Deepsleep mode." "0: Stop 0 mode,1: Stop 1 mode,2: Stop 2 mode,3: Stop 3 mode,4: Standby mode,5: Standby mode,6: Shutdown mode,7: Shutdown mode"
line.long 0x4 "PWR_CR2,PWR control register 2"
bitfld.long 0x4 29. "FLASHFWU,This bit is used to obtain the best trade-off between low-power consumption and wakeup time when exiting the Stop 0 or Stop 1 modes." "0: Flash memory enters low-power mode in Stop 0 and..,1: Flash memory remains in normal mode in Stop 0.."
bitfld.long 0x4 28. "SRAMFWU,This bit is used to obtain the best trade-off between low-power consumption and wakeup time. SRAMs wakeup time increases the wakeup time when exiting Stop 0 and 1 modes " "0: SRAMs enters low-power mode in Stop 0 and Stop 1..,1: SRAMs remains in normal mode in Stop 0 and Stop.."
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bitfld.long 0x4 27. "PKARAMPDS,None" "0: PKA SRAM content retained in Stop modes,1: PKA SRAM content lost in Stop modes"
bitfld.long 0x4 26. "PRAMPDS,None" "0: FDCAN and USB peripherals SRAM content retained..,1: FDCAN and USB peripherals SRAM content lost in.."
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bitfld.long 0x4 25. "ICRAMPDS,None" "0: ICACHE SRAM content retained in Stop modes,1: ICACHE SRAM content lost in Stop modes"
bitfld.long 0x4 18. "SRAM2PDS3,None" "0: SRAM2 page 3 content retained in Stop modes,1: SRAM2 page 3 content lost in Stop modes"
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bitfld.long 0x4 17. "SRAM2PDS2,None" "0: SRAM2 page 2 content retained in Stop modes,1: SRAM2 page 2 content lost in Stop modes"
bitfld.long 0x4 16. "SRAM2PDS1,None" "0: SRAM2 page 1 content retained in Stop modes,1: SRAM2 page 1 content lost in Stop modes"
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bitfld.long 0x4 6. "SRAM1PDS7,None" "0: SRAM1 page 7 content retained in Stop modes,1: SRAM1 page 7 content lost in Stop modes"
bitfld.long 0x4 5. "SRAM1PDS6,None" "0: SRAM1 page 6 content retained in Stop modes,1: SRAM1 page 6 content lost in Stop modes"
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bitfld.long 0x4 4. "SRAM1PDS5,None" "0: SRAM1 page 5 content retained in Stop modes,1: SRAM1 page 5 content lost in Stop modes"
bitfld.long 0x4 3. "SRAM1PDS4,None" "0: SRAM1 page 4 content retained in Stop modes,1: SRAM1 page 4 content lost in Stop modes"
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bitfld.long 0x4 2. "SRAM1PDS3,None" "0: SRAM1 page 3 content retained in Stop modes,1: SRAM1 page 3 content lost in Stop modes"
bitfld.long 0x4 1. "SRAM1PDS2,None" "0: SRAM1 page 2 content retained in Stop modes,1: SRAM1 page 2 content lost in Stop modes"
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bitfld.long 0x4 0. "SRAM1PDS1,None" "0: SRAM1 page 1 content retained in Stop modes,1: SRAM1 page 1 content lost in Stop modes"
line.long 0x8 "PWR_CR3,PWR control register 3"
bitfld.long 0x8 2. "FSTEN,None" "0: LDO/SMPS fast startup disabled,1: LDO/SMPS fast startup enabled"
bitfld.long 0x8 1. "REGSEL,None" "0: LDO selected,1: SMPS selected"
line.long 0xC "PWR_VOSR,PWR voltage scaling register"
rbitfld.long 0xC 24. "BOOSTRDY,This bit is set to 1 by hardware when the power booster startup time is reached. The system clock frequency can be switched higher than 24 MHz only after this bit is set. Disabling the booster clock when the booster is ready is forbidden." "0: Power booster not ready,1: Power booster ready"
rbitfld.long 0xC 17. "R2RDY,None" "0: Range 2 not ready: voltage level less than VOS..,1: Range 2 ready: voltage level greater or equal.."
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rbitfld.long 0xC 16. "R1RDY,None" "0: Range 1 not ready: voltage level less than VOS..,1: Range 1 ready: voltage level greater or equal.."
bitfld.long 0xC 8. "BOOSTEN,This bit is protected against non-secure access when SYSCLKSEC=1 in RCC_SECCFGR. It is protected against unprivileged access when SYSCLKSEC=1 in RCC_SECCFGR and SPRIV=1 in PWR_PRIVCFGR or when SYSCLKSEC=0 and NSPRIV=1." "0: Booster disabled,1: Booster enabled"
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bitfld.long 0xC 1. "R2EN,This field is protected against non-secure access when SYSCLKSEC=1 in RCC_SECCFGR. It is protected against unprivileged access when SYSCLKSEC=1 in RCC_SECCFGR and SPRIV=1 in PWR_PRIVCFGR or when SYSCLKSEC=0 and NSPRIV=1." "0: Voltage scaling range 2 disabled,1: Voltage scaling range 2 enabled"
bitfld.long 0xC 0. "R1EN,This field is protected against non-secure access when SYSCLKSEC=1 in RCC_SECCFGR. It is protected against unprivileged access when SYSCLKSEC=1 in RCC_SECCFGR and SPRIV=1 in PWR_PRIVCFGR or when SYSCLKSEC=0 and NSPRIV=1." "0: Voltage scaling range 1 disabled,1: Voltage scaling range 1 enabled"
line.long 0x10 "PWR_SVMCR,PWR supply voltage monitoring control register"
bitfld.long 0x10 30. "ASV,This bit is used to validate the VDDA supply for electrical and logical isolation purpose." "0: VDDA not present: logical and electrical..,1: VDDA valid"
bitfld.long 0x10 29. "IO2SV,This bit is used to validate the VDDIO2 supply for electrical and logical isolation purpose." "0: VDDIO2 not present: logical and electrical..,1: VDDIO2 valid"
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bitfld.long 0x10 28. "USV,This bit is used to validate the VDDUSB supply for electrical and logical isolation purpose." "0: VDDUSB not present: logical and electrical..,1: VDDUSB valid"
bitfld.long 0x10 27. "AVM2EN,None" "0: VDDA voltage monitor 2 disabled,1: VDDA voltage monitor 2 enabled"
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bitfld.long 0x10 26. "AVM1EN,None" "0: VDDA voltage monitor 1 disabled,1: VDDA voltage monitor 1 enabled"
bitfld.long 0x10 25. "IO2VMEN,None" "0: VDDIO2 voltage monitor disabled,1: VDDIO2 voltage monitor enabled"
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bitfld.long 0x10 24. "UVMEN,None" "0: VDDUSB voltage monitor disabled,1: VDDUSB voltage monitor enabled"
bitfld.long 0x10 5.--7. "PVDLS,These bits select the voltage threshold detected by the PVD:" "0: VPVD0 around 2,1: VPVD1 around 2,2: VPVD2 around 2.4V,3: VPVD3 around 2.5V,4: VPVD4 around 2.6V,5: VPVD5 around 2.8V,6: VPVD6 around 2.9V,7: External input analog voltage PVD_IN (compared.."
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bitfld.long 0x10 4. "PVDE,None" "0: PVD disabled,1: PVD enabled"
line.long 0x14 "PWR_WUCR1,PWR wakeup control register 1"
bitfld.long 0x14 9. "WUPEN10,None" "0: Wakeup line WKUP10 disabled,1: Wakeup line WKUP10 enabled"
bitfld.long 0x14 8. "WUPEN9,None" "0: Wakeup line WKUP9 disabled,1: Wakeup line WKUP9 enabled"
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bitfld.long 0x14 7. "WUPEN8,None" "0: Wakeup line WKUP8 disabled,1: Wakeup line WKUP8 enabled"
bitfld.long 0x14 6. "WUPEN7,None" "0: Wakeup line WKUP7 disabled,1: Wakeup line WKUP7 enabled"
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bitfld.long 0x14 5. "WUPEN6,None" "0: Wakeup line WKUP6 disabled,1: Wakeup line WKUP6 enabled"
bitfld.long 0x14 4. "WUPEN5,None" "0: Wakeup line WKUP5 disabled,1: Wakeup line WKUP5 enabled"
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bitfld.long 0x14 3. "WUPEN4,None" "0: Wakeup line WKUP4 disabled,1: Wakeup line WKUP4 enabled"
bitfld.long 0x14 2. "WUPEN3,None" "0: Wakeup line WKUP3 disabled,1: Wakeup line WKUP3 enabled"
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bitfld.long 0x14 1. "WUPEN2,None" "0: Wakeup line WKUP2 disabled,1: Wakeup line WKUP2 enabled"
bitfld.long 0x14 0. "WUPEN1,None" "0: Wakeup line WKUP1 disabled,1: Wakeup line WKUP1 enabled"
line.long 0x18 "PWR_WUCR2,PWR wakeup control register 2"
bitfld.long 0x18 7. "WUPP8,This bit must be configured when WUPEN8 = 0. It has no effect when WUSEL8 = 11." "0: Detection on high level,1: Detection on low level"
bitfld.long 0x18 6. "WUPP7,This bit must be configured when WUPEN7 = 0. It has no effect when WUSEL7 = 11." "0: Detection on high level,1: Detection on low level"
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bitfld.long 0x18 5. "WUPP6,This bit must be configured when WUPEN6 = 0. It has no effect when WUSEL6 = 11." "0: Detection on high level,1: Detection on low level"
bitfld.long 0x18 4. "WUPP5,This bit must be configured when WUPEN5 = 0. It has no effect when WUSEL5 = 11." "0: Detection on high level,1: Detection on low level"
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bitfld.long 0x18 3. "WUPP4,This bit must be configured when WUPEN4 = 0. It has no effect when WUSEL4 = 11." "0: Detection on high level,1: Detection on low level"
bitfld.long 0x18 2. "WUPP3,This bit must be configured when WUPEN3 = 0. It has no effect when WUSEL3 = 11." "0: Detection on high level,1: Detection on low level"
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bitfld.long 0x18 1. "WUPP2,This bit must be configured when WUPEN2 = 0. It has no effect when WUSEL2 = 11." "0: Detection on high level,1: Detection on low level"
bitfld.long 0x18 0. "WUPP1,This bit must be configured when WUPEN1 = 0. It has no effect when WUSEL1 = 11." "0: Detection on high level,1: Detection on low level"
line.long 0x1C "PWR_WUCR3,PWR wakeup control register 3"
bitfld.long 0x1C 14.--15. "WUSEL8,This field must be configured when WUPEN8 = 0." "0: WKUP8_0,1: WKUP8_1,2: WKUP8_2,3: WKUP8_3"
bitfld.long 0x1C 12.--13. "WUSEL7,This field must be configured when WUPEN7 = 0." "0: WKUP7_0,1: WKUP7_1,2: WKUP7_2,3: WKUP7_3"
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bitfld.long 0x1C 10.--11. "WUSEL6,This field must be configured when WUPEN6 = 0." "0: WKUP6_0,1: WKUP6_1,2: WKUP6_2,3: WKUP6_3"
bitfld.long 0x1C 8.--9. "WUSEL5,This field must be configured when WUPEN5 = 0." "0: WKUP5_0,1: WKUP5_1,2: WKUP5_2,3: WKUP5_3"
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bitfld.long 0x1C 6.--7. "WUSEL4,This field must be configured when WUPEN4 = 0." "0: WKUP4_0,1: WKUP4_1,2: WKUP4_2,3: WKUP4_3"
bitfld.long 0x1C 4.--5. "WUSEL3,This field must be configured when WUPEN3 = 0." "0: WKUP3_0,1: WKUP3_1,2: WKUP3_2,3: WKUP3_3"
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bitfld.long 0x1C 2.--3. "WUSEL2,This field must be configured when WUPEN2 = 0." "0: WKUP2_0,1: WKUP2_1,2: WKUP2_2,3: WKUP2_3"
bitfld.long 0x1C 0.--1. "WUSEL1,This field must be configured when WUPEN1 = 0." "0: WKUP1_0,1: WKUP1_1,2: WKUP1_2,3: WKUP1_3"
group.long 0x24++0x7
line.long 0x0 "PWR_BDCR,PWR Backup domain control register"
bitfld.long 0x0 1. "VBRS,None" "0: Charge VBAT through a 5 k ohm resistor,1: Charge VBAT through a 1"
bitfld.long 0x0 0. "VBE,None" "0: VBAT battery charging disabled,1: VBAT battery charging enabled"
line.long 0x4 "PWR_DBPR,PWR disable Backup domain register"
bitfld.long 0x4 0. "DBP,In reset state all registers and SRAM in Backup domain are protected against parasitic write access. This bit must be set to enable the write access to these registers." "0: Write access to Backup domain disabled,1: Write access to Backup domain enabled"
group.long 0x30++0xB
line.long 0x0 "PWR_SECCFGR,PWR security configuration register"
bitfld.long 0x0 15. "APCSEC,None" "0: PWR_APCR can be read and written with secure or..,1: PWR_APCR can be read and written only with.."
bitfld.long 0x0 14. "VBSEC,None" "0: PWR_BDCR and PWR_DBPR can be read and written..,1: PWR_BDCR and PWR_DBPR can be read and written.."
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bitfld.long 0x0 13. "VDMSEC,None" "0: PWR_SVMCR and PWR_CR3 can be read and written..,1: PWR_SVMCR and PWR_CR3 can be read and written.."
bitfld.long 0x0 12. "LPMSEC,None" "0: PWR_CR1,1: PWR_CR1"
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bitfld.long 0x0 9. "WUP10SEC,None" "0: Bits related to the WKUP10 line in PWR_WUCR1,1: Bits related to the WKUP10 line in PWR_WUCR1"
bitfld.long 0x0 8. "WUP9SEC,None" "0: Bits related to the WKUP9 line in PWR_WUCR1,1: Bits related to the WKUP9 line in PWR_WUCR1"
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bitfld.long 0x0 7. "WUP8SEC,None" "0: Bits related to the WKUP8 line in PWR_WUCR1,1: Bits related to the WKUP8 line in PWR_WUCR1"
bitfld.long 0x0 6. "WUP7SEC,None" "0: Bits related to the WKUP7 line in PWR_WUCR1,1: Bits related to the WKUP7 line in PWR_WUCR1"
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bitfld.long 0x0 5. "WUP6SEC,None" "0: Bits related to the WKUP6 line in PWR_WUCR1,1: Bits related to the WKUP6 line in PWR_WUCR1"
bitfld.long 0x0 4. "WUP5SEC,None" "0: Bits related to the WKUP5 line in PWR_WUCR1,1: Bits related to the WKUP5 line in PWR_WUCR1"
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bitfld.long 0x0 3. "WUP4SEC,None" "0: Bits related to the WKUP4 line in PWR_WUCR1,1: Bits related to the WKUP4 line in PWR_WUCR1"
bitfld.long 0x0 2. "WUP3SEC,None" "0: Bits related to the WKUP3 line in PWR_WUCR1,1: Bits related to the WKUP3 line in PWR_WUCR1"
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bitfld.long 0x0 1. "WUP2SEC,None" "0: Bits related to the WKUP2 line in PWR_WUCR1,1: Bits related to the WKUP2 line in PWR_WUCR1"
bitfld.long 0x0 0. "WUP1SEC,None" "0: Bits related to the WKUP1 line in PWR_WUCR1,1: Bits related to the WKUP1 line in PWR_WUCR1"
line.long 0x4 "PWR_PRIVCFGR,PWR privilege control register"
bitfld.long 0x4 1. "NSPRIV,This bit is set and reset by software. It can be written only by privileged access secure or non-secure." "0: Read and write to PWR non-secure functions can..,1: Read and write to PWR non-secure functions can.."
bitfld.long 0x4 0. "SPRIV,This bit is set and reset by software. It can be written only by a secure privileged access." "0: Read and write to PWR secure functions can be..,1: Read and write to PWR secure functions can be.."
line.long 0x8 "PWR_SR,PWR status register"
rbitfld.long 0x8 2. "SBF,This bit is set by hardware when the device enters the Standby mode and is cleared by writing 1 to the CSSF bit or by a power-on reset. It is not cleared by the system reset." "0: The device did not enter Standby mode,1: The device entered Standby mode"
rbitfld.long 0x8 1. "STOPF,This bit is set by hardware when the device enters a Stop mode and is cleared by software by writing 1 to the CSSF bit." "0: The device did not enter any Stop mode,1: The device entered a Stop mode"
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bitfld.long 0x8 0. "CSSF,This bit is protected against non-secure access when LPMSEC=1 in PWR_SECCFGR." "0,1"
rgroup.long 0x3C++0x3
line.long 0x0 "PWR_SVMSR,PWR supply voltage monitoring status register"
bitfld.long 0x0 27. "VDDA2RDY,None" "0: VDDA is below the threshold of the VDDA voltage..,1: VDDA is equal or above the threshold of the VDDA.."
bitfld.long 0x0 26. "VDDA1RDY,None" "0: VDDA is below the threshold of the VDDA voltage..,1: VDDA is equal or above the threshold of the VDDA.."
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bitfld.long 0x0 25. "VDDIO2RDY,None" "0: VDDIO2 is below the threshold of the VDDIO2..,1: VDDIO2 is equal or above the threshold of the.."
bitfld.long 0x0 24. "VDDUSBRDY,None" "0: VDDUSB is below the threshold of the VDDUSB..,1: VDDUSB is equal or above the threshold of the.."
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bitfld.long 0x0 4. "PVDO,None" "0: VDD is equal or above the PVD threshold selected..,1: VDD is below the PVD threshold selected by.."
bitfld.long 0x0 1. "REGS,None" "0: LDO selected,1: SMPS selected"
rgroup.long 0x44++0x3
line.long 0x0 "PWR_WUSR,PWR wakeup status register"
bitfld.long 0x0 9. "WUF10,This bit is set when a wakeup event is detected on WKUP10 line. This bit is cleared by writing 1 in the CWUF10 bit of PWR_WUSCR when WUSEL different 11 or by hardware when WUPEN10=0. If WUSEL = 11 this bit is cleared by hardware when all.." "0,1"
bitfld.long 0x0 8. "WUF9,This bit is set when a wakeup event is detected on WKUP9 line. This bit is cleared by writing 1 in the CWUF9 bit of PWR_WUSCR when WUSEL different 11 or by hardware when WUPEN9=0. If WUSEL = 11 this bit is cleared by hardware when all internal.." "0,1"
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bitfld.long 0x0 7. "WUF8,This bit is set when a wakeup event is detected on WKUP8 line. This bit is cleared by writing 1 in the CWUF8 bit of PWR_WUSCR when WUSEL different 11 or by hardware when WUPEN8=0. If WUSEL = 11 this bit is cleared by hardware when all internal.." "0,1"
bitfld.long 0x0 6. "WUF7,This bit is set when a wakeup event is detected on WKUP7 line. This bit is cleared by writing 1 in the CWUF7 bit of PWR_WUSCR when WUSEL different 11 or by hardware when WUPEN7=0. If WUSEL = 11 this bit is cleared by hardware when all internal.." "0,1"
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bitfld.long 0x0 5. "WUF6,This bit is set when a wakeup event is detected on WKUP6 line. This bit is cleared by writing 1 in the CWUF6 bit of PWR_WUSCR when WUSEL different 11 or by hardware when WUPEN6=0. If WUSEL = 11 this bit is cleared by hardware when all internal.." "0,1"
bitfld.long 0x0 4. "WUF5,This bit is set when a wakeup event is detected on WKUP5 line. This bit is cleared by writing 1 in the CWUF5 bit of PWR_WUSCR when WUSEL different 11 or by hardware when WUPEN5=0. If WUSEL = 11 this bit is cleared by hardware when all internal.." "0,1"
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bitfld.long 0x0 3. "WUF4,This bit is set when a wakeup event is detected on WKUP4 line. This bit is cleared by writing 1 in the CWUF4 bit of PWR_WUSCR when WUSEL different 11 or by hardware when WUPEN4=0. If WUSEL = 11 this bit is cleared by hardware when all internal.." "0,1"
bitfld.long 0x0 2. "WUF3,This bit is set when a wakeup event is detected on WKUP3 line. This bit is cleared by writing 1 in the CWUF3 bit of PWR_WUSCR when WUSEL different 11 or by hardware when WUPEN3=0. If WUSEL = 11 this bit is cleared by hardware when all internal.." "0,1"
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bitfld.long 0x0 1. "WUF2,This bit is set when a wakeup event is detected on WKUP2 line. This bit is cleared by writing 1 in the CWUF2 bit of PWR_WUSCR when WUSEL different 11 or by hardware when WUPEN2=0. If WUSEL = 11 this bit is cleared by hardware when all internal.." "0,1"
bitfld.long 0x0 0. "WUF1,This bit is set when a wakeup event is detected on WKUP1 line. This bit is cleared by writing 1 in the CWUF1 bit of PWR_WUSCR when WUSEL different 11 or by hardware when WUPEN1=0. If WUSEL = 11 this bit is cleared by hardware when all internal.." "0,1"
wgroup.long 0x48++0x3
line.long 0x0 "PWR_WUSCR,PWR wakeup status clear register"
bitfld.long 0x0 9. "CWUF10,Writing 1 to this bit clears the WUF10 flag in PWR_WUSR." "0,1"
bitfld.long 0x0 8. "CWUF9,Writing 1 to this bit clears the WUF9 flag in PWR_WUSR." "0,1"
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bitfld.long 0x0 7. "CWUF8,Writing 1 to this bit clears the WUF8 flag in PWR_WUSR." "0,1"
bitfld.long 0x0 6. "CWUF7,Writing 1 to this bit clears the WUF7 flag in PWR_WUSR." "0,1"
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bitfld.long 0x0 5. "CWUF6,Writing 1 to this bit clears the WUF6 flag in PWR_WUSR." "0,1"
bitfld.long 0x0 4. "CWUF5,Writing 1 to this bit clears the WUF5 flag in PWR_WUSR." "0,1"
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bitfld.long 0x0 3. "CWUF4,Writing 1 to this bit clears the WUF4 flag in PWR_WUSR." "0,1"
bitfld.long 0x0 2. "CWUF3,Writing 1 to this bit clears the WUF3 flag in PWR_WUSR." "0,1"
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bitfld.long 0x0 1. "CWUF2,Writing 1 to this bit clears the WUF2 flag in PWR_WUSR." "0,1"
bitfld.long 0x0 0. "CWUF1,Writing 1 to this bit clears the WUF1 flag in PWR_WUSR." "0,1"
group.long 0x4C++0x2B
line.long 0x0 "PWR_APCR,PWR apply pull configuration register"
bitfld.long 0x0 0. "APC,When this bit is set the I/O pull-up and pull-down configurations defined in PWR_PUCRx and PWR_PDCRx are applied. When this bit is cleared PWR_PUCRx and PWR_PDCRx are not applied to the I/Os." "0,1"
line.long 0x4 "PWR_PUCRA,PWR port A pull-up control register"
bitfld.long 0x4 15. "PU15,When set each bit activates the pull-up on PA15 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD15 bit is also set." "0,1"
bitfld.long 0x4 13. "PU13,When set each bit activates the pull-up on PA13 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD13 bit is also set." "0,1"
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bitfld.long 0x4 12. "PU12,When set each bit activates the pull-up on PA12 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD12 bit is also set." "0,1"
bitfld.long 0x4 11. "PU11,When set each bit activates the pull-up on PA11 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD11 bit is also set." "0,1"
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bitfld.long 0x4 10. "PU10,When set each bit activates the pull-up on PA10 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD10 bit is also set." "0,1"
bitfld.long 0x4 9. "PU9,When set each bit activates the pull-up on PA9 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD9 bit is also set." "0,1"
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bitfld.long 0x4 8. "PU8,When set each bit activates the pull-up on PA8 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD8 bit is also set." "0,1"
bitfld.long 0x4 7. "PU7,When set each bit activates the pull-up on PA7 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD7 bit is also set." "0,1"
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bitfld.long 0x4 6. "PU6,When set each bit activates the pull-up on PA6 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD6 bit is also set." "0,1"
bitfld.long 0x4 5. "PU5,When set each bit activates the pull-up on PA5 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD5 bit is also set." "0,1"
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bitfld.long 0x4 4. "PU4,When set each bit activates the pull-up on PA4 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD4 bit is also set." "0,1"
bitfld.long 0x4 3. "PU3,When set each bit activates the pull-up on PA3 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD3 bit is also set." "0,1"
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bitfld.long 0x4 2. "PU2,When set each bit activates the pull-up on PA2 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD2 bit is also set." "0,1"
bitfld.long 0x4 1. "PU1,When set each bit activates the pull-up on PA1 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD1 bit is also set." "0,1"
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bitfld.long 0x4 0. "PU0,When set each bit activates the pull-up on PA0 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD0 bit is also set." "0,1"
line.long 0x8 "PWR_PDCRA,PWR port A pull-down control register"
bitfld.long 0x8 14. "PD14,When set each bit activates the pull-down on PA14 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x8 12. "PD12,When set each bit activates the pull-down on PA12 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x8 11. "PD11,When set each bit activates the pull-down on PA11 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x8 10. "PD10,When set each bit activates the pull-down on PA10 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x8 9. "PD9,When set each bit activates the pull-down on PA9 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x8 8. "PD8,When set each bit activates the pull-down on PA8 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x8 7. "PD7,When set each bit activates the pull-down on PA7 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x8 6. "PD6,When set each bit activates the pull-down on PA6 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x8 5. "PD5,When set each bit activates the pull-down on PA5 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x8 4. "PD4,When set each bit activates the pull-down on PA4 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x8 3. "PD3,When set each bit activates the pull-down on PA3 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x8 2. "PD2,When set each bit activates the pull-down on PA2 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x8 1. "PD1,When set each bit activates the pull-down on PA1 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x8 0. "PD0,When set each bit activates the pull-down on PA0 when the APC bit is set in PWR_APCR." "0,1"
line.long 0xC "PWR_PUCRB,PWR port B pull-up control register"
bitfld.long 0xC 15. "PU15,When set each bit activates the pull-up on PB15 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD15 bit is also set." "0,1"
bitfld.long 0xC 14. "PU14,When set each bit activates the pull-up on PB14 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD14 bit is also set." "0,1"
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bitfld.long 0xC 13. "PU13,When set each bit activates the pull-up on PB13 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD13 bit is also set." "0,1"
bitfld.long 0xC 12. "PU12,When set each bit activates the pull-up on PB12 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD12 bit is also set." "0,1"
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bitfld.long 0xC 11. "PU11,When set each bit activates the pull-up on PB11 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD11 bit is also set." "0,1"
bitfld.long 0xC 10. "PU10,When set each bit activates the pull-up on PB10 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD10 bit is also set." "0,1"
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bitfld.long 0xC 9. "PU9,When set each bit activates the pull-up on PB9 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD9 bit is also set." "0,1"
bitfld.long 0xC 8. "PU8,When set each bit activates the pull-up on PB8 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD8 bit is also set." "0,1"
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bitfld.long 0xC 7. "PU7,When set each bit activates the pull-up on PB7 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD7 bit is also set." "0,1"
bitfld.long 0xC 6. "PU6,When set each bit activates the pull-up on PB6 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD6 bit is also set." "0,1"
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bitfld.long 0xC 5. "PU5,When set each bit activates the pull-up on PB5 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD5 bit is also set." "0,1"
bitfld.long 0xC 4. "PU4,When set each bit activates the pull-up on PB4 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD4 bit is also set." "0,1"
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bitfld.long 0xC 3. "PU3,When set each bit activates the pull-up on PB3 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD3 bit is also set." "0,1"
bitfld.long 0xC 2. "PU2,When set each bit activates the pull-up on PB2 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD2 bit is also set." "0,1"
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bitfld.long 0xC 1. "PU1,When set each bit activates the pull-up on PB1 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD1 bit is also set." "0,1"
bitfld.long 0xC 0. "PU0,When set each bit activates the pull-up on PB0 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD0 bit is also set." "0,1"
line.long 0x10 "PWR_PDCRB,PWR port B pull-down control register"
bitfld.long 0x10 15. "PD15,When set each bit activates the pull-down on PB15 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x10 14. "PD14,When set each bit activates the pull-down on PB14 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x10 13. "PD13,When set each bit activates the pull-down on PB13 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x10 12. "PD12,When set each bit activates the pull-down on PB12 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x10 11. "PD11,When set each bit activates the pull-down on PB11 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x10 10. "PD10,When set each bit activates the pull-down on PB10 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x10 9. "PD9,When set each bit activates the pull-down on PB9 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x10 8. "PD8,When set each bit activates the pull-down on PB8 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x10 7. "PD7,When set each bit activates the pull-down on PB7 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x10 6. "PD6,When set each bit activates the pull-down on PB6 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x10 5. "PD5,When set each bit activates the pull-down on PB5 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x10 3. "PD3,When set each bit activates the pull-down on PB3 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x10 2. "PD2,When set each bit activates the pull-down on PB2 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x10 1. "PD1,When set each bit activates the pull-down on PB1 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x10 0. "PD0,When set each bit activates the pull-down on PB0 when the APC bit is set in PWR_APCR." "0,1"
line.long 0x14 "PWR_PUCRC,PWR port C pull-up control register"
bitfld.long 0x14 15. "PU15,When set each bit activates the pull-up on PC15 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD15 bit is also set." "0,1"
bitfld.long 0x14 14. "PU14,When set each bit activates the pull-up on PC14 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD14 bit is also set." "0,1"
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bitfld.long 0x14 13. "PU13,When set each bit activates the pull-up on PC13 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD13 bit is also set." "0,1"
bitfld.long 0x14 12. "PU12,When set each bit activates the pull-up on PC12 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD12 bit is also set." "0,1"
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bitfld.long 0x14 11. "PU11,When set each bit activates the pull-up on PC11 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD11 bit is also set." "0,1"
bitfld.long 0x14 10. "PU10,When set each bit activates the pull-up on PC10 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD10 bit is also set." "0,1"
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bitfld.long 0x14 9. "PU9,When set each bit activates the pull-up on PC9 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD9 bit is also set." "0,1"
bitfld.long 0x14 8. "PU8,When set each bit activates the pull-up on PC8 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD8 bit is also set." "0,1"
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bitfld.long 0x14 7. "PU7,When set each bit activates the pull-up on PC7 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD7 bit is also set." "0,1"
bitfld.long 0x14 6. "PU6,When set each bit activates the pull-up on PC6 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD6 bit is also set." "0,1"
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bitfld.long 0x14 5. "PU5,When set each bit activates the pull-up on PC5 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD5 bit is also set." "0,1"
bitfld.long 0x14 4. "PU4,When set each bit activates the pull-up on PC4 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD4 bit is also set." "0,1"
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bitfld.long 0x14 3. "PU3,When set each bit activates the pull-up on PC3 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD3 bit is also set." "0,1"
bitfld.long 0x14 2. "PU2,When set each bit activates the pull-up on PC2 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD2 bit is also set." "0,1"
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bitfld.long 0x14 1. "PU1,When set each bit activates the pull-up on PC1 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD1 bit is also set." "0,1"
bitfld.long 0x14 0. "PU0,When set each bit activates the pull-up on PC0 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD0 bit is also set." "0,1"
line.long 0x18 "PWR_PDCRC,PWR port C pull-down control register"
bitfld.long 0x18 15. "PD15,When set each bit activates the pull-down on PC15 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x18 14. "PD14,When set each bit activates the pull-down on PC14 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x18 13. "PD13,When set each bit activates the pull-down on PC13 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x18 12. "PD12,When set each bit activates the pull-down on PC12 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x18 11. "PD11,When set each bit activates the pull-down on PC11 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x18 10. "PD10,When set each bit activates the pull-down on PC10 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x18 9. "PD9,When set each bit activates the pull-down on PC9 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x18 8. "PD8,When set each bit activates the pull-down on PC8 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x18 7. "PD7,When set each bit activates the pull-down on PC7 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x18 6. "PD6,When set each bit activates the pull-down on PC6 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x18 5. "PD5,When set each bit activates the pull-down on PC5 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x18 4. "PD4,When set each bit activates the pull-down on PC4 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x18 3. "PD3,When set each bit activates the pull-down on PC3 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x18 2. "PD2,When set each bit activates the pull-down on PC2 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x18 1. "PD1,When set each bit activates the pull-down on PC1 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x18 0. "PD0,When set each bit activates the pull-down on PC0 when the APC bit is set in PWR_APCR." "0,1"
line.long 0x1C "PWR_PUCRD,PWR port D pull-up control register"
bitfld.long 0x1C 15. "PU15,When set each bit activates the pull-up on PD15 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD15 bit is also set." "0,1"
bitfld.long 0x1C 14. "PU14,When set each bit activates the pull-up on PD14 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD14 bit is also set." "0,1"
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bitfld.long 0x1C 13. "PU13,When set each bit activates the pull-up on PD13 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD13 bit is also set." "0,1"
bitfld.long 0x1C 12. "PU12,When set each bit activates the pull-up on PD12 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD12 bit is also set." "0,1"
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bitfld.long 0x1C 11. "PU11,When set each bit activates the pull-up on PD11 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD11 bit is also set." "0,1"
bitfld.long 0x1C 10. "PU10,When set each bit activates the pull-up on PD10 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD10 bit is also set." "0,1"
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bitfld.long 0x1C 9. "PU9,When set each bit activates the pull-up on PD9 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD9 bit is also set." "0,1"
bitfld.long 0x1C 8. "PU8,When set each bit activates the pull-up on PD8 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD8 bit is also set." "0,1"
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bitfld.long 0x1C 7. "PU7,When set each bit activates the pull-up on PD7 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD7 bit is also set." "0,1"
bitfld.long 0x1C 6. "PU6,When set each bit activates the pull-up on PD6 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD6 bit is also set." "0,1"
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bitfld.long 0x1C 5. "PU5,When set each bit activates the pull-up on PD5 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD5 bit is also set." "0,1"
bitfld.long 0x1C 4. "PU4,When set each bit activates the pull-up on PD4 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD4 bit is also set." "0,1"
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bitfld.long 0x1C 3. "PU3,When set each bit activates the pull-up on PD3 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD3 bit is also set." "0,1"
bitfld.long 0x1C 2. "PU2,When set each bit activates the pull-up on PD2 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD2 bit is also set." "0,1"
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bitfld.long 0x1C 1. "PU1,When set each bit activates the pull-up on PD1 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD1 bit is also set." "0,1"
bitfld.long 0x1C 0. "PU0,When set each bit activates the pull-up on PD0 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD0 bit is also set." "0,1"
line.long 0x20 "PWR_PDCRD,PWR port D pull-down control register"
bitfld.long 0x20 15. "PD15,When set each bit activates the pull-down on PD15 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x20 14. "PD14,When set each bit activates the pull-down on PD14 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x20 13. "PD13,When set each bit activates the pull-down on PD13 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x20 12. "PD12,When set each bit activates the pull-down on PD12 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x20 11. "PD11,When set each bit activates the pull-down on PD11 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x20 10. "PD10,When set each bit activates the pull-down on PD10 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x20 9. "PD9,When set each bit activates the pull-down on PD9 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x20 8. "PD8,When set each bit activates the pull-down on PD8 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x20 7. "PD7,When set each bit activates the pull-down on PD7 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x20 6. "PD6,When set each bit activates the pull-down on PD6 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x20 5. "PD5,When set each bit activates the pull-down on PD5 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x20 4. "PD4,When set each bit activates the pull-down on PD4 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x20 3. "PD3,When set each bit activates the pull-down on PD3 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x20 2. "PD2,When set each bit activates the pull-down on PD2 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x20 1. "PD1,When set each bit activates the pull-down on PD1 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x20 0. "PD0,When set each bit activates the pull-down on PD0 when the APC bit is set in PWR_APCR." "0,1"
line.long 0x24 "PWR_PUCRE,PWR port E pull-up control register"
bitfld.long 0x24 15. "PU15,When set each bit activates the pull-up on PE15 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD15 bit is also set." "0,1"
bitfld.long 0x24 14. "PU14,When set each bit activates the pull-up on PE14 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD14 bit is also set." "0,1"
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bitfld.long 0x24 13. "PU13,When set each bit activates the pull-up on PE13 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD13 bit is also set." "0,1"
bitfld.long 0x24 12. "PU12,When set each bit activates the pull-up on PE12 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD12 bit is also set." "0,1"
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bitfld.long 0x24 11. "PU11,When set each bit activates the pull-up on PE11 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD11 bit is also set." "0,1"
bitfld.long 0x24 10. "PU10,When set each bit activates the pull-up on PE10 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD10 bit is also set." "0,1"
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bitfld.long 0x24 9. "PU9,When set each bit activates the pull-up on PE9 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD9 bit is also set." "0,1"
bitfld.long 0x24 8. "PU8,When set each bit activates the pull-up on PE8 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD8 bit is also set." "0,1"
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bitfld.long 0x24 7. "PU7,When set each bit activates the pull-up on PE7 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD7 bit is also set." "0,1"
bitfld.long 0x24 6. "PU6,When set each bit activates the pull-up on PE6 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD6 bit is also set." "0,1"
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bitfld.long 0x24 5. "PU5,When set each bit activates the pull-up on PE5 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD5 bit is also set." "0,1"
bitfld.long 0x24 4. "PU4,When set each bit activates the pull-up on PE4 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD4 bit is also set." "0,1"
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bitfld.long 0x24 3. "PU3,When set each bit activates the pull-up on PE3 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD3 bit is also set." "0,1"
bitfld.long 0x24 2. "PU2,When set each bit activates the pull-up on PE2 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD2 bit is also set." "0,1"
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bitfld.long 0x24 1. "PU1,When set each bit activates the pull-up on PE1 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD1 bit is also set." "0,1"
bitfld.long 0x24 0. "PU0,When set each bit activates the pull-up on PE0 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD0 bit is also set." "0,1"
line.long 0x28 "PWR_PDCRE,PWR port E pull-down control register"
bitfld.long 0x28 15. "PD15,When set each bit activates the pull-down on PE15 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x28 14. "PD14,When set each bit activates the pull-down on PE14 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x28 13. "PD13,When set each bit activates the pull-down on PE13 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x28 12. "PD12,When set each bit activates the pull-down on PE12 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x28 11. "PD11,When set each bit activates the pull-down on PE11 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x28 10. "PD10,When set each bit activates the pull-down on PE10 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x28 9. "PD9,When set each bit activates the pull-down on PE9 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x28 8. "PD8,When set each bit activates the pull-down on PE8 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x28 7. "PD7,When set each bit activates the pull-down on PE7 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x28 6. "PD6,When set each bit activates the pull-down on PE6 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x28 5. "PD5,When set each bit activates the pull-down on PE5 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x28 4. "PD4,When set each bit activates the pull-down on PE4 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x28 3. "PD3,When set each bit activates the pull-down on PE3 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x28 2. "PD2,When set each bit activates the pull-down on PE2 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x28 1. "PD1,When set each bit activates the pull-down on PE1 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x28 0. "PD0,When set each bit activates the pull-down on PE0 when the APC bit is set in PWR_APCR." "0,1"
group.long 0x80++0xF
line.long 0x0 "PWR_PUCRG,PWR port G pull-up control register"
bitfld.long 0x0 15. "PU15,When set each bit activates the pull-up on PG15 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD15 bit is also set." "0,1"
bitfld.long 0x0 14. "PU14,When set each bit activates the pull-up on PG14 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD14 bit is also set." "0,1"
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bitfld.long 0x0 13. "PU13,When set each bit activates the pull-up on PG13 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD13 bit is also set." "0,1"
bitfld.long 0x0 12. "PU12,When set each bit activates the pull-up on PG12 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD12 bit is also set." "0,1"
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bitfld.long 0x0 11. "PU11,When set each bit activates the pull-up on PG11 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD11 bit is also set." "0,1"
bitfld.long 0x0 10. "PU10,When set each bit activates the pull-up on PG10 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD10 bit is also set." "0,1"
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bitfld.long 0x0 9. "PU9,When set each bit activates the pull-up on PG9 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD9 bit is also set." "0,1"
bitfld.long 0x0 8. "PU8,When set each bit activates the pull-up on PG8 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD8 bit is also set." "0,1"
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bitfld.long 0x0 7. "PU7,When set each bit activates the pull-up on PG7 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD7 bit is also set." "0,1"
bitfld.long 0x0 6. "PU6,When set each bit activates the pull-up on PG6 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD6 bit is also set." "0,1"
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bitfld.long 0x0 5. "PU5,When set each bit activates the pull-up on PG5 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD5 bit is also set." "0,1"
bitfld.long 0x0 4. "PU4,When set each bit activates the pull-up on PG4 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD4 bit is also set." "0,1"
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bitfld.long 0x0 3. "PU3,When set each bit activates the pull-up on PG3 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD3 bit is also set." "0,1"
bitfld.long 0x0 2. "PU2,When set each bit activates the pull-up on PG2 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD2 bit is also set." "0,1"
line.long 0x4 "PWR_PDCRG,PWR port G pull-down control register"
bitfld.long 0x4 15. "PD15,When set each bit activates the pull-down on PG15 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x4 14. "PD14,When set each bit activates the pull-down on PG14 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x4 13. "PD13,When set each bit activates the pull-down on PG13 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x4 12. "PD12,When set each bit activates the pull-down on PG12 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x4 11. "PD11,When set each bit activates the pull-down on PG11 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x4 10. "PD10,When set each bit activates the pull-down on PG10 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x4 9. "PD9,When set each bit activates the pull-down on PG9 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x4 8. "PD8,When set each bit activates the pull-down on PG8 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x4 7. "PD7,When set each bit activates the pull-down on PG7 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x4 6. "PD6,When set each bit activates the pull-down on PG6 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x4 5. "PD5,When set each bit activates the pull-down on PG5 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x4 4. "PD4,When set each bit activates the pull-down on PG4 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x4 3. "PD3,When set each bit activates the pull-down on PG3 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x4 2. "PD2,When set each bit activates the pull-down on PG2 when the APC bit is set in PWR_APCR." "0,1"
line.long 0x8 "PWR_PUCRH,PWR port H pull-up control register"
bitfld.long 0x8 3. "PU3,When set each bit activates the pull-up on PH3 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD3 bit is also set." "0,1"
bitfld.long 0x8 1. "PU1,When set each bit activates the pull-up on PH1 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD1 bit is also set." "0,1"
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bitfld.long 0x8 0. "PU0,When set each bit activates the pull-up on PH0 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD0 bit is also set." "0,1"
line.long 0xC "PWR_PDCRH,PWR port H pull-down control register"
bitfld.long 0xC 3. "PD3,When set each bit activates the pull-down on PH3 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0xC 1. "PD1,When set each bit activates the pull-down on PH1 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0xC 0. "PD0,When set each bit activates the pull-down on PH0 when the APC bit is set in PWR_APCR." "0,1"
group.long 0xB0++0x7
line.long 0x0 "PWR_I3CPUCR1,PWR I3C pull-up control register 1"
bitfld.long 0x0 11. "PB14_I3CPU,When set the bit activates the I3C pull-up on PB14." "0,1"
bitfld.long 0x0 10. "PB13_I3CPU,When set the bit activates the I3C pull-up on PB13." "0,1"
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bitfld.long 0x0 9. "PB12_I3CPU,When set the bit activates the I3C pull-up on PB12." "0,1"
bitfld.long 0x0 8. "PB10_I3CPU,When set the bit activates the I3C pull-up on PB10." "0,1"
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bitfld.long 0x0 7. "PB9_I3CPU,When set the bit activates the I3C pull-up on PB9." "0,1"
bitfld.long 0x0 6. "PB8_I3CPU,When set the bit activates the I3C pull-up on PB8." "0,1"
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bitfld.long 0x0 5. "PB6_I3CPU,When set the bit activates the I3C pull-up on PB6." "0,1"
bitfld.long 0x0 4. "PB2_I3CPU,When set the bit activates the I3C pull-up on PB2." "0,1"
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bitfld.long 0x0 2. "PA7_I3CPU,When set the bit activates the I3C pull-up on PA7." "0,1"
bitfld.long 0x0 1. "PA6_I3CPU,When set the bit activates the I3C pull-up on PA6." "0,1"
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bitfld.long 0x0 0. "PA1_I3CPU,When set the bit activates the I3C pull-up on PA1." "0,1"
line.long 0x4 "PWR_I3CPUCR2,PWR I3C pull-up control register 2"
bitfld.long 0x4 11. "PH3_I3CPU,When set the bit activates the I3C pull-up on PH3." "0,1"
bitfld.long 0x4 9. "PG14_I3CPU,When set the bit activates the I3C pull-up on PG14." "0,1"
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bitfld.long 0x4 8. "PG13_I3CPU,When set the bit activates the I3C pull-up on PG13." "0,1"
bitfld.long 0x4 7. "PG8_I3CPU,When set the bit activates the I3C pull-up on PG8." "0,1"
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bitfld.long 0x4 6. "PG7_I3CPU,When set the bit activates the I3C pull-up on PG7." "0,1"
bitfld.long 0x4 4. "PD13_I3CPU,When set the bit activates the I3C pull-up on PD13." "0,1"
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bitfld.long 0x4 3. "PD12_I3CPU,When set the bit activates the I3C pull-up on PD12." "0,1"
bitfld.long 0x4 1. "PC1_I3CPU,When set the bit activates the I3C pull-up on PC1." "0,1"
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bitfld.long 0x4 0. "PC0_I3CPU,When set the bit activates the I3C pull-up on PC0." "0,1"
tree.end
tree "SEC_PWR"
base ad:0x50030800
group.long 0x0++0x1F
line.long 0x0 "PWR_CR1,PWR control register 1"
bitfld.long 0x0 9. "SRAM2PD,This bit is used to reduce the consumption by powering off the SRAM2." "0: SRAM2 powered on,1: SRAM2 powered off"
bitfld.long 0x0 8. "SRAM1PD,This bit is used to reduce the consumption by powering off the SRAM1." "0: SRAM1 powered on,1: SRAM1 powered off"
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bitfld.long 0x0 7. "ULPMEN,This bit is used to reduce the consumption by configuring the BOR in discontinuous mode. This bit has effect only when the BOR level 0 is selected and when the device is in Standby mode. This bit must be set to reach the lowest power consumption.." "0: BOR level 0 operating in continuous,1: BOR level 0 operating in discontinuous"
bitfld.long 0x0 6. "RRSB3,This bit is used to keep the SRAM2 page 3 content in Standby mode. The SRAM2 page 3 corresponds to the last 32 Kbytes of the SRAM2" "0: SRAM2 page3 content not retained in Standby mode,1: SRAM2 page3 content retained in Standby mode"
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bitfld.long 0x0 5. "RRSB2,This bit is used to keep the SRAM2 page 2 content in Standby mode. The SRAM2 page 2 corresponds to the 24 Kbytes of the SRAM2" "0: SRAM2 page2 content not retained in Standby mode,1: SRAM2 page2 content retained in Standby mode"
bitfld.long 0x0 4. "RRSB1,This bit is used to keep the SRAM2 page 1 content in Standby mode. The SRAM2 page 1 corresponds to the first 8 Kbytes of the SRAM2" "0: SRAM2 page1 content not retained in Standby mode,1: SRAM2 page1 content retained in Standby mode"
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bitfld.long 0x0 0.--2. "LPMS,These bits select the low-power mode entered when the CPU enters the Deepsleep mode." "0: Stop 0 mode,1: Stop 1 mode,2: Stop 2 mode,3: Stop 3 mode,4: Standby mode,5: Standby mode,6: Shutdown mode,7: Shutdown mode"
line.long 0x4 "PWR_CR2,PWR control register 2"
bitfld.long 0x4 29. "FLASHFWU,This bit is used to obtain the best trade-off between low-power consumption and wakeup time when exiting the Stop 0 or Stop 1 modes." "0: Flash memory enters low-power mode in Stop 0 and..,1: Flash memory remains in normal mode in Stop 0.."
bitfld.long 0x4 28. "SRAMFWU,This bit is used to obtain the best trade-off between low-power consumption and wakeup time. SRAMs wakeup time increases the wakeup time when exiting Stop 0 and 1 modes " "0: SRAMs enters low-power mode in Stop 0 and Stop 1..,1: SRAMs remains in normal mode in Stop 0 and Stop.."
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bitfld.long 0x4 27. "PKARAMPDS,None" "0: PKA SRAM content retained in Stop modes,1: PKA SRAM content lost in Stop modes"
bitfld.long 0x4 26. "PRAMPDS,None" "0: FDCAN and USB peripherals SRAM content retained..,1: FDCAN and USB peripherals SRAM content lost in.."
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bitfld.long 0x4 25. "ICRAMPDS,None" "0: ICACHE SRAM content retained in Stop modes,1: ICACHE SRAM content lost in Stop modes"
bitfld.long 0x4 18. "SRAM2PDS3,None" "0: SRAM2 page 3 content retained in Stop modes,1: SRAM2 page 3 content lost in Stop modes"
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bitfld.long 0x4 17. "SRAM2PDS2,None" "0: SRAM2 page 2 content retained in Stop modes,1: SRAM2 page 2 content lost in Stop modes"
bitfld.long 0x4 16. "SRAM2PDS1,None" "0: SRAM2 page 1 content retained in Stop modes,1: SRAM2 page 1 content lost in Stop modes"
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bitfld.long 0x4 6. "SRAM1PDS7,None" "0: SRAM1 page 7 content retained in Stop modes,1: SRAM1 page 7 content lost in Stop modes"
bitfld.long 0x4 5. "SRAM1PDS6,None" "0: SRAM1 page 6 content retained in Stop modes,1: SRAM1 page 6 content lost in Stop modes"
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bitfld.long 0x4 4. "SRAM1PDS5,None" "0: SRAM1 page 5 content retained in Stop modes,1: SRAM1 page 5 content lost in Stop modes"
bitfld.long 0x4 3. "SRAM1PDS4,None" "0: SRAM1 page 4 content retained in Stop modes,1: SRAM1 page 4 content lost in Stop modes"
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bitfld.long 0x4 2. "SRAM1PDS3,None" "0: SRAM1 page 3 content retained in Stop modes,1: SRAM1 page 3 content lost in Stop modes"
bitfld.long 0x4 1. "SRAM1PDS2,None" "0: SRAM1 page 2 content retained in Stop modes,1: SRAM1 page 2 content lost in Stop modes"
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bitfld.long 0x4 0. "SRAM1PDS1,None" "0: SRAM1 page 1 content retained in Stop modes,1: SRAM1 page 1 content lost in Stop modes"
line.long 0x8 "PWR_CR3,PWR control register 3"
bitfld.long 0x8 2. "FSTEN,None" "0: LDO/SMPS fast startup disabled,1: LDO/SMPS fast startup enabled"
bitfld.long 0x8 1. "REGSEL,None" "0: LDO selected,1: SMPS selected"
line.long 0xC "PWR_VOSR,PWR voltage scaling register"
rbitfld.long 0xC 24. "BOOSTRDY,This bit is set to 1 by hardware when the power booster startup time is reached. The system clock frequency can be switched higher than 24 MHz only after this bit is set. Disabling the booster clock when the booster is ready is forbidden." "0: Power booster not ready,1: Power booster ready"
rbitfld.long 0xC 17. "R2RDY,None" "0: Range 2 not ready: voltage level less than VOS..,1: Range 2 ready: voltage level greater or equal.."
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rbitfld.long 0xC 16. "R1RDY,None" "0: Range 1 not ready: voltage level less than VOS..,1: Range 1 ready: voltage level greater or equal.."
bitfld.long 0xC 8. "BOOSTEN,This bit is protected against non-secure access when SYSCLKSEC=1 in RCC_SECCFGR. It is protected against unprivileged access when SYSCLKSEC=1 in RCC_SECCFGR and SPRIV=1 in PWR_PRIVCFGR or when SYSCLKSEC=0 and NSPRIV=1." "0: Booster disabled,1: Booster enabled"
newline
bitfld.long 0xC 1. "R2EN,This field is protected against non-secure access when SYSCLKSEC=1 in RCC_SECCFGR. It is protected against unprivileged access when SYSCLKSEC=1 in RCC_SECCFGR and SPRIV=1 in PWR_PRIVCFGR or when SYSCLKSEC=0 and NSPRIV=1." "0: Voltage scaling range 2 disabled,1: Voltage scaling range 2 enabled"
bitfld.long 0xC 0. "R1EN,This field is protected against non-secure access when SYSCLKSEC=1 in RCC_SECCFGR. It is protected against unprivileged access when SYSCLKSEC=1 in RCC_SECCFGR and SPRIV=1 in PWR_PRIVCFGR or when SYSCLKSEC=0 and NSPRIV=1." "0: Voltage scaling range 1 disabled,1: Voltage scaling range 1 enabled"
line.long 0x10 "PWR_SVMCR,PWR supply voltage monitoring control register"
bitfld.long 0x10 30. "ASV,This bit is used to validate the VDDA supply for electrical and logical isolation purpose." "0: VDDA not present: logical and electrical..,1: VDDA valid"
bitfld.long 0x10 29. "IO2SV,This bit is used to validate the VDDIO2 supply for electrical and logical isolation purpose." "0: VDDIO2 not present: logical and electrical..,1: VDDIO2 valid"
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bitfld.long 0x10 28. "USV,This bit is used to validate the VDDUSB supply for electrical and logical isolation purpose." "0: VDDUSB not present: logical and electrical..,1: VDDUSB valid"
bitfld.long 0x10 27. "AVM2EN,None" "0: VDDA voltage monitor 2 disabled,1: VDDA voltage monitor 2 enabled"
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bitfld.long 0x10 26. "AVM1EN,None" "0: VDDA voltage monitor 1 disabled,1: VDDA voltage monitor 1 enabled"
bitfld.long 0x10 25. "IO2VMEN,None" "0: VDDIO2 voltage monitor disabled,1: VDDIO2 voltage monitor enabled"
newline
bitfld.long 0x10 24. "UVMEN,None" "0: VDDUSB voltage monitor disabled,1: VDDUSB voltage monitor enabled"
bitfld.long 0x10 5.--7. "PVDLS,These bits select the voltage threshold detected by the PVD:" "0: VPVD0 around 2,1: VPVD1 around 2,2: VPVD2 around 2.4V,3: VPVD3 around 2.5V,4: VPVD4 around 2.6V,5: VPVD5 around 2.8V,6: VPVD6 around 2.9V,7: External input analog voltage PVD_IN (compared.."
newline
bitfld.long 0x10 4. "PVDE,None" "0: PVD disabled,1: PVD enabled"
line.long 0x14 "PWR_WUCR1,PWR wakeup control register 1"
bitfld.long 0x14 9. "WUPEN10,None" "0: Wakeup line WKUP10 disabled,1: Wakeup line WKUP10 enabled"
bitfld.long 0x14 8. "WUPEN9,None" "0: Wakeup line WKUP9 disabled,1: Wakeup line WKUP9 enabled"
newline
bitfld.long 0x14 7. "WUPEN8,None" "0: Wakeup line WKUP8 disabled,1: Wakeup line WKUP8 enabled"
bitfld.long 0x14 6. "WUPEN7,None" "0: Wakeup line WKUP7 disabled,1: Wakeup line WKUP7 enabled"
newline
bitfld.long 0x14 5. "WUPEN6,None" "0: Wakeup line WKUP6 disabled,1: Wakeup line WKUP6 enabled"
bitfld.long 0x14 4. "WUPEN5,None" "0: Wakeup line WKUP5 disabled,1: Wakeup line WKUP5 enabled"
newline
bitfld.long 0x14 3. "WUPEN4,None" "0: Wakeup line WKUP4 disabled,1: Wakeup line WKUP4 enabled"
bitfld.long 0x14 2. "WUPEN3,None" "0: Wakeup line WKUP3 disabled,1: Wakeup line WKUP3 enabled"
newline
bitfld.long 0x14 1. "WUPEN2,None" "0: Wakeup line WKUP2 disabled,1: Wakeup line WKUP2 enabled"
bitfld.long 0x14 0. "WUPEN1,None" "0: Wakeup line WKUP1 disabled,1: Wakeup line WKUP1 enabled"
line.long 0x18 "PWR_WUCR2,PWR wakeup control register 2"
bitfld.long 0x18 7. "WUPP8,This bit must be configured when WUPEN8 = 0. It has no effect when WUSEL8 = 11." "0: Detection on high level,1: Detection on low level"
bitfld.long 0x18 6. "WUPP7,This bit must be configured when WUPEN7 = 0. It has no effect when WUSEL7 = 11." "0: Detection on high level,1: Detection on low level"
newline
bitfld.long 0x18 5. "WUPP6,This bit must be configured when WUPEN6 = 0. It has no effect when WUSEL6 = 11." "0: Detection on high level,1: Detection on low level"
bitfld.long 0x18 4. "WUPP5,This bit must be configured when WUPEN5 = 0. It has no effect when WUSEL5 = 11." "0: Detection on high level,1: Detection on low level"
newline
bitfld.long 0x18 3. "WUPP4,This bit must be configured when WUPEN4 = 0. It has no effect when WUSEL4 = 11." "0: Detection on high level,1: Detection on low level"
bitfld.long 0x18 2. "WUPP3,This bit must be configured when WUPEN3 = 0. It has no effect when WUSEL3 = 11." "0: Detection on high level,1: Detection on low level"
newline
bitfld.long 0x18 1. "WUPP2,This bit must be configured when WUPEN2 = 0. It has no effect when WUSEL2 = 11." "0: Detection on high level,1: Detection on low level"
bitfld.long 0x18 0. "WUPP1,This bit must be configured when WUPEN1 = 0. It has no effect when WUSEL1 = 11." "0: Detection on high level,1: Detection on low level"
line.long 0x1C "PWR_WUCR3,PWR wakeup control register 3"
bitfld.long 0x1C 14.--15. "WUSEL8,This field must be configured when WUPEN8 = 0." "0: WKUP8_0,1: WKUP8_1,2: WKUP8_2,3: WKUP8_3"
bitfld.long 0x1C 12.--13. "WUSEL7,This field must be configured when WUPEN7 = 0." "0: WKUP7_0,1: WKUP7_1,2: WKUP7_2,3: WKUP7_3"
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bitfld.long 0x1C 10.--11. "WUSEL6,This field must be configured when WUPEN6 = 0." "0: WKUP6_0,1: WKUP6_1,2: WKUP6_2,3: WKUP6_3"
bitfld.long 0x1C 8.--9. "WUSEL5,This field must be configured when WUPEN5 = 0." "0: WKUP5_0,1: WKUP5_1,2: WKUP5_2,3: WKUP5_3"
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bitfld.long 0x1C 6.--7. "WUSEL4,This field must be configured when WUPEN4 = 0." "0: WKUP4_0,1: WKUP4_1,2: WKUP4_2,3: WKUP4_3"
bitfld.long 0x1C 4.--5. "WUSEL3,This field must be configured when WUPEN3 = 0." "0: WKUP3_0,1: WKUP3_1,2: WKUP3_2,3: WKUP3_3"
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bitfld.long 0x1C 2.--3. "WUSEL2,This field must be configured when WUPEN2 = 0." "0: WKUP2_0,1: WKUP2_1,2: WKUP2_2,3: WKUP2_3"
bitfld.long 0x1C 0.--1. "WUSEL1,This field must be configured when WUPEN1 = 0." "0: WKUP1_0,1: WKUP1_1,2: WKUP1_2,3: WKUP1_3"
group.long 0x24++0x7
line.long 0x0 "PWR_BDCR,PWR Backup domain control register"
bitfld.long 0x0 1. "VBRS,None" "0: Charge VBAT through a 5 k ohm resistor,1: Charge VBAT through a 1"
bitfld.long 0x0 0. "VBE,None" "0: VBAT battery charging disabled,1: VBAT battery charging enabled"
line.long 0x4 "PWR_DBPR,PWR disable Backup domain register"
bitfld.long 0x4 0. "DBP,In reset state all registers and SRAM in Backup domain are protected against parasitic write access. This bit must be set to enable the write access to these registers." "0: Write access to Backup domain disabled,1: Write access to Backup domain enabled"
group.long 0x30++0xB
line.long 0x0 "PWR_SECCFGR,PWR security configuration register"
bitfld.long 0x0 15. "APCSEC,None" "0: PWR_APCR can be read and written with secure or..,1: PWR_APCR can be read and written only with.."
bitfld.long 0x0 14. "VBSEC,None" "0: PWR_BDCR and PWR_DBPR can be read and written..,1: PWR_BDCR and PWR_DBPR can be read and written.."
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bitfld.long 0x0 13. "VDMSEC,None" "0: PWR_SVMCR and PWR_CR3 can be read and written..,1: PWR_SVMCR and PWR_CR3 can be read and written.."
bitfld.long 0x0 12. "LPMSEC,None" "0: PWR_CR1,1: PWR_CR1"
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bitfld.long 0x0 9. "WUP10SEC,None" "0: Bits related to the WKUP10 line in PWR_WUCR1,1: Bits related to the WKUP10 line in PWR_WUCR1"
bitfld.long 0x0 8. "WUP9SEC,None" "0: Bits related to the WKUP9 line in PWR_WUCR1,1: Bits related to the WKUP9 line in PWR_WUCR1"
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bitfld.long 0x0 7. "WUP8SEC,None" "0: Bits related to the WKUP8 line in PWR_WUCR1,1: Bits related to the WKUP8 line in PWR_WUCR1"
bitfld.long 0x0 6. "WUP7SEC,None" "0: Bits related to the WKUP7 line in PWR_WUCR1,1: Bits related to the WKUP7 line in PWR_WUCR1"
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bitfld.long 0x0 5. "WUP6SEC,None" "0: Bits related to the WKUP6 line in PWR_WUCR1,1: Bits related to the WKUP6 line in PWR_WUCR1"
bitfld.long 0x0 4. "WUP5SEC,None" "0: Bits related to the WKUP5 line in PWR_WUCR1,1: Bits related to the WKUP5 line in PWR_WUCR1"
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bitfld.long 0x0 3. "WUP4SEC,None" "0: Bits related to the WKUP4 line in PWR_WUCR1,1: Bits related to the WKUP4 line in PWR_WUCR1"
bitfld.long 0x0 2. "WUP3SEC,None" "0: Bits related to the WKUP3 line in PWR_WUCR1,1: Bits related to the WKUP3 line in PWR_WUCR1"
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bitfld.long 0x0 1. "WUP2SEC,None" "0: Bits related to the WKUP2 line in PWR_WUCR1,1: Bits related to the WKUP2 line in PWR_WUCR1"
bitfld.long 0x0 0. "WUP1SEC,None" "0: Bits related to the WKUP1 line in PWR_WUCR1,1: Bits related to the WKUP1 line in PWR_WUCR1"
line.long 0x4 "PWR_PRIVCFGR,PWR privilege control register"
bitfld.long 0x4 1. "NSPRIV,This bit is set and reset by software. It can be written only by privileged access secure or non-secure." "0: Read and write to PWR non-secure functions can..,1: Read and write to PWR non-secure functions can.."
bitfld.long 0x4 0. "SPRIV,This bit is set and reset by software. It can be written only by a secure privileged access." "0: Read and write to PWR secure functions can be..,1: Read and write to PWR secure functions can be.."
line.long 0x8 "PWR_SR,PWR status register"
rbitfld.long 0x8 2. "SBF,This bit is set by hardware when the device enters the Standby mode and is cleared by writing 1 to the CSSF bit or by a power-on reset. It is not cleared by the system reset." "0: The device did not enter Standby mode,1: The device entered Standby mode"
rbitfld.long 0x8 1. "STOPF,This bit is set by hardware when the device enters a Stop mode and is cleared by software by writing 1 to the CSSF bit." "0: The device did not enter any Stop mode,1: The device entered a Stop mode"
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bitfld.long 0x8 0. "CSSF,This bit is protected against non-secure access when LPMSEC=1 in PWR_SECCFGR." "0,1"
rgroup.long 0x3C++0x3
line.long 0x0 "PWR_SVMSR,PWR supply voltage monitoring status register"
bitfld.long 0x0 27. "VDDA2RDY,None" "0: VDDA is below the threshold of the VDDA voltage..,1: VDDA is equal or above the threshold of the VDDA.."
bitfld.long 0x0 26. "VDDA1RDY,None" "0: VDDA is below the threshold of the VDDA voltage..,1: VDDA is equal or above the threshold of the VDDA.."
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bitfld.long 0x0 25. "VDDIO2RDY,None" "0: VDDIO2 is below the threshold of the VDDIO2..,1: VDDIO2 is equal or above the threshold of the.."
bitfld.long 0x0 24. "VDDUSBRDY,None" "0: VDDUSB is below the threshold of the VDDUSB..,1: VDDUSB is equal or above the threshold of the.."
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bitfld.long 0x0 4. "PVDO,None" "0: VDD is equal or above the PVD threshold selected..,1: VDD is below the PVD threshold selected by.."
bitfld.long 0x0 1. "REGS,None" "0: LDO selected,1: SMPS selected"
rgroup.long 0x44++0x3
line.long 0x0 "PWR_WUSR,PWR wakeup status register"
bitfld.long 0x0 9. "WUF10,This bit is set when a wakeup event is detected on WKUP10 line. This bit is cleared by writing 1 in the CWUF10 bit of PWR_WUSCR when WUSEL different 11 or by hardware when WUPEN10=0. If WUSEL = 11 this bit is cleared by hardware when all.." "0,1"
bitfld.long 0x0 8. "WUF9,This bit is set when a wakeup event is detected on WKUP9 line. This bit is cleared by writing 1 in the CWUF9 bit of PWR_WUSCR when WUSEL different 11 or by hardware when WUPEN9=0. If WUSEL = 11 this bit is cleared by hardware when all internal.." "0,1"
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bitfld.long 0x0 7. "WUF8,This bit is set when a wakeup event is detected on WKUP8 line. This bit is cleared by writing 1 in the CWUF8 bit of PWR_WUSCR when WUSEL different 11 or by hardware when WUPEN8=0. If WUSEL = 11 this bit is cleared by hardware when all internal.." "0,1"
bitfld.long 0x0 6. "WUF7,This bit is set when a wakeup event is detected on WKUP7 line. This bit is cleared by writing 1 in the CWUF7 bit of PWR_WUSCR when WUSEL different 11 or by hardware when WUPEN7=0. If WUSEL = 11 this bit is cleared by hardware when all internal.." "0,1"
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bitfld.long 0x0 5. "WUF6,This bit is set when a wakeup event is detected on WKUP6 line. This bit is cleared by writing 1 in the CWUF6 bit of PWR_WUSCR when WUSEL different 11 or by hardware when WUPEN6=0. If WUSEL = 11 this bit is cleared by hardware when all internal.." "0,1"
bitfld.long 0x0 4. "WUF5,This bit is set when a wakeup event is detected on WKUP5 line. This bit is cleared by writing 1 in the CWUF5 bit of PWR_WUSCR when WUSEL different 11 or by hardware when WUPEN5=0. If WUSEL = 11 this bit is cleared by hardware when all internal.." "0,1"
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bitfld.long 0x0 3. "WUF4,This bit is set when a wakeup event is detected on WKUP4 line. This bit is cleared by writing 1 in the CWUF4 bit of PWR_WUSCR when WUSEL different 11 or by hardware when WUPEN4=0. If WUSEL = 11 this bit is cleared by hardware when all internal.." "0,1"
bitfld.long 0x0 2. "WUF3,This bit is set when a wakeup event is detected on WKUP3 line. This bit is cleared by writing 1 in the CWUF3 bit of PWR_WUSCR when WUSEL different 11 or by hardware when WUPEN3=0. If WUSEL = 11 this bit is cleared by hardware when all internal.." "0,1"
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bitfld.long 0x0 1. "WUF2,This bit is set when a wakeup event is detected on WKUP2 line. This bit is cleared by writing 1 in the CWUF2 bit of PWR_WUSCR when WUSEL different 11 or by hardware when WUPEN2=0. If WUSEL = 11 this bit is cleared by hardware when all internal.." "0,1"
bitfld.long 0x0 0. "WUF1,This bit is set when a wakeup event is detected on WKUP1 line. This bit is cleared by writing 1 in the CWUF1 bit of PWR_WUSCR when WUSEL different 11 or by hardware when WUPEN1=0. If WUSEL = 11 this bit is cleared by hardware when all internal.." "0,1"
wgroup.long 0x48++0x3
line.long 0x0 "PWR_WUSCR,PWR wakeup status clear register"
bitfld.long 0x0 9. "CWUF10,Writing 1 to this bit clears the WUF10 flag in PWR_WUSR." "0,1"
bitfld.long 0x0 8. "CWUF9,Writing 1 to this bit clears the WUF9 flag in PWR_WUSR." "0,1"
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bitfld.long 0x0 7. "CWUF8,Writing 1 to this bit clears the WUF8 flag in PWR_WUSR." "0,1"
bitfld.long 0x0 6. "CWUF7,Writing 1 to this bit clears the WUF7 flag in PWR_WUSR." "0,1"
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bitfld.long 0x0 5. "CWUF6,Writing 1 to this bit clears the WUF6 flag in PWR_WUSR." "0,1"
bitfld.long 0x0 4. "CWUF5,Writing 1 to this bit clears the WUF5 flag in PWR_WUSR." "0,1"
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bitfld.long 0x0 3. "CWUF4,Writing 1 to this bit clears the WUF4 flag in PWR_WUSR." "0,1"
bitfld.long 0x0 2. "CWUF3,Writing 1 to this bit clears the WUF3 flag in PWR_WUSR." "0,1"
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bitfld.long 0x0 1. "CWUF2,Writing 1 to this bit clears the WUF2 flag in PWR_WUSR." "0,1"
bitfld.long 0x0 0. "CWUF1,Writing 1 to this bit clears the WUF1 flag in PWR_WUSR." "0,1"
group.long 0x4C++0x2B
line.long 0x0 "PWR_APCR,PWR apply pull configuration register"
bitfld.long 0x0 0. "APC,When this bit is set the I/O pull-up and pull-down configurations defined in PWR_PUCRx and PWR_PDCRx are applied. When this bit is cleared PWR_PUCRx and PWR_PDCRx are not applied to the I/Os." "0,1"
line.long 0x4 "PWR_PUCRA,PWR port A pull-up control register"
bitfld.long 0x4 15. "PU15,When set each bit activates the pull-up on PA15 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD15 bit is also set." "0,1"
bitfld.long 0x4 13. "PU13,When set each bit activates the pull-up on PA13 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD13 bit is also set." "0,1"
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bitfld.long 0x4 12. "PU12,When set each bit activates the pull-up on PA12 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD12 bit is also set." "0,1"
bitfld.long 0x4 11. "PU11,When set each bit activates the pull-up on PA11 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD11 bit is also set." "0,1"
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bitfld.long 0x4 10. "PU10,When set each bit activates the pull-up on PA10 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD10 bit is also set." "0,1"
bitfld.long 0x4 9. "PU9,When set each bit activates the pull-up on PA9 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD9 bit is also set." "0,1"
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bitfld.long 0x4 8. "PU8,When set each bit activates the pull-up on PA8 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD8 bit is also set." "0,1"
bitfld.long 0x4 7. "PU7,When set each bit activates the pull-up on PA7 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD7 bit is also set." "0,1"
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bitfld.long 0x4 6. "PU6,When set each bit activates the pull-up on PA6 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD6 bit is also set." "0,1"
bitfld.long 0x4 5. "PU5,When set each bit activates the pull-up on PA5 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD5 bit is also set." "0,1"
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bitfld.long 0x4 4. "PU4,When set each bit activates the pull-up on PA4 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD4 bit is also set." "0,1"
bitfld.long 0x4 3. "PU3,When set each bit activates the pull-up on PA3 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD3 bit is also set." "0,1"
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bitfld.long 0x4 2. "PU2,When set each bit activates the pull-up on PA2 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD2 bit is also set." "0,1"
bitfld.long 0x4 1. "PU1,When set each bit activates the pull-up on PA1 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD1 bit is also set." "0,1"
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bitfld.long 0x4 0. "PU0,When set each bit activates the pull-up on PA0 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD0 bit is also set." "0,1"
line.long 0x8 "PWR_PDCRA,PWR port A pull-down control register"
bitfld.long 0x8 14. "PD14,When set each bit activates the pull-down on PA14 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x8 12. "PD12,When set each bit activates the pull-down on PA12 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x8 11. "PD11,When set each bit activates the pull-down on PA11 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x8 10. "PD10,When set each bit activates the pull-down on PA10 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x8 9. "PD9,When set each bit activates the pull-down on PA9 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x8 8. "PD8,When set each bit activates the pull-down on PA8 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x8 7. "PD7,When set each bit activates the pull-down on PA7 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x8 6. "PD6,When set each bit activates the pull-down on PA6 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x8 5. "PD5,When set each bit activates the pull-down on PA5 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x8 4. "PD4,When set each bit activates the pull-down on PA4 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x8 3. "PD3,When set each bit activates the pull-down on PA3 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x8 2. "PD2,When set each bit activates the pull-down on PA2 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x8 1. "PD1,When set each bit activates the pull-down on PA1 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x8 0. "PD0,When set each bit activates the pull-down on PA0 when the APC bit is set in PWR_APCR." "0,1"
line.long 0xC "PWR_PUCRB,PWR port B pull-up control register"
bitfld.long 0xC 15. "PU15,When set each bit activates the pull-up on PB15 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD15 bit is also set." "0,1"
bitfld.long 0xC 14. "PU14,When set each bit activates the pull-up on PB14 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD14 bit is also set." "0,1"
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bitfld.long 0xC 13. "PU13,When set each bit activates the pull-up on PB13 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD13 bit is also set." "0,1"
bitfld.long 0xC 12. "PU12,When set each bit activates the pull-up on PB12 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD12 bit is also set." "0,1"
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bitfld.long 0xC 11. "PU11,When set each bit activates the pull-up on PB11 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD11 bit is also set." "0,1"
bitfld.long 0xC 10. "PU10,When set each bit activates the pull-up on PB10 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD10 bit is also set." "0,1"
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bitfld.long 0xC 9. "PU9,When set each bit activates the pull-up on PB9 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD9 bit is also set." "0,1"
bitfld.long 0xC 8. "PU8,When set each bit activates the pull-up on PB8 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD8 bit is also set." "0,1"
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bitfld.long 0xC 7. "PU7,When set each bit activates the pull-up on PB7 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD7 bit is also set." "0,1"
bitfld.long 0xC 6. "PU6,When set each bit activates the pull-up on PB6 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD6 bit is also set." "0,1"
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bitfld.long 0xC 5. "PU5,When set each bit activates the pull-up on PB5 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD5 bit is also set." "0,1"
bitfld.long 0xC 4. "PU4,When set each bit activates the pull-up on PB4 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD4 bit is also set." "0,1"
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bitfld.long 0xC 3. "PU3,When set each bit activates the pull-up on PB3 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD3 bit is also set." "0,1"
bitfld.long 0xC 2. "PU2,When set each bit activates the pull-up on PB2 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD2 bit is also set." "0,1"
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bitfld.long 0xC 1. "PU1,When set each bit activates the pull-up on PB1 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD1 bit is also set." "0,1"
bitfld.long 0xC 0. "PU0,When set each bit activates the pull-up on PB0 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD0 bit is also set." "0,1"
line.long 0x10 "PWR_PDCRB,PWR port B pull-down control register"
bitfld.long 0x10 15. "PD15,When set each bit activates the pull-down on PB15 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x10 14. "PD14,When set each bit activates the pull-down on PB14 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x10 13. "PD13,When set each bit activates the pull-down on PB13 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x10 12. "PD12,When set each bit activates the pull-down on PB12 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x10 11. "PD11,When set each bit activates the pull-down on PB11 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x10 10. "PD10,When set each bit activates the pull-down on PB10 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x10 9. "PD9,When set each bit activates the pull-down on PB9 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x10 8. "PD8,When set each bit activates the pull-down on PB8 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x10 7. "PD7,When set each bit activates the pull-down on PB7 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x10 6. "PD6,When set each bit activates the pull-down on PB6 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x10 5. "PD5,When set each bit activates the pull-down on PB5 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x10 3. "PD3,When set each bit activates the pull-down on PB3 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x10 2. "PD2,When set each bit activates the pull-down on PB2 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x10 1. "PD1,When set each bit activates the pull-down on PB1 when the APC bit is set in PWR_APCR." "0,1"
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bitfld.long 0x10 0. "PD0,When set each bit activates the pull-down on PB0 when the APC bit is set in PWR_APCR." "0,1"
line.long 0x14 "PWR_PUCRC,PWR port C pull-up control register"
bitfld.long 0x14 15. "PU15,When set each bit activates the pull-up on PC15 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD15 bit is also set." "0,1"
bitfld.long 0x14 14. "PU14,When set each bit activates the pull-up on PC14 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD14 bit is also set." "0,1"
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bitfld.long 0x14 13. "PU13,When set each bit activates the pull-up on PC13 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD13 bit is also set." "0,1"
bitfld.long 0x14 12. "PU12,When set each bit activates the pull-up on PC12 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD12 bit is also set." "0,1"
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bitfld.long 0x14 11. "PU11,When set each bit activates the pull-up on PC11 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD11 bit is also set." "0,1"
bitfld.long 0x14 10. "PU10,When set each bit activates the pull-up on PC10 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD10 bit is also set." "0,1"
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bitfld.long 0x14 9. "PU9,When set each bit activates the pull-up on PC9 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD9 bit is also set." "0,1"
bitfld.long 0x14 8. "PU8,When set each bit activates the pull-up on PC8 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD8 bit is also set." "0,1"
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bitfld.long 0x14 7. "PU7,When set each bit activates the pull-up on PC7 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD7 bit is also set." "0,1"
bitfld.long 0x14 6. "PU6,When set each bit activates the pull-up on PC6 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD6 bit is also set." "0,1"
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bitfld.long 0x14 5. "PU5,When set each bit activates the pull-up on PC5 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD5 bit is also set." "0,1"
bitfld.long 0x14 4. "PU4,When set each bit activates the pull-up on PC4 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD4 bit is also set." "0,1"
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bitfld.long 0x14 3. "PU3,When set each bit activates the pull-up on PC3 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD3 bit is also set." "0,1"
bitfld.long 0x14 2. "PU2,When set each bit activates the pull-up on PC2 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD2 bit is also set." "0,1"
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bitfld.long 0x14 1. "PU1,When set each bit activates the pull-up on PC1 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD1 bit is also set." "0,1"
bitfld.long 0x14 0. "PU0,When set each bit activates the pull-up on PC0 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD0 bit is also set." "0,1"
line.long 0x18 "PWR_PDCRC,PWR port C pull-down control register"
bitfld.long 0x18 15. "PD15,When set each bit activates the pull-down on PC15 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x18 14. "PD14,When set each bit activates the pull-down on PC14 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x18 13. "PD13,When set each bit activates the pull-down on PC13 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x18 12. "PD12,When set each bit activates the pull-down on PC12 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x18 11. "PD11,When set each bit activates the pull-down on PC11 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x18 10. "PD10,When set each bit activates the pull-down on PC10 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x18 9. "PD9,When set each bit activates the pull-down on PC9 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x18 8. "PD8,When set each bit activates the pull-down on PC8 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x18 7. "PD7,When set each bit activates the pull-down on PC7 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x18 6. "PD6,When set each bit activates the pull-down on PC6 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x18 5. "PD5,When set each bit activates the pull-down on PC5 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x18 4. "PD4,When set each bit activates the pull-down on PC4 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x18 3. "PD3,When set each bit activates the pull-down on PC3 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x18 2. "PD2,When set each bit activates the pull-down on PC2 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x18 1. "PD1,When set each bit activates the pull-down on PC1 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x18 0. "PD0,When set each bit activates the pull-down on PC0 when the APC bit is set in PWR_APCR." "0,1"
line.long 0x1C "PWR_PUCRD,PWR port D pull-up control register"
bitfld.long 0x1C 15. "PU15,When set each bit activates the pull-up on PD15 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD15 bit is also set." "0,1"
bitfld.long 0x1C 14. "PU14,When set each bit activates the pull-up on PD14 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD14 bit is also set." "0,1"
newline
bitfld.long 0x1C 13. "PU13,When set each bit activates the pull-up on PD13 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD13 bit is also set." "0,1"
bitfld.long 0x1C 12. "PU12,When set each bit activates the pull-up on PD12 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD12 bit is also set." "0,1"
newline
bitfld.long 0x1C 11. "PU11,When set each bit activates the pull-up on PD11 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD11 bit is also set." "0,1"
bitfld.long 0x1C 10. "PU10,When set each bit activates the pull-up on PD10 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD10 bit is also set." "0,1"
newline
bitfld.long 0x1C 9. "PU9,When set each bit activates the pull-up on PD9 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD9 bit is also set." "0,1"
bitfld.long 0x1C 8. "PU8,When set each bit activates the pull-up on PD8 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD8 bit is also set." "0,1"
newline
bitfld.long 0x1C 7. "PU7,When set each bit activates the pull-up on PD7 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD7 bit is also set." "0,1"
bitfld.long 0x1C 6. "PU6,When set each bit activates the pull-up on PD6 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD6 bit is also set." "0,1"
newline
bitfld.long 0x1C 5. "PU5,When set each bit activates the pull-up on PD5 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD5 bit is also set." "0,1"
bitfld.long 0x1C 4. "PU4,When set each bit activates the pull-up on PD4 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD4 bit is also set." "0,1"
newline
bitfld.long 0x1C 3. "PU3,When set each bit activates the pull-up on PD3 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD3 bit is also set." "0,1"
bitfld.long 0x1C 2. "PU2,When set each bit activates the pull-up on PD2 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD2 bit is also set." "0,1"
newline
bitfld.long 0x1C 1. "PU1,When set each bit activates the pull-up on PD1 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD1 bit is also set." "0,1"
bitfld.long 0x1C 0. "PU0,When set each bit activates the pull-up on PD0 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD0 bit is also set." "0,1"
line.long 0x20 "PWR_PDCRD,PWR port D pull-down control register"
bitfld.long 0x20 15. "PD15,When set each bit activates the pull-down on PD15 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x20 14. "PD14,When set each bit activates the pull-down on PD14 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x20 13. "PD13,When set each bit activates the pull-down on PD13 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x20 12. "PD12,When set each bit activates the pull-down on PD12 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x20 11. "PD11,When set each bit activates the pull-down on PD11 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x20 10. "PD10,When set each bit activates the pull-down on PD10 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x20 9. "PD9,When set each bit activates the pull-down on PD9 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x20 8. "PD8,When set each bit activates the pull-down on PD8 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x20 7. "PD7,When set each bit activates the pull-down on PD7 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x20 6. "PD6,When set each bit activates the pull-down on PD6 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x20 5. "PD5,When set each bit activates the pull-down on PD5 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x20 4. "PD4,When set each bit activates the pull-down on PD4 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x20 3. "PD3,When set each bit activates the pull-down on PD3 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x20 2. "PD2,When set each bit activates the pull-down on PD2 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x20 1. "PD1,When set each bit activates the pull-down on PD1 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x20 0. "PD0,When set each bit activates the pull-down on PD0 when the APC bit is set in PWR_APCR." "0,1"
line.long 0x24 "PWR_PUCRE,PWR port E pull-up control register"
bitfld.long 0x24 15. "PU15,When set each bit activates the pull-up on PE15 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD15 bit is also set." "0,1"
bitfld.long 0x24 14. "PU14,When set each bit activates the pull-up on PE14 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD14 bit is also set." "0,1"
newline
bitfld.long 0x24 13. "PU13,When set each bit activates the pull-up on PE13 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD13 bit is also set." "0,1"
bitfld.long 0x24 12. "PU12,When set each bit activates the pull-up on PE12 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD12 bit is also set." "0,1"
newline
bitfld.long 0x24 11. "PU11,When set each bit activates the pull-up on PE11 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD11 bit is also set." "0,1"
bitfld.long 0x24 10. "PU10,When set each bit activates the pull-up on PE10 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD10 bit is also set." "0,1"
newline
bitfld.long 0x24 9. "PU9,When set each bit activates the pull-up on PE9 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD9 bit is also set." "0,1"
bitfld.long 0x24 8. "PU8,When set each bit activates the pull-up on PE8 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD8 bit is also set." "0,1"
newline
bitfld.long 0x24 7. "PU7,When set each bit activates the pull-up on PE7 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD7 bit is also set." "0,1"
bitfld.long 0x24 6. "PU6,When set each bit activates the pull-up on PE6 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD6 bit is also set." "0,1"
newline
bitfld.long 0x24 5. "PU5,When set each bit activates the pull-up on PE5 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD5 bit is also set." "0,1"
bitfld.long 0x24 4. "PU4,When set each bit activates the pull-up on PE4 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD4 bit is also set." "0,1"
newline
bitfld.long 0x24 3. "PU3,When set each bit activates the pull-up on PE3 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD3 bit is also set." "0,1"
bitfld.long 0x24 2. "PU2,When set each bit activates the pull-up on PE2 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD2 bit is also set." "0,1"
newline
bitfld.long 0x24 1. "PU1,When set each bit activates the pull-up on PE1 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD1 bit is also set." "0,1"
bitfld.long 0x24 0. "PU0,When set each bit activates the pull-up on PE0 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD0 bit is also set." "0,1"
line.long 0x28 "PWR_PDCRE,PWR port E pull-down control register"
bitfld.long 0x28 15. "PD15,When set each bit activates the pull-down on PE15 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x28 14. "PD14,When set each bit activates the pull-down on PE14 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x28 13. "PD13,When set each bit activates the pull-down on PE13 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x28 12. "PD12,When set each bit activates the pull-down on PE12 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x28 11. "PD11,When set each bit activates the pull-down on PE11 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x28 10. "PD10,When set each bit activates the pull-down on PE10 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x28 9. "PD9,When set each bit activates the pull-down on PE9 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x28 8. "PD8,When set each bit activates the pull-down on PE8 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x28 7. "PD7,When set each bit activates the pull-down on PE7 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x28 6. "PD6,When set each bit activates the pull-down on PE6 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x28 5. "PD5,When set each bit activates the pull-down on PE5 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x28 4. "PD4,When set each bit activates the pull-down on PE4 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x28 3. "PD3,When set each bit activates the pull-down on PE3 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x28 2. "PD2,When set each bit activates the pull-down on PE2 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x28 1. "PD1,When set each bit activates the pull-down on PE1 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x28 0. "PD0,When set each bit activates the pull-down on PE0 when the APC bit is set in PWR_APCR." "0,1"
group.long 0x80++0xF
line.long 0x0 "PWR_PUCRG,PWR port G pull-up control register"
bitfld.long 0x0 15. "PU15,When set each bit activates the pull-up on PG15 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD15 bit is also set." "0,1"
bitfld.long 0x0 14. "PU14,When set each bit activates the pull-up on PG14 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD14 bit is also set." "0,1"
newline
bitfld.long 0x0 13. "PU13,When set each bit activates the pull-up on PG13 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD13 bit is also set." "0,1"
bitfld.long 0x0 12. "PU12,When set each bit activates the pull-up on PG12 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD12 bit is also set." "0,1"
newline
bitfld.long 0x0 11. "PU11,When set each bit activates the pull-up on PG11 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD11 bit is also set." "0,1"
bitfld.long 0x0 10. "PU10,When set each bit activates the pull-up on PG10 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD10 bit is also set." "0,1"
newline
bitfld.long 0x0 9. "PU9,When set each bit activates the pull-up on PG9 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD9 bit is also set." "0,1"
bitfld.long 0x0 8. "PU8,When set each bit activates the pull-up on PG8 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD8 bit is also set." "0,1"
newline
bitfld.long 0x0 7. "PU7,When set each bit activates the pull-up on PG7 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD7 bit is also set." "0,1"
bitfld.long 0x0 6. "PU6,When set each bit activates the pull-up on PG6 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD6 bit is also set." "0,1"
newline
bitfld.long 0x0 5. "PU5,When set each bit activates the pull-up on PG5 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD5 bit is also set." "0,1"
bitfld.long 0x0 4. "PU4,When set each bit activates the pull-up on PG4 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD4 bit is also set." "0,1"
newline
bitfld.long 0x0 3. "PU3,When set each bit activates the pull-up on PG3 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD3 bit is also set." "0,1"
bitfld.long 0x0 2. "PU2,When set each bit activates the pull-up on PG2 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD2 bit is also set." "0,1"
line.long 0x4 "PWR_PDCRG,PWR port G pull-down control register"
bitfld.long 0x4 15. "PD15,When set each bit activates the pull-down on PG15 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x4 14. "PD14,When set each bit activates the pull-down on PG14 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x4 13. "PD13,When set each bit activates the pull-down on PG13 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x4 12. "PD12,When set each bit activates the pull-down on PG12 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x4 11. "PD11,When set each bit activates the pull-down on PG11 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x4 10. "PD10,When set each bit activates the pull-down on PG10 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x4 9. "PD9,When set each bit activates the pull-down on PG9 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x4 8. "PD8,When set each bit activates the pull-down on PG8 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x4 7. "PD7,When set each bit activates the pull-down on PG7 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x4 6. "PD6,When set each bit activates the pull-down on PG6 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x4 5. "PD5,When set each bit activates the pull-down on PG5 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x4 4. "PD4,When set each bit activates the pull-down on PG4 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0x4 3. "PD3,When set each bit activates the pull-down on PG3 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0x4 2. "PD2,When set each bit activates the pull-down on PG2 when the APC bit is set in PWR_APCR." "0,1"
line.long 0x8 "PWR_PUCRH,PWR port H pull-up control register"
bitfld.long 0x8 3. "PU3,When set each bit activates the pull-up on PH3 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD3 bit is also set." "0,1"
bitfld.long 0x8 1. "PU1,When set each bit activates the pull-up on PH1 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD1 bit is also set." "0,1"
newline
bitfld.long 0x8 0. "PU0,When set each bit activates the pull-up on PH0 when the APC bit is set in PWR_APCR. The pull-up is not activated if the corresponding PD0 bit is also set." "0,1"
line.long 0xC "PWR_PDCRH,PWR port H pull-down control register"
bitfld.long 0xC 3. "PD3,When set each bit activates the pull-down on PH3 when the APC bit is set in PWR_APCR." "0,1"
bitfld.long 0xC 1. "PD1,When set each bit activates the pull-down on PH1 when the APC bit is set in PWR_APCR." "0,1"
newline
bitfld.long 0xC 0. "PD0,When set each bit activates the pull-down on PH0 when the APC bit is set in PWR_APCR." "0,1"
group.long 0xB0++0x7
line.long 0x0 "PWR_I3CPUCR1,PWR I3C pull-up control register 1"
bitfld.long 0x0 11. "PB14_I3CPU,When set the bit activates the I3C pull-up on PB14." "0,1"
bitfld.long 0x0 10. "PB13_I3CPU,When set the bit activates the I3C pull-up on PB13." "0,1"
newline
bitfld.long 0x0 9. "PB12_I3CPU,When set the bit activates the I3C pull-up on PB12." "0,1"
bitfld.long 0x0 8. "PB10_I3CPU,When set the bit activates the I3C pull-up on PB10." "0,1"
newline
bitfld.long 0x0 7. "PB9_I3CPU,When set the bit activates the I3C pull-up on PB9." "0,1"
bitfld.long 0x0 6. "PB8_I3CPU,When set the bit activates the I3C pull-up on PB8." "0,1"
newline
bitfld.long 0x0 5. "PB6_I3CPU,When set the bit activates the I3C pull-up on PB6." "0,1"
bitfld.long 0x0 4. "PB2_I3CPU,When set the bit activates the I3C pull-up on PB2." "0,1"
newline
bitfld.long 0x0 2. "PA7_I3CPU,When set the bit activates the I3C pull-up on PA7." "0,1"
bitfld.long 0x0 1. "PA6_I3CPU,When set the bit activates the I3C pull-up on PA6." "0,1"
newline
bitfld.long 0x0 0. "PA1_I3CPU,When set the bit activates the I3C pull-up on PA1." "0,1"
line.long 0x4 "PWR_I3CPUCR2,PWR I3C pull-up control register 2"
bitfld.long 0x4 11. "PH3_I3CPU,When set the bit activates the I3C pull-up on PH3." "0,1"
bitfld.long 0x4 9. "PG14_I3CPU,When set the bit activates the I3C pull-up on PG14." "0,1"
newline
bitfld.long 0x4 8. "PG13_I3CPU,When set the bit activates the I3C pull-up on PG13." "0,1"
bitfld.long 0x4 7. "PG8_I3CPU,When set the bit activates the I3C pull-up on PG8." "0,1"
newline
bitfld.long 0x4 6. "PG7_I3CPU,When set the bit activates the I3C pull-up on PG7." "0,1"
bitfld.long 0x4 4. "PD13_I3CPU,When set the bit activates the I3C pull-up on PD13." "0,1"
newline
bitfld.long 0x4 3. "PD12_I3CPU,When set the bit activates the I3C pull-up on PD12." "0,1"
bitfld.long 0x4 1. "PC1_I3CPU,When set the bit activates the I3C pull-up on PC1." "0,1"
newline
bitfld.long 0x4 0. "PC0_I3CPU,When set the bit activates the I3C pull-up on PC0." "0,1"
tree.end
tree.end
tree "RAMCFG (RAM Configuration Controller)"
base ad:0x0
tree "RAMCFG"
base ad:0x40026000
group.long 0x0++0x3
line.long 0x0 "RAMCFG_M1CR,RAMCFG memory 1 control register"
bitfld.long 0x0 8. "SRAMER,SRAM erase" "0: No erase operation ongoing,1: Erase operation ongoing"
rgroup.long 0x8++0x3
line.long 0x0 "RAMCFG_M1ISR,RAMCFG memory 1 interrupt status register"
bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "0: No erase operation ongoing,1: Erase operation ongoing"
wgroup.long 0x28++0x3
line.long 0x0 "RAMCFG_M1ERKEYR,RAMCFG memory 1 erase key register"
hexmask.long.byte 0x0 0.--7. 1. "ERASEKEY,Erase write protection key"
group.long 0x40++0x7
line.long 0x0 "RAMCFG_M2CR,RAMCFG memory 2 control register"
bitfld.long 0x0 8. "SRAMER,SRAM erase" "0: No erase operation ongoing,1: Erase operation ongoing"
bitfld.long 0x0 4. "ALE,Address latch enable in case of parity error" "0: Failing address not stored in the SRAM2 parity..,1: Failing address stored in the SRAM2 parity error.."
newline
bitfld.long 0x0 0. "PCE,Parity check enable" "0: Parity check disabled,1: Parity check enabled"
line.long 0x4 "RAMCFG_M2IER,RAMCFG memory 2 interrupt enable register"
bitfld.long 0x4 3. "PENMI,Parity error NMI" "0: NMI not generated in case of Parity error,1: NMI generated in case of Parity error"
bitfld.long 0x4 0. "PEIE,Parity error interrupt enable" "0: Parity error interrupt disabled,1: Parity error interrupt enabled"
rgroup.long 0x48++0x3
line.long 0x0 "RAMCFG_M2ISR,RAMCFG memory 2 interrupt status register"
bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "0: No erase operation ongoing,1: Erase operation ongoing"
bitfld.long 0x0 1. "PED,Parity error detected" "0: No Parity error detected,1: Parity error detected"
rgroup.long 0x50++0x3
line.long 0x0 "RAMCFG_M2PEAR,RAMCFG memory 2 parity error address register"
hexmask.long 0x0 0.--31. 1. "PEA,Parity error address"
group.long 0x54++0xB
line.long 0x0 "RAMCFG_M2ICR,RAMCFG memory 2 interrupt clear register"
bitfld.long 0x0 1. "CPED,Clear parity error detected" "0,1"
line.long 0x4 "RAMCFG_M2WPR1,RAMCFG memory 2 write protection register 1"
bitfld.long 0x4 31. "P31WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 30. "P30WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 29. "P29WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 28. "P28WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 27. "P27WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 26. "P26WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 25. "P25WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 24. "P24WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 23. "P23WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 22. "P22WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 21. "P21WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 20. "P20WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 19. "P19WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 18. "P18WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 17. "P17WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 16. "P16WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 15. "P15WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 14. "P14WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 13. "P13WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 12. "P12WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 11. "P11WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 10. "P10WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 9. "P9WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 8. "P8WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 7. "P7WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 6. "P6WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 5. "P5WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 4. "P4WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 3. "P3WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 2. "P2WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 1. "P1WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 0. "P0WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
line.long 0x8 "RAMCFG_M2WPR2,RAMCFG memory 2 write protection register 2"
bitfld.long 0x8 31. "P63WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 30. "P62WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x8 29. "P61WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 28. "P60WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x8 27. "P59WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 26. "P58WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x8 25. "P57WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 24. "P56WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x8 23. "P55WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 22. "P54WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x8 21. "P53WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 20. "P52WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x8 19. "P51WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 18. "P50WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x8 17. "P49WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 16. "P48WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x8 15. "P47WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 14. "P46WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x8 13. "P45WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 12. "P44WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x8 11. "P43WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 10. "P42WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x8 9. "P41WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 8. "P40WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x8 7. "P39WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 6. "P38WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x8 5. "P37WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 4. "P36WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x8 3. "P35WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 2. "P34WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x8 1. "P33WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 0. "P32WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
wgroup.long 0x64++0x7
line.long 0x0 "RAMCFG_M2PARKEYR,RAMCFG memory 2 parity key register"
hexmask.long.byte 0x0 0.--7. 1. "PARKEY,Parity write protection key"
line.long 0x4 "RAMCFG_M2ERKEYR,RAMCFG memory 2 erase key register"
hexmask.long.byte 0x4 0.--7. 1. "ERASEKEY,Erase write protection key"
tree.end
tree "SEC_RAMCFG"
base ad:0x50026000
group.long 0x0++0x3
line.long 0x0 "RAMCFG_M1CR,RAMCFG memory 1 control register"
bitfld.long 0x0 8. "SRAMER,SRAM erase" "0: No erase operation ongoing,1: Erase operation ongoing"
rgroup.long 0x8++0x3
line.long 0x0 "RAMCFG_M1ISR,RAMCFG memory 1 interrupt status register"
bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "0: No erase operation ongoing,1: Erase operation ongoing"
wgroup.long 0x28++0x3
line.long 0x0 "RAMCFG_M1ERKEYR,RAMCFG memory 1 erase key register"
hexmask.long.byte 0x0 0.--7. 1. "ERASEKEY,Erase write protection key"
group.long 0x40++0x7
line.long 0x0 "RAMCFG_M2CR,RAMCFG memory 2 control register"
bitfld.long 0x0 8. "SRAMER,SRAM erase" "0: No erase operation ongoing,1: Erase operation ongoing"
bitfld.long 0x0 4. "ALE,Address latch enable in case of parity error" "0: Failing address not stored in the SRAM2 parity..,1: Failing address stored in the SRAM2 parity error.."
newline
bitfld.long 0x0 0. "PCE,Parity check enable" "0: Parity check disabled,1: Parity check enabled"
line.long 0x4 "RAMCFG_M2IER,RAMCFG memory 2 interrupt enable register"
bitfld.long 0x4 3. "PENMI,Parity error NMI" "0: NMI not generated in case of Parity error,1: NMI generated in case of Parity error"
bitfld.long 0x4 0. "PEIE,Parity error interrupt enable" "0: Parity error interrupt disabled,1: Parity error interrupt enabled"
rgroup.long 0x48++0x3
line.long 0x0 "RAMCFG_M2ISR,RAMCFG memory 2 interrupt status register"
bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation" "0: No erase operation ongoing,1: Erase operation ongoing"
bitfld.long 0x0 1. "PED,Parity error detected" "0: No Parity error detected,1: Parity error detected"
rgroup.long 0x50++0x3
line.long 0x0 "RAMCFG_M2PEAR,RAMCFG memory 2 parity error address register"
hexmask.long 0x0 0.--31. 1. "PEA,Parity error address"
group.long 0x54++0xB
line.long 0x0 "RAMCFG_M2ICR,RAMCFG memory 2 interrupt clear register"
bitfld.long 0x0 1. "CPED,Clear parity error detected" "0,1"
line.long 0x4 "RAMCFG_M2WPR1,RAMCFG memory 2 write protection register 1"
bitfld.long 0x4 31. "P31WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 30. "P30WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 29. "P29WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 28. "P28WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 27. "P27WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 26. "P26WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 25. "P25WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 24. "P24WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 23. "P23WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 22. "P22WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 21. "P21WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 20. "P20WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 19. "P19WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 18. "P18WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 17. "P17WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 16. "P16WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 15. "P15WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 14. "P14WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 13. "P13WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 12. "P12WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 11. "P11WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 10. "P10WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 9. "P9WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 8. "P8WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 7. "P7WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 6. "P6WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 5. "P5WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 4. "P4WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 3. "P3WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 2. "P2WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x4 1. "P1WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x4 0. "P0WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
line.long 0x8 "RAMCFG_M2WPR2,RAMCFG memory 2 write protection register 2"
bitfld.long 0x8 31. "P63WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 30. "P62WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x8 29. "P61WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 28. "P60WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x8 27. "P59WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 26. "P58WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x8 25. "P57WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 24. "P56WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x8 23. "P55WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 22. "P54WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
newline
bitfld.long 0x8 21. "P53WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 20. "P52WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
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bitfld.long 0x8 19. "P51WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 18. "P50WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
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bitfld.long 0x8 17. "P49WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 16. "P48WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
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bitfld.long 0x8 15. "P47WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 14. "P46WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
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bitfld.long 0x8 13. "P45WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 12. "P44WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
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bitfld.long 0x8 11. "P43WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 10. "P42WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
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bitfld.long 0x8 9. "P41WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 8. "P40WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
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bitfld.long 0x8 7. "P39WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 6. "P38WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
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bitfld.long 0x8 5. "P37WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 4. "P36WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
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bitfld.long 0x8 3. "P35WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 2. "P34WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
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bitfld.long 0x8 1. "P33WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
bitfld.long 0x8 0. "P32WP,SRAM2 1-Kbyte page y write protection" "0: Write protection of SRAM2 1-Kbyte page y is..,1: Write protection of SRAM2 1-Kbyte page y is.."
wgroup.long 0x64++0x7
line.long 0x0 "RAMCFG_M2PARKEYR,RAMCFG memory 2 parity key register"
hexmask.long.byte 0x0 0.--7. 1. "PARKEY,Parity write protection key"
line.long 0x4 "RAMCFG_M2ERKEYR,RAMCFG memory 2 erase key register"
hexmask.long.byte 0x4 0.--7. 1. "ERASEKEY,Erase write protection key"
tree.end
tree.end
tree "RCC (Reset and Clock Control)"
base ad:0x0
tree "RCC"
base ad:0x40030C00
group.long 0x0++0x3
line.long 0x0 "RCC_CR,RCC clock control register"
bitfld.long 0x0 20. "HSEExT,HSE external clock bypass mode" "0: External HSE clock analog mode,1: External HSE clock digital mode (through I/O.."
bitfld.long 0x0 19. "HSECSSON,Clock security system enable" "0: Clock security system OFF (clock detector OFF),1: Clock security system ON (clock detector ON if.."
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bitfld.long 0x0 18. "HSEBYP,HSE crystal oscillator bypass" "0: HSE crystal oscillator not bypassed,1: HSE crystal oscillator bypassed with external.."
rbitfld.long 0x0 17. "HSERDY,HSE clock ready flag" "0: HSE oscillator not ready,1: HSE oscillator ready"
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bitfld.long 0x0 16. "HSEON,HSE clock enable" "0: HSE oscillator OFF,1: HSE oscillator ON"
rbitfld.long 0x0 15. "HSI48RDY,HSI48 clock ready flag" "0: HSI48 oscillator not ready,1: HSI48 oscillator ready"
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bitfld.long 0x0 14. "HSI48ON,HSI48 clock enable" "0: HSI48 oscillator OFF,1: HSI48 oscillator ON"
rbitfld.long 0x0 13. "HSIRDY,HSI16 clock ready flag" "0: HSI16 oscillator not ready,1: HSI16 oscillator ready"
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bitfld.long 0x0 12. "HSIKERON,HSI16 enable for some peripheral kernels" "0: No effect on HSI16 oscillator,1: HSI16 oscillator forced ON even in Stop mode"
bitfld.long 0x0 11. "HSION,HSI16 clock enable" "0: HSI16 oscillator OFF,1: HSI16 oscillator ON"
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rbitfld.long 0x0 10. "MSIPLL0RDY,MSIRC0 PLL mode ready flag" "0: MSIRC0 PLL mode is not ready,1: MSIRC0 PLL mode is ready"
rbitfld.long 0x0 9. "MSIPLL1RDY,MSIRC1 PLL mode ready flag" "0: MSIRC1 PLL mode is not ready,1: MSIRC1 PLL mode is ready"
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bitfld.long 0x0 8. "MSIPLL0FAST,MSIRC0 PLL mode fast startup" "0: MSIRC0 PLL normal startup,1: MSIRC0 PLL fast startup"
bitfld.long 0x0 7. "MSIPLL1FAST,MSIRC1 PLL mode fast startup" "0: MSIRC1 PLL normal startup,1: MSIRC1 PLL fast startup"
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bitfld.long 0x0 6. "MSIPLL0EN,MSIRC0 PLL mode enable" "0: MSIRC0 PLL mode disabled,1: MSIRC0 PLL mode enabled"
bitfld.long 0x0 5. "MSIPLL1EN,MSIRC1 PLL mode enable" "0: MSIRC1 PLL mode disabled,1: MSIRC1 PLL mode enabled"
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rbitfld.long 0x0 4. "MSIKRDY,MSIK clock ready flag" "0: MSIK (MSI kernel) oscillator not ready,1: MSIK (MSI kernel) oscillator ready"
bitfld.long 0x0 3. "MSIKON,MSIK clock enable" "0: MSIK (MSI kernel) oscillator disabled,1: MSIK (MSI kernel) oscillator enabled"
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rbitfld.long 0x0 2. "MSISRDY,MSIS clock ready flag" "0: MSIS (MSI system) oscillator not ready,1: MSIS (MSI system) oscillator ready"
bitfld.long 0x0 1. "MSIKERON,MSI enable for some peripheral kernels" "0: No effect on MSI oscillator,1: MSI oscillator forced ON even in Stop mode."
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bitfld.long 0x0 0. "MSISON,MSIS clock enable" "0: MSIS (MSI system) oscillator OFF,1: MSIS (MSI system) oscillator ON"
group.long 0x8++0xB
line.long 0x0 "RCC_ICSCR1,RCC internal clock source calibration register 1"
bitfld.long 0x0 31. "MSISSEL,MSIS clock source selection" "0: MSIRC0 (96 MHz) is selected as source to..,1: MSIRC1 (24 MHz) is selected as source to.."
bitfld.long 0x0 29.--30. "MSISDIV,MSIS oscillator division" "0: MSIRC0/1 is selected for MSIS (range 0 around 96..,1: MSIRC0/2 is selected for MSIS (range 1 around 48..,2: MSIRC0/4 is selected for MSIS (range 2 around 24..,3: MSIRC0/8 is selected for MSIS (range 3 around 12.."
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bitfld.long 0x0 28. "MSIKSEL,MSIK clock source selection" "0: MSIRC0 (96 MHz) is selected as source to..,1: MSIRC1 (24 MHz) is selected as source to.."
bitfld.long 0x0 26.--27. "MSIKDIV,MSIK oscillator division" "0: MSIRC0/1 is selected for MSIK (range 0 around 96..,1: MSIRC0/2 is selected for MSIK (range 1 around 48..,2: MSIRC0/4 is selected for MSIK (range 2 around 24..,3: MSIRC0/8 is selected for MSIK (range 3 around 12.."
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bitfld.long 0x0 24.--25. "MSIPLL1N,MSIRC1 PLL mode with LSE multiplication factor" "0,1,2,3"
bitfld.long 0x0 23. "MSIRGSEL,MSI clock range selection" "0: MSIS/MSIK ranges provided by MSISDIVS[1:0] and..,1: MSIS/MSIK ranges provided by MSISDIV[1:0] and.."
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bitfld.long 0x0 22. "MSIBIAS,MSI bias mode selection" "0: MSI bias continuous mode (clock accuracy fast..,1: MSI bias sampling mode when the device is in.."
bitfld.long 0x0 21. "MSIPLL0SEL,MSIRC0 PLL mode input clock selection" "0: LSE is used as MSIRC0 input clock when PLL mode..,1: HSE or HSE/2 is used as MSIRC0 input clock when.."
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bitfld.long 0x0 20. "MSIPLL1SEL,MSIRC1 PLL mode input clock selection" "0: LSE is used as MSIRC1 input clock when PLL mode..,1: HSE or HSE/2 is used as MSIRC1 input clock when.."
bitfld.long 0x0 19. "MSIHSINDIV,MSIRCx (x = 0 1) PLL mode HSE input division" "0: HSE (16 MHz) is used as MSI input clock when PLL..,1: HSE (32 MHz)/2 is used as MSI input clock when.."
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hexmask.long.byte 0x0 6.--11. 1. "MSICAL0,MSIRC0 clock calibration for MSI ranges 0 to 3"
hexmask.long.byte 0x0 0.--5. 1. "MSICAL1,MSIRC1 clock calibration for MSI ranges 4 to 7"
line.long 0x4 "RCC_ICSCR2,RCC internal clock source calibration register 2"
hexmask.long.byte 0x4 6.--11. 1. "MSITRIM0,MSIRC0 clock trimming for ranges 0 to 3"
hexmask.long.byte 0x4 0.--5. 1. "MSITRIM1,MSIRC1 clock trimming for ranges 4 to 7"
line.long 0x8 "RCC_ICSCR3,RCC internal clock source calibration register 3"
hexmask.long.byte 0x8 16.--20. 1. "HSITRIM,HSI clock trimming"
hexmask.long.word 0x8 0.--11. 1. "HSICAL,HSI clock calibration"
rgroup.long 0x14++0x3
line.long 0x0 "RCC_CRRCR,RCC clock recovery RC register"
hexmask.long.word 0x0 0.--8. 1. "HSI48CAL,HSI48 clock calibration"
group.long 0x1C++0xF
line.long 0x0 "RCC_CFGR1,RCC clock configuration register 1"
bitfld.long 0x0 28.--30. "MCOPRE,Microcontroller clock output prescaler" "0: MCO divided by 1,1: MCO divided by 2,2: MCO divided by 4,3: MCO divided by 8,4: MCO divided by 16,5: MCO divided by 32,6: MCO divided by 64,7: MCO divided by 128"
hexmask.long.byte 0x0 24.--27. 1. "MCOSEL,Microcontroller clock output"
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bitfld.long 0x0 20.--22. "MCO2PRE,Microcontroller clock output 2 prescaler" "0: MCO2 divided by 1,1: MCO2 divided by 2,2: MCO2 divided by 4,3: MCO2 divided by 8,4: MCO2 divided by 16,5: MCO2 divided by 32,6: MCO2 divided by 64,7: MCO2 divided by 128"
hexmask.long.byte 0x0 16.--19. 1. "MCO2SEL,Microcontroller clock output 2"
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bitfld.long 0x0 5. "STOPKERWUCK,Wake-up from Stop kernel clock automatic enable selection" "0: MSIK oscillator automatically enabled when..,1: HSI16 oscillator automatically enabled when.."
bitfld.long 0x0 4. "STOPWUCK,Wake-up from Stop and CSS backup clock selection" "0: MSIS oscillator selected as wake-up from stop..,1: HSI16 oscillator selected as wake-up from stop.."
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rbitfld.long 0x0 2.--3. "SWS,System clock switch status" "0: MSIS oscillator used as system clock,1: HSI16 oscillator used as system clock,2: HSE used as system clock,?"
bitfld.long 0x0 0.--1. "SW,System clock switch" "0: MSIS selected as system clock,1: HSI16 selected as system clock,2: HSE selected as system clock,?"
line.long 0x4 "RCC_CFGR2,RCC clock configuration register 2"
bitfld.long 0x4 8.--10. "PPRE2,APB2 prescaler" "0: PCLK2 = HCLK not divided,1: PCLK2 = HCLK not divided,2: PCLK2 = HCLK not divided,3: PCLK2 = HCLK not divided,4: PCLK2 = HCLK divided by 2,5: PCLK2 = HCLK divided by 4,6: PCLK2 = HCLK divided by 8,7: PCLK2 = HCLK divided by 16"
bitfld.long 0x4 4.--6. "PPRE1,APB1 prescaler" "0: PCLK1 = HCLK not divided,1: PCLK1 = HCLK not divided,2: PCLK1 = HCLK not divided,3: PCLK1 = HCLK not divided,4: PCLK1 = HCLK divided by 2,5: PCLK1 = HCLK divided by 4,6: PCLK1 = HCLK divided by 8,7: PCLK1 = HCLK divided by 16"
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hexmask.long.byte 0x4 0.--3. 1. "HPRE,AHB prescaler"
line.long 0x8 "RCC_CFGR3,RCC clock configuration register 3"
bitfld.long 0x8 4.--6. "PPRE3,APB3 prescaler" "0: PCLK3 = HCLK not divided,1: PCLK3 = HCLK not divided,2: PCLK3 = HCLK not divided,3: PCLK3 = HCLK not divided,4: PCLK3 = HCLK divided by 2,5: PCLK3 = HCLK divided by 4,6: PCLK3 = HCLK divided by 8,7: PCLK3 = HCLK divided by 16"
line.long 0xC "RCC_CFGR4,RCC clock configuration register 4"
hexmask.long.byte 0xC 12.--15. 1. "BOOSTDIV,EPOD booster input clock prescaler"
bitfld.long 0xC 0.--1. "BOOSTSEL,EPOD booster input clock source selection" "0: No clock,1: MSIS selected as EPOD booster clock source,2: HSI16 selected as EPOD booster clock source,3: HSE selected as EPOD booster clock source"
group.long 0x50++0x3
line.long 0x0 "RCC_CIER,RCC clock interrupt enable register"
bitfld.long 0x0 12. "LSECSSIE,LSE clock security system interrupt enable" "0: LSE CSS interrupt disabled,1: LSE CSS interrupt enabled"
bitfld.long 0x0 11. "MSIKRDYIE,MSIK ready interrupt enable" "0: MSIK ready interrupt disabled,1: MSIK ready interrupt enabled"
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bitfld.long 0x0 9. "MSIPLLHSUIE,MSI PLL mode with HSE unlock interrupt enable" "0: MSI PLL mode with HSE unlock interrupt disabled,1: MSI PLL mode with HSE unlock interrupt enabled"
bitfld.long 0x0 8. "MSIPLLUIE,MSI PLL mode with LSE unlock interrupt enable" "0: MSI PLL mode with LSE unlock interrupt disabled,1: MSI PLL mode with LSE unlock interrupt enabled"
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bitfld.long 0x0 7. "MSIPLL0RDYIE,MSIRC0 PLL mode ready interrupt enable" "0: MSIRC0 PLL mode lock interrupt disabled,1: MSIRC0 PLL mode lock interrupt enabled"
bitfld.long 0x0 6. "MSIPLL1RDYIE,MSIRC1 PLL mode ready interrupt enable" "0: MSIRC1 PLL mode lock interrupt disabled,1: MSIRC1 PLL mode lock interrupt enabled"
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bitfld.long 0x0 5. "HSI48RDYIE,HSI48 ready interrupt enable" "0: HSI48 ready interrupt disabled,1: HSI48 ready interrupt enabled"
bitfld.long 0x0 4. "HSERDYIE,HSE ready interrupt enable" "0: HSE ready interrupt disabled,1: HSE ready interrupt enabled"
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bitfld.long 0x0 3. "HSIRDYIE,HSI16 ready interrupt enable" "0: HSI16 ready interrupt disabled,1: HSI16 ready interrupt enabled"
bitfld.long 0x0 2. "MSISRDYIE,MSIS ready interrupt enable" "0: MSIS ready interrupt disabled,1: MSIS ready interrupt enabled"
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bitfld.long 0x0 1. "LSERDYIE,LSE ready interrupt enable" "0: LSE ready interrupt disabled,1: LSE ready interrupt enabled"
bitfld.long 0x0 0. "LSIRDYIE,LSI ready interrupt enable" "0: LSI ready interrupt disabled,1: LSI ready interrupt enabled"
rgroup.long 0x54++0x3
line.long 0x0 "RCC_CIFR,RCC clock interrupt flag register"
bitfld.long 0x0 12. "LSECSSF,LSE clock security system interrupt flag" "0: No LSE clock security interrupt,1: LSE clock security interrupt"
bitfld.long 0x0 11. "MSIKRDYF,MSIK ready interrupt flag" "0: No MSIK oscillator clock ready interrupt,1: MSIK oscillator clock ready interrupt"
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bitfld.long 0x0 10. "CSSF,Clock security system interrupt flag" "0: No HSE clock security interrupt,1: HSE clock security interrupt"
bitfld.long 0x0 9. "MSIPLLHSUF,MSI PLL mode with HSE unlock interrupt flag" "0: No MSI PLL mode with HSE unlock interrupt,1: MSI PLL mode with HSE unlock interrupt"
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bitfld.long 0x0 8. "MSIPLLUF,MSI PLL mode with LSE unlock interrupt flag" "0: No MSI PLL mode with LSE unlock interrupt,1: MSI PLL mode with LSE unlock interrupt"
bitfld.long 0x0 7. "MSIPLL0RDYF,MSIRC0 PLL mode ready interrupt flag" "0: No MSIRC0 PLL mode ready interrupt,1: MSIRC0 PLL mode ready interrupt"
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bitfld.long 0x0 6. "MSIPLL1RDYF,MSIRC1 PLL mode ready interrupt enable" "0: No MSIRC1 PLL mode ready interrupt,1: MSIRC1 PLL mode ready interrupt"
bitfld.long 0x0 5. "HSI48RDYF,HSI48 ready interrupt flag" "0: No HSI48 ready interrupt,1: HSI48 ready interrupt"
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bitfld.long 0x0 4. "HSERDYF,HSE ready interrupt flag" "0: No HSE ready interrupt,1: HSE ready interrupt"
bitfld.long 0x0 3. "HSIRDYF,HSI16 ready interrupt flag" "0: No HSI16 ready interrupt,1: HSI16 ready interrupt"
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bitfld.long 0x0 2. "MSISRDYF,MSIS ready interrupt flag" "0: No MSIS ready interrupt,1: MSIS ready interrupt"
bitfld.long 0x0 1. "LSERDYF,LSE ready interrupt flag" "0: No LSE ready interrupt,1: LSE ready interrupt"
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bitfld.long 0x0 0. "LSIRDYF,LSI ready interrupt flag" "0: No LSI ready interrupt,1: LSI ready interrupt"
wgroup.long 0x58++0x3
line.long 0x0 "RCC_CICR,RCC clock interrupt clear register"
bitfld.long 0x0 12. "LSECSSC,LSE CSS interrupt clear" "0,1"
bitfld.long 0x0 11. "MSIKRDYC,MSIK oscillator ready interrupt clear" "0,1"
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bitfld.long 0x0 10. "CSSC,Clock security system interrupt clear" "0,1"
bitfld.long 0x0 9. "MSIPLLHSUC,MSI PLL mode with HSE unlock interrupt clear" "0,1"
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bitfld.long 0x0 8. "MSIPLLUC,MSI PLL mode with LSE unlock interrupt clear" "0,1"
bitfld.long 0x0 7. "MSIPLL0RDYC,MSIRC0 PLL mode ready interrupt clear" "0,1"
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bitfld.long 0x0 6. "MSIPLL1RDYC,MSIRC1 PLL mode ready interrupt clear" "0,1"
bitfld.long 0x0 5. "HSI48RDYC,HSI48 ready interrupt clear" "0,1"
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bitfld.long 0x0 4. "HSERDYC,HSE ready interrupt clear" "0,1"
bitfld.long 0x0 3. "HSIRDYC,HSI16 ready interrupt clear" "0,1"
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bitfld.long 0x0 2. "MSISRDYC,MSIS ready interrupt clear" "0,1"
bitfld.long 0x0 1. "LSERDYC,LSE ready interrupt clear" "0,1"
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bitfld.long 0x0 0. "LSIRDYC,LSI ready interrupt clear" "0,1"
group.long 0x60++0xB
line.long 0x0 "RCC_AHB1RSTR1,RCC AHB1 peripheral reset register 1"
bitfld.long 0x0 17. "RAMCFGRST,RAMCFG reset" "0: No effect,1: Reset RAMCFG"
bitfld.long 0x0 16. "TSCRST,TSC reset" "0: No effect,1: Reset TSC"
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bitfld.long 0x0 12. "CRCRST,CRC reset" "0: No effect,1: Reset CRC"
bitfld.long 0x0 3. "ADF1RST,ADF1 reset" "0: No effect,1: Reset ADF1"
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bitfld.long 0x0 0. "GPDMA1RST,GPDMA1 reset" "0: No effect,1: Reset GPDMA1"
line.long 0x4 "RCC_AHB2RSTR1,RCC AHB2 peripheral reset register 1"
bitfld.long 0x4 27. "SDMMC1RST,SDMMC1 reset" "0: No effect,1: Reset SDMMC1"
bitfld.long 0x4 21. "CCBRST,CCB reset" "0: No effect,1: Reset CCB"
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bitfld.long 0x4 20. "SAESRST,SAES hardware accelerator reset" "0: No effect,1: Reset SAES"
bitfld.long 0x4 19. "PKARST,PKA reset" "0: No effect,1: Reset PKA"
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bitfld.long 0x4 18. "RNGRST,Random number generator reset" "0: No effect,1: Reset RNG"
bitfld.long 0x4 17. "HASHRST,HASH reset" "0: No effect,1: Reset HASH"
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bitfld.long 0x4 16. "AESRST,AES hardware accelerator reset" "0: No effect,1: Reset AES"
bitfld.long 0x4 11. "DAC1RST,DAC1 reset" "0: No effect,1: Reset DAC1"
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bitfld.long 0x4 10. "ADC12RST,ADC12 reset" "0: No effect,1: Reset ADC12"
bitfld.long 0x4 7. "GPIOHRST,I/O port i reset (i = H to G)" "0: No effect,1: Reset I/O port i"
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bitfld.long 0x4 6. "GPIOGRST,I/O port i reset (i = H to G)" "0: No effect,1: Reset I/O port i"
bitfld.long 0x4 4. "GPIOERST,I/O port i reset (i = E to A)" "0: No effect,1: Reset I/O port i"
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bitfld.long 0x4 3. "GPIODRST,I/O port i reset (i = E to A)" "0: No effect,1: Reset I/O port i"
bitfld.long 0x4 2. "GPIOCRST,I/O port i reset (i = E to A)" "0: No effect,1: Reset I/O port i"
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bitfld.long 0x4 1. "GPIOBRST,I/O port i reset (i = E to A)" "0: No effect,1: Reset I/O port i"
bitfld.long 0x4 0. "GPIOARST,I/O port i reset (i = E to A)" "0: No effect,1: Reset I/O port i"
line.long 0x8 "RCC_AHB2RSTR2,RCC AHB2 peripheral reset register 2"
bitfld.long 0x8 4. "OCTOSPI1RST,OCTOSPI1 reset" "0: No effect,1: Reset OCTOSPI1"
group.long 0x74++0xF
line.long 0x0 "RCC_APB1RSTR1,RCC APB1 peripheral reset register 1"
bitfld.long 0x0 29. "VREFRST,VREFBUF reset" "0: No effect,1: Reset VREFBUF"
bitfld.long 0x0 28. "OPAMPRST,OPAMP reset" "0: No effect,1: Reset OPAMP"
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bitfld.long 0x0 24. "CRSRST,CRS reset" "0: No effect,1: Reset the CRS"
bitfld.long 0x0 23. "I3C1RST,I3C1 reset" "0: No effect,1: Reset the I3C1"
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bitfld.long 0x0 22. "I2C2RST,I2C2 reset" "0: No effect,1: Reset the I2C2"
bitfld.long 0x0 21. "I2C1RST,I2C1 reset" "0: No effect,1: Reset the I2C1"
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bitfld.long 0x0 20. "UART5RST,UART5 reset" "0: No effect,1: Reset UART5"
bitfld.long 0x0 19. "UART4RST,UART4 reset" "0: No effect,1: Reset UART4"
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bitfld.long 0x0 18. "USART3RST,USART3 reset" "0: No effect,1: Reset USART3"
bitfld.long 0x0 14. "SPI2RST,SPI2 reset" "0: No effect,1: Reset SPI2"
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bitfld.long 0x0 8. "SPI3RST,SPI3 reset" "0: No effect,1: Reset SPI3"
bitfld.long 0x0 5. "TIM7RST,TIMj reset" "0: No effect,1: Reset TIMj"
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bitfld.long 0x0 4. "TIM6RST,TIMj reset" "0: No effect,1: Reset TIMj"
bitfld.long 0x0 2. "TIM4RST,TIMj reset" "0: No effect,1: Reset TIMj"
newline
bitfld.long 0x0 1. "TIM3RST,TIMj reset" "0: No effect,1: Reset TIMj"
bitfld.long 0x0 0. "TIM2RST,TIMj reset" "0: No effect,1: Reset TIMj"
line.long 0x4 "RCC_APB1RSTR2,RCC APB1 peripheral reset register 2"
bitfld.long 0x4 9. "FDCAN1RST,FDCAN1 reset" "0: No effect,1: Reset FDCAN1"
bitfld.long 0x4 5. "LPTIM2RST,LPTIM2 reset" "0: No effect,1: Reset LPTIM2"
line.long 0x8 "RCC_APB2RSTR,RCC APB2 peripheral reset register"
bitfld.long 0x8 27. "I3C2RST,I3C2 reset" "0: No effect,1: Reset I3C2"
bitfld.long 0x8 24. "USB1RST,USB1 reset" "0: No effect,1: Reset USB1"
newline
bitfld.long 0x8 21. "SAI1RST,SAI1 reset" "0: No effect,1: Reset SAI1"
bitfld.long 0x8 18. "TIM17RST,TIMi reset" "0: No effect,1: Reset TIMi"
newline
bitfld.long 0x8 17. "TIM16RST,TIMi reset" "0: No effect,1: Reset TIMi"
bitfld.long 0x8 16. "TIM15RST,TIMi reset" "0: No effect,1: Reset TIMi"
newline
bitfld.long 0x8 14. "USART1RST,USART1 reset" "0: No effect,1: Reset USART1"
bitfld.long 0x8 12. "SPI1RST,SPI1 reset" "0: No effect,1: Reset SPI1"
newline
bitfld.long 0x8 11. "TIM1RST,TIM1 reset" "0: No effect,1: Reset TIM1"
line.long 0xC "RCC_APB3RSTR,RCC APB3 peripheral reset register"
bitfld.long 0xC 15. "COMPRST,COMP reset" "0: No effect,1: Reset COMP"
bitfld.long 0xC 13. "LPTIM4RST,LPTIMi reset" "0: No effect,1: Reset LPTIMi"
newline
bitfld.long 0xC 12. "LPTIM3RST,LPTIMi reset" "0: No effect,1: Reset LPTIMi"
bitfld.long 0xC 11. "LPTIM1RST,LPTIM1 reset" "0: No effect,1: Reset LPTIM1"
newline
bitfld.long 0xC 7. "I2C3RST,I2C3 reset" "0: No effect,1: Reset I2C3"
bitfld.long 0xC 6. "LPUART1RST,LPUART1 reset" "0: No effect,1: Reset LPUART1"
newline
bitfld.long 0xC 1. "SYSCFGRST,SYSCFG reset" "0: No effect,1: Reset SYSCFG"
group.long 0x88++0xF
line.long 0x0 "RCC_AHB1ENR1,RCC AHB1 peripheral clock enable register 1"
bitfld.long 0x0 31. "SRAM1EN,SRAM1 clock enable" "0: SRAM1 clock disabled,1: SRAM1 clock enabled"
bitfld.long 0x0 24. "GTZC1EN,GTZC1 clock enable" "0: GTZC1 clock disabled,1: GTZC1 clock enabled"
newline
bitfld.long 0x0 17. "RAMCFGEN,RAMCFG clock enable" "0: RAMCFG clock disabled,1: RAMCFG clock enabled"
bitfld.long 0x0 16. "TSCEN,Touch sensing controller clock enable" "0: TSC clock disabled,1: TSC clock enabled"
newline
bitfld.long 0x0 12. "CRCEN,CRC clock enable" "0: CRC clock disabled,1: CRC clock enabled"
bitfld.long 0x0 8. "FLASHEN,FLASH clock enable" "0: FLASH clock disabled,1: FLASH clock enabled"
newline
bitfld.long 0x0 3. "ADF1EN,ADF1 clock enable" "0: ADF1 clock disabled,1: ADF1 clock enabled"
bitfld.long 0x0 0. "GPDMA1EN,GPDMA1 clock enable" "0: GPDMA1 clock disabled,1: GPDMA1 clock enabled"
line.long 0x4 "RCC_AHB2ENR1,RCC AHB2 peripheral clock enable register 1"
bitfld.long 0x4 30. "SRAM2EN,SRAM2 clock enable" "0: SRAM2 clock disabled,1: SRAM2 clock enabled"
bitfld.long 0x4 27. "SDMMC1EN,SDMMC1 clock enable" "0: SDMMC1 clock disabled,1: SDMMC1 clock enabled"
newline
bitfld.long 0x4 21. "CCBEN,CCB clock enable" "0: CCB clock disabled,1: CCB clock enabled"
bitfld.long 0x4 20. "SAESEN,SAES clock enable" "0: SAES clock disabled,1: SAES clock enabled"
newline
bitfld.long 0x4 19. "PKAEN,PKA clock enable" "0: PKA clock disabled,1: PKA clock enabled"
bitfld.long 0x4 18. "RNGEN,RNG clock enable" "0: RNG clock disabled,1: RNG clock enabled"
newline
bitfld.long 0x4 17. "HASHEN,HASH clock enable" "0: HASH clock disabled,1: HASH clock enabled"
bitfld.long 0x4 16. "AESEN,AES clock enable" "0: AES clock disabled,1: AES clock enabled"
newline
bitfld.long 0x4 11. "DAC1EN,DAC1 clock enable" "0: DAC1 clock disabled,1: DAC1 clock enabled"
bitfld.long 0x4 10. "ADC12EN,ADC12 clock enable" "0: ADC12 clock disabled,1: ADC12 clock enabled"
newline
bitfld.long 0x4 7. "GPIOHEN,I/O port i clock enable (i = H to G)" "0: I/O port i clock disabled,1: I/O port i clock enabled"
bitfld.long 0x4 6. "GPIOGEN,I/O port i clock enable (i = H to G)" "0: I/O port i clock disabled,1: I/O port i clock enabled"
newline
bitfld.long 0x4 4. "GPIOEEN,I/O port i clock enable (i = E to A)" "0: I/O port i clock disabled,1: I/O port i clock enabled"
bitfld.long 0x4 3. "GPIODEN,I/O port i clock enable (i = E to A)" "0: I/O port i clock disabled,1: I/O port i clock enabled"
newline
bitfld.long 0x4 2. "GPIOCEN,I/O port i clock enable (i = E to A)" "0: I/O port i clock disabled,1: I/O port i clock enabled"
bitfld.long 0x4 1. "GPIOBEN,I/O port i clock enable (i = E to A)" "0: I/O port i clock disabled,1: I/O port i clock enabled"
newline
bitfld.long 0x4 0. "GPIOAEN,I/O port i clock enable (i = E to A)" "0: I/O port i clock disabled,1: I/O port i clock enabled"
line.long 0x8 "RCC_AHB2ENR2,RCC AHB2 peripheral clock enable register 2"
bitfld.long 0x8 4. "OCTOSPI1EN,OCTOSPI1 clock enable" "0: OCTOSPI1 clock disabled,1: OCTOSPI1 clock enabled"
line.long 0xC "RCC_AHB1ENR2,RCC AHB1 peripheral clock enable register 2"
bitfld.long 0xC 2. "PWREN,PWR clock enable" "0: PWR clock disabled,1: PWR clock enabled"
group.long 0x9C++0xF
line.long 0x0 "RCC_APB1ENR1,RCC APB1 peripheral clock enable register 1"
bitfld.long 0x0 30. "RTCAPBEN,RTC and TAMP APB clock enable" "0: RTC and TAMP APB clock disabled,1: RTC and TAMP APB clock enabled"
bitfld.long 0x0 29. "VREFEN,VREFBUF clock enable" "0: VREFBUF clock disabled,1: VREFBUF clock enabled"
newline
bitfld.long 0x0 28. "OPAMPEN,OPAMP clock enable" "0: OPAMP clock disabled,1: OPAMP clock enabled"
bitfld.long 0x0 24. "CRSEN,CRS clock enable" "0: CRS clock disabled,1: CRS clock enabled"
newline
bitfld.long 0x0 23. "I3C1EN,I3C1 clock enable" "0: I3C1 clock disabled,1: I3C1 clock enabled"
bitfld.long 0x0 22. "I2C2EN,I2C2 clock enable" "0: I2C2 clock disabled,1: I2C2 clock enabled"
newline
bitfld.long 0x0 21. "I2C1EN,I2C1 clock enable" "0: I2C1 clock disabled,1: I2C1 clock enabled"
bitfld.long 0x0 20. "UART5EN,UART5 clock enable" "0: UART5 clocks disabled,1: UART5 clock enabled"
newline
bitfld.long 0x0 19. "UART4EN,UART4 clock enable" "0: UART4 clocks disabled,1: UART4 clock enabled"
bitfld.long 0x0 18. "USART3EN,USART3 clock enable" "0: USART3 clocks disabled,1: USART3 clock enabled"
newline
bitfld.long 0x0 14. "SPI2EN,SPI2 clock enable" "0: SPI2 clock disabled,1: SPI2 clock enabled"
bitfld.long 0x0 11. "WWDGEN,WWDG clock enable" "0: WWDG clock disabled,1: WWDG clock enabled"
newline
bitfld.long 0x0 8. "SPI3EN,SPI3 clock enable" "0: SPI3 clock disabled,1: SPI3 clock enabled"
bitfld.long 0x0 5. "TIM7EN,TIMj clock enable" "0: TIMj clock disabled,1: TIMj clock enabled"
newline
bitfld.long 0x0 4. "TIM6EN,TIMj clock enable" "0: TIMj clock disabled,1: TIMj clock enabled"
bitfld.long 0x0 2. "TIM4EN,TIMj clock enable" "0: TIMj clock disabled,1: TIMj clock enabled"
newline
bitfld.long 0x0 1. "TIM3EN,TIMj clock enable" "0: TIMj clock disabled,1: TIMj clock enabled"
bitfld.long 0x0 0. "TIM2EN,TIMj clock enable" "0: TIMj clock disabled,1: TIMj clock enabled"
line.long 0x4 "RCC_APB1ENR2,RCC APB1 peripheral clock enable register 2"
bitfld.long 0x4 9. "FDCAN1EN,FDCAN1 clock enable" "0: FDCAN1 clock disabled,1: FDCAN1 clock enabled"
bitfld.long 0x4 5. "LPTIM2EN,LPTIM2 clock enable" "0: LPTIM2 clock disabled,1: LPTIM2 clock enabled"
line.long 0x8 "RCC_APB2ENR,RCC APB2 peripheral clock enable register"
bitfld.long 0x8 27. "I3C2EN,I3C2 clock enable" "0: I3C2 clock disabled,1: I3C2 clock enabled"
bitfld.long 0x8 24. "USB1EN,USB1 clock enable" "0: USB1 clock disabled,1: USB1 clock enabled"
newline
bitfld.long 0x8 21. "SAI1EN,SAI1 clock enable" "0: SAI1 clock disabled,1: SAI1 clock enabled"
bitfld.long 0x8 18. "TIM17EN,TIMi clock enable" "0: TIMi clock disabled,1: TIMi clock enabled"
newline
bitfld.long 0x8 17. "TIM16EN,TIMi clock enable" "0: TIMi clock disabled,1: TIMi clock enabled"
bitfld.long 0x8 16. "TIM15EN,TIMi clock enable" "0: TIMi clock disabled,1: TIMi clock enabled"
newline
bitfld.long 0x8 14. "USART1EN,USART1clock enable" "0: USART1 clock disabled,1: USART1 clock enabled"
bitfld.long 0x8 12. "SPI1EN,SPI1 clock enable" "0: SPI1 clock disabled,1: SPI1 clock enabled"
newline
bitfld.long 0x8 11. "TIM1EN,TIM1 clock enable" "0: TIM1 clock disabled,1: TIM1 clock enabled"
line.long 0xC "RCC_APB3ENR,RCC APB3 peripheral clock enable register"
bitfld.long 0xC 15. "COMPEN,COMP clock enable" "0: COMP clock disabled,1: COMP clock enabled"
bitfld.long 0xC 13. "LPTIM4EN,LPTIMi clock enable" "0: LPTIMi clock disabled,1: LPTIMi clock enabled"
newline
bitfld.long 0xC 12. "LPTIM3EN,LPTIMi clock enable" "0: LPTIMi clock disabled,1: LPTIMi clock enabled"
bitfld.long 0xC 11. "LPTIM1EN,LPTIM1 clock enable" "0: LPTIM1 clock disabled,1: LPTIM1 clock enabled"
newline
bitfld.long 0xC 7. "I2C3EN,I2C3 clock enable" "0: I2C3 clock disabled,1: I2C3 clock enabled"
bitfld.long 0xC 6. "LPUART1EN,LPUART1 clock enable" "0: LPUART1 clock disabled,1: LPUART1 clock enabled"
newline
bitfld.long 0xC 1. "SYSCFGEN,SYSCFG clock enable" "0: SYSCFG clock disabled,1: SYSCFG clock enabled"
group.long 0xB0++0xF
line.long 0x0 "RCC_AHB1SLPENR1,RCC AHB1 peripheral clock enable in Sleep mode register"
bitfld.long 0x0 31. "SRAM1SLPEN,SRAM1 clock enable during Sleep mode" "0: SRAM1 clocks disabled by the clock gating during..,1: SRAM1 clock enabled by the clock gating during.."
bitfld.long 0x0 29. "ICACHESLPEN,ICACHE clock enable during Sleep mode" "0: ICACHE clocks disabled by the clock gating..,1: ICACHE clock enabled by the clock gating during.."
newline
bitfld.long 0x0 24. "GTZC1SLPEN,GTZC1 clock enable during Sleep mode" "0: GTZC1 clocks disabled by the clock gating during..,1: GTZC1 clock enabled by the clock gating during.."
bitfld.long 0x0 17. "RAMCFGSLPEN,RAMCFG clock enable during Sleep mode" "0: RAMCFG clocks disabled by the clock gating..,1: RAMCFG clock enabled by the clock gating during.."
newline
bitfld.long 0x0 16. "TSCSLPEN,TSC clock enable during Sleep mode" "0: TSC clocks disabled by the clock gating during..,1: TSC clock enabled by the clock gating during.."
bitfld.long 0x0 12. "CRCSLPEN,CRC clock enable during Sleep mode" "0: CRC clocks disabled by the clock gating during..,1: CRC clock enabled by the clock gating during.."
newline
bitfld.long 0x0 8. "FLASHSLPEN,FLASH clock enable during Sleep mode" "0: FLASH clocks disabled by the clock gating during..,1: FLASH clock enabled by the clock gating during.."
bitfld.long 0x0 3. "ADF1SLPEN,ADF1 clock enable during Sleep mode." "0: ADF1 clocks disabled by the clock gating during..,1: ADF1 clock enabled by the clock gating during.."
newline
bitfld.long 0x0 0. "GPDMA1SLPEN,GPDMA1 clock enable during Sleep mode" "0: GPDMA1 clocks disabled by the clock gating..,1: GPDMA1 clock enabled by the clock gating during.."
line.long 0x4 "RCC_AHB2SLPENR1,RCC AHB2 peripheral clock enable in Sleep mode register 1"
bitfld.long 0x4 30. "SRAM2SLPEN,SRAM2 clock enable during Sleep mode" "0: SRAM2 clocks disabled by the clock gating during..,1: SRAM2 clock enabled by the clock gating during.."
bitfld.long 0x4 27. "SDMMC1SLPEN,SDMMC1 clock enable during Sleep mode" "0: SDMMC1 clocks disabled by the clock gating..,1: SDMMC1 clock enabled by the clock gating during.."
newline
bitfld.long 0x4 21. "CCBSLPEN,CCB accelerator clock enable during Sleep mode" "0: CCB clocks disabled by the clock gating during..,1: CCB clock enabled by the clock gating during.."
bitfld.long 0x4 20. "SAESSLPEN,SAES accelerator clock enable during Sleep mode" "0: SAES clocks disabled by the clock gating during..,1: SAES clock enabled by the clock gating during.."
newline
bitfld.long 0x4 19. "PKASLPEN,PKA clock enable during Sleep mode" "0: PKA clocks disabled by the clock gating during..,1: PKA clock enabled by the clock gating during.."
bitfld.long 0x4 18. "RNGSLPEN,RNG clock enable during Sleep mode" "0: RNG clocks disabled by the clock gating during..,1: RNG clock enabled by the clock gating during.."
newline
bitfld.long 0x4 17. "HASHSLPEN,HASH clock enable during Sleep mode" "0: HASH clocks disabled by the clock gating during..,1: HASH clock enabled by the clock gating during.."
bitfld.long 0x4 16. "AESSLPEN,AES clock enable during Sleep mode" "0: AES clocks disabled by the clock gating during..,1: AES clock enabled by the clock gating during.."
newline
bitfld.long 0x4 11. "DAC1SLPEN,DAC1 clock enable during Sleep mode" "0: DAC1 clocks disabled by the clock gating during..,1: DAC1 clock enabled by the clock gating during.."
bitfld.long 0x4 10. "ADC12SLPEN,ADC12 clock enable during Sleep mode" "0: ADC12 clocks disabled by the clock gating during..,1: ADC12 clock enabled by the clock gating during.."
newline
bitfld.long 0x4 7. "GPIOHSLPEN,I/O port i clock enable during Sleep mode (i = H to G)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
bitfld.long 0x4 6. "GPIOGSLPEN,I/O port i clock enable during Sleep mode (i = H to G)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
newline
bitfld.long 0x4 4. "GPIOESLPEN,I/O port i clock enable during Sleep mode (i = E to A)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
bitfld.long 0x4 3. "GPIODSLPEN,I/O port i clock enable during Sleep mode (i = E to A)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
newline
bitfld.long 0x4 2. "GPIOCSLPEN,I/O port i clock enable during Sleep mode (i = E to A)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
bitfld.long 0x4 1. "GPIOBSLPEN,I/O port i clock enable during Sleep mode (i = E to A)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
newline
bitfld.long 0x4 0. "GPIOASLPEN,I/O port i clock enable during Sleep mode (i = E to A)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
line.long 0x8 "RCC_AHB2SLPENR2,RCC AHB2 peripheral clock enable in Sleep mode register 2"
bitfld.long 0x8 4. "OCTOSPI1SLPEN,OCTOSPI1 clock enable during Sleep mode" "0: OCTOSPI1 clocks disabled by the clock gating..,1: OCTOSPI1 clock enabled by the clock gating.."
line.long 0xC "RCC_AHB1SLPENR2,RCC AHB1 peripheral clock enable in Sleep mode register 2"
bitfld.long 0xC 2. "PWRSLPEN,PWR clock enable during Sleep mode" "0: PWR clock disabled by the clock gating during..,1: PWR clock enabled by the clock gating during.."
group.long 0xC4++0xF
line.long 0x0 "RCC_APB1SLPENR1,RCC APB1 peripheral clock enable in Sleep mode register 1"
bitfld.long 0x0 30. "RTCAPBSLPEN,RTC and TAMP APB clock enable during Sleep mode" "0: RTC and TAMP APB clock disabled by the clock..,1: RTC and TAMP APB clock enabled by the clock.."
bitfld.long 0x0 29. "VREFSLPEN,VREFBUF clock enable during Sleep mode" "0: VREFBUF clocks disabled by the clock gating..,1: VREFBUF clock enabled by the clock gating during.."
newline
bitfld.long 0x0 28. "OPAMPSLPEN,OPAMP clock enable during Sleep mode" "0: OPAMP clocks disabled by the clock gating during..,1: OPAMP clock enabled by the clock gating during.."
bitfld.long 0x0 24. "CRSSLPEN,CRS clock enable during Sleep mode" "0: CRS clocks disabled by the clock gating during..,1: CRS clock enabled by the clock gating during.."
newline
bitfld.long 0x0 23. "I3C1SLPEN,I3C1 clock enable during Sleep mode" "0: I3C1 clocks disabled by the clock gating during..,1: I3C1 clock enabled by the clock gating during.."
bitfld.long 0x0 22. "I2C2SLPEN,I2C2 clock enable during Sleep mode" "0: I2C2 clocks disabled by the clock gating during..,1: I2C2 clock enabled by the clock gating during.."
newline
bitfld.long 0x0 21. "I2C1SLPEN,I2C1 clock enable during Sleep mode" "0: I2C1 clocks disabled by the clock gating during..,1: I2C1 clock enabled by the clock gating during.."
bitfld.long 0x0 20. "UART5SLPEN,UART5 clock enable during Sleep mode" "0: UART5 clocks disabled by the clock gating during..,1: UART5 clock enabled by the clock gating during.."
newline
bitfld.long 0x0 19. "UART4SLPEN,UART4 clock enable during Sleep mode" "0: UART4 clocks disabled by the clock gating during..,1: UART4 clock enabled by the clock gating during.."
bitfld.long 0x0 18. "USART3SLPEN,USART3 clock enable during Sleep mode" "0: USART3 clocks disabled by the clock gating..,1: USART3 clock enabled by the clock gating during.."
newline
bitfld.long 0x0 14. "SPI2SLPEN,SPI2 clock enable during Sleep mode" "0: SPI2 clocks disabled by the clock gating during..,1: SPI2 clock enabled by the clock gating during.."
bitfld.long 0x0 11. "WWDGSLPEN,WWDG clock enable during Sleep mode" "0: WWDG clocks disabled by the clock gating during..,1: WWDG clock enabled by the clock gating during.."
newline
bitfld.long 0x0 8. "SPI3SLPEN,SPI3 clock enable during Sleep mode" "0: SPI3 clocks disabled by the clock gating during..,1: SPI3 clock enabled by the clock gating during.."
bitfld.long 0x0 5. "TIM7SLPEN,TIMj clock enable during Sleep mode" "0: TIMj clocks disabled by the clock gating during..,1: TIMj clock enabled by the clock gating during.."
newline
bitfld.long 0x0 4. "TIM6SLPEN,TIMj clock enable during Sleep mode" "0: TIMj clocks disabled by the clock gating during..,1: TIMj clock enabled by the clock gating during.."
bitfld.long 0x0 2. "TIM4SLPEN,TIMj clock enable during Sleep mode" "0: TIMj clocks disabled by the clock gating during..,1: TIMj clock enabled by the clock gating during.."
newline
bitfld.long 0x0 1. "TIM3SLPEN,TIMj clock enable during Sleep mode" "0: TIMj clocks disabled by the clock gating during..,1: TIMj clock enabled by the clock gating during.."
bitfld.long 0x0 0. "TIM2SLPEN,TIMj clock enable during Sleep mode" "0: TIMj clocks disabled by the clock gating during..,1: TIMj clock enabled by the clock gating during.."
line.long 0x4 "RCC_APB1SLPENR2,RCC APB1 peripheral clock enable in Sleep mode register 2"
bitfld.long 0x4 9. "FDCAN1SLPEN,FDCAN1 clock enable during Sleep mode" "0: FDCAN1 clocks disabled by the clock gating..,1: FDCAN1 clock enabled by the clock gating during.."
bitfld.long 0x4 5. "LPTIM2SLPEN,LPTIM2 clock enable during Sleep mode" "0: LPTIM2 clocks disabled by the clock gating..,1: LPTIM2 clock enabled by the clock gating during.."
line.long 0x8 "RCC_APB2SLPENR,RCC APB2 peripheral clock enable in Sleep mode register"
bitfld.long 0x8 27. "I3C2SLPEN,I3C2 clock enable during Sleep mode" "0: I3C2 clocks disabled by the clock gating during..,1: I3C2 clock enabled by the clock gating during.."
bitfld.long 0x8 24. "USB1SLPEN,USB1 clock enable during Sleep mode" "0: USB1 clocks disabled by the clock gating during..,1: USB1 clock enabled by the clock gating during.."
newline
bitfld.long 0x8 21. "SAI1SLPEN,SAI1 clock enable during Sleep mode" "0: SAI1 clocks disabled by the clock gating during..,1: SAI1 clock enabled by the clock gating during.."
bitfld.long 0x8 18. "TIM17SLPEN,TIMi clock enable during Sleep mode" "0: TIMi clock disabled during Sleep mode,1: TIMi clock enabled during Sleep mode"
newline
bitfld.long 0x8 17. "TIM16SLPEN,TIMi clock enable during Sleep mode" "0: TIMi clock disabled during Sleep mode,1: TIMi clock enabled during Sleep mode"
bitfld.long 0x8 16. "TIM15SLPEN,TIMi clock enable during Sleep mode" "0: TIMi clock disabled during Sleep mode,1: TIMi clock enabled during Sleep mode"
newline
bitfld.long 0x8 14. "USART1SLPEN,USART1clock enable during Sleep mode" "0: USART1clocks disabled by the clock gating during..,1: USART1clock enabled by the clock gating during.."
bitfld.long 0x8 12. "SPI1SLPEN,SPI1 clock enable during Sleep mode" "0: SPI1 clocks disabled by the clock gating during..,1: SPI1 clock enabled by the clock gating during.."
newline
bitfld.long 0x8 11. "TIM1SLPEN,TIM1 clock enable during Sleep mode" "0: TIM1 clock disabled during Sleep mode,1: TIM1 clock enabled during Sleep mode"
line.long 0xC "RCC_APB3SLPENR,RCC APB3 peripheral clock enable in Sleep mode register"
bitfld.long 0xC 15. "COMPSLPEN,COMP clock enable during Sleep mode" "0: COMP clocks disabled by the clock gating during..,1: COMP clock enabled by the clock gating during.."
bitfld.long 0xC 13. "LPTIM4SLPEN,LPTIMi clock enable during Sleep mode" "0: LPTIMi clock disabled during Sleep mode,1: LPTIMi clock enabled during Sleep mode"
newline
bitfld.long 0xC 12. "LPTIM3SLPEN,LPTIMi clock enable during Sleep mode" "0: LPTIMi clock disabled during Sleep mode,1: LPTIMi clock enabled during Sleep mode"
bitfld.long 0xC 11. "LPTIM1SLPEN,LPTIM1clock enable during Sleep mode" "0: LPTIM1 clock disabled during Sleep mode,1: LPTIM1 clock enabled during Sleep mode"
newline
bitfld.long 0xC 7. "I2C3SLPEN,I2C3 clock enable during Sleep mode" "0: I2C3 clocks disabled by the clock gating during..,1: I2C3 clock enabled by the clock gating during.."
bitfld.long 0xC 6. "LPUART1SLPEN,LPUART1 clock enable during Sleep mode" "0: LPUART1 clocks disabled by the clock gating..,1: LPUART1 clock enabled by the clock gating during.."
newline
bitfld.long 0xC 1. "SYSCFGSLPEN,SYSCFG clock enable during Sleep mode" "0: SYSCFG clocks disabled by the clock gating..,1: SYSCFG clock enabled by the clock gating during.."
group.long 0xD8++0x7
line.long 0x0 "RCC_AHB1STPENR1,RCC AHB1 peripheral clock enable in Stop mode register"
bitfld.long 0x0 31. "SRAM1STPEN,SRAM1 clock enable during Stop mode" "0: SRAM1 clocks disabled by the clock gating during..,1: SRAM1 clock enabled by the clock gating during.."
bitfld.long 0x0 24. "GTZC1STPEN,GTZC1 clock enable during Stop mode" "0: GTZC1 clocks disabled by the clock gating during..,1: GTZC1 clock enabled by the clock gating during.."
newline
bitfld.long 0x0 17. "RAMCFGSTPEN,RAMCFG clock enable during Stop mode" "0: RAMCFG clocks disabled by the clock gating..,1: RAMCFG clock enabled by the clock gating during.."
bitfld.long 0x0 8. "FLASHSTPEN,FLASH clock enable during Stop mode" "0: FLASH clocks disabled by the clock gating during..,1: FLASH clock enabled by the clock gating during.."
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bitfld.long 0x0 3. "ADF1STPEN,ADF1 clock enable during Stop mode." "0: ADF1 clocks disabled by the clock gating during..,1: ADF1 clock enabled by the clock gating during.."
bitfld.long 0x0 0. "GPDMA1STPEN,GPDMA1 clock enable during Stop mode." "0: GPDMA1 clocks disabled by the clock gating..,1: GPDMA1 clock enabled by the clock gating during.."
line.long 0x4 "RCC_AHB2STPENR1,RCC AHB2 peripheral clock enable in Stop mode register 1"
bitfld.long 0x4 30. "SRAM2STPEN,SRAM2 clock enable during Stop mode" "0: SRAM2 clocks disabled by the clock gating during..,1: SRAM2 clock enabled by the clock gating during.."
bitfld.long 0x4 11. "DAC1STPEN,DAC1 clock enable during Stop mode" "0: DAC1 clocks disabled by the clock gating during..,1: DAC1 clock enabled by the clock gating during.."
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bitfld.long 0x4 7. "GPIOHSTPEN,I/O port i clock enable during Stop mode (i = H to G)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
bitfld.long 0x4 6. "GPIOGSTPEN,I/O port i clock enable during Stop mode (i = H to G)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
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bitfld.long 0x4 4. "GPIOESTPEN,I/O port i clock enable during Stop mode (i = E to A)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
bitfld.long 0x4 3. "GPIODSTPEN,I/O port i clock enable during Stop mode (i = E to A)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
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bitfld.long 0x4 2. "GPIOCSTPEN,I/O port i clock enable during Stop mode (i = E to A)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
bitfld.long 0x4 1. "GPIOBSTPEN,I/O port i clock enable during Stop mode (i = E to A)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
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bitfld.long 0x4 0. "GPIOASTPEN,I/O port i clock enable during Stop mode (i = E to A)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
group.long 0xEC++0xF
line.long 0x0 "RCC_APB1STPENR1,RCC APB1 peripheral clock enable in Stop mode register 1"
bitfld.long 0x0 30. "RTCAPBSTPEN,RTC and TAMP APB clock enable during Stop mode" "0: RTC and TAMP APB clock disabled by the clock..,1: RTC and TAMP APB clock enabled by the clock.."
bitfld.long 0x0 29. "VREFSTPEN,VREFBUF clock enable during Stop mode" "0: VREFBUF clocks disabled by the clock gating..,1: VREFBUF clock enabled by the clock gating during.."
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bitfld.long 0x0 28. "OPAMPSTPEN,OPAMP clock enable during Stop mode" "0: OPAMP clocks disabled by the clock gating during..,1: OPAMP clock enabled by the clock gating during.."
bitfld.long 0x0 23. "I3C1STPEN,I3C1 clock enable during Stop mode" "0: I3C1 clocks disabled by the clock gating during..,1: I3C1 clock enabled by the clock gating during.."
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bitfld.long 0x0 22. "I2C2STPEN,I2C2 clock enable during Stop mode" "0: I2C2 clocks disabled by the clock gating during..,1: I2C2 clock enabled by the clock gating during.."
bitfld.long 0x0 21. "I2C1STPEN,I2C1 clock enable during Stop mode" "0: I2C1 clocks disabled by the clock gating during..,1: I2C1 clock enabled by the clock gating during.."
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bitfld.long 0x0 20. "UART5STPEN,UART5 clock enable during Stop mode" "0: UART5 clocks disabled by the clock gating during..,1: UART5 clock enabled by the clock gating during.."
bitfld.long 0x0 19. "UART4STPEN,UART4 clock enable during Stop mode" "0: UART4 clocks disabled by the clock gating during..,1: UART4 clock enabled by the clock gating during.."
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bitfld.long 0x0 18. "USART3STPEN,USART3 clock enable during Stop mode" "0: USART3 clocks disabled by the clock gating..,1: USART3 clock enabled by the clock gating during.."
bitfld.long 0x0 14. "SPI2STPEN,SPI2 clock enable during Stop mode" "0: SPI2 clocks disabled by the clock gating during..,1: SPI2 clock enabled by the clock gating during.."
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bitfld.long 0x0 8. "SPI3STPEN,SPI3 clock enable during Stop mode" "0: SPI3 clocks disabled by the clock gating during..,1: SPI3 clock enabled by the clock gating during.."
line.long 0x4 "RCC_APB1STPENR2,RCC APB1 peripheral clock enable in Stop mode register 2"
bitfld.long 0x4 5. "LPTIM2STPEN,LPTIM2 clock enable during Stop mode" "0: LPTIM2 clocks disabled by the clock gating..,1: LPTIM2 clock enabled by the clock gating during.."
line.long 0x8 "RCC_APB2STPENR,RCC APB2 peripheral clock enable in Stop mode register"
bitfld.long 0x8 27. "I3C2STPEN,I3C2 clock enable during Stop mode" "0: I3C2 clocks disabled by the clock gating during..,1: I3C2 clock enabled by the clock gating during.."
bitfld.long 0x8 24. "USB1STPEN,USB1 clock enable during Stop mode" "0: USB1 clocks disabled by the clock gating during..,1: USB1 clock enabled by the clock gating during.."
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bitfld.long 0x8 14. "USART1STPEN,USART1clock enable during Stop mode" "0: USART1clocks disabled by the clock gating during..,1: USART1clock enabled by the clock gating during.."
bitfld.long 0x8 12. "SPI1STPEN,SPI1 clock enable during Stop mode" "0: SPI1 clocks disabled by the clock gating during..,1: SPI1 clock enabled by the clock gating during.."
line.long 0xC "RCC_APB3STPENR,RCC APB3 peripheral clock enable in Stop mode register"
bitfld.long 0xC 15. "COMPSTPEN,COMP clock enable during Stop mode" "0: COMP clocks disabled by the clock gating during..,1: COMP clock enabled by the clock gating during.."
bitfld.long 0xC 13. "LPTIM4STPEN,LPTIMi clock enable during Stop mode" "0: LPTIMi clock disabled during Stop mode,1: LPTIMi clock enabled during Stop mode"
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bitfld.long 0xC 12. "LPTIM3STPEN,LPTIMi clock enable during Stop mode" "0: LPTIMi clock disabled during Stop mode,1: LPTIMi clock enabled during Stop mode"
bitfld.long 0xC 11. "LPTIM1STPEN,LPTIM1clock enable during Stop mode" "0: LPTIM1 clock disabled during Stop mode,1: LPTIM1 clock enabled during Stop mode"
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bitfld.long 0xC 7. "I2C3STPEN,I2C3 clock enable during Stop mode" "0: I2C3 clocks disabled by the clock gating during..,1: I2C3 clock enabled by the clock gating during.."
bitfld.long 0xC 6. "LPUART1STPEN,LPUART1 clock enable during Stop mode" "0: LPUART1 clocks disabled by the clock gating..,1: LPUART1 clock enabled by the clock gating during.."
group.long 0x100++0xB
line.long 0x0 "RCC_CCIPR1,RCC peripheral independent clock configuration register 1"
bitfld.long 0x0 29.--31. "TIMICSEL,Clock sources for TIM16 TIM17 and LPTIM2 internal input capture" "0: HSI MSIK and MSIS dividers disabled,1: HSI MSIK and MSIS dividers disabled,2: HSI MSIK and MSIS dividers disabled,3: HSI MSIK and MSIS dividers disabled,4: HSI/256 MSIS/1024 and MSIS/4 are generated and..,5: HSI/256 MSIS/1024 and MSIK/4 are generated and..,6: HSI/256 MSIK/1024 and MSIS/4 are generated and..,7: HSI/256 MSIK/1024 and MSIK/4 are generated and.."
bitfld.long 0x0 28. "USB1SEL,USB1 kernel clock prescaler selection" "0: usbsdmmc_iclk selected,1: usbsdmmc_iclk/2 selected"
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bitfld.long 0x0 26.--27. "ICLKSEL,Intermediate clock source selection" "0: HSI48 selected,1: MSIK selected,2: HSE selected,3: SYSCLK selected"
bitfld.long 0x0 24. "FDCAN1SEL,FDCAN1 kernel clock source selection" "0: SYSCLK selected,1: MSIK selected"
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bitfld.long 0x0 22.--23. "SYSTICKSEL,SysTick clock source selection" "0: HCLK/8 selected,1: LSI selected,2: LSE selected,?"
bitfld.long 0x0 20. "SPI1SEL,SPI1 kernel clock source selection" "0: PCLK2 selected,1: MSIK selected"
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bitfld.long 0x0 18.--19. "LPTIM2SEL,Low-power timer 2 kernel clock source selection" "0: PCLK1 selected,1: LSI selected,2: HSI16 selected,3: LSE selected"
bitfld.long 0x0 16. "SPI2SEL,SPI2 kernel clock source selection" "0: PCLK1 selected,1: MSIK selected"
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bitfld.long 0x0 14. "I3C2SEL,I3C2 kernel clock source selection" "0: PCLK2 selected,1: MSIK selected"
bitfld.long 0x0 12. "I2C2SEL,I2C2 kernel clock source selection" "0: PCLK1 selected,1: MSIK selected"
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bitfld.long 0x0 10. "I2C1SEL,I2C1 kernel clock source selection" "0: PCLK1 selected,1: MSIK selected"
bitfld.long 0x0 8. "I3C1SEL,I3C1 kernel clock source selection" "0: PCLK1 selected,1: MSIK selected"
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bitfld.long 0x0 6. "UART5SEL,UART5 kernel clock source selection" "0: PCLK1 selected,1: HSI16 selected"
bitfld.long 0x0 4. "UART4SEL,UART4 kernel clock source selection" "0: PCLK1 selected,1: HSI16 selected"
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bitfld.long 0x0 2. "USART3SEL,USART3 kernel clock source selection" "0: PCLK1 selected,1: HSI16 selected"
bitfld.long 0x0 0. "USART1SEL,USART1 kernel clock source selection" "0: PCLK2 selected,1: HSI16 selected"
line.long 0x4 "RCC_CCIPR2,RCC peripheral independent clock configuration register 2"
bitfld.long 0x4 20. "OCTOSPISEL,OCTOSPI1 kernel clock source selection" "0: SYSCLK selected,1: MSIK selected"
bitfld.long 0x4 19. "DAC1SHSEL,DAC1 sample and hold clock source selection" "0: LSE selected,1: LSI selected"
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bitfld.long 0x4 16.--17. "ADCDACSEL,ADC12 and DAC1 intermediate kernel clock source selection" "0: HCLK selected,1: HSE selected,2: MSIK selected,?"
hexmask.long.byte 0x4 12.--15. 1. "ADCDACPRE,ADC12 and DAC1 kernel clock prescaler"
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bitfld.long 0x4 11. "RNGSEL,RNG kernel clock source selection" "0: HSI48 selected,1: MSIK selected"
bitfld.long 0x4 5.--6. "SAI1SEL,SAI1 kernel clock source selection" "0: MSIK selected,1: input pin AUDIOCLK selected,2: HSE clock selected,?"
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bitfld.long 0x4 3. "SPI3SEL,SPI3 kernel clock source selection" "0: PCLK1 selected,1: MSIK selected"
bitfld.long 0x4 0.--1. "ADF1SEL,ADF1 kernel clock source selection" "0: HCLK,1: Input pin AUDIOCLK selected,2: MSIK clock selected,3: SAI1 kernel clock selected"
line.long 0x8 "RCC_CCIPR3,RCC peripheral independent clock configuration register 3"
bitfld.long 0x8 10.--11. "LPTIM1SEL,LPTIM1 kernel clock source selection" "0: MSIK clock selected,1: LSI selected,2: HSI16 selected,3: LSE selected"
bitfld.long 0x8 8.--9. "LPTIM34SEL,LPTIM3 and LPTIM4 kernel clock source selection" "0: MSIK clock selected,1: LSI selected,2: HSI16 selected,3: LSE selected"
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bitfld.long 0x8 6. "I2C3SEL,I2C3 kernel clock source selection" "0: PCLK3 selected,1: MSIK selected"
bitfld.long 0x8 0.--1. "LPUART1SEL,LPUART1 kernel clock source selection" "0: PCLK3 selected,1: HSI16 selected,2: LSE selected,3: MSIK selected"
group.long 0x110++0x7
line.long 0x0 "RCC_BDCR,RCC backup domain control register"
bitfld.long 0x0 25. "LSCOSEL,Low-speed clock output selection" "0: LSI selected,1: LSE selected"
bitfld.long 0x0 24. "LSCOEN,Low-speed clock output (LSCO) enable" "0: LSCO disabled,1: LSCO enabled"
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bitfld.long 0x0 16. "BDRST,Backup domain software reset" "0: No effec,1: Reset the entire backup domain"
bitfld.long 0x0 15. "RTCEN,RTC and TAMP clock enable" "0: RTC and TAMP clock disabled,1: RTC and TAMP clock enabled"
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bitfld.long 0x0 12. "LSEGFON,LSE clock glitch filter enable" "0: LSE glitch filter disabled,1: LSE glitch filter enabled"
bitfld.long 0x0 11. "LSESYSRDY,LSE system clock (LSESYS) ready" "0: LSESYS clock not ready,1: LSESYS clock ready"
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bitfld.long 0x0 8.--9. "RTCSEL,RTC and TAMP clock source selection" "0: No clock selected,1: LSE selected,2: LSI selected,3: HSE/32 selected"
bitfld.long 0x0 7. "LSESYSEN,LSE system clock (LSESYS) enable" "0: LSE can be used only for RTC TAMP and CSS on LSE.,1: LSE can be used by any other peripheral or.."
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bitfld.long 0x0 6. "LSECSSD,CSS on LSE failure detection" "0: No failure detected on LSE,1: Failure detected on LSE"
bitfld.long 0x0 5. "LSECSSON,CSS on LSE enable" "0: CSS on LSE OFF,1: CSS on LSE ON"
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bitfld.long 0x0 3.--4. "LSEDRV,LSE oscillator drive capability" "0: 'xtal mode' lower driving capability,1: 'xtal mode' medium-low driving capability,2: 'xtal mode' medium-high driving capability,3: 'xtal mode' higher driving capability"
bitfld.long 0x0 2. "LSEBYP,LSE oscillator bypass" "0: LSE oscillator not bypassed,?"
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bitfld.long 0x0 1. "LSERDY,LSE oscillator ready" "0: LSE oscillator not ready,1: LSE oscillator ready"
bitfld.long 0x0 0. "LSEON,LSE oscillator enable" "0: LSE oscillator OFF,1: LSE oscillator ON"
line.long 0x4 "RCC_CSR,RCC control/status register"
bitfld.long 0x4 31. "LPWRRSTF,Low-power reset flag" "0: No illegal low-power mode reset occurred.,1: Illegal low-power mode reset occurred."
bitfld.long 0x4 30. "WWDGRSTF,Window watchdog reset flag" "0: No window watchdog reset occurred,1: Window watchdog reset occurred"
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bitfld.long 0x4 29. "IWDGRSTF,Independent watchdog reset flag" "0: No independent watchdog reset occurred.,1: Independent watchdog reset occurred."
bitfld.long 0x4 28. "SFTRSTF,Software reset flag" "0: No software reset occurred.,1: Software reset occurred."
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bitfld.long 0x4 27. "BORRSTF,BOR flag" "0: No BOR occurred.,1: BOR occurred."
bitfld.long 0x4 26. "PINRSTF,NRST pin reset flag" "0: No reset from NRST pin occurred.,1: Reset from NRST pin occurred"
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bitfld.long 0x4 25. "OBLRSTF,Option-byte loader reset flag" "0: No reset from option-byte loading occurred.,1: Reset from option-byte loading occurred."
bitfld.long 0x4 23. "RMVF,Remove reset flag" "0: No effect,1: Clear the reset flags."
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bitfld.long 0x4 12.--13. "MSISDIVS,MSIS oscillator division after Standby mode" "?,1: Range 5 around 12 MHz (reset value),2: Range 6 around 6 MHz,3: Range 7 around 3 MHz"
bitfld.long 0x4 8.--9. "MSIKDIVS,MSIK oscillator division after Standby mode" "?,1: Range 5 around 12 MHz (reset value),2: Range 6 around 6 MHz,3: Range 7 around 3 MHz"
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bitfld.long 0x4 2. "LSIPREDIV,Low-speed clock divider configuration" "0: LSI not divided,1: LSI divided by 128"
bitfld.long 0x4 1. "LSIRDY,LSI oscillator ready" "0: LSI oscillator not ready,1: LSI oscillator ready"
newline
bitfld.long 0x4 0. "LSION,LSI oscillator enable" "0: LSI oscillator OFF,1: LSI oscillator ON"
group.long 0x130++0x7
line.long 0x0 "RCC_SECCFGR,RCC secure configuration register"
bitfld.long 0x0 12. "RMVFSEC,Remove reset flag security" "0: Nonsecure,1: Secure"
bitfld.long 0x0 11. "HSI48SEC,HSI48 clock configuration and status bit security" "0: Nonsecure,1: Secure"
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bitfld.long 0x0 10. "ICLKSEC,Intermediate clock source selection security" "0: Nonsecure,1: Secure"
bitfld.long 0x0 7. "BOOSTSEC,EPOD booster configuration bit security" "0: Nonsecure,1: Secure"
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bitfld.long 0x0 6. "PRESCSEC,AHBx/APBx prescaler configuration bit security" "0: Nonsecure,1: Secure"
bitfld.long 0x0 5. "SYSCLKSEC,SYSCLK clock selection STOPWUCK bit clock output on MCO configuration security" "0: Nonsecure,1: Secure"
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bitfld.long 0x0 4. "LSESEC,LSE clock configuration and status bit security" "0: Nonsecure,1: Secure"
bitfld.long 0x0 3. "LSISEC,LSI clock configuration and status bit security" "0: Nonsecure,1: Secure"
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bitfld.long 0x0 2. "MSISEC,MSI clock configuration and status bit security" "0: Nonsecure,1: Secure"
bitfld.long 0x0 1. "HSESEC,HSE clock configuration status bits and HSE_CSS security" "0: Nonsecure,1: Secure"
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bitfld.long 0x0 0. "HSISEC,HSI clock configuration and status bit security" "0: Nonsecure,1: Secure"
line.long 0x4 "RCC_PRIVCFGR,RCC privilege configuration register"
bitfld.long 0x4 1. "NSPRIV,RCC nonsecure function privilege configuration" "0: Read and write to RCC nonsecure functions can be..,1: Read and write to RCC nonsecure functions can be.."
bitfld.long 0x4 0. "SPRIV,RCC secure function privilege configuration" "0: Read and write to RCC secure functions can be..,1: Read and write to RCC secure functions can be.."
tree.end
tree "SEC_RCC"
base ad:0x50030C00
group.long 0x0++0x3
line.long 0x0 "RCC_CR,RCC clock control register"
bitfld.long 0x0 20. "HSEExT,HSE external clock bypass mode" "0: External HSE clock analog mode,1: External HSE clock digital mode (through I/O.."
bitfld.long 0x0 19. "HSECSSON,Clock security system enable" "0: Clock security system OFF (clock detector OFF),1: Clock security system ON (clock detector ON if.."
newline
bitfld.long 0x0 18. "HSEBYP,HSE crystal oscillator bypass" "0: HSE crystal oscillator not bypassed,1: HSE crystal oscillator bypassed with external.."
rbitfld.long 0x0 17. "HSERDY,HSE clock ready flag" "0: HSE oscillator not ready,1: HSE oscillator ready"
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bitfld.long 0x0 16. "HSEON,HSE clock enable" "0: HSE oscillator OFF,1: HSE oscillator ON"
rbitfld.long 0x0 15. "HSI48RDY,HSI48 clock ready flag" "0: HSI48 oscillator not ready,1: HSI48 oscillator ready"
newline
bitfld.long 0x0 14. "HSI48ON,HSI48 clock enable" "0: HSI48 oscillator OFF,1: HSI48 oscillator ON"
rbitfld.long 0x0 13. "HSIRDY,HSI16 clock ready flag" "0: HSI16 oscillator not ready,1: HSI16 oscillator ready"
newline
bitfld.long 0x0 12. "HSIKERON,HSI16 enable for some peripheral kernels" "0: No effect on HSI16 oscillator,1: HSI16 oscillator forced ON even in Stop mode"
bitfld.long 0x0 11. "HSION,HSI16 clock enable" "0: HSI16 oscillator OFF,1: HSI16 oscillator ON"
newline
rbitfld.long 0x0 10. "MSIPLL0RDY,MSIRC0 PLL mode ready flag" "0: MSIRC0 PLL mode is not ready,1: MSIRC0 PLL mode is ready"
rbitfld.long 0x0 9. "MSIPLL1RDY,MSIRC1 PLL mode ready flag" "0: MSIRC1 PLL mode is not ready,1: MSIRC1 PLL mode is ready"
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bitfld.long 0x0 8. "MSIPLL0FAST,MSIRC0 PLL mode fast startup" "0: MSIRC0 PLL normal startup,1: MSIRC0 PLL fast startup"
bitfld.long 0x0 7. "MSIPLL1FAST,MSIRC1 PLL mode fast startup" "0: MSIRC1 PLL normal startup,1: MSIRC1 PLL fast startup"
newline
bitfld.long 0x0 6. "MSIPLL0EN,MSIRC0 PLL mode enable" "0: MSIRC0 PLL mode disabled,1: MSIRC0 PLL mode enabled"
bitfld.long 0x0 5. "MSIPLL1EN,MSIRC1 PLL mode enable" "0: MSIRC1 PLL mode disabled,1: MSIRC1 PLL mode enabled"
newline
rbitfld.long 0x0 4. "MSIKRDY,MSIK clock ready flag" "0: MSIK (MSI kernel) oscillator not ready,1: MSIK (MSI kernel) oscillator ready"
bitfld.long 0x0 3. "MSIKON,MSIK clock enable" "0: MSIK (MSI kernel) oscillator disabled,1: MSIK (MSI kernel) oscillator enabled"
newline
rbitfld.long 0x0 2. "MSISRDY,MSIS clock ready flag" "0: MSIS (MSI system) oscillator not ready,1: MSIS (MSI system) oscillator ready"
bitfld.long 0x0 1. "MSIKERON,MSI enable for some peripheral kernels" "0: No effect on MSI oscillator,1: MSI oscillator forced ON even in Stop mode."
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bitfld.long 0x0 0. "MSISON,MSIS clock enable" "0: MSIS (MSI system) oscillator OFF,1: MSIS (MSI system) oscillator ON"
group.long 0x8++0xB
line.long 0x0 "RCC_ICSCR1,RCC internal clock source calibration register 1"
bitfld.long 0x0 31. "MSISSEL,MSIS clock source selection" "0: MSIRC0 (96 MHz) is selected as source to..,1: MSIRC1 (24 MHz) is selected as source to.."
bitfld.long 0x0 29.--30. "MSISDIV,MSIS oscillator division" "0: MSIRC0/1 is selected for MSIS (range 0 around 96..,1: MSIRC0/2 is selected for MSIS (range 1 around 48..,2: MSIRC0/4 is selected for MSIS (range 2 around 24..,3: MSIRC0/8 is selected for MSIS (range 3 around 12.."
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bitfld.long 0x0 28. "MSIKSEL,MSIK clock source selection" "0: MSIRC0 (96 MHz) is selected as source to..,1: MSIRC1 (24 MHz) is selected as source to.."
bitfld.long 0x0 26.--27. "MSIKDIV,MSIK oscillator division" "0: MSIRC0/1 is selected for MSIK (range 0 around 96..,1: MSIRC0/2 is selected for MSIK (range 1 around 48..,2: MSIRC0/4 is selected for MSIK (range 2 around 24..,3: MSIRC0/8 is selected for MSIK (range 3 around 12.."
newline
bitfld.long 0x0 24.--25. "MSIPLL1N,MSIRC1 PLL mode with LSE multiplication factor" "0,1,2,3"
bitfld.long 0x0 23. "MSIRGSEL,MSI clock range selection" "0: MSIS/MSIK ranges provided by MSISDIVS[1:0] and..,1: MSIS/MSIK ranges provided by MSISDIV[1:0] and.."
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bitfld.long 0x0 22. "MSIBIAS,MSI bias mode selection" "0: MSI bias continuous mode (clock accuracy fast..,1: MSI bias sampling mode when the device is in.."
bitfld.long 0x0 21. "MSIPLL0SEL,MSIRC0 PLL mode input clock selection" "0: LSE is used as MSIRC0 input clock when PLL mode..,1: HSE or HSE/2 is used as MSIRC0 input clock when.."
newline
bitfld.long 0x0 20. "MSIPLL1SEL,MSIRC1 PLL mode input clock selection" "0: LSE is used as MSIRC1 input clock when PLL mode..,1: HSE or HSE/2 is used as MSIRC1 input clock when.."
bitfld.long 0x0 19. "MSIHSINDIV,MSIRCx (x = 0 1) PLL mode HSE input division" "0: HSE (16 MHz) is used as MSI input clock when PLL..,1: HSE (32 MHz)/2 is used as MSI input clock when.."
newline
hexmask.long.byte 0x0 6.--11. 1. "MSICAL0,MSIRC0 clock calibration for MSI ranges 0 to 3"
hexmask.long.byte 0x0 0.--5. 1. "MSICAL1,MSIRC1 clock calibration for MSI ranges 4 to 7"
line.long 0x4 "RCC_ICSCR2,RCC internal clock source calibration register 2"
hexmask.long.byte 0x4 6.--11. 1. "MSITRIM0,MSIRC0 clock trimming for ranges 0 to 3"
hexmask.long.byte 0x4 0.--5. 1. "MSITRIM1,MSIRC1 clock trimming for ranges 4 to 7"
line.long 0x8 "RCC_ICSCR3,RCC internal clock source calibration register 3"
hexmask.long.byte 0x8 16.--20. 1. "HSITRIM,HSI clock trimming"
hexmask.long.word 0x8 0.--11. 1. "HSICAL,HSI clock calibration"
rgroup.long 0x14++0x3
line.long 0x0 "RCC_CRRCR,RCC clock recovery RC register"
hexmask.long.word 0x0 0.--8. 1. "HSI48CAL,HSI48 clock calibration"
group.long 0x1C++0xF
line.long 0x0 "RCC_CFGR1,RCC clock configuration register 1"
bitfld.long 0x0 28.--30. "MCOPRE,Microcontroller clock output prescaler" "0: MCO divided by 1,1: MCO divided by 2,2: MCO divided by 4,3: MCO divided by 8,4: MCO divided by 16,5: MCO divided by 32,6: MCO divided by 64,7: MCO divided by 128"
hexmask.long.byte 0x0 24.--27. 1. "MCOSEL,Microcontroller clock output"
newline
bitfld.long 0x0 20.--22. "MCO2PRE,Microcontroller clock output 2 prescaler" "0: MCO2 divided by 1,1: MCO2 divided by 2,2: MCO2 divided by 4,3: MCO2 divided by 8,4: MCO2 divided by 16,5: MCO2 divided by 32,6: MCO2 divided by 64,7: MCO2 divided by 128"
hexmask.long.byte 0x0 16.--19. 1. "MCO2SEL,Microcontroller clock output 2"
newline
bitfld.long 0x0 5. "STOPKERWUCK,Wake-up from Stop kernel clock automatic enable selection" "0: MSIK oscillator automatically enabled when..,1: HSI16 oscillator automatically enabled when.."
bitfld.long 0x0 4. "STOPWUCK,Wake-up from Stop and CSS backup clock selection" "0: MSIS oscillator selected as wake-up from stop..,1: HSI16 oscillator selected as wake-up from stop.."
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rbitfld.long 0x0 2.--3. "SWS,System clock switch status" "0: MSIS oscillator used as system clock,1: HSI16 oscillator used as system clock,2: HSE used as system clock,?"
bitfld.long 0x0 0.--1. "SW,System clock switch" "0: MSIS selected as system clock,1: HSI16 selected as system clock,2: HSE selected as system clock,?"
line.long 0x4 "RCC_CFGR2,RCC clock configuration register 2"
bitfld.long 0x4 8.--10. "PPRE2,APB2 prescaler" "0: PCLK2 = HCLK not divided,1: PCLK2 = HCLK not divided,2: PCLK2 = HCLK not divided,3: PCLK2 = HCLK not divided,4: PCLK2 = HCLK divided by 2,5: PCLK2 = HCLK divided by 4,6: PCLK2 = HCLK divided by 8,7: PCLK2 = HCLK divided by 16"
bitfld.long 0x4 4.--6. "PPRE1,APB1 prescaler" "0: PCLK1 = HCLK not divided,1: PCLK1 = HCLK not divided,2: PCLK1 = HCLK not divided,3: PCLK1 = HCLK not divided,4: PCLK1 = HCLK divided by 2,5: PCLK1 = HCLK divided by 4,6: PCLK1 = HCLK divided by 8,7: PCLK1 = HCLK divided by 16"
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hexmask.long.byte 0x4 0.--3. 1. "HPRE,AHB prescaler"
line.long 0x8 "RCC_CFGR3,RCC clock configuration register 3"
bitfld.long 0x8 4.--6. "PPRE3,APB3 prescaler" "0: PCLK3 = HCLK not divided,1: PCLK3 = HCLK not divided,2: PCLK3 = HCLK not divided,3: PCLK3 = HCLK not divided,4: PCLK3 = HCLK divided by 2,5: PCLK3 = HCLK divided by 4,6: PCLK3 = HCLK divided by 8,7: PCLK3 = HCLK divided by 16"
line.long 0xC "RCC_CFGR4,RCC clock configuration register 4"
hexmask.long.byte 0xC 12.--15. 1. "BOOSTDIV,EPOD booster input clock prescaler"
bitfld.long 0xC 0.--1. "BOOSTSEL,EPOD booster input clock source selection" "0: No clock,1: MSIS selected as EPOD booster clock source,2: HSI16 selected as EPOD booster clock source,3: HSE selected as EPOD booster clock source"
group.long 0x50++0x3
line.long 0x0 "RCC_CIER,RCC clock interrupt enable register"
bitfld.long 0x0 12. "LSECSSIE,LSE clock security system interrupt enable" "0: LSE CSS interrupt disabled,1: LSE CSS interrupt enabled"
bitfld.long 0x0 11. "MSIKRDYIE,MSIK ready interrupt enable" "0: MSIK ready interrupt disabled,1: MSIK ready interrupt enabled"
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bitfld.long 0x0 9. "MSIPLLHSUIE,MSI PLL mode with HSE unlock interrupt enable" "0: MSI PLL mode with HSE unlock interrupt disabled,1: MSI PLL mode with HSE unlock interrupt enabled"
bitfld.long 0x0 8. "MSIPLLUIE,MSI PLL mode with LSE unlock interrupt enable" "0: MSI PLL mode with LSE unlock interrupt disabled,1: MSI PLL mode with LSE unlock interrupt enabled"
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bitfld.long 0x0 7. "MSIPLL0RDYIE,MSIRC0 PLL mode ready interrupt enable" "0: MSIRC0 PLL mode lock interrupt disabled,1: MSIRC0 PLL mode lock interrupt enabled"
bitfld.long 0x0 6. "MSIPLL1RDYIE,MSIRC1 PLL mode ready interrupt enable" "0: MSIRC1 PLL mode lock interrupt disabled,1: MSIRC1 PLL mode lock interrupt enabled"
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bitfld.long 0x0 5. "HSI48RDYIE,HSI48 ready interrupt enable" "0: HSI48 ready interrupt disabled,1: HSI48 ready interrupt enabled"
bitfld.long 0x0 4. "HSERDYIE,HSE ready interrupt enable" "0: HSE ready interrupt disabled,1: HSE ready interrupt enabled"
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bitfld.long 0x0 3. "HSIRDYIE,HSI16 ready interrupt enable" "0: HSI16 ready interrupt disabled,1: HSI16 ready interrupt enabled"
bitfld.long 0x0 2. "MSISRDYIE,MSIS ready interrupt enable" "0: MSIS ready interrupt disabled,1: MSIS ready interrupt enabled"
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bitfld.long 0x0 1. "LSERDYIE,LSE ready interrupt enable" "0: LSE ready interrupt disabled,1: LSE ready interrupt enabled"
bitfld.long 0x0 0. "LSIRDYIE,LSI ready interrupt enable" "0: LSI ready interrupt disabled,1: LSI ready interrupt enabled"
rgroup.long 0x54++0x3
line.long 0x0 "RCC_CIFR,RCC clock interrupt flag register"
bitfld.long 0x0 12. "LSECSSF,LSE clock security system interrupt flag" "0: No LSE clock security interrupt,1: LSE clock security interrupt"
bitfld.long 0x0 11. "MSIKRDYF,MSIK ready interrupt flag" "0: No MSIK oscillator clock ready interrupt,1: MSIK oscillator clock ready interrupt"
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bitfld.long 0x0 10. "CSSF,Clock security system interrupt flag" "0: No HSE clock security interrupt,1: HSE clock security interrupt"
bitfld.long 0x0 9. "MSIPLLHSUF,MSI PLL mode with HSE unlock interrupt flag" "0: No MSI PLL mode with HSE unlock interrupt,1: MSI PLL mode with HSE unlock interrupt"
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bitfld.long 0x0 8. "MSIPLLUF,MSI PLL mode with LSE unlock interrupt flag" "0: No MSI PLL mode with LSE unlock interrupt,1: MSI PLL mode with LSE unlock interrupt"
bitfld.long 0x0 7. "MSIPLL0RDYF,MSIRC0 PLL mode ready interrupt flag" "0: No MSIRC0 PLL mode ready interrupt,1: MSIRC0 PLL mode ready interrupt"
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bitfld.long 0x0 6. "MSIPLL1RDYF,MSIRC1 PLL mode ready interrupt enable" "0: No MSIRC1 PLL mode ready interrupt,1: MSIRC1 PLL mode ready interrupt"
bitfld.long 0x0 5. "HSI48RDYF,HSI48 ready interrupt flag" "0: No HSI48 ready interrupt,1: HSI48 ready interrupt"
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bitfld.long 0x0 4. "HSERDYF,HSE ready interrupt flag" "0: No HSE ready interrupt,1: HSE ready interrupt"
bitfld.long 0x0 3. "HSIRDYF,HSI16 ready interrupt flag" "0: No HSI16 ready interrupt,1: HSI16 ready interrupt"
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bitfld.long 0x0 2. "MSISRDYF,MSIS ready interrupt flag" "0: No MSIS ready interrupt,1: MSIS ready interrupt"
bitfld.long 0x0 1. "LSERDYF,LSE ready interrupt flag" "0: No LSE ready interrupt,1: LSE ready interrupt"
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bitfld.long 0x0 0. "LSIRDYF,LSI ready interrupt flag" "0: No LSI ready interrupt,1: LSI ready interrupt"
wgroup.long 0x58++0x3
line.long 0x0 "RCC_CICR,RCC clock interrupt clear register"
bitfld.long 0x0 12. "LSECSSC,LSE CSS interrupt clear" "0,1"
bitfld.long 0x0 11. "MSIKRDYC,MSIK oscillator ready interrupt clear" "0,1"
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bitfld.long 0x0 10. "CSSC,Clock security system interrupt clear" "0,1"
bitfld.long 0x0 9. "MSIPLLHSUC,MSI PLL mode with HSE unlock interrupt clear" "0,1"
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bitfld.long 0x0 8. "MSIPLLUC,MSI PLL mode with LSE unlock interrupt clear" "0,1"
bitfld.long 0x0 7. "MSIPLL0RDYC,MSIRC0 PLL mode ready interrupt clear" "0,1"
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bitfld.long 0x0 6. "MSIPLL1RDYC,MSIRC1 PLL mode ready interrupt clear" "0,1"
bitfld.long 0x0 5. "HSI48RDYC,HSI48 ready interrupt clear" "0,1"
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bitfld.long 0x0 4. "HSERDYC,HSE ready interrupt clear" "0,1"
bitfld.long 0x0 3. "HSIRDYC,HSI16 ready interrupt clear" "0,1"
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bitfld.long 0x0 2. "MSISRDYC,MSIS ready interrupt clear" "0,1"
bitfld.long 0x0 1. "LSERDYC,LSE ready interrupt clear" "0,1"
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bitfld.long 0x0 0. "LSIRDYC,LSI ready interrupt clear" "0,1"
group.long 0x60++0xB
line.long 0x0 "RCC_AHB1RSTR1,RCC AHB1 peripheral reset register 1"
bitfld.long 0x0 17. "RAMCFGRST,RAMCFG reset" "0: No effect,1: Reset RAMCFG"
bitfld.long 0x0 16. "TSCRST,TSC reset" "0: No effect,1: Reset TSC"
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bitfld.long 0x0 12. "CRCRST,CRC reset" "0: No effect,1: Reset CRC"
bitfld.long 0x0 3. "ADF1RST,ADF1 reset" "0: No effect,1: Reset ADF1"
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bitfld.long 0x0 0. "GPDMA1RST,GPDMA1 reset" "0: No effect,1: Reset GPDMA1"
line.long 0x4 "RCC_AHB2RSTR1,RCC AHB2 peripheral reset register 1"
bitfld.long 0x4 27. "SDMMC1RST,SDMMC1 reset" "0: No effect,1: Reset SDMMC1"
bitfld.long 0x4 21. "CCBRST,CCB reset" "0: No effect,1: Reset CCB"
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bitfld.long 0x4 20. "SAESRST,SAES hardware accelerator reset" "0: No effect,1: Reset SAES"
bitfld.long 0x4 19. "PKARST,PKA reset" "0: No effect,1: Reset PKA"
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bitfld.long 0x4 18. "RNGRST,Random number generator reset" "0: No effect,1: Reset RNG"
bitfld.long 0x4 17. "HASHRST,HASH reset" "0: No effect,1: Reset HASH"
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bitfld.long 0x4 16. "AESRST,AES hardware accelerator reset" "0: No effect,1: Reset AES"
bitfld.long 0x4 11. "DAC1RST,DAC1 reset" "0: No effect,1: Reset DAC1"
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bitfld.long 0x4 10. "ADC12RST,ADC12 reset" "0: No effect,1: Reset ADC12"
bitfld.long 0x4 7. "GPIOHRST,I/O port i reset (i = H to G)" "0: No effect,1: Reset I/O port i"
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bitfld.long 0x4 6. "GPIOGRST,I/O port i reset (i = H to G)" "0: No effect,1: Reset I/O port i"
bitfld.long 0x4 4. "GPIOERST,I/O port i reset (i = E to A)" "0: No effect,1: Reset I/O port i"
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bitfld.long 0x4 3. "GPIODRST,I/O port i reset (i = E to A)" "0: No effect,1: Reset I/O port i"
bitfld.long 0x4 2. "GPIOCRST,I/O port i reset (i = E to A)" "0: No effect,1: Reset I/O port i"
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bitfld.long 0x4 1. "GPIOBRST,I/O port i reset (i = E to A)" "0: No effect,1: Reset I/O port i"
bitfld.long 0x4 0. "GPIOARST,I/O port i reset (i = E to A)" "0: No effect,1: Reset I/O port i"
line.long 0x8 "RCC_AHB2RSTR2,RCC AHB2 peripheral reset register 2"
bitfld.long 0x8 4. "OCTOSPI1RST,OCTOSPI1 reset" "0: No effect,1: Reset OCTOSPI1"
group.long 0x74++0xF
line.long 0x0 "RCC_APB1RSTR1,RCC APB1 peripheral reset register 1"
bitfld.long 0x0 29. "VREFRST,VREFBUF reset" "0: No effect,1: Reset VREFBUF"
bitfld.long 0x0 28. "OPAMPRST,OPAMP reset" "0: No effect,1: Reset OPAMP"
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bitfld.long 0x0 24. "CRSRST,CRS reset" "0: No effect,1: Reset the CRS"
bitfld.long 0x0 23. "I3C1RST,I3C1 reset" "0: No effect,1: Reset the I3C1"
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bitfld.long 0x0 22. "I2C2RST,I2C2 reset" "0: No effect,1: Reset the I2C2"
bitfld.long 0x0 21. "I2C1RST,I2C1 reset" "0: No effect,1: Reset the I2C1"
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bitfld.long 0x0 20. "UART5RST,UART5 reset" "0: No effect,1: Reset UART5"
bitfld.long 0x0 19. "UART4RST,UART4 reset" "0: No effect,1: Reset UART4"
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bitfld.long 0x0 18. "USART3RST,USART3 reset" "0: No effect,1: Reset USART3"
bitfld.long 0x0 14. "SPI2RST,SPI2 reset" "0: No effect,1: Reset SPI2"
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bitfld.long 0x0 8. "SPI3RST,SPI3 reset" "0: No effect,1: Reset SPI3"
bitfld.long 0x0 5. "TIM7RST,TIMj reset" "0: No effect,1: Reset TIMj"
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bitfld.long 0x0 4. "TIM6RST,TIMj reset" "0: No effect,1: Reset TIMj"
bitfld.long 0x0 2. "TIM4RST,TIMj reset" "0: No effect,1: Reset TIMj"
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bitfld.long 0x0 1. "TIM3RST,TIMj reset" "0: No effect,1: Reset TIMj"
bitfld.long 0x0 0. "TIM2RST,TIMj reset" "0: No effect,1: Reset TIMj"
line.long 0x4 "RCC_APB1RSTR2,RCC APB1 peripheral reset register 2"
bitfld.long 0x4 9. "FDCAN1RST,FDCAN1 reset" "0: No effect,1: Reset FDCAN1"
bitfld.long 0x4 5. "LPTIM2RST,LPTIM2 reset" "0: No effect,1: Reset LPTIM2"
line.long 0x8 "RCC_APB2RSTR,RCC APB2 peripheral reset register"
bitfld.long 0x8 27. "I3C2RST,I3C2 reset" "0: No effect,1: Reset I3C2"
bitfld.long 0x8 24. "USB1RST,USB1 reset" "0: No effect,1: Reset USB1"
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bitfld.long 0x8 21. "SAI1RST,SAI1 reset" "0: No effect,1: Reset SAI1"
bitfld.long 0x8 18. "TIM17RST,TIMi reset" "0: No effect,1: Reset TIMi"
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bitfld.long 0x8 17. "TIM16RST,TIMi reset" "0: No effect,1: Reset TIMi"
bitfld.long 0x8 16. "TIM15RST,TIMi reset" "0: No effect,1: Reset TIMi"
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bitfld.long 0x8 14. "USART1RST,USART1 reset" "0: No effect,1: Reset USART1"
bitfld.long 0x8 12. "SPI1RST,SPI1 reset" "0: No effect,1: Reset SPI1"
newline
bitfld.long 0x8 11. "TIM1RST,TIM1 reset" "0: No effect,1: Reset TIM1"
line.long 0xC "RCC_APB3RSTR,RCC APB3 peripheral reset register"
bitfld.long 0xC 15. "COMPRST,COMP reset" "0: No effect,1: Reset COMP"
bitfld.long 0xC 13. "LPTIM4RST,LPTIMi reset" "0: No effect,1: Reset LPTIMi"
newline
bitfld.long 0xC 12. "LPTIM3RST,LPTIMi reset" "0: No effect,1: Reset LPTIMi"
bitfld.long 0xC 11. "LPTIM1RST,LPTIM1 reset" "0: No effect,1: Reset LPTIM1"
newline
bitfld.long 0xC 7. "I2C3RST,I2C3 reset" "0: No effect,1: Reset I2C3"
bitfld.long 0xC 6. "LPUART1RST,LPUART1 reset" "0: No effect,1: Reset LPUART1"
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bitfld.long 0xC 1. "SYSCFGRST,SYSCFG reset" "0: No effect,1: Reset SYSCFG"
group.long 0x88++0xF
line.long 0x0 "RCC_AHB1ENR1,RCC AHB1 peripheral clock enable register 1"
bitfld.long 0x0 31. "SRAM1EN,SRAM1 clock enable" "0: SRAM1 clock disabled,1: SRAM1 clock enabled"
bitfld.long 0x0 24. "GTZC1EN,GTZC1 clock enable" "0: GTZC1 clock disabled,1: GTZC1 clock enabled"
newline
bitfld.long 0x0 17. "RAMCFGEN,RAMCFG clock enable" "0: RAMCFG clock disabled,1: RAMCFG clock enabled"
bitfld.long 0x0 16. "TSCEN,Touch sensing controller clock enable" "0: TSC clock disabled,1: TSC clock enabled"
newline
bitfld.long 0x0 12. "CRCEN,CRC clock enable" "0: CRC clock disabled,1: CRC clock enabled"
bitfld.long 0x0 8. "FLASHEN,FLASH clock enable" "0: FLASH clock disabled,1: FLASH clock enabled"
newline
bitfld.long 0x0 3. "ADF1EN,ADF1 clock enable" "0: ADF1 clock disabled,1: ADF1 clock enabled"
bitfld.long 0x0 0. "GPDMA1EN,GPDMA1 clock enable" "0: GPDMA1 clock disabled,1: GPDMA1 clock enabled"
line.long 0x4 "RCC_AHB2ENR1,RCC AHB2 peripheral clock enable register 1"
bitfld.long 0x4 30. "SRAM2EN,SRAM2 clock enable" "0: SRAM2 clock disabled,1: SRAM2 clock enabled"
bitfld.long 0x4 27. "SDMMC1EN,SDMMC1 clock enable" "0: SDMMC1 clock disabled,1: SDMMC1 clock enabled"
newline
bitfld.long 0x4 21. "CCBEN,CCB clock enable" "0: CCB clock disabled,1: CCB clock enabled"
bitfld.long 0x4 20. "SAESEN,SAES clock enable" "0: SAES clock disabled,1: SAES clock enabled"
newline
bitfld.long 0x4 19. "PKAEN,PKA clock enable" "0: PKA clock disabled,1: PKA clock enabled"
bitfld.long 0x4 18. "RNGEN,RNG clock enable" "0: RNG clock disabled,1: RNG clock enabled"
newline
bitfld.long 0x4 17. "HASHEN,HASH clock enable" "0: HASH clock disabled,1: HASH clock enabled"
bitfld.long 0x4 16. "AESEN,AES clock enable" "0: AES clock disabled,1: AES clock enabled"
newline
bitfld.long 0x4 11. "DAC1EN,DAC1 clock enable" "0: DAC1 clock disabled,1: DAC1 clock enabled"
bitfld.long 0x4 10. "ADC12EN,ADC12 clock enable" "0: ADC12 clock disabled,1: ADC12 clock enabled"
newline
bitfld.long 0x4 7. "GPIOHEN,I/O port i clock enable (i = H to G)" "0: I/O port i clock disabled,1: I/O port i clock enabled"
bitfld.long 0x4 6. "GPIOGEN,I/O port i clock enable (i = H to G)" "0: I/O port i clock disabled,1: I/O port i clock enabled"
newline
bitfld.long 0x4 4. "GPIOEEN,I/O port i clock enable (i = E to A)" "0: I/O port i clock disabled,1: I/O port i clock enabled"
bitfld.long 0x4 3. "GPIODEN,I/O port i clock enable (i = E to A)" "0: I/O port i clock disabled,1: I/O port i clock enabled"
newline
bitfld.long 0x4 2. "GPIOCEN,I/O port i clock enable (i = E to A)" "0: I/O port i clock disabled,1: I/O port i clock enabled"
bitfld.long 0x4 1. "GPIOBEN,I/O port i clock enable (i = E to A)" "0: I/O port i clock disabled,1: I/O port i clock enabled"
newline
bitfld.long 0x4 0. "GPIOAEN,I/O port i clock enable (i = E to A)" "0: I/O port i clock disabled,1: I/O port i clock enabled"
line.long 0x8 "RCC_AHB2ENR2,RCC AHB2 peripheral clock enable register 2"
bitfld.long 0x8 4. "OCTOSPI1EN,OCTOSPI1 clock enable" "0: OCTOSPI1 clock disabled,1: OCTOSPI1 clock enabled"
line.long 0xC "RCC_AHB1ENR2,RCC AHB1 peripheral clock enable register 2"
bitfld.long 0xC 2. "PWREN,PWR clock enable" "0: PWR clock disabled,1: PWR clock enabled"
group.long 0x9C++0xF
line.long 0x0 "RCC_APB1ENR1,RCC APB1 peripheral clock enable register 1"
bitfld.long 0x0 30. "RTCAPBEN,RTC and TAMP APB clock enable" "0: RTC and TAMP APB clock disabled,1: RTC and TAMP APB clock enabled"
bitfld.long 0x0 29. "VREFEN,VREFBUF clock enable" "0: VREFBUF clock disabled,1: VREFBUF clock enabled"
newline
bitfld.long 0x0 28. "OPAMPEN,OPAMP clock enable" "0: OPAMP clock disabled,1: OPAMP clock enabled"
bitfld.long 0x0 24. "CRSEN,CRS clock enable" "0: CRS clock disabled,1: CRS clock enabled"
newline
bitfld.long 0x0 23. "I3C1EN,I3C1 clock enable" "0: I3C1 clock disabled,1: I3C1 clock enabled"
bitfld.long 0x0 22. "I2C2EN,I2C2 clock enable" "0: I2C2 clock disabled,1: I2C2 clock enabled"
newline
bitfld.long 0x0 21. "I2C1EN,I2C1 clock enable" "0: I2C1 clock disabled,1: I2C1 clock enabled"
bitfld.long 0x0 20. "UART5EN,UART5 clock enable" "0: UART5 clocks disabled,1: UART5 clock enabled"
newline
bitfld.long 0x0 19. "UART4EN,UART4 clock enable" "0: UART4 clocks disabled,1: UART4 clock enabled"
bitfld.long 0x0 18. "USART3EN,USART3 clock enable" "0: USART3 clocks disabled,1: USART3 clock enabled"
newline
bitfld.long 0x0 14. "SPI2EN,SPI2 clock enable" "0: SPI2 clock disabled,1: SPI2 clock enabled"
bitfld.long 0x0 11. "WWDGEN,WWDG clock enable" "0: WWDG clock disabled,1: WWDG clock enabled"
newline
bitfld.long 0x0 8. "SPI3EN,SPI3 clock enable" "0: SPI3 clock disabled,1: SPI3 clock enabled"
bitfld.long 0x0 5. "TIM7EN,TIMj clock enable" "0: TIMj clock disabled,1: TIMj clock enabled"
newline
bitfld.long 0x0 4. "TIM6EN,TIMj clock enable" "0: TIMj clock disabled,1: TIMj clock enabled"
bitfld.long 0x0 2. "TIM4EN,TIMj clock enable" "0: TIMj clock disabled,1: TIMj clock enabled"
newline
bitfld.long 0x0 1. "TIM3EN,TIMj clock enable" "0: TIMj clock disabled,1: TIMj clock enabled"
bitfld.long 0x0 0. "TIM2EN,TIMj clock enable" "0: TIMj clock disabled,1: TIMj clock enabled"
line.long 0x4 "RCC_APB1ENR2,RCC APB1 peripheral clock enable register 2"
bitfld.long 0x4 9. "FDCAN1EN,FDCAN1 clock enable" "0: FDCAN1 clock disabled,1: FDCAN1 clock enabled"
bitfld.long 0x4 5. "LPTIM2EN,LPTIM2 clock enable" "0: LPTIM2 clock disabled,1: LPTIM2 clock enabled"
line.long 0x8 "RCC_APB2ENR,RCC APB2 peripheral clock enable register"
bitfld.long 0x8 27. "I3C2EN,I3C2 clock enable" "0: I3C2 clock disabled,1: I3C2 clock enabled"
bitfld.long 0x8 24. "USB1EN,USB1 clock enable" "0: USB1 clock disabled,1: USB1 clock enabled"
newline
bitfld.long 0x8 21. "SAI1EN,SAI1 clock enable" "0: SAI1 clock disabled,1: SAI1 clock enabled"
bitfld.long 0x8 18. "TIM17EN,TIMi clock enable" "0: TIMi clock disabled,1: TIMi clock enabled"
newline
bitfld.long 0x8 17. "TIM16EN,TIMi clock enable" "0: TIMi clock disabled,1: TIMi clock enabled"
bitfld.long 0x8 16. "TIM15EN,TIMi clock enable" "0: TIMi clock disabled,1: TIMi clock enabled"
newline
bitfld.long 0x8 14. "USART1EN,USART1clock enable" "0: USART1 clock disabled,1: USART1 clock enabled"
bitfld.long 0x8 12. "SPI1EN,SPI1 clock enable" "0: SPI1 clock disabled,1: SPI1 clock enabled"
newline
bitfld.long 0x8 11. "TIM1EN,TIM1 clock enable" "0: TIM1 clock disabled,1: TIM1 clock enabled"
line.long 0xC "RCC_APB3ENR,RCC APB3 peripheral clock enable register"
bitfld.long 0xC 15. "COMPEN,COMP clock enable" "0: COMP clock disabled,1: COMP clock enabled"
bitfld.long 0xC 13. "LPTIM4EN,LPTIMi clock enable" "0: LPTIMi clock disabled,1: LPTIMi clock enabled"
newline
bitfld.long 0xC 12. "LPTIM3EN,LPTIMi clock enable" "0: LPTIMi clock disabled,1: LPTIMi clock enabled"
bitfld.long 0xC 11. "LPTIM1EN,LPTIM1 clock enable" "0: LPTIM1 clock disabled,1: LPTIM1 clock enabled"
newline
bitfld.long 0xC 7. "I2C3EN,I2C3 clock enable" "0: I2C3 clock disabled,1: I2C3 clock enabled"
bitfld.long 0xC 6. "LPUART1EN,LPUART1 clock enable" "0: LPUART1 clock disabled,1: LPUART1 clock enabled"
newline
bitfld.long 0xC 1. "SYSCFGEN,SYSCFG clock enable" "0: SYSCFG clock disabled,1: SYSCFG clock enabled"
group.long 0xB0++0xF
line.long 0x0 "RCC_AHB1SLPENR1,RCC AHB1 peripheral clock enable in Sleep mode register"
bitfld.long 0x0 31. "SRAM1SLPEN,SRAM1 clock enable during Sleep mode" "0: SRAM1 clocks disabled by the clock gating during..,1: SRAM1 clock enabled by the clock gating during.."
bitfld.long 0x0 29. "ICACHESLPEN,ICACHE clock enable during Sleep mode" "0: ICACHE clocks disabled by the clock gating..,1: ICACHE clock enabled by the clock gating during.."
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bitfld.long 0x0 24. "GTZC1SLPEN,GTZC1 clock enable during Sleep mode" "0: GTZC1 clocks disabled by the clock gating during..,1: GTZC1 clock enabled by the clock gating during.."
bitfld.long 0x0 17. "RAMCFGSLPEN,RAMCFG clock enable during Sleep mode" "0: RAMCFG clocks disabled by the clock gating..,1: RAMCFG clock enabled by the clock gating during.."
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bitfld.long 0x0 16. "TSCSLPEN,TSC clock enable during Sleep mode" "0: TSC clocks disabled by the clock gating during..,1: TSC clock enabled by the clock gating during.."
bitfld.long 0x0 12. "CRCSLPEN,CRC clock enable during Sleep mode" "0: CRC clocks disabled by the clock gating during..,1: CRC clock enabled by the clock gating during.."
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bitfld.long 0x0 8. "FLASHSLPEN,FLASH clock enable during Sleep mode" "0: FLASH clocks disabled by the clock gating during..,1: FLASH clock enabled by the clock gating during.."
bitfld.long 0x0 3. "ADF1SLPEN,ADF1 clock enable during Sleep mode." "0: ADF1 clocks disabled by the clock gating during..,1: ADF1 clock enabled by the clock gating during.."
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bitfld.long 0x0 0. "GPDMA1SLPEN,GPDMA1 clock enable during Sleep mode" "0: GPDMA1 clocks disabled by the clock gating..,1: GPDMA1 clock enabled by the clock gating during.."
line.long 0x4 "RCC_AHB2SLPENR1,RCC AHB2 peripheral clock enable in Sleep mode register 1"
bitfld.long 0x4 30. "SRAM2SLPEN,SRAM2 clock enable during Sleep mode" "0: SRAM2 clocks disabled by the clock gating during..,1: SRAM2 clock enabled by the clock gating during.."
bitfld.long 0x4 27. "SDMMC1SLPEN,SDMMC1 clock enable during Sleep mode" "0: SDMMC1 clocks disabled by the clock gating..,1: SDMMC1 clock enabled by the clock gating during.."
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bitfld.long 0x4 21. "CCBSLPEN,CCB accelerator clock enable during Sleep mode" "0: CCB clocks disabled by the clock gating during..,1: CCB clock enabled by the clock gating during.."
bitfld.long 0x4 20. "SAESSLPEN,SAES accelerator clock enable during Sleep mode" "0: SAES clocks disabled by the clock gating during..,1: SAES clock enabled by the clock gating during.."
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bitfld.long 0x4 19. "PKASLPEN,PKA clock enable during Sleep mode" "0: PKA clocks disabled by the clock gating during..,1: PKA clock enabled by the clock gating during.."
bitfld.long 0x4 18. "RNGSLPEN,RNG clock enable during Sleep mode" "0: RNG clocks disabled by the clock gating during..,1: RNG clock enabled by the clock gating during.."
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bitfld.long 0x4 17. "HASHSLPEN,HASH clock enable during Sleep mode" "0: HASH clocks disabled by the clock gating during..,1: HASH clock enabled by the clock gating during.."
bitfld.long 0x4 16. "AESSLPEN,AES clock enable during Sleep mode" "0: AES clocks disabled by the clock gating during..,1: AES clock enabled by the clock gating during.."
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bitfld.long 0x4 11. "DAC1SLPEN,DAC1 clock enable during Sleep mode" "0: DAC1 clocks disabled by the clock gating during..,1: DAC1 clock enabled by the clock gating during.."
bitfld.long 0x4 10. "ADC12SLPEN,ADC12 clock enable during Sleep mode" "0: ADC12 clocks disabled by the clock gating during..,1: ADC12 clock enabled by the clock gating during.."
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bitfld.long 0x4 7. "GPIOHSLPEN,I/O port i clock enable during Sleep mode (i = H to G)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
bitfld.long 0x4 6. "GPIOGSLPEN,I/O port i clock enable during Sleep mode (i = H to G)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
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bitfld.long 0x4 4. "GPIOESLPEN,I/O port i clock enable during Sleep mode (i = E to A)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
bitfld.long 0x4 3. "GPIODSLPEN,I/O port i clock enable during Sleep mode (i = E to A)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
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bitfld.long 0x4 2. "GPIOCSLPEN,I/O port i clock enable during Sleep mode (i = E to A)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
bitfld.long 0x4 1. "GPIOBSLPEN,I/O port i clock enable during Sleep mode (i = E to A)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
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bitfld.long 0x4 0. "GPIOASLPEN,I/O port i clock enable during Sleep mode (i = E to A)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
line.long 0x8 "RCC_AHB2SLPENR2,RCC AHB2 peripheral clock enable in Sleep mode register 2"
bitfld.long 0x8 4. "OCTOSPI1SLPEN,OCTOSPI1 clock enable during Sleep mode" "0: OCTOSPI1 clocks disabled by the clock gating..,1: OCTOSPI1 clock enabled by the clock gating.."
line.long 0xC "RCC_AHB1SLPENR2,RCC AHB1 peripheral clock enable in Sleep mode register 2"
bitfld.long 0xC 2. "PWRSLPEN,PWR clock enable during Sleep mode" "0: PWR clock disabled by the clock gating during..,1: PWR clock enabled by the clock gating during.."
group.long 0xC4++0xF
line.long 0x0 "RCC_APB1SLPENR1,RCC APB1 peripheral clock enable in Sleep mode register 1"
bitfld.long 0x0 30. "RTCAPBSLPEN,RTC and TAMP APB clock enable during Sleep mode" "0: RTC and TAMP APB clock disabled by the clock..,1: RTC and TAMP APB clock enabled by the clock.."
bitfld.long 0x0 29. "VREFSLPEN,VREFBUF clock enable during Sleep mode" "0: VREFBUF clocks disabled by the clock gating..,1: VREFBUF clock enabled by the clock gating during.."
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bitfld.long 0x0 28. "OPAMPSLPEN,OPAMP clock enable during Sleep mode" "0: OPAMP clocks disabled by the clock gating during..,1: OPAMP clock enabled by the clock gating during.."
bitfld.long 0x0 24. "CRSSLPEN,CRS clock enable during Sleep mode" "0: CRS clocks disabled by the clock gating during..,1: CRS clock enabled by the clock gating during.."
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bitfld.long 0x0 23. "I3C1SLPEN,I3C1 clock enable during Sleep mode" "0: I3C1 clocks disabled by the clock gating during..,1: I3C1 clock enabled by the clock gating during.."
bitfld.long 0x0 22. "I2C2SLPEN,I2C2 clock enable during Sleep mode" "0: I2C2 clocks disabled by the clock gating during..,1: I2C2 clock enabled by the clock gating during.."
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bitfld.long 0x0 21. "I2C1SLPEN,I2C1 clock enable during Sleep mode" "0: I2C1 clocks disabled by the clock gating during..,1: I2C1 clock enabled by the clock gating during.."
bitfld.long 0x0 20. "UART5SLPEN,UART5 clock enable during Sleep mode" "0: UART5 clocks disabled by the clock gating during..,1: UART5 clock enabled by the clock gating during.."
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bitfld.long 0x0 19. "UART4SLPEN,UART4 clock enable during Sleep mode" "0: UART4 clocks disabled by the clock gating during..,1: UART4 clock enabled by the clock gating during.."
bitfld.long 0x0 18. "USART3SLPEN,USART3 clock enable during Sleep mode" "0: USART3 clocks disabled by the clock gating..,1: USART3 clock enabled by the clock gating during.."
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bitfld.long 0x0 14. "SPI2SLPEN,SPI2 clock enable during Sleep mode" "0: SPI2 clocks disabled by the clock gating during..,1: SPI2 clock enabled by the clock gating during.."
bitfld.long 0x0 11. "WWDGSLPEN,WWDG clock enable during Sleep mode" "0: WWDG clocks disabled by the clock gating during..,1: WWDG clock enabled by the clock gating during.."
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bitfld.long 0x0 8. "SPI3SLPEN,SPI3 clock enable during Sleep mode" "0: SPI3 clocks disabled by the clock gating during..,1: SPI3 clock enabled by the clock gating during.."
bitfld.long 0x0 5. "TIM7SLPEN,TIMj clock enable during Sleep mode" "0: TIMj clocks disabled by the clock gating during..,1: TIMj clock enabled by the clock gating during.."
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bitfld.long 0x0 4. "TIM6SLPEN,TIMj clock enable during Sleep mode" "0: TIMj clocks disabled by the clock gating during..,1: TIMj clock enabled by the clock gating during.."
bitfld.long 0x0 2. "TIM4SLPEN,TIMj clock enable during Sleep mode" "0: TIMj clocks disabled by the clock gating during..,1: TIMj clock enabled by the clock gating during.."
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bitfld.long 0x0 1. "TIM3SLPEN,TIMj clock enable during Sleep mode" "0: TIMj clocks disabled by the clock gating during..,1: TIMj clock enabled by the clock gating during.."
bitfld.long 0x0 0. "TIM2SLPEN,TIMj clock enable during Sleep mode" "0: TIMj clocks disabled by the clock gating during..,1: TIMj clock enabled by the clock gating during.."
line.long 0x4 "RCC_APB1SLPENR2,RCC APB1 peripheral clock enable in Sleep mode register 2"
bitfld.long 0x4 9. "FDCAN1SLPEN,FDCAN1 clock enable during Sleep mode" "0: FDCAN1 clocks disabled by the clock gating..,1: FDCAN1 clock enabled by the clock gating during.."
bitfld.long 0x4 5. "LPTIM2SLPEN,LPTIM2 clock enable during Sleep mode" "0: LPTIM2 clocks disabled by the clock gating..,1: LPTIM2 clock enabled by the clock gating during.."
line.long 0x8 "RCC_APB2SLPENR,RCC APB2 peripheral clock enable in Sleep mode register"
bitfld.long 0x8 27. "I3C2SLPEN,I3C2 clock enable during Sleep mode" "0: I3C2 clocks disabled by the clock gating during..,1: I3C2 clock enabled by the clock gating during.."
bitfld.long 0x8 24. "USB1SLPEN,USB1 clock enable during Sleep mode" "0: USB1 clocks disabled by the clock gating during..,1: USB1 clock enabled by the clock gating during.."
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bitfld.long 0x8 21. "SAI1SLPEN,SAI1 clock enable during Sleep mode" "0: SAI1 clocks disabled by the clock gating during..,1: SAI1 clock enabled by the clock gating during.."
bitfld.long 0x8 18. "TIM17SLPEN,TIMi clock enable during Sleep mode" "0: TIMi clock disabled during Sleep mode,1: TIMi clock enabled during Sleep mode"
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bitfld.long 0x8 17. "TIM16SLPEN,TIMi clock enable during Sleep mode" "0: TIMi clock disabled during Sleep mode,1: TIMi clock enabled during Sleep mode"
bitfld.long 0x8 16. "TIM15SLPEN,TIMi clock enable during Sleep mode" "0: TIMi clock disabled during Sleep mode,1: TIMi clock enabled during Sleep mode"
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bitfld.long 0x8 14. "USART1SLPEN,USART1clock enable during Sleep mode" "0: USART1clocks disabled by the clock gating during..,1: USART1clock enabled by the clock gating during.."
bitfld.long 0x8 12. "SPI1SLPEN,SPI1 clock enable during Sleep mode" "0: SPI1 clocks disabled by the clock gating during..,1: SPI1 clock enabled by the clock gating during.."
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bitfld.long 0x8 11. "TIM1SLPEN,TIM1 clock enable during Sleep mode" "0: TIM1 clock disabled during Sleep mode,1: TIM1 clock enabled during Sleep mode"
line.long 0xC "RCC_APB3SLPENR,RCC APB3 peripheral clock enable in Sleep mode register"
bitfld.long 0xC 15. "COMPSLPEN,COMP clock enable during Sleep mode" "0: COMP clocks disabled by the clock gating during..,1: COMP clock enabled by the clock gating during.."
bitfld.long 0xC 13. "LPTIM4SLPEN,LPTIMi clock enable during Sleep mode" "0: LPTIMi clock disabled during Sleep mode,1: LPTIMi clock enabled during Sleep mode"
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bitfld.long 0xC 12. "LPTIM3SLPEN,LPTIMi clock enable during Sleep mode" "0: LPTIMi clock disabled during Sleep mode,1: LPTIMi clock enabled during Sleep mode"
bitfld.long 0xC 11. "LPTIM1SLPEN,LPTIM1clock enable during Sleep mode" "0: LPTIM1 clock disabled during Sleep mode,1: LPTIM1 clock enabled during Sleep mode"
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bitfld.long 0xC 7. "I2C3SLPEN,I2C3 clock enable during Sleep mode" "0: I2C3 clocks disabled by the clock gating during..,1: I2C3 clock enabled by the clock gating during.."
bitfld.long 0xC 6. "LPUART1SLPEN,LPUART1 clock enable during Sleep mode" "0: LPUART1 clocks disabled by the clock gating..,1: LPUART1 clock enabled by the clock gating during.."
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bitfld.long 0xC 1. "SYSCFGSLPEN,SYSCFG clock enable during Sleep mode" "0: SYSCFG clocks disabled by the clock gating..,1: SYSCFG clock enabled by the clock gating during.."
group.long 0xD8++0x7
line.long 0x0 "RCC_AHB1STPENR1,RCC AHB1 peripheral clock enable in Stop mode register"
bitfld.long 0x0 31. "SRAM1STPEN,SRAM1 clock enable during Stop mode" "0: SRAM1 clocks disabled by the clock gating during..,1: SRAM1 clock enabled by the clock gating during.."
bitfld.long 0x0 24. "GTZC1STPEN,GTZC1 clock enable during Stop mode" "0: GTZC1 clocks disabled by the clock gating during..,1: GTZC1 clock enabled by the clock gating during.."
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bitfld.long 0x0 17. "RAMCFGSTPEN,RAMCFG clock enable during Stop mode" "0: RAMCFG clocks disabled by the clock gating..,1: RAMCFG clock enabled by the clock gating during.."
bitfld.long 0x0 8. "FLASHSTPEN,FLASH clock enable during Stop mode" "0: FLASH clocks disabled by the clock gating during..,1: FLASH clock enabled by the clock gating during.."
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bitfld.long 0x0 3. "ADF1STPEN,ADF1 clock enable during Stop mode." "0: ADF1 clocks disabled by the clock gating during..,1: ADF1 clock enabled by the clock gating during.."
bitfld.long 0x0 0. "GPDMA1STPEN,GPDMA1 clock enable during Stop mode." "0: GPDMA1 clocks disabled by the clock gating..,1: GPDMA1 clock enabled by the clock gating during.."
line.long 0x4 "RCC_AHB2STPENR1,RCC AHB2 peripheral clock enable in Stop mode register 1"
bitfld.long 0x4 30. "SRAM2STPEN,SRAM2 clock enable during Stop mode" "0: SRAM2 clocks disabled by the clock gating during..,1: SRAM2 clock enabled by the clock gating during.."
bitfld.long 0x4 11. "DAC1STPEN,DAC1 clock enable during Stop mode" "0: DAC1 clocks disabled by the clock gating during..,1: DAC1 clock enabled by the clock gating during.."
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bitfld.long 0x4 7. "GPIOHSTPEN,I/O port i clock enable during Stop mode (i = H to G)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
bitfld.long 0x4 6. "GPIOGSTPEN,I/O port i clock enable during Stop mode (i = H to G)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
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bitfld.long 0x4 4. "GPIOESTPEN,I/O port i clock enable during Stop mode (i = E to A)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
bitfld.long 0x4 3. "GPIODSTPEN,I/O port i clock enable during Stop mode (i = E to A)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
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bitfld.long 0x4 2. "GPIOCSTPEN,I/O port i clock enable during Stop mode (i = E to A)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
bitfld.long 0x4 1. "GPIOBSTPEN,I/O port i clock enable during Stop mode (i = E to A)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
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bitfld.long 0x4 0. "GPIOASTPEN,I/O port i clock enable during Stop mode (i = E to A)" "0: I/O port i clocks disabled by the clock gating..,1: I/O port i clock enabled by the clock gating.."
group.long 0xEC++0xF
line.long 0x0 "RCC_APB1STPENR1,RCC APB1 peripheral clock enable in Stop mode register 1"
bitfld.long 0x0 30. "RTCAPBSTPEN,RTC and TAMP APB clock enable during Stop mode" "0: RTC and TAMP APB clock disabled by the clock..,1: RTC and TAMP APB clock enabled by the clock.."
bitfld.long 0x0 29. "VREFSTPEN,VREFBUF clock enable during Stop mode" "0: VREFBUF clocks disabled by the clock gating..,1: VREFBUF clock enabled by the clock gating during.."
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bitfld.long 0x0 28. "OPAMPSTPEN,OPAMP clock enable during Stop mode" "0: OPAMP clocks disabled by the clock gating during..,1: OPAMP clock enabled by the clock gating during.."
bitfld.long 0x0 23. "I3C1STPEN,I3C1 clock enable during Stop mode" "0: I3C1 clocks disabled by the clock gating during..,1: I3C1 clock enabled by the clock gating during.."
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bitfld.long 0x0 22. "I2C2STPEN,I2C2 clock enable during Stop mode" "0: I2C2 clocks disabled by the clock gating during..,1: I2C2 clock enabled by the clock gating during.."
bitfld.long 0x0 21. "I2C1STPEN,I2C1 clock enable during Stop mode" "0: I2C1 clocks disabled by the clock gating during..,1: I2C1 clock enabled by the clock gating during.."
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bitfld.long 0x0 20. "UART5STPEN,UART5 clock enable during Stop mode" "0: UART5 clocks disabled by the clock gating during..,1: UART5 clock enabled by the clock gating during.."
bitfld.long 0x0 19. "UART4STPEN,UART4 clock enable during Stop mode" "0: UART4 clocks disabled by the clock gating during..,1: UART4 clock enabled by the clock gating during.."
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bitfld.long 0x0 18. "USART3STPEN,USART3 clock enable during Stop mode" "0: USART3 clocks disabled by the clock gating..,1: USART3 clock enabled by the clock gating during.."
bitfld.long 0x0 14. "SPI2STPEN,SPI2 clock enable during Stop mode" "0: SPI2 clocks disabled by the clock gating during..,1: SPI2 clock enabled by the clock gating during.."
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bitfld.long 0x0 8. "SPI3STPEN,SPI3 clock enable during Stop mode" "0: SPI3 clocks disabled by the clock gating during..,1: SPI3 clock enabled by the clock gating during.."
line.long 0x4 "RCC_APB1STPENR2,RCC APB1 peripheral clock enable in Stop mode register 2"
bitfld.long 0x4 5. "LPTIM2STPEN,LPTIM2 clock enable during Stop mode" "0: LPTIM2 clocks disabled by the clock gating..,1: LPTIM2 clock enabled by the clock gating during.."
line.long 0x8 "RCC_APB2STPENR,RCC APB2 peripheral clock enable in Stop mode register"
bitfld.long 0x8 27. "I3C2STPEN,I3C2 clock enable during Stop mode" "0: I3C2 clocks disabled by the clock gating during..,1: I3C2 clock enabled by the clock gating during.."
bitfld.long 0x8 24. "USB1STPEN,USB1 clock enable during Stop mode" "0: USB1 clocks disabled by the clock gating during..,1: USB1 clock enabled by the clock gating during.."
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bitfld.long 0x8 14. "USART1STPEN,USART1clock enable during Stop mode" "0: USART1clocks disabled by the clock gating during..,1: USART1clock enabled by the clock gating during.."
bitfld.long 0x8 12. "SPI1STPEN,SPI1 clock enable during Stop mode" "0: SPI1 clocks disabled by the clock gating during..,1: SPI1 clock enabled by the clock gating during.."
line.long 0xC "RCC_APB3STPENR,RCC APB3 peripheral clock enable in Stop mode register"
bitfld.long 0xC 15. "COMPSTPEN,COMP clock enable during Stop mode" "0: COMP clocks disabled by the clock gating during..,1: COMP clock enabled by the clock gating during.."
bitfld.long 0xC 13. "LPTIM4STPEN,LPTIMi clock enable during Stop mode" "0: LPTIMi clock disabled during Stop mode,1: LPTIMi clock enabled during Stop mode"
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bitfld.long 0xC 12. "LPTIM3STPEN,LPTIMi clock enable during Stop mode" "0: LPTIMi clock disabled during Stop mode,1: LPTIMi clock enabled during Stop mode"
bitfld.long 0xC 11. "LPTIM1STPEN,LPTIM1clock enable during Stop mode" "0: LPTIM1 clock disabled during Stop mode,1: LPTIM1 clock enabled during Stop mode"
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bitfld.long 0xC 7. "I2C3STPEN,I2C3 clock enable during Stop mode" "0: I2C3 clocks disabled by the clock gating during..,1: I2C3 clock enabled by the clock gating during.."
bitfld.long 0xC 6. "LPUART1STPEN,LPUART1 clock enable during Stop mode" "0: LPUART1 clocks disabled by the clock gating..,1: LPUART1 clock enabled by the clock gating during.."
group.long 0x100++0xB
line.long 0x0 "RCC_CCIPR1,RCC peripheral independent clock configuration register 1"
bitfld.long 0x0 29.--31. "TIMICSEL,Clock sources for TIM16 TIM17 and LPTIM2 internal input capture" "0: HSI MSIK and MSIS dividers disabled,1: HSI MSIK and MSIS dividers disabled,2: HSI MSIK and MSIS dividers disabled,3: HSI MSIK and MSIS dividers disabled,4: HSI/256 MSIS/1024 and MSIS/4 are generated and..,5: HSI/256 MSIS/1024 and MSIK/4 are generated and..,6: HSI/256 MSIK/1024 and MSIS/4 are generated and..,7: HSI/256 MSIK/1024 and MSIK/4 are generated and.."
bitfld.long 0x0 28. "USB1SEL,USB1 kernel clock prescaler selection" "0: usbsdmmc_iclk selected,1: usbsdmmc_iclk/2 selected"
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bitfld.long 0x0 26.--27. "ICLKSEL,Intermediate clock source selection" "0: HSI48 selected,1: MSIK selected,2: HSE selected,3: SYSCLK selected"
bitfld.long 0x0 24. "FDCAN1SEL,FDCAN1 kernel clock source selection" "0: SYSCLK selected,1: MSIK selected"
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bitfld.long 0x0 22.--23. "SYSTICKSEL,SysTick clock source selection" "0: HCLK/8 selected,1: LSI selected,2: LSE selected,?"
bitfld.long 0x0 20. "SPI1SEL,SPI1 kernel clock source selection" "0: PCLK2 selected,1: MSIK selected"
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bitfld.long 0x0 18.--19. "LPTIM2SEL,Low-power timer 2 kernel clock source selection" "0: PCLK1 selected,1: LSI selected,2: HSI16 selected,3: LSE selected"
bitfld.long 0x0 16. "SPI2SEL,SPI2 kernel clock source selection" "0: PCLK1 selected,1: MSIK selected"
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bitfld.long 0x0 14. "I3C2SEL,I3C2 kernel clock source selection" "0: PCLK2 selected,1: MSIK selected"
bitfld.long 0x0 12. "I2C2SEL,I2C2 kernel clock source selection" "0: PCLK1 selected,1: MSIK selected"
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bitfld.long 0x0 10. "I2C1SEL,I2C1 kernel clock source selection" "0: PCLK1 selected,1: MSIK selected"
bitfld.long 0x0 8. "I3C1SEL,I3C1 kernel clock source selection" "0: PCLK1 selected,1: MSIK selected"
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bitfld.long 0x0 6. "UART5SEL,UART5 kernel clock source selection" "0: PCLK1 selected,1: HSI16 selected"
bitfld.long 0x0 4. "UART4SEL,UART4 kernel clock source selection" "0: PCLK1 selected,1: HSI16 selected"
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bitfld.long 0x0 2. "USART3SEL,USART3 kernel clock source selection" "0: PCLK1 selected,1: HSI16 selected"
bitfld.long 0x0 0. "USART1SEL,USART1 kernel clock source selection" "0: PCLK2 selected,1: HSI16 selected"
line.long 0x4 "RCC_CCIPR2,RCC peripheral independent clock configuration register 2"
bitfld.long 0x4 20. "OCTOSPISEL,OCTOSPI1 kernel clock source selection" "0: SYSCLK selected,1: MSIK selected"
bitfld.long 0x4 19. "DAC1SHSEL,DAC1 sample and hold clock source selection" "0: LSE selected,1: LSI selected"
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bitfld.long 0x4 16.--17. "ADCDACSEL,ADC12 and DAC1 intermediate kernel clock source selection" "0: HCLK selected,1: HSE selected,2: MSIK selected,?"
hexmask.long.byte 0x4 12.--15. 1. "ADCDACPRE,ADC12 and DAC1 kernel clock prescaler"
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bitfld.long 0x4 11. "RNGSEL,RNG kernel clock source selection" "0: HSI48 selected,1: MSIK selected"
bitfld.long 0x4 5.--6. "SAI1SEL,SAI1 kernel clock source selection" "0: MSIK selected,1: input pin AUDIOCLK selected,2: HSE clock selected,?"
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bitfld.long 0x4 3. "SPI3SEL,SPI3 kernel clock source selection" "0: PCLK1 selected,1: MSIK selected"
bitfld.long 0x4 0.--1. "ADF1SEL,ADF1 kernel clock source selection" "0: HCLK,1: Input pin AUDIOCLK selected,2: MSIK clock selected,3: SAI1 kernel clock selected"
line.long 0x8 "RCC_CCIPR3,RCC peripheral independent clock configuration register 3"
bitfld.long 0x8 10.--11. "LPTIM1SEL,LPTIM1 kernel clock source selection" "0: MSIK clock selected,1: LSI selected,2: HSI16 selected,3: LSE selected"
bitfld.long 0x8 8.--9. "LPTIM34SEL,LPTIM3 and LPTIM4 kernel clock source selection" "0: MSIK clock selected,1: LSI selected,2: HSI16 selected,3: LSE selected"
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bitfld.long 0x8 6. "I2C3SEL,I2C3 kernel clock source selection" "0: PCLK3 selected,1: MSIK selected"
bitfld.long 0x8 0.--1. "LPUART1SEL,LPUART1 kernel clock source selection" "0: PCLK3 selected,1: HSI16 selected,2: LSE selected,3: MSIK selected"
group.long 0x110++0x7
line.long 0x0 "RCC_BDCR,RCC backup domain control register"
bitfld.long 0x0 25. "LSCOSEL,Low-speed clock output selection" "0: LSI selected,1: LSE selected"
bitfld.long 0x0 24. "LSCOEN,Low-speed clock output (LSCO) enable" "0: LSCO disabled,1: LSCO enabled"
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bitfld.long 0x0 16. "BDRST,Backup domain software reset" "0: No effec,1: Reset the entire backup domain"
bitfld.long 0x0 15. "RTCEN,RTC and TAMP clock enable" "0: RTC and TAMP clock disabled,1: RTC and TAMP clock enabled"
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bitfld.long 0x0 12. "LSEGFON,LSE clock glitch filter enable" "0: LSE glitch filter disabled,1: LSE glitch filter enabled"
bitfld.long 0x0 11. "LSESYSRDY,LSE system clock (LSESYS) ready" "0: LSESYS clock not ready,1: LSESYS clock ready"
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bitfld.long 0x0 8.--9. "RTCSEL,RTC and TAMP clock source selection" "0: No clock selected,1: LSE selected,2: LSI selected,3: HSE/32 selected"
bitfld.long 0x0 7. "LSESYSEN,LSE system clock (LSESYS) enable" "0: LSE can be used only for RTC TAMP and CSS on LSE.,1: LSE can be used by any other peripheral or.."
newline
bitfld.long 0x0 6. "LSECSSD,CSS on LSE failure detection" "0: No failure detected on LSE,1: Failure detected on LSE"
bitfld.long 0x0 5. "LSECSSON,CSS on LSE enable" "0: CSS on LSE OFF,1: CSS on LSE ON"
newline
bitfld.long 0x0 3.--4. "LSEDRV,LSE oscillator drive capability" "0: 'xtal mode' lower driving capability,1: 'xtal mode' medium-low driving capability,2: 'xtal mode' medium-high driving capability,3: 'xtal mode' higher driving capability"
bitfld.long 0x0 2. "LSEBYP,LSE oscillator bypass" "0: LSE oscillator not bypassed,?"
newline
bitfld.long 0x0 1. "LSERDY,LSE oscillator ready" "0: LSE oscillator not ready,1: LSE oscillator ready"
bitfld.long 0x0 0. "LSEON,LSE oscillator enable" "0: LSE oscillator OFF,1: LSE oscillator ON"
line.long 0x4 "RCC_CSR,RCC control/status register"
bitfld.long 0x4 31. "LPWRRSTF,Low-power reset flag" "0: No illegal low-power mode reset occurred.,1: Illegal low-power mode reset occurred."
bitfld.long 0x4 30. "WWDGRSTF,Window watchdog reset flag" "0: No window watchdog reset occurred,1: Window watchdog reset occurred"
newline
bitfld.long 0x4 29. "IWDGRSTF,Independent watchdog reset flag" "0: No independent watchdog reset occurred.,1: Independent watchdog reset occurred."
bitfld.long 0x4 28. "SFTRSTF,Software reset flag" "0: No software reset occurred.,1: Software reset occurred."
newline
bitfld.long 0x4 27. "BORRSTF,BOR flag" "0: No BOR occurred.,1: BOR occurred."
bitfld.long 0x4 26. "PINRSTF,NRST pin reset flag" "0: No reset from NRST pin occurred.,1: Reset from NRST pin occurred"
newline
bitfld.long 0x4 25. "OBLRSTF,Option-byte loader reset flag" "0: No reset from option-byte loading occurred.,1: Reset from option-byte loading occurred."
bitfld.long 0x4 23. "RMVF,Remove reset flag" "0: No effect,1: Clear the reset flags."
newline
bitfld.long 0x4 12.--13. "MSISDIVS,MSIS oscillator division after Standby mode" "?,1: Range 5 around 12 MHz (reset value),2: Range 6 around 6 MHz,3: Range 7 around 3 MHz"
bitfld.long 0x4 8.--9. "MSIKDIVS,MSIK oscillator division after Standby mode" "?,1: Range 5 around 12 MHz (reset value),2: Range 6 around 6 MHz,3: Range 7 around 3 MHz"
newline
bitfld.long 0x4 2. "LSIPREDIV,Low-speed clock divider configuration" "0: LSI not divided,1: LSI divided by 128"
bitfld.long 0x4 1. "LSIRDY,LSI oscillator ready" "0: LSI oscillator not ready,1: LSI oscillator ready"
newline
bitfld.long 0x4 0. "LSION,LSI oscillator enable" "0: LSI oscillator OFF,1: LSI oscillator ON"
group.long 0x130++0x7
line.long 0x0 "RCC_SECCFGR,RCC secure configuration register"
bitfld.long 0x0 12. "RMVFSEC,Remove reset flag security" "0: Nonsecure,1: Secure"
bitfld.long 0x0 11. "HSI48SEC,HSI48 clock configuration and status bit security" "0: Nonsecure,1: Secure"
newline
bitfld.long 0x0 10. "ICLKSEC,Intermediate clock source selection security" "0: Nonsecure,1: Secure"
bitfld.long 0x0 7. "BOOSTSEC,EPOD booster configuration bit security" "0: Nonsecure,1: Secure"
newline
bitfld.long 0x0 6. "PRESCSEC,AHBx/APBx prescaler configuration bit security" "0: Nonsecure,1: Secure"
bitfld.long 0x0 5. "SYSCLKSEC,SYSCLK clock selection STOPWUCK bit clock output on MCO configuration security" "0: Nonsecure,1: Secure"
newline
bitfld.long 0x0 4. "LSESEC,LSE clock configuration and status bit security" "0: Nonsecure,1: Secure"
bitfld.long 0x0 3. "LSISEC,LSI clock configuration and status bit security" "0: Nonsecure,1: Secure"
newline
bitfld.long 0x0 2. "MSISEC,MSI clock configuration and status bit security" "0: Nonsecure,1: Secure"
bitfld.long 0x0 1. "HSESEC,HSE clock configuration status bits and HSE_CSS security" "0: Nonsecure,1: Secure"
newline
bitfld.long 0x0 0. "HSISEC,HSI clock configuration and status bit security" "0: Nonsecure,1: Secure"
line.long 0x4 "RCC_PRIVCFGR,RCC privilege configuration register"
bitfld.long 0x4 1. "NSPRIV,RCC nonsecure function privilege configuration" "0: Read and write to RCC nonsecure functions can be..,1: Read and write to RCC nonsecure functions can be.."
bitfld.long 0x4 0. "SPRIV,RCC secure function privilege configuration" "0: Read and write to RCC secure functions can be..,1: Read and write to RCC secure functions can be.."
tree.end
tree.end
tree "RNG (Random Number Generator)"
base ad:0x0
tree "RNG"
base ad:0x420C0800
group.long 0x0++0x7
line.long 0x0 "RNG_CR,RNG control register"
bitfld.long 0x0 31. "CONFIGLOCK,RNG Config lock" "0: Writes to the RNG_NSCR RNG_HTCR and the RNG_CR..,1: Writes to the RNG_NSCR RNG_HTCR and the RNG_CR.."
bitfld.long 0x0 30. "CONDRST,Conditioning soft reset" "0,1"
newline
hexmask.long.byte 0x0 20.--25. 1. "RNG_CONFIG1,RNG configuration 1"
hexmask.long.byte 0x0 16.--19. 1. "CLKDIV,Clock divider factor"
newline
bitfld.long 0x0 13.--15. "RNG_CONFIG2,RNG configuration 2" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 12. "NISTC,NIST custom" "0: Hardware default values for NIST compliant RNG.,1: Custom values for NIST compliant RNG."
newline
hexmask.long.byte 0x0 8.--11. 1. "RNG_CONFIG3,RNG configuration 3"
bitfld.long 0x0 7. "ARDIS,Auto reset disable" "0: Auto-reset is enabled,1: Auto-reset is disabled"
newline
bitfld.long 0x0 5. "CED,Clock error detection" "0: Clock error detection is enabled.,1: Clock error detection is disabled"
bitfld.long 0x0 3. "IE,Interrupt enable" "0: RNG interrupt is disabled,1: RNG interrupt is enabled."
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bitfld.long 0x0 2. "RNGEN,True random number generator enable" "0: True random number generator disabled.,1: True random number generator enabled."
line.long 0x4 "RNG_SR,RNG status register"
bitfld.long 0x4 6. "SEIS,Seed error interrupt status" "0: No faulty sequence detected,1: At least one faulty sequence is detected."
bitfld.long 0x4 5. "CEIS,Clock error interrupt status" "0: The RNG clock is correct (fless..,1: The RNG clock before the internal divider is.."
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rbitfld.long 0x4 4. "BUSY,Busy" "0: Idle,1: Busy"
rbitfld.long 0x4 2. "SECS,Seed error current status" "0: No faulty sequence has currently been detected.,1: At least one of the following faulty sequence.."
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rbitfld.long 0x4 1. "CECS,Clock error current status" "0: The RNG clock is correct (fless..,1: The RNG clock is too slow (fless.."
rbitfld.long 0x4 0. "DRDY,Data ready" "0: No valid random data ready.,1: Valid random data ready."
rgroup.long 0x8++0x3
line.long 0x0 "RNG_DR,RNG data register"
hexmask.long 0x0 0.--31. 1. "RNDATA,Random data"
group.long 0xC++0x13
line.long 0x0 "RNG_NSCR,RNG noise source control register"
bitfld.long 0x0 6.--8. "EN_OSC3,Each bit drives one oscillator enable signal input of instance number 3 gated with the RNGEN bit in RNG_CR (set bit to enable the oscillator)." "0,1,2,3,4,5,6,7"
bitfld.long 0x0 3.--5. "EN_OSC2,Each bit drives one oscillator enable signal input of instance number 2 gated with the RNGEN bit in RNG_CR (set bit to enable the oscillator)." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0.--2. "EN_OSC1,Each bit drives one oscillator enable signal input of instance number 1 gated with the RNGEN bit in RNG_CR (set bit to enable the oscillator)." "0,1,2,3,4,5,6,7"
line.long 0x4 "RNG_HTCR0,RNG health test control register 0"
hexmask.long 0x4 0.--31. 1. "HTCFG,health test configuration"
line.long 0x8 "RNG_HTCR1,RNG health test control register 1"
hexmask.long 0x8 0.--31. 1. "HTCFG,health test configuration"
line.long 0xC "RNG_HTCR2,RNG health test control register 2"
hexmask.long 0xC 0.--31. 1. "HTCFG,health test configuration"
line.long 0x10 "RNG_HTCR3,RNG health test control register 3"
hexmask.long 0x10 0.--31. 1. "HTCFG,health test configuration"
tree.end
tree "SEC_RNG"
base ad:0x520C0800
group.long 0x0++0x7
line.long 0x0 "RNG_CR,RNG control register"
bitfld.long 0x0 31. "CONFIGLOCK,RNG Config lock" "0: Writes to the RNG_NSCR RNG_HTCR and the RNG_CR..,1: Writes to the RNG_NSCR RNG_HTCR and the RNG_CR.."
bitfld.long 0x0 30. "CONDRST,Conditioning soft reset" "0,1"
newline
hexmask.long.byte 0x0 20.--25. 1. "RNG_CONFIG1,RNG configuration 1"
hexmask.long.byte 0x0 16.--19. 1. "CLKDIV,Clock divider factor"
newline
bitfld.long 0x0 13.--15. "RNG_CONFIG2,RNG configuration 2" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 12. "NISTC,NIST custom" "0: Hardware default values for NIST compliant RNG.,1: Custom values for NIST compliant RNG."
newline
hexmask.long.byte 0x0 8.--11. 1. "RNG_CONFIG3,RNG configuration 3"
bitfld.long 0x0 7. "ARDIS,Auto reset disable" "0: Auto-reset is enabled,1: Auto-reset is disabled"
newline
bitfld.long 0x0 5. "CED,Clock error detection" "0: Clock error detection is enabled.,1: Clock error detection is disabled"
bitfld.long 0x0 3. "IE,Interrupt enable" "0: RNG interrupt is disabled,1: RNG interrupt is enabled."
newline
bitfld.long 0x0 2. "RNGEN,True random number generator enable" "0: True random number generator disabled.,1: True random number generator enabled."
line.long 0x4 "RNG_SR,RNG status register"
bitfld.long 0x4 6. "SEIS,Seed error interrupt status" "0: No faulty sequence detected,1: At least one faulty sequence is detected."
bitfld.long 0x4 5. "CEIS,Clock error interrupt status" "0: The RNG clock is correct (fless..,1: The RNG clock before the internal divider is.."
newline
rbitfld.long 0x4 4. "BUSY,Busy" "0: Idle,1: Busy"
rbitfld.long 0x4 2. "SECS,Seed error current status" "0: No faulty sequence has currently been detected.,1: At least one of the following faulty sequence.."
newline
rbitfld.long 0x4 1. "CECS,Clock error current status" "0: The RNG clock is correct (fless..,1: The RNG clock is too slow (fless.."
rbitfld.long 0x4 0. "DRDY,Data ready" "0: No valid random data ready.,1: Valid random data ready."
rgroup.long 0x8++0x3
line.long 0x0 "RNG_DR,RNG data register"
hexmask.long 0x0 0.--31. 1. "RNDATA,Random data"
group.long 0xC++0x13
line.long 0x0 "RNG_NSCR,RNG noise source control register"
bitfld.long 0x0 6.--8. "EN_OSC3,Each bit drives one oscillator enable signal input of instance number 3 gated with the RNGEN bit in RNG_CR (set bit to enable the oscillator)." "0,1,2,3,4,5,6,7"
bitfld.long 0x0 3.--5. "EN_OSC2,Each bit drives one oscillator enable signal input of instance number 2 gated with the RNGEN bit in RNG_CR (set bit to enable the oscillator)." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 0.--2. "EN_OSC1,Each bit drives one oscillator enable signal input of instance number 1 gated with the RNGEN bit in RNG_CR (set bit to enable the oscillator)." "0,1,2,3,4,5,6,7"
line.long 0x4 "RNG_HTCR0,RNG health test control register 0"
hexmask.long 0x4 0.--31. 1. "HTCFG,health test configuration"
line.long 0x8 "RNG_HTCR1,RNG health test control register 1"
hexmask.long 0x8 0.--31. 1. "HTCFG,health test configuration"
line.long 0xC "RNG_HTCR2,RNG health test control register 2"
hexmask.long 0xC 0.--31. 1. "HTCFG,health test configuration"
line.long 0x10 "RNG_HTCR3,RNG health test control register 3"
hexmask.long 0x10 0.--31. 1. "HTCFG,health test configuration"
tree.end
tree.end
tree "RTC (Real-Time Clock)"
base ad:0x0
tree "RTC"
base ad:0x40007800
group.long 0x0++0x7
line.long 0x0 "RTC_TR,RTC time register"
bitfld.long 0x0 22. "PM,AM/PM notation" "0: AM or 24-hour format,1: PM"
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format"
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format"
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format"
line.long 0x4 "RTC_DR,RTC date register"
hexmask.long.byte 0x4 20.--23. 1. "YT,Year tens in BCD format"
hexmask.long.byte 0x4 16.--19. 1. "YU,Year units in BCD format"
newline
bitfld.long 0x4 13.--15. "WDU,Week day units" "0: forbidden,1: Monday,?,?,?,?,?,7: Sunday"
bitfld.long 0x4 12. "MT,Month tens in BCD format" "0,1"
newline
hexmask.long.byte 0x4 8.--11. 1. "MU,Month units in BCD format"
bitfld.long 0x4 4.--5. "DT,Date tens in BCD format" "0,1,2,3"
newline
hexmask.long.byte 0x4 0.--3. 1. "DU,Date units in BCD format"
rgroup.long 0x8++0x3
line.long 0x0 "RTC_SSR,RTC subsecond register"
hexmask.long 0x0 0.--31. 1. "SS,Synchronous binary counter"
group.long 0xC++0x17
line.long 0x0 "RTC_ICSR,RTC initialization control and status register"
rbitfld.long 0x0 16. "RECALPF,Recalibration pending Flag" "0,1"
bitfld.long 0x0 10.--12. "BCDU,BCD update (BIN = 10 or 11)" "0: 1s calendar increment is generated each time..,1: 1s calendar increment is generated each time..,2: 1s calendar increment is generated each time..,3: 1s calendar increment is generated each time..,4: 1s calendar increment is generated each time..,5: 1s calendar increment is generated each time..,6: 1s calendar increment is generated each time..,7: 1s calendar increment is generated each time.."
newline
bitfld.long 0x0 8.--9. "BIN,Binary mode" "0: Free running BCD calendar mode (Binary mode..,1: Free running Binary mode (BCD mode disabled),2: Free running BCD calendar and Binary modes,3: Free running BCD calendar and Binary modes"
bitfld.long 0x0 7. "INIT,Initialization mode" "0: Free running mode,1: Initialization mode used to program time and.."
newline
rbitfld.long 0x0 6. "INITF,Initialization flag" "0: Calendar registers update is not allowed,1: Calendar registers update is allowed"
bitfld.long 0x0 5. "RSF,Registers synchronization flag" "0: Calendar shadow registers not yet synchronized,1: Calendar shadow registers synchronized"
newline
rbitfld.long 0x0 4. "INITS,Initialization status flag" "0: Calendar has not been initialized,1: Calendar has been initialized"
rbitfld.long 0x0 3. "SHPF,Shift operation pending" "0: No shift operation is pending,1: A shift operation is pending"
newline
rbitfld.long 0x0 2. "WUTWF,Wake-up timer write flag" "0: Wake-up timer configuration update not allowed..,1: Wake-up timer configuration update allowed"
line.long 0x4 "RTC_PRER,RTC prescaler register"
hexmask.long.byte 0x4 16.--22. 1. "PREDIV_A,Asynchronous prescaler factor"
hexmask.long.word 0x4 0.--14. 1. "PREDIV_S,Synchronous prescaler factor"
line.long 0x8 "RTC_WUTR,RTC wake-up timer register"
hexmask.long.word 0x8 16.--31. 1. "WUTOCLR,Wake-up auto-reload output clear value"
hexmask.long.word 0x8 0.--15. 1. "WUT,Wake-up auto-reload value bits"
line.long 0xC "RTC_CR,RTC control register"
bitfld.long 0xC 31. "OUT2EN,RTC_OUT2 output enable" "0,1"
bitfld.long 0xC 30. "TAMPALRM_TYPE,TAMPALRM output type" "0: TAMPALRM is push-pull output,1: TAMPALRM is open-drain output"
newline
bitfld.long 0xC 29. "TAMPALRM_PU,TAMPALRM pull-up enable" "0: No pull-up is applied on TAMPALRM output,1: A pull-up is applied on TAMPALRM output"
bitfld.long 0xC 28. "ALRBFCLR,Alarm B flag automatic clear" "0: Alarm B event generates a trigger event and..,1: Alarm B event generates a trigger event."
newline
bitfld.long 0xC 27. "ALRAFCLR,Alarm A flag automatic clear" "0: Alarm A event generates a trigger event and..,1: Alarm A event generates a trigger event."
bitfld.long 0xC 26. "TAMPOE,Tamper detection output enable on TAMPALRM" "0: The tamper flag is not routed on TAMPALRM,1: The tamper flag is routed on TAMPALRM combined.."
newline
bitfld.long 0xC 25. "TAMPTS,Activate timestamp on tamper detection event" "0: Tamper detection event does not cause a RTC..,1: Save RTC timestamp on tamper detection event.."
bitfld.long 0xC 24. "ITSE,timestamp on internal event enable" "0: internal event timestamp disabled,1: internal event timestamp enabled"
newline
bitfld.long 0xC 23. "COE,Calibration output enable" "0: Calibration output disabled,1: Calibration output enabled"
bitfld.long 0xC 21.--22. "OSEL,Output selection" "0: Output disabled,1: Alarm A output enabled,2: Alarm B output enabled,3: Wake-up output enabled"
newline
bitfld.long 0xC 20. "POL,Output polarity" "0: The pin is high when ALRAF/ALRBF/WUTF is..,1: The pin is low when ALRAF/ALRBF/WUTF is asserted.."
bitfld.long 0xC 19. "COSEL,Calibration output selection" "0: Calibration output is 512Hz,1: Calibration output is 1Hz"
newline
bitfld.long 0xC 18. "BKP,Backup" "0,1"
bitfld.long 0xC 17. "SUB1H,Subtract 1 hour (winter time change)" "0: No effect,1: Subtracts 1 hour to the current time."
newline
bitfld.long 0xC 16. "ADD1H,Add 1 hour (summer time change)" "0: No effect,1: Adds 1 hour to the current time."
bitfld.long 0xC 15. "TSIE,Timestamp interrupt enable" "0: Timestamp interrupt disable,1: Timestamp interrupt enable"
newline
bitfld.long 0xC 14. "WUTIE,Wake-up timer interrupt enable" "0: Wake-up timer interrupt disabled,1: Wake-up timer interrupt enabled"
bitfld.long 0xC 13. "ALRBIE,Alarm B interrupt enable" "0: Alarm B interrupt disable,1: Alarm B interrupt enable"
newline
bitfld.long 0xC 12. "ALRAIE,Alarm A interrupt enable" "0: Alarm A interrupt disabled,1: Alarm A interrupt enabled"
bitfld.long 0xC 11. "TSE,timestamp enable" "0: timestamp disable,1: timestamp enable"
newline
bitfld.long 0xC 10. "WUTE,Wake-up timer enable" "0: Wake-up timer disabled,1: Wake-up timer enabled"
bitfld.long 0xC 9. "ALRBE,Alarm B enable" "0: Alarm B disabled,1: Alarm B enabled"
newline
bitfld.long 0xC 8. "ALRAE,Alarm A enable" "0: Alarm A disabled,1: Alarm A enabled"
bitfld.long 0xC 7. "SSRUIE,SSR underflow interrupt enable" "0: SSR underflow interrupt disabled,1: SSR underflow interrupt enabled"
newline
bitfld.long 0xC 6. "FMT,Hour format" "0: 24 hour/day format,1: AM/PM hour format"
bitfld.long 0xC 5. "BYPSHAD,Bypass the shadow registers" "0: Calendar values (when reading from RTC_SSR..,1: Calendar values (when reading from RTC_SSR.."
newline
bitfld.long 0xC 4. "REFCKON,RTC_REFIN reference clock detection enable (50 or 60Hz)" "0: RTC_REFIN detection disabled,1: RTC_REFIN detection enabled"
bitfld.long 0xC 3. "TSEDGE,Timestamp event active edge" "0: RTC_TS input rising edge generates a timestamp..,1: RTC_TS input falling edge generates a timestamp.."
newline
bitfld.long 0xC 0.--2. "WUCKSEL,ck_wut wake-up clock selection" "0: RTC/16 clock is selected,1: RTC/8 clock is selected,2: RTC/4 clock is selected,3: RTC/2 clock is selected,?,?,?,?"
line.long 0x10 "RTC_PRIVCFGR,RTC privilege mode control register"
bitfld.long 0x10 15. "PRIV,RTC privilege protection" "0: All RTC registers can be written when the APB..,1: All RTC registers can be written only when the.."
bitfld.long 0x10 14. "INITPRIV,Initialization privilege protection" "0: RTC Initialization mode calendar and prescalers..,1: RTC Initialization mode calendar and prescalers.."
newline
bitfld.long 0x10 13. "CALPRIV,Shift register Delight saving calibration and reference clock privilege protection" "0: Shift register Delight saving calibration and..,1: Shift register Delight saving calibration and.."
bitfld.long 0x10 3. "TSPRIV,Timestamp privilege protection" "0: RTC Timestamp configuration and interrupt clear..,1: RTC Timestamp configuration and interrupt clear.."
newline
bitfld.long 0x10 2. "WUTPRIV,Wake-up timer privilege protection" "0: RTC wake-up timer configuration and interrupt..,1: RTC wake-up timer configuration and interrupt.."
bitfld.long 0x10 1. "ALRBPRIV,Alarm B privilege protection" "0: RTC Alarm B configuration and interrupt clear..,1: RTC Alarm B configuration and interrupt clear.."
newline
bitfld.long 0x10 0. "ALRAPRIV,Alarm A and SSR underflow privilege protection" "0: RTC Alarm A and SSR underflow configuration and..,1: RTC Alarm A and SSR underflow configuration and.."
line.long 0x14 "RTC_SECCFGR,RTC secure configuration register"
bitfld.long 0x14 15. "SEC,RTC global protection" "0: All RTC registers can be written when the APB..,1: All RTC registers can be written only when the.."
bitfld.long 0x14 14. "INITSEC,Initialization protection" "0: RTC Initialization mode calendar and prescalers..,1: RTC Initialization mode calendar and prescalers.."
newline
bitfld.long 0x14 13. "CALSEC,Shift register daylight saving calibration and reference clock protection" "0: Shift register daylight saving calibration and..,1: Shift register daylight saving calibration and.."
bitfld.long 0x14 3. "TSSEC,Timestamp protection" "0: RTC timestamp configuration and interrupt clear..,1: RTC timestamp configuration and interrupt clear.."
newline
bitfld.long 0x14 2. "WUTSEC,Wake-up timer protection" "0: RTC wake-up timer configuration and interrupt..,1: RTC wake-up timer configuration and interrupt.."
bitfld.long 0x14 1. "ALRBSEC,Alarm B protection" "0: RTC alarm B configuration and interrupt clear..,1: RTC alarm B configuration and interrupt clear.."
newline
bitfld.long 0x14 0. "ALRASEC,Alarm A and SSR underflow protection" "0: RTC alarm A and SSR underflow configuration and..,1: RTC alarm A and SSR underflow configuration and.."
wgroup.long 0x24++0x3
line.long 0x0 "RTC_WPR,RTC write protection register"
hexmask.long.byte 0x0 0.--7. 1. "KEY,Write protection key"
group.long 0x28++0x3
line.long 0x0 "RTC_CALR,RTC calibration register"
bitfld.long 0x0 15. "CALP,Increase frequency of RTC by 488." "0: No RTCCLK pulses are added.,1: One RTCCLK pulse is effectively inserted every.."
bitfld.long 0x0 14. "CALW8,Use an 8-second calibration cycle period" "0,1"
newline
bitfld.long 0x0 13. "CALW16,Use a 16-second calibration cycle period" "0,1"
bitfld.long 0x0 12. "LPCAL,RTC low-power mode" "0: Calibration window is 2less thansup>20less..,1: Calibration window is 2less thansup>20less.."
newline
hexmask.long.word 0x0 0.--8. 1. "CALM,Calibration minus"
wgroup.long 0x2C++0x3
line.long 0x0 "RTC_SHIFTR,RTC shift control register"
bitfld.long 0x0 31. "ADD1S,Add one second" "0: No effect,1: Add one second to the clock/calendar"
hexmask.long.word 0x0 0.--14. 1. "SUBFS,Subtract a fraction of a second"
rgroup.long 0x30++0xB
line.long 0x0 "RTC_TSTR,RTC timestamp time register"
bitfld.long 0x0 22. "PM,AM/PM notation" "0: AM or 24-hour format,1: PM"
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format." "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format."
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format."
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format."
line.long 0x4 "RTC_TSDR,RTC timestamp date register"
bitfld.long 0x4 13.--15. "WDU,Week day units" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 12. "MT,Month tens in BCD format" "0,1"
newline
hexmask.long.byte 0x4 8.--11. 1. "MU,Month units in BCD format"
bitfld.long 0x4 4.--5. "DT,Date tens in BCD format" "0,1,2,3"
newline
hexmask.long.byte 0x4 0.--3. 1. "DU,Date units in BCD format"
line.long 0x8 "RTC_TSSSR,RTC timestamp subsecond register"
hexmask.long 0x8 0.--31. 1. "SS,Subsecond value/synchronous binary counter values"
group.long 0x40++0xF
line.long 0x0 "RTC_ALRMAR,RTC alarm A register"
bitfld.long 0x0 31. "MSK4,Alarm A date mask" "0: Alarm A set if the date/day match,1: Date/day don't care in alarm A comparison"
bitfld.long 0x0 30. "WDSEL,Week day selection" "0: DU[3:0] represents the date units,1: DU[3:0] represents the week day."
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bitfld.long 0x0 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
hexmask.long.byte 0x0 24.--27. 1. "DU,Date units or day in BCD format"
newline
bitfld.long 0x0 23. "MSK3,Alarm A hours mask" "0: Alarm A set if the hours match,1: Hours don't care in alarm A comparison"
bitfld.long 0x0 22. "PM,AM/PM notation" "0: AM or 24-hour format,1: PM"
newline
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format"
newline
bitfld.long 0x0 15. "MSK2,Alarm A minutes mask" "0: Alarm A set if the minutes match,1: Minutes don't care in alarm A comparison"
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format"
bitfld.long 0x0 7. "MSK1,Alarm A seconds mask" "0: Alarm A set if the seconds match,1: Seconds don't care in alarm A comparison"
newline
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format." "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format."
line.long 0x4 "RTC_ALRMASSR,RTC alarm A subsecond register"
bitfld.long 0x4 31. "SSCLR,Clear synchronous counter on alarm (Binary mode only)" "0: The synchronous binary counter (SS[31:0] in..,1: The synchronous binary counter (SS[31:0] in.."
hexmask.long.byte 0x4 24.--29. 1. "MASKSS,Mask the most-significant bits starting at this bit"
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hexmask.long.word 0x4 0.--14. 1. "SS,Subseconds value"
line.long 0x8 "RTC_ALRMBR,RTC alarm B register"
bitfld.long 0x8 31. "MSK4,Alarm B date mask" "0: Alarm B set if the date and day match,1: Date and day don't care in alarm B comparison"
bitfld.long 0x8 30. "WDSEL,Week day selection" "0: DU[3:0] represents the date units,1: DU[3:0] represents the week day."
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bitfld.long 0x8 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
hexmask.long.byte 0x8 24.--27. 1. "DU,Date units or day in BCD format"
newline
bitfld.long 0x8 23. "MSK3,Alarm B hours mask" "0: Alarm B set if the hours match,1: Hours don't care in alarm B comparison"
bitfld.long 0x8 22. "PM,AM/PM notation" "0: AM or 24-hour format,1: PM"
newline
bitfld.long 0x8 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
hexmask.long.byte 0x8 16.--19. 1. "HU,Hour units in BCD format"
newline
bitfld.long 0x8 15. "MSK2,Alarm B minutes mask" "0: Alarm B set if the minutes match,1: Minutes don't care in alarm B comparison"
bitfld.long 0x8 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x8 8.--11. 1. "MNU,Minute units in BCD format"
bitfld.long 0x8 7. "MSK1,Alarm B seconds mask" "0: Alarm B set if the seconds match,1: Seconds don't care in alarm B comparison"
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bitfld.long 0x8 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 0.--3. 1. "SU,Second units in BCD format"
line.long 0xC "RTC_ALRMBSSR,RTC alarm B subsecond register"
bitfld.long 0xC 31. "SSCLR,Clear synchronous counter on alarm (Binary mode only)" "0: The synchronous binary counter (SS[31:0] in..,1: The synchronous binary counter (SS[31:0] in.."
hexmask.long.byte 0xC 24.--29. 1. "MASKSS,Mask the most-significant bits starting at this bit"
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hexmask.long.word 0xC 0.--14. 1. "SS,Subseconds value"
rgroup.long 0x50++0xB
line.long 0x0 "RTC_SR,RTC status register"
bitfld.long 0x0 6. "SSRUF,SSR underflow flag" "0,1"
bitfld.long 0x0 5. "ITSF,Internal timestamp flag" "0,1"
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bitfld.long 0x0 4. "TSOVF,Timestamp overflow flag" "0,1"
bitfld.long 0x0 3. "TSF,Timestamp flag" "0,1"
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bitfld.long 0x0 2. "WUTF,Wake-up timer flag" "0,1"
bitfld.long 0x0 1. "ALRBF,Alarm B flag" "0,1"
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bitfld.long 0x0 0. "ALRAF,Alarm A flag" "0,1"
line.long 0x4 "RTC_MISR,RTC nonsecure masked interrupt status register"
bitfld.long 0x4 6. "SSRUMF,SSR underflow nonsecure masked flag" "0,1"
bitfld.long 0x4 5. "ITSMF,Internal timestamp nonsecure masked flag" "0,1"
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bitfld.long 0x4 4. "TSOVMF,Timestamp overflow nonsecure masked flag" "0,1"
bitfld.long 0x4 3. "TSMF,Timestamp nonsecure masked flag" "0,1"
newline
bitfld.long 0x4 2. "WUTMF,Wake-up timer nonsecure masked flag" "0,1"
bitfld.long 0x4 1. "ALRBMF,Alarm B nonsecure masked flag" "0,1"
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bitfld.long 0x4 0. "ALRAMF,Alarm A masked flag" "0,1"
line.long 0x8 "RTC_SMISR,RTC secure masked interrupt status register"
bitfld.long 0x8 6. "SSRUMF,SSR underflow secure masked flag" "0,1"
bitfld.long 0x8 5. "ITSMF,Internal timestamp interrupt secure masked flag" "0,1"
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bitfld.long 0x8 4. "TSOVMF,Timestamp overflow interrupt secure masked flag" "0,1"
bitfld.long 0x8 3. "TSMF,Timestamp interrupt secure masked flag" "0,1"
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bitfld.long 0x8 2. "WUTMF,Wake-up timer interrupt secure masked flag" "0,1"
bitfld.long 0x8 1. "ALRBMF,Alarm B interrupt secure masked flag" "0,1"
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bitfld.long 0x8 0. "ALRAMF,Alarm A interrupt secure masked flag" "0,1"
wgroup.long 0x5C++0x3
line.long 0x0 "RTC_SCR,RTC status clear register"
bitfld.long 0x0 6. "CSSRUF,Clear SSR underflow flag" "0,1"
bitfld.long 0x0 5. "CITSF,Clear internal timestamp flag" "0,1"
newline
bitfld.long 0x0 4. "CTSOVF,Clear timestamp overflow flag" "0,1"
bitfld.long 0x0 3. "CTSF,Clear timestamp flag" "0,1"
newline
bitfld.long 0x0 2. "CWUTF,Clear wake-up timer flag" "0,1"
bitfld.long 0x0 1. "CALRBF,Clear alarm B flag" "0,1"
newline
bitfld.long 0x0 0. "CALRAF,Clear alarm A flag" "0,1"
group.long 0x64++0x3
line.long 0x0 "RTC_TAMPTSCR,RTC timestamp on tamper control register"
bitfld.long 0x0 16. "ITAMPTS,Timestamp on internal tamper event" "0: When TAMPTS=0 internal tamper detection event..,1: Save RTC timestamp on any internal tamper.."
bitfld.long 0x0 4. "TAMP5TS,Timestamp on external tamper TAMP5 event" "0: When TAMPTS=0 TAMP5 detection event does not..,1: Save RTC timestamp on TAMP5 detection event.."
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bitfld.long 0x0 3. "TAMP4TS,Timestamp on external tamper TAMP4 event" "0: When TAMPTS=0 TAMP4 detection event does not..,1: Save RTC timestamp on TAMP4 detection event.."
bitfld.long 0x0 2. "TAMP3TS,Timestamp on external tamper TAMP3 event" "0: When TAMPTS=0 TAMP3 detection event does not..,1: Save RTC timestamp on TAMP3 detection event.."
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bitfld.long 0x0 1. "TAMP2TS,Timestamp on external tamper TAMP2 event" "0: When TAMPTS=0 TAMP2 detection event does not..,1: Save RTC timestamp on TAMP2 detection event.."
bitfld.long 0x0 0. "TAMP1TS,Timestamp on external tamper TAMP1 event" "0: When TAMPTS=0 TAMP1 detection event does not..,1: Save RTC timestamp on TAMP1 detection event.."
rgroup.long 0x68++0x3
line.long 0x0 "RTC_TSIDR,RTC timestamp status register"
hexmask.long.byte 0x0 0.--5. 1. "TSID,Timestamp flag source identification"
group.long 0x70++0x7
line.long 0x0 "RTC_ALRABINR,RTC alarm A binary mode register"
hexmask.long 0x0 0.--31. 1. "SS,Synchronous counter alarm value in Binary mode"
line.long 0x4 "RTC_ALRBBINR,RTC alarm B binary mode register"
hexmask.long 0x4 0.--31. 1. "SS,Synchronous counter alarm value in Binary mode"
tree.end
tree "SEC_RTC"
base ad:0x50007800
group.long 0x0++0x7
line.long 0x0 "RTC_TR,RTC time register"
bitfld.long 0x0 22. "PM,AM/PM notation" "0: AM or 24-hour format,1: PM"
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format"
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format"
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format"
line.long 0x4 "RTC_DR,RTC date register"
hexmask.long.byte 0x4 20.--23. 1. "YT,Year tens in BCD format"
hexmask.long.byte 0x4 16.--19. 1. "YU,Year units in BCD format"
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bitfld.long 0x4 13.--15. "WDU,Week day units" "0: forbidden,1: Monday,?,?,?,?,?,7: Sunday"
bitfld.long 0x4 12. "MT,Month tens in BCD format" "0,1"
newline
hexmask.long.byte 0x4 8.--11. 1. "MU,Month units in BCD format"
bitfld.long 0x4 4.--5. "DT,Date tens in BCD format" "0,1,2,3"
newline
hexmask.long.byte 0x4 0.--3. 1. "DU,Date units in BCD format"
rgroup.long 0x8++0x3
line.long 0x0 "RTC_SSR,RTC subsecond register"
hexmask.long 0x0 0.--31. 1. "SS,Synchronous binary counter"
group.long 0xC++0x17
line.long 0x0 "RTC_ICSR,RTC initialization control and status register"
rbitfld.long 0x0 16. "RECALPF,Recalibration pending Flag" "0,1"
bitfld.long 0x0 10.--12. "BCDU,BCD update (BIN = 10 or 11)" "0: 1s calendar increment is generated each time..,1: 1s calendar increment is generated each time..,2: 1s calendar increment is generated each time..,3: 1s calendar increment is generated each time..,4: 1s calendar increment is generated each time..,5: 1s calendar increment is generated each time..,6: 1s calendar increment is generated each time..,7: 1s calendar increment is generated each time.."
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bitfld.long 0x0 8.--9. "BIN,Binary mode" "0: Free running BCD calendar mode (Binary mode..,1: Free running Binary mode (BCD mode disabled),2: Free running BCD calendar and Binary modes,3: Free running BCD calendar and Binary modes"
bitfld.long 0x0 7. "INIT,Initialization mode" "0: Free running mode,1: Initialization mode used to program time and.."
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rbitfld.long 0x0 6. "INITF,Initialization flag" "0: Calendar registers update is not allowed,1: Calendar registers update is allowed"
bitfld.long 0x0 5. "RSF,Registers synchronization flag" "0: Calendar shadow registers not yet synchronized,1: Calendar shadow registers synchronized"
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rbitfld.long 0x0 4. "INITS,Initialization status flag" "0: Calendar has not been initialized,1: Calendar has been initialized"
rbitfld.long 0x0 3. "SHPF,Shift operation pending" "0: No shift operation is pending,1: A shift operation is pending"
newline
rbitfld.long 0x0 2. "WUTWF,Wake-up timer write flag" "0: Wake-up timer configuration update not allowed..,1: Wake-up timer configuration update allowed"
line.long 0x4 "RTC_PRER,RTC prescaler register"
hexmask.long.byte 0x4 16.--22. 1. "PREDIV_A,Asynchronous prescaler factor"
hexmask.long.word 0x4 0.--14. 1. "PREDIV_S,Synchronous prescaler factor"
line.long 0x8 "RTC_WUTR,RTC wake-up timer register"
hexmask.long.word 0x8 16.--31. 1. "WUTOCLR,Wake-up auto-reload output clear value"
hexmask.long.word 0x8 0.--15. 1. "WUT,Wake-up auto-reload value bits"
line.long 0xC "RTC_CR,RTC control register"
bitfld.long 0xC 31. "OUT2EN,RTC_OUT2 output enable" "0,1"
bitfld.long 0xC 30. "TAMPALRM_TYPE,TAMPALRM output type" "0: TAMPALRM is push-pull output,1: TAMPALRM is open-drain output"
newline
bitfld.long 0xC 29. "TAMPALRM_PU,TAMPALRM pull-up enable" "0: No pull-up is applied on TAMPALRM output,1: A pull-up is applied on TAMPALRM output"
bitfld.long 0xC 28. "ALRBFCLR,Alarm B flag automatic clear" "0: Alarm B event generates a trigger event and..,1: Alarm B event generates a trigger event."
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bitfld.long 0xC 27. "ALRAFCLR,Alarm A flag automatic clear" "0: Alarm A event generates a trigger event and..,1: Alarm A event generates a trigger event."
bitfld.long 0xC 26. "TAMPOE,Tamper detection output enable on TAMPALRM" "0: The tamper flag is not routed on TAMPALRM,1: The tamper flag is routed on TAMPALRM combined.."
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bitfld.long 0xC 25. "TAMPTS,Activate timestamp on tamper detection event" "0: Tamper detection event does not cause a RTC..,1: Save RTC timestamp on tamper detection event.."
bitfld.long 0xC 24. "ITSE,timestamp on internal event enable" "0: internal event timestamp disabled,1: internal event timestamp enabled"
newline
bitfld.long 0xC 23. "COE,Calibration output enable" "0: Calibration output disabled,1: Calibration output enabled"
bitfld.long 0xC 21.--22. "OSEL,Output selection" "0: Output disabled,1: Alarm A output enabled,2: Alarm B output enabled,3: Wake-up output enabled"
newline
bitfld.long 0xC 20. "POL,Output polarity" "0: The pin is high when ALRAF/ALRBF/WUTF is..,1: The pin is low when ALRAF/ALRBF/WUTF is asserted.."
bitfld.long 0xC 19. "COSEL,Calibration output selection" "0: Calibration output is 512Hz,1: Calibration output is 1Hz"
newline
bitfld.long 0xC 18. "BKP,Backup" "0,1"
bitfld.long 0xC 17. "SUB1H,Subtract 1 hour (winter time change)" "0: No effect,1: Subtracts 1 hour to the current time."
newline
bitfld.long 0xC 16. "ADD1H,Add 1 hour (summer time change)" "0: No effect,1: Adds 1 hour to the current time."
bitfld.long 0xC 15. "TSIE,Timestamp interrupt enable" "0: Timestamp interrupt disable,1: Timestamp interrupt enable"
newline
bitfld.long 0xC 14. "WUTIE,Wake-up timer interrupt enable" "0: Wake-up timer interrupt disabled,1: Wake-up timer interrupt enabled"
bitfld.long 0xC 13. "ALRBIE,Alarm B interrupt enable" "0: Alarm B interrupt disable,1: Alarm B interrupt enable"
newline
bitfld.long 0xC 12. "ALRAIE,Alarm A interrupt enable" "0: Alarm A interrupt disabled,1: Alarm A interrupt enabled"
bitfld.long 0xC 11. "TSE,timestamp enable" "0: timestamp disable,1: timestamp enable"
newline
bitfld.long 0xC 10. "WUTE,Wake-up timer enable" "0: Wake-up timer disabled,1: Wake-up timer enabled"
bitfld.long 0xC 9. "ALRBE,Alarm B enable" "0: Alarm B disabled,1: Alarm B enabled"
newline
bitfld.long 0xC 8. "ALRAE,Alarm A enable" "0: Alarm A disabled,1: Alarm A enabled"
bitfld.long 0xC 7. "SSRUIE,SSR underflow interrupt enable" "0: SSR underflow interrupt disabled,1: SSR underflow interrupt enabled"
newline
bitfld.long 0xC 6. "FMT,Hour format" "0: 24 hour/day format,1: AM/PM hour format"
bitfld.long 0xC 5. "BYPSHAD,Bypass the shadow registers" "0: Calendar values (when reading from RTC_SSR..,1: Calendar values (when reading from RTC_SSR.."
newline
bitfld.long 0xC 4. "REFCKON,RTC_REFIN reference clock detection enable (50 or 60Hz)" "0: RTC_REFIN detection disabled,1: RTC_REFIN detection enabled"
bitfld.long 0xC 3. "TSEDGE,Timestamp event active edge" "0: RTC_TS input rising edge generates a timestamp..,1: RTC_TS input falling edge generates a timestamp.."
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bitfld.long 0xC 0.--2. "WUCKSEL,ck_wut wake-up clock selection" "0: RTC/16 clock is selected,1: RTC/8 clock is selected,2: RTC/4 clock is selected,3: RTC/2 clock is selected,?,?,?,?"
line.long 0x10 "RTC_PRIVCFGR,RTC privilege mode control register"
bitfld.long 0x10 15. "PRIV,RTC privilege protection" "0: All RTC registers can be written when the APB..,1: All RTC registers can be written only when the.."
bitfld.long 0x10 14. "INITPRIV,Initialization privilege protection" "0: RTC Initialization mode calendar and prescalers..,1: RTC Initialization mode calendar and prescalers.."
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bitfld.long 0x10 13. "CALPRIV,Shift register Delight saving calibration and reference clock privilege protection" "0: Shift register Delight saving calibration and..,1: Shift register Delight saving calibration and.."
bitfld.long 0x10 3. "TSPRIV,Timestamp privilege protection" "0: RTC Timestamp configuration and interrupt clear..,1: RTC Timestamp configuration and interrupt clear.."
newline
bitfld.long 0x10 2. "WUTPRIV,Wake-up timer privilege protection" "0: RTC wake-up timer configuration and interrupt..,1: RTC wake-up timer configuration and interrupt.."
bitfld.long 0x10 1. "ALRBPRIV,Alarm B privilege protection" "0: RTC Alarm B configuration and interrupt clear..,1: RTC Alarm B configuration and interrupt clear.."
newline
bitfld.long 0x10 0. "ALRAPRIV,Alarm A and SSR underflow privilege protection" "0: RTC Alarm A and SSR underflow configuration and..,1: RTC Alarm A and SSR underflow configuration and.."
line.long 0x14 "RTC_SECCFGR,RTC secure configuration register"
bitfld.long 0x14 15. "SEC,RTC global protection" "0: All RTC registers can be written when the APB..,1: All RTC registers can be written only when the.."
bitfld.long 0x14 14. "INITSEC,Initialization protection" "0: RTC Initialization mode calendar and prescalers..,1: RTC Initialization mode calendar and prescalers.."
newline
bitfld.long 0x14 13. "CALSEC,Shift register daylight saving calibration and reference clock protection" "0: Shift register daylight saving calibration and..,1: Shift register daylight saving calibration and.."
bitfld.long 0x14 3. "TSSEC,Timestamp protection" "0: RTC timestamp configuration and interrupt clear..,1: RTC timestamp configuration and interrupt clear.."
newline
bitfld.long 0x14 2. "WUTSEC,Wake-up timer protection" "0: RTC wake-up timer configuration and interrupt..,1: RTC wake-up timer configuration and interrupt.."
bitfld.long 0x14 1. "ALRBSEC,Alarm B protection" "0: RTC alarm B configuration and interrupt clear..,1: RTC alarm B configuration and interrupt clear.."
newline
bitfld.long 0x14 0. "ALRASEC,Alarm A and SSR underflow protection" "0: RTC alarm A and SSR underflow configuration and..,1: RTC alarm A and SSR underflow configuration and.."
wgroup.long 0x24++0x3
line.long 0x0 "RTC_WPR,RTC write protection register"
hexmask.long.byte 0x0 0.--7. 1. "KEY,Write protection key"
group.long 0x28++0x3
line.long 0x0 "RTC_CALR,RTC calibration register"
bitfld.long 0x0 15. "CALP,Increase frequency of RTC by 488." "0: No RTCCLK pulses are added.,1: One RTCCLK pulse is effectively inserted every.."
bitfld.long 0x0 14. "CALW8,Use an 8-second calibration cycle period" "0,1"
newline
bitfld.long 0x0 13. "CALW16,Use a 16-second calibration cycle period" "0,1"
bitfld.long 0x0 12. "LPCAL,RTC low-power mode" "0: Calibration window is 2less thansup>20less..,1: Calibration window is 2less thansup>20less.."
newline
hexmask.long.word 0x0 0.--8. 1. "CALM,Calibration minus"
wgroup.long 0x2C++0x3
line.long 0x0 "RTC_SHIFTR,RTC shift control register"
bitfld.long 0x0 31. "ADD1S,Add one second" "0: No effect,1: Add one second to the clock/calendar"
hexmask.long.word 0x0 0.--14. 1. "SUBFS,Subtract a fraction of a second"
rgroup.long 0x30++0xB
line.long 0x0 "RTC_TSTR,RTC timestamp time register"
bitfld.long 0x0 22. "PM,AM/PM notation" "0: AM or 24-hour format,1: PM"
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format." "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format."
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format."
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format."
line.long 0x4 "RTC_TSDR,RTC timestamp date register"
bitfld.long 0x4 13.--15. "WDU,Week day units" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 12. "MT,Month tens in BCD format" "0,1"
newline
hexmask.long.byte 0x4 8.--11. 1. "MU,Month units in BCD format"
bitfld.long 0x4 4.--5. "DT,Date tens in BCD format" "0,1,2,3"
newline
hexmask.long.byte 0x4 0.--3. 1. "DU,Date units in BCD format"
line.long 0x8 "RTC_TSSSR,RTC timestamp subsecond register"
hexmask.long 0x8 0.--31. 1. "SS,Subsecond value/synchronous binary counter values"
group.long 0x40++0xF
line.long 0x0 "RTC_ALRMAR,RTC alarm A register"
bitfld.long 0x0 31. "MSK4,Alarm A date mask" "0: Alarm A set if the date/day match,1: Date/day don't care in alarm A comparison"
bitfld.long 0x0 30. "WDSEL,Week day selection" "0: DU[3:0] represents the date units,1: DU[3:0] represents the week day."
newline
bitfld.long 0x0 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
hexmask.long.byte 0x0 24.--27. 1. "DU,Date units or day in BCD format"
newline
bitfld.long 0x0 23. "MSK3,Alarm A hours mask" "0: Alarm A set if the hours match,1: Hours don't care in alarm A comparison"
bitfld.long 0x0 22. "PM,AM/PM notation" "0: AM or 24-hour format,1: PM"
newline
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format"
newline
bitfld.long 0x0 15. "MSK2,Alarm A minutes mask" "0: Alarm A set if the minutes match,1: Minutes don't care in alarm A comparison"
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format"
bitfld.long 0x0 7. "MSK1,Alarm A seconds mask" "0: Alarm A set if the seconds match,1: Seconds don't care in alarm A comparison"
newline
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format." "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format."
line.long 0x4 "RTC_ALRMASSR,RTC alarm A subsecond register"
bitfld.long 0x4 31. "SSCLR,Clear synchronous counter on alarm (Binary mode only)" "0: The synchronous binary counter (SS[31:0] in..,1: The synchronous binary counter (SS[31:0] in.."
hexmask.long.byte 0x4 24.--29. 1. "MASKSS,Mask the most-significant bits starting at this bit"
newline
hexmask.long.word 0x4 0.--14. 1. "SS,Subseconds value"
line.long 0x8 "RTC_ALRMBR,RTC alarm B register"
bitfld.long 0x8 31. "MSK4,Alarm B date mask" "0: Alarm B set if the date and day match,1: Date and day don't care in alarm B comparison"
bitfld.long 0x8 30. "WDSEL,Week day selection" "0: DU[3:0] represents the date units,1: DU[3:0] represents the week day."
newline
bitfld.long 0x8 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
hexmask.long.byte 0x8 24.--27. 1. "DU,Date units or day in BCD format"
newline
bitfld.long 0x8 23. "MSK3,Alarm B hours mask" "0: Alarm B set if the hours match,1: Hours don't care in alarm B comparison"
bitfld.long 0x8 22. "PM,AM/PM notation" "0: AM or 24-hour format,1: PM"
newline
bitfld.long 0x8 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
hexmask.long.byte 0x8 16.--19. 1. "HU,Hour units in BCD format"
newline
bitfld.long 0x8 15. "MSK2,Alarm B minutes mask" "0: Alarm B set if the minutes match,1: Minutes don't care in alarm B comparison"
bitfld.long 0x8 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x8 8.--11. 1. "MNU,Minute units in BCD format"
bitfld.long 0x8 7. "MSK1,Alarm B seconds mask" "0: Alarm B set if the seconds match,1: Seconds don't care in alarm B comparison"
newline
bitfld.long 0x8 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 0.--3. 1. "SU,Second units in BCD format"
line.long 0xC "RTC_ALRMBSSR,RTC alarm B subsecond register"
bitfld.long 0xC 31. "SSCLR,Clear synchronous counter on alarm (Binary mode only)" "0: The synchronous binary counter (SS[31:0] in..,1: The synchronous binary counter (SS[31:0] in.."
hexmask.long.byte 0xC 24.--29. 1. "MASKSS,Mask the most-significant bits starting at this bit"
newline
hexmask.long.word 0xC 0.--14. 1. "SS,Subseconds value"
rgroup.long 0x50++0xB
line.long 0x0 "RTC_SR,RTC status register"
bitfld.long 0x0 6. "SSRUF,SSR underflow flag" "0,1"
bitfld.long 0x0 5. "ITSF,Internal timestamp flag" "0,1"
newline
bitfld.long 0x0 4. "TSOVF,Timestamp overflow flag" "0,1"
bitfld.long 0x0 3. "TSF,Timestamp flag" "0,1"
newline
bitfld.long 0x0 2. "WUTF,Wake-up timer flag" "0,1"
bitfld.long 0x0 1. "ALRBF,Alarm B flag" "0,1"
newline
bitfld.long 0x0 0. "ALRAF,Alarm A flag" "0,1"
line.long 0x4 "RTC_MISR,RTC nonsecure masked interrupt status register"
bitfld.long 0x4 6. "SSRUMF,SSR underflow nonsecure masked flag" "0,1"
bitfld.long 0x4 5. "ITSMF,Internal timestamp nonsecure masked flag" "0,1"
newline
bitfld.long 0x4 4. "TSOVMF,Timestamp overflow nonsecure masked flag" "0,1"
bitfld.long 0x4 3. "TSMF,Timestamp nonsecure masked flag" "0,1"
newline
bitfld.long 0x4 2. "WUTMF,Wake-up timer nonsecure masked flag" "0,1"
bitfld.long 0x4 1. "ALRBMF,Alarm B nonsecure masked flag" "0,1"
newline
bitfld.long 0x4 0. "ALRAMF,Alarm A masked flag" "0,1"
line.long 0x8 "RTC_SMISR,RTC secure masked interrupt status register"
bitfld.long 0x8 6. "SSRUMF,SSR underflow secure masked flag" "0,1"
bitfld.long 0x8 5. "ITSMF,Internal timestamp interrupt secure masked flag" "0,1"
newline
bitfld.long 0x8 4. "TSOVMF,Timestamp overflow interrupt secure masked flag" "0,1"
bitfld.long 0x8 3. "TSMF,Timestamp interrupt secure masked flag" "0,1"
newline
bitfld.long 0x8 2. "WUTMF,Wake-up timer interrupt secure masked flag" "0,1"
bitfld.long 0x8 1. "ALRBMF,Alarm B interrupt secure masked flag" "0,1"
newline
bitfld.long 0x8 0. "ALRAMF,Alarm A interrupt secure masked flag" "0,1"
wgroup.long 0x5C++0x3
line.long 0x0 "RTC_SCR,RTC status clear register"
bitfld.long 0x0 6. "CSSRUF,Clear SSR underflow flag" "0,1"
bitfld.long 0x0 5. "CITSF,Clear internal timestamp flag" "0,1"
newline
bitfld.long 0x0 4. "CTSOVF,Clear timestamp overflow flag" "0,1"
bitfld.long 0x0 3. "CTSF,Clear timestamp flag" "0,1"
newline
bitfld.long 0x0 2. "CWUTF,Clear wake-up timer flag" "0,1"
bitfld.long 0x0 1. "CALRBF,Clear alarm B flag" "0,1"
newline
bitfld.long 0x0 0. "CALRAF,Clear alarm A flag" "0,1"
group.long 0x64++0x3
line.long 0x0 "RTC_TAMPTSCR,RTC timestamp on tamper control register"
bitfld.long 0x0 16. "ITAMPTS,Timestamp on internal tamper event" "0: When TAMPTS=0 internal tamper detection event..,1: Save RTC timestamp on any internal tamper.."
bitfld.long 0x0 4. "TAMP5TS,Timestamp on external tamper TAMP5 event" "0: When TAMPTS=0 TAMP5 detection event does not..,1: Save RTC timestamp on TAMP5 detection event.."
newline
bitfld.long 0x0 3. "TAMP4TS,Timestamp on external tamper TAMP4 event" "0: When TAMPTS=0 TAMP4 detection event does not..,1: Save RTC timestamp on TAMP4 detection event.."
bitfld.long 0x0 2. "TAMP3TS,Timestamp on external tamper TAMP3 event" "0: When TAMPTS=0 TAMP3 detection event does not..,1: Save RTC timestamp on TAMP3 detection event.."
newline
bitfld.long 0x0 1. "TAMP2TS,Timestamp on external tamper TAMP2 event" "0: When TAMPTS=0 TAMP2 detection event does not..,1: Save RTC timestamp on TAMP2 detection event.."
bitfld.long 0x0 0. "TAMP1TS,Timestamp on external tamper TAMP1 event" "0: When TAMPTS=0 TAMP1 detection event does not..,1: Save RTC timestamp on TAMP1 detection event.."
rgroup.long 0x68++0x3
line.long 0x0 "RTC_TSIDR,RTC timestamp status register"
hexmask.long.byte 0x0 0.--5. 1. "TSID,Timestamp flag source identification"
group.long 0x70++0x7
line.long 0x0 "RTC_ALRABINR,RTC alarm A binary mode register"
hexmask.long 0x0 0.--31. 1. "SS,Synchronous counter alarm value in Binary mode"
line.long 0x4 "RTC_ALRBBINR,RTC alarm B binary mode register"
hexmask.long 0x4 0.--31. 1. "SS,Synchronous counter alarm value in Binary mode"
tree.end
tree.end
tree "SAES (Secure Advanced Encryption Standard Hardware Accelerator)"
base ad:0x0
tree "SAES"
base ad:0x420C0C00
group.long 0x0++0x3
line.long 0x0 "SAES_CR,SAES control register"
bitfld.long 0x0 31. "IPRST,SAES peripheral software reset" "0,1"
bitfld.long 0x0 28.--30. "KEYSEL,Key selection" "0: Software key loaded in key registers SAES_KEYx,1: Derived hardware unique key (DHUK),2: Boot hardware key (BHK),?,4: xOR of DHUK and BHK,?,?,?"
newline
bitfld.long 0x0 26.--27. "KSHAREID,Key share identification" "0: AES peripheral,?,?,?"
bitfld.long 0x0 24.--25. "KMOD,Key mode selection" "0: Normal key mode.,1: Wrapped key for SAES mode.,2: Shared key mode.,?"
newline
hexmask.long.byte 0x0 20.--23. 1. "NPBLB,Number of padding bytes in last block"
bitfld.long 0x0 19. "KEYPROT,Key protection" "0: When KEYVALID is set and KEYSEL[2:0]=0..,1: When KEYVALID is set key error flag (KEIF) is.."
newline
bitfld.long 0x0 18. "KEYSIZE,Key size selection" "0: 128-bit,1: 256-bit"
bitfld.long 0x0 16. "CHMOD_1,CHMOD[2]" "0,1"
newline
bitfld.long 0x0 13.--14. "GCMPH,GCM or CCM phase selection" "0: Initialization phase,1: Header phase,2: Payload phase,3: Final phase"
bitfld.long 0x0 12. "DMAOUTEN,DMA output enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 11. "DMAINEN,DMA input enable" "0: Disable,1: Enable"
bitfld.long 0x0 5.--6. "CHMOD,CHMOD[1:0]: Chaining mode" "0: Electronic codebook (ECB),1: Cipher-block chaining (CBC),2: Counter mode (CTR),3: Galois counter mode (GCM) and Galois message.."
newline
bitfld.long 0x0 3.--4. "MODE,Operating mode" "0: Encryption,1: Key derivation (or key preparation) for ECB/CBC..,2: Decryption,?"
bitfld.long 0x0 1.--2. "DATATYPE,Data type" "0: No swapping (32-bit data).,1: Half-word swapping (16-bit data),2: Byte swapping (8-bit data),3: Bit-level swapping"
newline
bitfld.long 0x0 0. "EN,Enable" "0: Disable,1: Enable"
rgroup.long 0x4++0x3
line.long 0x0 "SAES_SR,SAES status register"
bitfld.long 0x0 7. "KEYVALID,Key valid flag" "0: Key not valid,1: Key valid"
bitfld.long 0x0 3. "BUSY,Busy" "0: Idle,1: Busy"
newline
bitfld.long 0x0 2. "WRERRF,Write error flag" "0: No error,1: Unexpected write to SAES_DINR register occurred.."
bitfld.long 0x0 1. "RDERRF,Read error flag" "0: No error,1: Unexpected read to SAES_DOUTR register occurred.."
wgroup.long 0x8++0x3
line.long 0x0 "SAES_DINR,SAES data input register"
hexmask.long 0x0 0.--31. 1. "DIN,Data input"
rgroup.long 0xC++0x3
line.long 0x0 "SAES_DOUTR,SAES data output register"
hexmask.long 0x0 0.--31. 1. "DOUT,Data output"
wgroup.long 0x10++0xF
line.long 0x0 "SAES_KEYR0,SAES key register 0"
hexmask.long 0x0 0.--31. 1. "KEY,Cryptographic key bits [31:0]"
line.long 0x4 "SAES_KEYR1,SAES key register 1"
hexmask.long 0x4 0.--31. 1. "KEY,Cryptographic key bits [63:32]"
line.long 0x8 "SAES_KEYR2,SAES key register 2"
hexmask.long 0x8 0.--31. 1. "KEY,Cryptographic key bits [95:64]"
line.long 0xC "SAES_KEYR3,SAES key register 3"
hexmask.long 0xC 0.--31. 1. "KEY,Cryptographic key bits [127:96]"
group.long 0x20++0xF
line.long 0x0 "SAES_IVR0,SAES initialization vector register 0"
hexmask.long 0x0 0.--31. 1. "IVI,Initialization vector input bits [31:0]"
line.long 0x4 "SAES_IVR1,SAES initialization vector register 1"
hexmask.long 0x4 0.--31. 1. "IVI,Initialization vector input bits [63:32]"
line.long 0x8 "SAES_IVR2,SAES initialization vector register 2"
hexmask.long 0x8 0.--31. 1. "IVI,Initialization vector input bits [95:64]"
line.long 0xC "SAES_IVR3,SAES initialization vector register 3"
hexmask.long 0xC 0.--31. 1. "IVI,Initialization vector input bits [127:96]"
wgroup.long 0x30++0xF
line.long 0x0 "SAES_KEYR4,SAES key register 4"
hexmask.long 0x0 0.--31. 1. "KEY,Cryptographic key bits [159:128]"
line.long 0x4 "SAES_KEYR5,SAES key register 5"
hexmask.long 0x4 0.--31. 1. "KEY,Cryptographic key bits [191:160]"
line.long 0x8 "SAES_KEYR6,SAES key register 6"
hexmask.long 0x8 0.--31. 1. "KEY,Cryptographic key bits [223:192]"
line.long 0xC "SAES_KEYR7,SAES key register 7"
hexmask.long 0xC 0.--31. 1. "KEY,Cryptographic key bits [255:224]"
group.long 0x40++0x1F
line.long 0x0 "SAES_SUSPR0,SAES suspend registers"
hexmask.long 0x0 0.--31. 1. "SUSP,Suspend data"
line.long 0x4 "SAES_SUSPR1,SAES suspend registers"
hexmask.long 0x4 0.--31. 1. "SUSP,Suspend data"
line.long 0x8 "SAES_SUSPR2,SAES suspend registers"
hexmask.long 0x8 0.--31. 1. "SUSP,Suspend data"
line.long 0xC "SAES_SUSPR3,SAES suspend registers"
hexmask.long 0xC 0.--31. 1. "SUSP,Suspend data"
line.long 0x10 "SAES_SUSPR4,SAES suspend registers"
hexmask.long 0x10 0.--31. 1. "SUSP,Suspend data"
line.long 0x14 "SAES_SUSPR5,SAES suspend registers"
hexmask.long 0x14 0.--31. 1. "SUSP,Suspend data"
line.long 0x18 "SAES_SUSPR6,SAES suspend registers"
hexmask.long 0x18 0.--31. 1. "SUSP,Suspend data"
line.long 0x1C "SAES_SUSPR7,SAES suspend registers"
hexmask.long 0x1C 0.--31. 1. "SUSP,Suspend data"
group.long 0x300++0x3
line.long 0x0 "SAES_IER,SAES interrupt enable register"
bitfld.long 0x0 3. "RNGEIE,RNG error interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
bitfld.long 0x0 2. "KEIE,Key error interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
newline
bitfld.long 0x0 1. "RWEIE,Read or write error interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
bitfld.long 0x0 0. "CCFIE,Computation complete flag interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
rgroup.long 0x304++0x3
line.long 0x0 "SAES_ISR,SAES interrupt status register"
bitfld.long 0x0 3. "RNGEIF,RNG error interrupt flag" "0: RNG bus is functional,1: Error detected on RNG bus interface (random seed.."
bitfld.long 0x0 2. "KEIF,Key error interrupt flag" "0: No key error detected,1: Key information failed to load into key.."
newline
bitfld.long 0x0 1. "RWEIF,Read or write error interrupt flag" "0: No read or write error detected,1: Read or write error detected"
bitfld.long 0x0 0. "CCF,Computation complete flag" "0: Not completed,1: Completed"
wgroup.long 0x308++0x3
line.long 0x0 "SAES_ICR,SAES interrupt clear register"
bitfld.long 0x0 3. "RNGEIF,RNG error interrupt flag clear" "0,1"
bitfld.long 0x0 2. "KEIF,Key error interrupt flag clear" "0,1"
newline
bitfld.long 0x0 1. "RWEIF,Read or write error interrupt flag clear" "0,1"
bitfld.long 0x0 0. "CCF,Computation complete flag clear" "0,1"
tree.end
tree "SEC_SAES"
base ad:0x520C0C00
group.long 0x0++0x3
line.long 0x0 "SAES_CR,SAES control register"
bitfld.long 0x0 31. "IPRST,SAES peripheral software reset" "0,1"
bitfld.long 0x0 28.--30. "KEYSEL,Key selection" "0: Software key loaded in key registers SAES_KEYx,1: Derived hardware unique key (DHUK),2: Boot hardware key (BHK),?,4: xOR of DHUK and BHK,?,?,?"
newline
bitfld.long 0x0 26.--27. "KSHAREID,Key share identification" "0: AES peripheral,?,?,?"
bitfld.long 0x0 24.--25. "KMOD,Key mode selection" "0: Normal key mode.,1: Wrapped key for SAES mode.,2: Shared key mode.,?"
newline
hexmask.long.byte 0x0 20.--23. 1. "NPBLB,Number of padding bytes in last block"
bitfld.long 0x0 19. "KEYPROT,Key protection" "0: When KEYVALID is set and KEYSEL[2:0]=0..,1: When KEYVALID is set key error flag (KEIF) is.."
newline
bitfld.long 0x0 18. "KEYSIZE,Key size selection" "0: 128-bit,1: 256-bit"
bitfld.long 0x0 16. "CHMOD_1,CHMOD[2]" "0,1"
newline
bitfld.long 0x0 13.--14. "GCMPH,GCM or CCM phase selection" "0: Initialization phase,1: Header phase,2: Payload phase,3: Final phase"
bitfld.long 0x0 12. "DMAOUTEN,DMA output enable" "0: Disable,1: Enable"
newline
bitfld.long 0x0 11. "DMAINEN,DMA input enable" "0: Disable,1: Enable"
bitfld.long 0x0 5.--6. "CHMOD,CHMOD[1:0]: Chaining mode" "0: Electronic codebook (ECB),1: Cipher-block chaining (CBC),2: Counter mode (CTR),3: Galois counter mode (GCM) and Galois message.."
newline
bitfld.long 0x0 3.--4. "MODE,Operating mode" "0: Encryption,1: Key derivation (or key preparation) for ECB/CBC..,2: Decryption,?"
bitfld.long 0x0 1.--2. "DATATYPE,Data type" "0: No swapping (32-bit data).,1: Half-word swapping (16-bit data),2: Byte swapping (8-bit data),3: Bit-level swapping"
newline
bitfld.long 0x0 0. "EN,Enable" "0: Disable,1: Enable"
rgroup.long 0x4++0x3
line.long 0x0 "SAES_SR,SAES status register"
bitfld.long 0x0 7. "KEYVALID,Key valid flag" "0: Key not valid,1: Key valid"
bitfld.long 0x0 3. "BUSY,Busy" "0: Idle,1: Busy"
newline
bitfld.long 0x0 2. "WRERRF,Write error flag" "0: No error,1: Unexpected write to SAES_DINR register occurred.."
bitfld.long 0x0 1. "RDERRF,Read error flag" "0: No error,1: Unexpected read to SAES_DOUTR register occurred.."
wgroup.long 0x8++0x3
line.long 0x0 "SAES_DINR,SAES data input register"
hexmask.long 0x0 0.--31. 1. "DIN,Data input"
rgroup.long 0xC++0x3
line.long 0x0 "SAES_DOUTR,SAES data output register"
hexmask.long 0x0 0.--31. 1. "DOUT,Data output"
wgroup.long 0x10++0xF
line.long 0x0 "SAES_KEYR0,SAES key register 0"
hexmask.long 0x0 0.--31. 1. "KEY,Cryptographic key bits [31:0]"
line.long 0x4 "SAES_KEYR1,SAES key register 1"
hexmask.long 0x4 0.--31. 1. "KEY,Cryptographic key bits [63:32]"
line.long 0x8 "SAES_KEYR2,SAES key register 2"
hexmask.long 0x8 0.--31. 1. "KEY,Cryptographic key bits [95:64]"
line.long 0xC "SAES_KEYR3,SAES key register 3"
hexmask.long 0xC 0.--31. 1. "KEY,Cryptographic key bits [127:96]"
group.long 0x20++0xF
line.long 0x0 "SAES_IVR0,SAES initialization vector register 0"
hexmask.long 0x0 0.--31. 1. "IVI,Initialization vector input bits [31:0]"
line.long 0x4 "SAES_IVR1,SAES initialization vector register 1"
hexmask.long 0x4 0.--31. 1. "IVI,Initialization vector input bits [63:32]"
line.long 0x8 "SAES_IVR2,SAES initialization vector register 2"
hexmask.long 0x8 0.--31. 1. "IVI,Initialization vector input bits [95:64]"
line.long 0xC "SAES_IVR3,SAES initialization vector register 3"
hexmask.long 0xC 0.--31. 1. "IVI,Initialization vector input bits [127:96]"
wgroup.long 0x30++0xF
line.long 0x0 "SAES_KEYR4,SAES key register 4"
hexmask.long 0x0 0.--31. 1. "KEY,Cryptographic key bits [159:128]"
line.long 0x4 "SAES_KEYR5,SAES key register 5"
hexmask.long 0x4 0.--31. 1. "KEY,Cryptographic key bits [191:160]"
line.long 0x8 "SAES_KEYR6,SAES key register 6"
hexmask.long 0x8 0.--31. 1. "KEY,Cryptographic key bits [223:192]"
line.long 0xC "SAES_KEYR7,SAES key register 7"
hexmask.long 0xC 0.--31. 1. "KEY,Cryptographic key bits [255:224]"
group.long 0x40++0x1F
line.long 0x0 "SAES_SUSPR0,SAES suspend registers"
hexmask.long 0x0 0.--31. 1. "SUSP,Suspend data"
line.long 0x4 "SAES_SUSPR1,SAES suspend registers"
hexmask.long 0x4 0.--31. 1. "SUSP,Suspend data"
line.long 0x8 "SAES_SUSPR2,SAES suspend registers"
hexmask.long 0x8 0.--31. 1. "SUSP,Suspend data"
line.long 0xC "SAES_SUSPR3,SAES suspend registers"
hexmask.long 0xC 0.--31. 1. "SUSP,Suspend data"
line.long 0x10 "SAES_SUSPR4,SAES suspend registers"
hexmask.long 0x10 0.--31. 1. "SUSP,Suspend data"
line.long 0x14 "SAES_SUSPR5,SAES suspend registers"
hexmask.long 0x14 0.--31. 1. "SUSP,Suspend data"
line.long 0x18 "SAES_SUSPR6,SAES suspend registers"
hexmask.long 0x18 0.--31. 1. "SUSP,Suspend data"
line.long 0x1C "SAES_SUSPR7,SAES suspend registers"
hexmask.long 0x1C 0.--31. 1. "SUSP,Suspend data"
group.long 0x300++0x3
line.long 0x0 "SAES_IER,SAES interrupt enable register"
bitfld.long 0x0 3. "RNGEIE,RNG error interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
bitfld.long 0x0 2. "KEIE,Key error interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
newline
bitfld.long 0x0 1. "RWEIE,Read or write error interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
bitfld.long 0x0 0. "CCFIE,Computation complete flag interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
rgroup.long 0x304++0x3
line.long 0x0 "SAES_ISR,SAES interrupt status register"
bitfld.long 0x0 3. "RNGEIF,RNG error interrupt flag" "0: RNG bus is functional,1: Error detected on RNG bus interface (random seed.."
bitfld.long 0x0 2. "KEIF,Key error interrupt flag" "0: No key error detected,1: Key information failed to load into key.."
newline
bitfld.long 0x0 1. "RWEIF,Read or write error interrupt flag" "0: No read or write error detected,1: Read or write error detected"
bitfld.long 0x0 0. "CCF,Computation complete flag" "0: Not completed,1: Completed"
wgroup.long 0x308++0x3
line.long 0x0 "SAES_ICR,SAES interrupt clear register"
bitfld.long 0x0 3. "RNGEIF,RNG error interrupt flag clear" "0,1"
bitfld.long 0x0 2. "KEIF,Key error interrupt flag clear" "0,1"
newline
bitfld.long 0x0 1. "RWEIF,Read or write error interrupt flag clear" "0,1"
bitfld.long 0x0 0. "CCF,Computation complete flag clear" "0,1"
tree.end
tree.end
tree "SAI (Serial Audio Interface)"
base ad:0x0
tree "SAI"
base ad:0x40015400
group.long 0x4++0x13
line.long 0x0 "SAI_ACR1,SAI configuration register 1"
bitfld.long 0x0 27. "MCKEN,Master clock generation enable" "0: The master clock is not generated,1: The master clock is generated independently of.."
bitfld.long 0x0 26. "OSR,Oversampling ratio for master clock" "0: Master clock frequency = Fless thansub>FSless..,1: Master clock frequency = Fless thansub>FSless.."
newline
hexmask.long.byte 0x0 20.--25. 1. "MCKDIV,Master clock divider"
bitfld.long 0x0 19. "NODIV,No divider" "0: the ratio between the Master clock generator and..,1: the ratio between the Master clock generator and.."
newline
bitfld.long 0x0 17. "DMAEN,DMA enable" "0: DMA disabled,1: DMA enabled"
bitfld.long 0x0 16. "SAIEN,Audio block enable" "0: SAI audio block disabled,1: SAI audio block enabled."
newline
bitfld.long 0x0 13. "OUTDRIV,Output drive" "0: Audio block output driven when SAIEN is set,1: Audio block output driven immediately after the.."
bitfld.long 0x0 12. "MONO,Mono mode" "0: Stereo mode,1: Mono mode."
newline
bitfld.long 0x0 10.--11. "SYNCEN,Synchronization enable" "0: audio subblock in asynchronous mode.,1: audio subblock is synchronous with the other..,?,?"
bitfld.long 0x0 9. "CKSTR,Clock strobing edge" "0: Signals generated by the SAI change on SCK..,1: Signals generated by the SAI change on SCK.."
newline
bitfld.long 0x0 8. "LSBFIRST,Least significant bit first" "0: Data are transferred with MSB first,1: Data are transferred with LSB first"
bitfld.long 0x0 5.--7. "DS,Data size" "?,?,2: 8 bits,3: 10 bits,4: 16 bits,5: 20 bits,6: 24 bits,7: 32 bits"
newline
bitfld.long 0x0 2.--3. "PRTCFG,Protocol configuration" "0: Free protocol.,1: SPDIF protocol,2: AC'97 protocol,?"
bitfld.long 0x0 0.--1. "MODE,SAIx audio block mode" "0: Master transmitter,1: Master receiver,2: Slave transmitter,3: Slave receiver"
line.long 0x4 "SAI_ACR2,SAI configuration register 2"
bitfld.long 0x4 14.--15. "COMP,Companding mode." "0: No companding algorithm,?,2: u-Law algorithm,3: A-Law algorithm"
bitfld.long 0x4 13. "CPL,Complement bit." "0: 1's complement representation.,1: 2's complement representation."
newline
hexmask.long.byte 0x4 7.--12. 1. "MUTECNT,Mute counter."
bitfld.long 0x4 6. "MUTEVAL,Mute value." "0: Bit value 0 is sent during the mute mode.,1: Last values are sent during the mute mode."
newline
bitfld.long 0x4 5. "MUTE,Mute." "0: No mute mode.,1: Mute mode enabled."
bitfld.long 0x4 4. "TRIS,Tristate management on data line." "0: SD output line is still driven by the SAI when a..,1: SD output line is released (HI-Z) at the end of.."
newline
bitfld.long 0x4 3. "FFLUSH,FIFO flush." "0: No FIFO flush.,1: FIFO flush."
bitfld.long 0x4 0.--2. "FTH,FIFO threshold." "0: FIFO empty,1: 1/4 FIFO,2: 1/2 FIFO,3: 3/4 FIFO,4: FIFO full,?,?,?"
line.long 0x8 "SAI_AFRCR,SAI frame configuration register"
bitfld.long 0x8 18. "FSOFF,Frame synchronization offset." "0: FS is asserted on the first bit of the slot 0.,1: FS is asserted one bit before the first bit of.."
bitfld.long 0x8 17. "FSPOL,Frame synchronization polarity." "0: FS is active low (falling edge),1: FS is active high (rising edge)"
newline
rbitfld.long 0x8 16. "FSDEF,Frame synchronization definition." "0: FS signal is a start frame signal,1: FS signal is a start of frame signal + channel.."
hexmask.long.byte 0x8 8.--14. 1. "FSALL,Frame synchronization active level length."
newline
hexmask.long.byte 0x8 0.--7. 1. "FRL,Frame length."
line.long 0xC "SAI_ASLOTR,SAI slot register"
hexmask.long.word 0xC 16.--31. 1. "SLOTEN,Slot enable."
hexmask.long.byte 0xC 8.--11. 1. "NBSLOT,Number of slots in an audio frame."
newline
bitfld.long 0xC 6.--7. "SLOTSZ,Slot size" "0: The slot size is equivalent to the data size..,1: 16-bit,2: 32-bit,?"
hexmask.long.byte 0xC 0.--4. 1. "FBOFF,First bit offset"
line.long 0x10 "SAI_AIM,SAI interrupt mask register"
bitfld.long 0x10 6. "LFSDETIE,Late frame synchronization detection interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
bitfld.long 0x10 5. "AFSDETIE,Anticipated frame synchronization detection interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
newline
bitfld.long 0x10 4. "CNRDYIE,Codec not ready interrupt enable (AC'97)." "0: Interrupt is disabled,1: Interrupt is enabled"
bitfld.long 0x10 3. "FREQIE,FIFO request interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
newline
bitfld.long 0x10 2. "WCKCFGIE,Wrong clock configuration interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
bitfld.long 0x10 1. "MUTEDETIE,Mute detection interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
newline
bitfld.long 0x10 0. "OVRUDRIE,Overrun/underrun interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
rgroup.long 0x18++0x3
line.long 0x0 "SAI_ASR,SAI status register"
bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold." "0: FIFO empty (transmitter and receiver modes),1: FIFO less than or equal 1/4 but not empty..,2: 1/4 less than FIFO less than or equal 1/2..,3: 1/2 less than FIFO less than or equal 3/4..,4: 3/4 less than FIFO but not full (transmitter..,5: FIFO full (transmitter and receiver modes),?,?"
bitfld.long 0x0 6. "LFSDET,Late frame synchronization detection." "0: No error.,1: Frame synchronization signal is not present at.."
newline
bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization detection." "0: No error.,1: Frame synchronization signal is detected earlier.."
bitfld.long 0x0 4. "CNRDY,Codec not ready." "0: External AC'97 Codec is ready,1: External AC'97 Codec is not ready"
newline
bitfld.long 0x0 3. "FREQ,FIFO request." "0: No FIFO request.,1: FIFO request to read or to write the SAI_xDR."
bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration flag." "0: Clock configuration is correct,1: Clock configuration does not respect the rule.."
newline
bitfld.long 0x0 1. "MUTEDET,Mute detection." "0: No MUTE detection on the SD input line,1: MUTE value detected on the SD input line (0.."
bitfld.long 0x0 0. "OVRUDR,Overrun / underrun." "0: No overrun/underrun error.,1: Overrun/underrun error detection."
wgroup.long 0x1C++0x3
line.long 0x0 "SAI_ACLRFR,SAI clear flag register"
bitfld.long 0x0 6. "CLFSDET,Clear late frame synchronization detection flag." "0,1"
bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization detection flag." "0,1"
newline
bitfld.long 0x0 4. "CCNRDY,Clear Codec not ready flag." "0,1"
bitfld.long 0x0 2. "CWCKCFG,Clear wrong clock configuration flag." "0,1"
newline
bitfld.long 0x0 1. "CMUTEDET,Mute detection flag." "0,1"
bitfld.long 0x0 0. "COVRUDR,Clear overrun / underrun." "0,1"
group.long 0x20++0x17
line.long 0x0 "SAI_ADR,SAI data register"
hexmask.long 0x0 0.--31. 1. "DATA,Data"
line.long 0x4 "SAI_BCR1,SAI configuration register 1"
bitfld.long 0x4 27. "MCKEN,Master clock generation enable" "0: The master clock is not generated,1: The master clock is generated independently of.."
bitfld.long 0x4 26. "OSR,Oversampling ratio for master clock" "0: Master clock frequency = Fless thansub>FSless..,1: Master clock frequency = Fless thansub>FSless.."
newline
hexmask.long.byte 0x4 20.--25. 1. "MCKDIV,Master clock divider"
bitfld.long 0x4 19. "NODIV,No divider" "0: the ratio between the Master clock generator and..,1: the ratio between the Master clock generator and.."
newline
bitfld.long 0x4 17. "DMAEN,DMA enable" "0: DMA disabled,1: DMA enabled"
bitfld.long 0x4 16. "SAIEN,Audio block enable" "0: SAI audio block disabled,1: SAI audio block enabled."
newline
bitfld.long 0x4 13. "OUTDRIV,Output drive" "0: Audio block output driven when SAIEN is set,1: Audio block output driven immediately after the.."
bitfld.long 0x4 12. "MONO,Mono mode" "0: Stereo mode,1: Mono mode."
newline
bitfld.long 0x4 10.--11. "SYNCEN,Synchronization enable" "0: audio subblock in asynchronous mode.,1: audio subblock is synchronous with the other..,?,?"
bitfld.long 0x4 9. "CKSTR,Clock strobing edge" "0: Signals generated by the SAI change on SCK..,1: Signals generated by the SAI change on SCK.."
newline
bitfld.long 0x4 8. "LSBFIRST,Least significant bit first" "0: Data are transferred with MSB first,1: Data are transferred with LSB first"
bitfld.long 0x4 5.--7. "DS,Data size" "?,?,2: 8 bits,3: 10 bits,4: 16 bits,5: 20 bits,6: 24 bits,7: 32 bits"
newline
bitfld.long 0x4 2.--3. "PRTCFG,Protocol configuration" "0: Free protocol.,1: SPDIF protocol,2: AC'97 protocol,?"
bitfld.long 0x4 0.--1. "MODE,SAIx audio block mode" "0: Master transmitter,1: Master receiver,2: Slave transmitter,3: Slave receiver"
line.long 0x8 "SAI_BCR2,SAI configuration register 2"
bitfld.long 0x8 14.--15. "COMP,Companding mode." "0: No companding algorithm,?,2: u-Law algorithm,3: A-Law algorithm"
bitfld.long 0x8 13. "CPL,Complement bit." "0: 1's complement representation.,1: 2's complement representation."
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hexmask.long.byte 0x8 7.--12. 1. "MUTECNT,Mute counter."
bitfld.long 0x8 6. "MUTEVAL,Mute value." "0: Bit value 0 is sent during the mute mode.,1: Last values are sent during the mute mode."
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bitfld.long 0x8 5. "MUTE,Mute." "0: No mute mode.,1: Mute mode enabled."
bitfld.long 0x8 4. "TRIS,Tristate management on data line." "0: SD output line is still driven by the SAI when a..,1: SD output line is released (HI-Z) at the end of.."
newline
bitfld.long 0x8 3. "FFLUSH,FIFO flush." "0: No FIFO flush.,1: FIFO flush."
bitfld.long 0x8 0.--2. "FTH,FIFO threshold." "0: FIFO empty,1: 1/4 FIFO,2: 1/2 FIFO,3: 3/4 FIFO,4: FIFO full,?,?,?"
line.long 0xC "SAI_BFRCR,SAI frame configuration register"
bitfld.long 0xC 18. "FSOFF,Frame synchronization offset." "0: FS is asserted on the first bit of the slot 0.,1: FS is asserted one bit before the first bit of.."
bitfld.long 0xC 17. "FSPOL,Frame synchronization polarity." "0: FS is active low (falling edge),1: FS is active high (rising edge)"
newline
rbitfld.long 0xC 16. "FSDEF,Frame synchronization definition." "0: FS signal is a start frame signal,1: FS signal is a start of frame signal + channel.."
hexmask.long.byte 0xC 8.--14. 1. "FSALL,Frame synchronization active level length."
newline
hexmask.long.byte 0xC 0.--7. 1. "FRL,Frame length."
line.long 0x10 "SAI_BSLOTR,SAI slot register"
hexmask.long.word 0x10 16.--31. 1. "SLOTEN,Slot enable."
hexmask.long.byte 0x10 8.--11. 1. "NBSLOT,Number of slots in an audio frame."
newline
bitfld.long 0x10 6.--7. "SLOTSZ,Slot size" "0: The slot size is equivalent to the data size..,1: 16-bit,2: 32-bit,?"
hexmask.long.byte 0x10 0.--4. 1. "FBOFF,First bit offset"
line.long 0x14 "SAI_BIM,SAI interrupt mask register"
bitfld.long 0x14 6. "LFSDETIE,Late frame synchronization detection interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
bitfld.long 0x14 5. "AFSDETIE,Anticipated frame synchronization detection interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
newline
bitfld.long 0x14 4. "CNRDYIE,Codec not ready interrupt enable (AC'97)." "0: Interrupt is disabled,1: Interrupt is enabled"
bitfld.long 0x14 3. "FREQIE,FIFO request interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
newline
bitfld.long 0x14 2. "WCKCFGIE,Wrong clock configuration interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
bitfld.long 0x14 1. "MUTEDETIE,Mute detection interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
newline
bitfld.long 0x14 0. "OVRUDRIE,Overrun/underrun interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
rgroup.long 0x38++0x3
line.long 0x0 "SAI_BSR,SAI status register"
bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold." "0: FIFO empty (transmitter and receiver modes),1: FIFO less than or equal 1/4 but not empty..,2: 1/4 less than FIFO less than or equal 1/2..,3: 1/2 less than FIFO less than or equal 3/4..,4: 3/4 less than FIFO but not full (transmitter..,5: FIFO full (transmitter and receiver modes),?,?"
bitfld.long 0x0 6. "LFSDET,Late frame synchronization detection." "0: No error.,1: Frame synchronization signal is not present at.."
newline
bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization detection." "0: No error.,1: Frame synchronization signal is detected earlier.."
bitfld.long 0x0 4. "CNRDY,Codec not ready." "0: External AC'97 Codec is ready,1: External AC'97 Codec is not ready"
newline
bitfld.long 0x0 3. "FREQ,FIFO request." "0: No FIFO request.,1: FIFO request to read or to write the SAI_xDR."
bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration flag." "0: Clock configuration is correct,1: Clock configuration does not respect the rule.."
newline
bitfld.long 0x0 1. "MUTEDET,Mute detection." "0: No MUTE detection on the SD input line,1: MUTE value detected on the SD input line (0.."
bitfld.long 0x0 0. "OVRUDR,Overrun / underrun." "0: No overrun/underrun error.,1: Overrun/underrun error detection."
wgroup.long 0x3C++0x3
line.long 0x0 "SAI_BCLRFR,SAI clear flag register"
bitfld.long 0x0 6. "CLFSDET,Clear late frame synchronization detection flag." "0,1"
bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization detection flag." "0,1"
newline
bitfld.long 0x0 4. "CCNRDY,Clear Codec not ready flag." "0,1"
bitfld.long 0x0 2. "CWCKCFG,Clear wrong clock configuration flag." "0,1"
newline
bitfld.long 0x0 1. "CMUTEDET,Mute detection flag." "0,1"
bitfld.long 0x0 0. "COVRUDR,Clear overrun / underrun." "0,1"
group.long 0x40++0xB
line.long 0x0 "SAI_BDR,SAI data register"
hexmask.long 0x0 0.--31. 1. "DATA,Data"
line.long 0x4 "SAI_PDMCR,SAI PDM control register"
bitfld.long 0x4 11. "CKEN4,Clock enable of bitstream clock number 4" "0: SAI_CK4 clock disabled,1: SAI_CK4 clock enabled"
bitfld.long 0x4 10. "CKEN3,Clock enable of bitstream clock number 3" "0: SAI_CK3 clock disabled,1: SAI_CK3 clock enabled"
newline
bitfld.long 0x4 9. "CKEN2,Clock enable of bitstream clock number 2" "0: SAI_CK2 clock disabled,1: SAI_CK2 clock enabled"
bitfld.long 0x4 8. "CKEN1,Clock enable of bitstream clock number 1" "0: SAI_CK1 clock disabled,1: SAI_CK1 clock enabled"
newline
bitfld.long 0x4 4.--5. "MICNBR,Number of microphones" "0: Configuration with 2 microphones,1: Configuration with 4 microphones,2: Configuration with 6 microphones,3: Configuration with 8 microphones"
bitfld.long 0x4 0. "PDMEN,PDM enable" "0: PDM interface disabled,1: PDM interface enabled"
line.long 0x8 "SAI_PDMDLY,SAI PDM delay register"
bitfld.long 0x8 28.--30. "DLYM4R,Delay line for second microphone of pair 4" "0: No delay,1: Delay of 1 Tless thansub>SAI_CK less..,2: Delay of 2 Tless thansub>SAI_CK less..,?,?,?,?,7: Delay of 7 Tless thansub>SAI_CK less.."
bitfld.long 0x8 24.--26. "DLYM4L,Delay line for first microphone of pair 4" "0: No delay,1: Delay of 1 Tless thansub>SAI_CK less..,2: Delay of 2 Tless thansub>SAI_CK less..,?,?,?,?,7: Delay of 7 of Tless thansub>SAI_CK less.."
newline
bitfld.long 0x8 20.--22. "DLYM3R,Delay line for second microphone of pair 3" "0: No delay,1: Delay of 1 Tless thansub>SAI_CK less..,2: Delay of 2 Tless thansub>SAI_CK less..,?,?,?,?,7: Delay of 7 Tless thansub>SAI_CK less.."
bitfld.long 0x8 16.--18. "DLYM3L,Delay line for first microphone of pair 3" "0: No delay,1: Delay of 1 Tless thansub>SAI_CK less..,2: Delay of 2 Tless thansub>SAI_CK less..,?,?,?,?,7: Delay of 7 Tless thansub>SAI_CK less.."
newline
bitfld.long 0x8 12.--14. "DLYM2R,Delay line for second microphone of pair 2" "0: No delay,1: Delay of 1 Tless thansub>SAI_CK less..,2: Delay of 2 Tless thansub>SAI_CK less..,?,?,?,?,7: Delay of 7 Tless thansub>SAI_CK less.."
bitfld.long 0x8 8.--10. "DLYM2L,Delay line for first microphone of pair 2" "0: No delay,1: Delay of 1 Tless thansub>SAI_CK less..,2: Delay of 2 Tless thansub>SAI_CK less..,?,?,?,?,7: Delay of 7 Tless thansub>SAI_CK less.."
newline
bitfld.long 0x8 4.--6. "DLYM1R,Delay line adjust for second microphone of pair 1" "0: No delay,1: Delay of 1 Tless thansub>SAI_CK less..,2: Delay of 2 Tless thansub>SAI_CK less..,?,?,?,?,7: Delay of 7 Tless thansub>SAI_CK less.."
bitfld.long 0x8 0.--2. "DLYM1L,Delay line adjust for first microphone of pair 1" "0: No delay,1: Delay of 1 Tless thansub>SAI_CK less..,2: Delay of 2 Tless thansub>SAI_CK less..,?,?,?,?,7: Delay of 7 Tless thansub>SAI_CK less.."
tree.end
tree "SEC_SAI1"
base ad:0x50015400
group.long 0x4++0x13
line.long 0x0 "SAI_ACR1,SAI configuration register 1"
bitfld.long 0x0 27. "MCKEN,Master clock generation enable" "0: The master clock is not generated,1: The master clock is generated independently of.."
bitfld.long 0x0 26. "OSR,Oversampling ratio for master clock" "0: Master clock frequency = Fless thansub>FSless..,1: Master clock frequency = Fless thansub>FSless.."
newline
hexmask.long.byte 0x0 20.--25. 1. "MCKDIV,Master clock divider"
bitfld.long 0x0 19. "NODIV,No divider" "0: the ratio between the Master clock generator and..,1: the ratio between the Master clock generator and.."
newline
bitfld.long 0x0 17. "DMAEN,DMA enable" "0: DMA disabled,1: DMA enabled"
bitfld.long 0x0 16. "SAIEN,Audio block enable" "0: SAI audio block disabled,1: SAI audio block enabled."
newline
bitfld.long 0x0 13. "OUTDRIV,Output drive" "0: Audio block output driven when SAIEN is set,1: Audio block output driven immediately after the.."
bitfld.long 0x0 12. "MONO,Mono mode" "0: Stereo mode,1: Mono mode."
newline
bitfld.long 0x0 10.--11. "SYNCEN,Synchronization enable" "0: audio subblock in asynchronous mode.,1: audio subblock is synchronous with the other..,?,?"
bitfld.long 0x0 9. "CKSTR,Clock strobing edge" "0: Signals generated by the SAI change on SCK..,1: Signals generated by the SAI change on SCK.."
newline
bitfld.long 0x0 8. "LSBFIRST,Least significant bit first" "0: Data are transferred with MSB first,1: Data are transferred with LSB first"
bitfld.long 0x0 5.--7. "DS,Data size" "?,?,2: 8 bits,3: 10 bits,4: 16 bits,5: 20 bits,6: 24 bits,7: 32 bits"
newline
bitfld.long 0x0 2.--3. "PRTCFG,Protocol configuration" "0: Free protocol.,1: SPDIF protocol,2: AC'97 protocol,?"
bitfld.long 0x0 0.--1. "MODE,SAIx audio block mode" "0: Master transmitter,1: Master receiver,2: Slave transmitter,3: Slave receiver"
line.long 0x4 "SAI_ACR2,SAI configuration register 2"
bitfld.long 0x4 14.--15. "COMP,Companding mode." "0: No companding algorithm,?,2: u-Law algorithm,3: A-Law algorithm"
bitfld.long 0x4 13. "CPL,Complement bit." "0: 1's complement representation.,1: 2's complement representation."
newline
hexmask.long.byte 0x4 7.--12. 1. "MUTECNT,Mute counter."
bitfld.long 0x4 6. "MUTEVAL,Mute value." "0: Bit value 0 is sent during the mute mode.,1: Last values are sent during the mute mode."
newline
bitfld.long 0x4 5. "MUTE,Mute." "0: No mute mode.,1: Mute mode enabled."
bitfld.long 0x4 4. "TRIS,Tristate management on data line." "0: SD output line is still driven by the SAI when a..,1: SD output line is released (HI-Z) at the end of.."
newline
bitfld.long 0x4 3. "FFLUSH,FIFO flush." "0: No FIFO flush.,1: FIFO flush."
bitfld.long 0x4 0.--2. "FTH,FIFO threshold." "0: FIFO empty,1: 1/4 FIFO,2: 1/2 FIFO,3: 3/4 FIFO,4: FIFO full,?,?,?"
line.long 0x8 "SAI_AFRCR,SAI frame configuration register"
bitfld.long 0x8 18. "FSOFF,Frame synchronization offset." "0: FS is asserted on the first bit of the slot 0.,1: FS is asserted one bit before the first bit of.."
bitfld.long 0x8 17. "FSPOL,Frame synchronization polarity." "0: FS is active low (falling edge),1: FS is active high (rising edge)"
newline
rbitfld.long 0x8 16. "FSDEF,Frame synchronization definition." "0: FS signal is a start frame signal,1: FS signal is a start of frame signal + channel.."
hexmask.long.byte 0x8 8.--14. 1. "FSALL,Frame synchronization active level length."
newline
hexmask.long.byte 0x8 0.--7. 1. "FRL,Frame length."
line.long 0xC "SAI_ASLOTR,SAI slot register"
hexmask.long.word 0xC 16.--31. 1. "SLOTEN,Slot enable."
hexmask.long.byte 0xC 8.--11. 1. "NBSLOT,Number of slots in an audio frame."
newline
bitfld.long 0xC 6.--7. "SLOTSZ,Slot size" "0: The slot size is equivalent to the data size..,1: 16-bit,2: 32-bit,?"
hexmask.long.byte 0xC 0.--4. 1. "FBOFF,First bit offset"
line.long 0x10 "SAI_AIM,SAI interrupt mask register"
bitfld.long 0x10 6. "LFSDETIE,Late frame synchronization detection interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
bitfld.long 0x10 5. "AFSDETIE,Anticipated frame synchronization detection interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
newline
bitfld.long 0x10 4. "CNRDYIE,Codec not ready interrupt enable (AC'97)." "0: Interrupt is disabled,1: Interrupt is enabled"
bitfld.long 0x10 3. "FREQIE,FIFO request interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
newline
bitfld.long 0x10 2. "WCKCFGIE,Wrong clock configuration interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
bitfld.long 0x10 1. "MUTEDETIE,Mute detection interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
newline
bitfld.long 0x10 0. "OVRUDRIE,Overrun/underrun interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
rgroup.long 0x18++0x3
line.long 0x0 "SAI_ASR,SAI status register"
bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold." "0: FIFO empty (transmitter and receiver modes),1: FIFO less than or equal 1/4 but not empty..,2: 1/4 less than FIFO less than or equal 1/2..,3: 1/2 less than FIFO less than or equal 3/4..,4: 3/4 less than FIFO but not full (transmitter..,5: FIFO full (transmitter and receiver modes),?,?"
bitfld.long 0x0 6. "LFSDET,Late frame synchronization detection." "0: No error.,1: Frame synchronization signal is not present at.."
newline
bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization detection." "0: No error.,1: Frame synchronization signal is detected earlier.."
bitfld.long 0x0 4. "CNRDY,Codec not ready." "0: External AC'97 Codec is ready,1: External AC'97 Codec is not ready"
newline
bitfld.long 0x0 3. "FREQ,FIFO request." "0: No FIFO request.,1: FIFO request to read or to write the SAI_xDR."
bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration flag." "0: Clock configuration is correct,1: Clock configuration does not respect the rule.."
newline
bitfld.long 0x0 1. "MUTEDET,Mute detection." "0: No MUTE detection on the SD input line,1: MUTE value detected on the SD input line (0.."
bitfld.long 0x0 0. "OVRUDR,Overrun / underrun." "0: No overrun/underrun error.,1: Overrun/underrun error detection."
wgroup.long 0x1C++0x3
line.long 0x0 "SAI_ACLRFR,SAI clear flag register"
bitfld.long 0x0 6. "CLFSDET,Clear late frame synchronization detection flag." "0,1"
bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization detection flag." "0,1"
newline
bitfld.long 0x0 4. "CCNRDY,Clear Codec not ready flag." "0,1"
bitfld.long 0x0 2. "CWCKCFG,Clear wrong clock configuration flag." "0,1"
newline
bitfld.long 0x0 1. "CMUTEDET,Mute detection flag." "0,1"
bitfld.long 0x0 0. "COVRUDR,Clear overrun / underrun." "0,1"
group.long 0x20++0x17
line.long 0x0 "SAI_ADR,SAI data register"
hexmask.long 0x0 0.--31. 1. "DATA,Data"
line.long 0x4 "SAI_BCR1,SAI configuration register 1"
bitfld.long 0x4 27. "MCKEN,Master clock generation enable" "0: The master clock is not generated,1: The master clock is generated independently of.."
bitfld.long 0x4 26. "OSR,Oversampling ratio for master clock" "0: Master clock frequency = Fless thansub>FSless..,1: Master clock frequency = Fless thansub>FSless.."
newline
hexmask.long.byte 0x4 20.--25. 1. "MCKDIV,Master clock divider"
bitfld.long 0x4 19. "NODIV,No divider" "0: the ratio between the Master clock generator and..,1: the ratio between the Master clock generator and.."
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bitfld.long 0x4 17. "DMAEN,DMA enable" "0: DMA disabled,1: DMA enabled"
bitfld.long 0x4 16. "SAIEN,Audio block enable" "0: SAI audio block disabled,1: SAI audio block enabled."
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bitfld.long 0x4 13. "OUTDRIV,Output drive" "0: Audio block output driven when SAIEN is set,1: Audio block output driven immediately after the.."
bitfld.long 0x4 12. "MONO,Mono mode" "0: Stereo mode,1: Mono mode."
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bitfld.long 0x4 10.--11. "SYNCEN,Synchronization enable" "0: audio subblock in asynchronous mode.,1: audio subblock is synchronous with the other..,?,?"
bitfld.long 0x4 9. "CKSTR,Clock strobing edge" "0: Signals generated by the SAI change on SCK..,1: Signals generated by the SAI change on SCK.."
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bitfld.long 0x4 8. "LSBFIRST,Least significant bit first" "0: Data are transferred with MSB first,1: Data are transferred with LSB first"
bitfld.long 0x4 5.--7. "DS,Data size" "?,?,2: 8 bits,3: 10 bits,4: 16 bits,5: 20 bits,6: 24 bits,7: 32 bits"
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bitfld.long 0x4 2.--3. "PRTCFG,Protocol configuration" "0: Free protocol.,1: SPDIF protocol,2: AC'97 protocol,?"
bitfld.long 0x4 0.--1. "MODE,SAIx audio block mode" "0: Master transmitter,1: Master receiver,2: Slave transmitter,3: Slave receiver"
line.long 0x8 "SAI_BCR2,SAI configuration register 2"
bitfld.long 0x8 14.--15. "COMP,Companding mode." "0: No companding algorithm,?,2: u-Law algorithm,3: A-Law algorithm"
bitfld.long 0x8 13. "CPL,Complement bit." "0: 1's complement representation.,1: 2's complement representation."
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hexmask.long.byte 0x8 7.--12. 1. "MUTECNT,Mute counter."
bitfld.long 0x8 6. "MUTEVAL,Mute value." "0: Bit value 0 is sent during the mute mode.,1: Last values are sent during the mute mode."
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bitfld.long 0x8 5. "MUTE,Mute." "0: No mute mode.,1: Mute mode enabled."
bitfld.long 0x8 4. "TRIS,Tristate management on data line." "0: SD output line is still driven by the SAI when a..,1: SD output line is released (HI-Z) at the end of.."
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bitfld.long 0x8 3. "FFLUSH,FIFO flush." "0: No FIFO flush.,1: FIFO flush."
bitfld.long 0x8 0.--2. "FTH,FIFO threshold." "0: FIFO empty,1: 1/4 FIFO,2: 1/2 FIFO,3: 3/4 FIFO,4: FIFO full,?,?,?"
line.long 0xC "SAI_BFRCR,SAI frame configuration register"
bitfld.long 0xC 18. "FSOFF,Frame synchronization offset." "0: FS is asserted on the first bit of the slot 0.,1: FS is asserted one bit before the first bit of.."
bitfld.long 0xC 17. "FSPOL,Frame synchronization polarity." "0: FS is active low (falling edge),1: FS is active high (rising edge)"
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rbitfld.long 0xC 16. "FSDEF,Frame synchronization definition." "0: FS signal is a start frame signal,1: FS signal is a start of frame signal + channel.."
hexmask.long.byte 0xC 8.--14. 1. "FSALL,Frame synchronization active level length."
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hexmask.long.byte 0xC 0.--7. 1. "FRL,Frame length."
line.long 0x10 "SAI_BSLOTR,SAI slot register"
hexmask.long.word 0x10 16.--31. 1. "SLOTEN,Slot enable."
hexmask.long.byte 0x10 8.--11. 1. "NBSLOT,Number of slots in an audio frame."
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bitfld.long 0x10 6.--7. "SLOTSZ,Slot size" "0: The slot size is equivalent to the data size..,1: 16-bit,2: 32-bit,?"
hexmask.long.byte 0x10 0.--4. 1. "FBOFF,First bit offset"
line.long 0x14 "SAI_BIM,SAI interrupt mask register"
bitfld.long 0x14 6. "LFSDETIE,Late frame synchronization detection interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
bitfld.long 0x14 5. "AFSDETIE,Anticipated frame synchronization detection interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
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bitfld.long 0x14 4. "CNRDYIE,Codec not ready interrupt enable (AC'97)." "0: Interrupt is disabled,1: Interrupt is enabled"
bitfld.long 0x14 3. "FREQIE,FIFO request interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
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bitfld.long 0x14 2. "WCKCFGIE,Wrong clock configuration interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
bitfld.long 0x14 1. "MUTEDETIE,Mute detection interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
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bitfld.long 0x14 0. "OVRUDRIE,Overrun/underrun interrupt enable." "0: Interrupt is disabled,1: Interrupt is enabled"
rgroup.long 0x38++0x3
line.long 0x0 "SAI_BSR,SAI status register"
bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold." "0: FIFO empty (transmitter and receiver modes),1: FIFO less than or equal 1/4 but not empty..,2: 1/4 less than FIFO less than or equal 1/2..,3: 1/2 less than FIFO less than or equal 3/4..,4: 3/4 less than FIFO but not full (transmitter..,5: FIFO full (transmitter and receiver modes),?,?"
bitfld.long 0x0 6. "LFSDET,Late frame synchronization detection." "0: No error.,1: Frame synchronization signal is not present at.."
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bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization detection." "0: No error.,1: Frame synchronization signal is detected earlier.."
bitfld.long 0x0 4. "CNRDY,Codec not ready." "0: External AC'97 Codec is ready,1: External AC'97 Codec is not ready"
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bitfld.long 0x0 3. "FREQ,FIFO request." "0: No FIFO request.,1: FIFO request to read or to write the SAI_xDR."
bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration flag." "0: Clock configuration is correct,1: Clock configuration does not respect the rule.."
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bitfld.long 0x0 1. "MUTEDET,Mute detection." "0: No MUTE detection on the SD input line,1: MUTE value detected on the SD input line (0.."
bitfld.long 0x0 0. "OVRUDR,Overrun / underrun." "0: No overrun/underrun error.,1: Overrun/underrun error detection."
wgroup.long 0x3C++0x3
line.long 0x0 "SAI_BCLRFR,SAI clear flag register"
bitfld.long 0x0 6. "CLFSDET,Clear late frame synchronization detection flag." "0,1"
bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization detection flag." "0,1"
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bitfld.long 0x0 4. "CCNRDY,Clear Codec not ready flag." "0,1"
bitfld.long 0x0 2. "CWCKCFG,Clear wrong clock configuration flag." "0,1"
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bitfld.long 0x0 1. "CMUTEDET,Mute detection flag." "0,1"
bitfld.long 0x0 0. "COVRUDR,Clear overrun / underrun." "0,1"
group.long 0x40++0xB
line.long 0x0 "SAI_BDR,SAI data register"
hexmask.long 0x0 0.--31. 1. "DATA,Data"
line.long 0x4 "SAI_PDMCR,SAI PDM control register"
bitfld.long 0x4 11. "CKEN4,Clock enable of bitstream clock number 4" "0: SAI_CK4 clock disabled,1: SAI_CK4 clock enabled"
bitfld.long 0x4 10. "CKEN3,Clock enable of bitstream clock number 3" "0: SAI_CK3 clock disabled,1: SAI_CK3 clock enabled"
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bitfld.long 0x4 9. "CKEN2,Clock enable of bitstream clock number 2" "0: SAI_CK2 clock disabled,1: SAI_CK2 clock enabled"
bitfld.long 0x4 8. "CKEN1,Clock enable of bitstream clock number 1" "0: SAI_CK1 clock disabled,1: SAI_CK1 clock enabled"
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bitfld.long 0x4 4.--5. "MICNBR,Number of microphones" "0: Configuration with 2 microphones,1: Configuration with 4 microphones,2: Configuration with 6 microphones,3: Configuration with 8 microphones"
bitfld.long 0x4 0. "PDMEN,PDM enable" "0: PDM interface disabled,1: PDM interface enabled"
line.long 0x8 "SAI_PDMDLY,SAI PDM delay register"
bitfld.long 0x8 28.--30. "DLYM4R,Delay line for second microphone of pair 4" "0: No delay,1: Delay of 1 Tless thansub>SAI_CK less..,2: Delay of 2 Tless thansub>SAI_CK less..,?,?,?,?,7: Delay of 7 Tless thansub>SAI_CK less.."
bitfld.long 0x8 24.--26. "DLYM4L,Delay line for first microphone of pair 4" "0: No delay,1: Delay of 1 Tless thansub>SAI_CK less..,2: Delay of 2 Tless thansub>SAI_CK less..,?,?,?,?,7: Delay of 7 of Tless thansub>SAI_CK less.."
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bitfld.long 0x8 20.--22. "DLYM3R,Delay line for second microphone of pair 3" "0: No delay,1: Delay of 1 Tless thansub>SAI_CK less..,2: Delay of 2 Tless thansub>SAI_CK less..,?,?,?,?,7: Delay of 7 Tless thansub>SAI_CK less.."
bitfld.long 0x8 16.--18. "DLYM3L,Delay line for first microphone of pair 3" "0: No delay,1: Delay of 1 Tless thansub>SAI_CK less..,2: Delay of 2 Tless thansub>SAI_CK less..,?,?,?,?,7: Delay of 7 Tless thansub>SAI_CK less.."
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bitfld.long 0x8 12.--14. "DLYM2R,Delay line for second microphone of pair 2" "0: No delay,1: Delay of 1 Tless thansub>SAI_CK less..,2: Delay of 2 Tless thansub>SAI_CK less..,?,?,?,?,7: Delay of 7 Tless thansub>SAI_CK less.."
bitfld.long 0x8 8.--10. "DLYM2L,Delay line for first microphone of pair 2" "0: No delay,1: Delay of 1 Tless thansub>SAI_CK less..,2: Delay of 2 Tless thansub>SAI_CK less..,?,?,?,?,7: Delay of 7 Tless thansub>SAI_CK less.."
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bitfld.long 0x8 4.--6. "DLYM1R,Delay line adjust for second microphone of pair 1" "0: No delay,1: Delay of 1 Tless thansub>SAI_CK less..,2: Delay of 2 Tless thansub>SAI_CK less..,?,?,?,?,7: Delay of 7 Tless thansub>SAI_CK less.."
bitfld.long 0x8 0.--2. "DLYM1L,Delay line adjust for first microphone of pair 1" "0: No delay,1: Delay of 1 Tless thansub>SAI_CK less..,2: Delay of 2 Tless thansub>SAI_CK less..,?,?,?,?,7: Delay of 7 Tless thansub>SAI_CK less.."
tree.end
tree.end
tree "SDMMC (Secure Digital Input/Output and MultiMediaCards Interface)"
base ad:0x0
tree "SDMMC1"
base ad:0x420C8000
group.long 0x0++0xF
line.long 0x0 "SDMMC_POWER,SDMMC power control register"
bitfld.long 0x0 4. "DIRPOL,Data and command direction signals polarity selection" "0: Voltage transceiver I/Os driven as output when..,1: Voltage transceiver I/Os driven as output when.."
bitfld.long 0x0 3. "VSWITCHEN,Voltage switch procedure enable" "0: SDMMC_CK clock kept unchanged after successfully..,1: SDMMC_CK clock stopped after successfully.."
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bitfld.long 0x0 2. "VSWITCH,Voltage switch sequence start" "0: Voltage switch sequence not started and not..,1: Voltage switch sequence started or active."
bitfld.long 0x0 0.--1. "PWRCTRL,SDMMC state control bits" "0: After reset Reset: the SDMMC is disabled and the..,?,2: Power-cycle the SDMMC is disabled and the clock..,3: Power-on: the card is clocked The first 74.."
line.long 0x4 "SDMMC_CLKCR,SDMMC clock control register"
bitfld.long 0x4 20.--21. "SELCLKRx,Receive clock selection" "0: sdmmc_io_in_ck selected as receive clock,1: SDMMC_CKIN feedback clock selected as receive..,2: sdmmc_fb_ck tuned feedback clock selected as..,?"
bitfld.long 0x4 19. "BUSSPEED,Bus speed for selection of SDMMC operating modes" "0: DS HS SDR12 SDR25 Legacy compatible High speed..,1: SDR50 DDR50 SDR104 HS200 bus speed mode selected"
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bitfld.long 0x4 18. "DDR,Data rate signaling selection" "0: SDR Single data rate signaling,1: DDR double data rate signaling"
bitfld.long 0x4 17. "HWFC_EN,Hardware flow control enable" "0: Hardware flow control is disabled,1: Hardware flow control is enabled"
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bitfld.long 0x4 16. "NEGEDGE,SDMMC_CK dephasing selection bit for data and command" "0: When clock division >1 (CLKDIV > 0) and DDR = 0:,1: When clock division >1 (CLKDIV > 0) and DDR = 0:"
bitfld.long 0x4 14.--15. "WIDBUS,Wide bus mode enable bit" "0: Default 1-bit wide bus mode: SDMMC_D0 used (Does..,1: 4-bit wide bus mode: SDMMC_D[3:0] used,2: 8-bit wide bus mode: SDMMC_D[7:0] used,?"
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bitfld.long 0x4 12. "PWRSAV,Power saving configuration bit" "0: SDMMC_CK clock is always enabled,1: SDMMC_CK is only enabled when the bus is active"
hexmask.long.word 0x4 0.--9. 1. "CLKDIV,Clock divide factor"
line.long 0x8 "SDMMC_ARGR,SDMMC argument register"
hexmask.long 0x8 0.--31. 1. "CMDARG,Command argument"
line.long 0xC "SDMMC_CMDR,SDMMC command register"
bitfld.long 0xC 16. "CMDSUSPEND,The CPSM treats the command as a Suspend or Resume command and signals interrupt period start/end" "0,1"
bitfld.long 0xC 15. "BOOTEN,Enable boot mode procedure" "0: Boot mode procedure disabled,1: Boot mode procedure enabled"
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bitfld.long 0xC 14. "BOOTMODE,Select the boot mode procedure to be used" "0: Normal boot mode procedure selected,1: Alternative boot mode procedure selected"
bitfld.long 0xC 13. "DTHOLD,Hold new data block transmission and reception in the DPSM" "0,1"
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bitfld.long 0xC 12. "CPSMEN,Command path state machine (CPSM) enable bit" "0,1"
bitfld.long 0xC 11. "WAITPEND,CPSM waits for end of data transfer (CmdPend internal signal) from DPSM" "0,1"
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bitfld.long 0xC 10. "WAITINT,CPSM waits for interrupt request" "0,1"
bitfld.long 0xC 8.--9. "WAITRESP,Wait for response bits" "0: No response expect CMDSENT flag,1: Short response expect CMDREND or CCRCFAIL flag,2: Short response expect CMDREND flag (No CRC),3: Long response expect CMDREND or CCRCFAIL flag"
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bitfld.long 0xC 7. "CMDSTOP,The CPSM treats the command as a Stop Transmission command and signals abort to the DPSM" "0,1"
bitfld.long 0xC 6. "CMDTRANS,The CPSM treats the command as a data transfer command stops the interrupt period and signals DataEnable to the DPSM" "0,1"
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hexmask.long.byte 0xC 0.--5. 1. "CMDINDEx,Command index"
rgroup.long 0x10++0x13
line.long 0x0 "SDMMC_RESPCMDR,SDMMC command response register"
hexmask.long.byte 0x0 0.--5. 1. "RESPCMD,Response command index"
line.long 0x4 "SDMMC_RESP1R,SDMMC response 1 register"
hexmask.long 0x4 0.--31. 1. "CARDSTATUS,Card status according table below"
line.long 0x8 "SDMMC_RESP2R,SDMMC response 2 register"
hexmask.long 0x8 0.--31. 1. "CARDSTATUS,Card status according table below"
line.long 0xC "SDMMC_RESP3R,SDMMC response 3 register"
hexmask.long 0xC 0.--31. 1. "CARDSTATUS,Card status according table below"
line.long 0x10 "SDMMC_RESP4R,SDMMC response 4 register"
hexmask.long 0x10 0.--31. 1. "CARDSTATUS,Card status according table below"
group.long 0x24++0xB
line.long 0x0 "SDMMC_DTIMER,SDMMC data timer register"
hexmask.long 0x0 0.--31. 1. "DATATIME,Data and R1b busy timeout period"
line.long 0x4 "SDMMC_DLENR,SDMMC data length register"
hexmask.long 0x4 0.--24. 1. "DATALENGTH,Data length value"
line.long 0x8 "SDMMC_DCTRL,SDMMC data control register"
bitfld.long 0x8 13. "FIFORST,FIFO reset flushes any remaining data" "0: FIFO not affected.,1: Flush any remaining data and reset the FIFO.."
bitfld.long 0x8 12. "BOOTACKEN,Enable the reception of the boot acknowledgment" "0: Boot acknowledgment disabled not expected to be..,1: Boot acknowledgment enabled expected to be.."
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bitfld.long 0x8 11. "SDIOEN,SD I/O interrupt enable functions" "0,1"
bitfld.long 0x8 10. "RWMOD,Read Wait mode" "0: Read Wait control using SDMMC_D2,1: Read Wait control stopping SDMMC_CK"
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bitfld.long 0x8 9. "RWSTOP,Read Wait stop" "0: No Read Wait stop,1: Enable for Read Wait stop when DPSM is in the.."
bitfld.long 0x8 8. "RWSTART,Read Wait start" "0,1"
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hexmask.long.byte 0x8 4.--7. 1. "DBLOCKSIZE,Data block size"
bitfld.long 0x8 2.--3. "DTMODE,Data transfer mode selection" "0: Block data transfer ending on block count.,1: SDIO multibyte data transfer.,2: e MMC Stream data transfer.,3: Block data transfer ending with.."
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bitfld.long 0x8 1. "DTDIR,Data transfer direction selection" "0: From host to card.,1: From card to host."
bitfld.long 0x8 0. "DTEN,Data transfer enable bit" "0: Do not start data transfer without CPSM data..,1: Start data transfer without CPSM data transfer.."
rgroup.long 0x30++0x7
line.long 0x0 "SDMMC_DCNTR,SDMMC data counter register"
hexmask.long 0x0 0.--24. 1. "DATACOUNT,Data count value"
line.long 0x4 "SDMMC_STAR,SDMMC status register"
bitfld.long 0x4 28. "IDMABTC,IDMA buffer transfer complete" "0,1"
bitfld.long 0x4 27. "IDMATE,IDMA transfer error" "0,1"
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bitfld.long 0x4 26. "CKSTOP,SDMMC_CK stopped in Voltage switch procedure" "0,1"
bitfld.long 0x4 25. "VSWEND,Voltage switch critical timing section completion" "0,1"
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bitfld.long 0x4 24. "ACKTIMEOUT,Boot acknowledgment timeout" "0,1"
bitfld.long 0x4 23. "ACKFAIL,Boot acknowledgment received (boot acknowledgment check fail)" "0,1"
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bitfld.long 0x4 22. "SDIOIT,SDIO interrupt received" "0,1"
bitfld.long 0x4 21. "BUSYD0END,end of SDMMC_D0 Busy following a CMD response detected" "0: card SDMMC_D0 signal does NOT signal change from..,1: card SDMMC_D0 signal changed from busy to NOT.."
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bitfld.long 0x4 20. "BUSYD0,Inverted value of SDMMC_D0 line (Busy) sampled at the end of a CMD response and a second time 2 SDMMC_CK cycles after the CMD response" "0: card signals not busy on SDMMC_D0.,1: card signals busy on SDMMC_D0."
bitfld.long 0x4 19. "RxFIFOE,Receive FIFO empty" "0,1"
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bitfld.long 0x4 18. "TxFIFOE,Transmit FIFO empty" "0,1"
bitfld.long 0x4 17. "RxFIFOF,Receive FIFO full" "0,1"
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bitfld.long 0x4 16. "TxFIFOF,Transmit FIFO full" "0,1"
bitfld.long 0x4 15. "RxFIFOHF,Receive FIFO half full" "0,1"
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bitfld.long 0x4 14. "TxFIFOHE,Transmit FIFO half empty" "0,1"
bitfld.long 0x4 13. "CPSMACT,Command path state machine active (not in Idle state)" "0,1"
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bitfld.long 0x4 12. "DPSMACT,Data path state machine active (not in Idle state)" "0,1"
bitfld.long 0x4 11. "DABORT,Data transfer aborted by CMD12" "0,1"
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bitfld.long 0x4 10. "DBCKEND,Data block sent/received" "0,1"
bitfld.long 0x4 9. "DHOLD,Data transfer Hold" "0,1"
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bitfld.long 0x4 8. "DATAEND,Data transfer ended correctly" "0,1"
bitfld.long 0x4 7. "CMDSENT,Command sent (no response required)" "0,1"
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bitfld.long 0x4 6. "CMDREND,Command response received (CRC check passed or no CRC)" "0,1"
bitfld.long 0x4 5. "RxOVERR,Received FIFO overrun error (masked by hardware when IDMA is enabled)" "0,1"
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bitfld.long 0x4 4. "TxUNDERR,Transmit FIFO underrun error (masked by hardware when IDMA is enabled)" "0,1"
bitfld.long 0x4 3. "DTIMEOUT,Data timeout" "0,1"
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bitfld.long 0x4 2. "CTIMEOUT,Command response timeout" "0,1"
bitfld.long 0x4 1. "DCRCFAIL,Data block sent/received (CRC check failed)" "0,1"
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bitfld.long 0x4 0. "CCRCFAIL,Command response received (CRC check failed)" "0,1"
group.long 0x38++0xB
line.long 0x0 "SDMMC_ICR,SDMMC interrupt clear register"
bitfld.long 0x0 28. "IDMABTCC,IDMA buffer transfer complete clear bit" "0: IDMABTC not cleared,1: IDMABTC cleared"
bitfld.long 0x0 27. "IDMATEC,IDMA transfer error clear bit" "0: IDMATE not cleared,1: IDMATE cleared"
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bitfld.long 0x0 26. "CKSTOPC,CKSTOP flag clear bit" "0: CKSTOP not cleared,1: CKSTOP cleared"
bitfld.long 0x0 25. "VSWENDC,VSWEND flag clear bit" "0: VSWEND not cleared,1: VSWEND cleared"
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bitfld.long 0x0 24. "ACKTIMEOUTC,ACKTIMEOUT flag clear bit" "0: ACKTIMEOUT not cleared,1: ACKTIMEOUT cleared"
bitfld.long 0x0 23. "ACKFAILC,ACKFAIL flag clear bit" "0: ACKFAIL not cleared,1: ACKFAIL cleared"
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bitfld.long 0x0 22. "SDIOITC,SDIOIT flag clear bit" "0: SDIOIT not cleared,1: SDIOIT cleared"
bitfld.long 0x0 21. "BUSYD0ENDC,BUSYD0END flag clear bit" "0: BUSYD0END not cleared,1: BUSYD0END cleared"
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bitfld.long 0x0 11. "DABORTC,DABORT flag clear bit" "0: DABORT not cleared,1: DABORT cleared"
bitfld.long 0x0 10. "DBCKENDC,DBCKEND flag clear bit" "0: DBCKEND not cleared,1: DBCKEND cleared"
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bitfld.long 0x0 9. "DHOLDC,DHOLD flag clear bit" "0: DHOLD not cleared,1: DHOLD cleared"
bitfld.long 0x0 8. "DATAENDC,DATAEND flag clear bit" "0: DATAEND not cleared,1: DATAEND cleared"
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bitfld.long 0x0 7. "CMDSENTC,CMDSENT flag clear bit" "0: CMDSENT not cleared,1: CMDSENT cleared"
bitfld.long 0x0 6. "CMDRENDC,CMDREND flag clear bit" "0: CMDREND not cleared,1: CMDREND cleared"
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bitfld.long 0x0 5. "RxOVERRC,RxOVERR flag clear bit" "0: RxOVERR not cleared,1: RxOVERR cleared"
bitfld.long 0x0 4. "TxUNDERRC,TxUNDERR flag clear bit" "0: TxUNDERR not cleared,1: TxUNDERR cleared"
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bitfld.long 0x0 3. "DTIMEOUTC,DTIMEOUT flag clear bit" "0: DTIMEOUT not cleared,1: DTIMEOUT cleared"
bitfld.long 0x0 2. "CTIMEOUTC,CTIMEOUT flag clear bit" "0: CTIMEOUT not cleared,1: CTIMEOUT cleared"
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bitfld.long 0x0 1. "DCRCFAILC,DCRCFAIL flag clear bit" "0: DCRCFAIL not cleared,1: DCRCFAIL cleared"
bitfld.long 0x0 0. "CCRCFAILC,CCRCFAIL flag clear bit" "0: CCRCFAIL not cleared,1: CCRCFAIL cleared"
line.long 0x4 "SDMMC_MASKR,SDMMC mask register"
bitfld.long 0x4 28. "IDMABTCIE,IDMA buffer transfer complete interrupt enable" "0: IDMA buffer transfer complete interrupt disabled,1: IDMA buffer transfer complete interrupt enabled"
bitfld.long 0x4 26. "CKSTOPIE,Voltage switch clock stopped interrupt enable" "0: Voltage switch clock stopped interrupt disabled,1: Voltage switch clock stopped interrupt enabled"
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bitfld.long 0x4 25. "VSWENDIE,Voltage switch critical timing section completion interrupt enable" "0: Voltage switch critical timing section..,1: Voltage switch critical timing section.."
bitfld.long 0x4 24. "ACKTIMEOUTIE,Acknowledgment timeout interrupt enable" "0: Acknowledgment timeout interrupt disabled,1: Acknowledgment timeout interrupt enabled"
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bitfld.long 0x4 23. "ACKFAILIE,Acknowledgment fail interrupt enable" "0: Acknowledgment fail interrupt disabled,1: Acknowledgment fail interrupt enabled"
bitfld.long 0x4 22. "SDIOITIE,SDIO mode interrupt received interrupt enable" "0: SDIO mode interrupt received interrupt disabled,1: SDIO mode interrupt received interrupt enabled"
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bitfld.long 0x4 21. "BUSYD0ENDIE,BUSYD0END interrupt enable" "0: BUSYD0END interrupt disabled,1: BUSYD0END interrupt enabled"
bitfld.long 0x4 18. "TxFIFOEIE,Tx FIFO empty interrupt enable" "0: Tx FIFO empty interrupt disabled,1: Tx FIFO empty interrupt enabled"
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bitfld.long 0x4 17. "RxFIFOFIE,Rx FIFO full interrupt enable" "0: Rx FIFO full interrupt disabled,1: Rx FIFO full interrupt enabled"
bitfld.long 0x4 15. "RxFIFOHFIE,Rx FIFO half full interrupt enable" "0: Rx FIFO half full interrupt disabled,1: Rx FIFO half full interrupt enabled"
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bitfld.long 0x4 14. "TxFIFOHEIE,Tx FIFO half empty interrupt enable" "0: Tx FIFO half empty interrupt disabled,1: Tx FIFO half empty interrupt enabled"
bitfld.long 0x4 11. "DABORTIE,Data transfer aborted interrupt enable" "0: Data transfer abort interrupt disabled,1: Data transfer abort interrupt enabled"
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bitfld.long 0x4 10. "DBCKENDIE,Data block end interrupt enable" "0: Data block end interrupt disabled,1: Data block end interrupt enabled"
bitfld.long 0x4 9. "DHOLDIE,Data hold interrupt enable" "0: Data hold interrupt disabled,1: Data hold interrupt enabled"
newline
bitfld.long 0x4 8. "DATAENDIE,Data end interrupt enable" "0: Data end interrupt disabled,1: Data end interrupt enabled"
bitfld.long 0x4 7. "CMDSENTIE,Command sent interrupt enable" "0: Command sent interrupt disabled,1: Command sent interrupt enabled"
newline
bitfld.long 0x4 6. "CMDRENDIE,Command response received interrupt enable" "0: Command response received interrupt disabled,1: command Response received interrupt enabled"
bitfld.long 0x4 5. "RxOVERRIE,Rx FIFO overrun error interrupt enable" "0: Rx FIFO overrun error interrupt disabled,1: Rx FIFO overrun error interrupt enabled"
newline
bitfld.long 0x4 4. "TxUNDERRIE,Tx FIFO underrun error interrupt enable" "0: Tx FIFO underrun error interrupt disabled,1: Tx FIFO underrun error interrupt enabled"
bitfld.long 0x4 3. "DTIMEOUTIE,Data timeout interrupt enable" "0: Data timeout interrupt disabled,1: Data timeout interrupt enabled"
newline
bitfld.long 0x4 2. "CTIMEOUTIE,Command timeout interrupt enable" "0: Command timeout interrupt disabled,1: Command timeout interrupt enabled"
bitfld.long 0x4 1. "DCRCFAILIE,Data CRC fail interrupt enable" "0: Data CRC fail interrupt disabled,1: Data CRC fail interrupt enabled"
newline
bitfld.long 0x4 0. "CCRCFAILIE,Command CRC fail interrupt enable" "0: Command CRC fail interrupt disabled,1: Command CRC fail interrupt enabled"
line.long 0x8 "SDMMC_ACKTIMER,SDMMC acknowledgment timer register"
hexmask.long 0x8 0.--24. 1. "ACKTIME,Boot acknowledgment timeout period"
group.long 0x50++0xB
line.long 0x0 "SDMMC_IDMACTRLR,SDMMC DMA control register"
bitfld.long 0x0 1. "IDMABMODE,Buffer mode selection" "0: Single buffer mode.,1: Linked list mode."
bitfld.long 0x0 0. "IDMAEN,IDMA enable" "0: IDMA disabled,1: IDMA enabled"
line.long 0x4 "SDMMC_IDMABSIZER,SDMMC IDMA buffer size register"
hexmask.long.word 0x4 5.--16. 1. "IDMABNDT,Number of bytes per buffer"
line.long 0x8 "SDMMC_IDMABASER,SDMMC IDMA buffer base address register"
hexmask.long 0x8 0.--31. 1. "IDMABASE,Buffer memory base address bits [31:2] must be word aligned (bit [1:0] are always 0 and read only)"
group.long 0x64++0x7
line.long 0x0 "SDMMC_IDMALAR,SDMMC IDMA linked list address register"
bitfld.long 0x0 31. "ULA,Update SDMMC_IDMALAR from linked list when in linked list mode (SDMMC_IDMACTRLR." "0: SDMMC_IDMALAR is not to be updated last linked..,1: SDMMC_IDMALAR is to be updated from linked list.."
bitfld.long 0x0 30. "ULS,Update SDMMC_IDMABSIZE from the next linked list when in linked list mode (SDMMC_IDMACTRLR." "0: SDMMC_IDMABSIZER is not to be updated from next..,1: SDMMC_IDMABSIZER is to be updated from next.."
newline
bitfld.long 0x0 29. "ABR,Acknowledge linked list buffer ready" "0: Loaded linked list buffer is not ready (this..,1: Loaded linked list buffer ready acknowledge."
hexmask.long.word 0x0 2.--15. 1. "IDMALA,Word aligned linked list item address offset"
line.long 0x4 "SDMMC_IDMABAR,SDMMC IDMA linked list memory base register"
hexmask.long 0x4 2.--31. 1. "IDMABA,Word aligned Linked list memory base address"
group.long 0x80++0x3F
line.long 0x0 "SDMMC_FIFOR0,SDMMC data FIFO registers 0"
hexmask.long 0x0 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x4 "SDMMC_FIFOR1,SDMMC data FIFO registers 1"
hexmask.long 0x4 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x8 "SDMMC_FIFOR2,SDMMC data FIFO registers 2"
hexmask.long 0x8 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0xC "SDMMC_FIFOR3,SDMMC data FIFO registers 3"
hexmask.long 0xC 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x10 "SDMMC_FIFOR4,SDMMC data FIFO registers 4"
hexmask.long 0x10 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x14 "SDMMC_FIFOR5,SDMMC data FIFO registers 5"
hexmask.long 0x14 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x18 "SDMMC_FIFOR6,SDMMC data FIFO registers 6"
hexmask.long 0x18 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x1C "SDMMC_FIFOR7,SDMMC data FIFO registers 7"
hexmask.long 0x1C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x20 "SDMMC_FIFOR8,SDMMC data FIFO registers 8"
hexmask.long 0x20 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x24 "SDMMC_FIFOR9,SDMMC data FIFO registers 9"
hexmask.long 0x24 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x28 "SDMMC_FIFOR10,SDMMC data FIFO registers 10"
hexmask.long 0x28 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x2C "SDMMC_FIFOR11,SDMMC data FIFO registers 11"
hexmask.long 0x2C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x30 "SDMMC_FIFOR12,SDMMC data FIFO registers 12"
hexmask.long 0x30 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x34 "SDMMC_FIFOR13,SDMMC data FIFO registers 13"
hexmask.long 0x34 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x38 "SDMMC_FIFOR14,SDMMC data FIFO registers 14"
hexmask.long 0x38 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x3C "SDMMC_FIFOR15,SDMMC data FIFO registers 15"
hexmask.long 0x3C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
tree.end
tree "SEC_SDMMC1"
base ad:0x520C8000
group.long 0x0++0xF
line.long 0x0 "SDMMC_POWER,SDMMC power control register"
bitfld.long 0x0 4. "DIRPOL,Data and command direction signals polarity selection" "0: Voltage transceiver I/Os driven as output when..,1: Voltage transceiver I/Os driven as output when.."
bitfld.long 0x0 3. "VSWITCHEN,Voltage switch procedure enable" "0: SDMMC_CK clock kept unchanged after successfully..,1: SDMMC_CK clock stopped after successfully.."
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bitfld.long 0x0 2. "VSWITCH,Voltage switch sequence start" "0: Voltage switch sequence not started and not..,1: Voltage switch sequence started or active."
bitfld.long 0x0 0.--1. "PWRCTRL,SDMMC state control bits" "0: After reset Reset: the SDMMC is disabled and the..,?,2: Power-cycle the SDMMC is disabled and the clock..,3: Power-on: the card is clocked The first 74.."
line.long 0x4 "SDMMC_CLKCR,SDMMC clock control register"
bitfld.long 0x4 20.--21. "SELCLKRx,Receive clock selection" "0: sdmmc_io_in_ck selected as receive clock,1: SDMMC_CKIN feedback clock selected as receive..,2: sdmmc_fb_ck tuned feedback clock selected as..,?"
bitfld.long 0x4 19. "BUSSPEED,Bus speed for selection of SDMMC operating modes" "0: DS HS SDR12 SDR25 Legacy compatible High speed..,1: SDR50 DDR50 SDR104 HS200 bus speed mode selected"
newline
bitfld.long 0x4 18. "DDR,Data rate signaling selection" "0: SDR Single data rate signaling,1: DDR double data rate signaling"
bitfld.long 0x4 17. "HWFC_EN,Hardware flow control enable" "0: Hardware flow control is disabled,1: Hardware flow control is enabled"
newline
bitfld.long 0x4 16. "NEGEDGE,SDMMC_CK dephasing selection bit for data and command" "0: When clock division >1 (CLKDIV > 0) and DDR = 0:,1: When clock division >1 (CLKDIV > 0) and DDR = 0:"
bitfld.long 0x4 14.--15. "WIDBUS,Wide bus mode enable bit" "0: Default 1-bit wide bus mode: SDMMC_D0 used (Does..,1: 4-bit wide bus mode: SDMMC_D[3:0] used,2: 8-bit wide bus mode: SDMMC_D[7:0] used,?"
newline
bitfld.long 0x4 12. "PWRSAV,Power saving configuration bit" "0: SDMMC_CK clock is always enabled,1: SDMMC_CK is only enabled when the bus is active"
hexmask.long.word 0x4 0.--9. 1. "CLKDIV,Clock divide factor"
line.long 0x8 "SDMMC_ARGR,SDMMC argument register"
hexmask.long 0x8 0.--31. 1. "CMDARG,Command argument"
line.long 0xC "SDMMC_CMDR,SDMMC command register"
bitfld.long 0xC 16. "CMDSUSPEND,The CPSM treats the command as a Suspend or Resume command and signals interrupt period start/end" "0,1"
bitfld.long 0xC 15. "BOOTEN,Enable boot mode procedure" "0: Boot mode procedure disabled,1: Boot mode procedure enabled"
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bitfld.long 0xC 14. "BOOTMODE,Select the boot mode procedure to be used" "0: Normal boot mode procedure selected,1: Alternative boot mode procedure selected"
bitfld.long 0xC 13. "DTHOLD,Hold new data block transmission and reception in the DPSM" "0,1"
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bitfld.long 0xC 12. "CPSMEN,Command path state machine (CPSM) enable bit" "0,1"
bitfld.long 0xC 11. "WAITPEND,CPSM waits for end of data transfer (CmdPend internal signal) from DPSM" "0,1"
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bitfld.long 0xC 10. "WAITINT,CPSM waits for interrupt request" "0,1"
bitfld.long 0xC 8.--9. "WAITRESP,Wait for response bits" "0: No response expect CMDSENT flag,1: Short response expect CMDREND or CCRCFAIL flag,2: Short response expect CMDREND flag (No CRC),3: Long response expect CMDREND or CCRCFAIL flag"
newline
bitfld.long 0xC 7. "CMDSTOP,The CPSM treats the command as a Stop Transmission command and signals abort to the DPSM" "0,1"
bitfld.long 0xC 6. "CMDTRANS,The CPSM treats the command as a data transfer command stops the interrupt period and signals DataEnable to the DPSM" "0,1"
newline
hexmask.long.byte 0xC 0.--5. 1. "CMDINDEx,Command index"
rgroup.long 0x10++0x13
line.long 0x0 "SDMMC_RESPCMDR,SDMMC command response register"
hexmask.long.byte 0x0 0.--5. 1. "RESPCMD,Response command index"
line.long 0x4 "SDMMC_RESP1R,SDMMC response 1 register"
hexmask.long 0x4 0.--31. 1. "CARDSTATUS,Card status according table below"
line.long 0x8 "SDMMC_RESP2R,SDMMC response 2 register"
hexmask.long 0x8 0.--31. 1. "CARDSTATUS,Card status according table below"
line.long 0xC "SDMMC_RESP3R,SDMMC response 3 register"
hexmask.long 0xC 0.--31. 1. "CARDSTATUS,Card status according table below"
line.long 0x10 "SDMMC_RESP4R,SDMMC response 4 register"
hexmask.long 0x10 0.--31. 1. "CARDSTATUS,Card status according table below"
group.long 0x24++0xB
line.long 0x0 "SDMMC_DTIMER,SDMMC data timer register"
hexmask.long 0x0 0.--31. 1. "DATATIME,Data and R1b busy timeout period"
line.long 0x4 "SDMMC_DLENR,SDMMC data length register"
hexmask.long 0x4 0.--24. 1. "DATALENGTH,Data length value"
line.long 0x8 "SDMMC_DCTRL,SDMMC data control register"
bitfld.long 0x8 13. "FIFORST,FIFO reset flushes any remaining data" "0: FIFO not affected.,1: Flush any remaining data and reset the FIFO.."
bitfld.long 0x8 12. "BOOTACKEN,Enable the reception of the boot acknowledgment" "0: Boot acknowledgment disabled not expected to be..,1: Boot acknowledgment enabled expected to be.."
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bitfld.long 0x8 11. "SDIOEN,SD I/O interrupt enable functions" "0,1"
bitfld.long 0x8 10. "RWMOD,Read Wait mode" "0: Read Wait control using SDMMC_D2,1: Read Wait control stopping SDMMC_CK"
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bitfld.long 0x8 9. "RWSTOP,Read Wait stop" "0: No Read Wait stop,1: Enable for Read Wait stop when DPSM is in the.."
bitfld.long 0x8 8. "RWSTART,Read Wait start" "0,1"
newline
hexmask.long.byte 0x8 4.--7. 1. "DBLOCKSIZE,Data block size"
bitfld.long 0x8 2.--3. "DTMODE,Data transfer mode selection" "0: Block data transfer ending on block count.,1: SDIO multibyte data transfer.,2: e MMC Stream data transfer.,3: Block data transfer ending with.."
newline
bitfld.long 0x8 1. "DTDIR,Data transfer direction selection" "0: From host to card.,1: From card to host."
bitfld.long 0x8 0. "DTEN,Data transfer enable bit" "0: Do not start data transfer without CPSM data..,1: Start data transfer without CPSM data transfer.."
rgroup.long 0x30++0x7
line.long 0x0 "SDMMC_DCNTR,SDMMC data counter register"
hexmask.long 0x0 0.--24. 1. "DATACOUNT,Data count value"
line.long 0x4 "SDMMC_STAR,SDMMC status register"
bitfld.long 0x4 28. "IDMABTC,IDMA buffer transfer complete" "0,1"
bitfld.long 0x4 27. "IDMATE,IDMA transfer error" "0,1"
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bitfld.long 0x4 26. "CKSTOP,SDMMC_CK stopped in Voltage switch procedure" "0,1"
bitfld.long 0x4 25. "VSWEND,Voltage switch critical timing section completion" "0,1"
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bitfld.long 0x4 24. "ACKTIMEOUT,Boot acknowledgment timeout" "0,1"
bitfld.long 0x4 23. "ACKFAIL,Boot acknowledgment received (boot acknowledgment check fail)" "0,1"
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bitfld.long 0x4 22. "SDIOIT,SDIO interrupt received" "0,1"
bitfld.long 0x4 21. "BUSYD0END,end of SDMMC_D0 Busy following a CMD response detected" "0: card SDMMC_D0 signal does NOT signal change from..,1: card SDMMC_D0 signal changed from busy to NOT.."
newline
bitfld.long 0x4 20. "BUSYD0,Inverted value of SDMMC_D0 line (Busy) sampled at the end of a CMD response and a second time 2 SDMMC_CK cycles after the CMD response" "0: card signals not busy on SDMMC_D0.,1: card signals busy on SDMMC_D0."
bitfld.long 0x4 19. "RxFIFOE,Receive FIFO empty" "0,1"
newline
bitfld.long 0x4 18. "TxFIFOE,Transmit FIFO empty" "0,1"
bitfld.long 0x4 17. "RxFIFOF,Receive FIFO full" "0,1"
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bitfld.long 0x4 16. "TxFIFOF,Transmit FIFO full" "0,1"
bitfld.long 0x4 15. "RxFIFOHF,Receive FIFO half full" "0,1"
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bitfld.long 0x4 14. "TxFIFOHE,Transmit FIFO half empty" "0,1"
bitfld.long 0x4 13. "CPSMACT,Command path state machine active (not in Idle state)" "0,1"
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bitfld.long 0x4 12. "DPSMACT,Data path state machine active (not in Idle state)" "0,1"
bitfld.long 0x4 11. "DABORT,Data transfer aborted by CMD12" "0,1"
newline
bitfld.long 0x4 10. "DBCKEND,Data block sent/received" "0,1"
bitfld.long 0x4 9. "DHOLD,Data transfer Hold" "0,1"
newline
bitfld.long 0x4 8. "DATAEND,Data transfer ended correctly" "0,1"
bitfld.long 0x4 7. "CMDSENT,Command sent (no response required)" "0,1"
newline
bitfld.long 0x4 6. "CMDREND,Command response received (CRC check passed or no CRC)" "0,1"
bitfld.long 0x4 5. "RxOVERR,Received FIFO overrun error (masked by hardware when IDMA is enabled)" "0,1"
newline
bitfld.long 0x4 4. "TxUNDERR,Transmit FIFO underrun error (masked by hardware when IDMA is enabled)" "0,1"
bitfld.long 0x4 3. "DTIMEOUT,Data timeout" "0,1"
newline
bitfld.long 0x4 2. "CTIMEOUT,Command response timeout" "0,1"
bitfld.long 0x4 1. "DCRCFAIL,Data block sent/received (CRC check failed)" "0,1"
newline
bitfld.long 0x4 0. "CCRCFAIL,Command response received (CRC check failed)" "0,1"
group.long 0x38++0xB
line.long 0x0 "SDMMC_ICR,SDMMC interrupt clear register"
bitfld.long 0x0 28. "IDMABTCC,IDMA buffer transfer complete clear bit" "0: IDMABTC not cleared,1: IDMABTC cleared"
bitfld.long 0x0 27. "IDMATEC,IDMA transfer error clear bit" "0: IDMATE not cleared,1: IDMATE cleared"
newline
bitfld.long 0x0 26. "CKSTOPC,CKSTOP flag clear bit" "0: CKSTOP not cleared,1: CKSTOP cleared"
bitfld.long 0x0 25. "VSWENDC,VSWEND flag clear bit" "0: VSWEND not cleared,1: VSWEND cleared"
newline
bitfld.long 0x0 24. "ACKTIMEOUTC,ACKTIMEOUT flag clear bit" "0: ACKTIMEOUT not cleared,1: ACKTIMEOUT cleared"
bitfld.long 0x0 23. "ACKFAILC,ACKFAIL flag clear bit" "0: ACKFAIL not cleared,1: ACKFAIL cleared"
newline
bitfld.long 0x0 22. "SDIOITC,SDIOIT flag clear bit" "0: SDIOIT not cleared,1: SDIOIT cleared"
bitfld.long 0x0 21. "BUSYD0ENDC,BUSYD0END flag clear bit" "0: BUSYD0END not cleared,1: BUSYD0END cleared"
newline
bitfld.long 0x0 11. "DABORTC,DABORT flag clear bit" "0: DABORT not cleared,1: DABORT cleared"
bitfld.long 0x0 10. "DBCKENDC,DBCKEND flag clear bit" "0: DBCKEND not cleared,1: DBCKEND cleared"
newline
bitfld.long 0x0 9. "DHOLDC,DHOLD flag clear bit" "0: DHOLD not cleared,1: DHOLD cleared"
bitfld.long 0x0 8. "DATAENDC,DATAEND flag clear bit" "0: DATAEND not cleared,1: DATAEND cleared"
newline
bitfld.long 0x0 7. "CMDSENTC,CMDSENT flag clear bit" "0: CMDSENT not cleared,1: CMDSENT cleared"
bitfld.long 0x0 6. "CMDRENDC,CMDREND flag clear bit" "0: CMDREND not cleared,1: CMDREND cleared"
newline
bitfld.long 0x0 5. "RxOVERRC,RxOVERR flag clear bit" "0: RxOVERR not cleared,1: RxOVERR cleared"
bitfld.long 0x0 4. "TxUNDERRC,TxUNDERR flag clear bit" "0: TxUNDERR not cleared,1: TxUNDERR cleared"
newline
bitfld.long 0x0 3. "DTIMEOUTC,DTIMEOUT flag clear bit" "0: DTIMEOUT not cleared,1: DTIMEOUT cleared"
bitfld.long 0x0 2. "CTIMEOUTC,CTIMEOUT flag clear bit" "0: CTIMEOUT not cleared,1: CTIMEOUT cleared"
newline
bitfld.long 0x0 1. "DCRCFAILC,DCRCFAIL flag clear bit" "0: DCRCFAIL not cleared,1: DCRCFAIL cleared"
bitfld.long 0x0 0. "CCRCFAILC,CCRCFAIL flag clear bit" "0: CCRCFAIL not cleared,1: CCRCFAIL cleared"
line.long 0x4 "SDMMC_MASKR,SDMMC mask register"
bitfld.long 0x4 28. "IDMABTCIE,IDMA buffer transfer complete interrupt enable" "0: IDMA buffer transfer complete interrupt disabled,1: IDMA buffer transfer complete interrupt enabled"
bitfld.long 0x4 26. "CKSTOPIE,Voltage switch clock stopped interrupt enable" "0: Voltage switch clock stopped interrupt disabled,1: Voltage switch clock stopped interrupt enabled"
newline
bitfld.long 0x4 25. "VSWENDIE,Voltage switch critical timing section completion interrupt enable" "0: Voltage switch critical timing section..,1: Voltage switch critical timing section.."
bitfld.long 0x4 24. "ACKTIMEOUTIE,Acknowledgment timeout interrupt enable" "0: Acknowledgment timeout interrupt disabled,1: Acknowledgment timeout interrupt enabled"
newline
bitfld.long 0x4 23. "ACKFAILIE,Acknowledgment fail interrupt enable" "0: Acknowledgment fail interrupt disabled,1: Acknowledgment fail interrupt enabled"
bitfld.long 0x4 22. "SDIOITIE,SDIO mode interrupt received interrupt enable" "0: SDIO mode interrupt received interrupt disabled,1: SDIO mode interrupt received interrupt enabled"
newline
bitfld.long 0x4 21. "BUSYD0ENDIE,BUSYD0END interrupt enable" "0: BUSYD0END interrupt disabled,1: BUSYD0END interrupt enabled"
bitfld.long 0x4 18. "TxFIFOEIE,Tx FIFO empty interrupt enable" "0: Tx FIFO empty interrupt disabled,1: Tx FIFO empty interrupt enabled"
newline
bitfld.long 0x4 17. "RxFIFOFIE,Rx FIFO full interrupt enable" "0: Rx FIFO full interrupt disabled,1: Rx FIFO full interrupt enabled"
bitfld.long 0x4 15. "RxFIFOHFIE,Rx FIFO half full interrupt enable" "0: Rx FIFO half full interrupt disabled,1: Rx FIFO half full interrupt enabled"
newline
bitfld.long 0x4 14. "TxFIFOHEIE,Tx FIFO half empty interrupt enable" "0: Tx FIFO half empty interrupt disabled,1: Tx FIFO half empty interrupt enabled"
bitfld.long 0x4 11. "DABORTIE,Data transfer aborted interrupt enable" "0: Data transfer abort interrupt disabled,1: Data transfer abort interrupt enabled"
newline
bitfld.long 0x4 10. "DBCKENDIE,Data block end interrupt enable" "0: Data block end interrupt disabled,1: Data block end interrupt enabled"
bitfld.long 0x4 9. "DHOLDIE,Data hold interrupt enable" "0: Data hold interrupt disabled,1: Data hold interrupt enabled"
newline
bitfld.long 0x4 8. "DATAENDIE,Data end interrupt enable" "0: Data end interrupt disabled,1: Data end interrupt enabled"
bitfld.long 0x4 7. "CMDSENTIE,Command sent interrupt enable" "0: Command sent interrupt disabled,1: Command sent interrupt enabled"
newline
bitfld.long 0x4 6. "CMDRENDIE,Command response received interrupt enable" "0: Command response received interrupt disabled,1: command Response received interrupt enabled"
bitfld.long 0x4 5. "RxOVERRIE,Rx FIFO overrun error interrupt enable" "0: Rx FIFO overrun error interrupt disabled,1: Rx FIFO overrun error interrupt enabled"
newline
bitfld.long 0x4 4. "TxUNDERRIE,Tx FIFO underrun error interrupt enable" "0: Tx FIFO underrun error interrupt disabled,1: Tx FIFO underrun error interrupt enabled"
bitfld.long 0x4 3. "DTIMEOUTIE,Data timeout interrupt enable" "0: Data timeout interrupt disabled,1: Data timeout interrupt enabled"
newline
bitfld.long 0x4 2. "CTIMEOUTIE,Command timeout interrupt enable" "0: Command timeout interrupt disabled,1: Command timeout interrupt enabled"
bitfld.long 0x4 1. "DCRCFAILIE,Data CRC fail interrupt enable" "0: Data CRC fail interrupt disabled,1: Data CRC fail interrupt enabled"
newline
bitfld.long 0x4 0. "CCRCFAILIE,Command CRC fail interrupt enable" "0: Command CRC fail interrupt disabled,1: Command CRC fail interrupt enabled"
line.long 0x8 "SDMMC_ACKTIMER,SDMMC acknowledgment timer register"
hexmask.long 0x8 0.--24. 1. "ACKTIME,Boot acknowledgment timeout period"
group.long 0x50++0xB
line.long 0x0 "SDMMC_IDMACTRLR,SDMMC DMA control register"
bitfld.long 0x0 1. "IDMABMODE,Buffer mode selection" "0: Single buffer mode.,1: Linked list mode."
bitfld.long 0x0 0. "IDMAEN,IDMA enable" "0: IDMA disabled,1: IDMA enabled"
line.long 0x4 "SDMMC_IDMABSIZER,SDMMC IDMA buffer size register"
hexmask.long.word 0x4 5.--16. 1. "IDMABNDT,Number of bytes per buffer"
line.long 0x8 "SDMMC_IDMABASER,SDMMC IDMA buffer base address register"
hexmask.long 0x8 0.--31. 1. "IDMABASE,Buffer memory base address bits [31:2] must be word aligned (bit [1:0] are always 0 and read only)"
group.long 0x64++0x7
line.long 0x0 "SDMMC_IDMALAR,SDMMC IDMA linked list address register"
bitfld.long 0x0 31. "ULA,Update SDMMC_IDMALAR from linked list when in linked list mode (SDMMC_IDMACTRLR." "0: SDMMC_IDMALAR is not to be updated last linked..,1: SDMMC_IDMALAR is to be updated from linked list.."
bitfld.long 0x0 30. "ULS,Update SDMMC_IDMABSIZE from the next linked list when in linked list mode (SDMMC_IDMACTRLR." "0: SDMMC_IDMABSIZER is not to be updated from next..,1: SDMMC_IDMABSIZER is to be updated from next.."
newline
bitfld.long 0x0 29. "ABR,Acknowledge linked list buffer ready" "0: Loaded linked list buffer is not ready (this..,1: Loaded linked list buffer ready acknowledge."
hexmask.long.word 0x0 2.--15. 1. "IDMALA,Word aligned linked list item address offset"
line.long 0x4 "SDMMC_IDMABAR,SDMMC IDMA linked list memory base register"
hexmask.long 0x4 2.--31. 1. "IDMABA,Word aligned Linked list memory base address"
group.long 0x80++0x3F
line.long 0x0 "SDMMC_FIFOR0,SDMMC data FIFO registers 0"
hexmask.long 0x0 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x4 "SDMMC_FIFOR1,SDMMC data FIFO registers 1"
hexmask.long 0x4 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x8 "SDMMC_FIFOR2,SDMMC data FIFO registers 2"
hexmask.long 0x8 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0xC "SDMMC_FIFOR3,SDMMC data FIFO registers 3"
hexmask.long 0xC 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x10 "SDMMC_FIFOR4,SDMMC data FIFO registers 4"
hexmask.long 0x10 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x14 "SDMMC_FIFOR5,SDMMC data FIFO registers 5"
hexmask.long 0x14 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x18 "SDMMC_FIFOR6,SDMMC data FIFO registers 6"
hexmask.long 0x18 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x1C "SDMMC_FIFOR7,SDMMC data FIFO registers 7"
hexmask.long 0x1C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x20 "SDMMC_FIFOR8,SDMMC data FIFO registers 8"
hexmask.long 0x20 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x24 "SDMMC_FIFOR9,SDMMC data FIFO registers 9"
hexmask.long 0x24 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x28 "SDMMC_FIFOR10,SDMMC data FIFO registers 10"
hexmask.long 0x28 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x2C "SDMMC_FIFOR11,SDMMC data FIFO registers 11"
hexmask.long 0x2C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x30 "SDMMC_FIFOR12,SDMMC data FIFO registers 12"
hexmask.long 0x30 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x34 "SDMMC_FIFOR13,SDMMC data FIFO registers 13"
hexmask.long 0x34 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x38 "SDMMC_FIFOR14,SDMMC data FIFO registers 14"
hexmask.long 0x38 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
line.long 0x3C "SDMMC_FIFOR15,SDMMC data FIFO registers 15"
hexmask.long 0x3C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
tree.end
tree.end
tree "SPI (Serial Peripheral Interface)"
base ad:0x0
tree "SPI1"
base ad:0x40013000
group.long 0x0++0x13
line.long 0x0 "SPI_CR1,SPI control register 1"
bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "0: AF configuration is not locked,1: AF configuration is locked"
bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "0: all zero pattern is applied,1: all ones pattern is applied"
newline
bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "0: All zero pattern is applied,1: All ones pattern is applied"
bitfld.long 0x0 13. "CRC33_17,Full size (33-bit or 17-bit) CRC polynomial configuration" "0: Full size (33-bit or 17-bit) CRC polynomial is..,1: Full size (33-bit or 17-bit) CRC polynomial is.."
newline
bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1"
bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "0: SPI is receiver,1: SPI is transmitter"
newline
bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1"
bitfld.long 0x0 9. "CSTART,master transfer start" "0: master transfer is at idle,1: master transfer is ongoing or temporary.."
newline
bitfld.long 0x0 8. "MASRx,master automatic suspension in Receive mode" "0: SPI flow/clock generation is continuous..,1: SPI flow is suspended temporary on RxFIFO full.."
bitfld.long 0x0 0. "SPE,serial peripheral enable" "0: Serial peripheral disabled.,1: Serial peripheral enabled"
line.long 0x4 "SPI_CR2,SPI control register 2"
hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer"
line.long 0x8 "SPI_CFG1,SPI configuration register 1"
bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "0: bypass is disabled,1: bypass is enabled"
bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "0: SPI master clock/2,1: SPI master clock/4,2: SPI master clock/8,3: SPI master clock/16,4: SPI master clock/32,5: SPI master clock/64,6: SPI master clock/128,7: SPI master clock/256"
newline
bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "0: CRC calculation disabled,1: CRC calculation enabled"
hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared"
newline
bitfld.long 0x8 15. "TxDMAEN,Tx DMA stream enable" "0: Tx DMA disabled,1: Tx DMA enabled"
bitfld.long 0x8 14. "RxDMAEN,Rx DMA stream enable" "0: Rx-DMA disabled,1: Rx-DMA enabled"
newline
bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "0: slave sends a constant pattern defined by the..,1: Slave repeats lastly received data from master."
hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level"
newline
hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame"
line.long 0xC "SPI_CFG2,SPI configuration register 2"
bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "0: The peripheral takes no control of GPIOs while..,1: The peripheral keeps always control of all.."
bitfld.long 0xC 30. "SSOM,SS output management in master mode" "0: SS is kept at active level until data transfer..,1: SPI data frames are interleaved with SS.."
newline
bitfld.long 0xC 29. "SSOE,SS output enable" "0: SS output is disabled and the SPI can work in..,1: SS output is enabled."
bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "0: low level is active for SS signal,1: high level is active for SS signal"
newline
bitfld.long 0xC 26. "SSM,software management of SS signal input" "0: SS input value is determined by the SS PAD,1: SS input value is determined by the SSI bit"
bitfld.long 0xC 25. "CPOL,clock polarity" "0: SCK signal is at 0 when idle,1: SCK signal is at 1 when idle"
newline
bitfld.long 0xC 24. "CPHA,clock phase" "0: the first clock transition is the first data..,1: the second clock transition is the first data.."
bitfld.long 0xC 23. "LSBFRST,data frame format" "0: MSB transmitted first,1: LSB transmitted first"
newline
bitfld.long 0xC 22. "MASTER,SPI master" "0: SPI slave,1: SPI master"
bitfld.long 0xC 19.--21. "SP,serial protocol" "0: SPI Motorola,1: SPI TI,?,?,?,?,?,?"
newline
bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "0: full-duplex,1: simplex transmitter,2: simplex receiver,3: half-duplex"
bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "0: no swap,1: MOSI and MISO are swapped"
newline
bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "0: high level of the signal means the slave is..,1: low level of the signal means the slave is ready.."
bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "0: RDY signal is defined internally fixed as..,1: RDY signal is overtaken from alternate function.."
newline
hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness"
hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness"
line.long 0x10 "SPI_IER,SPI interrupt enable register"
bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "0: MODF interrupt disabled,1: MODF interrupt enabled"
bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "0: TIFRE interrupt disabled,1: TIFRE interrupt enabled"
newline
bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "0: CRC interrupt disabled,1: CRC interrupt enabled"
bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "0: OVR interrupt disabled,1: OVR interrupt enabled"
newline
bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "0: UDR interrupt disabled,1: UDR interrupt enabled"
bitfld.long 0x10 4. "TxTFIE,TxTF interrupt enable" "0: TxTF interrupt disabled,1: TxTF interrupt enabled"
newline
bitfld.long 0x10 3. "EOTIE,EOT SUSP and TxC interrupt enable" "0: EOT/SUSP/TxC interrupt disabled,1: EOT/SUSP/TxC interrupt enabled"
bitfld.long 0x10 2. "DxPIE,DxP interrupt enabled" "0: DxP interrupt disabled,1: DxP interrupt enabled"
newline
bitfld.long 0x10 1. "TxPIE,TxP interrupt enable" "0: TxP interrupt disabled,1: TxP interrupt enabled"
bitfld.long 0x10 0. "RxPIE,RxP interrupt enable" "0: RxP interrupt disabled,1: RxP interrupt enabled"
rgroup.long 0x14++0x3
line.long 0x0 "SPI_SR,SPI status register"
hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session"
bitfld.long 0x0 15. "RxWNE,RxFIFO word not empty" "0: less than four bytes of RxFIFO space is occupied..,1: at least four bytes of RxFIFO space is occupied.."
newline
bitfld.long 0x0 13.--14. "RxPLVL,RxFIFO packing level" "0: no next frame is available at RxFIFO,1: 1 frame is available,2: 2 frames are availablex,3: 3 frames are availablex"
bitfld.long 0x0 12. "TxC,TxFIFO transmission complete" "0: current data transaction is still ongoing data..,1: last TxFIFO frame transmission complete"
newline
bitfld.long 0x0 11. "SUSP,suspension status" "0: SPI not suspended (master mode active or other..,1: master mode is suspended (current frame.."
bitfld.long 0x0 9. "MODF,mode fault" "0: no mode fault,1: mode fault detected."
newline
bitfld.long 0x0 8. "TIFRE,TI frame format error" "0: no TI Frame Error,1: TI frame error detected"
bitfld.long 0x0 7. "CRCE,CRC error" "0: no CRC error,1: CRC error detected"
newline
bitfld.long 0x0 6. "OVR,overrun" "0: no overrun,1: overrun detected"
bitfld.long 0x0 5. "UDR,underrun" "0: no underrun,1: underrun detected"
newline
bitfld.long 0x0 4. "TxTF,transmission transfer filled" "0: upload of TxFIFO is ongoing or not started,1: TxFIFO upload is finished"
bitfld.long 0x0 3. "EOT,end of transfer" "0: transfer is ongoing or not started,1: transfer complete"
newline
bitfld.long 0x0 2. "DxP,duplex packet" "0: TxFIFO is Full and/or RxFIFO is Empty,1: both TxFIFO has space for write and RxFIFO.."
bitfld.long 0x0 1. "TxP,Tx-packet space available" "0: not enough free space at TxFIFO to host next..,1: enough free space at TxFIFO to host at least one.."
newline
bitfld.long 0x0 0. "RxP,Rx-packet available" "0: RxFIFO is empty or an incomplete data packet is..,1: RxFIFO contains at least one data packet"
wgroup.long 0x18++0x3
line.long 0x0 "SPI_IFCR,SPI interrupt/status flags clear register"
bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1"
bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1"
newline
bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1"
bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1"
newline
bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1"
bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1"
newline
bitfld.long 0x0 4. "TxTFC,transmission transfer filled flag clear" "0,1"
bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1"
group.long 0x1C++0x3
line.long 0x0 "SPI_AUTOCR,SPI autonomous mode control register"
bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "0: Hardware control disabled,1: Hardware control enabled"
bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "0: trigger is active on raising edge,1: trigger is active on falling edge"
newline
hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)."
wgroup.long 0x20++0x3
line.long 0x0 "SPI_TxDR,SPI transmit data register"
hexmask.long 0x0 0.--31. 1. "TxDR,transmit data register"
rgroup.long 0x30++0x3
line.long 0x0 "SPI_RxDR,SPI receive data register"
hexmask.long 0x0 0.--31. 1. "RxDR,receive data register"
group.long 0x40++0x3
line.long 0x0 "SPI_CRCPOLY,SPI polynomial register"
hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register"
rgroup.long 0x44++0x7
line.long 0x0 "SPI_TxCRC,SPI transmitter CRC register"
hexmask.long 0x0 0.--31. 1. "TxCRC,CRC register for transmitter"
line.long 0x4 "SPI_RxCRC,SPI receiver CRC register"
hexmask.long 0x4 0.--31. 1. "RxCRC,CRC register for receiver"
group.long 0x4C++0x3
line.long 0x0 "SPI_UDRDR,SPI underrun data register"
hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition"
tree.end
tree "SEC_SPI1"
base ad:0x50013000
group.long 0x0++0x13
line.long 0x0 "SPI_CR1,SPI control register 1"
bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "0: AF configuration is not locked,1: AF configuration is locked"
bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "0: all zero pattern is applied,1: all ones pattern is applied"
newline
bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "0: All zero pattern is applied,1: All ones pattern is applied"
bitfld.long 0x0 13. "CRC33_17,Full size (33-bit or 17-bit) CRC polynomial configuration" "0: Full size (33-bit or 17-bit) CRC polynomial is..,1: Full size (33-bit or 17-bit) CRC polynomial is.."
newline
bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1"
bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "0: SPI is receiver,1: SPI is transmitter"
newline
bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1"
bitfld.long 0x0 9. "CSTART,master transfer start" "0: master transfer is at idle,1: master transfer is ongoing or temporary.."
newline
bitfld.long 0x0 8. "MASRx,master automatic suspension in Receive mode" "0: SPI flow/clock generation is continuous..,1: SPI flow is suspended temporary on RxFIFO full.."
bitfld.long 0x0 0. "SPE,serial peripheral enable" "0: Serial peripheral disabled.,1: Serial peripheral enabled"
line.long 0x4 "SPI_CR2,SPI control register 2"
hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer"
line.long 0x8 "SPI_CFG1,SPI configuration register 1"
bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "0: bypass is disabled,1: bypass is enabled"
bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "0: SPI master clock/2,1: SPI master clock/4,2: SPI master clock/8,3: SPI master clock/16,4: SPI master clock/32,5: SPI master clock/64,6: SPI master clock/128,7: SPI master clock/256"
newline
bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "0: CRC calculation disabled,1: CRC calculation enabled"
hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared"
newline
bitfld.long 0x8 15. "TxDMAEN,Tx DMA stream enable" "0: Tx DMA disabled,1: Tx DMA enabled"
bitfld.long 0x8 14. "RxDMAEN,Rx DMA stream enable" "0: Rx-DMA disabled,1: Rx-DMA enabled"
newline
bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "0: slave sends a constant pattern defined by the..,1: Slave repeats lastly received data from master."
hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level"
newline
hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame"
line.long 0xC "SPI_CFG2,SPI configuration register 2"
bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "0: The peripheral takes no control of GPIOs while..,1: The peripheral keeps always control of all.."
bitfld.long 0xC 30. "SSOM,SS output management in master mode" "0: SS is kept at active level until data transfer..,1: SPI data frames are interleaved with SS.."
newline
bitfld.long 0xC 29. "SSOE,SS output enable" "0: SS output is disabled and the SPI can work in..,1: SS output is enabled."
bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "0: low level is active for SS signal,1: high level is active for SS signal"
newline
bitfld.long 0xC 26. "SSM,software management of SS signal input" "0: SS input value is determined by the SS PAD,1: SS input value is determined by the SSI bit"
bitfld.long 0xC 25. "CPOL,clock polarity" "0: SCK signal is at 0 when idle,1: SCK signal is at 1 when idle"
newline
bitfld.long 0xC 24. "CPHA,clock phase" "0: the first clock transition is the first data..,1: the second clock transition is the first data.."
bitfld.long 0xC 23. "LSBFRST,data frame format" "0: MSB transmitted first,1: LSB transmitted first"
newline
bitfld.long 0xC 22. "MASTER,SPI master" "0: SPI slave,1: SPI master"
bitfld.long 0xC 19.--21. "SP,serial protocol" "0: SPI Motorola,1: SPI TI,?,?,?,?,?,?"
newline
bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "0: full-duplex,1: simplex transmitter,2: simplex receiver,3: half-duplex"
bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "0: no swap,1: MOSI and MISO are swapped"
newline
bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "0: high level of the signal means the slave is..,1: low level of the signal means the slave is ready.."
bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "0: RDY signal is defined internally fixed as..,1: RDY signal is overtaken from alternate function.."
newline
hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness"
hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness"
line.long 0x10 "SPI_IER,SPI interrupt enable register"
bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "0: MODF interrupt disabled,1: MODF interrupt enabled"
bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "0: TIFRE interrupt disabled,1: TIFRE interrupt enabled"
newline
bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "0: CRC interrupt disabled,1: CRC interrupt enabled"
bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "0: OVR interrupt disabled,1: OVR interrupt enabled"
newline
bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "0: UDR interrupt disabled,1: UDR interrupt enabled"
bitfld.long 0x10 4. "TxTFIE,TxTF interrupt enable" "0: TxTF interrupt disabled,1: TxTF interrupt enabled"
newline
bitfld.long 0x10 3. "EOTIE,EOT SUSP and TxC interrupt enable" "0: EOT/SUSP/TxC interrupt disabled,1: EOT/SUSP/TxC interrupt enabled"
bitfld.long 0x10 2. "DxPIE,DxP interrupt enabled" "0: DxP interrupt disabled,1: DxP interrupt enabled"
newline
bitfld.long 0x10 1. "TxPIE,TxP interrupt enable" "0: TxP interrupt disabled,1: TxP interrupt enabled"
bitfld.long 0x10 0. "RxPIE,RxP interrupt enable" "0: RxP interrupt disabled,1: RxP interrupt enabled"
rgroup.long 0x14++0x3
line.long 0x0 "SPI_SR,SPI status register"
hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session"
bitfld.long 0x0 15. "RxWNE,RxFIFO word not empty" "0: less than four bytes of RxFIFO space is occupied..,1: at least four bytes of RxFIFO space is occupied.."
newline
bitfld.long 0x0 13.--14. "RxPLVL,RxFIFO packing level" "0: no next frame is available at RxFIFO,1: 1 frame is available,2: 2 frames are availablex,3: 3 frames are availablex"
bitfld.long 0x0 12. "TxC,TxFIFO transmission complete" "0: current data transaction is still ongoing data..,1: last TxFIFO frame transmission complete"
newline
bitfld.long 0x0 11. "SUSP,suspension status" "0: SPI not suspended (master mode active or other..,1: master mode is suspended (current frame.."
bitfld.long 0x0 9. "MODF,mode fault" "0: no mode fault,1: mode fault detected."
newline
bitfld.long 0x0 8. "TIFRE,TI frame format error" "0: no TI Frame Error,1: TI frame error detected"
bitfld.long 0x0 7. "CRCE,CRC error" "0: no CRC error,1: CRC error detected"
newline
bitfld.long 0x0 6. "OVR,overrun" "0: no overrun,1: overrun detected"
bitfld.long 0x0 5. "UDR,underrun" "0: no underrun,1: underrun detected"
newline
bitfld.long 0x0 4. "TxTF,transmission transfer filled" "0: upload of TxFIFO is ongoing or not started,1: TxFIFO upload is finished"
bitfld.long 0x0 3. "EOT,end of transfer" "0: transfer is ongoing or not started,1: transfer complete"
newline
bitfld.long 0x0 2. "DxP,duplex packet" "0: TxFIFO is Full and/or RxFIFO is Empty,1: both TxFIFO has space for write and RxFIFO.."
bitfld.long 0x0 1. "TxP,Tx-packet space available" "0: not enough free space at TxFIFO to host next..,1: enough free space at TxFIFO to host at least one.."
newline
bitfld.long 0x0 0. "RxP,Rx-packet available" "0: RxFIFO is empty or an incomplete data packet is..,1: RxFIFO contains at least one data packet"
wgroup.long 0x18++0x3
line.long 0x0 "SPI_IFCR,SPI interrupt/status flags clear register"
bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1"
bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1"
newline
bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1"
bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1"
newline
bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1"
bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1"
newline
bitfld.long 0x0 4. "TxTFC,transmission transfer filled flag clear" "0,1"
bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1"
group.long 0x1C++0x3
line.long 0x0 "SPI_AUTOCR,SPI autonomous mode control register"
bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "0: Hardware control disabled,1: Hardware control enabled"
bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "0: trigger is active on raising edge,1: trigger is active on falling edge"
newline
hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)."
wgroup.long 0x20++0x3
line.long 0x0 "SPI_TxDR,SPI transmit data register"
hexmask.long 0x0 0.--31. 1. "TxDR,transmit data register"
rgroup.long 0x30++0x3
line.long 0x0 "SPI_RxDR,SPI receive data register"
hexmask.long 0x0 0.--31. 1. "RxDR,receive data register"
group.long 0x40++0x3
line.long 0x0 "SPI_CRCPOLY,SPI polynomial register"
hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register"
rgroup.long 0x44++0x7
line.long 0x0 "SPI_TxCRC,SPI transmitter CRC register"
hexmask.long 0x0 0.--31. 1. "TxCRC,CRC register for transmitter"
line.long 0x4 "SPI_RxCRC,SPI receiver CRC register"
hexmask.long 0x4 0.--31. 1. "RxCRC,CRC register for receiver"
group.long 0x4C++0x3
line.long 0x0 "SPI_UDRDR,SPI underrun data register"
hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition"
tree.end
tree "SPI2"
base ad:0x40003800
group.long 0x0++0x13
line.long 0x0 "SPI_CR1,SPI control register 1"
bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "0: AF configuration is not locked,1: AF configuration is locked"
bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "0: all zero pattern is applied,1: all ones pattern is applied"
newline
bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "0: All zero pattern is applied,1: All ones pattern is applied"
bitfld.long 0x0 13. "CRC33_17,Full size (33-bit or 17-bit) CRC polynomial configuration" "0: Full size (33-bit or 17-bit) CRC polynomial is..,1: Full size (33-bit or 17-bit) CRC polynomial is.."
newline
bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1"
bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "0: SPI is receiver,1: SPI is transmitter"
newline
bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1"
bitfld.long 0x0 9. "CSTART,master transfer start" "0: master transfer is at idle,1: master transfer is ongoing or temporary.."
newline
bitfld.long 0x0 8. "MASRx,master automatic suspension in Receive mode" "0: SPI flow/clock generation is continuous..,1: SPI flow is suspended temporary on RxFIFO full.."
bitfld.long 0x0 0. "SPE,serial peripheral enable" "0: Serial peripheral disabled.,1: Serial peripheral enabled"
line.long 0x4 "SPI_CR2,SPI control register 2"
hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer"
line.long 0x8 "SPI_CFG1,SPI configuration register 1"
bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "0: bypass is disabled,1: bypass is enabled"
bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "0: SPI master clock/2,1: SPI master clock/4,2: SPI master clock/8,3: SPI master clock/16,4: SPI master clock/32,5: SPI master clock/64,6: SPI master clock/128,7: SPI master clock/256"
newline
bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "0: CRC calculation disabled,1: CRC calculation enabled"
hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared"
newline
bitfld.long 0x8 15. "TxDMAEN,Tx DMA stream enable" "0: Tx DMA disabled,1: Tx DMA enabled"
bitfld.long 0x8 14. "RxDMAEN,Rx DMA stream enable" "0: Rx-DMA disabled,1: Rx-DMA enabled"
newline
bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "0: slave sends a constant pattern defined by the..,1: Slave repeats lastly received data from master."
hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level"
newline
hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame"
line.long 0xC "SPI_CFG2,SPI configuration register 2"
bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "0: The peripheral takes no control of GPIOs while..,1: The peripheral keeps always control of all.."
bitfld.long 0xC 30. "SSOM,SS output management in master mode" "0: SS is kept at active level until data transfer..,1: SPI data frames are interleaved with SS.."
newline
bitfld.long 0xC 29. "SSOE,SS output enable" "0: SS output is disabled and the SPI can work in..,1: SS output is enabled."
bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "0: low level is active for SS signal,1: high level is active for SS signal"
newline
bitfld.long 0xC 26. "SSM,software management of SS signal input" "0: SS input value is determined by the SS PAD,1: SS input value is determined by the SSI bit"
bitfld.long 0xC 25. "CPOL,clock polarity" "0: SCK signal is at 0 when idle,1: SCK signal is at 1 when idle"
newline
bitfld.long 0xC 24. "CPHA,clock phase" "0: the first clock transition is the first data..,1: the second clock transition is the first data.."
bitfld.long 0xC 23. "LSBFRST,data frame format" "0: MSB transmitted first,1: LSB transmitted first"
newline
bitfld.long 0xC 22. "MASTER,SPI master" "0: SPI slave,1: SPI master"
bitfld.long 0xC 19.--21. "SP,serial protocol" "0: SPI Motorola,1: SPI TI,?,?,?,?,?,?"
newline
bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "0: full-duplex,1: simplex transmitter,2: simplex receiver,3: half-duplex"
bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "0: no swap,1: MOSI and MISO are swapped"
newline
bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "0: high level of the signal means the slave is..,1: low level of the signal means the slave is ready.."
bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "0: RDY signal is defined internally fixed as..,1: RDY signal is overtaken from alternate function.."
newline
hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness"
hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness"
line.long 0x10 "SPI_IER,SPI interrupt enable register"
bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "0: MODF interrupt disabled,1: MODF interrupt enabled"
bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "0: TIFRE interrupt disabled,1: TIFRE interrupt enabled"
newline
bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "0: CRC interrupt disabled,1: CRC interrupt enabled"
bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "0: OVR interrupt disabled,1: OVR interrupt enabled"
newline
bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "0: UDR interrupt disabled,1: UDR interrupt enabled"
bitfld.long 0x10 4. "TxTFIE,TxTF interrupt enable" "0: TxTF interrupt disabled,1: TxTF interrupt enabled"
newline
bitfld.long 0x10 3. "EOTIE,EOT SUSP and TxC interrupt enable" "0: EOT/SUSP/TxC interrupt disabled,1: EOT/SUSP/TxC interrupt enabled"
bitfld.long 0x10 2. "DxPIE,DxP interrupt enabled" "0: DxP interrupt disabled,1: DxP interrupt enabled"
newline
bitfld.long 0x10 1. "TxPIE,TxP interrupt enable" "0: TxP interrupt disabled,1: TxP interrupt enabled"
bitfld.long 0x10 0. "RxPIE,RxP interrupt enable" "0: RxP interrupt disabled,1: RxP interrupt enabled"
rgroup.long 0x14++0x3
line.long 0x0 "SPI_SR,SPI status register"
hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session"
bitfld.long 0x0 15. "RxWNE,RxFIFO word not empty" "0: less than four bytes of RxFIFO space is occupied..,1: at least four bytes of RxFIFO space is occupied.."
newline
bitfld.long 0x0 13.--14. "RxPLVL,RxFIFO packing level" "0: no next frame is available at RxFIFO,1: 1 frame is available,2: 2 frames are availablex,3: 3 frames are availablex"
bitfld.long 0x0 12. "TxC,TxFIFO transmission complete" "0: current data transaction is still ongoing data..,1: last TxFIFO frame transmission complete"
newline
bitfld.long 0x0 11. "SUSP,suspension status" "0: SPI not suspended (master mode active or other..,1: master mode is suspended (current frame.."
bitfld.long 0x0 9. "MODF,mode fault" "0: no mode fault,1: mode fault detected."
newline
bitfld.long 0x0 8. "TIFRE,TI frame format error" "0: no TI Frame Error,1: TI frame error detected"
bitfld.long 0x0 7. "CRCE,CRC error" "0: no CRC error,1: CRC error detected"
newline
bitfld.long 0x0 6. "OVR,overrun" "0: no overrun,1: overrun detected"
bitfld.long 0x0 5. "UDR,underrun" "0: no underrun,1: underrun detected"
newline
bitfld.long 0x0 4. "TxTF,transmission transfer filled" "0: upload of TxFIFO is ongoing or not started,1: TxFIFO upload is finished"
bitfld.long 0x0 3. "EOT,end of transfer" "0: transfer is ongoing or not started,1: transfer complete"
newline
bitfld.long 0x0 2. "DxP,duplex packet" "0: TxFIFO is Full and/or RxFIFO is Empty,1: both TxFIFO has space for write and RxFIFO.."
bitfld.long 0x0 1. "TxP,Tx-packet space available" "0: not enough free space at TxFIFO to host next..,1: enough free space at TxFIFO to host at least one.."
newline
bitfld.long 0x0 0. "RxP,Rx-packet available" "0: RxFIFO is empty or an incomplete data packet is..,1: RxFIFO contains at least one data packet"
wgroup.long 0x18++0x3
line.long 0x0 "SPI_IFCR,SPI interrupt/status flags clear register"
bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1"
bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1"
newline
bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1"
bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1"
newline
bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1"
bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1"
newline
bitfld.long 0x0 4. "TxTFC,transmission transfer filled flag clear" "0,1"
bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1"
group.long 0x1C++0x3
line.long 0x0 "SPI_AUTOCR,SPI autonomous mode control register"
bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "0: Hardware control disabled,1: Hardware control enabled"
bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "0: trigger is active on raising edge,1: trigger is active on falling edge"
newline
hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)."
wgroup.long 0x20++0x3
line.long 0x0 "SPI_TxDR,SPI transmit data register"
hexmask.long 0x0 0.--31. 1. "TxDR,transmit data register"
rgroup.long 0x30++0x3
line.long 0x0 "SPI_RxDR,SPI receive data register"
hexmask.long 0x0 0.--31. 1. "RxDR,receive data register"
group.long 0x40++0x3
line.long 0x0 "SPI_CRCPOLY,SPI polynomial register"
hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register"
rgroup.long 0x44++0x7
line.long 0x0 "SPI_TxCRC,SPI transmitter CRC register"
hexmask.long 0x0 0.--31. 1. "TxCRC,CRC register for transmitter"
line.long 0x4 "SPI_RxCRC,SPI receiver CRC register"
hexmask.long 0x4 0.--31. 1. "RxCRC,CRC register for receiver"
group.long 0x4C++0x3
line.long 0x0 "SPI_UDRDR,SPI underrun data register"
hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition"
tree.end
tree "SEC_SPI2"
base ad:0x50003800
group.long 0x0++0x13
line.long 0x0 "SPI_CR1,SPI control register 1"
bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "0: AF configuration is not locked,1: AF configuration is locked"
bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "0: all zero pattern is applied,1: all ones pattern is applied"
newline
bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "0: All zero pattern is applied,1: All ones pattern is applied"
bitfld.long 0x0 13. "CRC33_17,Full size (33-bit or 17-bit) CRC polynomial configuration" "0: Full size (33-bit or 17-bit) CRC polynomial is..,1: Full size (33-bit or 17-bit) CRC polynomial is.."
newline
bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1"
bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "0: SPI is receiver,1: SPI is transmitter"
newline
bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1"
bitfld.long 0x0 9. "CSTART,master transfer start" "0: master transfer is at idle,1: master transfer is ongoing or temporary.."
newline
bitfld.long 0x0 8. "MASRx,master automatic suspension in Receive mode" "0: SPI flow/clock generation is continuous..,1: SPI flow is suspended temporary on RxFIFO full.."
bitfld.long 0x0 0. "SPE,serial peripheral enable" "0: Serial peripheral disabled.,1: Serial peripheral enabled"
line.long 0x4 "SPI_CR2,SPI control register 2"
hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer"
line.long 0x8 "SPI_CFG1,SPI configuration register 1"
bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "0: bypass is disabled,1: bypass is enabled"
bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "0: SPI master clock/2,1: SPI master clock/4,2: SPI master clock/8,3: SPI master clock/16,4: SPI master clock/32,5: SPI master clock/64,6: SPI master clock/128,7: SPI master clock/256"
newline
bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "0: CRC calculation disabled,1: CRC calculation enabled"
hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared"
newline
bitfld.long 0x8 15. "TxDMAEN,Tx DMA stream enable" "0: Tx DMA disabled,1: Tx DMA enabled"
bitfld.long 0x8 14. "RxDMAEN,Rx DMA stream enable" "0: Rx-DMA disabled,1: Rx-DMA enabled"
newline
bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "0: slave sends a constant pattern defined by the..,1: Slave repeats lastly received data from master."
hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level"
newline
hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame"
line.long 0xC "SPI_CFG2,SPI configuration register 2"
bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "0: The peripheral takes no control of GPIOs while..,1: The peripheral keeps always control of all.."
bitfld.long 0xC 30. "SSOM,SS output management in master mode" "0: SS is kept at active level until data transfer..,1: SPI data frames are interleaved with SS.."
newline
bitfld.long 0xC 29. "SSOE,SS output enable" "0: SS output is disabled and the SPI can work in..,1: SS output is enabled."
bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "0: low level is active for SS signal,1: high level is active for SS signal"
newline
bitfld.long 0xC 26. "SSM,software management of SS signal input" "0: SS input value is determined by the SS PAD,1: SS input value is determined by the SSI bit"
bitfld.long 0xC 25. "CPOL,clock polarity" "0: SCK signal is at 0 when idle,1: SCK signal is at 1 when idle"
newline
bitfld.long 0xC 24. "CPHA,clock phase" "0: the first clock transition is the first data..,1: the second clock transition is the first data.."
bitfld.long 0xC 23. "LSBFRST,data frame format" "0: MSB transmitted first,1: LSB transmitted first"
newline
bitfld.long 0xC 22. "MASTER,SPI master" "0: SPI slave,1: SPI master"
bitfld.long 0xC 19.--21. "SP,serial protocol" "0: SPI Motorola,1: SPI TI,?,?,?,?,?,?"
newline
bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "0: full-duplex,1: simplex transmitter,2: simplex receiver,3: half-duplex"
bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "0: no swap,1: MOSI and MISO are swapped"
newline
bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "0: high level of the signal means the slave is..,1: low level of the signal means the slave is ready.."
bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "0: RDY signal is defined internally fixed as..,1: RDY signal is overtaken from alternate function.."
newline
hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness"
hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness"
line.long 0x10 "SPI_IER,SPI interrupt enable register"
bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "0: MODF interrupt disabled,1: MODF interrupt enabled"
bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "0: TIFRE interrupt disabled,1: TIFRE interrupt enabled"
newline
bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "0: CRC interrupt disabled,1: CRC interrupt enabled"
bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "0: OVR interrupt disabled,1: OVR interrupt enabled"
newline
bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "0: UDR interrupt disabled,1: UDR interrupt enabled"
bitfld.long 0x10 4. "TxTFIE,TxTF interrupt enable" "0: TxTF interrupt disabled,1: TxTF interrupt enabled"
newline
bitfld.long 0x10 3. "EOTIE,EOT SUSP and TxC interrupt enable" "0: EOT/SUSP/TxC interrupt disabled,1: EOT/SUSP/TxC interrupt enabled"
bitfld.long 0x10 2. "DxPIE,DxP interrupt enabled" "0: DxP interrupt disabled,1: DxP interrupt enabled"
newline
bitfld.long 0x10 1. "TxPIE,TxP interrupt enable" "0: TxP interrupt disabled,1: TxP interrupt enabled"
bitfld.long 0x10 0. "RxPIE,RxP interrupt enable" "0: RxP interrupt disabled,1: RxP interrupt enabled"
rgroup.long 0x14++0x3
line.long 0x0 "SPI_SR,SPI status register"
hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session"
bitfld.long 0x0 15. "RxWNE,RxFIFO word not empty" "0: less than four bytes of RxFIFO space is occupied..,1: at least four bytes of RxFIFO space is occupied.."
newline
bitfld.long 0x0 13.--14. "RxPLVL,RxFIFO packing level" "0: no next frame is available at RxFIFO,1: 1 frame is available,2: 2 frames are availablex,3: 3 frames are availablex"
bitfld.long 0x0 12. "TxC,TxFIFO transmission complete" "0: current data transaction is still ongoing data..,1: last TxFIFO frame transmission complete"
newline
bitfld.long 0x0 11. "SUSP,suspension status" "0: SPI not suspended (master mode active or other..,1: master mode is suspended (current frame.."
bitfld.long 0x0 9. "MODF,mode fault" "0: no mode fault,1: mode fault detected."
newline
bitfld.long 0x0 8. "TIFRE,TI frame format error" "0: no TI Frame Error,1: TI frame error detected"
bitfld.long 0x0 7. "CRCE,CRC error" "0: no CRC error,1: CRC error detected"
newline
bitfld.long 0x0 6. "OVR,overrun" "0: no overrun,1: overrun detected"
bitfld.long 0x0 5. "UDR,underrun" "0: no underrun,1: underrun detected"
newline
bitfld.long 0x0 4. "TxTF,transmission transfer filled" "0: upload of TxFIFO is ongoing or not started,1: TxFIFO upload is finished"
bitfld.long 0x0 3. "EOT,end of transfer" "0: transfer is ongoing or not started,1: transfer complete"
newline
bitfld.long 0x0 2. "DxP,duplex packet" "0: TxFIFO is Full and/or RxFIFO is Empty,1: both TxFIFO has space for write and RxFIFO.."
bitfld.long 0x0 1. "TxP,Tx-packet space available" "0: not enough free space at TxFIFO to host next..,1: enough free space at TxFIFO to host at least one.."
newline
bitfld.long 0x0 0. "RxP,Rx-packet available" "0: RxFIFO is empty or an incomplete data packet is..,1: RxFIFO contains at least one data packet"
wgroup.long 0x18++0x3
line.long 0x0 "SPI_IFCR,SPI interrupt/status flags clear register"
bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1"
bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1"
newline
bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1"
bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1"
newline
bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1"
bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1"
newline
bitfld.long 0x0 4. "TxTFC,transmission transfer filled flag clear" "0,1"
bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1"
group.long 0x1C++0x3
line.long 0x0 "SPI_AUTOCR,SPI autonomous mode control register"
bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "0: Hardware control disabled,1: Hardware control enabled"
bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "0: trigger is active on raising edge,1: trigger is active on falling edge"
newline
hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)."
wgroup.long 0x20++0x3
line.long 0x0 "SPI_TxDR,SPI transmit data register"
hexmask.long 0x0 0.--31. 1. "TxDR,transmit data register"
rgroup.long 0x30++0x3
line.long 0x0 "SPI_RxDR,SPI receive data register"
hexmask.long 0x0 0.--31. 1. "RxDR,receive data register"
group.long 0x40++0x3
line.long 0x0 "SPI_CRCPOLY,SPI polynomial register"
hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register"
rgroup.long 0x44++0x7
line.long 0x0 "SPI_TxCRC,SPI transmitter CRC register"
hexmask.long 0x0 0.--31. 1. "TxCRC,CRC register for transmitter"
line.long 0x4 "SPI_RxCRC,SPI receiver CRC register"
hexmask.long 0x4 0.--31. 1. "RxCRC,CRC register for receiver"
group.long 0x4C++0x3
line.long 0x0 "SPI_UDRDR,SPI underrun data register"
hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition"
tree.end
tree "SPI3"
base ad:0x40002000
group.long 0x0++0x13
line.long 0x0 "SPI_CR1,SPI control register 1"
bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "0: AF configuration is not locked,1: AF configuration is locked"
bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "0: all zero pattern is applied,1: all ones pattern is applied"
newline
bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "0: All zero pattern is applied,1: All ones pattern is applied"
bitfld.long 0x0 13. "CRC33_17,Full size (33-bit or 17-bit) CRC polynomial configuration" "0: Full size (33-bit or 17-bit) CRC polynomial is..,1: Full size (33-bit or 17-bit) CRC polynomial is.."
newline
bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1"
bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "0: SPI is receiver,1: SPI is transmitter"
newline
bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1"
bitfld.long 0x0 9. "CSTART,master transfer start" "0: master transfer is at idle,1: master transfer is ongoing or temporary.."
newline
bitfld.long 0x0 8. "MASRx,master automatic suspension in Receive mode" "0: SPI flow/clock generation is continuous..,1: SPI flow is suspended temporary on RxFIFO full.."
bitfld.long 0x0 0. "SPE,serial peripheral enable" "0: Serial peripheral disabled.,1: Serial peripheral enabled"
line.long 0x4 "SPI_CR2,SPI control register 2"
hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer"
line.long 0x8 "SPI_CFG1,SPI configuration register 1"
bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "0: bypass is disabled,1: bypass is enabled"
bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "0: SPI master clock/2,1: SPI master clock/4,2: SPI master clock/8,3: SPI master clock/16,4: SPI master clock/32,5: SPI master clock/64,6: SPI master clock/128,7: SPI master clock/256"
newline
bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "0: CRC calculation disabled,1: CRC calculation enabled"
hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared"
newline
bitfld.long 0x8 15. "TxDMAEN,Tx DMA stream enable" "0: Tx DMA disabled,1: Tx DMA enabled"
bitfld.long 0x8 14. "RxDMAEN,Rx DMA stream enable" "0: Rx-DMA disabled,1: Rx-DMA enabled"
newline
bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "0: slave sends a constant pattern defined by the..,1: Slave repeats lastly received data from master."
hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level"
newline
hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame"
line.long 0xC "SPI_CFG2,SPI configuration register 2"
bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "0: The peripheral takes no control of GPIOs while..,1: The peripheral keeps always control of all.."
bitfld.long 0xC 30. "SSOM,SS output management in master mode" "0: SS is kept at active level until data transfer..,1: SPI data frames are interleaved with SS.."
newline
bitfld.long 0xC 29. "SSOE,SS output enable" "0: SS output is disabled and the SPI can work in..,1: SS output is enabled."
bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "0: low level is active for SS signal,1: high level is active for SS signal"
newline
bitfld.long 0xC 26. "SSM,software management of SS signal input" "0: SS input value is determined by the SS PAD,1: SS input value is determined by the SSI bit"
bitfld.long 0xC 25. "CPOL,clock polarity" "0: SCK signal is at 0 when idle,1: SCK signal is at 1 when idle"
newline
bitfld.long 0xC 24. "CPHA,clock phase" "0: the first clock transition is the first data..,1: the second clock transition is the first data.."
bitfld.long 0xC 23. "LSBFRST,data frame format" "0: MSB transmitted first,1: LSB transmitted first"
newline
bitfld.long 0xC 22. "MASTER,SPI master" "0: SPI slave,1: SPI master"
bitfld.long 0xC 19.--21. "SP,serial protocol" "0: SPI Motorola,1: SPI TI,?,?,?,?,?,?"
newline
bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "0: full-duplex,1: simplex transmitter,2: simplex receiver,3: half-duplex"
bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "0: no swap,1: MOSI and MISO are swapped"
newline
bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "0: high level of the signal means the slave is..,1: low level of the signal means the slave is ready.."
bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "0: RDY signal is defined internally fixed as..,1: RDY signal is overtaken from alternate function.."
newline
hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness"
hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness"
line.long 0x10 "SPI_IER,SPI interrupt enable register"
bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "0: MODF interrupt disabled,1: MODF interrupt enabled"
bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "0: TIFRE interrupt disabled,1: TIFRE interrupt enabled"
newline
bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "0: CRC interrupt disabled,1: CRC interrupt enabled"
bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "0: OVR interrupt disabled,1: OVR interrupt enabled"
newline
bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "0: UDR interrupt disabled,1: UDR interrupt enabled"
bitfld.long 0x10 4. "TxTFIE,TxTF interrupt enable" "0: TxTF interrupt disabled,1: TxTF interrupt enabled"
newline
bitfld.long 0x10 3. "EOTIE,EOT SUSP and TxC interrupt enable" "0: EOT/SUSP/TxC interrupt disabled,1: EOT/SUSP/TxC interrupt enabled"
bitfld.long 0x10 2. "DxPIE,DxP interrupt enabled" "0: DxP interrupt disabled,1: DxP interrupt enabled"
newline
bitfld.long 0x10 1. "TxPIE,TxP interrupt enable" "0: TxP interrupt disabled,1: TxP interrupt enabled"
bitfld.long 0x10 0. "RxPIE,RxP interrupt enable" "0: RxP interrupt disabled,1: RxP interrupt enabled"
rgroup.long 0x14++0x3
line.long 0x0 "SPI_SR,SPI status register"
hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session"
bitfld.long 0x0 15. "RxWNE,RxFIFO word not empty" "0: less than four bytes of RxFIFO space is occupied..,1: at least four bytes of RxFIFO space is occupied.."
newline
bitfld.long 0x0 13.--14. "RxPLVL,RxFIFO packing level" "0: no next frame is available at RxFIFO,1: 1 frame is available,2: 2 frames are availablex,3: 3 frames are availablex"
bitfld.long 0x0 12. "TxC,TxFIFO transmission complete" "0: current data transaction is still ongoing data..,1: last TxFIFO frame transmission complete"
newline
bitfld.long 0x0 11. "SUSP,suspension status" "0: SPI not suspended (master mode active or other..,1: master mode is suspended (current frame.."
bitfld.long 0x0 9. "MODF,mode fault" "0: no mode fault,1: mode fault detected."
newline
bitfld.long 0x0 8. "TIFRE,TI frame format error" "0: no TI Frame Error,1: TI frame error detected"
bitfld.long 0x0 7. "CRCE,CRC error" "0: no CRC error,1: CRC error detected"
newline
bitfld.long 0x0 6. "OVR,overrun" "0: no overrun,1: overrun detected"
bitfld.long 0x0 5. "UDR,underrun" "0: no underrun,1: underrun detected"
newline
bitfld.long 0x0 4. "TxTF,transmission transfer filled" "0: upload of TxFIFO is ongoing or not started,1: TxFIFO upload is finished"
bitfld.long 0x0 3. "EOT,end of transfer" "0: transfer is ongoing or not started,1: transfer complete"
newline
bitfld.long 0x0 2. "DxP,duplex packet" "0: TxFIFO is Full and/or RxFIFO is Empty,1: both TxFIFO has space for write and RxFIFO.."
bitfld.long 0x0 1. "TxP,Tx-packet space available" "0: not enough free space at TxFIFO to host next..,1: enough free space at TxFIFO to host at least one.."
newline
bitfld.long 0x0 0. "RxP,Rx-packet available" "0: RxFIFO is empty or an incomplete data packet is..,1: RxFIFO contains at least one data packet"
wgroup.long 0x18++0x3
line.long 0x0 "SPI_IFCR,SPI interrupt/status flags clear register"
bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1"
bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1"
newline
bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1"
bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1"
newline
bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1"
bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1"
newline
bitfld.long 0x0 4. "TxTFC,transmission transfer filled flag clear" "0,1"
bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1"
group.long 0x1C++0x3
line.long 0x0 "SPI_AUTOCR,SPI autonomous mode control register"
bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "0: Hardware control disabled,1: Hardware control enabled"
bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "0: trigger is active on raising edge,1: trigger is active on falling edge"
newline
hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)."
wgroup.long 0x20++0x3
line.long 0x0 "SPI_TxDR,SPI transmit data register"
hexmask.long 0x0 0.--31. 1. "TxDR,transmit data register"
rgroup.long 0x30++0x3
line.long 0x0 "SPI_RxDR,SPI receive data register"
hexmask.long 0x0 0.--31. 1. "RxDR,receive data register"
group.long 0x40++0x3
line.long 0x0 "SPI_CRCPOLY,SPI polynomial register"
hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register"
rgroup.long 0x44++0x7
line.long 0x0 "SPI_TxCRC,SPI transmitter CRC register"
hexmask.long 0x0 0.--31. 1. "TxCRC,CRC register for transmitter"
line.long 0x4 "SPI_RxCRC,SPI receiver CRC register"
hexmask.long 0x4 0.--31. 1. "RxCRC,CRC register for receiver"
group.long 0x4C++0x3
line.long 0x0 "SPI_UDRDR,SPI underrun data register"
hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition"
tree.end
tree "SEC_SPI3"
base ad:0x50002000
group.long 0x0++0x13
line.long 0x0 "SPI_CR1,SPI control register 1"
bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "0: AF configuration is not locked,1: AF configuration is locked"
bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "0: all zero pattern is applied,1: all ones pattern is applied"
newline
bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "0: All zero pattern is applied,1: All ones pattern is applied"
bitfld.long 0x0 13. "CRC33_17,Full size (33-bit or 17-bit) CRC polynomial configuration" "0: Full size (33-bit or 17-bit) CRC polynomial is..,1: Full size (33-bit or 17-bit) CRC polynomial is.."
newline
bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1"
bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at half-duplex mode" "0: SPI is receiver,1: SPI is transmitter"
newline
bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1"
bitfld.long 0x0 9. "CSTART,master transfer start" "0: master transfer is at idle,1: master transfer is ongoing or temporary.."
newline
bitfld.long 0x0 8. "MASRx,master automatic suspension in Receive mode" "0: SPI flow/clock generation is continuous..,1: SPI flow is suspended temporary on RxFIFO full.."
bitfld.long 0x0 0. "SPE,serial peripheral enable" "0: Serial peripheral disabled.,1: Serial peripheral enabled"
line.long 0x4 "SPI_CR2,SPI control register 2"
hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer"
line.long 0x8 "SPI_CFG1,SPI configuration register 1"
bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "0: bypass is disabled,1: bypass is enabled"
bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "0: SPI master clock/2,1: SPI master clock/4,2: SPI master clock/8,3: SPI master clock/16,4: SPI master clock/32,5: SPI master clock/64,6: SPI master clock/128,7: SPI master clock/256"
newline
bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "0: CRC calculation disabled,1: CRC calculation enabled"
hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared"
newline
bitfld.long 0x8 15. "TxDMAEN,Tx DMA stream enable" "0: Tx DMA disabled,1: Tx DMA enabled"
bitfld.long 0x8 14. "RxDMAEN,Rx DMA stream enable" "0: Rx-DMA disabled,1: Rx-DMA enabled"
newline
bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "0: slave sends a constant pattern defined by the..,1: Slave repeats lastly received data from master."
hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level"
newline
hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in a single SPI data frame"
line.long 0xC "SPI_CFG2,SPI configuration register 2"
bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "0: The peripheral takes no control of GPIOs while..,1: The peripheral keeps always control of all.."
bitfld.long 0xC 30. "SSOM,SS output management in master mode" "0: SS is kept at active level until data transfer..,1: SPI data frames are interleaved with SS.."
newline
bitfld.long 0xC 29. "SSOE,SS output enable" "0: SS output is disabled and the SPI can work in..,1: SS output is enabled."
bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "0: low level is active for SS signal,1: high level is active for SS signal"
newline
bitfld.long 0xC 26. "SSM,software management of SS signal input" "0: SS input value is determined by the SS PAD,1: SS input value is determined by the SSI bit"
bitfld.long 0xC 25. "CPOL,clock polarity" "0: SCK signal is at 0 when idle,1: SCK signal is at 1 when idle"
newline
bitfld.long 0xC 24. "CPHA,clock phase" "0: the first clock transition is the first data..,1: the second clock transition is the first data.."
bitfld.long 0xC 23. "LSBFRST,data frame format" "0: MSB transmitted first,1: LSB transmitted first"
newline
bitfld.long 0xC 22. "MASTER,SPI master" "0: SPI slave,1: SPI master"
bitfld.long 0xC 19.--21. "SP,serial protocol" "0: SPI Motorola,1: SPI TI,?,?,?,?,?,?"
newline
bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "0: full-duplex,1: simplex transmitter,2: simplex receiver,3: half-duplex"
bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "0: no swap,1: MOSI and MISO are swapped"
newline
bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "0: high level of the signal means the slave is..,1: low level of the signal means the slave is ready.."
bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "0: RDY signal is defined internally fixed as..,1: RDY signal is overtaken from alternate function.."
newline
hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness"
hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness"
line.long 0x10 "SPI_IER,SPI interrupt enable register"
bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "0: MODF interrupt disabled,1: MODF interrupt enabled"
bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "0: TIFRE interrupt disabled,1: TIFRE interrupt enabled"
newline
bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "0: CRC interrupt disabled,1: CRC interrupt enabled"
bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "0: OVR interrupt disabled,1: OVR interrupt enabled"
newline
bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "0: UDR interrupt disabled,1: UDR interrupt enabled"
bitfld.long 0x10 4. "TxTFIE,TxTF interrupt enable" "0: TxTF interrupt disabled,1: TxTF interrupt enabled"
newline
bitfld.long 0x10 3. "EOTIE,EOT SUSP and TxC interrupt enable" "0: EOT/SUSP/TxC interrupt disabled,1: EOT/SUSP/TxC interrupt enabled"
bitfld.long 0x10 2. "DxPIE,DxP interrupt enabled" "0: DxP interrupt disabled,1: DxP interrupt enabled"
newline
bitfld.long 0x10 1. "TxPIE,TxP interrupt enable" "0: TxP interrupt disabled,1: TxP interrupt enabled"
bitfld.long 0x10 0. "RxPIE,RxP interrupt enable" "0: RxP interrupt disabled,1: RxP interrupt enabled"
rgroup.long 0x14++0x3
line.long 0x0 "SPI_SR,SPI status register"
hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session"
bitfld.long 0x0 15. "RxWNE,RxFIFO word not empty" "0: less than four bytes of RxFIFO space is occupied..,1: at least four bytes of RxFIFO space is occupied.."
newline
bitfld.long 0x0 13.--14. "RxPLVL,RxFIFO packing level" "0: no next frame is available at RxFIFO,1: 1 frame is available,2: 2 frames are availablex,3: 3 frames are availablex"
bitfld.long 0x0 12. "TxC,TxFIFO transmission complete" "0: current data transaction is still ongoing data..,1: last TxFIFO frame transmission complete"
newline
bitfld.long 0x0 11. "SUSP,suspension status" "0: SPI not suspended (master mode active or other..,1: master mode is suspended (current frame.."
bitfld.long 0x0 9. "MODF,mode fault" "0: no mode fault,1: mode fault detected."
newline
bitfld.long 0x0 8. "TIFRE,TI frame format error" "0: no TI Frame Error,1: TI frame error detected"
bitfld.long 0x0 7. "CRCE,CRC error" "0: no CRC error,1: CRC error detected"
newline
bitfld.long 0x0 6. "OVR,overrun" "0: no overrun,1: overrun detected"
bitfld.long 0x0 5. "UDR,underrun" "0: no underrun,1: underrun detected"
newline
bitfld.long 0x0 4. "TxTF,transmission transfer filled" "0: upload of TxFIFO is ongoing or not started,1: TxFIFO upload is finished"
bitfld.long 0x0 3. "EOT,end of transfer" "0: transfer is ongoing or not started,1: transfer complete"
newline
bitfld.long 0x0 2. "DxP,duplex packet" "0: TxFIFO is Full and/or RxFIFO is Empty,1: both TxFIFO has space for write and RxFIFO.."
bitfld.long 0x0 1. "TxP,Tx-packet space available" "0: not enough free space at TxFIFO to host next..,1: enough free space at TxFIFO to host at least one.."
newline
bitfld.long 0x0 0. "RxP,Rx-packet available" "0: RxFIFO is empty or an incomplete data packet is..,1: RxFIFO contains at least one data packet"
wgroup.long 0x18++0x3
line.long 0x0 "SPI_IFCR,SPI interrupt/status flags clear register"
bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1"
bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1"
newline
bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1"
bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1"
newline
bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1"
bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1"
newline
bitfld.long 0x0 4. "TxTFC,transmission transfer filled flag clear" "0,1"
bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1"
group.long 0x1C++0x3
line.long 0x0 "SPI_AUTOCR,SPI autonomous mode control register"
bitfld.long 0x0 21. "TRIGEN,Hardware control of CSTART triggering enable" "0: Hardware control disabled,1: Hardware control enabled"
bitfld.long 0x0 20. "TRIGPOL,Trigger polarity" "0: trigger is active on raising edge,1: trigger is active on falling edge"
newline
hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,Trigger selection (refer Section: Description of SPI interconnections)."
wgroup.long 0x20++0x3
line.long 0x0 "SPI_TxDR,SPI transmit data register"
hexmask.long 0x0 0.--31. 1. "TxDR,transmit data register"
rgroup.long 0x30++0x3
line.long 0x0 "SPI_RxDR,SPI receive data register"
hexmask.long 0x0 0.--31. 1. "RxDR,receive data register"
group.long 0x40++0x3
line.long 0x0 "SPI_CRCPOLY,SPI polynomial register"
hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register"
rgroup.long 0x44++0x7
line.long 0x0 "SPI_TxCRC,SPI transmitter CRC register"
hexmask.long 0x0 0.--31. 1. "TxCRC,CRC register for transmitter"
line.long 0x4 "SPI_RxCRC,SPI receiver CRC register"
hexmask.long 0x4 0.--31. 1. "RxCRC,CRC register for receiver"
group.long 0x4C++0x3
line.long 0x0 "SPI_UDRDR,SPI underrun data register"
hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition"
tree.end
tree.end
tree "SYSCFG (System Configuration Controller)"
base ad:0x0
tree "SYSCFG"
base ad:0x40040400
group.long 0x0++0x17
line.long 0x0 "SYSCFG_SECCFGR,SYSCFG secure configuration register"
bitfld.long 0x0 3. "FPUSEC,FPU security" "0: SYSCFG_FPUIMR can be read and written by secure..,1: SYSCFG_FPUIMR can be read and written by secure.."
bitfld.long 0x0 1. "CLASSBSEC,Class B security" "0: SYSCFG_CFGR2 can be read and written by secure..,1: SYSCFG_CFGR2 can be read and written by secure.."
newline
bitfld.long 0x0 0. "SYSCFGSEC,Security of SYSCFG clock control memory erase status and compensation cell registers" "0: SYSCFG configuration clock in RCC registers and..,1: SYSCFG configuration clock in RCC registers and.."
line.long 0x4 "SYSCFG_CFGR1,SYSCFG configuration register 1"
bitfld.long 0x4 19. "PB9_FMP,Fast-mode Plus driving capability activation on PBi" "0: PBi pin operates in standard mode.,1: Fm+ mode is enabled on PBi pin and the speed.."
bitfld.long 0x4 18. "PB8_FMP,Fast-mode Plus driving capability activation on PBi" "0: PBi pin operates in standard mode.,1: Fm+ mode is enabled on PBi pin and the speed.."
newline
bitfld.long 0x4 17. "PB7_FMP,Fast-mode Plus driving capability activation on PBi" "0: PBi pin operates in standard mode.,1: Fm+ mode is enabled on PBi pin and the speed.."
bitfld.long 0x4 16. "PB6_FMP,Fast-mode Plus driving capability activation on PBi" "0: PBi pin operates in standard mode.,1: Fm+ mode is enabled on PBi pin and the speed.."
newline
bitfld.long 0x4 9. "ANASWVDD,GPIO analog switch control voltage selection" "0: I/O analog switches are supplied by Vless..,1: I/O analog switches are supplied by Vless.."
bitfld.long 0x4 8. "BOOSTEN,I/O analog switch voltage booster enable" "0: I/O analog switches are supplied by Vless..,1: I/O analog switches are supplied by a dedicated.."
newline
bitfld.long 0x4 6.--7. "IR_MOD,IR modulation envelope signal selection" "0: TIM16,1: USART1,2: UART4,?"
bitfld.long 0x4 5. "IR_POL,IR output polarity selection" "0: Output of IRTIM (IR_OUT) is not inverted.,1: Output of IRTIM (IR_OUT) is inverted."
line.long 0x8 "SYSCFG_FPUIMR,SYSCFG FPU interrupt mask register"
bitfld.long 0x8 5. "FPU_IxIE,Floating point unit interrupt enable bit-inexact" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x8 4. "FPU_IDIE,Floating point unit interrupt enable bit-input denormal" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x8 3. "FPU_OFIE,Floating point unit interrupt enable bit-overflow" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x8 2. "FPU_UFIE,Floating point unit interrupt enable bit-underflow" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x8 1. "FPU_DZIE,Floating point unit interrupt enable bit-divide-by-zero" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x8 0. "FPU_IOIE,Floating point unit interrupt enable bit-invalid operation" "0: Interrupt disabled,1: Interrupt enabled"
line.long 0xC "SYSCFG_CNSLCKR,SYSCFG CPU nonsecure lock register"
bitfld.long 0xC 1. "LOCKNSMPU,Nonsecure MPU registers lock" "0: Nonsecure MPU register write enabled,1: Nonsecure MPU register write disabled"
bitfld.long 0xC 0. "LOCKNSVTOR,VTOR_NS register lock" "0: VTOR_NS register write enabled,1: VTOR_NS register write disabled"
line.long 0x10 "SYSCFG_CSLCKR,SYSCFG CPU secure lock register"
bitfld.long 0x10 2. "LOCKSAU,SAU register lock" "0: SAU register write enabled,1: SAU register write disabled"
bitfld.long 0x10 1. "LOCKSMPU,Secure MPU registers lock" "0: Secure MPU register writes enabled,1: Secure MPU register writes disabled"
newline
bitfld.long 0x10 0. "LOCKSVTAIRCR,VTOR_S register and AIRCR register bits lock" "0: VTOR_S register PRIS and BFHFNMINS bits in AIRCR..,1: VTOR_S register PRIS and BFHFNMINS bits in AIRCR.."
line.long 0x14 "SYSCFG_CFGR2,SYSCFG configuration register 2"
bitfld.long 0x14 3. "ECCL,ECC lock" "0: ECC double error disconnected from TIM1/15/16/17..,1: ECC double error connected to TIM1/15/16/17.."
bitfld.long 0x14 2. "PVDL,PVD lock enable bit" "0: PVD interrupt disconnected from TIM1/15/16/17..,1: PVD interrupt connected to TIM1/15/16/17 break.."
newline
bitfld.long 0x14 1. "SPL,SRAM2 parity bit" "0: SRAM double error disconnected from..,1: SRAM double error connected to TIM1/15/16/17.."
bitfld.long 0x14 0. "CLL,Cortex-M33 LOCKUP (HardFault) output enable" "0: Cortex-M33 LOCKUP output disconnected from..,1: Cortex-M33 LOCKUP output connected to.."
group.long 0x1C++0x3
line.long 0x0 "SYSCFG_CCCSR,SYSCFG compensation cell control/status register"
rbitfld.long 0x0 9. "RDY2,VDDIO2 I/O compensation cell ready flag" "0: VDDIO2 I/O compensation cell not ready,1: VDDIO2 I/O compensation cell ready"
rbitfld.long 0x0 8. "RDY1,VDD I/O compensation cell ready flag" "0: VDD I/O compensation cell not ready,1: VDD I/O compensation cell ready"
newline
bitfld.long 0x0 3. "CS2,VDDIO2 I/O code selection" "0: VDDIO2 I/O code from the cell (available in..,1: VDDIO2 I/O code from SYSCFG_CCCR"
bitfld.long 0x0 2. "EN2,VDDIO2 I/O compensation cell enable" "0: VDDIO2 I/O compensation cell disabled,1: VDDIO2 I/O compensation cell enabled"
newline
bitfld.long 0x0 1. "CS1,VDD I/O code selection" "0: VDD I/O code from the cell (available in the..,1: VDD I/O code from the SYSCFG compensation cell.."
bitfld.long 0x0 0. "EN1,VDD I/O compensation cell enable" "0: VDD I/O compensation cell disabled,1: VDD I/O compensation cell enabled"
rgroup.long 0x20++0x3
line.long 0x0 "SYSCFG_CCVR,SYSCFG compensation cell value register"
hexmask.long.byte 0x0 12.--15. 1. "PCV2,PMOS compensation value of the I/Os supplied by Vless thansub>DDIO2less than/sub>"
hexmask.long.byte 0x0 8.--11. 1. "NCV2,NMOS compensation value of the I/Os supplied by Vless thansub>DDIO2less than/sub>"
newline
hexmask.long.byte 0x0 4.--7. 1. "PCV1,PMOS compensation value of the I/Os supplied by Vless thansub>DDless than/sub>"
hexmask.long.byte 0x0 0.--3. 1. "NCV1,NMOS compensation value of the I/Os supplied by Vless thansub>DDless than/sub>"
group.long 0x24++0x3
line.long 0x0 "SYSCFG_CCCR,SYSCFG compensation cell code register"
hexmask.long.byte 0x0 12.--15. 1. "PCC2,PMOS compensation code of the I/Os supplied by Vless thansub>DDIO2less than/sub>"
hexmask.long.byte 0x0 8.--11. 1. "NCC2,NMOS compensation code of the I/Os supplied by Vless thansub>DDIO2less than/sub>"
newline
hexmask.long.byte 0x0 4.--7. 1. "PCC1,PMOS compensation code of the I/Os supplied by Vless thansub>DDless than/sub>"
hexmask.long.byte 0x0 0.--3. 1. "NCC1,NMOS compensation code of the I/Os supplied by Vless thansub>DDless than/sub>"
group.long 0x2C++0x3
line.long 0x0 "SYSCFG_RSSCMDR,SYSCFG RSS command register"
hexmask.long.word 0x0 0.--15. 1. "RSSCMD,RSS commands"
tree.end
tree "SEC_SYSCFG"
base ad:0x50040400
group.long 0x0++0x17
line.long 0x0 "SYSCFG_SECCFGR,SYSCFG secure configuration register"
bitfld.long 0x0 3. "FPUSEC,FPU security" "0: SYSCFG_FPUIMR can be read and written by secure..,1: SYSCFG_FPUIMR can be read and written by secure.."
bitfld.long 0x0 1. "CLASSBSEC,Class B security" "0: SYSCFG_CFGR2 can be read and written by secure..,1: SYSCFG_CFGR2 can be read and written by secure.."
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bitfld.long 0x0 0. "SYSCFGSEC,Security of SYSCFG clock control memory erase status and compensation cell registers" "0: SYSCFG configuration clock in RCC registers and..,1: SYSCFG configuration clock in RCC registers and.."
line.long 0x4 "SYSCFG_CFGR1,SYSCFG configuration register 1"
bitfld.long 0x4 19. "PB9_FMP,Fast-mode Plus driving capability activation on PBi" "0: PBi pin operates in standard mode.,1: Fm+ mode is enabled on PBi pin and the speed.."
bitfld.long 0x4 18. "PB8_FMP,Fast-mode Plus driving capability activation on PBi" "0: PBi pin operates in standard mode.,1: Fm+ mode is enabled on PBi pin and the speed.."
newline
bitfld.long 0x4 17. "PB7_FMP,Fast-mode Plus driving capability activation on PBi" "0: PBi pin operates in standard mode.,1: Fm+ mode is enabled on PBi pin and the speed.."
bitfld.long 0x4 16. "PB6_FMP,Fast-mode Plus driving capability activation on PBi" "0: PBi pin operates in standard mode.,1: Fm+ mode is enabled on PBi pin and the speed.."
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bitfld.long 0x4 9. "ANASWVDD,GPIO analog switch control voltage selection" "0: I/O analog switches are supplied by Vless..,1: I/O analog switches are supplied by Vless.."
bitfld.long 0x4 8. "BOOSTEN,I/O analog switch voltage booster enable" "0: I/O analog switches are supplied by Vless..,1: I/O analog switches are supplied by a dedicated.."
newline
bitfld.long 0x4 6.--7. "IR_MOD,IR modulation envelope signal selection" "0: TIM16,1: USART1,2: UART4,?"
bitfld.long 0x4 5. "IR_POL,IR output polarity selection" "0: Output of IRTIM (IR_OUT) is not inverted.,1: Output of IRTIM (IR_OUT) is inverted."
line.long 0x8 "SYSCFG_FPUIMR,SYSCFG FPU interrupt mask register"
bitfld.long 0x8 5. "FPU_IxIE,Floating point unit interrupt enable bit-inexact" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x8 4. "FPU_IDIE,Floating point unit interrupt enable bit-input denormal" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x8 3. "FPU_OFIE,Floating point unit interrupt enable bit-overflow" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x8 2. "FPU_UFIE,Floating point unit interrupt enable bit-underflow" "0: Interrupt disabled,1: Interrupt enabled"
newline
bitfld.long 0x8 1. "FPU_DZIE,Floating point unit interrupt enable bit-divide-by-zero" "0: Interrupt disabled,1: Interrupt enabled"
bitfld.long 0x8 0. "FPU_IOIE,Floating point unit interrupt enable bit-invalid operation" "0: Interrupt disabled,1: Interrupt enabled"
line.long 0xC "SYSCFG_CNSLCKR,SYSCFG CPU nonsecure lock register"
bitfld.long 0xC 1. "LOCKNSMPU,Nonsecure MPU registers lock" "0: Nonsecure MPU register write enabled,1: Nonsecure MPU register write disabled"
bitfld.long 0xC 0. "LOCKNSVTOR,VTOR_NS register lock" "0: VTOR_NS register write enabled,1: VTOR_NS register write disabled"
line.long 0x10 "SYSCFG_CSLCKR,SYSCFG CPU secure lock register"
bitfld.long 0x10 2. "LOCKSAU,SAU register lock" "0: SAU register write enabled,1: SAU register write disabled"
bitfld.long 0x10 1. "LOCKSMPU,Secure MPU registers lock" "0: Secure MPU register writes enabled,1: Secure MPU register writes disabled"
newline
bitfld.long 0x10 0. "LOCKSVTAIRCR,VTOR_S register and AIRCR register bits lock" "0: VTOR_S register PRIS and BFHFNMINS bits in AIRCR..,1: VTOR_S register PRIS and BFHFNMINS bits in AIRCR.."
line.long 0x14 "SYSCFG_CFGR2,SYSCFG configuration register 2"
bitfld.long 0x14 3. "ECCL,ECC lock" "0: ECC double error disconnected from TIM1/15/16/17..,1: ECC double error connected to TIM1/15/16/17.."
bitfld.long 0x14 2. "PVDL,PVD lock enable bit" "0: PVD interrupt disconnected from TIM1/15/16/17..,1: PVD interrupt connected to TIM1/15/16/17 break.."
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bitfld.long 0x14 1. "SPL,SRAM2 parity bit" "0: SRAM double error disconnected from..,1: SRAM double error connected to TIM1/15/16/17.."
bitfld.long 0x14 0. "CLL,Cortex-M33 LOCKUP (HardFault) output enable" "0: Cortex-M33 LOCKUP output disconnected from..,1: Cortex-M33 LOCKUP output connected to.."
group.long 0x1C++0x3
line.long 0x0 "SYSCFG_CCCSR,SYSCFG compensation cell control/status register"
rbitfld.long 0x0 9. "RDY2,VDDIO2 I/O compensation cell ready flag" "0: VDDIO2 I/O compensation cell not ready,1: VDDIO2 I/O compensation cell ready"
rbitfld.long 0x0 8. "RDY1,VDD I/O compensation cell ready flag" "0: VDD I/O compensation cell not ready,1: VDD I/O compensation cell ready"
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bitfld.long 0x0 3. "CS2,VDDIO2 I/O code selection" "0: VDDIO2 I/O code from the cell (available in..,1: VDDIO2 I/O code from SYSCFG_CCCR"
bitfld.long 0x0 2. "EN2,VDDIO2 I/O compensation cell enable" "0: VDDIO2 I/O compensation cell disabled,1: VDDIO2 I/O compensation cell enabled"
newline
bitfld.long 0x0 1. "CS1,VDD I/O code selection" "0: VDD I/O code from the cell (available in the..,1: VDD I/O code from the SYSCFG compensation cell.."
bitfld.long 0x0 0. "EN1,VDD I/O compensation cell enable" "0: VDD I/O compensation cell disabled,1: VDD I/O compensation cell enabled"
rgroup.long 0x20++0x3
line.long 0x0 "SYSCFG_CCVR,SYSCFG compensation cell value register"
hexmask.long.byte 0x0 12.--15. 1. "PCV2,PMOS compensation value of the I/Os supplied by Vless thansub>DDIO2less than/sub>"
hexmask.long.byte 0x0 8.--11. 1. "NCV2,NMOS compensation value of the I/Os supplied by Vless thansub>DDIO2less than/sub>"
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hexmask.long.byte 0x0 4.--7. 1. "PCV1,PMOS compensation value of the I/Os supplied by Vless thansub>DDless than/sub>"
hexmask.long.byte 0x0 0.--3. 1. "NCV1,NMOS compensation value of the I/Os supplied by Vless thansub>DDless than/sub>"
group.long 0x24++0x3
line.long 0x0 "SYSCFG_CCCR,SYSCFG compensation cell code register"
hexmask.long.byte 0x0 12.--15. 1. "PCC2,PMOS compensation code of the I/Os supplied by Vless thansub>DDIO2less than/sub>"
hexmask.long.byte 0x0 8.--11. 1. "NCC2,NMOS compensation code of the I/Os supplied by Vless thansub>DDIO2less than/sub>"
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hexmask.long.byte 0x0 4.--7. 1. "PCC1,PMOS compensation code of the I/Os supplied by Vless thansub>DDless than/sub>"
hexmask.long.byte 0x0 0.--3. 1. "NCC1,NMOS compensation code of the I/Os supplied by Vless thansub>DDless than/sub>"
group.long 0x2C++0x3
line.long 0x0 "SYSCFG_RSSCMDR,SYSCFG RSS command register"
hexmask.long.word 0x0 0.--15. 1. "RSSCMD,RSS commands"
tree.end
tree.end
tree "TAMP (Tamper and Backup Registers)"
base ad:0x0
tree "TAMP"
base ad:0x40007C00
group.long 0x0++0xF
line.long 0x0 "TAMP_CR1,TAMP control register 1"
bitfld.long 0x0 28. "ITAMP13E,Internal tamper i enable" "0: Internal tamper i disabled,1: Internal tamper i enabled"
bitfld.long 0x0 27. "ITAMP12E,Internal tamper i enable" "0: Internal tamper i disabled,1: Internal tamper i enabled"
newline
bitfld.long 0x0 26. "ITAMP11E,Internal tamper i enable" "0: Internal tamper i disabled,1: Internal tamper i enabled"
bitfld.long 0x0 24. "ITAMP9E,Internal tamper i enable" "0: Internal tamper i disabled,1: Internal tamper i enabled"
newline
bitfld.long 0x0 23. "ITAMP8E,Internal tamper i enable" "0: Internal tamper i disabled,1: Internal tamper i enabled"
bitfld.long 0x0 22. "ITAMP7E,Internal tamper i enable" "0: Internal tamper i disabled,1: Internal tamper i enabled"
newline
bitfld.long 0x0 21. "ITAMP6E,Internal tamper i enable" "0: Internal tamper i disabled,1: Internal tamper i enabled"
bitfld.long 0x0 20. "ITAMP5E,Internal tamper i enable" "0: Internal tamper i disabled,1: Internal tamper i enabled"
newline
bitfld.long 0x0 18. "ITAMP3E,Internal tamper 3 enable" "0: Internal tamper 3 disabled,1: Internal tamper 3 enabled"
bitfld.long 0x0 4. "TAMP5E,Tamper detection on TAMP_INi enable" "0: Tamper detection on TAMP_INi disabled,1: Tamper detection on TAMP_INi enabled"
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bitfld.long 0x0 3. "TAMP4E,Tamper detection on TAMP_INi enable" "0: Tamper detection on TAMP_INi disabled,1: Tamper detection on TAMP_INi enabled"
bitfld.long 0x0 2. "TAMP3E,Tamper detection on TAMP_INi enable" "0: Tamper detection on TAMP_INi disabled,1: Tamper detection on TAMP_INi enabled"
newline
bitfld.long 0x0 1. "TAMP2E,Tamper detection on TAMP_INi enable" "0: Tamper detection on TAMP_INi disabled,1: Tamper detection on TAMP_INi enabled"
bitfld.long 0x0 0. "TAMP1E,Tamper detection on TAMP_INi enable" "0: Tamper detection on TAMP_INi disabled,1: Tamper detection on TAMP_INi enabled"
line.long 0x4 "TAMP_CR2,TAMP control register 2"
bitfld.long 0x4 28. "TAMP5TRG,Active level for tamper 5 input" "0: If TAMPFLT[1:0] different 00 the tamper i input..,1: If TAMPFLT[1:0] different 00 the tamper i input.."
bitfld.long 0x4 27. "TAMP4TRG,Active level for tamper 5 input" "0: If TAMPFLT[1:0] different 00 the tamper i input..,1: If TAMPFLT[1:0] different 00 the tamper i input.."
newline
bitfld.long 0x4 26. "TAMP3TRG,Active level for tamper 5 input" "0: If TAMPFLT[1:0] different 00 the tamper i input..,1: If TAMPFLT[1:0] different 00 the tamper i input.."
bitfld.long 0x4 25. "TAMP2TRG,Active level for tamper 5 input" "0: If TAMPFLT[1:0] different 00 the tamper i input..,1: If TAMPFLT[1:0] different 00 the tamper i input.."
newline
bitfld.long 0x4 24. "TAMP1TRG,Active level for tamper 5 input" "0: If TAMPFLT[1:0] different 00 the tamper i input..,1: If TAMPFLT[1:0] different 00 the tamper i input.."
bitfld.long 0x4 23. "BKERASE,Software confirmed tamper" "0,1"
newline
bitfld.long 0x4 22. "BKBLOCK,Software potential tamper" "0: Backup registers and device secrets can be..,1: Backup registers and device secrets cannot be.."
bitfld.long 0x4 18. "TAMP3MSK,Tamper i mask" "0: Tamper i event generates a trigger event and..,1: Tamper i event generates a trigger event."
newline
bitfld.long 0x4 17. "TAMP2MSK,Tamper i mask" "0: Tamper i event generates a trigger event and..,1: Tamper i event generates a trigger event."
bitfld.long 0x4 16. "TAMP1MSK,Tamper i mask" "0: Tamper i event generates a trigger event and..,1: Tamper i event generates a trigger event."
newline
bitfld.long 0x4 4. "TAMP5POM,Tamper i potential mode" "0: Tamper i event detection is in confirmed mode.,1: Tamper i event detection is in potential mode."
bitfld.long 0x4 3. "TAMP4POM,Tamper i potential mode" "0: Tamper i event detection is in confirmed mode.,1: Tamper i event detection is in potential mode."
newline
bitfld.long 0x4 2. "TAMP3POM,Tamper i potential mode" "0: Tamper i event detection is in confirmed mode.,1: Tamper i event detection is in potential mode."
bitfld.long 0x4 1. "TAMP2POM,Tamper i potential mode" "0: Tamper i event detection is in confirmed mode.,1: Tamper i event detection is in potential mode."
newline
bitfld.long 0x4 0. "TAMP1POM,Tamper i potential mode" "0: Tamper i event detection is in confirmed mode.,1: Tamper i event detection is in potential mode."
line.long 0x8 "TAMP_CR3,TAMP control register 3"
bitfld.long 0x8 12. "ITAMP13POM,Internal tamper i potential mode" "0: Internal tamper i event detection is in..,1: Internal tamper i event detection is in.."
bitfld.long 0x8 11. "ITAMP12POM,Internal tamper i potential mode" "0: Internal tamper i event detection is in..,1: Internal tamper i event detection is in.."
newline
bitfld.long 0x8 10. "ITAMP11POM,Internal tamper i potential mode" "0: Internal tamper i event detection is in..,1: Internal tamper i event detection is in.."
bitfld.long 0x8 8. "ITAMP9POM,Internal tamper i potential mode" "0: Internal tamper i event detection is in..,1: Internal tamper i event detection is in.."
newline
bitfld.long 0x8 7. "ITAMP8POM,Internal tamper i potential mode" "0: Internal tamper i event detection is in..,1: Internal tamper i event detection is in.."
bitfld.long 0x8 6. "ITAMP7POM,Internal tamper i potential mode" "0: Internal tamper i event detection is in..,1: Internal tamper i event detection is in.."
newline
bitfld.long 0x8 5. "ITAMP6POM,Internal tamper i potential mode" "0: Internal tamper i event detection is in..,1: Internal tamper i event detection is in.."
bitfld.long 0x8 4. "ITAMP5POM,Internal tamper i potential mode" "0: Internal tamper i event detection is in..,1: Internal tamper i event detection is in.."
newline
bitfld.long 0x8 2. "ITAMP3POM,Internal tamper 3 potential mode" "0: Internal tamper 3 event detection is in..,1: Internal tamper 3 event detection is in.."
line.long 0xC "TAMP_FLTCR,TAMP filter control register"
bitfld.long 0xC 7. "TAMPPUDIS,TAMP_INx pull-up disable" "0: Precharges TAMP_INx pins before sampling (enable..,1: Disables precharge of TAMP_INx pins."
bitfld.long 0xC 5.--6. "TAMPPRCH,TAMP_INx precharge duration" "0: 1 RTCCLK cycle,1: 2 RTCCLK cycles,2: 4 RTCCLK cycles,3: 8 RTCCLK cycles"
newline
bitfld.long 0xC 3.--4. "TAMPFLT,TAMP_INx filter count" "0: Tamper event is activated on edge of TAMP_INx..,1: Tamper event is activated after two consecutive..,2: Tamper event is activated after four consecutive..,3: Tamper event is activated after eight.."
bitfld.long 0xC 0.--2. "TAMPFREQ,Tamper sampling frequency" "0: RTCCLK / 32768 (1 Hz when RTCCLK = 32768 Hz),1: RTCCLK / 16384 (2 Hz when RTCCLK = 32768 Hz),2: RTCCLK / 8192 (4 Hz when RTCCLK = 32768 Hz),3: RTCCLK / 4096 (8 Hz when RTCCLK = 32768 Hz),4: RTCCLK / 2048 (16 Hz when RTCCLK = 32768 Hz),5: RTCCLK / 1024 (32 Hz when RTCCLK = 32768 Hz),6: RTCCLK / 512 (64 Hz when RTCCLK = 32768 Hz),7: RTCCLK / 256 (128 Hz when RTCCLK = 32768 Hz)"
group.long 0x20++0x7
line.long 0x0 "TAMP_SECCFGR,TAMP secure configuration register"
bitfld.long 0x0 31. "TAMPSEC,Tamper protection (excluding monotonic counters and backup registers)" "0: Tamper configuration and interrupt can be..,1: Tamper configuration and interrupt can be.."
bitfld.long 0x0 30. "BHKLOCK,Boot hardware key lock" "0: Backup registers from TAMP_BKP0R to TAMP_BKP7R..,1: Backup registers from TAMP_BKP0R to TAMP_BKP7R.."
newline
hexmask.long.byte 0x0 16.--23. 1. "BKPWSEC,Backup register write protection offset"
bitfld.long 0x0 15. "CNT1SEC,Monotonic counter 1 secure protection" "0: Monotonic counter 1 (TAMP_COUNT1R) can be read..,1: Monotonic counter 1 (TAMP_COUNT1R) can be read.."
newline
hexmask.long.byte 0x0 0.--7. 1. "BKPRWSEC,Backup register read/write protection offset"
line.long 0x4 "TAMP_PRIVCFGR,TAMP privileged configuration register"
bitfld.long 0x4 31. "TAMPPRIV,Tamper privileged protection (excluding backup registers)" "0: Tamper configuration and interrupt can be..,1: Tamper configuration and interrupt can be.."
bitfld.long 0x4 30. "BKPWPRIV,Backup registers zone 2 privileged protection" "0: Backup registers zone 2 can be written with..,1: Backup registers zone 2 can be written only with.."
newline
bitfld.long 0x4 29. "BKPRWPRIV,Backup registers zone 1 privileged protection" "0: Backup registers zone 1 can be written with..,1: Backup registers zone 1 can be written only with.."
bitfld.long 0x4 15. "CNT1PRIV,Monotonic counter 1 privileged protection" "0: Monotonic counter 1 (TAMP_COUNT1R) can be read..,1: Monotonic counter 1 (TAMP_COUNT1R) can be read.."
group.long 0x2C++0xB
line.long 0x0 "TAMP_IER,TAMP interrupt enable register"
bitfld.long 0x0 28. "ITAMP13IE,Internal tamper i interrupt enable" "0: Internal tamper i interrupt disabled,1: Internal tamper i interrupt enabled"
bitfld.long 0x0 27. "ITAMP12IE,Internal tamper i interrupt enable" "0: Internal tamper i interrupt disabled,1: Internal tamper i interrupt enabled"
newline
bitfld.long 0x0 26. "ITAMP11IE,Internal tamper i interrupt enable" "0: Internal tamper i interrupt disabled,1: Internal tamper i interrupt enabled"
bitfld.long 0x0 24. "ITAMP9IE,Internal tamper i interrupt enable" "0: Internal tamper i interrupt disabled,1: Internal tamper i interrupt enabled"
newline
bitfld.long 0x0 23. "ITAMP8IE,Internal tamper i interrupt enable" "0: Internal tamper i interrupt disabled,1: Internal tamper i interrupt enabled"
bitfld.long 0x0 22. "ITAMP7IE,Internal tamper i interrupt enable" "0: Internal tamper i interrupt disabled,1: Internal tamper i interrupt enabled"
newline
bitfld.long 0x0 21. "ITAMP6IE,Internal tamper i interrupt enable" "0: Internal tamper i interrupt disabled,1: Internal tamper i interrupt enabled"
bitfld.long 0x0 20. "ITAMP5IE,Internal tamper i interrupt enable" "0: Internal tamper i interrupt disabled,1: Internal tamper i interrupt enabled"
newline
bitfld.long 0x0 18. "ITAMP3IE,Internal tamper 3 interrupt enable" "0: Internal tamper 3 interrupt disabled,1: Internal tamper 3 interrupt enabled"
bitfld.long 0x0 4. "TAMP5IE,Tamper i interrupt enable" "0: Tamper i interrupt disabled,1: Tamper i interrupt enabled"
newline
bitfld.long 0x0 3. "TAMP4IE,Tamper i interrupt enable" "0: Tamper i interrupt disabled,1: Tamper i interrupt enabled"
bitfld.long 0x0 2. "TAMP3IE,Tamper i interrupt enable" "0: Tamper i interrupt disabled,1: Tamper i interrupt enabled"
newline
bitfld.long 0x0 1. "TAMP2IE,Tamper i interrupt enable" "0: Tamper i interrupt disabled,1: Tamper i interrupt enabled"
bitfld.long 0x0 0. "TAMP1IE,Tamper i interrupt enable" "0: Tamper i interrupt disabled,1: Tamper i interrupt enabled"
line.long 0x4 "TAMP_SR,TAMP status register"
bitfld.long 0x4 28. "ITAMP13F,Internal tamper i detection flag" "0,1"
bitfld.long 0x4 27. "ITAMP12F,Internal tamper i detection flag" "0,1"
newline
bitfld.long 0x4 26. "ITAMP11F,Internal tamper i detection flag" "0,1"
bitfld.long 0x4 24. "ITAMP9F,Internal tamper i detection flag" "0,1"
newline
bitfld.long 0x4 23. "ITAMP8F,Internal tamper i detection flag" "0,1"
bitfld.long 0x4 22. "ITAMP7F,Internal tamper i detection flag" "0,1"
newline
bitfld.long 0x4 21. "ITAMP6F,Internal tamper i detection flag" "0,1"
bitfld.long 0x4 20. "ITAMP5F,Internal tamper i detection flag" "0,1"
newline
bitfld.long 0x4 18. "ITAMP3F,Internal tamper 3 detection flag" "0,1"
bitfld.long 0x4 4. "TAMP5F,Tamper i detection flag" "0,1"
newline
bitfld.long 0x4 3. "TAMP4F,Tamper i detection flag" "0,1"
bitfld.long 0x4 2. "TAMP3F,Tamper i detection flag" "0,1"
newline
bitfld.long 0x4 1. "TAMP2F,Tamper i detection flag" "0,1"
bitfld.long 0x4 0. "TAMP1F,Tamper i detection flag" "0,1"
line.long 0x8 "TAMP_MISR,TAMP nonsecure masked interrupt status register"
bitfld.long 0x8 28. "ITAMP13MF,Internal tamper i nonsecure interrupt masked flag" "0,1"
bitfld.long 0x8 27. "ITAMP12MF,Internal tamper i nonsecure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 26. "ITAMP11MF,Internal tamper i nonsecure interrupt masked flag" "0,1"
bitfld.long 0x8 24. "ITAMP9MF,Internal tamper i nonsecure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 23. "ITAMP8MF,Internal tamper i nonsecure interrupt masked flag" "0,1"
bitfld.long 0x8 22. "ITAMP7MF,Internal tamper i nonsecure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 21. "ITAMP6MF,Internal tamper i nonsecure interrupt masked flag" "0,1"
bitfld.long 0x8 20. "ITAMP5MF,Internal tamper i nonsecure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 18. "ITAMP3MF,Internal tamper 3 nonsecure interrupt masked flag" "0,1"
bitfld.long 0x8 4. "TAMP5MF,Tamper i nonsecure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 3. "TAMP4MF,Tamper i nonsecure interrupt masked flag" "0,1"
bitfld.long 0x8 2. "TAMP3MF,Tamper i nonsecure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 1. "TAMP2MF,Tamper i nonsecure interrupt masked flag" "0,1"
bitfld.long 0x8 0. "TAMP1MF,Tamper i nonsecure interrupt masked flag" "0,1"
group.long 0x34++0x3
line.long 0x0 "TAMP_SMISR,TAMP secure masked interrupt status register"
bitfld.long 0x0 28. "ITAMP13MF,Internal tamper i secure interrupt masked flag" "0,1"
bitfld.long 0x0 27. "ITAMP12MF,Internal tamper i secure interrupt masked flag" "0,1"
newline
bitfld.long 0x0 26. "ITAMP11MF,Internal tamper i secure interrupt masked flag" "0,1"
bitfld.long 0x0 24. "ITAMP9MF,Internal tamper i secure interrupt masked flag" "0,1"
newline
bitfld.long 0x0 23. "ITAMP8MF,Internal tamper i secure interrupt masked flag" "0,1"
bitfld.long 0x0 22. "ITAMP7MF,Internal tamper i secure interrupt masked flag" "0,1"
newline
bitfld.long 0x0 21. "ITAMP6MF,Internal tamper i secure interrupt masked flag" "0,1"
bitfld.long 0x0 20. "ITAMP5MF,Internal tamper i secure interrupt masked flag" "0,1"
newline
bitfld.long 0x0 18. "ITAMP3MF,Internal tamper 3 secure interrupt masked flag" "0,1"
bitfld.long 0x0 4. "TAMP5MF,Tamper i secure interrupt masked flag" "0,1"
newline
bitfld.long 0x0 3. "TAMP4MF,Tamper i secure interrupt masked flag" "0,1"
bitfld.long 0x0 2. "TAMP3MF,Tamper i secure interrupt masked flag" "0,1"
newline
bitfld.long 0x0 1. "TAMP2MF,Tamper i secure interrupt masked flag" "0,1"
bitfld.long 0x0 0. "TAMP1MF,Tamper i secure interrupt masked flag" "0,1"
group.long 0x3C++0x3
line.long 0x0 "TAMP_SCR,TAMP status clear register"
bitfld.long 0x0 28. "CITAMP13F,Internal tamper i detection flag clear" "0,1"
bitfld.long 0x0 27. "CITAMP12F,Internal tamper i detection flag clear" "0,1"
newline
bitfld.long 0x0 26. "CITAMP11F,Internal tamper i detection flag clear" "0,1"
bitfld.long 0x0 24. "CITAMP9F,Internal tamper i detection flag clear" "0,1"
newline
bitfld.long 0x0 23. "CITAMP8F,Internal tamper i detection flag clear" "0,1"
bitfld.long 0x0 22. "CITAMP7F,Internal tamper i detection flag clear" "0,1"
newline
bitfld.long 0x0 21. "CITAMP6F,Internal tamper i detection flag clear" "0,1"
bitfld.long 0x0 20. "CITAMP5F,Internal tamper i detection flag clear" "0,1"
newline
bitfld.long 0x0 18. "CITAMP3F,Internal tamper 3 detectionflag clear" "0,1"
bitfld.long 0x0 4. "CTAMP5F,Tamper i detection flag clear" "0,1"
newline
bitfld.long 0x0 3. "CTAMP4F,Tamper i detection flag clear" "0,1"
bitfld.long 0x0 2. "CTAMP3F,Tamper i detection flag clear" "0,1"
newline
bitfld.long 0x0 1. "CTAMP2F,Tamper i detection flag clear" "0,1"
bitfld.long 0x0 0. "CTAMP1F,Tamper i detection flag clear" "0,1"
rgroup.long 0x40++0x3
line.long 0x0 "TAMP_COUNT1R,TAMP monotonic counter 1 register"
hexmask.long 0x0 0.--31. 1. "COUNT,Monotonic counter"
group.long 0x54++0x3
line.long 0x0 "TAMP_RPCFGR,TAMP resource protection register"
bitfld.long 0x0 31. "RPCFG31,Backup register protection" "0: Backup registers and BHKLOCK are not included in..,1: Backup registers and BHKLOCK are included in.."
bitfld.long 0x0 5. "RPCFG5,Configurable resource i protection" "0: Resource i is not included in device secrets..,1: Resource i is included in device secrets.."
newline
bitfld.long 0x0 4. "RPCFG4,Configurable resource i protection" "0: Resource i is not included in device secrets..,1: Resource i is included in device secrets.."
bitfld.long 0x0 3. "RPCFG3,Configurable resource i protection" "0: Resource i is not included in device secrets..,1: Resource i is included in device secrets.."
newline
bitfld.long 0x0 2. "RPCFG2,Configurable resource i protection" "0: Resource i is not included in device secrets..,1: Resource i is included in device secrets.."
bitfld.long 0x0 1. "RPCFG1,Configurable resource i protection" "0: Resource i is not included in device secrets..,1: Resource i is included in device secrets.."
rgroup.long 0x100++0x7F
line.long 0x0 "TAMP_BKP0R,TAMP backup 0 register"
hexmask.long 0x0 0.--31. 1. "BKP,Backup data"
line.long 0x4 "TAMP_BKP1R,TAMP backup 1 register"
hexmask.long 0x4 0.--31. 1. "BKP,Backup data"
line.long 0x8 "TAMP_BKP2R,TAMP backup 2 register"
hexmask.long 0x8 0.--31. 1. "BKP,Backup data"
line.long 0xC "TAMP_BKP3R,TAMP backup 3 register"
hexmask.long 0xC 0.--31. 1. "BKP,Backup data"
line.long 0x10 "TAMP_BKP4R,TAMP backup 4 register"
hexmask.long 0x10 0.--31. 1. "BKP,Backup data"
line.long 0x14 "TAMP_BKP5R,TAMP backup 5 register"
hexmask.long 0x14 0.--31. 1. "BKP,Backup data"
line.long 0x18 "TAMP_BKP6R,TAMP backup 6 register"
hexmask.long 0x18 0.--31. 1. "BKP,Backup data"
line.long 0x1C "TAMP_BKP7R,TAMP backup 7 register"
hexmask.long 0x1C 0.--31. 1. "BKP,Backup data"
line.long 0x20 "TAMP_BKP8R,TAMP backup 8 register"
hexmask.long 0x20 0.--31. 1. "BKP,Backup data"
line.long 0x24 "TAMP_BKP9R,TAMP backup 9 register"
hexmask.long 0x24 0.--31. 1. "BKP,Backup data"
line.long 0x28 "TAMP_BKP10R,TAMP backup 10 register"
hexmask.long 0x28 0.--31. 1. "BKP,Backup data"
line.long 0x2C "TAMP_BKP11R,TAMP backup 11 register"
hexmask.long 0x2C 0.--31. 1. "BKP,Backup data"
line.long 0x30 "TAMP_BKP12R,TAMP backup 12 register"
hexmask.long 0x30 0.--31. 1. "BKP,Backup data"
line.long 0x34 "TAMP_BKP13R,TAMP backup 13 register"
hexmask.long 0x34 0.--31. 1. "BKP,Backup data"
line.long 0x38 "TAMP_BKP14R,TAMP backup 14 register"
hexmask.long 0x38 0.--31. 1. "BKP,Backup data"
line.long 0x3C "TAMP_BKP15R,TAMP backup 15 register"
hexmask.long 0x3C 0.--31. 1. "BKP,Backup data"
line.long 0x40 "TAMP_BKP16R,TAMP backup 16 register"
hexmask.long 0x40 0.--31. 1. "BKP,Backup data"
line.long 0x44 "TAMP_BKP17R,TAMP backup 17 register"
hexmask.long 0x44 0.--31. 1. "BKP,Backup data"
line.long 0x48 "TAMP_BKP18R,TAMP backup 18 register"
hexmask.long 0x48 0.--31. 1. "BKP,Backup data"
line.long 0x4C "TAMP_BKP19R,TAMP backup 19 register"
hexmask.long 0x4C 0.--31. 1. "BKP,Backup data"
line.long 0x50 "TAMP_BKP20R,TAMP backup 20 register"
hexmask.long 0x50 0.--31. 1. "BKP,Backup data"
line.long 0x54 "TAMP_BKP21R,TAMP backup 21 register"
hexmask.long 0x54 0.--31. 1. "BKP,Backup data"
line.long 0x58 "TAMP_BKP22R,TAMP backup 22 register"
hexmask.long 0x58 0.--31. 1. "BKP,Backup data"
line.long 0x5C "TAMP_BKP23R,TAMP backup 23 register"
hexmask.long 0x5C 0.--31. 1. "BKP,Backup data"
line.long 0x60 "TAMP_BKP24R,TAMP backup 24 register"
hexmask.long 0x60 0.--31. 1. "BKP,Backup data"
line.long 0x64 "TAMP_BKP25R,TAMP backup 25 register"
hexmask.long 0x64 0.--31. 1. "BKP,Backup data"
line.long 0x68 "TAMP_BKP26R,TAMP backup 26 register"
hexmask.long 0x68 0.--31. 1. "BKP,Backup data"
line.long 0x6C "TAMP_BKP27R,TAMP backup 27 register"
hexmask.long 0x6C 0.--31. 1. "BKP,Backup data"
line.long 0x70 "TAMP_BKP28R,TAMP backup 28 register"
hexmask.long 0x70 0.--31. 1. "BKP,Backup data"
line.long 0x74 "TAMP_BKP29R,TAMP backup 29 register"
hexmask.long 0x74 0.--31. 1. "BKP,Backup data"
line.long 0x78 "TAMP_BKP30R,TAMP backup 30 register"
hexmask.long 0x78 0.--31. 1. "BKP,Backup data"
line.long 0x7C "TAMP_BKP31R,TAMP backup 31 register"
hexmask.long 0x7C 0.--31. 1. "BKP,Backup data"
tree.end
tree "SEC_TAMP"
base ad:0x50007C00
group.long 0x0++0xF
line.long 0x0 "TAMP_CR1,TAMP control register 1"
bitfld.long 0x0 28. "ITAMP13E,Internal tamper i enable" "0: Internal tamper i disabled,1: Internal tamper i enabled"
bitfld.long 0x0 27. "ITAMP12E,Internal tamper i enable" "0: Internal tamper i disabled,1: Internal tamper i enabled"
newline
bitfld.long 0x0 26. "ITAMP11E,Internal tamper i enable" "0: Internal tamper i disabled,1: Internal tamper i enabled"
bitfld.long 0x0 24. "ITAMP9E,Internal tamper i enable" "0: Internal tamper i disabled,1: Internal tamper i enabled"
newline
bitfld.long 0x0 23. "ITAMP8E,Internal tamper i enable" "0: Internal tamper i disabled,1: Internal tamper i enabled"
bitfld.long 0x0 22. "ITAMP7E,Internal tamper i enable" "0: Internal tamper i disabled,1: Internal tamper i enabled"
newline
bitfld.long 0x0 21. "ITAMP6E,Internal tamper i enable" "0: Internal tamper i disabled,1: Internal tamper i enabled"
bitfld.long 0x0 20. "ITAMP5E,Internal tamper i enable" "0: Internal tamper i disabled,1: Internal tamper i enabled"
newline
bitfld.long 0x0 18. "ITAMP3E,Internal tamper 3 enable" "0: Internal tamper 3 disabled,1: Internal tamper 3 enabled"
bitfld.long 0x0 4. "TAMP5E,Tamper detection on TAMP_INi enable" "0: Tamper detection on TAMP_INi disabled,1: Tamper detection on TAMP_INi enabled"
newline
bitfld.long 0x0 3. "TAMP4E,Tamper detection on TAMP_INi enable" "0: Tamper detection on TAMP_INi disabled,1: Tamper detection on TAMP_INi enabled"
bitfld.long 0x0 2. "TAMP3E,Tamper detection on TAMP_INi enable" "0: Tamper detection on TAMP_INi disabled,1: Tamper detection on TAMP_INi enabled"
newline
bitfld.long 0x0 1. "TAMP2E,Tamper detection on TAMP_INi enable" "0: Tamper detection on TAMP_INi disabled,1: Tamper detection on TAMP_INi enabled"
bitfld.long 0x0 0. "TAMP1E,Tamper detection on TAMP_INi enable" "0: Tamper detection on TAMP_INi disabled,1: Tamper detection on TAMP_INi enabled"
line.long 0x4 "TAMP_CR2,TAMP control register 2"
bitfld.long 0x4 28. "TAMP5TRG,Active level for tamper 5 input" "0: If TAMPFLT[1:0] different 00 the tamper i input..,1: If TAMPFLT[1:0] different 00 the tamper i input.."
bitfld.long 0x4 27. "TAMP4TRG,Active level for tamper 5 input" "0: If TAMPFLT[1:0] different 00 the tamper i input..,1: If TAMPFLT[1:0] different 00 the tamper i input.."
newline
bitfld.long 0x4 26. "TAMP3TRG,Active level for tamper 5 input" "0: If TAMPFLT[1:0] different 00 the tamper i input..,1: If TAMPFLT[1:0] different 00 the tamper i input.."
bitfld.long 0x4 25. "TAMP2TRG,Active level for tamper 5 input" "0: If TAMPFLT[1:0] different 00 the tamper i input..,1: If TAMPFLT[1:0] different 00 the tamper i input.."
newline
bitfld.long 0x4 24. "TAMP1TRG,Active level for tamper 5 input" "0: If TAMPFLT[1:0] different 00 the tamper i input..,1: If TAMPFLT[1:0] different 00 the tamper i input.."
bitfld.long 0x4 23. "BKERASE,Software confirmed tamper" "0,1"
newline
bitfld.long 0x4 22. "BKBLOCK,Software potential tamper" "0: Backup registers and device secrets can be..,1: Backup registers and device secrets cannot be.."
bitfld.long 0x4 18. "TAMP3MSK,Tamper i mask" "0: Tamper i event generates a trigger event and..,1: Tamper i event generates a trigger event."
newline
bitfld.long 0x4 17. "TAMP2MSK,Tamper i mask" "0: Tamper i event generates a trigger event and..,1: Tamper i event generates a trigger event."
bitfld.long 0x4 16. "TAMP1MSK,Tamper i mask" "0: Tamper i event generates a trigger event and..,1: Tamper i event generates a trigger event."
newline
bitfld.long 0x4 4. "TAMP5POM,Tamper i potential mode" "0: Tamper i event detection is in confirmed mode.,1: Tamper i event detection is in potential mode."
bitfld.long 0x4 3. "TAMP4POM,Tamper i potential mode" "0: Tamper i event detection is in confirmed mode.,1: Tamper i event detection is in potential mode."
newline
bitfld.long 0x4 2. "TAMP3POM,Tamper i potential mode" "0: Tamper i event detection is in confirmed mode.,1: Tamper i event detection is in potential mode."
bitfld.long 0x4 1. "TAMP2POM,Tamper i potential mode" "0: Tamper i event detection is in confirmed mode.,1: Tamper i event detection is in potential mode."
newline
bitfld.long 0x4 0. "TAMP1POM,Tamper i potential mode" "0: Tamper i event detection is in confirmed mode.,1: Tamper i event detection is in potential mode."
line.long 0x8 "TAMP_CR3,TAMP control register 3"
bitfld.long 0x8 12. "ITAMP13POM,Internal tamper i potential mode" "0: Internal tamper i event detection is in..,1: Internal tamper i event detection is in.."
bitfld.long 0x8 11. "ITAMP12POM,Internal tamper i potential mode" "0: Internal tamper i event detection is in..,1: Internal tamper i event detection is in.."
newline
bitfld.long 0x8 10. "ITAMP11POM,Internal tamper i potential mode" "0: Internal tamper i event detection is in..,1: Internal tamper i event detection is in.."
bitfld.long 0x8 8. "ITAMP9POM,Internal tamper i potential mode" "0: Internal tamper i event detection is in..,1: Internal tamper i event detection is in.."
newline
bitfld.long 0x8 7. "ITAMP8POM,Internal tamper i potential mode" "0: Internal tamper i event detection is in..,1: Internal tamper i event detection is in.."
bitfld.long 0x8 6. "ITAMP7POM,Internal tamper i potential mode" "0: Internal tamper i event detection is in..,1: Internal tamper i event detection is in.."
newline
bitfld.long 0x8 5. "ITAMP6POM,Internal tamper i potential mode" "0: Internal tamper i event detection is in..,1: Internal tamper i event detection is in.."
bitfld.long 0x8 4. "ITAMP5POM,Internal tamper i potential mode" "0: Internal tamper i event detection is in..,1: Internal tamper i event detection is in.."
newline
bitfld.long 0x8 2. "ITAMP3POM,Internal tamper 3 potential mode" "0: Internal tamper 3 event detection is in..,1: Internal tamper 3 event detection is in.."
line.long 0xC "TAMP_FLTCR,TAMP filter control register"
bitfld.long 0xC 7. "TAMPPUDIS,TAMP_INx pull-up disable" "0: Precharges TAMP_INx pins before sampling (enable..,1: Disables precharge of TAMP_INx pins."
bitfld.long 0xC 5.--6. "TAMPPRCH,TAMP_INx precharge duration" "0: 1 RTCCLK cycle,1: 2 RTCCLK cycles,2: 4 RTCCLK cycles,3: 8 RTCCLK cycles"
newline
bitfld.long 0xC 3.--4. "TAMPFLT,TAMP_INx filter count" "0: Tamper event is activated on edge of TAMP_INx..,1: Tamper event is activated after two consecutive..,2: Tamper event is activated after four consecutive..,3: Tamper event is activated after eight.."
bitfld.long 0xC 0.--2. "TAMPFREQ,Tamper sampling frequency" "0: RTCCLK / 32768 (1 Hz when RTCCLK = 32768 Hz),1: RTCCLK / 16384 (2 Hz when RTCCLK = 32768 Hz),2: RTCCLK / 8192 (4 Hz when RTCCLK = 32768 Hz),3: RTCCLK / 4096 (8 Hz when RTCCLK = 32768 Hz),4: RTCCLK / 2048 (16 Hz when RTCCLK = 32768 Hz),5: RTCCLK / 1024 (32 Hz when RTCCLK = 32768 Hz),6: RTCCLK / 512 (64 Hz when RTCCLK = 32768 Hz),7: RTCCLK / 256 (128 Hz when RTCCLK = 32768 Hz)"
group.long 0x20++0x7
line.long 0x0 "TAMP_SECCFGR,TAMP secure configuration register"
bitfld.long 0x0 31. "TAMPSEC,Tamper protection (excluding monotonic counters and backup registers)" "0: Tamper configuration and interrupt can be..,1: Tamper configuration and interrupt can be.."
bitfld.long 0x0 30. "BHKLOCK,Boot hardware key lock" "0: Backup registers from TAMP_BKP0R to TAMP_BKP7R..,1: Backup registers from TAMP_BKP0R to TAMP_BKP7R.."
newline
hexmask.long.byte 0x0 16.--23. 1. "BKPWSEC,Backup register write protection offset"
bitfld.long 0x0 15. "CNT1SEC,Monotonic counter 1 secure protection" "0: Monotonic counter 1 (TAMP_COUNT1R) can be read..,1: Monotonic counter 1 (TAMP_COUNT1R) can be read.."
newline
hexmask.long.byte 0x0 0.--7. 1. "BKPRWSEC,Backup register read/write protection offset"
line.long 0x4 "TAMP_PRIVCFGR,TAMP privileged configuration register"
bitfld.long 0x4 31. "TAMPPRIV,Tamper privileged protection (excluding backup registers)" "0: Tamper configuration and interrupt can be..,1: Tamper configuration and interrupt can be.."
bitfld.long 0x4 30. "BKPWPRIV,Backup registers zone 2 privileged protection" "0: Backup registers zone 2 can be written with..,1: Backup registers zone 2 can be written only with.."
newline
bitfld.long 0x4 29. "BKPRWPRIV,Backup registers zone 1 privileged protection" "0: Backup registers zone 1 can be written with..,1: Backup registers zone 1 can be written only with.."
bitfld.long 0x4 15. "CNT1PRIV,Monotonic counter 1 privileged protection" "0: Monotonic counter 1 (TAMP_COUNT1R) can be read..,1: Monotonic counter 1 (TAMP_COUNT1R) can be read.."
group.long 0x2C++0xB
line.long 0x0 "TAMP_IER,TAMP interrupt enable register"
bitfld.long 0x0 28. "ITAMP13IE,Internal tamper i interrupt enable" "0: Internal tamper i interrupt disabled,1: Internal tamper i interrupt enabled"
bitfld.long 0x0 27. "ITAMP12IE,Internal tamper i interrupt enable" "0: Internal tamper i interrupt disabled,1: Internal tamper i interrupt enabled"
newline
bitfld.long 0x0 26. "ITAMP11IE,Internal tamper i interrupt enable" "0: Internal tamper i interrupt disabled,1: Internal tamper i interrupt enabled"
bitfld.long 0x0 24. "ITAMP9IE,Internal tamper i interrupt enable" "0: Internal tamper i interrupt disabled,1: Internal tamper i interrupt enabled"
newline
bitfld.long 0x0 23. "ITAMP8IE,Internal tamper i interrupt enable" "0: Internal tamper i interrupt disabled,1: Internal tamper i interrupt enabled"
bitfld.long 0x0 22. "ITAMP7IE,Internal tamper i interrupt enable" "0: Internal tamper i interrupt disabled,1: Internal tamper i interrupt enabled"
newline
bitfld.long 0x0 21. "ITAMP6IE,Internal tamper i interrupt enable" "0: Internal tamper i interrupt disabled,1: Internal tamper i interrupt enabled"
bitfld.long 0x0 20. "ITAMP5IE,Internal tamper i interrupt enable" "0: Internal tamper i interrupt disabled,1: Internal tamper i interrupt enabled"
newline
bitfld.long 0x0 18. "ITAMP3IE,Internal tamper 3 interrupt enable" "0: Internal tamper 3 interrupt disabled,1: Internal tamper 3 interrupt enabled"
bitfld.long 0x0 4. "TAMP5IE,Tamper i interrupt enable" "0: Tamper i interrupt disabled,1: Tamper i interrupt enabled"
newline
bitfld.long 0x0 3. "TAMP4IE,Tamper i interrupt enable" "0: Tamper i interrupt disabled,1: Tamper i interrupt enabled"
bitfld.long 0x0 2. "TAMP3IE,Tamper i interrupt enable" "0: Tamper i interrupt disabled,1: Tamper i interrupt enabled"
newline
bitfld.long 0x0 1. "TAMP2IE,Tamper i interrupt enable" "0: Tamper i interrupt disabled,1: Tamper i interrupt enabled"
bitfld.long 0x0 0. "TAMP1IE,Tamper i interrupt enable" "0: Tamper i interrupt disabled,1: Tamper i interrupt enabled"
line.long 0x4 "TAMP_SR,TAMP status register"
bitfld.long 0x4 28. "ITAMP13F,Internal tamper i detection flag" "0,1"
bitfld.long 0x4 27. "ITAMP12F,Internal tamper i detection flag" "0,1"
newline
bitfld.long 0x4 26. "ITAMP11F,Internal tamper i detection flag" "0,1"
bitfld.long 0x4 24. "ITAMP9F,Internal tamper i detection flag" "0,1"
newline
bitfld.long 0x4 23. "ITAMP8F,Internal tamper i detection flag" "0,1"
bitfld.long 0x4 22. "ITAMP7F,Internal tamper i detection flag" "0,1"
newline
bitfld.long 0x4 21. "ITAMP6F,Internal tamper i detection flag" "0,1"
bitfld.long 0x4 20. "ITAMP5F,Internal tamper i detection flag" "0,1"
newline
bitfld.long 0x4 18. "ITAMP3F,Internal tamper 3 detection flag" "0,1"
bitfld.long 0x4 4. "TAMP5F,Tamper i detection flag" "0,1"
newline
bitfld.long 0x4 3. "TAMP4F,Tamper i detection flag" "0,1"
bitfld.long 0x4 2. "TAMP3F,Tamper i detection flag" "0,1"
newline
bitfld.long 0x4 1. "TAMP2F,Tamper i detection flag" "0,1"
bitfld.long 0x4 0. "TAMP1F,Tamper i detection flag" "0,1"
line.long 0x8 "TAMP_MISR,TAMP nonsecure masked interrupt status register"
bitfld.long 0x8 28. "ITAMP13MF,Internal tamper i nonsecure interrupt masked flag" "0,1"
bitfld.long 0x8 27. "ITAMP12MF,Internal tamper i nonsecure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 26. "ITAMP11MF,Internal tamper i nonsecure interrupt masked flag" "0,1"
bitfld.long 0x8 24. "ITAMP9MF,Internal tamper i nonsecure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 23. "ITAMP8MF,Internal tamper i nonsecure interrupt masked flag" "0,1"
bitfld.long 0x8 22. "ITAMP7MF,Internal tamper i nonsecure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 21. "ITAMP6MF,Internal tamper i nonsecure interrupt masked flag" "0,1"
bitfld.long 0x8 20. "ITAMP5MF,Internal tamper i nonsecure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 18. "ITAMP3MF,Internal tamper 3 nonsecure interrupt masked flag" "0,1"
bitfld.long 0x8 4. "TAMP5MF,Tamper i nonsecure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 3. "TAMP4MF,Tamper i nonsecure interrupt masked flag" "0,1"
bitfld.long 0x8 2. "TAMP3MF,Tamper i nonsecure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 1. "TAMP2MF,Tamper i nonsecure interrupt masked flag" "0,1"
bitfld.long 0x8 0. "TAMP1MF,Tamper i nonsecure interrupt masked flag" "0,1"
group.long 0x34++0x3
line.long 0x0 "TAMP_SMISR,TAMP secure masked interrupt status register"
bitfld.long 0x0 28. "ITAMP13MF,Internal tamper i secure interrupt masked flag" "0,1"
bitfld.long 0x0 27. "ITAMP12MF,Internal tamper i secure interrupt masked flag" "0,1"
newline
bitfld.long 0x0 26. "ITAMP11MF,Internal tamper i secure interrupt masked flag" "0,1"
bitfld.long 0x0 24. "ITAMP9MF,Internal tamper i secure interrupt masked flag" "0,1"
newline
bitfld.long 0x0 23. "ITAMP8MF,Internal tamper i secure interrupt masked flag" "0,1"
bitfld.long 0x0 22. "ITAMP7MF,Internal tamper i secure interrupt masked flag" "0,1"
newline
bitfld.long 0x0 21. "ITAMP6MF,Internal tamper i secure interrupt masked flag" "0,1"
bitfld.long 0x0 20. "ITAMP5MF,Internal tamper i secure interrupt masked flag" "0,1"
newline
bitfld.long 0x0 18. "ITAMP3MF,Internal tamper 3 secure interrupt masked flag" "0,1"
bitfld.long 0x0 4. "TAMP5MF,Tamper i secure interrupt masked flag" "0,1"
newline
bitfld.long 0x0 3. "TAMP4MF,Tamper i secure interrupt masked flag" "0,1"
bitfld.long 0x0 2. "TAMP3MF,Tamper i secure interrupt masked flag" "0,1"
newline
bitfld.long 0x0 1. "TAMP2MF,Tamper i secure interrupt masked flag" "0,1"
bitfld.long 0x0 0. "TAMP1MF,Tamper i secure interrupt masked flag" "0,1"
group.long 0x3C++0x3
line.long 0x0 "TAMP_SCR,TAMP status clear register"
bitfld.long 0x0 28. "CITAMP13F,Internal tamper i detection flag clear" "0,1"
bitfld.long 0x0 27. "CITAMP12F,Internal tamper i detection flag clear" "0,1"
newline
bitfld.long 0x0 26. "CITAMP11F,Internal tamper i detection flag clear" "0,1"
bitfld.long 0x0 24. "CITAMP9F,Internal tamper i detection flag clear" "0,1"
newline
bitfld.long 0x0 23. "CITAMP8F,Internal tamper i detection flag clear" "0,1"
bitfld.long 0x0 22. "CITAMP7F,Internal tamper i detection flag clear" "0,1"
newline
bitfld.long 0x0 21. "CITAMP6F,Internal tamper i detection flag clear" "0,1"
bitfld.long 0x0 20. "CITAMP5F,Internal tamper i detection flag clear" "0,1"
newline
bitfld.long 0x0 18. "CITAMP3F,Internal tamper 3 detectionflag clear" "0,1"
bitfld.long 0x0 4. "CTAMP5F,Tamper i detection flag clear" "0,1"
newline
bitfld.long 0x0 3. "CTAMP4F,Tamper i detection flag clear" "0,1"
bitfld.long 0x0 2. "CTAMP3F,Tamper i detection flag clear" "0,1"
newline
bitfld.long 0x0 1. "CTAMP2F,Tamper i detection flag clear" "0,1"
bitfld.long 0x0 0. "CTAMP1F,Tamper i detection flag clear" "0,1"
rgroup.long 0x40++0x3
line.long 0x0 "TAMP_COUNT1R,TAMP monotonic counter 1 register"
hexmask.long 0x0 0.--31. 1. "COUNT,Monotonic counter"
group.long 0x54++0x3
line.long 0x0 "TAMP_RPCFGR,TAMP resource protection register"
bitfld.long 0x0 31. "RPCFG31,Backup register protection" "0: Backup registers and BHKLOCK are not included in..,1: Backup registers and BHKLOCK are included in.."
bitfld.long 0x0 5. "RPCFG5,Configurable resource i protection" "0: Resource i is not included in device secrets..,1: Resource i is included in device secrets.."
newline
bitfld.long 0x0 4. "RPCFG4,Configurable resource i protection" "0: Resource i is not included in device secrets..,1: Resource i is included in device secrets.."
bitfld.long 0x0 3. "RPCFG3,Configurable resource i protection" "0: Resource i is not included in device secrets..,1: Resource i is included in device secrets.."
newline
bitfld.long 0x0 2. "RPCFG2,Configurable resource i protection" "0: Resource i is not included in device secrets..,1: Resource i is included in device secrets.."
bitfld.long 0x0 1. "RPCFG1,Configurable resource i protection" "0: Resource i is not included in device secrets..,1: Resource i is included in device secrets.."
rgroup.long 0x100++0x7F
line.long 0x0 "TAMP_BKP0R,TAMP backup 0 register"
hexmask.long 0x0 0.--31. 1. "BKP,Backup data"
line.long 0x4 "TAMP_BKP1R,TAMP backup 1 register"
hexmask.long 0x4 0.--31. 1. "BKP,Backup data"
line.long 0x8 "TAMP_BKP2R,TAMP backup 2 register"
hexmask.long 0x8 0.--31. 1. "BKP,Backup data"
line.long 0xC "TAMP_BKP3R,TAMP backup 3 register"
hexmask.long 0xC 0.--31. 1. "BKP,Backup data"
line.long 0x10 "TAMP_BKP4R,TAMP backup 4 register"
hexmask.long 0x10 0.--31. 1. "BKP,Backup data"
line.long 0x14 "TAMP_BKP5R,TAMP backup 5 register"
hexmask.long 0x14 0.--31. 1. "BKP,Backup data"
line.long 0x18 "TAMP_BKP6R,TAMP backup 6 register"
hexmask.long 0x18 0.--31. 1. "BKP,Backup data"
line.long 0x1C "TAMP_BKP7R,TAMP backup 7 register"
hexmask.long 0x1C 0.--31. 1. "BKP,Backup data"
line.long 0x20 "TAMP_BKP8R,TAMP backup 8 register"
hexmask.long 0x20 0.--31. 1. "BKP,Backup data"
line.long 0x24 "TAMP_BKP9R,TAMP backup 9 register"
hexmask.long 0x24 0.--31. 1. "BKP,Backup data"
line.long 0x28 "TAMP_BKP10R,TAMP backup 10 register"
hexmask.long 0x28 0.--31. 1. "BKP,Backup data"
line.long 0x2C "TAMP_BKP11R,TAMP backup 11 register"
hexmask.long 0x2C 0.--31. 1. "BKP,Backup data"
line.long 0x30 "TAMP_BKP12R,TAMP backup 12 register"
hexmask.long 0x30 0.--31. 1. "BKP,Backup data"
line.long 0x34 "TAMP_BKP13R,TAMP backup 13 register"
hexmask.long 0x34 0.--31. 1. "BKP,Backup data"
line.long 0x38 "TAMP_BKP14R,TAMP backup 14 register"
hexmask.long 0x38 0.--31. 1. "BKP,Backup data"
line.long 0x3C "TAMP_BKP15R,TAMP backup 15 register"
hexmask.long 0x3C 0.--31. 1. "BKP,Backup data"
line.long 0x40 "TAMP_BKP16R,TAMP backup 16 register"
hexmask.long 0x40 0.--31. 1. "BKP,Backup data"
line.long 0x44 "TAMP_BKP17R,TAMP backup 17 register"
hexmask.long 0x44 0.--31. 1. "BKP,Backup data"
line.long 0x48 "TAMP_BKP18R,TAMP backup 18 register"
hexmask.long 0x48 0.--31. 1. "BKP,Backup data"
line.long 0x4C "TAMP_BKP19R,TAMP backup 19 register"
hexmask.long 0x4C 0.--31. 1. "BKP,Backup data"
line.long 0x50 "TAMP_BKP20R,TAMP backup 20 register"
hexmask.long 0x50 0.--31. 1. "BKP,Backup data"
line.long 0x54 "TAMP_BKP21R,TAMP backup 21 register"
hexmask.long 0x54 0.--31. 1. "BKP,Backup data"
line.long 0x58 "TAMP_BKP22R,TAMP backup 22 register"
hexmask.long 0x58 0.--31. 1. "BKP,Backup data"
line.long 0x5C "TAMP_BKP23R,TAMP backup 23 register"
hexmask.long 0x5C 0.--31. 1. "BKP,Backup data"
line.long 0x60 "TAMP_BKP24R,TAMP backup 24 register"
hexmask.long 0x60 0.--31. 1. "BKP,Backup data"
line.long 0x64 "TAMP_BKP25R,TAMP backup 25 register"
hexmask.long 0x64 0.--31. 1. "BKP,Backup data"
line.long 0x68 "TAMP_BKP26R,TAMP backup 26 register"
hexmask.long 0x68 0.--31. 1. "BKP,Backup data"
line.long 0x6C "TAMP_BKP27R,TAMP backup 27 register"
hexmask.long 0x6C 0.--31. 1. "BKP,Backup data"
line.long 0x70 "TAMP_BKP28R,TAMP backup 28 register"
hexmask.long 0x70 0.--31. 1. "BKP,Backup data"
line.long 0x74 "TAMP_BKP29R,TAMP backup 29 register"
hexmask.long 0x74 0.--31. 1. "BKP,Backup data"
line.long 0x78 "TAMP_BKP30R,TAMP backup 30 register"
hexmask.long 0x78 0.--31. 1. "BKP,Backup data"
line.long 0x7C "TAMP_BKP31R,TAMP backup 31 register"
hexmask.long 0x7C 0.--31. 1. "BKP,Backup data"
tree.end
tree.end
tree "TIM (Timers)"
base ad:0x0
tree "TIM1"
base ad:0x40012C00
group.word 0x0++0x1
line.word 0x0 "TIM1_CR1,TIM1 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping.,1: Remapping enabled."
newline
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: tless thansub>DTSless than/sub> = tless..,1: tless thansub>DTSless than/sub> = 2xtless..,2: tless thansub>DTSless than/sub> = 4xtless..,?"
bitfld.word 0x0 7. "ARPE,Autoreload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
newline
bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "0: Edge-aligned mode.,1: Center-aligned mode 1.,2: Center-aligned mode 2.,3: Center-aligned mode 3."
bitfld.word 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter"
newline
bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
newline
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled.,1: UEV disabled."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.long 0x4++0xF
line.long 0x0 "TIM1_CR2,TIM1 control register 2"
bitfld.long 0x0 28. "ADSYNC,ADC synchronization" "0: The timer operates independently from the ADC,1: The timer operation is synchronized with the ADC.."
bitfld.long 0x0 25. "MMS_1,MMS[3]" "0,1"
newline
hexmask.long.byte 0x0 20.--23. 1. "MMS2,Master mode selection 2"
bitfld.long 0x0 18. "OIS6,Output idle state 6 (tim_oc6 output)" "0,1"
newline
bitfld.long 0x0 16. "OIS5,Output idle state 5 (tim_oc5 output)" "0,1"
bitfld.long 0x0 15. "OIS4N,Output idle state 4 (tim_oc4n output)" "0,1"
newline
bitfld.long 0x0 14. "OIS4,Output idle state 4 (tim_oc4 output)" "0,1"
bitfld.long 0x0 13. "OIS3N,Output idle state 3 (tim_oc3n output)" "0,1"
newline
bitfld.long 0x0 12. "OIS3,Output idle state 3 (tim_oc3n output)" "0,1"
bitfld.long 0x0 11. "OIS2N,Output idle state 2 (tim_oc2n output)" "0,1"
newline
bitfld.long 0x0 10. "OIS2,Output idle state 2 (tim_oc2 output)" "0,1"
bitfld.long 0x0 9. "OIS1N,Output idle state 1 (tim_oc1n output)" "0: tim_oc1n = 0 after a dead-time when MOE = 0,1: tim_oc1n = 1 after a dead-time when MOE = 0"
newline
bitfld.long 0x0 8. "OIS1,Output idle state 1 (tim_oc1 output)" "0: tim_oc1 = 0 (after a dead-time) when MOE = 0,1: tim_oc1 = 1 (after a dead-time) when MOE = 0"
bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "0: The tim_ti1_in[15:0] multiplexer output is..,1: tim_ti1_in[15:0] tim_ti2_in[15:0] and.."
newline
bitfld.long 0x0 4.--6. "MMS,MMS[2:0]: Master mode selection" "0: Reset-the UG bit from the TIMx_EGR register is..,1: Enable-the Counter Enable signal CNT_EN is used..,2: Update-The update event is selected as trigger..,3: Compare Pulse-The trigger output send a positive..,4: Compare-tim_oc1refc signal is used as trigger..,5: Compare-tim_oc2refc signal is used as trigger..,6: Compare-tim_oc3refc signal is used as trigger..,7: Compare-tim_oc4refc signal is used as trigger.."
bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
newline
bitfld.long 0x0 2. "CCUS,Capture/compare control update selection" "0: When capture/compare control bits are preloaded..,1: When capture/compare control bits are preloaded.."
bitfld.long 0x0 0. "CCPC,Capture/compare preloaded control" "0: CCxE CCxNE and OCxM bits are not preloaded,1: CCxE CCxNE and OCxM bits are preloaded after.."
line.long 0x4 "TIM1_SMCR,TIM1 slave mode control register"
bitfld.long 0x4 25. "SMSPS,SMS preload source" "0: The transfer is triggered by the Timer's Update..,1: The transfer is triggered by the Index event"
bitfld.long 0x4 24. "SMSPE,SMS preload enable" "0: SMS[3:0] bit field is not preloaded,1: SMS[3:0] preload is enabled"
newline
bitfld.long 0x4 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
bitfld.long 0x4 16. "SMS_1,SMS[3]" "0,1"
newline
bitfld.long 0x4 15. "ETP,External trigger polarity" "0: tim_etr_in is non-inverted active at high level..,1: tim_etr_in is inverted active at low level or.."
bitfld.long 0x4 14. "ECE,External clock enable" "0: External clock mode 2 disabled,1: External clock mode 2 enabled."
newline
bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "0: Prescaler OFF,1: tim_etr_in frequency divided by 2,2: tim_etr_in frequency divided by 4,3: tim_etr_in frequency divided by 8"
hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter"
newline
bitfld.long 0x4 7. "MSM,Master/slave mode" "0: No action,1: The effect of an event on the trigger input.."
bitfld.long 0x4 4.--6. "TS,TS[2:0]: Trigger selection" "0: Internal Trigger 0 (tim_itr0),1: Internal Trigger 1 (tim_itr1),2: Internal Trigger 2 (tim_itr2),3: Internal Trigger 3 (tim_itr3),4: tim_ti1 Edge Detector (tim_ti1f_ed),5: Filtered Timer Input 1 (tim_ti1fp1),6: Filtered Timer Input 2 (tim_ti2fp2),7: External Trigger input (tim_etrf)"
newline
bitfld.long 0x4 3. "OCCS,OCREF clear selection" "0: tim_ocref_clr_int is connected to the..,1: tim_ocref_clr_int is connected to tim_etrf"
bitfld.long 0x4 0.--2. "SMS,SMS[2:0]: Slave mode selection" "0: Slave mode disabled-if CEN = 1 then the..,1: Quadrature encoder mode 1 x2 mode- Counter..,2: Quadrature encoder mode 2 x2 mode-Counter counts..,3: Quadrature encoder mode 3 x4 mode-Counter counts..,4: Reset mode-Rising edge of the selected trigger..,5: Gated mode-The counter clock is enabled when the..,6: Trigger mode-The counter starts at a rising edge..,7: External Clock mode 1-Rising edges of the.."
line.long 0x8 "TIM1_DIER,TIM1 DMA/interrupt enable register"
bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "0: Transition error interrupt disabled,1: Transition error interrupt enabled"
bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "0: Index error interrupt disabled,1: Index error interrupt enabled"
newline
bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "0: Direction Change interrupt disabled,1: Direction Change interrupt enabled"
bitfld.long 0x8 20. "IDxIE,Index interrupt enable" "0: Index interrupt disabled,1: Index Change interrupt enabled"
newline
bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled,1: Trigger DMA request enabled"
bitfld.long 0x8 13. "COMDE,COM DMA request enable" "0: COM DMA request disabled,1: COM DMA request enabled"
newline
bitfld.long 0x8 12. "CC4DE,Capture/compare 4 DMA request enable" "0: CC4 DMA request disabled,1: CC4 DMA request enabled"
bitfld.long 0x8 11. "CC3DE,Capture/compare 3 DMA request enable" "0: CC3 DMA request disabled,1: CC3 DMA request enabled"
newline
bitfld.long 0x8 10. "CC2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled,1: CC2 DMA request enabled"
bitfld.long 0x8 9. "CC1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled"
newline
bitfld.long 0x8 8. "UDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled"
bitfld.long 0x8 7. "BIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled"
newline
bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled,1: Trigger interrupt enabled"
bitfld.long 0x8 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled"
newline
bitfld.long 0x8 4. "CC4IE,Capture/compare 4 interrupt enable" "0: CC4 interrupt disabled,1: CC4 interrupt enabled"
bitfld.long 0x8 3. "CC3IE,Capture/compare 3 interrupt enable" "0: CC3 interrupt disabled,1: CC3 interrupt enabled"
newline
bitfld.long 0x8 2. "CC2IE,Capture/compare 2 interrupt enable" "0: CC2 interrupt disabled,1: CC2 interrupt enabled"
bitfld.long 0x8 1. "CC1IE,Capture/compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled"
newline
bitfld.long 0x8 0. "UIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled"
line.long 0xC "TIM1_SR,TIM1 status register"
bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "0: No encoder transition error has been detected.,1: An encoder transition error has been detected"
bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "0: No index error has been detected.,1: An index error has been detected"
newline
bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change"
bitfld.long 0xC 20. "IDxF,Index interrupt flag" "0: No index event occurred.,1: An index event has occurred"
newline
bitfld.long 0xC 17. "CC6IF,Compare 6 interrupt flag" "0,1"
bitfld.long 0xC 16. "CC5IF,Compare 5 interrupt flag" "0,1"
newline
bitfld.long 0xC 13. "SBIF,System break interrupt flag" "0: No break event occurred.,1: An active level has been detected on the system.."
bitfld.long 0xC 12. "CC4OF,Capture/compare 4 overcapture flag" "0,1"
newline
bitfld.long 0xC 11. "CC3OF,Capture/compare 3 overcapture flag" "0,1"
bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
newline
bitfld.long 0xC 9. "CC1OF,Capture/compare 1 overcapture flag" "0: No overcapture has been detected.,1: The counter value has been captured in TIMx_CCR1.."
bitfld.long 0xC 8. "B2IF,Break 2 interrupt flag" "0: No break event occurred.,1: An active level has been detected on the break 2.."
newline
bitfld.long 0xC 7. "BIF,Break interrupt flag" "0: No break event occurred.,1: An active level has been detected on the break.."
bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred.,1: Trigger interrupt pending."
newline
bitfld.long 0xC 5. "COMIF,COM interrupt flag" "0: No COM event occurred.,1: COM interrupt pending."
bitfld.long 0xC 4. "CC4IF,Capture/compare 4 interrupt flag" "0,1"
newline
bitfld.long 0xC 3. "CC3IF,Capture/compare 3 interrupt flag" "0,1"
bitfld.long 0xC 2. "CC2IF,Capture/compare 2 interrupt flag" "0,1"
newline
bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
bitfld.long 0xC 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending."
wgroup.word 0x14++0x1
line.word 0x0 "TIM1_EGR,TIM1 event generation register"
bitfld.word 0x0 8. "B2G,Break 2 generation" "0: No action,1: A break 2 event is generated."
bitfld.word 0x0 7. "BG,Break generation" "0: No action,1: A break event is generated."
newline
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register."
bitfld.word 0x0 5. "COMG,Capture/compare control update generation" "0: No action,1: CCxE CCxNE and OCxM bits update (providing CCPC.."
newline
bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1"
bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1"
newline
bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
newline
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Reinitialize the counter and generates an update.."
group.long 0x18++0x3
line.long 0x0 "TIM1_CCMR1,TIM1 capture/compare mode register 1"
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
newline
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x0 0.--1. "CC1S,Capture/compare 1 Selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
group.long 0x18++0x7
line.long 0x0 "TIM1_CCMR1_ALTERNATE1,TIM1 capture/compare mode register 1"
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
newline
bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output compare 2 mode" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
newline
bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0: tim_oc1ref is not affected by the..,1: tim_oc1ref is cleared as soon as a High level is.."
newline
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output compare 1 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle-tim_oc1ref toggles when TIMx_CNT =..,4: Force inactive level-tim_oc1ref is forced low.,5: Force active level-tim_oc1ref is forced high.,6: PWM mode 1-In upcounting channel 1 is active as..,7: PWM mode 2-In upcounting channel 1 is inactive.."
bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
newline
bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
line.long 0x4 "TIM1_CCMR2,TIM1 capture/compare mode register 2"
hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter"
bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
newline
bitfld.long 0x4 8.--9. "CC4S,Capture/compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter"
newline
bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
bitfld.long 0x4 0.--1. "CC3S,Capture/compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.long 0x1C++0xB
line.long 0x0 "TIM1_CCMR2_ALTERNATE1,TIM1 capture/compare mode register 2"
bitfld.long 0x0 24. "OC4M_1,OC4M[3]" "0,1"
bitfld.long 0x0 16. "OC3M_1,OC3M[3]" "0,1"
newline
bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC4M,OC4M[2:0]: Output compare 4 mode" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1"
bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1"
newline
bitfld.long 0x0 8.--9. "CC4S,Capture/compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1"
newline
bitfld.long 0x0 4.--6. "OC3M,OC3M[2:0]: Output compare 3 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 3 to active level on match.,2: Set channel 3 to inactive level on match.,3: Toggle-tim_oc3ref toggles when TIMx_CNT =..,4: Force inactive level-tim_oc3ref is forced low.,5: Force active level-tim_oc3ref is forced high.,6: PWM mode 1-In upcounting channel 3 is active as..,7: PWM mode 2-In upcounting channel 3 is inactive.."
bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1"
newline
bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1"
bitfld.long 0x0 0.--1. "CC3S,Capture/compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
line.long 0x4 "TIM1_CCER,TIM1 capture/compare enable register"
bitfld.long 0x4 21. "CC6P,Capture/compare 6 output polarity" "0,1"
bitfld.long 0x4 20. "CC6E,Capture/compare 6 output enable" "0,1"
newline
bitfld.long 0x4 17. "CC5P,Capture/compare 5 output polarity" "0,1"
bitfld.long 0x4 16. "CC5E,Capture/compare 5 output enable" "0,1"
newline
bitfld.long 0x4 15. "CC4NP,Capture/compare 4 complementary output polarity" "0,1"
bitfld.long 0x4 14. "CC4NE,Capture/compare 4 complementary output enable" "0,1"
newline
bitfld.long 0x4 13. "CC4P,Capture/compare 4 output polarity" "0,1"
bitfld.long 0x4 12. "CC4E,Capture/compare 4 output enable" "0,1"
newline
bitfld.long 0x4 11. "CC3NP,Capture/compare 3 complementary output polarity" "0,1"
bitfld.long 0x4 10. "CC3NE,Capture/compare 3 complementary output enable" "0,1"
newline
bitfld.long 0x4 9. "CC3P,Capture/compare 3 output polarity" "0,1"
bitfld.long 0x4 8. "CC3E,Capture/compare 3 output enable" "0,1"
newline
bitfld.long 0x4 7. "CC2NP,Capture/compare 2 complementary output polarity" "0,1"
bitfld.long 0x4 6. "CC2NE,Capture/compare 2 complementary output enable" "0,1"
newline
bitfld.long 0x4 5. "CC2P,Capture/compare 2 output polarity" "0,1"
bitfld.long 0x4 4. "CC2E,Capture/compare 2 output enable" "0,1"
newline
bitfld.long 0x4 3. "CC1NP,Capture/compare 1 complementary output polarity" "0: tim_oc1n active high.,1: tim_oc1n active low."
bitfld.long 0x4 2. "CC1NE,Capture/compare 1 complementary output enable" "0: Off-tim_oc1n is not active.,1: On-tim_oc1n signal is output on the.."
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bitfld.long 0x4 1. "CC1P,Capture/compare 1 output polarity" "0: OC1 active high (output mode) / Edge sensitivity..,1: OC1 active low (output mode) / Edge sensitivity.."
bitfld.long 0x4 0. "CC1E,Capture/compare 1 output enable" "0: Capture mode disabled / OC1 is not active (see..,1: Capture mode enabled / OC1 signal is output on.."
line.long 0x8 "TIM1_CNT,TIM1 counter"
rbitfld.long 0x8 31. "UIFCPY,UIF copy" "0,1"
hexmask.long.word 0x8 0.--15. 1. "CNT,Counter value"
group.word 0x28++0x1
line.word 0x0 "TIM1_PSC,TIM1 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM1_ARR,TIM1 autoreload register"
hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Autoreload value"
group.word 0x30++0x1
line.word 0x0 "TIM1_RCR,TIM1 repetition counter register"
hexmask.word 0x0 0.--15. 1. "REP,Repetition counter reload value"
group.long 0x34++0x33
line.long 0x0 "TIM1_CCR1,TIM1 capture/compare register 1"
hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value"
line.long 0x4 "TIM1_CCR2,TIM1 capture/compare register 2"
hexmask.long.tbyte 0x4 0.--19. 1. "CCR2,Capture/compare 2 value"
line.long 0x8 "TIM1_CCR3,TIM1 capture/compare register 3"
hexmask.long.tbyte 0x8 0.--19. 1. "CCR3,Capture/compare value"
line.long 0xC "TIM1_CCR4,TIM1 capture/compare register 4"
hexmask.long.tbyte 0xC 0.--19. 1. "CCR4,Capture/compare value"
line.long 0x10 "TIM1_BDTR,TIM1 break and dead-time register"
bitfld.long 0x10 29. "BK2BID,Break2 bidirectional" "0,1"
bitfld.long 0x10 28. "BKBID,Break bidirectional" "0: Break input tim_brk in input mode,1: Break input tim_brk in bidirectional mode"
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bitfld.long 0x10 27. "BK2DSRM,Break2 disarm" "0,1"
bitfld.long 0x10 26. "BKDSRM,Break disarm" "0: Break input tim_brk is armed,1: Break input tim_brk is disarmed"
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bitfld.long 0x10 25. "BK2P,Break 2 polarity" "0: Break input tim_brk2 is active low,1: Break input tim_brk2 is active high"
bitfld.long 0x10 24. "BK2E,Break 2 enable" "0: Break2 function disabled,1: Break2 function enabled"
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hexmask.long.byte 0x10 20.--23. 1. "BK2F,Break 2 filter"
hexmask.long.byte 0x10 16.--19. 1. "BKF,Break filter"
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bitfld.long 0x10 15. "MOE,Main output enable" "0: In response to a break 2 event.,1: OC and OCN outputs are enabled if their.."
bitfld.long 0x10 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.."
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bitfld.long 0x10 13. "BKP,Break polarity" "0: Break input tim_brk is active low,1: Break input tim_brk is active high"
bitfld.long 0x10 12. "BKE,Break enable" "0: Break function disabled,1: Break function enabled"
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bitfld.long 0x10 11. "OSSR,Off-state selection for Run mode" "0: When inactive OC/OCN outputs are disabled (the..,1: When inactive OC/OCN outputs are enabled with.."
bitfld.long 0x10 10. "OSSI,Off-state selection for idle mode" "0: When inactive OC/OCN outputs are disabled (the..,1: When inactive OC/OCN outputs are first forced.."
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bitfld.long 0x10 8.--9. "LOCK,Lock configuration" "0: LOCK OFF-No bit is write protected.,1: LOCK Level 1 = DTG bits in TIMx_BDTR register..,2: LOCK Level 2 = LOCK Level 1 + CC Polarity bits..,3: LOCK Level 3 = LOCK Level 2 + CC Control bits.."
hexmask.long.byte 0x10 0.--7. 1. "DTG,Dead-time generator setup"
line.long 0x14 "TIM1_CCR5,TIM1 capture/compare register 5"
bitfld.long 0x14 31. "GC5C3,Group channel 5 and channel 3" "0: No effect of tim_oc5ref on tim_oc3refc,1: tim_oc3refc is the logical AND of tim_oc3ref and.."
bitfld.long 0x14 30. "GC5C2,Group channel 5 and channel 2" "0: No effect of tim_oc5ref on tim_oc2refc,1: tim_oc2refc is the logical AND of tim_oc2ref and.."
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bitfld.long 0x14 29. "GC5C1,Group channel 5 and channel 1" "0: No effect of oc5ref on oc1refc,1: oc1refc is the logical AND of oc1ref and oc5ref"
hexmask.long.tbyte 0x14 0.--19. 1. "CCR5,Capture/compare 5 value"
line.long 0x18 "TIM1_CCR6,TIM1 capture/compare register 6"
hexmask.long.tbyte 0x18 0.--19. 1. "CCR6,Capture/compare 6 value"
line.long 0x1C "TIM1_CCMR3,TIM1 capture/compare mode register 3"
bitfld.long 0x1C 24. "OC6M_1,OC6M[3]" "0,1"
bitfld.long 0x1C 16. "OC5M_1,OC5M[3]" "0,1"
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bitfld.long 0x1C 15. "OC6CE,Output compare 6 clear enable" "0,1"
bitfld.long 0x1C 12.--14. "OC6M,OC6M[2:0]: Output compare 6 mode" "0,1,2,3,4,5,6,7"
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bitfld.long 0x1C 11. "OC6PE,Output compare 6 preload enable" "0,1"
bitfld.long 0x1C 10. "OC6FE,Output compare 6 fast enable" "0,1"
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bitfld.long 0x1C 7. "OC5CE,Output compare 5 clear enable" "0,1"
bitfld.long 0x1C 4.--6. "OC5M,OC5M[2:0]: Output compare 5 mode" "0,1,2,3,4,5,6,7"
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bitfld.long 0x1C 3. "OC5PE,Output compare 5 preload enable" "0,1"
bitfld.long 0x1C 2. "OC5FE,Output compare 5 fast enable" "0,1"
line.long 0x20 "TIM1_DTR2,TIM1 timer deadtime register 2"
bitfld.long 0x20 17. "DTPE,Deadtime preload enable" "0: Deadtime value is not preloaded,1: Deadtime value preload is enabled"
bitfld.long 0x20 16. "DTAE,Deadtime asymmetric enable" "0: Deadtime on rising and falling edges are..,1: Deadtime on rising edge is defined with DTG[7:0].."
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hexmask.long.byte 0x20 0.--7. 1. "DTGF,Dead-time falling edge generator setup"
line.long 0x24 "TIM1_ECR,TIM1 timer encoder control register"
bitfld.long 0x24 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x24 16.--23. 1. "PW,Pulse width"
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bitfld.long 0x24 6.--7. "IPOS,Index positioning" "0: Index resets the counter when AB = 00,1: Index resets the counter when AB = 01,2: Index resets the counter when AB = 10,3: Index resets the counter when AB = 11"
bitfld.long 0x24 5. "FIDx,First index" "0: Index is always active,1: the first Index only resets the counter"
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bitfld.long 0x24 3.--4. "IBLK,Index blanking" "0: Index always active,1: Index disabled when tim_ti3 input is active as..,2: Index disabled when tim_ti4 input is active as..,?"
bitfld.long 0x24 1.--2. "IDIR,Index direction" "0: Index resets the counter whatever the direction,1: Index resets the counter when up-counting only,2: Index resets the counter when down-counting only,?"
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bitfld.long 0x24 0. "IE,Index enable" "0: Index disabled,1: Index enabled"
line.long 0x28 "TIM1_TISEL,TIM1 timer input selection register"
hexmask.long.byte 0x28 24.--27. 1. "TI4SEL,Selects tim_ti4[15:0] input"
hexmask.long.byte 0x28 16.--19. 1. "TI3SEL,Selects tim_ti3[15:0] input"
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hexmask.long.byte 0x28 8.--11. 1. "TI2SEL,Selects tim_ti2[15:0] input"
hexmask.long.byte 0x28 0.--3. 1. "TI1SEL,Selects tim_ti1[15:0] input"
line.long 0x2C "TIM1_AF1,TIM1 alternate function option register 1"
hexmask.long.byte 0x2C 14.--17. 1. "ETRSEL,etr_in source selection"
bitfld.long 0x2C 13. "BKCMP4P,tim_brk_cmp4 input polarity" "0: tim_brk_cmp4 input polarity is not inverted..,1: tim_brk_cmp4 input polarity is inverted (active.."
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bitfld.long 0x2C 12. "BKCMP3P,tim_brk_cmp3 input polarity" "0: tim_brk_cmp3 input polarity is not inverted..,1: tim_brk_cmp3 input polarity is inverted (active.."
bitfld.long 0x2C 11. "BKCMP2P,tim_brk_cmp2 input polarity" "0: tim_brk_cmp2 input polarity is not inverted..,1: tim_brk_cmp2 input polarity is inverted (active.."
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bitfld.long 0x2C 10. "BKCMP1P,tim_brk_cmp1 input polarity" "0: tim_brk_cmp1 input polarity is not inverted..,1: tim_brk_cmp1 input polarity is inverted (active.."
bitfld.long 0x2C 9. "BKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input polarity is not inverted (active..,1: TIMx_BKIN input polarity is inverted (active.."
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bitfld.long 0x2C 8. "BKCMP8E,tim_brk_cmp8 enable" "0: tim_brk_cmp8 input disabled,1: tim_brk_cmp8 input enabled"
bitfld.long 0x2C 7. "BKCMP7E,tim_brk_cmp7 enable" "0: tim_brk_cmp7 input disabled,1: tim_brk_cmp7 input enabled"
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bitfld.long 0x2C 6. "BKCMP6E,tim_brk_cmp6 enable" "0: tim_brk_cmp6 input disabled,1: tim_brk_cmp6 input enabled"
bitfld.long 0x2C 5. "BKCMP5E,tim_brk_cmp5 enable" "0: tim_brk_cmp5 input disabled,1: tim_brk_cmp5 input enabled"
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bitfld.long 0x2C 4. "BKCMP4E,tim_brk_cmp4 enable" "0: tim_brk_cmp4 input disabled,1: tim_brk_cmp4 input enabled"
bitfld.long 0x2C 3. "BKCMP3E,tim_brk_cmp3 enable" "0: tim_brk_cmp3 input disabled,1: tim_brk_cmp3 input enabled"
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bitfld.long 0x2C 2. "BKCMP2E,tim_brk_cmp2 enable" "0: tim_brk_cmp2 input disabled,1: tim_brk_cmp2 input enabled"
bitfld.long 0x2C 1. "BKCMP1E,tim_brk_cmp1 enable" "0: tim_brk_cmp1 input disabled,1: tim_brk_cmp1 input enabled"
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bitfld.long 0x2C 0. "BKINE,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled"
line.long 0x30 "TIM1_AF2,TIM1 alternate function register 2"
bitfld.long 0x30 16.--18. "OCRSEL,ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,?,?,?,?,?,7: tim_ocref_clr7"
bitfld.long 0x30 13. "BK2CMP4P,tim_brk2_cmp4 input polarity" "0: tim_brk2_cmp4 input polarity is not inverted..,1: tim_brk2_cmp4 input polarity is inverted (active.."
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bitfld.long 0x30 12. "BK2CMP3P,tim_brk2_cmp3 input polarity" "0: tim_brk2_cmp3 input polarity is not inverted..,1: tim_brk2_cmp3 input polarity is inverted (active.."
bitfld.long 0x30 11. "BK2CMP2P,tim_brk2_cmp2 input polarity" "0: tim_brk2_cmp2 input polarity is not inverted..,1: tim_brk2_cmp2 input polarity is inverted (active.."
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bitfld.long 0x30 10. "BK2CMP1P,tim_brk2_cmp1 input polarity" "0: tim_brk2_cmp1 input polarity is not inverted..,1: tim_brk2_cmp1 input polarity is inverted (active.."
bitfld.long 0x30 9. "BK2INP,TIMx_BKIN2 input polarity" "0: TIMx_BKIN2 input polarity is not inverted..,1: TIMx_BKIN2 input polarity is inverted (active.."
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bitfld.long 0x30 8. "BK2CMP8E,tim_brk2_cmp8 enable" "0: tim_brk2_cmp8 input disabled,1: tim_brk2_cmp8 input enabled"
bitfld.long 0x30 7. "BK2CMP7E,tim_brk2_cmp7 enable" "0: tim_brk2_cmp7 input disabled,1: tim_brk2_cmp7 input enabled"
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bitfld.long 0x30 6. "BK2CMP6E,tim_brk2_cmp6 enable" "0: tim_brk2_cmp6 input disabled,1: tim_brk2_cmp6 input enabled"
bitfld.long 0x30 5. "BK2CMP5E,tim_brk2_cmp5 enable" "0: tim_brk2_cmp5 input disabled,1: tim_brk2_cmp5 input enabled"
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bitfld.long 0x30 4. "BK2CMP4E,tim_brk2_cmp4 enable" "0: tim_brk2_cmp4 input disabled,1: tim_brk2_cmp4 input enabled"
bitfld.long 0x30 3. "BK2CMP3E,tim_brk2_cmp3 enable" "0: tim_brk2_cmp3 input disabled,1: tim_brk2_cmp3 input enabled"
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bitfld.long 0x30 2. "BK2CMP2E,tim_brk2_cmp2 enable" "0: tim_brk2_cmp2 input disabled,1: tim_brk2_cmp2 input enabled"
bitfld.long 0x30 1. "BK2CMP1E,tim_brk2_cmp1 enable" "0: tim_brk2_cmp1 input disabled,1: tim_brk2_cmp1 input enabled"
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bitfld.long 0x30 0. "BK2INE,TIMx_BKIN2 input enable" "0: TIMx_BKIN2 input disabled,1: TIMx_BKIN2 input enabled"
group.long 0x3DC++0x7
line.long 0x0 "TIM1_DCR,TIM1 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
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hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM1_DMAR,TIM1 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "SEC_TIM1"
base ad:0x50012C00
group.word 0x0++0x1
line.word 0x0 "TIM1_CR1,TIM1 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping.,1: Remapping enabled."
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bitfld.word 0x0 8.--9. "CKD,Clock division" "0: tless thansub>DTSless than/sub> = tless..,1: tless thansub>DTSless than/sub> = 2xtless..,2: tless thansub>DTSless than/sub> = 4xtless..,?"
bitfld.word 0x0 7. "ARPE,Autoreload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
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bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "0: Edge-aligned mode.,1: Center-aligned mode 1.,2: Center-aligned mode 2.,3: Center-aligned mode 3."
bitfld.word 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter"
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bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
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bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled.,1: UEV disabled."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.long 0x4++0xF
line.long 0x0 "TIM1_CR2,TIM1 control register 2"
bitfld.long 0x0 28. "ADSYNC,ADC synchronization" "0: The timer operates independently from the ADC,1: The timer operation is synchronized with the ADC.."
bitfld.long 0x0 25. "MMS_1,MMS[3]" "0,1"
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hexmask.long.byte 0x0 20.--23. 1. "MMS2,Master mode selection 2"
bitfld.long 0x0 18. "OIS6,Output idle state 6 (tim_oc6 output)" "0,1"
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bitfld.long 0x0 16. "OIS5,Output idle state 5 (tim_oc5 output)" "0,1"
bitfld.long 0x0 15. "OIS4N,Output idle state 4 (tim_oc4n output)" "0,1"
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bitfld.long 0x0 14. "OIS4,Output idle state 4 (tim_oc4 output)" "0,1"
bitfld.long 0x0 13. "OIS3N,Output idle state 3 (tim_oc3n output)" "0,1"
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bitfld.long 0x0 12. "OIS3,Output idle state 3 (tim_oc3n output)" "0,1"
bitfld.long 0x0 11. "OIS2N,Output idle state 2 (tim_oc2n output)" "0,1"
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bitfld.long 0x0 10. "OIS2,Output idle state 2 (tim_oc2 output)" "0,1"
bitfld.long 0x0 9. "OIS1N,Output idle state 1 (tim_oc1n output)" "0: tim_oc1n = 0 after a dead-time when MOE = 0,1: tim_oc1n = 1 after a dead-time when MOE = 0"
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bitfld.long 0x0 8. "OIS1,Output idle state 1 (tim_oc1 output)" "0: tim_oc1 = 0 (after a dead-time) when MOE = 0,1: tim_oc1 = 1 (after a dead-time) when MOE = 0"
bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "0: The tim_ti1_in[15:0] multiplexer output is..,1: tim_ti1_in[15:0] tim_ti2_in[15:0] and.."
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bitfld.long 0x0 4.--6. "MMS,MMS[2:0]: Master mode selection" "0: Reset-the UG bit from the TIMx_EGR register is..,1: Enable-the Counter Enable signal CNT_EN is used..,2: Update-The update event is selected as trigger..,3: Compare Pulse-The trigger output send a positive..,4: Compare-tim_oc1refc signal is used as trigger..,5: Compare-tim_oc2refc signal is used as trigger..,6: Compare-tim_oc3refc signal is used as trigger..,7: Compare-tim_oc4refc signal is used as trigger.."
bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
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bitfld.long 0x0 2. "CCUS,Capture/compare control update selection" "0: When capture/compare control bits are preloaded..,1: When capture/compare control bits are preloaded.."
bitfld.long 0x0 0. "CCPC,Capture/compare preloaded control" "0: CCxE CCxNE and OCxM bits are not preloaded,1: CCxE CCxNE and OCxM bits are preloaded after.."
line.long 0x4 "TIM1_SMCR,TIM1 slave mode control register"
bitfld.long 0x4 25. "SMSPS,SMS preload source" "0: The transfer is triggered by the Timer's Update..,1: The transfer is triggered by the Index event"
bitfld.long 0x4 24. "SMSPE,SMS preload enable" "0: SMS[3:0] bit field is not preloaded,1: SMS[3:0] preload is enabled"
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bitfld.long 0x4 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
bitfld.long 0x4 16. "SMS_1,SMS[3]" "0,1"
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bitfld.long 0x4 15. "ETP,External trigger polarity" "0: tim_etr_in is non-inverted active at high level..,1: tim_etr_in is inverted active at low level or.."
bitfld.long 0x4 14. "ECE,External clock enable" "0: External clock mode 2 disabled,1: External clock mode 2 enabled."
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bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "0: Prescaler OFF,1: tim_etr_in frequency divided by 2,2: tim_etr_in frequency divided by 4,3: tim_etr_in frequency divided by 8"
hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter"
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bitfld.long 0x4 7. "MSM,Master/slave mode" "0: No action,1: The effect of an event on the trigger input.."
bitfld.long 0x4 4.--6. "TS,TS[2:0]: Trigger selection" "0: Internal Trigger 0 (tim_itr0),1: Internal Trigger 1 (tim_itr1),2: Internal Trigger 2 (tim_itr2),3: Internal Trigger 3 (tim_itr3),4: tim_ti1 Edge Detector (tim_ti1f_ed),5: Filtered Timer Input 1 (tim_ti1fp1),6: Filtered Timer Input 2 (tim_ti2fp2),7: External Trigger input (tim_etrf)"
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bitfld.long 0x4 3. "OCCS,OCREF clear selection" "0: tim_ocref_clr_int is connected to the..,1: tim_ocref_clr_int is connected to tim_etrf"
bitfld.long 0x4 0.--2. "SMS,SMS[2:0]: Slave mode selection" "0: Slave mode disabled-if CEN = 1 then the..,1: Quadrature encoder mode 1 x2 mode- Counter..,2: Quadrature encoder mode 2 x2 mode-Counter counts..,3: Quadrature encoder mode 3 x4 mode-Counter counts..,4: Reset mode-Rising edge of the selected trigger..,5: Gated mode-The counter clock is enabled when the..,6: Trigger mode-The counter starts at a rising edge..,7: External Clock mode 1-Rising edges of the.."
line.long 0x8 "TIM1_DIER,TIM1 DMA/interrupt enable register"
bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "0: Transition error interrupt disabled,1: Transition error interrupt enabled"
bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "0: Index error interrupt disabled,1: Index error interrupt enabled"
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bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "0: Direction Change interrupt disabled,1: Direction Change interrupt enabled"
bitfld.long 0x8 20. "IDxIE,Index interrupt enable" "0: Index interrupt disabled,1: Index Change interrupt enabled"
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bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled,1: Trigger DMA request enabled"
bitfld.long 0x8 13. "COMDE,COM DMA request enable" "0: COM DMA request disabled,1: COM DMA request enabled"
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bitfld.long 0x8 12. "CC4DE,Capture/compare 4 DMA request enable" "0: CC4 DMA request disabled,1: CC4 DMA request enabled"
bitfld.long 0x8 11. "CC3DE,Capture/compare 3 DMA request enable" "0: CC3 DMA request disabled,1: CC3 DMA request enabled"
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bitfld.long 0x8 10. "CC2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled,1: CC2 DMA request enabled"
bitfld.long 0x8 9. "CC1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled"
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bitfld.long 0x8 8. "UDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled"
bitfld.long 0x8 7. "BIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled"
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bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled,1: Trigger interrupt enabled"
bitfld.long 0x8 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled"
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bitfld.long 0x8 4. "CC4IE,Capture/compare 4 interrupt enable" "0: CC4 interrupt disabled,1: CC4 interrupt enabled"
bitfld.long 0x8 3. "CC3IE,Capture/compare 3 interrupt enable" "0: CC3 interrupt disabled,1: CC3 interrupt enabled"
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bitfld.long 0x8 2. "CC2IE,Capture/compare 2 interrupt enable" "0: CC2 interrupt disabled,1: CC2 interrupt enabled"
bitfld.long 0x8 1. "CC1IE,Capture/compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled"
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bitfld.long 0x8 0. "UIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled"
line.long 0xC "TIM1_SR,TIM1 status register"
bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "0: No encoder transition error has been detected.,1: An encoder transition error has been detected"
bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "0: No index error has been detected.,1: An index error has been detected"
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bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change"
bitfld.long 0xC 20. "IDxF,Index interrupt flag" "0: No index event occurred.,1: An index event has occurred"
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bitfld.long 0xC 17. "CC6IF,Compare 6 interrupt flag" "0,1"
bitfld.long 0xC 16. "CC5IF,Compare 5 interrupt flag" "0,1"
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bitfld.long 0xC 13. "SBIF,System break interrupt flag" "0: No break event occurred.,1: An active level has been detected on the system.."
bitfld.long 0xC 12. "CC4OF,Capture/compare 4 overcapture flag" "0,1"
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bitfld.long 0xC 11. "CC3OF,Capture/compare 3 overcapture flag" "0,1"
bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
newline
bitfld.long 0xC 9. "CC1OF,Capture/compare 1 overcapture flag" "0: No overcapture has been detected.,1: The counter value has been captured in TIMx_CCR1.."
bitfld.long 0xC 8. "B2IF,Break 2 interrupt flag" "0: No break event occurred.,1: An active level has been detected on the break 2.."
newline
bitfld.long 0xC 7. "BIF,Break interrupt flag" "0: No break event occurred.,1: An active level has been detected on the break.."
bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred.,1: Trigger interrupt pending."
newline
bitfld.long 0xC 5. "COMIF,COM interrupt flag" "0: No COM event occurred.,1: COM interrupt pending."
bitfld.long 0xC 4. "CC4IF,Capture/compare 4 interrupt flag" "0,1"
newline
bitfld.long 0xC 3. "CC3IF,Capture/compare 3 interrupt flag" "0,1"
bitfld.long 0xC 2. "CC2IF,Capture/compare 2 interrupt flag" "0,1"
newline
bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
bitfld.long 0xC 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending."
wgroup.word 0x14++0x1
line.word 0x0 "TIM1_EGR,TIM1 event generation register"
bitfld.word 0x0 8. "B2G,Break 2 generation" "0: No action,1: A break 2 event is generated."
bitfld.word 0x0 7. "BG,Break generation" "0: No action,1: A break event is generated."
newline
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register."
bitfld.word 0x0 5. "COMG,Capture/compare control update generation" "0: No action,1: CCxE CCxNE and OCxM bits update (providing CCPC.."
newline
bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1"
bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1"
newline
bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
newline
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Reinitialize the counter and generates an update.."
group.long 0x18++0x3
line.long 0x0 "TIM1_CCMR1,TIM1 capture/compare mode register 1"
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
newline
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x0 0.--1. "CC1S,Capture/compare 1 Selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
group.long 0x18++0x7
line.long 0x0 "TIM1_CCMR1_ALTERNATE1,TIM1 capture/compare mode register 1"
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
newline
bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output compare 2 mode" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
newline
bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0: tim_oc1ref is not affected by the..,1: tim_oc1ref is cleared as soon as a High level is.."
newline
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output compare 1 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle-tim_oc1ref toggles when TIMx_CNT =..,4: Force inactive level-tim_oc1ref is forced low.,5: Force active level-tim_oc1ref is forced high.,6: PWM mode 1-In upcounting channel 1 is active as..,7: PWM mode 2-In upcounting channel 1 is inactive.."
bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
newline
bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
line.long 0x4 "TIM1_CCMR2,TIM1 capture/compare mode register 2"
hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter"
bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
newline
bitfld.long 0x4 8.--9. "CC4S,Capture/compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter"
newline
bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
bitfld.long 0x4 0.--1. "CC3S,Capture/compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.long 0x1C++0xB
line.long 0x0 "TIM1_CCMR2_ALTERNATE1,TIM1 capture/compare mode register 2"
bitfld.long 0x0 24. "OC4M_1,OC4M[3]" "0,1"
bitfld.long 0x0 16. "OC3M_1,OC3M[3]" "0,1"
newline
bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC4M,OC4M[2:0]: Output compare 4 mode" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1"
bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1"
newline
bitfld.long 0x0 8.--9. "CC4S,Capture/compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1"
newline
bitfld.long 0x0 4.--6. "OC3M,OC3M[2:0]: Output compare 3 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 3 to active level on match.,2: Set channel 3 to inactive level on match.,3: Toggle-tim_oc3ref toggles when TIMx_CNT =..,4: Force inactive level-tim_oc3ref is forced low.,5: Force active level-tim_oc3ref is forced high.,6: PWM mode 1-In upcounting channel 3 is active as..,7: PWM mode 2-In upcounting channel 3 is inactive.."
bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1"
newline
bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1"
bitfld.long 0x0 0.--1. "CC3S,Capture/compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
line.long 0x4 "TIM1_CCER,TIM1 capture/compare enable register"
bitfld.long 0x4 21. "CC6P,Capture/compare 6 output polarity" "0,1"
bitfld.long 0x4 20. "CC6E,Capture/compare 6 output enable" "0,1"
newline
bitfld.long 0x4 17. "CC5P,Capture/compare 5 output polarity" "0,1"
bitfld.long 0x4 16. "CC5E,Capture/compare 5 output enable" "0,1"
newline
bitfld.long 0x4 15. "CC4NP,Capture/compare 4 complementary output polarity" "0,1"
bitfld.long 0x4 14. "CC4NE,Capture/compare 4 complementary output enable" "0,1"
newline
bitfld.long 0x4 13. "CC4P,Capture/compare 4 output polarity" "0,1"
bitfld.long 0x4 12. "CC4E,Capture/compare 4 output enable" "0,1"
newline
bitfld.long 0x4 11. "CC3NP,Capture/compare 3 complementary output polarity" "0,1"
bitfld.long 0x4 10. "CC3NE,Capture/compare 3 complementary output enable" "0,1"
newline
bitfld.long 0x4 9. "CC3P,Capture/compare 3 output polarity" "0,1"
bitfld.long 0x4 8. "CC3E,Capture/compare 3 output enable" "0,1"
newline
bitfld.long 0x4 7. "CC2NP,Capture/compare 2 complementary output polarity" "0,1"
bitfld.long 0x4 6. "CC2NE,Capture/compare 2 complementary output enable" "0,1"
newline
bitfld.long 0x4 5. "CC2P,Capture/compare 2 output polarity" "0,1"
bitfld.long 0x4 4. "CC2E,Capture/compare 2 output enable" "0,1"
newline
bitfld.long 0x4 3. "CC1NP,Capture/compare 1 complementary output polarity" "0: tim_oc1n active high.,1: tim_oc1n active low."
bitfld.long 0x4 2. "CC1NE,Capture/compare 1 complementary output enable" "0: Off-tim_oc1n is not active.,1: On-tim_oc1n signal is output on the.."
newline
bitfld.long 0x4 1. "CC1P,Capture/compare 1 output polarity" "0: OC1 active high (output mode) / Edge sensitivity..,1: OC1 active low (output mode) / Edge sensitivity.."
bitfld.long 0x4 0. "CC1E,Capture/compare 1 output enable" "0: Capture mode disabled / OC1 is not active (see..,1: Capture mode enabled / OC1 signal is output on.."
line.long 0x8 "TIM1_CNT,TIM1 counter"
rbitfld.long 0x8 31. "UIFCPY,UIF copy" "0,1"
hexmask.long.word 0x8 0.--15. 1. "CNT,Counter value"
group.word 0x28++0x1
line.word 0x0 "TIM1_PSC,TIM1 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM1_ARR,TIM1 autoreload register"
hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Autoreload value"
group.word 0x30++0x1
line.word 0x0 "TIM1_RCR,TIM1 repetition counter register"
hexmask.word 0x0 0.--15. 1. "REP,Repetition counter reload value"
group.long 0x34++0x33
line.long 0x0 "TIM1_CCR1,TIM1 capture/compare register 1"
hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value"
line.long 0x4 "TIM1_CCR2,TIM1 capture/compare register 2"
hexmask.long.tbyte 0x4 0.--19. 1. "CCR2,Capture/compare 2 value"
line.long 0x8 "TIM1_CCR3,TIM1 capture/compare register 3"
hexmask.long.tbyte 0x8 0.--19. 1. "CCR3,Capture/compare value"
line.long 0xC "TIM1_CCR4,TIM1 capture/compare register 4"
hexmask.long.tbyte 0xC 0.--19. 1. "CCR4,Capture/compare value"
line.long 0x10 "TIM1_BDTR,TIM1 break and dead-time register"
bitfld.long 0x10 29. "BK2BID,Break2 bidirectional" "0,1"
bitfld.long 0x10 28. "BKBID,Break bidirectional" "0: Break input tim_brk in input mode,1: Break input tim_brk in bidirectional mode"
newline
bitfld.long 0x10 27. "BK2DSRM,Break2 disarm" "0,1"
bitfld.long 0x10 26. "BKDSRM,Break disarm" "0: Break input tim_brk is armed,1: Break input tim_brk is disarmed"
newline
bitfld.long 0x10 25. "BK2P,Break 2 polarity" "0: Break input tim_brk2 is active low,1: Break input tim_brk2 is active high"
bitfld.long 0x10 24. "BK2E,Break 2 enable" "0: Break2 function disabled,1: Break2 function enabled"
newline
hexmask.long.byte 0x10 20.--23. 1. "BK2F,Break 2 filter"
hexmask.long.byte 0x10 16.--19. 1. "BKF,Break filter"
newline
bitfld.long 0x10 15. "MOE,Main output enable" "0: In response to a break 2 event.,1: OC and OCN outputs are enabled if their.."
bitfld.long 0x10 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.."
newline
bitfld.long 0x10 13. "BKP,Break polarity" "0: Break input tim_brk is active low,1: Break input tim_brk is active high"
bitfld.long 0x10 12. "BKE,Break enable" "0: Break function disabled,1: Break function enabled"
newline
bitfld.long 0x10 11. "OSSR,Off-state selection for Run mode" "0: When inactive OC/OCN outputs are disabled (the..,1: When inactive OC/OCN outputs are enabled with.."
bitfld.long 0x10 10. "OSSI,Off-state selection for idle mode" "0: When inactive OC/OCN outputs are disabled (the..,1: When inactive OC/OCN outputs are first forced.."
newline
bitfld.long 0x10 8.--9. "LOCK,Lock configuration" "0: LOCK OFF-No bit is write protected.,1: LOCK Level 1 = DTG bits in TIMx_BDTR register..,2: LOCK Level 2 = LOCK Level 1 + CC Polarity bits..,3: LOCK Level 3 = LOCK Level 2 + CC Control bits.."
hexmask.long.byte 0x10 0.--7. 1. "DTG,Dead-time generator setup"
line.long 0x14 "TIM1_CCR5,TIM1 capture/compare register 5"
bitfld.long 0x14 31. "GC5C3,Group channel 5 and channel 3" "0: No effect of tim_oc5ref on tim_oc3refc,1: tim_oc3refc is the logical AND of tim_oc3ref and.."
bitfld.long 0x14 30. "GC5C2,Group channel 5 and channel 2" "0: No effect of tim_oc5ref on tim_oc2refc,1: tim_oc2refc is the logical AND of tim_oc2ref and.."
newline
bitfld.long 0x14 29. "GC5C1,Group channel 5 and channel 1" "0: No effect of oc5ref on oc1refc,1: oc1refc is the logical AND of oc1ref and oc5ref"
hexmask.long.tbyte 0x14 0.--19. 1. "CCR5,Capture/compare 5 value"
line.long 0x18 "TIM1_CCR6,TIM1 capture/compare register 6"
hexmask.long.tbyte 0x18 0.--19. 1. "CCR6,Capture/compare 6 value"
line.long 0x1C "TIM1_CCMR3,TIM1 capture/compare mode register 3"
bitfld.long 0x1C 24. "OC6M_1,OC6M[3]" "0,1"
bitfld.long 0x1C 16. "OC5M_1,OC5M[3]" "0,1"
newline
bitfld.long 0x1C 15. "OC6CE,Output compare 6 clear enable" "0,1"
bitfld.long 0x1C 12.--14. "OC6M,OC6M[2:0]: Output compare 6 mode" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x1C 11. "OC6PE,Output compare 6 preload enable" "0,1"
bitfld.long 0x1C 10. "OC6FE,Output compare 6 fast enable" "0,1"
newline
bitfld.long 0x1C 7. "OC5CE,Output compare 5 clear enable" "0,1"
bitfld.long 0x1C 4.--6. "OC5M,OC5M[2:0]: Output compare 5 mode" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x1C 3. "OC5PE,Output compare 5 preload enable" "0,1"
bitfld.long 0x1C 2. "OC5FE,Output compare 5 fast enable" "0,1"
line.long 0x20 "TIM1_DTR2,TIM1 timer deadtime register 2"
bitfld.long 0x20 17. "DTPE,Deadtime preload enable" "0: Deadtime value is not preloaded,1: Deadtime value preload is enabled"
bitfld.long 0x20 16. "DTAE,Deadtime asymmetric enable" "0: Deadtime on rising and falling edges are..,1: Deadtime on rising edge is defined with DTG[7:0].."
newline
hexmask.long.byte 0x20 0.--7. 1. "DTGF,Dead-time falling edge generator setup"
line.long 0x24 "TIM1_ECR,TIM1 timer encoder control register"
bitfld.long 0x24 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x24 16.--23. 1. "PW,Pulse width"
newline
bitfld.long 0x24 6.--7. "IPOS,Index positioning" "0: Index resets the counter when AB = 00,1: Index resets the counter when AB = 01,2: Index resets the counter when AB = 10,3: Index resets the counter when AB = 11"
bitfld.long 0x24 5. "FIDx,First index" "0: Index is always active,1: the first Index only resets the counter"
newline
bitfld.long 0x24 3.--4. "IBLK,Index blanking" "0: Index always active,1: Index disabled when tim_ti3 input is active as..,2: Index disabled when tim_ti4 input is active as..,?"
bitfld.long 0x24 1.--2. "IDIR,Index direction" "0: Index resets the counter whatever the direction,1: Index resets the counter when up-counting only,2: Index resets the counter when down-counting only,?"
newline
bitfld.long 0x24 0. "IE,Index enable" "0: Index disabled,1: Index enabled"
line.long 0x28 "TIM1_TISEL,TIM1 timer input selection register"
hexmask.long.byte 0x28 24.--27. 1. "TI4SEL,Selects tim_ti4[15:0] input"
hexmask.long.byte 0x28 16.--19. 1. "TI3SEL,Selects tim_ti3[15:0] input"
newline
hexmask.long.byte 0x28 8.--11. 1. "TI2SEL,Selects tim_ti2[15:0] input"
hexmask.long.byte 0x28 0.--3. 1. "TI1SEL,Selects tim_ti1[15:0] input"
line.long 0x2C "TIM1_AF1,TIM1 alternate function option register 1"
hexmask.long.byte 0x2C 14.--17. 1. "ETRSEL,etr_in source selection"
bitfld.long 0x2C 13. "BKCMP4P,tim_brk_cmp4 input polarity" "0: tim_brk_cmp4 input polarity is not inverted..,1: tim_brk_cmp4 input polarity is inverted (active.."
newline
bitfld.long 0x2C 12. "BKCMP3P,tim_brk_cmp3 input polarity" "0: tim_brk_cmp3 input polarity is not inverted..,1: tim_brk_cmp3 input polarity is inverted (active.."
bitfld.long 0x2C 11. "BKCMP2P,tim_brk_cmp2 input polarity" "0: tim_brk_cmp2 input polarity is not inverted..,1: tim_brk_cmp2 input polarity is inverted (active.."
newline
bitfld.long 0x2C 10. "BKCMP1P,tim_brk_cmp1 input polarity" "0: tim_brk_cmp1 input polarity is not inverted..,1: tim_brk_cmp1 input polarity is inverted (active.."
bitfld.long 0x2C 9. "BKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input polarity is not inverted (active..,1: TIMx_BKIN input polarity is inverted (active.."
newline
bitfld.long 0x2C 8. "BKCMP8E,tim_brk_cmp8 enable" "0: tim_brk_cmp8 input disabled,1: tim_brk_cmp8 input enabled"
bitfld.long 0x2C 7. "BKCMP7E,tim_brk_cmp7 enable" "0: tim_brk_cmp7 input disabled,1: tim_brk_cmp7 input enabled"
newline
bitfld.long 0x2C 6. "BKCMP6E,tim_brk_cmp6 enable" "0: tim_brk_cmp6 input disabled,1: tim_brk_cmp6 input enabled"
bitfld.long 0x2C 5. "BKCMP5E,tim_brk_cmp5 enable" "0: tim_brk_cmp5 input disabled,1: tim_brk_cmp5 input enabled"
newline
bitfld.long 0x2C 4. "BKCMP4E,tim_brk_cmp4 enable" "0: tim_brk_cmp4 input disabled,1: tim_brk_cmp4 input enabled"
bitfld.long 0x2C 3. "BKCMP3E,tim_brk_cmp3 enable" "0: tim_brk_cmp3 input disabled,1: tim_brk_cmp3 input enabled"
newline
bitfld.long 0x2C 2. "BKCMP2E,tim_brk_cmp2 enable" "0: tim_brk_cmp2 input disabled,1: tim_brk_cmp2 input enabled"
bitfld.long 0x2C 1. "BKCMP1E,tim_brk_cmp1 enable" "0: tim_brk_cmp1 input disabled,1: tim_brk_cmp1 input enabled"
newline
bitfld.long 0x2C 0. "BKINE,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled"
line.long 0x30 "TIM1_AF2,TIM1 alternate function register 2"
bitfld.long 0x30 16.--18. "OCRSEL,ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,?,?,?,?,?,7: tim_ocref_clr7"
bitfld.long 0x30 13. "BK2CMP4P,tim_brk2_cmp4 input polarity" "0: tim_brk2_cmp4 input polarity is not inverted..,1: tim_brk2_cmp4 input polarity is inverted (active.."
newline
bitfld.long 0x30 12. "BK2CMP3P,tim_brk2_cmp3 input polarity" "0: tim_brk2_cmp3 input polarity is not inverted..,1: tim_brk2_cmp3 input polarity is inverted (active.."
bitfld.long 0x30 11. "BK2CMP2P,tim_brk2_cmp2 input polarity" "0: tim_brk2_cmp2 input polarity is not inverted..,1: tim_brk2_cmp2 input polarity is inverted (active.."
newline
bitfld.long 0x30 10. "BK2CMP1P,tim_brk2_cmp1 input polarity" "0: tim_brk2_cmp1 input polarity is not inverted..,1: tim_brk2_cmp1 input polarity is inverted (active.."
bitfld.long 0x30 9. "BK2INP,TIMx_BKIN2 input polarity" "0: TIMx_BKIN2 input polarity is not inverted..,1: TIMx_BKIN2 input polarity is inverted (active.."
newline
bitfld.long 0x30 8. "BK2CMP8E,tim_brk2_cmp8 enable" "0: tim_brk2_cmp8 input disabled,1: tim_brk2_cmp8 input enabled"
bitfld.long 0x30 7. "BK2CMP7E,tim_brk2_cmp7 enable" "0: tim_brk2_cmp7 input disabled,1: tim_brk2_cmp7 input enabled"
newline
bitfld.long 0x30 6. "BK2CMP6E,tim_brk2_cmp6 enable" "0: tim_brk2_cmp6 input disabled,1: tim_brk2_cmp6 input enabled"
bitfld.long 0x30 5. "BK2CMP5E,tim_brk2_cmp5 enable" "0: tim_brk2_cmp5 input disabled,1: tim_brk2_cmp5 input enabled"
newline
bitfld.long 0x30 4. "BK2CMP4E,tim_brk2_cmp4 enable" "0: tim_brk2_cmp4 input disabled,1: tim_brk2_cmp4 input enabled"
bitfld.long 0x30 3. "BK2CMP3E,tim_brk2_cmp3 enable" "0: tim_brk2_cmp3 input disabled,1: tim_brk2_cmp3 input enabled"
newline
bitfld.long 0x30 2. "BK2CMP2E,tim_brk2_cmp2 enable" "0: tim_brk2_cmp2 input disabled,1: tim_brk2_cmp2 input enabled"
bitfld.long 0x30 1. "BK2CMP1E,tim_brk2_cmp1 enable" "0: tim_brk2_cmp1 input disabled,1: tim_brk2_cmp1 input enabled"
newline
bitfld.long 0x30 0. "BK2INE,TIMx_BKIN2 input enable" "0: TIMx_BKIN2 input disabled,1: TIMx_BKIN2 input enabled"
group.long 0x3DC++0x7
line.long 0x0 "TIM1_DCR,TIM1 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
newline
hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM1_DMAR,TIM1 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "TIM2"
base ad:0x40000000
group.word 0x0++0x1
line.word 0x0 "TIM2_CR1,TIM2 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering Enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping.,1: Remapping enabled."
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bitfld.word 0x0 8.--9. "CKD,Clock division" "0: tless thansub>DTSless than/sub> = tless..,1: tless thansub>DTSless than/sub> = 2 x tless..,2: tless thansub>DTSless than/sub> = 4 x tless..,?"
bitfld.word 0x0 7. "ARPE,Autoreload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
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bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "0: Edge-aligned mode.,1: Center-aligned mode 1.,2: Center-aligned mode 2.,3: Center-aligned mode 3."
bitfld.word 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter"
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bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
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bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled.,1: UEV disabled."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.long 0x4++0xF
line.long 0x0 "TIM2_CR2,TIM2 control register 2"
bitfld.long 0x0 28. "ADSYNC,ADC synchronization" "0: The timer operates independently from the ADC,1: The timer operation is synchronized with the ADC.."
bitfld.long 0x0 25. "MMS_1,MMS[3]" "0,1"
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bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "0: The tim_ti1_in[15:0] multiplexer output is to..,1: The tim_ti1_in[15:0] tim_ti2_in[15:0] and.."
bitfld.long 0x0 4.--6. "MMS,MMS[2:0]: Master mode selection" "0: Reset-the UG bit from the TIMx_EGR register is..,1: Enable-the Counter enable signal CNT_EN is used..,2: Update-The update event is selected as trigger..,3: Compare Pulse-The trigger output send a positive..,4: Compare-tim_oc1refc signal is used as trigger..,5: Compare-tim_oc2refc signal is used as trigger..,6: Compare-tim_oc3refc signal is used as trigger..,7: Compare-tim_oc4refc signal is used as trigger.."
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bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
line.long 0x4 "TIM2_SMCR,TIM2 slave mode control register"
bitfld.long 0x4 25. "SMSPS,SMS preload source" "0: The transfer is triggered by the Timer's Update..,1: The transfer is triggered by the Index event"
bitfld.long 0x4 24. "SMSPE,SMS preload enable" "0: SMS[3:0] bit field is not preloaded,1: SMS[3:0] preload is enabled"
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bitfld.long 0x4 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
bitfld.long 0x4 16. "SMS_1,SMS[3]" "0,1"
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bitfld.long 0x4 15. "ETP,External trigger polarity" "0: tim_etr_in is non-inverted active at high level..,1: tim_etr_in is inverted active at low level or.."
bitfld.long 0x4 14. "ECE,External clock enable" "0: External clock mode 2 disabled,1: External clock mode 2 enabled."
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bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "0: Prescaler OFF,1: tim_etrp frequency divided by 2,2: tim_etrp frequency divided by 4,3: tim_etrp frequency divided by 8"
hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter"
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bitfld.long 0x4 7. "MSM,Master/Slave mode" "0: No action,1: The effect of an event on the trigger input.."
bitfld.long 0x4 4.--6. "TS,TS[2:0]: Trigger selection" "0: Internal trigger 0 (tim_itr0),1: Internal trigger 1 (tim_itr1),2: Internal trigger 2 (tim_itr2),3: Internal trigger 3 (tim_itr3),4: tim_ti1 edge detector (tim_ti1f_ed),5: Filtered timer input 1 (tim_ti1fp1),6: Filtered timer input 2 (tim_ti2fp2),7: External trigger input (tim_etrf)"
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bitfld.long 0x4 3. "OCCS,OCREF clear selection" "0: tim_ocref_clr_int is connected to the..,1: tim_ocref_clr_int is connected to tim_etrf"
bitfld.long 0x4 0.--2. "SMS,SMS[2:0]: Slave mode selection" "0: Slave mode disabled-if CEN = 1 then the..,1: Encoder mode 1-Counter counts up/down on..,2: Encoder mode 2-Counter counts up/down on..,3: Encoder mode 3-Counter counts up/down on both..,4: Reset mode-Rising edge of the selected trigger..,5: Gated mode-The counter clock is enabled when the..,6: Trigger mode-The counter starts at a rising edge..,7: External clock mode 1-Rising edges of the.."
line.long 0x8 "TIM2_DIER,TIM2 DMA/Interrupt enable register"
bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "0: Transition error interrupt disabled,1: Transition error interrupt enabled"
bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "0: Index error interrupt disabled,1: Index error interrupt enabled"
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bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "0: Direction change interrupt disabled,1: Direction change interrupt enabled"
bitfld.long 0x8 20. "IDxIE,Index interrupt enable" "0: Index interrupt disabled,1: Index interrupt enabled"
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bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled.,1: Trigger DMA request enabled."
bitfld.long 0x8 12. "CC4DE,Capture/Compare 4 DMA request enable" "0: CC4 DMA request disabled.,1: CC4 DMA request enabled."
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bitfld.long 0x8 11. "CC3DE,Capture/Compare 3 DMA request enable" "0: CC3 DMA request disabled.,1: CC3 DMA request enabled."
bitfld.long 0x8 10. "CC2DE,Capture/Compare 2 DMA request enable" "0: CC2 DMA request disabled.,1: CC2 DMA request enabled."
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bitfld.long 0x8 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled.,1: CC1 DMA request enabled."
bitfld.long 0x8 8. "UDE,Update DMA request enable" "0: Update DMA request disabled.,1: Update DMA request enabled."
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bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled.,1: Trigger interrupt enabled."
bitfld.long 0x8 4. "CC4IE,Capture/Compare 4 interrupt enable" "0: CC4 interrupt disabled.,1: CC4 interrupt enabled."
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bitfld.long 0x8 3. "CC3IE,Capture/Compare 3 interrupt enable" "0: CC3 interrupt disabled.,1: CC3 interrupt enabled."
bitfld.long 0x8 2. "CC2IE,Capture/Compare 2 interrupt enable" "0: CC2 interrupt disabled.,1: CC2 interrupt enabled."
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bitfld.long 0x8 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled.,1: CC1 interrupt enabled."
bitfld.long 0x8 0. "UIE,Update interrupt enable" "0: Update interrupt disabled.,1: Update interrupt enabled."
line.long 0xC "TIM2_SR,TIM2 status register"
bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "0: No encoder transition error has been detected.,1: An encoder transition error has been detected"
bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "0: No index error has been detected.,1: An index error has been detected"
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bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change"
bitfld.long 0xC 20. "IDxF,Index interrupt flag" "0: No index event occurred.,1: An index event has occurred"
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bitfld.long 0xC 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1"
bitfld.long 0xC 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1"
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bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
bitfld.long 0xC 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected.,1: The counter value has been captured in TIMx_CCR1.."
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bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred.,1: Trigger interrupt pending."
bitfld.long 0xC 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1"
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bitfld.long 0xC 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1"
bitfld.long 0xC 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
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bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
bitfld.long 0xC 0. "UIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending."
wgroup.word 0x14++0x1
line.word 0x0 "TIM2_EGR,TIM2 event generation register"
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register."
bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1"
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bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1"
bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
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bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Re-initialize the counter and generates an.."
group.long 0x18++0x3
line.long 0x0 "TIM2_CCMR1,TIM2 capture/compare mode register 1"
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
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bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output.,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
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bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
group.long 0x18++0x7
line.long 0x0 "TIM2_CCMR1_ALTERNATE1,TIM2 capture/compare mode register 1"
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
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bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output compare 2 mode" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
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bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0: tim_oc1ref is not affected by the..,1: tim_oc1ref is cleared as soon as a High level is.."
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bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output compare 1 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle-tim_oc1ref toggles when TIMx_CNT =..,4: Force inactive level-tim_oc1ref is forced low.,5: Force active level-tim_oc1ref is forced high.,6: PWM mode 1-In up-counting channel 1 is active as..,7: PWM mode 2-In up-counting channel 1 is inactive.."
bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
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bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output.,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
line.long 0x4 "TIM2_CCMR2,TIM2 capture/compare mode register 2"
hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter"
bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
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bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter"
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bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.long 0x1C++0x3
line.long 0x0 "TIM2_CCMR2_ALTERNATE1,TIM2 capture/compare mode register 2"
bitfld.long 0x0 24. "OC4M_1,OC4M[3]" "0,1"
bitfld.long 0x0 16. "OC3M_1,OC3M[3]" "0,1"
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bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC4M,OC4M[2:0]: Output compare 4 mode" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1"
bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1"
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bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1"
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bitfld.long 0x0 4.--6. "OC3M,OC3M[2:0]: Output compare 3 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 3 to active level on match.,2: Set channel 3 to inactive level on match.,3: Toggle-tim_oc3ref toggles when TIMx_CNT =..,4: Force inactive level-tim_oc3ref is forced low.,5: Force active level-tim_oc3ref is forced high.,6: PWM mode 1-In up-counting channel 3 is active as..,7: PWM mode 2-In up-counting channel 3 is inactive.."
bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1"
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bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1"
bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.word 0x20++0x1
line.word 0x0 "TIM2_CCER,TIM2 capture/compare enable register"
bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1"
bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1"
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bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1"
bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1"
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bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1"
bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1"
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bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1"
bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1"
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bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1"
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1"
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bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "0: OC1 active high (output mode) / Edge sensitivity..,1: OC1 active low (output mode) / Edge sensitivity.."
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "0: Capture mode disabled / OC1 is not active,1: Capture mode enabled / OC1 signal is output on.."
group.long 0x24++0x3
line.long 0x0 "TIM2_CNT,TIM2 counter"
bitfld.long 0x0 31. "UIFCPY_CNT,Value depends on IUFREMAP in TIMx_CR1." "0,1"
hexmask.long 0x0 0.--30. 1. "CNT,Least significant part of counter value"
group.word 0x28++0x1
line.word 0x0 "TIM2_PSC,TIM2 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM2_ARR,TIM2 autoreload register"
hexmask.long 0x0 0.--31. 1. "ARR,Autoreload value"
group.long 0x34++0xF
line.long 0x0 "TIM2_CCR1,TIM2 capture/compare register 1"
hexmask.long 0x0 0.--31. 1. "CCR1,Capture/compare 1 value"
line.long 0x4 "TIM2_CCR2,TIM2 capture/compare register 2"
hexmask.long 0x4 0.--31. 1. "CCR2,Capture/compare 2 value"
line.long 0x8 "TIM2_CCR3,TIM2 capture/compare register 3"
hexmask.long 0x8 0.--31. 1. "CCR3,Capture/compare 3 value"
line.long 0xC "TIM2_CCR4,TIM2 capture/compare register 4"
hexmask.long 0xC 0.--31. 1. "CCR4,Capture/compare 4 value"
group.long 0x58++0xF
line.long 0x0 "TIM2_ECR,TIM2 timer encoder control register"
bitfld.long 0x0 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 16.--23. 1. "PW,Pulse width"
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bitfld.long 0x0 6.--7. "IPOS,Index positioning" "0: Index resets the counter when AB = 00,1: Index resets the counter when AB = 01,2: Index resets the counter when AB = 10,3: Index resets the counter when AB = 11"
bitfld.long 0x0 5. "FIDx,First index" "0: Index is always active,1: the first Index only resets the counter"
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bitfld.long 0x0 3.--4. "IBLK,Index blanking" "0: Index always active,1: Index disabled hen tim_ti3 input is active as..,2: Index disabled when tim_ti4 input is active as..,?"
bitfld.long 0x0 1.--2. "IDIR,Index direction" "0: Index resets the counter whatever the direction,1: Index resets the counter when up-counting only,2: Index resets the counter when down-counting only,?"
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bitfld.long 0x0 0. "IE,Index enable" "0: Index disabled,1: Index enabled"
line.long 0x4 "TIM2_TISEL,TIM2 timer input selection register"
hexmask.long.byte 0x4 24.--27. 1. "TI4SEL,Selects tim_ti4[15:0] input"
hexmask.long.byte 0x4 16.--19. 1. "TI3SEL,Selects tim_ti3[15:0] input"
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hexmask.long.byte 0x4 8.--11. 1. "TI2SEL,Selects tim_ti2[15:0] input"
hexmask.long.byte 0x4 0.--3. 1. "TI1SEL,Selects tim_ti1[15:0] input"
line.long 0x8 "TIM2_AF1,TIM2 alternate function register 1"
hexmask.long.byte 0x8 14.--17. 1. "ETRSEL,etr_in source selection"
line.long 0xC "TIM2_AF2,TIM2 alternate function register 2"
bitfld.long 0xC 16.--18. "OCRSEL,ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,?,?,?,?,?,7: tim_ocref_clr7"
group.long 0x3DC++0x7
line.long 0x0 "TIM2_DCR,TIM2 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
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hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM2_DMAR,TIM2 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "SEC_TIM2"
base ad:0x50000000
group.word 0x0++0x1
line.word 0x0 "TIM2_CR1,TIM2 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering Enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping.,1: Remapping enabled."
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bitfld.word 0x0 8.--9. "CKD,Clock division" "0: tless thansub>DTSless than/sub> = tless..,1: tless thansub>DTSless than/sub> = 2 x tless..,2: tless thansub>DTSless than/sub> = 4 x tless..,?"
bitfld.word 0x0 7. "ARPE,Autoreload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
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bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "0: Edge-aligned mode.,1: Center-aligned mode 1.,2: Center-aligned mode 2.,3: Center-aligned mode 3."
bitfld.word 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter"
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bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
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bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled.,1: UEV disabled."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.long 0x4++0xF
line.long 0x0 "TIM2_CR2,TIM2 control register 2"
bitfld.long 0x0 28. "ADSYNC,ADC synchronization" "0: The timer operates independently from the ADC,1: The timer operation is synchronized with the ADC.."
bitfld.long 0x0 25. "MMS_1,MMS[3]" "0,1"
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bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "0: The tim_ti1_in[15:0] multiplexer output is to..,1: The tim_ti1_in[15:0] tim_ti2_in[15:0] and.."
bitfld.long 0x0 4.--6. "MMS,MMS[2:0]: Master mode selection" "0: Reset-the UG bit from the TIMx_EGR register is..,1: Enable-the Counter enable signal CNT_EN is used..,2: Update-The update event is selected as trigger..,3: Compare Pulse-The trigger output send a positive..,4: Compare-tim_oc1refc signal is used as trigger..,5: Compare-tim_oc2refc signal is used as trigger..,6: Compare-tim_oc3refc signal is used as trigger..,7: Compare-tim_oc4refc signal is used as trigger.."
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bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
line.long 0x4 "TIM2_SMCR,TIM2 slave mode control register"
bitfld.long 0x4 25. "SMSPS,SMS preload source" "0: The transfer is triggered by the Timer's Update..,1: The transfer is triggered by the Index event"
bitfld.long 0x4 24. "SMSPE,SMS preload enable" "0: SMS[3:0] bit field is not preloaded,1: SMS[3:0] preload is enabled"
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bitfld.long 0x4 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
bitfld.long 0x4 16. "SMS_1,SMS[3]" "0,1"
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bitfld.long 0x4 15. "ETP,External trigger polarity" "0: tim_etr_in is non-inverted active at high level..,1: tim_etr_in is inverted active at low level or.."
bitfld.long 0x4 14. "ECE,External clock enable" "0: External clock mode 2 disabled,1: External clock mode 2 enabled."
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bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "0: Prescaler OFF,1: tim_etrp frequency divided by 2,2: tim_etrp frequency divided by 4,3: tim_etrp frequency divided by 8"
hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter"
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bitfld.long 0x4 7. "MSM,Master/Slave mode" "0: No action,1: The effect of an event on the trigger input.."
bitfld.long 0x4 4.--6. "TS,TS[2:0]: Trigger selection" "0: Internal trigger 0 (tim_itr0),1: Internal trigger 1 (tim_itr1),2: Internal trigger 2 (tim_itr2),3: Internal trigger 3 (tim_itr3),4: tim_ti1 edge detector (tim_ti1f_ed),5: Filtered timer input 1 (tim_ti1fp1),6: Filtered timer input 2 (tim_ti2fp2),7: External trigger input (tim_etrf)"
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bitfld.long 0x4 3. "OCCS,OCREF clear selection" "0: tim_ocref_clr_int is connected to the..,1: tim_ocref_clr_int is connected to tim_etrf"
bitfld.long 0x4 0.--2. "SMS,SMS[2:0]: Slave mode selection" "0: Slave mode disabled-if CEN = 1 then the..,1: Encoder mode 1-Counter counts up/down on..,2: Encoder mode 2-Counter counts up/down on..,3: Encoder mode 3-Counter counts up/down on both..,4: Reset mode-Rising edge of the selected trigger..,5: Gated mode-The counter clock is enabled when the..,6: Trigger mode-The counter starts at a rising edge..,7: External clock mode 1-Rising edges of the.."
line.long 0x8 "TIM2_DIER,TIM2 DMA/Interrupt enable register"
bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "0: Transition error interrupt disabled,1: Transition error interrupt enabled"
bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "0: Index error interrupt disabled,1: Index error interrupt enabled"
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bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "0: Direction change interrupt disabled,1: Direction change interrupt enabled"
bitfld.long 0x8 20. "IDxIE,Index interrupt enable" "0: Index interrupt disabled,1: Index interrupt enabled"
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bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled.,1: Trigger DMA request enabled."
bitfld.long 0x8 12. "CC4DE,Capture/Compare 4 DMA request enable" "0: CC4 DMA request disabled.,1: CC4 DMA request enabled."
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bitfld.long 0x8 11. "CC3DE,Capture/Compare 3 DMA request enable" "0: CC3 DMA request disabled.,1: CC3 DMA request enabled."
bitfld.long 0x8 10. "CC2DE,Capture/Compare 2 DMA request enable" "0: CC2 DMA request disabled.,1: CC2 DMA request enabled."
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bitfld.long 0x8 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled.,1: CC1 DMA request enabled."
bitfld.long 0x8 8. "UDE,Update DMA request enable" "0: Update DMA request disabled.,1: Update DMA request enabled."
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bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled.,1: Trigger interrupt enabled."
bitfld.long 0x8 4. "CC4IE,Capture/Compare 4 interrupt enable" "0: CC4 interrupt disabled.,1: CC4 interrupt enabled."
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bitfld.long 0x8 3. "CC3IE,Capture/Compare 3 interrupt enable" "0: CC3 interrupt disabled.,1: CC3 interrupt enabled."
bitfld.long 0x8 2. "CC2IE,Capture/Compare 2 interrupt enable" "0: CC2 interrupt disabled.,1: CC2 interrupt enabled."
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bitfld.long 0x8 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled.,1: CC1 interrupt enabled."
bitfld.long 0x8 0. "UIE,Update interrupt enable" "0: Update interrupt disabled.,1: Update interrupt enabled."
line.long 0xC "TIM2_SR,TIM2 status register"
bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "0: No encoder transition error has been detected.,1: An encoder transition error has been detected"
bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "0: No index error has been detected.,1: An index error has been detected"
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bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change"
bitfld.long 0xC 20. "IDxF,Index interrupt flag" "0: No index event occurred.,1: An index event has occurred"
newline
bitfld.long 0xC 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1"
bitfld.long 0xC 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1"
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bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
bitfld.long 0xC 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected.,1: The counter value has been captured in TIMx_CCR1.."
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bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred.,1: Trigger interrupt pending."
bitfld.long 0xC 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1"
newline
bitfld.long 0xC 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1"
bitfld.long 0xC 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
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bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
bitfld.long 0xC 0. "UIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending."
wgroup.word 0x14++0x1
line.word 0x0 "TIM2_EGR,TIM2 event generation register"
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register."
bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1"
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bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1"
bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
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bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Re-initialize the counter and generates an.."
group.long 0x18++0x3
line.long 0x0 "TIM2_CCMR1,TIM2 capture/compare mode register 1"
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
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bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output.,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
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bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
group.long 0x18++0x7
line.long 0x0 "TIM2_CCMR1_ALTERNATE1,TIM2 capture/compare mode register 1"
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
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bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output compare 2 mode" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
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bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0: tim_oc1ref is not affected by the..,1: tim_oc1ref is cleared as soon as a High level is.."
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bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output compare 1 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle-tim_oc1ref toggles when TIMx_CNT =..,4: Force inactive level-tim_oc1ref is forced low.,5: Force active level-tim_oc1ref is forced high.,6: PWM mode 1-In up-counting channel 1 is active as..,7: PWM mode 2-In up-counting channel 1 is inactive.."
bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
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bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output.,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
line.long 0x4 "TIM2_CCMR2,TIM2 capture/compare mode register 2"
hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter"
bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
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bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter"
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bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.long 0x1C++0x3
line.long 0x0 "TIM2_CCMR2_ALTERNATE1,TIM2 capture/compare mode register 2"
bitfld.long 0x0 24. "OC4M_1,OC4M[3]" "0,1"
bitfld.long 0x0 16. "OC3M_1,OC3M[3]" "0,1"
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bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC4M,OC4M[2:0]: Output compare 4 mode" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1"
bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1"
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bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1"
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bitfld.long 0x0 4.--6. "OC3M,OC3M[2:0]: Output compare 3 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 3 to active level on match.,2: Set channel 3 to inactive level on match.,3: Toggle-tim_oc3ref toggles when TIMx_CNT =..,4: Force inactive level-tim_oc3ref is forced low.,5: Force active level-tim_oc3ref is forced high.,6: PWM mode 1-In up-counting channel 3 is active as..,7: PWM mode 2-In up-counting channel 3 is inactive.."
bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1"
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bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1"
bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.word 0x20++0x1
line.word 0x0 "TIM2_CCER,TIM2 capture/compare enable register"
bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1"
bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1"
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bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1"
bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1"
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bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1"
bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1"
newline
bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1"
bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1"
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bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1"
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1"
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bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "0: OC1 active high (output mode) / Edge sensitivity..,1: OC1 active low (output mode) / Edge sensitivity.."
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "0: Capture mode disabled / OC1 is not active,1: Capture mode enabled / OC1 signal is output on.."
group.long 0x24++0x3
line.long 0x0 "TIM2_CNT,TIM2 counter"
bitfld.long 0x0 31. "UIFCPY_CNT,Value depends on IUFREMAP in TIMx_CR1." "0,1"
hexmask.long 0x0 0.--30. 1. "CNT,Least significant part of counter value"
group.word 0x28++0x1
line.word 0x0 "TIM2_PSC,TIM2 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM2_ARR,TIM2 autoreload register"
hexmask.long 0x0 0.--31. 1. "ARR,Autoreload value"
group.long 0x34++0xF
line.long 0x0 "TIM2_CCR1,TIM2 capture/compare register 1"
hexmask.long 0x0 0.--31. 1. "CCR1,Capture/compare 1 value"
line.long 0x4 "TIM2_CCR2,TIM2 capture/compare register 2"
hexmask.long 0x4 0.--31. 1. "CCR2,Capture/compare 2 value"
line.long 0x8 "TIM2_CCR3,TIM2 capture/compare register 3"
hexmask.long 0x8 0.--31. 1. "CCR3,Capture/compare 3 value"
line.long 0xC "TIM2_CCR4,TIM2 capture/compare register 4"
hexmask.long 0xC 0.--31. 1. "CCR4,Capture/compare 4 value"
group.long 0x58++0xF
line.long 0x0 "TIM2_ECR,TIM2 timer encoder control register"
bitfld.long 0x0 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 16.--23. 1. "PW,Pulse width"
newline
bitfld.long 0x0 6.--7. "IPOS,Index positioning" "0: Index resets the counter when AB = 00,1: Index resets the counter when AB = 01,2: Index resets the counter when AB = 10,3: Index resets the counter when AB = 11"
bitfld.long 0x0 5. "FIDx,First index" "0: Index is always active,1: the first Index only resets the counter"
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bitfld.long 0x0 3.--4. "IBLK,Index blanking" "0: Index always active,1: Index disabled hen tim_ti3 input is active as..,2: Index disabled when tim_ti4 input is active as..,?"
bitfld.long 0x0 1.--2. "IDIR,Index direction" "0: Index resets the counter whatever the direction,1: Index resets the counter when up-counting only,2: Index resets the counter when down-counting only,?"
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bitfld.long 0x0 0. "IE,Index enable" "0: Index disabled,1: Index enabled"
line.long 0x4 "TIM2_TISEL,TIM2 timer input selection register"
hexmask.long.byte 0x4 24.--27. 1. "TI4SEL,Selects tim_ti4[15:0] input"
hexmask.long.byte 0x4 16.--19. 1. "TI3SEL,Selects tim_ti3[15:0] input"
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hexmask.long.byte 0x4 8.--11. 1. "TI2SEL,Selects tim_ti2[15:0] input"
hexmask.long.byte 0x4 0.--3. 1. "TI1SEL,Selects tim_ti1[15:0] input"
line.long 0x8 "TIM2_AF1,TIM2 alternate function register 1"
hexmask.long.byte 0x8 14.--17. 1. "ETRSEL,etr_in source selection"
line.long 0xC "TIM2_AF2,TIM2 alternate function register 2"
bitfld.long 0xC 16.--18. "OCRSEL,ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,?,?,?,?,?,7: tim_ocref_clr7"
group.long 0x3DC++0x7
line.long 0x0 "TIM2_DCR,TIM2 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
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hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM2_DMAR,TIM2 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "TIM3"
base ad:0x40000400
group.word 0x0++0x1
line.word 0x0 "TIM3_CR1,TIM3 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering Enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping.,1: Remapping enabled."
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bitfld.word 0x0 8.--9. "CKD,Clock division" "0: tless thansub>DTSless than/sub> = tless..,1: tless thansub>DTSless than/sub> = 2 x tless..,2: tless thansub>DTSless than/sub> = 4 x tless..,?"
bitfld.word 0x0 7. "ARPE,Autoreload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
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bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "0: Edge-aligned mode.,1: Center-aligned mode 1.,2: Center-aligned mode 2.,3: Center-aligned mode 3."
bitfld.word 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter"
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bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
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bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled.,1: UEV disabled."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.long 0x4++0xF
line.long 0x0 "TIM3_CR2,TIM3 control register 2"
bitfld.long 0x0 28. "ADSYNC,ADC synchronization" "0: The timer operates independently from the ADC,1: The timer operation is synchronized with the ADC.."
bitfld.long 0x0 25. "MMS_1,MMS[3]" "0,1"
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bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "0: The tim_ti1_in[15:0] multiplexer output is to..,1: The tim_ti1_in[15:0] tim_ti2_in[15:0] and.."
bitfld.long 0x0 4.--6. "MMS,MMS[2:0]: Master mode selection" "0: Reset-the UG bit from the TIMx_EGR register is..,1: Enable-the Counter enable signal CNT_EN is used..,2: Update-The update event is selected as trigger..,3: Compare Pulse-The trigger output send a positive..,4: Compare-tim_oc1refc signal is used as trigger..,5: Compare-tim_oc2refc signal is used as trigger..,6: Compare-tim_oc3refc signal is used as trigger..,7: Compare-tim_oc4refc signal is used as trigger.."
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bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
line.long 0x4 "TIM3_SMCR,TIM3 slave mode control register"
bitfld.long 0x4 25. "SMSPS,SMS preload source" "0: The transfer is triggered by the Timer's Update..,1: The transfer is triggered by the Index event"
bitfld.long 0x4 24. "SMSPE,SMS preload enable" "0: SMS[3:0] bit field is not preloaded,1: SMS[3:0] preload is enabled"
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bitfld.long 0x4 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
bitfld.long 0x4 16. "SMS_1,SMS[3]" "0,1"
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bitfld.long 0x4 15. "ETP,External trigger polarity" "0: tim_etr_in is non-inverted active at high level..,1: tim_etr_in is inverted active at low level or.."
bitfld.long 0x4 14. "ECE,External clock enable" "0: External clock mode 2 disabled,1: External clock mode 2 enabled."
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bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "0: Prescaler OFF,1: tim_etrp frequency divided by 2,2: tim_etrp frequency divided by 4,3: tim_etrp frequency divided by 8"
hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter"
newline
bitfld.long 0x4 7. "MSM,Master/Slave mode" "0: No action,1: The effect of an event on the trigger input.."
bitfld.long 0x4 4.--6. "TS,TS[2:0]: Trigger selection" "0: Internal trigger 0 (tim_itr0),1: Internal trigger 1 (tim_itr1),2: Internal trigger 2 (tim_itr2),3: Internal trigger 3 (tim_itr3),4: tim_ti1 edge detector (tim_ti1f_ed),5: Filtered timer input 1 (tim_ti1fp1),6: Filtered timer input 2 (tim_ti2fp2),7: External trigger input (tim_etrf)"
newline
bitfld.long 0x4 3. "OCCS,OCREF clear selection" "0: tim_ocref_clr_int is connected to the..,1: tim_ocref_clr_int is connected to tim_etrf"
bitfld.long 0x4 0.--2. "SMS,SMS[2:0]: Slave mode selection" "0: Slave mode disabled-if CEN = 1 then the..,1: Encoder mode 1-Counter counts up/down on..,2: Encoder mode 2-Counter counts up/down on..,3: Encoder mode 3-Counter counts up/down on both..,4: Reset mode-Rising edge of the selected trigger..,5: Gated mode-The counter clock is enabled when the..,6: Trigger mode-The counter starts at a rising edge..,7: External clock mode 1-Rising edges of the.."
line.long 0x8 "TIM3_DIER,TIM3 DMA/Interrupt enable register"
bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "0: Transition error interrupt disabled,1: Transition error interrupt enabled"
bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "0: Index error interrupt disabled,1: Index error interrupt enabled"
newline
bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "0: Direction change interrupt disabled,1: Direction change interrupt enabled"
bitfld.long 0x8 20. "IDxIE,Index interrupt enable" "0: Index interrupt disabled,1: Index interrupt enabled"
newline
bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled.,1: Trigger DMA request enabled."
bitfld.long 0x8 12. "CC4DE,Capture/Compare 4 DMA request enable" "0: CC4 DMA request disabled.,1: CC4 DMA request enabled."
newline
bitfld.long 0x8 11. "CC3DE,Capture/Compare 3 DMA request enable" "0: CC3 DMA request disabled.,1: CC3 DMA request enabled."
bitfld.long 0x8 10. "CC2DE,Capture/Compare 2 DMA request enable" "0: CC2 DMA request disabled.,1: CC2 DMA request enabled."
newline
bitfld.long 0x8 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled.,1: CC1 DMA request enabled."
bitfld.long 0x8 8. "UDE,Update DMA request enable" "0: Update DMA request disabled.,1: Update DMA request enabled."
newline
bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled.,1: Trigger interrupt enabled."
bitfld.long 0x8 4. "CC4IE,Capture/Compare 4 interrupt enable" "0: CC4 interrupt disabled.,1: CC4 interrupt enabled."
newline
bitfld.long 0x8 3. "CC3IE,Capture/Compare 3 interrupt enable" "0: CC3 interrupt disabled.,1: CC3 interrupt enabled."
bitfld.long 0x8 2. "CC2IE,Capture/Compare 2 interrupt enable" "0: CC2 interrupt disabled.,1: CC2 interrupt enabled."
newline
bitfld.long 0x8 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled.,1: CC1 interrupt enabled."
bitfld.long 0x8 0. "UIE,Update interrupt enable" "0: Update interrupt disabled.,1: Update interrupt enabled."
line.long 0xC "TIM3_SR,TIM3 status register"
bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "0: No encoder transition error has been detected.,1: An encoder transition error has been detected"
bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "0: No index error has been detected.,1: An index error has been detected"
newline
bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change"
bitfld.long 0xC 20. "IDxF,Index interrupt flag" "0: No index event occurred.,1: An index event has occurred"
newline
bitfld.long 0xC 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1"
bitfld.long 0xC 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1"
newline
bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
bitfld.long 0xC 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected.,1: The counter value has been captured in TIMx_CCR1.."
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bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred.,1: Trigger interrupt pending."
bitfld.long 0xC 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1"
newline
bitfld.long 0xC 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1"
bitfld.long 0xC 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
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bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
bitfld.long 0xC 0. "UIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending."
wgroup.word 0x14++0x1
line.word 0x0 "TIM3_EGR,TIM3 event generation register"
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register."
bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1"
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bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1"
bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
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bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Re-initialize the counter and generates an.."
group.long 0x18++0x3
line.long 0x0 "TIM3_CCMR1,TIM3 capture/compare mode register 1"
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
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bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output.,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
newline
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
group.long 0x18++0x7
line.long 0x0 "TIM3_CCMR1_ALTERNATE1,TIM3 capture/compare mode register 1"
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
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bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output compare 2 mode" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
newline
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0: tim_oc1ref is not affected by the..,1: tim_oc1ref is cleared as soon as a High level is.."
newline
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output compare 1 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle-tim_oc1ref toggles when TIMx_CNT =..,4: Force inactive level-tim_oc1ref is forced low.,5: Force active level-tim_oc1ref is forced high.,6: PWM mode 1-In up-counting channel 1 is active as..,7: PWM mode 2-In up-counting channel 1 is inactive.."
bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
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bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output.,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
line.long 0x4 "TIM3_CCMR2,TIM3 capture/compare mode register 2"
hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter"
bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
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bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter"
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bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.long 0x1C++0x3
line.long 0x0 "TIM3_CCMR2_ALTERNATE1,TIM3 capture/compare mode register 2"
bitfld.long 0x0 24. "OC4M_1,OC4M[3]" "0,1"
bitfld.long 0x0 16. "OC3M_1,OC3M[3]" "0,1"
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bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC4M,OC4M[2:0]: Output compare 4 mode" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1"
bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1"
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bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1"
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bitfld.long 0x0 4.--6. "OC3M,OC3M[2:0]: Output compare 3 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 3 to active level on match.,2: Set channel 3 to inactive level on match.,3: Toggle-tim_oc3ref toggles when TIMx_CNT =..,4: Force inactive level-tim_oc3ref is forced low.,5: Force active level-tim_oc3ref is forced high.,6: PWM mode 1-In up-counting channel 3 is active as..,7: PWM mode 2-In up-counting channel 3 is inactive.."
bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1"
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bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1"
bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.word 0x20++0x1
line.word 0x0 "TIM3_CCER,TIM3 capture/compare enable register"
bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1"
bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1"
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bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1"
bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1"
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bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1"
bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1"
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bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1"
bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1"
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bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1"
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1"
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bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "0: OC1 active high (output mode) / Edge sensitivity..,1: OC1 active low (output mode) / Edge sensitivity.."
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "0: Capture mode disabled / OC1 is not active,1: Capture mode enabled / OC1 signal is output on.."
group.long 0x24++0x3
line.long 0x0 "TIM3_CNT,TIM3 counter"
bitfld.long 0x0 31. "UIFCPY_CNT,Value depends on IUFREMAP in TIMx_CR1." "0,1"
hexmask.long 0x0 0.--30. 1. "CNT,Least significant part of counter value"
group.word 0x28++0x1
line.word 0x0 "TIM3_PSC,TIM3 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM3_ARR,TIM3 autoreload register"
hexmask.long 0x0 0.--31. 1. "ARR,Autoreload value"
group.long 0x34++0xF
line.long 0x0 "TIM3_CCR1,TIM3 capture/compare register 1"
hexmask.long 0x0 0.--31. 1. "CCR1,Capture/compare 1 value"
line.long 0x4 "TIM3_CCR2,TIM3 capture/compare register 2"
hexmask.long 0x4 0.--31. 1. "CCR2,Capture/compare 2 value"
line.long 0x8 "TIM3_CCR3,TIM3 capture/compare register 3"
hexmask.long 0x8 0.--31. 1. "CCR3,Capture/compare 3 value"
line.long 0xC "TIM3_CCR4,TIM3 capture/compare register 4"
hexmask.long 0xC 0.--31. 1. "CCR4,Capture/compare 4 value"
group.long 0x58++0xF
line.long 0x0 "TIM3_ECR,TIM3 timer encoder control register"
bitfld.long 0x0 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 16.--23. 1. "PW,Pulse width"
newline
bitfld.long 0x0 6.--7. "IPOS,Index positioning" "0: Index resets the counter when AB = 00,1: Index resets the counter when AB = 01,2: Index resets the counter when AB = 10,3: Index resets the counter when AB = 11"
bitfld.long 0x0 5. "FIDx,First index" "0: Index is always active,1: the first Index only resets the counter"
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bitfld.long 0x0 3.--4. "IBLK,Index blanking" "0: Index always active,1: Index disabled hen tim_ti3 input is active as..,2: Index disabled when tim_ti4 input is active as..,?"
bitfld.long 0x0 1.--2. "IDIR,Index direction" "0: Index resets the counter whatever the direction,1: Index resets the counter when up-counting only,2: Index resets the counter when down-counting only,?"
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bitfld.long 0x0 0. "IE,Index enable" "0: Index disabled,1: Index enabled"
line.long 0x4 "TIM3_TISEL,TIM3 timer input selection register"
hexmask.long.byte 0x4 24.--27. 1. "TI4SEL,Selects tim_ti4[15:0] input"
hexmask.long.byte 0x4 16.--19. 1. "TI3SEL,Selects tim_ti3[15:0] input"
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hexmask.long.byte 0x4 8.--11. 1. "TI2SEL,Selects tim_ti2[15:0] input"
hexmask.long.byte 0x4 0.--3. 1. "TI1SEL,Selects tim_ti1[15:0] input"
line.long 0x8 "TIM3_AF1,TIM3 alternate function register 1"
hexmask.long.byte 0x8 14.--17. 1. "ETRSEL,etr_in source selection"
line.long 0xC "TIM3_AF2,TIM3 alternate function register 2"
bitfld.long 0xC 16.--18. "OCRSEL,ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,?,?,?,?,?,7: tim_ocref_clr7"
group.long 0x3DC++0x7
line.long 0x0 "TIM3_DCR,TIM3 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
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hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM3_DMAR,TIM3 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "SEC_TIM3"
base ad:0x50000400
group.word 0x0++0x1
line.word 0x0 "TIM3_CR1,TIM3 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering Enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping.,1: Remapping enabled."
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bitfld.word 0x0 8.--9. "CKD,Clock division" "0: tless thansub>DTSless than/sub> = tless..,1: tless thansub>DTSless than/sub> = 2 x tless..,2: tless thansub>DTSless than/sub> = 4 x tless..,?"
bitfld.word 0x0 7. "ARPE,Autoreload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
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bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "0: Edge-aligned mode.,1: Center-aligned mode 1.,2: Center-aligned mode 2.,3: Center-aligned mode 3."
bitfld.word 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter"
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bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
newline
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled.,1: UEV disabled."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.long 0x4++0xF
line.long 0x0 "TIM3_CR2,TIM3 control register 2"
bitfld.long 0x0 28. "ADSYNC,ADC synchronization" "0: The timer operates independently from the ADC,1: The timer operation is synchronized with the ADC.."
bitfld.long 0x0 25. "MMS_1,MMS[3]" "0,1"
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bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "0: The tim_ti1_in[15:0] multiplexer output is to..,1: The tim_ti1_in[15:0] tim_ti2_in[15:0] and.."
bitfld.long 0x0 4.--6. "MMS,MMS[2:0]: Master mode selection" "0: Reset-the UG bit from the TIMx_EGR register is..,1: Enable-the Counter enable signal CNT_EN is used..,2: Update-The update event is selected as trigger..,3: Compare Pulse-The trigger output send a positive..,4: Compare-tim_oc1refc signal is used as trigger..,5: Compare-tim_oc2refc signal is used as trigger..,6: Compare-tim_oc3refc signal is used as trigger..,7: Compare-tim_oc4refc signal is used as trigger.."
newline
bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
line.long 0x4 "TIM3_SMCR,TIM3 slave mode control register"
bitfld.long 0x4 25. "SMSPS,SMS preload source" "0: The transfer is triggered by the Timer's Update..,1: The transfer is triggered by the Index event"
bitfld.long 0x4 24. "SMSPE,SMS preload enable" "0: SMS[3:0] bit field is not preloaded,1: SMS[3:0] preload is enabled"
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bitfld.long 0x4 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
bitfld.long 0x4 16. "SMS_1,SMS[3]" "0,1"
newline
bitfld.long 0x4 15. "ETP,External trigger polarity" "0: tim_etr_in is non-inverted active at high level..,1: tim_etr_in is inverted active at low level or.."
bitfld.long 0x4 14. "ECE,External clock enable" "0: External clock mode 2 disabled,1: External clock mode 2 enabled."
newline
bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "0: Prescaler OFF,1: tim_etrp frequency divided by 2,2: tim_etrp frequency divided by 4,3: tim_etrp frequency divided by 8"
hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter"
newline
bitfld.long 0x4 7. "MSM,Master/Slave mode" "0: No action,1: The effect of an event on the trigger input.."
bitfld.long 0x4 4.--6. "TS,TS[2:0]: Trigger selection" "0: Internal trigger 0 (tim_itr0),1: Internal trigger 1 (tim_itr1),2: Internal trigger 2 (tim_itr2),3: Internal trigger 3 (tim_itr3),4: tim_ti1 edge detector (tim_ti1f_ed),5: Filtered timer input 1 (tim_ti1fp1),6: Filtered timer input 2 (tim_ti2fp2),7: External trigger input (tim_etrf)"
newline
bitfld.long 0x4 3. "OCCS,OCREF clear selection" "0: tim_ocref_clr_int is connected to the..,1: tim_ocref_clr_int is connected to tim_etrf"
bitfld.long 0x4 0.--2. "SMS,SMS[2:0]: Slave mode selection" "0: Slave mode disabled-if CEN = 1 then the..,1: Encoder mode 1-Counter counts up/down on..,2: Encoder mode 2-Counter counts up/down on..,3: Encoder mode 3-Counter counts up/down on both..,4: Reset mode-Rising edge of the selected trigger..,5: Gated mode-The counter clock is enabled when the..,6: Trigger mode-The counter starts at a rising edge..,7: External clock mode 1-Rising edges of the.."
line.long 0x8 "TIM3_DIER,TIM3 DMA/Interrupt enable register"
bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "0: Transition error interrupt disabled,1: Transition error interrupt enabled"
bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "0: Index error interrupt disabled,1: Index error interrupt enabled"
newline
bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "0: Direction change interrupt disabled,1: Direction change interrupt enabled"
bitfld.long 0x8 20. "IDxIE,Index interrupt enable" "0: Index interrupt disabled,1: Index interrupt enabled"
newline
bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled.,1: Trigger DMA request enabled."
bitfld.long 0x8 12. "CC4DE,Capture/Compare 4 DMA request enable" "0: CC4 DMA request disabled.,1: CC4 DMA request enabled."
newline
bitfld.long 0x8 11. "CC3DE,Capture/Compare 3 DMA request enable" "0: CC3 DMA request disabled.,1: CC3 DMA request enabled."
bitfld.long 0x8 10. "CC2DE,Capture/Compare 2 DMA request enable" "0: CC2 DMA request disabled.,1: CC2 DMA request enabled."
newline
bitfld.long 0x8 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled.,1: CC1 DMA request enabled."
bitfld.long 0x8 8. "UDE,Update DMA request enable" "0: Update DMA request disabled.,1: Update DMA request enabled."
newline
bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled.,1: Trigger interrupt enabled."
bitfld.long 0x8 4. "CC4IE,Capture/Compare 4 interrupt enable" "0: CC4 interrupt disabled.,1: CC4 interrupt enabled."
newline
bitfld.long 0x8 3. "CC3IE,Capture/Compare 3 interrupt enable" "0: CC3 interrupt disabled.,1: CC3 interrupt enabled."
bitfld.long 0x8 2. "CC2IE,Capture/Compare 2 interrupt enable" "0: CC2 interrupt disabled.,1: CC2 interrupt enabled."
newline
bitfld.long 0x8 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled.,1: CC1 interrupt enabled."
bitfld.long 0x8 0. "UIE,Update interrupt enable" "0: Update interrupt disabled.,1: Update interrupt enabled."
line.long 0xC "TIM3_SR,TIM3 status register"
bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "0: No encoder transition error has been detected.,1: An encoder transition error has been detected"
bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "0: No index error has been detected.,1: An index error has been detected"
newline
bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change"
bitfld.long 0xC 20. "IDxF,Index interrupt flag" "0: No index event occurred.,1: An index event has occurred"
newline
bitfld.long 0xC 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1"
bitfld.long 0xC 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1"
newline
bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
bitfld.long 0xC 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected.,1: The counter value has been captured in TIMx_CCR1.."
newline
bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred.,1: Trigger interrupt pending."
bitfld.long 0xC 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1"
newline
bitfld.long 0xC 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1"
bitfld.long 0xC 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
newline
bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
bitfld.long 0xC 0. "UIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending."
wgroup.word 0x14++0x1
line.word 0x0 "TIM3_EGR,TIM3 event generation register"
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register."
bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1"
newline
bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1"
bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
newline
bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Re-initialize the counter and generates an.."
group.long 0x18++0x3
line.long 0x0 "TIM3_CCMR1,TIM3 capture/compare mode register 1"
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output.,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
newline
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
group.long 0x18++0x7
line.long 0x0 "TIM3_CCMR1_ALTERNATE1,TIM3 capture/compare mode register 1"
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
newline
bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output compare 2 mode" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
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bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0: tim_oc1ref is not affected by the..,1: tim_oc1ref is cleared as soon as a High level is.."
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bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output compare 1 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle-tim_oc1ref toggles when TIMx_CNT =..,4: Force inactive level-tim_oc1ref is forced low.,5: Force active level-tim_oc1ref is forced high.,6: PWM mode 1-In up-counting channel 1 is active as..,7: PWM mode 2-In up-counting channel 1 is inactive.."
bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
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bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output.,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
line.long 0x4 "TIM3_CCMR2,TIM3 capture/compare mode register 2"
hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter"
bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
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bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter"
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bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.long 0x1C++0x3
line.long 0x0 "TIM3_CCMR2_ALTERNATE1,TIM3 capture/compare mode register 2"
bitfld.long 0x0 24. "OC4M_1,OC4M[3]" "0,1"
bitfld.long 0x0 16. "OC3M_1,OC3M[3]" "0,1"
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bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC4M,OC4M[2:0]: Output compare 4 mode" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1"
bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1"
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bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1"
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bitfld.long 0x0 4.--6. "OC3M,OC3M[2:0]: Output compare 3 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 3 to active level on match.,2: Set channel 3 to inactive level on match.,3: Toggle-tim_oc3ref toggles when TIMx_CNT =..,4: Force inactive level-tim_oc3ref is forced low.,5: Force active level-tim_oc3ref is forced high.,6: PWM mode 1-In up-counting channel 3 is active as..,7: PWM mode 2-In up-counting channel 3 is inactive.."
bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1"
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bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1"
bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.word 0x20++0x1
line.word 0x0 "TIM3_CCER,TIM3 capture/compare enable register"
bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1"
bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1"
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bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1"
bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1"
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bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1"
bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1"
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bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1"
bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1"
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bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1"
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1"
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bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "0: OC1 active high (output mode) / Edge sensitivity..,1: OC1 active low (output mode) / Edge sensitivity.."
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "0: Capture mode disabled / OC1 is not active,1: Capture mode enabled / OC1 signal is output on.."
group.long 0x24++0x3
line.long 0x0 "TIM3_CNT,TIM3 counter"
bitfld.long 0x0 31. "UIFCPY_CNT,Value depends on IUFREMAP in TIMx_CR1." "0,1"
hexmask.long 0x0 0.--30. 1. "CNT,Least significant part of counter value"
group.word 0x28++0x1
line.word 0x0 "TIM3_PSC,TIM3 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM3_ARR,TIM3 autoreload register"
hexmask.long 0x0 0.--31. 1. "ARR,Autoreload value"
group.long 0x34++0xF
line.long 0x0 "TIM3_CCR1,TIM3 capture/compare register 1"
hexmask.long 0x0 0.--31. 1. "CCR1,Capture/compare 1 value"
line.long 0x4 "TIM3_CCR2,TIM3 capture/compare register 2"
hexmask.long 0x4 0.--31. 1. "CCR2,Capture/compare 2 value"
line.long 0x8 "TIM3_CCR3,TIM3 capture/compare register 3"
hexmask.long 0x8 0.--31. 1. "CCR3,Capture/compare 3 value"
line.long 0xC "TIM3_CCR4,TIM3 capture/compare register 4"
hexmask.long 0xC 0.--31. 1. "CCR4,Capture/compare 4 value"
group.long 0x58++0xF
line.long 0x0 "TIM3_ECR,TIM3 timer encoder control register"
bitfld.long 0x0 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 16.--23. 1. "PW,Pulse width"
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bitfld.long 0x0 6.--7. "IPOS,Index positioning" "0: Index resets the counter when AB = 00,1: Index resets the counter when AB = 01,2: Index resets the counter when AB = 10,3: Index resets the counter when AB = 11"
bitfld.long 0x0 5. "FIDx,First index" "0: Index is always active,1: the first Index only resets the counter"
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bitfld.long 0x0 3.--4. "IBLK,Index blanking" "0: Index always active,1: Index disabled hen tim_ti3 input is active as..,2: Index disabled when tim_ti4 input is active as..,?"
bitfld.long 0x0 1.--2. "IDIR,Index direction" "0: Index resets the counter whatever the direction,1: Index resets the counter when up-counting only,2: Index resets the counter when down-counting only,?"
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bitfld.long 0x0 0. "IE,Index enable" "0: Index disabled,1: Index enabled"
line.long 0x4 "TIM3_TISEL,TIM3 timer input selection register"
hexmask.long.byte 0x4 24.--27. 1. "TI4SEL,Selects tim_ti4[15:0] input"
hexmask.long.byte 0x4 16.--19. 1. "TI3SEL,Selects tim_ti3[15:0] input"
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hexmask.long.byte 0x4 8.--11. 1. "TI2SEL,Selects tim_ti2[15:0] input"
hexmask.long.byte 0x4 0.--3. 1. "TI1SEL,Selects tim_ti1[15:0] input"
line.long 0x8 "TIM3_AF1,TIM3 alternate function register 1"
hexmask.long.byte 0x8 14.--17. 1. "ETRSEL,etr_in source selection"
line.long 0xC "TIM3_AF2,TIM3 alternate function register 2"
bitfld.long 0xC 16.--18. "OCRSEL,ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,?,?,?,?,?,7: tim_ocref_clr7"
group.long 0x3DC++0x7
line.long 0x0 "TIM3_DCR,TIM3 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
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hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM3_DMAR,TIM3 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "TIM4"
base ad:0x40000800
group.word 0x0++0x1
line.word 0x0 "TIM4_CR1,TIM4 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering Enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping.,1: Remapping enabled."
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bitfld.word 0x0 8.--9. "CKD,Clock division" "0: tless thansub>DTSless than/sub> = tless..,1: tless thansub>DTSless than/sub> = 2 x tless..,2: tless thansub>DTSless than/sub> = 4 x tless..,?"
bitfld.word 0x0 7. "ARPE,Autoreload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
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bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "0: Edge-aligned mode.,1: Center-aligned mode 1.,2: Center-aligned mode 2.,3: Center-aligned mode 3."
bitfld.word 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter"
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bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
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bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled.,1: UEV disabled."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.long 0x4++0xF
line.long 0x0 "TIM4_CR2,TIM4 control register 2"
bitfld.long 0x0 28. "ADSYNC,ADC synchronization" "0: The timer operates independently from the ADC,1: The timer operation is synchronized with the ADC.."
bitfld.long 0x0 25. "MMS_1,MMS[3]" "0,1"
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bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "0: The tim_ti1_in[15:0] multiplexer output is to..,1: The tim_ti1_in[15:0] tim_ti2_in[15:0] and.."
bitfld.long 0x0 4.--6. "MMS,MMS[2:0]: Master mode selection" "0: Reset-the UG bit from the TIMx_EGR register is..,1: Enable-the Counter enable signal CNT_EN is used..,2: Update-The update event is selected as trigger..,3: Compare Pulse-The trigger output send a positive..,4: Compare-tim_oc1refc signal is used as trigger..,5: Compare-tim_oc2refc signal is used as trigger..,6: Compare-tim_oc3refc signal is used as trigger..,7: Compare-tim_oc4refc signal is used as trigger.."
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bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
line.long 0x4 "TIM4_SMCR,TIM4 slave mode control register"
bitfld.long 0x4 25. "SMSPS,SMS preload source" "0: The transfer is triggered by the Timer's Update..,1: The transfer is triggered by the Index event"
bitfld.long 0x4 24. "SMSPE,SMS preload enable" "0: SMS[3:0] bit field is not preloaded,1: SMS[3:0] preload is enabled"
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bitfld.long 0x4 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
bitfld.long 0x4 16. "SMS_1,SMS[3]" "0,1"
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bitfld.long 0x4 15. "ETP,External trigger polarity" "0: tim_etr_in is non-inverted active at high level..,1: tim_etr_in is inverted active at low level or.."
bitfld.long 0x4 14. "ECE,External clock enable" "0: External clock mode 2 disabled,1: External clock mode 2 enabled."
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bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "0: Prescaler OFF,1: tim_etrp frequency divided by 2,2: tim_etrp frequency divided by 4,3: tim_etrp frequency divided by 8"
hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter"
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bitfld.long 0x4 7. "MSM,Master/Slave mode" "0: No action,1: The effect of an event on the trigger input.."
bitfld.long 0x4 4.--6. "TS,TS[2:0]: Trigger selection" "0: Internal trigger 0 (tim_itr0),1: Internal trigger 1 (tim_itr1),2: Internal trigger 2 (tim_itr2),3: Internal trigger 3 (tim_itr3),4: tim_ti1 edge detector (tim_ti1f_ed),5: Filtered timer input 1 (tim_ti1fp1),6: Filtered timer input 2 (tim_ti2fp2),7: External trigger input (tim_etrf)"
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bitfld.long 0x4 3. "OCCS,OCREF clear selection" "0: tim_ocref_clr_int is connected to the..,1: tim_ocref_clr_int is connected to tim_etrf"
bitfld.long 0x4 0.--2. "SMS,SMS[2:0]: Slave mode selection" "0: Slave mode disabled-if CEN = 1 then the..,1: Encoder mode 1-Counter counts up/down on..,2: Encoder mode 2-Counter counts up/down on..,3: Encoder mode 3-Counter counts up/down on both..,4: Reset mode-Rising edge of the selected trigger..,5: Gated mode-The counter clock is enabled when the..,6: Trigger mode-The counter starts at a rising edge..,7: External clock mode 1-Rising edges of the.."
line.long 0x8 "TIM4_DIER,TIM4 DMA/Interrupt enable register"
bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "0: Transition error interrupt disabled,1: Transition error interrupt enabled"
bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "0: Index error interrupt disabled,1: Index error interrupt enabled"
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bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "0: Direction change interrupt disabled,1: Direction change interrupt enabled"
bitfld.long 0x8 20. "IDxIE,Index interrupt enable" "0: Index interrupt disabled,1: Index interrupt enabled"
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bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled.,1: Trigger DMA request enabled."
bitfld.long 0x8 12. "CC4DE,Capture/Compare 4 DMA request enable" "0: CC4 DMA request disabled.,1: CC4 DMA request enabled."
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bitfld.long 0x8 11. "CC3DE,Capture/Compare 3 DMA request enable" "0: CC3 DMA request disabled.,1: CC3 DMA request enabled."
bitfld.long 0x8 10. "CC2DE,Capture/Compare 2 DMA request enable" "0: CC2 DMA request disabled.,1: CC2 DMA request enabled."
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bitfld.long 0x8 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled.,1: CC1 DMA request enabled."
bitfld.long 0x8 8. "UDE,Update DMA request enable" "0: Update DMA request disabled.,1: Update DMA request enabled."
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bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled.,1: Trigger interrupt enabled."
bitfld.long 0x8 4. "CC4IE,Capture/Compare 4 interrupt enable" "0: CC4 interrupt disabled.,1: CC4 interrupt enabled."
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bitfld.long 0x8 3. "CC3IE,Capture/Compare 3 interrupt enable" "0: CC3 interrupt disabled.,1: CC3 interrupt enabled."
bitfld.long 0x8 2. "CC2IE,Capture/Compare 2 interrupt enable" "0: CC2 interrupt disabled.,1: CC2 interrupt enabled."
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bitfld.long 0x8 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled.,1: CC1 interrupt enabled."
bitfld.long 0x8 0. "UIE,Update interrupt enable" "0: Update interrupt disabled.,1: Update interrupt enabled."
line.long 0xC "TIM4_SR,TIM4 status register"
bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "0: No encoder transition error has been detected.,1: An encoder transition error has been detected"
bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "0: No index error has been detected.,1: An index error has been detected"
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bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change"
bitfld.long 0xC 20. "IDxF,Index interrupt flag" "0: No index event occurred.,1: An index event has occurred"
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bitfld.long 0xC 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1"
bitfld.long 0xC 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1"
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bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
bitfld.long 0xC 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected.,1: The counter value has been captured in TIMx_CCR1.."
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bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred.,1: Trigger interrupt pending."
bitfld.long 0xC 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1"
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bitfld.long 0xC 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1"
bitfld.long 0xC 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
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bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
bitfld.long 0xC 0. "UIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending."
wgroup.word 0x14++0x1
line.word 0x0 "TIM4_EGR,TIM4 event generation register"
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register."
bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1"
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bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1"
bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
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bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Re-initialize the counter and generates an.."
group.long 0x18++0x3
line.long 0x0 "TIM4_CCMR1,TIM4 capture/compare mode register 1"
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
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bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output.,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
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bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
group.long 0x18++0x7
line.long 0x0 "TIM4_CCMR1_ALTERNATE1,TIM4 capture/compare mode register 1"
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
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bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output compare 2 mode" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
newline
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0: tim_oc1ref is not affected by the..,1: tim_oc1ref is cleared as soon as a High level is.."
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bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output compare 1 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle-tim_oc1ref toggles when TIMx_CNT =..,4: Force inactive level-tim_oc1ref is forced low.,5: Force active level-tim_oc1ref is forced high.,6: PWM mode 1-In up-counting channel 1 is active as..,7: PWM mode 2-In up-counting channel 1 is inactive.."
bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
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bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output.,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
line.long 0x4 "TIM4_CCMR2,TIM4 capture/compare mode register 2"
hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter"
bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
newline
bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter"
newline
bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.long 0x1C++0x3
line.long 0x0 "TIM4_CCMR2_ALTERNATE1,TIM4 capture/compare mode register 2"
bitfld.long 0x0 24. "OC4M_1,OC4M[3]" "0,1"
bitfld.long 0x0 16. "OC3M_1,OC3M[3]" "0,1"
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bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC4M,OC4M[2:0]: Output compare 4 mode" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1"
bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1"
newline
bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1"
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bitfld.long 0x0 4.--6. "OC3M,OC3M[2:0]: Output compare 3 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 3 to active level on match.,2: Set channel 3 to inactive level on match.,3: Toggle-tim_oc3ref toggles when TIMx_CNT =..,4: Force inactive level-tim_oc3ref is forced low.,5: Force active level-tim_oc3ref is forced high.,6: PWM mode 1-In up-counting channel 3 is active as..,7: PWM mode 2-In up-counting channel 3 is inactive.."
bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1"
newline
bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1"
bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.word 0x20++0x1
line.word 0x0 "TIM4_CCER,TIM4 capture/compare enable register"
bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1"
bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1"
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bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1"
bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1"
newline
bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1"
bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1"
newline
bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1"
bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1"
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bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1"
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1"
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bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "0: OC1 active high (output mode) / Edge sensitivity..,1: OC1 active low (output mode) / Edge sensitivity.."
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "0: Capture mode disabled / OC1 is not active,1: Capture mode enabled / OC1 signal is output on.."
group.long 0x24++0x3
line.long 0x0 "TIM4_CNT,TIM4 counter"
bitfld.long 0x0 31. "UIFCPY_CNT,Value depends on IUFREMAP in TIMx_CR1." "0,1"
hexmask.long 0x0 0.--30. 1. "CNT,Least significant part of counter value"
group.word 0x28++0x1
line.word 0x0 "TIM4_PSC,TIM4 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM4_ARR,TIM4 autoreload register"
hexmask.long 0x0 0.--31. 1. "ARR,Autoreload value"
group.long 0x34++0xF
line.long 0x0 "TIM4_CCR1,TIM4 capture/compare register 1"
hexmask.long 0x0 0.--31. 1. "CCR1,Capture/compare 1 value"
line.long 0x4 "TIM4_CCR2,TIM4 capture/compare register 2"
hexmask.long 0x4 0.--31. 1. "CCR2,Capture/compare 2 value"
line.long 0x8 "TIM4_CCR3,TIM4 capture/compare register 3"
hexmask.long 0x8 0.--31. 1. "CCR3,Capture/compare 3 value"
line.long 0xC "TIM4_CCR4,TIM4 capture/compare register 4"
hexmask.long 0xC 0.--31. 1. "CCR4,Capture/compare 4 value"
group.long 0x58++0xF
line.long 0x0 "TIM4_ECR,TIM4 timer encoder control register"
bitfld.long 0x0 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 16.--23. 1. "PW,Pulse width"
newline
bitfld.long 0x0 6.--7. "IPOS,Index positioning" "0: Index resets the counter when AB = 00,1: Index resets the counter when AB = 01,2: Index resets the counter when AB = 10,3: Index resets the counter when AB = 11"
bitfld.long 0x0 5. "FIDx,First index" "0: Index is always active,1: the first Index only resets the counter"
newline
bitfld.long 0x0 3.--4. "IBLK,Index blanking" "0: Index always active,1: Index disabled hen tim_ti3 input is active as..,2: Index disabled when tim_ti4 input is active as..,?"
bitfld.long 0x0 1.--2. "IDIR,Index direction" "0: Index resets the counter whatever the direction,1: Index resets the counter when up-counting only,2: Index resets the counter when down-counting only,?"
newline
bitfld.long 0x0 0. "IE,Index enable" "0: Index disabled,1: Index enabled"
line.long 0x4 "TIM4_TISEL,TIM4 timer input selection register"
hexmask.long.byte 0x4 24.--27. 1. "TI4SEL,Selects tim_ti4[15:0] input"
hexmask.long.byte 0x4 16.--19. 1. "TI3SEL,Selects tim_ti3[15:0] input"
newline
hexmask.long.byte 0x4 8.--11. 1. "TI2SEL,Selects tim_ti2[15:0] input"
hexmask.long.byte 0x4 0.--3. 1. "TI1SEL,Selects tim_ti1[15:0] input"
line.long 0x8 "TIM4_AF1,TIM4 alternate function register 1"
hexmask.long.byte 0x8 14.--17. 1. "ETRSEL,etr_in source selection"
line.long 0xC "TIM4_AF2,TIM4 alternate function register 2"
bitfld.long 0xC 16.--18. "OCRSEL,ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,?,?,?,?,?,7: tim_ocref_clr7"
group.long 0x3DC++0x7
line.long 0x0 "TIM4_DCR,TIM4 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
newline
hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM4_DMAR,TIM4 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "SEC_TIM4"
base ad:0x50000800
group.word 0x0++0x1
line.word 0x0 "TIM4_CR1,TIM4 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering Enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping.,1: Remapping enabled."
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bitfld.word 0x0 8.--9. "CKD,Clock division" "0: tless thansub>DTSless than/sub> = tless..,1: tless thansub>DTSless than/sub> = 2 x tless..,2: tless thansub>DTSless than/sub> = 4 x tless..,?"
bitfld.word 0x0 7. "ARPE,Autoreload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
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bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "0: Edge-aligned mode.,1: Center-aligned mode 1.,2: Center-aligned mode 2.,3: Center-aligned mode 3."
bitfld.word 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter"
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bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
newline
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled.,1: UEV disabled."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.long 0x4++0xF
line.long 0x0 "TIM4_CR2,TIM4 control register 2"
bitfld.long 0x0 28. "ADSYNC,ADC synchronization" "0: The timer operates independently from the ADC,1: The timer operation is synchronized with the ADC.."
bitfld.long 0x0 25. "MMS_1,MMS[3]" "0,1"
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bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "0: The tim_ti1_in[15:0] multiplexer output is to..,1: The tim_ti1_in[15:0] tim_ti2_in[15:0] and.."
bitfld.long 0x0 4.--6. "MMS,MMS[2:0]: Master mode selection" "0: Reset-the UG bit from the TIMx_EGR register is..,1: Enable-the Counter enable signal CNT_EN is used..,2: Update-The update event is selected as trigger..,3: Compare Pulse-The trigger output send a positive..,4: Compare-tim_oc1refc signal is used as trigger..,5: Compare-tim_oc2refc signal is used as trigger..,6: Compare-tim_oc3refc signal is used as trigger..,7: Compare-tim_oc4refc signal is used as trigger.."
newline
bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
line.long 0x4 "TIM4_SMCR,TIM4 slave mode control register"
bitfld.long 0x4 25. "SMSPS,SMS preload source" "0: The transfer is triggered by the Timer's Update..,1: The transfer is triggered by the Index event"
bitfld.long 0x4 24. "SMSPE,SMS preload enable" "0: SMS[3:0] bit field is not preloaded,1: SMS[3:0] preload is enabled"
newline
bitfld.long 0x4 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
bitfld.long 0x4 16. "SMS_1,SMS[3]" "0,1"
newline
bitfld.long 0x4 15. "ETP,External trigger polarity" "0: tim_etr_in is non-inverted active at high level..,1: tim_etr_in is inverted active at low level or.."
bitfld.long 0x4 14. "ECE,External clock enable" "0: External clock mode 2 disabled,1: External clock mode 2 enabled."
newline
bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "0: Prescaler OFF,1: tim_etrp frequency divided by 2,2: tim_etrp frequency divided by 4,3: tim_etrp frequency divided by 8"
hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter"
newline
bitfld.long 0x4 7. "MSM,Master/Slave mode" "0: No action,1: The effect of an event on the trigger input.."
bitfld.long 0x4 4.--6. "TS,TS[2:0]: Trigger selection" "0: Internal trigger 0 (tim_itr0),1: Internal trigger 1 (tim_itr1),2: Internal trigger 2 (tim_itr2),3: Internal trigger 3 (tim_itr3),4: tim_ti1 edge detector (tim_ti1f_ed),5: Filtered timer input 1 (tim_ti1fp1),6: Filtered timer input 2 (tim_ti2fp2),7: External trigger input (tim_etrf)"
newline
bitfld.long 0x4 3. "OCCS,OCREF clear selection" "0: tim_ocref_clr_int is connected to the..,1: tim_ocref_clr_int is connected to tim_etrf"
bitfld.long 0x4 0.--2. "SMS,SMS[2:0]: Slave mode selection" "0: Slave mode disabled-if CEN = 1 then the..,1: Encoder mode 1-Counter counts up/down on..,2: Encoder mode 2-Counter counts up/down on..,3: Encoder mode 3-Counter counts up/down on both..,4: Reset mode-Rising edge of the selected trigger..,5: Gated mode-The counter clock is enabled when the..,6: Trigger mode-The counter starts at a rising edge..,7: External clock mode 1-Rising edges of the.."
line.long 0x8 "TIM4_DIER,TIM4 DMA/Interrupt enable register"
bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "0: Transition error interrupt disabled,1: Transition error interrupt enabled"
bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "0: Index error interrupt disabled,1: Index error interrupt enabled"
newline
bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "0: Direction change interrupt disabled,1: Direction change interrupt enabled"
bitfld.long 0x8 20. "IDxIE,Index interrupt enable" "0: Index interrupt disabled,1: Index interrupt enabled"
newline
bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled.,1: Trigger DMA request enabled."
bitfld.long 0x8 12. "CC4DE,Capture/Compare 4 DMA request enable" "0: CC4 DMA request disabled.,1: CC4 DMA request enabled."
newline
bitfld.long 0x8 11. "CC3DE,Capture/Compare 3 DMA request enable" "0: CC3 DMA request disabled.,1: CC3 DMA request enabled."
bitfld.long 0x8 10. "CC2DE,Capture/Compare 2 DMA request enable" "0: CC2 DMA request disabled.,1: CC2 DMA request enabled."
newline
bitfld.long 0x8 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled.,1: CC1 DMA request enabled."
bitfld.long 0x8 8. "UDE,Update DMA request enable" "0: Update DMA request disabled.,1: Update DMA request enabled."
newline
bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled.,1: Trigger interrupt enabled."
bitfld.long 0x8 4. "CC4IE,Capture/Compare 4 interrupt enable" "0: CC4 interrupt disabled.,1: CC4 interrupt enabled."
newline
bitfld.long 0x8 3. "CC3IE,Capture/Compare 3 interrupt enable" "0: CC3 interrupt disabled.,1: CC3 interrupt enabled."
bitfld.long 0x8 2. "CC2IE,Capture/Compare 2 interrupt enable" "0: CC2 interrupt disabled.,1: CC2 interrupt enabled."
newline
bitfld.long 0x8 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled.,1: CC1 interrupt enabled."
bitfld.long 0x8 0. "UIE,Update interrupt enable" "0: Update interrupt disabled.,1: Update interrupt enabled."
line.long 0xC "TIM4_SR,TIM4 status register"
bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "0: No encoder transition error has been detected.,1: An encoder transition error has been detected"
bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "0: No index error has been detected.,1: An index error has been detected"
newline
bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change"
bitfld.long 0xC 20. "IDxF,Index interrupt flag" "0: No index event occurred.,1: An index event has occurred"
newline
bitfld.long 0xC 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1"
bitfld.long 0xC 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1"
newline
bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
bitfld.long 0xC 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected.,1: The counter value has been captured in TIMx_CCR1.."
newline
bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred.,1: Trigger interrupt pending."
bitfld.long 0xC 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1"
newline
bitfld.long 0xC 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1"
bitfld.long 0xC 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
newline
bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
bitfld.long 0xC 0. "UIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending."
wgroup.word 0x14++0x1
line.word 0x0 "TIM4_EGR,TIM4 event generation register"
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register."
bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1"
newline
bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1"
bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
newline
bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Re-initialize the counter and generates an.."
group.long 0x18++0x3
line.long 0x0 "TIM4_CCMR1,TIM4 capture/compare mode register 1"
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output.,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
newline
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
group.long 0x18++0x7
line.long 0x0 "TIM4_CCMR1_ALTERNATE1,TIM4 capture/compare mode register 1"
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
newline
bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output compare 2 mode" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
newline
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0: tim_oc1ref is not affected by the..,1: tim_oc1ref is cleared as soon as a High level is.."
newline
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output compare 1 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle-tim_oc1ref toggles when TIMx_CNT =..,4: Force inactive level-tim_oc1ref is forced low.,5: Force active level-tim_oc1ref is forced high.,6: PWM mode 1-In up-counting channel 1 is active as..,7: PWM mode 2-In up-counting channel 1 is inactive.."
bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
newline
bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output.,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
line.long 0x4 "TIM4_CCMR2,TIM4 capture/compare mode register 2"
hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter"
bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
newline
bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter"
newline
bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.long 0x1C++0x3
line.long 0x0 "TIM4_CCMR2_ALTERNATE1,TIM4 capture/compare mode register 2"
bitfld.long 0x0 24. "OC4M_1,OC4M[3]" "0,1"
bitfld.long 0x0 16. "OC3M_1,OC3M[3]" "0,1"
newline
bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC4M,OC4M[2:0]: Output compare 4 mode" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1"
bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1"
newline
bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1"
newline
bitfld.long 0x0 4.--6. "OC3M,OC3M[2:0]: Output compare 3 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 3 to active level on match.,2: Set channel 3 to inactive level on match.,3: Toggle-tim_oc3ref toggles when TIMx_CNT =..,4: Force inactive level-tim_oc3ref is forced low.,5: Force active level-tim_oc3ref is forced high.,6: PWM mode 1-In up-counting channel 3 is active as..,7: PWM mode 2-In up-counting channel 3 is inactive.."
bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1"
newline
bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1"
bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.word 0x20++0x1
line.word 0x0 "TIM4_CCER,TIM4 capture/compare enable register"
bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1"
bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1"
newline
bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1"
bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1"
newline
bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1"
bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1"
newline
bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1"
bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1"
newline
bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1"
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1"
newline
bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "0: OC1 active high (output mode) / Edge sensitivity..,1: OC1 active low (output mode) / Edge sensitivity.."
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "0: Capture mode disabled / OC1 is not active,1: Capture mode enabled / OC1 signal is output on.."
group.long 0x24++0x3
line.long 0x0 "TIM4_CNT,TIM4 counter"
bitfld.long 0x0 31. "UIFCPY_CNT,Value depends on IUFREMAP in TIMx_CR1." "0,1"
hexmask.long 0x0 0.--30. 1. "CNT,Least significant part of counter value"
group.word 0x28++0x1
line.word 0x0 "TIM4_PSC,TIM4 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM4_ARR,TIM4 autoreload register"
hexmask.long 0x0 0.--31. 1. "ARR,Autoreload value"
group.long 0x34++0xF
line.long 0x0 "TIM4_CCR1,TIM4 capture/compare register 1"
hexmask.long 0x0 0.--31. 1. "CCR1,Capture/compare 1 value"
line.long 0x4 "TIM4_CCR2,TIM4 capture/compare register 2"
hexmask.long 0x4 0.--31. 1. "CCR2,Capture/compare 2 value"
line.long 0x8 "TIM4_CCR3,TIM4 capture/compare register 3"
hexmask.long 0x8 0.--31. 1. "CCR3,Capture/compare 3 value"
line.long 0xC "TIM4_CCR4,TIM4 capture/compare register 4"
hexmask.long 0xC 0.--31. 1. "CCR4,Capture/compare 4 value"
group.long 0x58++0xF
line.long 0x0 "TIM4_ECR,TIM4 timer encoder control register"
bitfld.long 0x0 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 16.--23. 1. "PW,Pulse width"
newline
bitfld.long 0x0 6.--7. "IPOS,Index positioning" "0: Index resets the counter when AB = 00,1: Index resets the counter when AB = 01,2: Index resets the counter when AB = 10,3: Index resets the counter when AB = 11"
bitfld.long 0x0 5. "FIDx,First index" "0: Index is always active,1: the first Index only resets the counter"
newline
bitfld.long 0x0 3.--4. "IBLK,Index blanking" "0: Index always active,1: Index disabled hen tim_ti3 input is active as..,2: Index disabled when tim_ti4 input is active as..,?"
bitfld.long 0x0 1.--2. "IDIR,Index direction" "0: Index resets the counter whatever the direction,1: Index resets the counter when up-counting only,2: Index resets the counter when down-counting only,?"
newline
bitfld.long 0x0 0. "IE,Index enable" "0: Index disabled,1: Index enabled"
line.long 0x4 "TIM4_TISEL,TIM4 timer input selection register"
hexmask.long.byte 0x4 24.--27. 1. "TI4SEL,Selects tim_ti4[15:0] input"
hexmask.long.byte 0x4 16.--19. 1. "TI3SEL,Selects tim_ti3[15:0] input"
newline
hexmask.long.byte 0x4 8.--11. 1. "TI2SEL,Selects tim_ti2[15:0] input"
hexmask.long.byte 0x4 0.--3. 1. "TI1SEL,Selects tim_ti1[15:0] input"
line.long 0x8 "TIM4_AF1,TIM4 alternate function register 1"
hexmask.long.byte 0x8 14.--17. 1. "ETRSEL,etr_in source selection"
line.long 0xC "TIM4_AF2,TIM4 alternate function register 2"
bitfld.long 0xC 16.--18. "OCRSEL,ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,?,?,?,?,?,7: tim_ocref_clr7"
group.long 0x3DC++0x7
line.long 0x0 "TIM4_DCR,TIM4 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
newline
hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM4_DMAR,TIM4 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "TIM6"
base ad:0x40001000
group.word 0x0++0x1
line.word 0x0 "TIM6_CR1,TIM6 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping.,1: Remapping enabled."
newline
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered.,1: TIMx_ARR register is buffered."
bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
newline
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generates an update..,1: Only counter overflow/underflow generates an.."
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled.,1: UEV disabled."
newline
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.long 0x4++0x3
line.long 0x0 "TIM6_CR2,TIM6 control register 2"
bitfld.long 0x0 28. "ADSYNC,ADC synchronization" "0: The timer operates independently from the ADC,1: The timer operation is synchronized with the ADC.."
bitfld.long 0x0 4.--6. "MMS,Master mode selection" "0: Reset-the UG bit from the TIMx_EGR register is..,1: Enable-the Counter enable signal tim_cnt_en is..,2: Update-The update event is selected as a trigger..,?,?,?,?,?"
group.word 0xC++0x1
line.word 0x0 "TIM6_DIER,TIM6 DMA/Interrupt enable register"
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled.,1: Update DMA request enabled."
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled.,1: Update interrupt enabled."
group.word 0x10++0x1
line.word 0x0 "TIM6_SR,TIM6 status register"
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending."
wgroup.word 0x14++0x1
line.word 0x0 "TIM6_EGR,TIM6 event generation register"
bitfld.word 0x0 0. "UG,Update generation" "0: No action.,1: Re-initializes the timer counter and generates.."
group.long 0x24++0x3
line.long 0x0 "TIM6_CNT,TIM6 counter"
rbitfld.long 0x0 31. "UIFCPY,UIF copy" "0,1"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.word 0x28++0x1
line.word 0x0 "TIM6_PSC,TIM6 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM6_ARR,TIM6 autoreload register"
hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value"
tree.end
tree "SEC_TIM6"
base ad:0x50001000
group.word 0x0++0x1
line.word 0x0 "TIM6_CR1,TIM6 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping.,1: Remapping enabled."
newline
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered.,1: TIMx_ARR register is buffered."
bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
newline
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generates an update..,1: Only counter overflow/underflow generates an.."
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled.,1: UEV disabled."
newline
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.long 0x4++0x3
line.long 0x0 "TIM6_CR2,TIM6 control register 2"
bitfld.long 0x0 28. "ADSYNC,ADC synchronization" "0: The timer operates independently from the ADC,1: The timer operation is synchronized with the ADC.."
bitfld.long 0x0 4.--6. "MMS,Master mode selection" "0: Reset-the UG bit from the TIMx_EGR register is..,1: Enable-the Counter enable signal tim_cnt_en is..,2: Update-The update event is selected as a trigger..,?,?,?,?,?"
group.word 0xC++0x1
line.word 0x0 "TIM6_DIER,TIM6 DMA/Interrupt enable register"
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled.,1: Update DMA request enabled."
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled.,1: Update interrupt enabled."
group.word 0x10++0x1
line.word 0x0 "TIM6_SR,TIM6 status register"
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending."
wgroup.word 0x14++0x1
line.word 0x0 "TIM6_EGR,TIM6 event generation register"
bitfld.word 0x0 0. "UG,Update generation" "0: No action.,1: Re-initializes the timer counter and generates.."
group.long 0x24++0x3
line.long 0x0 "TIM6_CNT,TIM6 counter"
rbitfld.long 0x0 31. "UIFCPY,UIF copy" "0,1"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.word 0x28++0x1
line.word 0x0 "TIM6_PSC,TIM6 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM6_ARR,TIM6 autoreload register"
hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value"
tree.end
tree "TIM7"
base ad:0x40001400
group.word 0x0++0x1
line.word 0x0 "TIM7_CR1,TIM7 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping.,1: Remapping enabled."
newline
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered.,1: TIMx_ARR register is buffered."
bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
newline
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generates an update..,1: Only counter overflow/underflow generates an.."
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled.,1: UEV disabled."
newline
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.long 0x4++0x3
line.long 0x0 "TIM7_CR2,TIM7 control register 2"
bitfld.long 0x0 28. "ADSYNC,ADC synchronization" "0: The timer operates independently from the ADC,1: The timer operation is synchronized with the ADC.."
bitfld.long 0x0 4.--6. "MMS,Master mode selection" "0: Reset-the UG bit from the TIMx_EGR register is..,1: Enable-the Counter enable signal tim_cnt_en is..,2: Update-The update event is selected as a trigger..,?,?,?,?,?"
group.word 0xC++0x1
line.word 0x0 "TIM7_DIER,TIM7 DMA/Interrupt enable register"
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled.,1: Update DMA request enabled."
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled.,1: Update interrupt enabled."
group.word 0x10++0x1
line.word 0x0 "TIM7_SR,TIM7 status register"
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending."
wgroup.word 0x14++0x1
line.word 0x0 "TIM7_EGR,TIM7 event generation register"
bitfld.word 0x0 0. "UG,Update generation" "0: No action.,1: Re-initializes the timer counter and generates.."
group.long 0x24++0x3
line.long 0x0 "TIM7_CNT,TIM7 counter"
rbitfld.long 0x0 31. "UIFCPY,UIF copy" "0,1"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.word 0x28++0x1
line.word 0x0 "TIM7_PSC,TIM7 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM7_ARR,TIM7 autoreload register"
hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value"
tree.end
tree "SEC_TIM7"
base ad:0x50001400
group.word 0x0++0x1
line.word 0x0 "TIM7_CR1,TIM7 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping.,1: Remapping enabled."
newline
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered.,1: TIMx_ARR register is buffered."
bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
newline
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generates an update..,1: Only counter overflow/underflow generates an.."
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled.,1: UEV disabled."
newline
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.long 0x4++0x3
line.long 0x0 "TIM7_CR2,TIM7 control register 2"
bitfld.long 0x0 28. "ADSYNC,ADC synchronization" "0: The timer operates independently from the ADC,1: The timer operation is synchronized with the ADC.."
bitfld.long 0x0 4.--6. "MMS,Master mode selection" "0: Reset-the UG bit from the TIMx_EGR register is..,1: Enable-the Counter enable signal tim_cnt_en is..,2: Update-The update event is selected as a trigger..,?,?,?,?,?"
group.word 0xC++0x1
line.word 0x0 "TIM7_DIER,TIM7 DMA/Interrupt enable register"
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled.,1: Update DMA request enabled."
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled.,1: Update interrupt enabled."
group.word 0x10++0x1
line.word 0x0 "TIM7_SR,TIM7 status register"
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending."
wgroup.word 0x14++0x1
line.word 0x0 "TIM7_EGR,TIM7 event generation register"
bitfld.word 0x0 0. "UG,Update generation" "0: No action.,1: Re-initializes the timer counter and generates.."
group.long 0x24++0x3
line.long 0x0 "TIM7_CNT,TIM7 counter"
rbitfld.long 0x0 31. "UIFCPY,UIF copy" "0,1"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.word 0x28++0x1
line.word 0x0 "TIM7_PSC,TIM7 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM7_ARR,TIM7 autoreload register"
hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value"
tree.end
tree "TIM15"
base ad:0x40014000
group.word 0x0++0x1
line.word 0x0 "TIM15_CR1,TIM15 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping.,1: Remapping enabled."
newline
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: tless thansub>DTS less than/sub>= tless..,1: tless thansub>DTSless than/sub> = 2xtless..,2: tless thansub>DTSless than/sub> = 4xtless..,?"
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIM15_ARR register is not buffered,1: TIM15_ARR register is buffered"
newline
bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
newline
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled.,1: UEV disabled."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.long 0x4++0x7
line.long 0x0 "TIM15_CR2,TIM15 control register 2"
bitfld.long 0x0 28. "ADSYNC,ADC synchronization" "0: The timer operates independently from the ADC,1: The timer operation is synchronized with the ADC.."
bitfld.long 0x0 10. "OIS2,Output idle state 2 (tim_oc2 output)" "0: tim_oc2 = 0 when MOE = 0,1: tim_oc2 = 1 when MOE = 0"
newline
bitfld.long 0x0 9. "OIS1N,Output Idle state 1 (tim_oc1n output)" "0: tim_oc1n = 0 after a dead-time when MOE = 0,1: tim_oc1n = 1 after a dead-time when MOE = 0"
bitfld.long 0x0 8. "OIS1,Output Idle state 1 (tim_oc1 output)" "0: tim_oc1 = 0 after a dead-time when MOE = 0,1: tim_oc1 = 1 after a dead-time when MOE = 0"
newline
bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "0: The tim_ti1_in[15:0] multiplexer output is..,1: The tim_ti1_in[15:0] and tim_ti2_in[15:0].."
bitfld.long 0x0 4.--6. "MMS,Master mode selection" "0: Reset-the UG bit from the TIM15_EGR register is..,1: Enable-the Counter Enable signal CNT_EN is used..,2: Update-The update event is selected as trigger..,3: Compare Pulse-The trigger output send a positive..,4: Compare-tim_oc1refc signal is used as trigger..,5: Compare-tim_oc2refc signal is used as trigger..,?,?"
newline
bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
bitfld.long 0x0 2. "CCUS,Capture/compare control update selection" "0: When capture/compare control bits are preloaded..,1: When capture/compare control bits are preloaded.."
newline
bitfld.long 0x0 0. "CCPC,Capture/compare preloaded control" "0: CCxE CCxNE and OCxM bits are not preloaded,1: CCxE CCxNE and OCxM bits are preloaded after.."
line.long 0x4 "TIM15_SMCR,TIM15 slave mode control register"
bitfld.long 0x4 24. "SMSPE,SMS preload enable" "0: SMS[3:0] bit field is not preloaded,1: SMS[3:0] preload is enabled"
bitfld.long 0x4 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
newline
bitfld.long 0x4 16. "SMS_1,SMS[3]" "0,1"
bitfld.long 0x4 7. "MSM,Master/slave mode" "0: No action,1: The effect of an event on the trigger input.."
newline
bitfld.long 0x4 4.--6. "TS,TS[2:0]: Trigger selection" "0: Internal Trigger 0 (tim_itr0),1: Internal Trigger 1 (tim_itr1),2: Internal Trigger 2 (tim_itr2),3: Internal Trigger 3 (tim_itr3),4: tim_ti1 Edge Detector (tim_ti1f_ed),5: Filtered Timer Input 1 (tim_ti1fp1),6: Filtered Timer Input 2 (tim_ti2fp2),?"
bitfld.long 0x4 0.--2. "SMS,SMS[2:0]: Slave mode selection" "0: Slave mode disabled-if CEN = 1 then the..,?,?,?,4: Reset mode-Rising edge of the selected trigger..,5: Gated mode-The counter clock is enabled when the..,6: Trigger mode-The counter starts at a rising edge..,7: External Clock mode 1-Rising edges of the.."
group.word 0xC++0x1
line.word 0x0 "TIM15_DIER,TIM15 DMA/interrupt enable register"
bitfld.word 0x0 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled,1: Trigger DMA request enabled"
bitfld.word 0x0 13. "COMDE,COM DMA request enable" "0: COM DMA request disabled,1: COM DMA request enabled"
newline
bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled"
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled"
newline
bitfld.word 0x0 7. "BIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled"
bitfld.word 0x0 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled,1: Trigger interrupt enabled"
newline
bitfld.word 0x0 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled"
bitfld.word 0x0 2. "CC2IE,Capture/Compare 2 interrupt enable" "0: CC2 interrupt disabled,1: CC2 interrupt enabled"
newline
bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled"
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled"
group.word 0x10++0x1
line.word 0x0 "TIM15_SR,TIM15 status register"
bitfld.word 0x0 10. "CC2OF,Capture/Compare 2 overcapture flag" "0,1"
bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in.."
newline
bitfld.word 0x0 7. "BIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.."
bitfld.word 0x0 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred,1: Trigger interrupt pending"
newline
bitfld.word 0x0 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending"
bitfld.word 0x0 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
newline
bitfld.word 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending."
group.word 0x14++0x1
line.word 0x0 "TIM15_EGR,TIM15 event generation register"
bitfld.word 0x0 7. "BG,Break generation" "0: No action,1: A break event is generated."
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIM15_SR register."
newline
bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "0: No action,1: When the CCPC bit is set it is possible to.."
bitfld.word 0x0 2. "CC2G,Capture/Compare 2 generation" "0,1"
newline
bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "0: No action,?"
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Reinitialize the counter and generates an update.."
group.long 0x18++0x3
line.long 0x0 "TIM15_CCMR1,TIM15 capture/compare mode register 1"
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
newline
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
group.long 0x18++0x3
line.long 0x0 "TIM15_CCMR1_ALTERNATE1,TIM15 capture/compare mode register 1"
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
newline
bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output compare 2 mode" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
newline
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output.,1: CC2 channel is configured as input tim_ic2 is..,2: C2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0: tim_oc1ref is not affected by the..,1: tim_oc1ref is cleared as soon as a High level is.."
newline
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output compare 1 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle-tim_oc1ref toggles when TIM15_CNT =..,4: Force inactive level-tim_oc1ref is forced low.,5: Force active level-tim_oc1ref is forced high.,6: PWM mode 1-Channel 1 is active as long as..,7: PWM mode 2-Channel 1 is inactive as long as.."
bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "0: Preload register on TIM15_CCR1 disabled.,1: Preload register on TIM15_CCR1 enabled."
newline
bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output.,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
group.word 0x20++0x1
line.word 0x0 "TIM15_CCER,TIM15 capture/compare enable register"
bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 complementary output polarity" "0,1"
bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output polarity" "0,1"
newline
bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable" "0,1"
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output polarity" "0: tim_oc1n active high,1: tim_oc1n active low"
newline
bitfld.word 0x0 2. "CC1NE,Capture/Compare 1 complementary output enable" "0: Off-tim_oc1n is not active.,1: On-tim_oc1n signal is output on the.."
bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output polarity" "0: OC1 active high (output mode) / Edge sensitivity..,1: OC1 active low (output mode) / Edge sensitivity.."
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bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable" "0: Capture mode disabled / OC1 is not active (see..,1: Capture mode enabled / OC1 signal is output on.."
group.long 0x24++0x3
line.long 0x0 "TIM15_CNT,TIM15 counter"
rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.word 0x28++0x1
line.word 0x0 "TIM15_PSC,TIM15 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM15_ARR,TIM15 autoreload register"
hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value"
group.word 0x30++0x1
line.word 0x0 "TIM15_RCR,TIM15 repetition counter register"
hexmask.word.byte 0x0 0.--7. 1. "REP,Repetition counter reload value"
group.long 0x34++0x7
line.long 0x0 "TIM15_CCR1,TIM15 capture/compare register 1"
hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value"
line.long 0x4 "TIM15_CCR2,TIM15 capture/compare register 2"
hexmask.long.tbyte 0x4 0.--19. 1. "CCR2,Capture/compare 2 value"
group.long 0x44++0x3
line.long 0x0 "TIM15_BDTR,TIM15 break and dead-time register"
bitfld.long 0x0 28. "BKBID,Break bidirectional" "0: Break input tim_brk in input mode,1: Break input tim_brk in bidirectional mode"
bitfld.long 0x0 26. "BKDSRM,Break disarm" "0: Break input tim_brk is armed,1: Break input tim_brk is disarmed"
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hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter"
bitfld.long 0x0 15. "MOE,Main output enable" "0: tim_ocx and tim_ocxn outputs are disabled or..,1: tim_ocx and tim_ocxn outputs are enabled if.."
newline
bitfld.long 0x0 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.."
bitfld.long 0x0 13. "BKP,Break polarity" "0: Break input tim_brk is active low,1: Break input tim_brk is active high"
newline
bitfld.long 0x0 12. "BKE,Break enable" "0: Break inputs (tim_brk and tim_sys_brk clock..,?"
bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "0: When inactive tim_ocx/tim_ocxn outputs are..,1: When inactive tim_ocx/tim_ocxn outputs are.."
newline
bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "0: When inactive tim_ocx/tim_ocxn outputs are..,1: When inactive tim_ocx/tim_ocxn outputs are.."
bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "0: LOCK OFF-No bit is write protected,1: LOCK Level 1 = DTG bits in TIM15_BDTR register..,2: LOCK Level 2 = LOCK Level 1 + CC Polarity bits..,3: OCK Level 3 = LOCK Level 2 + CC Control bits.."
newline
hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup"
group.long 0x54++0x3
line.long 0x0 "TIM15_DTR2,TIM15 timer deadtime register 2"
bitfld.long 0x0 17. "DTPE,Deadtime preload enable" "0: Deadtime value is not preloaded,1: Deadtime value preload is enabled"
bitfld.long 0x0 16. "DTAE,Deadtime asymmetric enable" "0: Deadtime on rising and falling edges are..,1: Deadtime on rising edge is defined with DTG[7:0].."
newline
hexmask.long.byte 0x0 0.--7. 1. "DTGF,Dead-time falling edge generator setup"
group.long 0x5C++0xB
line.long 0x0 "TIM15_TISEL,TIM15 input selection register"
hexmask.long.byte 0x0 8.--11. 1. "TI2SEL,selects tim_ti2_in[15:0] input"
hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[15:0] input"
line.long 0x4 "TIM15_AF1,TIM15 alternate function register 1"
bitfld.long 0x4 13. "BKCMP4P,tim_brk_cmp4 input polarity" "0: tim_brk_cmp4 input is active high,1: tim_brk_cmp4 input is active low"
bitfld.long 0x4 12. "BKCMP3P,tim_brk_cmp3 input polarity" "0: tim_brk_cmp3 input is active high,1: tim_brk_cmp3 input is active low"
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bitfld.long 0x4 11. "BKCMP2P,tim_brk_cmp2 input polarity" "0: tim_brk_cmp2 input is active high,1: tim_brk_cmp2 input is active low"
bitfld.long 0x4 10. "BKCMP1P,tim_brk_cmp1 input polarity" "0: tim_brk_cmp1 input is active high,1: tim_brk_cmp1 input is active low"
newline
bitfld.long 0x4 9. "BKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input is active high,1: TIMx_BKIN input is active low"
bitfld.long 0x4 8. "BKCMP8E,tim_brk_cmp8 enable" "0: tim_brk_cmp8 input disabled,1: tim_brk_cmp8 input enabled"
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bitfld.long 0x4 7. "BKCMP7E,tim_brk_cmp7 enable" "0: tim_brk_cmp7 input disabled,1: tim_brk_cmp7 input enabled"
bitfld.long 0x4 6. "BKCMP6E,tim_brk_cmp6 enable" "0: tim_brk_cmp6 input disabled,1: tim_brk_cmp6 input enabled"
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bitfld.long 0x4 5. "BKCMP5E,tim_brk_cmp5 enable" "0: tim_brk_cmp5 input disabled,1: tim_brk_cmp5 input enabled"
bitfld.long 0x4 4. "BKCMP4E,tim_brk_cmp4 enable" "0: tim_brk_cmp4 input disabled,1: tim_brk_cmp4 input enabled"
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bitfld.long 0x4 3. "BKCMP3E,tim_brk_cmp3 enable" "0: tim_brk_cmp3 input disabled,1: tim_brk_cmp3 input enabled"
bitfld.long 0x4 2. "BKCMP2E,tim_brk_cmp2 enable" "0: tim_brk_cmp2 input disabled,1: tim_brk_cmp2 input enabled"
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bitfld.long 0x4 1. "BKCMP1E,tim_brk_cmp1 enable" "0: tim_brk_cmp1 input disabled,1: tim_brk_cmp1 input enabled"
bitfld.long 0x4 0. "BKINE,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled"
line.long 0x8 "TIM15_AF2,TIM15 alternate function register 2"
bitfld.long 0x8 16.--18. "OCRSEL,ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,2: tim_ocref_clr2,3: tim_ocref_clr3,4: tim_ocref_clr4,5: tim_ocref_clr5,6: tim_ocref_clr6,7: tim_ocref_clr7"
group.long 0x3DC++0x7
line.long 0x0 "TIM15_DCR,TIM15 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
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hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM15_DMAR,TIM15 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "SEC_TIM15"
base ad:0x50014000
group.word 0x0++0x1
line.word 0x0 "TIM15_CR1,TIM15 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping.,1: Remapping enabled."
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bitfld.word 0x0 8.--9. "CKD,Clock division" "0: tless thansub>DTS less than/sub>= tless..,1: tless thansub>DTSless than/sub> = 2xtless..,2: tless thansub>DTSless than/sub> = 4xtless..,?"
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIM15_ARR register is not buffered,1: TIM15_ARR register is buffered"
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bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
newline
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled.,1: UEV disabled."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.long 0x4++0x7
line.long 0x0 "TIM15_CR2,TIM15 control register 2"
bitfld.long 0x0 28. "ADSYNC,ADC synchronization" "0: The timer operates independently from the ADC,1: The timer operation is synchronized with the ADC.."
bitfld.long 0x0 10. "OIS2,Output idle state 2 (tim_oc2 output)" "0: tim_oc2 = 0 when MOE = 0,1: tim_oc2 = 1 when MOE = 0"
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bitfld.long 0x0 9. "OIS1N,Output Idle state 1 (tim_oc1n output)" "0: tim_oc1n = 0 after a dead-time when MOE = 0,1: tim_oc1n = 1 after a dead-time when MOE = 0"
bitfld.long 0x0 8. "OIS1,Output Idle state 1 (tim_oc1 output)" "0: tim_oc1 = 0 after a dead-time when MOE = 0,1: tim_oc1 = 1 after a dead-time when MOE = 0"
newline
bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "0: The tim_ti1_in[15:0] multiplexer output is..,1: The tim_ti1_in[15:0] and tim_ti2_in[15:0].."
bitfld.long 0x0 4.--6. "MMS,Master mode selection" "0: Reset-the UG bit from the TIM15_EGR register is..,1: Enable-the Counter Enable signal CNT_EN is used..,2: Update-The update event is selected as trigger..,3: Compare Pulse-The trigger output send a positive..,4: Compare-tim_oc1refc signal is used as trigger..,5: Compare-tim_oc2refc signal is used as trigger..,?,?"
newline
bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
bitfld.long 0x0 2. "CCUS,Capture/compare control update selection" "0: When capture/compare control bits are preloaded..,1: When capture/compare control bits are preloaded.."
newline
bitfld.long 0x0 0. "CCPC,Capture/compare preloaded control" "0: CCxE CCxNE and OCxM bits are not preloaded,1: CCxE CCxNE and OCxM bits are preloaded after.."
line.long 0x4 "TIM15_SMCR,TIM15 slave mode control register"
bitfld.long 0x4 24. "SMSPE,SMS preload enable" "0: SMS[3:0] bit field is not preloaded,1: SMS[3:0] preload is enabled"
bitfld.long 0x4 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
newline
bitfld.long 0x4 16. "SMS_1,SMS[3]" "0,1"
bitfld.long 0x4 7. "MSM,Master/slave mode" "0: No action,1: The effect of an event on the trigger input.."
newline
bitfld.long 0x4 4.--6. "TS,TS[2:0]: Trigger selection" "0: Internal Trigger 0 (tim_itr0),1: Internal Trigger 1 (tim_itr1),2: Internal Trigger 2 (tim_itr2),3: Internal Trigger 3 (tim_itr3),4: tim_ti1 Edge Detector (tim_ti1f_ed),5: Filtered Timer Input 1 (tim_ti1fp1),6: Filtered Timer Input 2 (tim_ti2fp2),?"
bitfld.long 0x4 0.--2. "SMS,SMS[2:0]: Slave mode selection" "0: Slave mode disabled-if CEN = 1 then the..,?,?,?,4: Reset mode-Rising edge of the selected trigger..,5: Gated mode-The counter clock is enabled when the..,6: Trigger mode-The counter starts at a rising edge..,7: External Clock mode 1-Rising edges of the.."
group.word 0xC++0x1
line.word 0x0 "TIM15_DIER,TIM15 DMA/interrupt enable register"
bitfld.word 0x0 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled,1: Trigger DMA request enabled"
bitfld.word 0x0 13. "COMDE,COM DMA request enable" "0: COM DMA request disabled,1: COM DMA request enabled"
newline
bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled"
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled"
newline
bitfld.word 0x0 7. "BIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled"
bitfld.word 0x0 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled,1: Trigger interrupt enabled"
newline
bitfld.word 0x0 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled"
bitfld.word 0x0 2. "CC2IE,Capture/Compare 2 interrupt enable" "0: CC2 interrupt disabled,1: CC2 interrupt enabled"
newline
bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled"
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled"
group.word 0x10++0x1
line.word 0x0 "TIM15_SR,TIM15 status register"
bitfld.word 0x0 10. "CC2OF,Capture/Compare 2 overcapture flag" "0,1"
bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in.."
newline
bitfld.word 0x0 7. "BIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.."
bitfld.word 0x0 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred,1: Trigger interrupt pending"
newline
bitfld.word 0x0 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending"
bitfld.word 0x0 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
newline
bitfld.word 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending."
group.word 0x14++0x1
line.word 0x0 "TIM15_EGR,TIM15 event generation register"
bitfld.word 0x0 7. "BG,Break generation" "0: No action,1: A break event is generated."
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIM15_SR register."
newline
bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "0: No action,1: When the CCPC bit is set it is possible to.."
bitfld.word 0x0 2. "CC2G,Capture/Compare 2 generation" "0,1"
newline
bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "0: No action,?"
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Reinitialize the counter and generates an update.."
group.long 0x18++0x3
line.long 0x0 "TIM15_CCMR1,TIM15 capture/compare mode register 1"
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
newline
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
group.long 0x18++0x3
line.long 0x0 "TIM15_CCMR1_ALTERNATE1,TIM15 capture/compare mode register 1"
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
newline
bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output compare 2 mode" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
newline
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output.,1: CC2 channel is configured as input tim_ic2 is..,2: C2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0: tim_oc1ref is not affected by the..,1: tim_oc1ref is cleared as soon as a High level is.."
newline
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output compare 1 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle-tim_oc1ref toggles when TIM15_CNT =..,4: Force inactive level-tim_oc1ref is forced low.,5: Force active level-tim_oc1ref is forced high.,6: PWM mode 1-Channel 1 is active as long as..,7: PWM mode 2-Channel 1 is inactive as long as.."
bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "0: Preload register on TIM15_CCR1 disabled.,1: Preload register on TIM15_CCR1 enabled."
newline
bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output.,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
group.word 0x20++0x1
line.word 0x0 "TIM15_CCER,TIM15 capture/compare enable register"
bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 complementary output polarity" "0,1"
bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output polarity" "0,1"
newline
bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable" "0,1"
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output polarity" "0: tim_oc1n active high,1: tim_oc1n active low"
newline
bitfld.word 0x0 2. "CC1NE,Capture/Compare 1 complementary output enable" "0: Off-tim_oc1n is not active.,1: On-tim_oc1n signal is output on the.."
bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output polarity" "0: OC1 active high (output mode) / Edge sensitivity..,1: OC1 active low (output mode) / Edge sensitivity.."
newline
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable" "0: Capture mode disabled / OC1 is not active (see..,1: Capture mode enabled / OC1 signal is output on.."
group.long 0x24++0x3
line.long 0x0 "TIM15_CNT,TIM15 counter"
rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.word 0x28++0x1
line.word 0x0 "TIM15_PSC,TIM15 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM15_ARR,TIM15 autoreload register"
hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value"
group.word 0x30++0x1
line.word 0x0 "TIM15_RCR,TIM15 repetition counter register"
hexmask.word.byte 0x0 0.--7. 1. "REP,Repetition counter reload value"
group.long 0x34++0x7
line.long 0x0 "TIM15_CCR1,TIM15 capture/compare register 1"
hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value"
line.long 0x4 "TIM15_CCR2,TIM15 capture/compare register 2"
hexmask.long.tbyte 0x4 0.--19. 1. "CCR2,Capture/compare 2 value"
group.long 0x44++0x3
line.long 0x0 "TIM15_BDTR,TIM15 break and dead-time register"
bitfld.long 0x0 28. "BKBID,Break bidirectional" "0: Break input tim_brk in input mode,1: Break input tim_brk in bidirectional mode"
bitfld.long 0x0 26. "BKDSRM,Break disarm" "0: Break input tim_brk is armed,1: Break input tim_brk is disarmed"
newline
hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter"
bitfld.long 0x0 15. "MOE,Main output enable" "0: tim_ocx and tim_ocxn outputs are disabled or..,1: tim_ocx and tim_ocxn outputs are enabled if.."
newline
bitfld.long 0x0 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.."
bitfld.long 0x0 13. "BKP,Break polarity" "0: Break input tim_brk is active low,1: Break input tim_brk is active high"
newline
bitfld.long 0x0 12. "BKE,Break enable" "0: Break inputs (tim_brk and tim_sys_brk clock..,?"
bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "0: When inactive tim_ocx/tim_ocxn outputs are..,1: When inactive tim_ocx/tim_ocxn outputs are.."
newline
bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "0: When inactive tim_ocx/tim_ocxn outputs are..,1: When inactive tim_ocx/tim_ocxn outputs are.."
bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "0: LOCK OFF-No bit is write protected,1: LOCK Level 1 = DTG bits in TIM15_BDTR register..,2: LOCK Level 2 = LOCK Level 1 + CC Polarity bits..,3: OCK Level 3 = LOCK Level 2 + CC Control bits.."
newline
hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup"
group.long 0x54++0x3
line.long 0x0 "TIM15_DTR2,TIM15 timer deadtime register 2"
bitfld.long 0x0 17. "DTPE,Deadtime preload enable" "0: Deadtime value is not preloaded,1: Deadtime value preload is enabled"
bitfld.long 0x0 16. "DTAE,Deadtime asymmetric enable" "0: Deadtime on rising and falling edges are..,1: Deadtime on rising edge is defined with DTG[7:0].."
newline
hexmask.long.byte 0x0 0.--7. 1. "DTGF,Dead-time falling edge generator setup"
group.long 0x5C++0xB
line.long 0x0 "TIM15_TISEL,TIM15 input selection register"
hexmask.long.byte 0x0 8.--11. 1. "TI2SEL,selects tim_ti2_in[15:0] input"
hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[15:0] input"
line.long 0x4 "TIM15_AF1,TIM15 alternate function register 1"
bitfld.long 0x4 13. "BKCMP4P,tim_brk_cmp4 input polarity" "0: tim_brk_cmp4 input is active high,1: tim_brk_cmp4 input is active low"
bitfld.long 0x4 12. "BKCMP3P,tim_brk_cmp3 input polarity" "0: tim_brk_cmp3 input is active high,1: tim_brk_cmp3 input is active low"
newline
bitfld.long 0x4 11. "BKCMP2P,tim_brk_cmp2 input polarity" "0: tim_brk_cmp2 input is active high,1: tim_brk_cmp2 input is active low"
bitfld.long 0x4 10. "BKCMP1P,tim_brk_cmp1 input polarity" "0: tim_brk_cmp1 input is active high,1: tim_brk_cmp1 input is active low"
newline
bitfld.long 0x4 9. "BKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input is active high,1: TIMx_BKIN input is active low"
bitfld.long 0x4 8. "BKCMP8E,tim_brk_cmp8 enable" "0: tim_brk_cmp8 input disabled,1: tim_brk_cmp8 input enabled"
newline
bitfld.long 0x4 7. "BKCMP7E,tim_brk_cmp7 enable" "0: tim_brk_cmp7 input disabled,1: tim_brk_cmp7 input enabled"
bitfld.long 0x4 6. "BKCMP6E,tim_brk_cmp6 enable" "0: tim_brk_cmp6 input disabled,1: tim_brk_cmp6 input enabled"
newline
bitfld.long 0x4 5. "BKCMP5E,tim_brk_cmp5 enable" "0: tim_brk_cmp5 input disabled,1: tim_brk_cmp5 input enabled"
bitfld.long 0x4 4. "BKCMP4E,tim_brk_cmp4 enable" "0: tim_brk_cmp4 input disabled,1: tim_brk_cmp4 input enabled"
newline
bitfld.long 0x4 3. "BKCMP3E,tim_brk_cmp3 enable" "0: tim_brk_cmp3 input disabled,1: tim_brk_cmp3 input enabled"
bitfld.long 0x4 2. "BKCMP2E,tim_brk_cmp2 enable" "0: tim_brk_cmp2 input disabled,1: tim_brk_cmp2 input enabled"
newline
bitfld.long 0x4 1. "BKCMP1E,tim_brk_cmp1 enable" "0: tim_brk_cmp1 input disabled,1: tim_brk_cmp1 input enabled"
bitfld.long 0x4 0. "BKINE,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled"
line.long 0x8 "TIM15_AF2,TIM15 alternate function register 2"
bitfld.long 0x8 16.--18. "OCRSEL,ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,2: tim_ocref_clr2,3: tim_ocref_clr3,4: tim_ocref_clr4,5: tim_ocref_clr5,6: tim_ocref_clr6,7: tim_ocref_clr7"
group.long 0x3DC++0x7
line.long 0x0 "TIM15_DCR,TIM15 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
newline
hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM15_DMAR,TIM15 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "TIM16"
base ad:0x40014400
group.word 0x0++0x1
line.word 0x0 "TIM16_CR1,TIM16 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping.,1: Remapping enabled."
newline
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: tless thansub>DTSless than/sub> = tless..,1: tless thansub>DTSless than/sub> = 2xtless..,2: tless thansub>DTSless than/sub> = 4xtless..,?"
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
newline
bitfld.word 0x0 3. "OPM,One pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: nly counter overflow/underflow generates an.."
newline
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled.,1: UEV disabled."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.word 0x4++0x1
line.word 0x0 "TIM16_CR2,TIM16 control register 2"
bitfld.word 0x0 9. "OIS1N,Output Idle state 1 (tim_oc1n output)" "0: tim_oc1n = 0 after a dead-time when MOE = 0,1: tim_oc1n = 1 after a dead-time when MOE = 0"
bitfld.word 0x0 8. "OIS1,Output Idle state 1 (tim_oc1 output)" "0: tim_oc1 = 0 after a dead-time when MOE = 0,1: tim_oc1 = 1 after a dead-time when MOE = 0"
newline
bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
bitfld.word 0x0 2. "CCUS,Capture/compare control update selection" "0: When capture/compare control bits are preloaded..,1: When capture/compare control bits are preloaded.."
newline
bitfld.word 0x0 0. "CCPC,Capture/compare preloaded control" "0: CCxE CCxNE and OCxM bits are not preloaded,1: CCxE CCxNE and OCxM bits are preloaded after.."
group.word 0xC++0x1
line.word 0x0 "TIM16_DIER,TIM16 DMA/interrupt enable register"
bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled"
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled"
newline
bitfld.word 0x0 7. "BIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled"
bitfld.word 0x0 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled"
newline
bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled"
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled"
group.word 0x10++0x1
line.word 0x0 "TIM16_SR,TIM16 status register"
bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in TIMx_CCR1.."
bitfld.word 0x0 7. "BIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.."
newline
bitfld.word 0x0 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending"
bitfld.word 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
newline
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending."
wgroup.word 0x14++0x1
line.word 0x0 "TIM16_EGR,TIM16 event generation register"
bitfld.word 0x0 7. "BG,Break generation" "0: No action.,1: A break event is generated."
bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "0: No action,1: When the CCPC bit is set it is possible to.."
newline
bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "0: No action.,1: A capture/compare event is generated on channel 1:"
bitfld.word 0x0 0. "UG,Update generation" "0: No action.,1: Reinitialize the counter and generates an update.."
group.long 0x18++0x3
line.long 0x0 "TIM16_CCMR1,TIM16 capture/compare mode register 1"
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
newline
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,?,?"
group.long 0x18++0x3
line.long 0x0 "TIM16_CCMR1_ALTERNATE1,TIM16 capture/compare mode register 1"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
bitfld.long 0x0 7. "OC1CE,Output Compare 1 clear enable" "0: tim_oc1ref is not affected by the tim_ocref_clr..,1: tim_oc1ref is cleared as soon as a High level is.."
newline
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output Compare 1 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle-tim_oc1ref toggles when TIMx_CNT =..,4: Force inactive level-tim_oc1ref is forced low.,5: Force active level-tim_oc1ref is forced high.,6: PWM mode 1-Channel 1 is active as long as..,7: PWM mode 2-Channel 1 is inactive as long as.."
bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
newline
bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,?,?"
group.word 0x20++0x1
line.word 0x0 "TIM16_CCER,TIM16 capture/compare enable register"
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output polarity" "0: tim_oc1n active high,1: tim_oc1n active low"
bitfld.word 0x0 2. "CC1NE,Capture/Compare 1 complementary output enable" "0: Off-tim_oc1n is not active.,1: On-tim_oc1n signal is output on the.."
newline
bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output polarity" "0: OC1 active high (output mode) / Edge sensitivity..,1: OC1 active low (output mode) / Edge sensitivity.."
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable" "0: Capture mode disabled / OC1 is not active (see..,1: Capture mode enabled / OC1 signal is output on.."
group.long 0x24++0x3
line.long 0x0 "TIM16_CNT,TIM16 counter"
rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.word 0x28++0x1
line.word 0x0 "TIM16_PSC,TIM16 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM16_ARR,TIM16 auto-reautoreload register"
hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value"
group.word 0x30++0x1
line.word 0x0 "TIM16_RCR,TIM16 repetition counter register"
hexmask.word.byte 0x0 0.--7. 1. "REP,Repetition counter reload value"
group.long 0x34++0x3
line.long 0x0 "TIM16_CCR1,TIM16 capture/compare register 1"
hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/Compare 1 value"
group.long 0x44++0x3
line.long 0x0 "TIM16_BDTR,TIM16 break and dead-time register"
bitfld.long 0x0 28. "BKBID,Break Bidirectional" "0: Break input tim_brk in input mode,1: Break input tim_brk in bidirectional mode"
bitfld.long 0x0 26. "BKDSRM,Break Disarm" "0: Break input tim_brk is armed,1: Break input tim_brk is disarmed"
newline
hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter"
bitfld.long 0x0 15. "MOE,Main output enable" "0: tim_oc1 and tim_oc1n outputs are disabled or..,1: tim_oc1 and tim_oc1n outputs are enabled if.."
newline
bitfld.long 0x0 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.."
bitfld.long 0x0 13. "BKP,Break polarity" "0: Break input tim_brk is active low,1: Break input tim_brk is active high"
newline
bitfld.long 0x0 12. "BKE,Break enable" "0: Break inputs (tim_brk and tim_sys_brk event)..,?"
bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "0: When inactive tim_oc1/tim_oc1n outputs are..,1: When inactive tim_oc1/tim_oc1n outputs are.."
newline
bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "0: When inactive tim_oc1/tim_oc1n outputs are..,1: When inactive tim_oc1/tim_oc1n outputs are.."
bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "0: LOCK OFF-No bit is write protected,1: LOCK Level 1 = DTG bits in TIMx_BDTR register..,2: LOCK Level 2 = LOCK Level 1 + CC Polarity bits..,3: LOCK Level 3 = LOCK Level 2 + CC Control bits.."
newline
hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup"
group.long 0x54++0x3
line.long 0x0 "TIM16_DTR2,TIM16 timer deadtime register 2"
bitfld.long 0x0 17. "DTPE,Deadtime preload enable" "0: Deadtime value is not preloaded,1: Deadtime value preload is enabled"
bitfld.long 0x0 16. "DTAE,Deadtime asymmetric enable" "0: Deadtime on rising and falling edges are..,1: Deadtime on rising edge is defined with DTG[7:0].."
newline
hexmask.long.byte 0x0 0.--7. 1. "DTGF,Dead-time falling edge generator setup"
group.long 0x5C++0xF
line.long 0x0 "TIM16_TISEL,TIM16 input selection register"
hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[15:0] input"
line.long 0x4 "TIM16_AF1,TIM16 alternate function register 1"
bitfld.long 0x4 13. "BKCMP4P,tim_brk_cmp4 input polarity" "0: tim_brk_cmp4 input is active high,1: tim_brk_cmp4 input is active low"
bitfld.long 0x4 12. "BKCMP3P,tim_brk_cmp3 input polarity" "0: tim_brk_cmp3 input is active high,1: tim_brk_cmp3 input is active low"
newline
bitfld.long 0x4 11. "BKCMP2P,tim_brk_cmp2 input polarity" "0: tim_brk_cmp2 input is active high,1: tim_brk_cmp2 input is active low"
bitfld.long 0x4 10. "BKCMP1P,tim_brk_cmp1 input polarity" "0: tim_brk_cmp1 input is active high,1: tim_brk_cmp1 input is active low"
newline
bitfld.long 0x4 9. "BKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input is active high,1: TIMx_BKIN input is active low"
bitfld.long 0x4 8. "BKCMP8E,tim_brk_cmp8 enable" "0: tim_brk_cmp8 input disabled,1: tim_brk_cmp8 input enabled"
newline
bitfld.long 0x4 7. "BKCMP7E,tim_brk_cmp7 enable" "0: tim_brk_cmp7 input disabled,1: tim_brk_cmp7 input enabled"
bitfld.long 0x4 6. "BKCMP6E,tim_brk_cmp6 enable" "0: tim_brk_cmp6 input disabled,1: tim_brk_cmp6 input enabled"
newline
bitfld.long 0x4 5. "BKCMP5E,tim_brk_cmp5 enable" "0: tim_brk_cmp5 input disabled,1: tim_brk_cmp5 input enabled"
bitfld.long 0x4 4. "BKCMP4E,tim_brk_cmp4 enable" "0: tim_brk_cmp4 input disabled,1: tim_brk_cmp4 input enabled"
newline
bitfld.long 0x4 3. "BKCMP3E,tim_brk_cmp3 enable" "0: tim_brk_cmp3 input disabled,1: tim_brk_cmp3 input enabled"
bitfld.long 0x4 2. "BKCMP2E,tim_brk_cmp2 enable" "0: tim_brk_cmp2 input disabled,1: tim_brk_cmp2 input enabled"
newline
bitfld.long 0x4 1. "BKCMP1E,tim_brk_cmp1 enable" "0: tim_brk_cmp1 input disabled,1: tim_brk_cmp1 input enabled"
bitfld.long 0x4 0. "BKINE,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled"
line.long 0x8 "TIM16_AF2,TIM16 alternate function register 2"
bitfld.long 0x8 16.--18. "OCRSEL,tim_ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,2: tim_ocref_clr2,3: tim_ocref_clr3,4: tim_ocref_clr4,5: tim_ocref_clr5,6: tim_ocref_clr6,7: tim_ocref_clr7"
line.long 0xC "TIM16_OR1,TIM16 option register 1"
bitfld.long 0xC 1. "HSE32EN,HSE Divided by 32 enable" "0: HSE divided by 32 disabled,1: HSE divided by 32 enabled"
group.long 0x3DC++0x7
line.long 0x0 "TIM16_DCR,TIM16 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
newline
hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM16_DMAR,TIM16/TIM17 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "SEC_TIM16"
base ad:0x50014400
group.word 0x0++0x1
line.word 0x0 "TIM16_CR1,TIM16 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping.,1: Remapping enabled."
newline
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: tless thansub>DTSless than/sub> = tless..,1: tless thansub>DTSless than/sub> = 2xtless..,2: tless thansub>DTSless than/sub> = 4xtless..,?"
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
newline
bitfld.word 0x0 3. "OPM,One pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: nly counter overflow/underflow generates an.."
newline
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled.,1: UEV disabled."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.word 0x4++0x1
line.word 0x0 "TIM16_CR2,TIM16 control register 2"
bitfld.word 0x0 9. "OIS1N,Output Idle state 1 (tim_oc1n output)" "0: tim_oc1n = 0 after a dead-time when MOE = 0,1: tim_oc1n = 1 after a dead-time when MOE = 0"
bitfld.word 0x0 8. "OIS1,Output Idle state 1 (tim_oc1 output)" "0: tim_oc1 = 0 after a dead-time when MOE = 0,1: tim_oc1 = 1 after a dead-time when MOE = 0"
newline
bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
bitfld.word 0x0 2. "CCUS,Capture/compare control update selection" "0: When capture/compare control bits are preloaded..,1: When capture/compare control bits are preloaded.."
newline
bitfld.word 0x0 0. "CCPC,Capture/compare preloaded control" "0: CCxE CCxNE and OCxM bits are not preloaded,1: CCxE CCxNE and OCxM bits are preloaded after.."
group.word 0xC++0x1
line.word 0x0 "TIM16_DIER,TIM16 DMA/interrupt enable register"
bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled"
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled"
newline
bitfld.word 0x0 7. "BIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled"
bitfld.word 0x0 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled"
newline
bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled"
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled"
group.word 0x10++0x1
line.word 0x0 "TIM16_SR,TIM16 status register"
bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in TIMx_CCR1.."
bitfld.word 0x0 7. "BIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.."
newline
bitfld.word 0x0 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending"
bitfld.word 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
newline
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending."
wgroup.word 0x14++0x1
line.word 0x0 "TIM16_EGR,TIM16 event generation register"
bitfld.word 0x0 7. "BG,Break generation" "0: No action.,1: A break event is generated."
bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "0: No action,1: When the CCPC bit is set it is possible to.."
newline
bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "0: No action.,1: A capture/compare event is generated on channel 1:"
bitfld.word 0x0 0. "UG,Update generation" "0: No action.,1: Reinitialize the counter and generates an update.."
group.long 0x18++0x3
line.long 0x0 "TIM16_CCMR1,TIM16 capture/compare mode register 1"
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
newline
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,?,?"
group.long 0x18++0x3
line.long 0x0 "TIM16_CCMR1_ALTERNATE1,TIM16 capture/compare mode register 1"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
bitfld.long 0x0 7. "OC1CE,Output Compare 1 clear enable" "0: tim_oc1ref is not affected by the tim_ocref_clr..,1: tim_oc1ref is cleared as soon as a High level is.."
newline
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output Compare 1 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle-tim_oc1ref toggles when TIMx_CNT =..,4: Force inactive level-tim_oc1ref is forced low.,5: Force active level-tim_oc1ref is forced high.,6: PWM mode 1-Channel 1 is active as long as..,7: PWM mode 2-Channel 1 is inactive as long as.."
bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
newline
bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,?,?"
group.word 0x20++0x1
line.word 0x0 "TIM16_CCER,TIM16 capture/compare enable register"
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output polarity" "0: tim_oc1n active high,1: tim_oc1n active low"
bitfld.word 0x0 2. "CC1NE,Capture/Compare 1 complementary output enable" "0: Off-tim_oc1n is not active.,1: On-tim_oc1n signal is output on the.."
newline
bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output polarity" "0: OC1 active high (output mode) / Edge sensitivity..,1: OC1 active low (output mode) / Edge sensitivity.."
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable" "0: Capture mode disabled / OC1 is not active (see..,1: Capture mode enabled / OC1 signal is output on.."
group.long 0x24++0x3
line.long 0x0 "TIM16_CNT,TIM16 counter"
rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.word 0x28++0x1
line.word 0x0 "TIM16_PSC,TIM16 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM16_ARR,TIM16 auto-reautoreload register"
hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value"
group.word 0x30++0x1
line.word 0x0 "TIM16_RCR,TIM16 repetition counter register"
hexmask.word.byte 0x0 0.--7. 1. "REP,Repetition counter reload value"
group.long 0x34++0x3
line.long 0x0 "TIM16_CCR1,TIM16 capture/compare register 1"
hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/Compare 1 value"
group.long 0x44++0x3
line.long 0x0 "TIM16_BDTR,TIM16 break and dead-time register"
bitfld.long 0x0 28. "BKBID,Break Bidirectional" "0: Break input tim_brk in input mode,1: Break input tim_brk in bidirectional mode"
bitfld.long 0x0 26. "BKDSRM,Break Disarm" "0: Break input tim_brk is armed,1: Break input tim_brk is disarmed"
newline
hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter"
bitfld.long 0x0 15. "MOE,Main output enable" "0: tim_oc1 and tim_oc1n outputs are disabled or..,1: tim_oc1 and tim_oc1n outputs are enabled if.."
newline
bitfld.long 0x0 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.."
bitfld.long 0x0 13. "BKP,Break polarity" "0: Break input tim_brk is active low,1: Break input tim_brk is active high"
newline
bitfld.long 0x0 12. "BKE,Break enable" "0: Break inputs (tim_brk and tim_sys_brk event)..,?"
bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "0: When inactive tim_oc1/tim_oc1n outputs are..,1: When inactive tim_oc1/tim_oc1n outputs are.."
newline
bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "0: When inactive tim_oc1/tim_oc1n outputs are..,1: When inactive tim_oc1/tim_oc1n outputs are.."
bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "0: LOCK OFF-No bit is write protected,1: LOCK Level 1 = DTG bits in TIMx_BDTR register..,2: LOCK Level 2 = LOCK Level 1 + CC Polarity bits..,3: LOCK Level 3 = LOCK Level 2 + CC Control bits.."
newline
hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup"
group.long 0x54++0x3
line.long 0x0 "TIM16_DTR2,TIM16 timer deadtime register 2"
bitfld.long 0x0 17. "DTPE,Deadtime preload enable" "0: Deadtime value is not preloaded,1: Deadtime value preload is enabled"
bitfld.long 0x0 16. "DTAE,Deadtime asymmetric enable" "0: Deadtime on rising and falling edges are..,1: Deadtime on rising edge is defined with DTG[7:0].."
newline
hexmask.long.byte 0x0 0.--7. 1. "DTGF,Dead-time falling edge generator setup"
group.long 0x5C++0xF
line.long 0x0 "TIM16_TISEL,TIM16 input selection register"
hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[15:0] input"
line.long 0x4 "TIM16_AF1,TIM16 alternate function register 1"
bitfld.long 0x4 13. "BKCMP4P,tim_brk_cmp4 input polarity" "0: tim_brk_cmp4 input is active high,1: tim_brk_cmp4 input is active low"
bitfld.long 0x4 12. "BKCMP3P,tim_brk_cmp3 input polarity" "0: tim_brk_cmp3 input is active high,1: tim_brk_cmp3 input is active low"
newline
bitfld.long 0x4 11. "BKCMP2P,tim_brk_cmp2 input polarity" "0: tim_brk_cmp2 input is active high,1: tim_brk_cmp2 input is active low"
bitfld.long 0x4 10. "BKCMP1P,tim_brk_cmp1 input polarity" "0: tim_brk_cmp1 input is active high,1: tim_brk_cmp1 input is active low"
newline
bitfld.long 0x4 9. "BKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input is active high,1: TIMx_BKIN input is active low"
bitfld.long 0x4 8. "BKCMP8E,tim_brk_cmp8 enable" "0: tim_brk_cmp8 input disabled,1: tim_brk_cmp8 input enabled"
newline
bitfld.long 0x4 7. "BKCMP7E,tim_brk_cmp7 enable" "0: tim_brk_cmp7 input disabled,1: tim_brk_cmp7 input enabled"
bitfld.long 0x4 6. "BKCMP6E,tim_brk_cmp6 enable" "0: tim_brk_cmp6 input disabled,1: tim_brk_cmp6 input enabled"
newline
bitfld.long 0x4 5. "BKCMP5E,tim_brk_cmp5 enable" "0: tim_brk_cmp5 input disabled,1: tim_brk_cmp5 input enabled"
bitfld.long 0x4 4. "BKCMP4E,tim_brk_cmp4 enable" "0: tim_brk_cmp4 input disabled,1: tim_brk_cmp4 input enabled"
newline
bitfld.long 0x4 3. "BKCMP3E,tim_brk_cmp3 enable" "0: tim_brk_cmp3 input disabled,1: tim_brk_cmp3 input enabled"
bitfld.long 0x4 2. "BKCMP2E,tim_brk_cmp2 enable" "0: tim_brk_cmp2 input disabled,1: tim_brk_cmp2 input enabled"
newline
bitfld.long 0x4 1. "BKCMP1E,tim_brk_cmp1 enable" "0: tim_brk_cmp1 input disabled,1: tim_brk_cmp1 input enabled"
bitfld.long 0x4 0. "BKINE,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled"
line.long 0x8 "TIM16_AF2,TIM16 alternate function register 2"
bitfld.long 0x8 16.--18. "OCRSEL,tim_ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,2: tim_ocref_clr2,3: tim_ocref_clr3,4: tim_ocref_clr4,5: tim_ocref_clr5,6: tim_ocref_clr6,7: tim_ocref_clr7"
line.long 0xC "TIM16_OR1,TIM16 option register 1"
bitfld.long 0xC 1. "HSE32EN,HSE Divided by 32 enable" "0: HSE divided by 32 disabled,1: HSE divided by 32 enabled"
group.long 0x3DC++0x7
line.long 0x0 "TIM16_DCR,TIM16 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
newline
hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM16_DMAR,TIM16/TIM17 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "TIM17"
base ad:0x40014800
group.word 0x0++0x1
line.word 0x0 "TIM17_CR1,TIM17 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping.,1: Remapping enabled."
newline
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: tless thansub>DTSless than/sub> = tless..,1: tless thansub>DTSless than/sub> = 2xtless..,2: tless thansub>DTSless than/sub> = 4xtless..,?"
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
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bitfld.word 0x0 3. "OPM,One pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: nly counter overflow/underflow generates an.."
newline
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled.,1: UEV disabled."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.word 0x4++0x1
line.word 0x0 "TIM17_CR2,TIM17 control register 2"
bitfld.word 0x0 9. "OIS1N,Output Idle state 1 (tim_oc1n output)" "0: tim_oc1n = 0 after a dead-time when MOE = 0,1: tim_oc1n = 1 after a dead-time when MOE = 0"
bitfld.word 0x0 8. "OIS1,Output Idle state 1 (tim_oc1 output)" "0: tim_oc1 = 0 after a dead-time when MOE = 0,1: tim_oc1 = 1 after a dead-time when MOE = 0"
newline
bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
bitfld.word 0x0 2. "CCUS,Capture/compare control update selection" "0: When capture/compare control bits are preloaded..,1: When capture/compare control bits are preloaded.."
newline
bitfld.word 0x0 0. "CCPC,Capture/compare preloaded control" "0: CCxE CCxNE and OCxM bits are not preloaded,1: CCxE CCxNE and OCxM bits are preloaded after.."
group.word 0xC++0x1
line.word 0x0 "TIM17_DIER,TIM17 DMA/interrupt enable register"
bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled"
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled"
newline
bitfld.word 0x0 7. "BIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled"
bitfld.word 0x0 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled"
newline
bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled"
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled"
group.word 0x10++0x1
line.word 0x0 "TIM17_SR,TIM17 status register"
bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in TIMx_CCR1.."
bitfld.word 0x0 7. "BIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.."
newline
bitfld.word 0x0 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending"
bitfld.word 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
newline
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending."
wgroup.word 0x14++0x1
line.word 0x0 "TIM17_EGR,TIM17 event generation register"
bitfld.word 0x0 7. "BG,Break generation" "0: No action.,1: A break event is generated."
bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "0: No action,1: When the CCPC bit is set it is possible to.."
newline
bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "0: No action.,1: A capture/compare event is generated on channel 1:"
bitfld.word 0x0 0. "UG,Update generation" "0: No action.,1: Reinitialize the counter and generates an update.."
group.long 0x18++0x3
line.long 0x0 "TIM17_CCMR1,TIM17 capture/compare mode register 1"
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
newline
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,?,?"
group.long 0x18++0x3
line.long 0x0 "TIM17_CCMR1_ALTERNATE1,TIM17 capture/compare mode register 1"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
bitfld.long 0x0 7. "OC1CE,Output Compare 1 clear enable" "0: tim_oc1ref is not affected by the tim_ocref_clr..,1: tim_oc1ref is cleared as soon as a High level is.."
newline
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output Compare 1 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle-tim_oc1ref toggles when TIMx_CNT =..,4: Force inactive level-tim_oc1ref is forced low.,5: Force active level-tim_oc1ref is forced high.,6: PWM mode 1-Channel 1 is active as long as..,7: PWM mode 2-Channel 1 is inactive as long as.."
bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
newline
bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,?,?"
group.word 0x20++0x1
line.word 0x0 "TIM17_CCER,TIM17 capture/compare enable register"
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output polarity" "0: tim_oc1n active high,1: tim_oc1n active low"
bitfld.word 0x0 2. "CC1NE,Capture/Compare 1 complementary output enable" "0: Off-tim_oc1n is not active.,1: On-tim_oc1n signal is output on the.."
newline
bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output polarity" "0: OC1 active high (output mode) / Edge sensitivity..,1: OC1 active low (output mode) / Edge sensitivity.."
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable" "0: Capture mode disabled / OC1 is not active (see..,1: Capture mode enabled / OC1 signal is output on.."
group.long 0x24++0x3
line.long 0x0 "TIM17_CNT,TIM17 counter"
rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.word 0x28++0x1
line.word 0x0 "TIM17_PSC,TIM17 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM17_ARR,TIM17 auto-reautoreload register"
hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value"
group.word 0x30++0x1
line.word 0x0 "TIM17_RCR,TIM17 repetition counter register"
hexmask.word.byte 0x0 0.--7. 1. "REP,Repetition counter reload value"
group.long 0x34++0x3
line.long 0x0 "TIM17_CCR1,TIM17 capture/compare register 1"
hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/Compare 1 value"
group.long 0x44++0x3
line.long 0x0 "TIM17_BDTR,TIM17 break and dead-time register"
bitfld.long 0x0 28. "BKBID,Break Bidirectional" "0: Break input tim_brk in input mode,1: Break input tim_brk in bidirectional mode"
bitfld.long 0x0 26. "BKDSRM,Break Disarm" "0: Break input tim_brk is armed,1: Break input tim_brk is disarmed"
newline
hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter"
bitfld.long 0x0 15. "MOE,Main output enable" "0: tim_oc1 and tim_oc1n outputs are disabled or..,1: tim_oc1 and tim_oc1n outputs are enabled if.."
newline
bitfld.long 0x0 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.."
bitfld.long 0x0 13. "BKP,Break polarity" "0: Break input tim_brk is active low,1: Break input tim_brk is active high"
newline
bitfld.long 0x0 12. "BKE,Break enable" "0: Break inputs (tim_brk and tim_sys_brk event)..,?"
bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "0: When inactive tim_oc1/tim_oc1n outputs are..,1: When inactive tim_oc1/tim_oc1n outputs are.."
newline
bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "0: When inactive tim_oc1/tim_oc1n outputs are..,1: When inactive tim_oc1/tim_oc1n outputs are.."
bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "0: LOCK OFF-No bit is write protected,1: LOCK Level 1 = DTG bits in TIMx_BDTR register..,2: LOCK Level 2 = LOCK Level 1 + CC Polarity bits..,3: LOCK Level 3 = LOCK Level 2 + CC Control bits.."
newline
hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup"
group.long 0x54++0x3
line.long 0x0 "TIM17_DTR2,TIM17 timer deadtime register 2"
bitfld.long 0x0 17. "DTPE,Deadtime preload enable" "0: Deadtime value is not preloaded,1: Deadtime value preload is enabled"
bitfld.long 0x0 16. "DTAE,Deadtime asymmetric enable" "0: Deadtime on rising and falling edges are..,1: Deadtime on rising edge is defined with DTG[7:0].."
newline
hexmask.long.byte 0x0 0.--7. 1. "DTGF,Dead-time falling edge generator setup"
group.long 0x5C++0xF
line.long 0x0 "TIM17_TISEL,TIM17 input selection register"
hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[15:0] input"
line.long 0x4 "TIM17_AF1,TIM17 alternate function register 1"
bitfld.long 0x4 13. "BKCMP4P,tim_brk_cmp4 input polarity" "0: tim_brk_cmp4 input is active high,1: tim_brk_cmp4 input is active low"
bitfld.long 0x4 12. "BKCMP3P,tim_brk_cmp3 input polarity" "0: tim_brk_cmp3 input is active high,1: tim_brk_cmp3 input is active low"
newline
bitfld.long 0x4 11. "BKCMP2P,tim_brk_cmp2 input polarity" "0: tim_brk_cmp2 input is active high,1: tim_brk_cmp2 input is active low"
bitfld.long 0x4 10. "BKCMP1P,tim_brk_cmp1 input polarity" "0: tim_brk_cmp1 input is active high,1: tim_brk_cmp1 input is active low"
newline
bitfld.long 0x4 9. "BKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input is active high,1: TIMx_BKIN input is active low"
bitfld.long 0x4 8. "BKCMP8E,tim_brk_cmp8 enable" "0: tim_brk_cmp8 input disabled,1: tim_brk_cmp8 input enabled"
newline
bitfld.long 0x4 7. "BKCMP7E,tim_brk_cmp7 enable" "0: tim_brk_cmp7 input disabled,1: tim_brk_cmp7 input enabled"
bitfld.long 0x4 6. "BKCMP6E,tim_brk_cmp6 enable" "0: tim_brk_cmp6 input disabled,1: tim_brk_cmp6 input enabled"
newline
bitfld.long 0x4 5. "BKCMP5E,tim_brk_cmp5 enable" "0: tim_brk_cmp5 input disabled,1: tim_brk_cmp5 input enabled"
bitfld.long 0x4 4. "BKCMP4E,tim_brk_cmp4 enable" "0: tim_brk_cmp4 input disabled,1: tim_brk_cmp4 input enabled"
newline
bitfld.long 0x4 3. "BKCMP3E,tim_brk_cmp3 enable" "0: tim_brk_cmp3 input disabled,1: tim_brk_cmp3 input enabled"
bitfld.long 0x4 2. "BKCMP2E,tim_brk_cmp2 enable" "0: tim_brk_cmp2 input disabled,1: tim_brk_cmp2 input enabled"
newline
bitfld.long 0x4 1. "BKCMP1E,tim_brk_cmp1 enable" "0: tim_brk_cmp1 input disabled,1: tim_brk_cmp1 input enabled"
bitfld.long 0x4 0. "BKINE,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled"
line.long 0x8 "TIM17_AF2,TIM17 alternate function register 2"
bitfld.long 0x8 16.--18. "OCRSEL,tim_ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,2: tim_ocref_clr2,3: tim_ocref_clr3,4: tim_ocref_clr4,5: tim_ocref_clr5,6: tim_ocref_clr6,7: tim_ocref_clr7"
line.long 0xC "TIM17_OR1,TIM17 option register 1"
bitfld.long 0xC 1. "HSE32EN,HSE Divided by 32 enable" "0: HSE divided by 32 disabled,1: HSE divided by 32 enabled"
group.long 0x3DC++0x7
line.long 0x0 "TIM17_DCR,TIM17 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
newline
hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM17_DMAR,TIM16/TIM17 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "SEC_TIM17"
base ad:0x50014800
group.word 0x0++0x1
line.word 0x0 "TIM17_CR1,TIM17 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping.,1: Remapping enabled."
newline
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: tless thansub>DTSless than/sub> = tless..,1: tless thansub>DTSless than/sub> = 2xtless..,2: tless thansub>DTSless than/sub> = 4xtless..,?"
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
newline
bitfld.word 0x0 3. "OPM,One pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: nly counter overflow/underflow generates an.."
newline
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled.,1: UEV disabled."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.word 0x4++0x1
line.word 0x0 "TIM17_CR2,TIM17 control register 2"
bitfld.word 0x0 9. "OIS1N,Output Idle state 1 (tim_oc1n output)" "0: tim_oc1n = 0 after a dead-time when MOE = 0,1: tim_oc1n = 1 after a dead-time when MOE = 0"
bitfld.word 0x0 8. "OIS1,Output Idle state 1 (tim_oc1 output)" "0: tim_oc1 = 0 after a dead-time when MOE = 0,1: tim_oc1 = 1 after a dead-time when MOE = 0"
newline
bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
bitfld.word 0x0 2. "CCUS,Capture/compare control update selection" "0: When capture/compare control bits are preloaded..,1: When capture/compare control bits are preloaded.."
newline
bitfld.word 0x0 0. "CCPC,Capture/compare preloaded control" "0: CCxE CCxNE and OCxM bits are not preloaded,1: CCxE CCxNE and OCxM bits are preloaded after.."
group.word 0xC++0x1
line.word 0x0 "TIM17_DIER,TIM17 DMA/interrupt enable register"
bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled"
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled"
newline
bitfld.word 0x0 7. "BIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled"
bitfld.word 0x0 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled"
newline
bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled"
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled"
group.word 0x10++0x1
line.word 0x0 "TIM17_SR,TIM17 status register"
bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in TIMx_CCR1.."
bitfld.word 0x0 7. "BIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.."
newline
bitfld.word 0x0 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending"
bitfld.word 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
newline
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending."
wgroup.word 0x14++0x1
line.word 0x0 "TIM17_EGR,TIM17 event generation register"
bitfld.word 0x0 7. "BG,Break generation" "0: No action.,1: A break event is generated."
bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "0: No action,1: When the CCPC bit is set it is possible to.."
newline
bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "0: No action.,1: A capture/compare event is generated on channel 1:"
bitfld.word 0x0 0. "UG,Update generation" "0: No action.,1: Reinitialize the counter and generates an update.."
group.long 0x18++0x3
line.long 0x0 "TIM17_CCMR1,TIM17 capture/compare mode register 1"
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
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bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,?,?"
group.long 0x18++0x3
line.long 0x0 "TIM17_CCMR1_ALTERNATE1,TIM17 capture/compare mode register 1"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
bitfld.long 0x0 7. "OC1CE,Output Compare 1 clear enable" "0: tim_oc1ref is not affected by the tim_ocref_clr..,1: tim_oc1ref is cleared as soon as a High level is.."
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bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output Compare 1 mode" "0: Frozen-The comparison between the output compare..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle-tim_oc1ref toggles when TIMx_CNT =..,4: Force inactive level-tim_oc1ref is forced low.,5: Force active level-tim_oc1ref is forced high.,6: PWM mode 1-Channel 1 is active as long as..,7: PWM mode 2-Channel 1 is inactive as long as.."
bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
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bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,?,?"
group.word 0x20++0x1
line.word 0x0 "TIM17_CCER,TIM17 capture/compare enable register"
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output polarity" "0: tim_oc1n active high,1: tim_oc1n active low"
bitfld.word 0x0 2. "CC1NE,Capture/Compare 1 complementary output enable" "0: Off-tim_oc1n is not active.,1: On-tim_oc1n signal is output on the.."
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bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output polarity" "0: OC1 active high (output mode) / Edge sensitivity..,1: OC1 active low (output mode) / Edge sensitivity.."
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable" "0: Capture mode disabled / OC1 is not active (see..,1: Capture mode enabled / OC1 signal is output on.."
group.long 0x24++0x3
line.long 0x0 "TIM17_CNT,TIM17 counter"
rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.word 0x28++0x1
line.word 0x0 "TIM17_PSC,TIM17 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM17_ARR,TIM17 auto-reautoreload register"
hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value"
group.word 0x30++0x1
line.word 0x0 "TIM17_RCR,TIM17 repetition counter register"
hexmask.word.byte 0x0 0.--7. 1. "REP,Repetition counter reload value"
group.long 0x34++0x3
line.long 0x0 "TIM17_CCR1,TIM17 capture/compare register 1"
hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/Compare 1 value"
group.long 0x44++0x3
line.long 0x0 "TIM17_BDTR,TIM17 break and dead-time register"
bitfld.long 0x0 28. "BKBID,Break Bidirectional" "0: Break input tim_brk in input mode,1: Break input tim_brk in bidirectional mode"
bitfld.long 0x0 26. "BKDSRM,Break Disarm" "0: Break input tim_brk is armed,1: Break input tim_brk is disarmed"
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hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter"
bitfld.long 0x0 15. "MOE,Main output enable" "0: tim_oc1 and tim_oc1n outputs are disabled or..,1: tim_oc1 and tim_oc1n outputs are enabled if.."
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bitfld.long 0x0 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.."
bitfld.long 0x0 13. "BKP,Break polarity" "0: Break input tim_brk is active low,1: Break input tim_brk is active high"
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bitfld.long 0x0 12. "BKE,Break enable" "0: Break inputs (tim_brk and tim_sys_brk event)..,?"
bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "0: When inactive tim_oc1/tim_oc1n outputs are..,1: When inactive tim_oc1/tim_oc1n outputs are.."
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bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "0: When inactive tim_oc1/tim_oc1n outputs are..,1: When inactive tim_oc1/tim_oc1n outputs are.."
bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "0: LOCK OFF-No bit is write protected,1: LOCK Level 1 = DTG bits in TIMx_BDTR register..,2: LOCK Level 2 = LOCK Level 1 + CC Polarity bits..,3: LOCK Level 3 = LOCK Level 2 + CC Control bits.."
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hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup"
group.long 0x54++0x3
line.long 0x0 "TIM17_DTR2,TIM17 timer deadtime register 2"
bitfld.long 0x0 17. "DTPE,Deadtime preload enable" "0: Deadtime value is not preloaded,1: Deadtime value preload is enabled"
bitfld.long 0x0 16. "DTAE,Deadtime asymmetric enable" "0: Deadtime on rising and falling edges are..,1: Deadtime on rising edge is defined with DTG[7:0].."
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hexmask.long.byte 0x0 0.--7. 1. "DTGF,Dead-time falling edge generator setup"
group.long 0x5C++0xF
line.long 0x0 "TIM17_TISEL,TIM17 input selection register"
hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[15:0] input"
line.long 0x4 "TIM17_AF1,TIM17 alternate function register 1"
bitfld.long 0x4 13. "BKCMP4P,tim_brk_cmp4 input polarity" "0: tim_brk_cmp4 input is active high,1: tim_brk_cmp4 input is active low"
bitfld.long 0x4 12. "BKCMP3P,tim_brk_cmp3 input polarity" "0: tim_brk_cmp3 input is active high,1: tim_brk_cmp3 input is active low"
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bitfld.long 0x4 11. "BKCMP2P,tim_brk_cmp2 input polarity" "0: tim_brk_cmp2 input is active high,1: tim_brk_cmp2 input is active low"
bitfld.long 0x4 10. "BKCMP1P,tim_brk_cmp1 input polarity" "0: tim_brk_cmp1 input is active high,1: tim_brk_cmp1 input is active low"
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bitfld.long 0x4 9. "BKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input is active high,1: TIMx_BKIN input is active low"
bitfld.long 0x4 8. "BKCMP8E,tim_brk_cmp8 enable" "0: tim_brk_cmp8 input disabled,1: tim_brk_cmp8 input enabled"
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bitfld.long 0x4 7. "BKCMP7E,tim_brk_cmp7 enable" "0: tim_brk_cmp7 input disabled,1: tim_brk_cmp7 input enabled"
bitfld.long 0x4 6. "BKCMP6E,tim_brk_cmp6 enable" "0: tim_brk_cmp6 input disabled,1: tim_brk_cmp6 input enabled"
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bitfld.long 0x4 5. "BKCMP5E,tim_brk_cmp5 enable" "0: tim_brk_cmp5 input disabled,1: tim_brk_cmp5 input enabled"
bitfld.long 0x4 4. "BKCMP4E,tim_brk_cmp4 enable" "0: tim_brk_cmp4 input disabled,1: tim_brk_cmp4 input enabled"
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bitfld.long 0x4 3. "BKCMP3E,tim_brk_cmp3 enable" "0: tim_brk_cmp3 input disabled,1: tim_brk_cmp3 input enabled"
bitfld.long 0x4 2. "BKCMP2E,tim_brk_cmp2 enable" "0: tim_brk_cmp2 input disabled,1: tim_brk_cmp2 input enabled"
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bitfld.long 0x4 1. "BKCMP1E,tim_brk_cmp1 enable" "0: tim_brk_cmp1 input disabled,1: tim_brk_cmp1 input enabled"
bitfld.long 0x4 0. "BKINE,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled"
line.long 0x8 "TIM17_AF2,TIM17 alternate function register 2"
bitfld.long 0x8 16.--18. "OCRSEL,tim_ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,2: tim_ocref_clr2,3: tim_ocref_clr3,4: tim_ocref_clr4,5: tim_ocref_clr5,6: tim_ocref_clr6,7: tim_ocref_clr7"
line.long 0xC "TIM17_OR1,TIM17 option register 1"
bitfld.long 0xC 1. "HSE32EN,HSE Divided by 32 enable" "0: HSE divided by 32 disabled,1: HSE divided by 32 enabled"
group.long 0x3DC++0x7
line.long 0x0 "TIM17_DCR,TIM17 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
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hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM17_DMAR,TIM16/TIM17 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree.end
tree "TSC (Touch Sensing Controller)"
base ad:0x0
tree "TSC"
base ad:0x40024000
group.long 0x0++0xB
line.long 0x0 "TSC_CR,TSC control register"
hexmask.long.byte 0x0 28.--31. 1. "CTPH,Charge transfer pulse high"
hexmask.long.byte 0x0 24.--27. 1. "CTPL,Charge transfer pulse low"
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hexmask.long.byte 0x0 17.--23. 1. "SSD,Spread spectrum deviation"
bitfld.long 0x0 16. "SSE,Spread spectrum enable" "0: Spread spectrum disabled,1: Spread spectrum enabled"
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bitfld.long 0x0 15. "SSPSC,Spread spectrum prescaler" "0: fless thansub>HCLKless than/sub>,1: fless thansub>HCLKless than/sub> /2"
bitfld.long 0x0 12.--14. "PGPSC,Pulse generator prescaler" "0: fless thansub>HCLKless than/sub>,1: fless thansub>HCLKless than/sub> /2,2: fless thansub>HCLKless than/sub> /4,3: fless thansub>HCLKless than/sub> /8,4: fless thansub>HCLKless than/sub> /16,5: fless thansub>HCLKless than/sub> /32,6: fless thansub>HCLKless than/sub> /64,7: fless thansub>HCLKless than/sub> /128"
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bitfld.long 0x0 5.--7. "MCV,Max count value" "0: 255,1: 511,2: 1023,3: 2047,4: 4095,5: 8191,6: 16383,?"
bitfld.long 0x0 4. "IODEF,I/O Default mode" "0: I/Os are forced to output push-pull low,1: I/Os are in input floating"
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bitfld.long 0x0 3. "SYNCPOL,Synchronization pin polarity" "0: Falling edge only,1: Rising edge and high level"
bitfld.long 0x0 2. "AM,Acquisition mode" "0: Normal acquisition mode (acquisition starts as..,1: Synchronized acquisition mode (acquisition.."
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bitfld.long 0x0 1. "START,Start a new acquisition" "0: Acquisition not started,1: Start a new acquisition"
bitfld.long 0x0 0. "TSCE,Touch sensing controller enable" "0: Touch sensing controller disabled,1: Touch sensing controller enabled"
line.long 0x4 "TSC_IER,TSC interrupt enable register"
bitfld.long 0x4 1. "MCEIE,Max count error interrupt enable" "0: Max count error interrupt disabled,1: Max count error interrupt enabled"
bitfld.long 0x4 0. "EOAIE,End of acquisition interrupt enable" "0: End of acquisition interrupt disabled,1: End of acquisition interrupt enabled"
line.long 0x8 "TSC_ICR,TSC interrupt clear register"
bitfld.long 0x8 1. "MCEIC,Max count error interrupt clear" "0: No effect,1: Clears the corresponding MCEF of the TSC_ISR.."
bitfld.long 0x8 0. "EOAIC,End of acquisition interrupt clear" "0: No effect,1: Clears the corresponding EOAF of the TSC_ISR.."
rgroup.long 0xC++0x3
line.long 0x0 "TSC_ISR,TSC interrupt status register"
bitfld.long 0x0 1. "MCEF,Max count error flag" "0: No max count error (MCE) detected,1: Max count error (MCE) detected"
bitfld.long 0x0 0. "EOAF,End of acquisition flag" "0: Acquisition is ongoing or not started,1: Acquisition is complete"
group.long 0x10++0x3
line.long 0x0 "TSC_IOHCR,TSC I/O hysteresis control register"
bitfld.long 0x0 27. "G7_IO4,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 26. "G7_IO3,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 25. "G7_IO2,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 24. "G7_IO1,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 23. "G6_IO4,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 22. "G6_IO3,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 21. "G6_IO2,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 20. "G6_IO1,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 19. "G5_IO4,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 18. "G5_IO3,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 17. "G5_IO2,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 16. "G5_IO1,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 15. "G4_IO4,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 14. "G4_IO3,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 13. "G4_IO2,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 12. "G4_IO1,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 11. "G3_IO4,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 10. "G3_IO3,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 9. "G3_IO2,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 8. "G3_IO1,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 7. "G2_IO4,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 6. "G2_IO3,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 5. "G2_IO2,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 4. "G2_IO1,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 3. "G1_IO4,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 2. "G1_IO3,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 1. "G1_IO2,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 0. "G1_IO1,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
group.long 0x18++0x3
line.long 0x0 "TSC_IOASCR,TSC I/O analog switch control register"
bitfld.long 0x0 27. "G7_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 26. "G7_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 25. "G7_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 24. "G7_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 23. "G6_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 22. "G6_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 21. "G6_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 20. "G6_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 19. "G5_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 18. "G5_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 17. "G5_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 16. "G5_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 15. "G4_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 14. "G4_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 13. "G4_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 12. "G4_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 11. "G3_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 10. "G3_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 9. "G3_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 8. "G3_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 7. "G2_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 6. "G2_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 5. "G2_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 4. "G2_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 3. "G1_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 2. "G1_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 1. "G1_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 0. "G1_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
group.long 0x20++0x3
line.long 0x0 "TSC_IOSCR,TSC I/O sampling control register"
bitfld.long 0x0 27. "G7_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 26. "G7_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
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bitfld.long 0x0 25. "G7_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 24. "G7_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
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bitfld.long 0x0 23. "G6_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 22. "G6_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
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bitfld.long 0x0 21. "G6_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 20. "G6_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
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bitfld.long 0x0 19. "G5_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 18. "G5_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
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bitfld.long 0x0 17. "G5_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 16. "G5_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 15. "G4_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 14. "G4_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 13. "G4_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 12. "G4_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 11. "G3_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 10. "G3_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 9. "G3_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 8. "G3_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 7. "G2_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 6. "G2_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 5. "G2_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 4. "G2_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 3. "G1_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 2. "G1_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 1. "G1_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 0. "G1_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
group.long 0x28++0x3
line.long 0x0 "TSC_IOCCR,TSC I/O channel control register"
bitfld.long 0x0 27. "G7_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 26. "G7_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 25. "G7_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 24. "G7_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 23. "G6_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 22. "G6_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 21. "G6_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 20. "G6_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 19. "G5_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 18. "G5_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 17. "G5_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 16. "G5_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 15. "G4_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 14. "G4_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 13. "G4_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 12. "G4_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 11. "G3_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 10. "G3_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
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bitfld.long 0x0 9. "G3_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 8. "G3_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 7. "G2_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 6. "G2_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 5. "G2_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 4. "G2_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 3. "G1_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 2. "G1_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 1. "G1_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 0. "G1_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
group.long 0x30++0x3
line.long 0x0 "TSC_IOGCSR,TSC I/O group control status register"
rbitfld.long 0x0 22. "G7S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
rbitfld.long 0x0 21. "G6S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
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rbitfld.long 0x0 20. "G5S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
rbitfld.long 0x0 19. "G4S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
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rbitfld.long 0x0 18. "G3S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
rbitfld.long 0x0 17. "G2S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
newline
rbitfld.long 0x0 16. "G1S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
bitfld.long 0x0 6. "G7E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
newline
bitfld.long 0x0 5. "G6E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
bitfld.long 0x0 4. "G5E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
newline
bitfld.long 0x0 3. "G4E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
bitfld.long 0x0 2. "G3E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
newline
bitfld.long 0x0 1. "G2E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
bitfld.long 0x0 0. "G1E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
rgroup.long 0x34++0x1B
line.long 0x0 "TSC_IOG1CR,TSC I/O group 1 counter register"
hexmask.long.word 0x0 0.--13. 1. "CNT,Counter value"
line.long 0x4 "TSC_IOG2CR,TSC I/O group 2 counter register"
hexmask.long.word 0x4 0.--13. 1. "CNT,Counter value"
line.long 0x8 "TSC_IOG3CR,TSC I/O group 3 counter register"
hexmask.long.word 0x8 0.--13. 1. "CNT,Counter value"
line.long 0xC "TSC_IOG4CR,TSC I/O group 4 counter register"
hexmask.long.word 0xC 0.--13. 1. "CNT,Counter value"
line.long 0x10 "TSC_IOG5CR,TSC I/O group 5 counter register"
hexmask.long.word 0x10 0.--13. 1. "CNT,Counter value"
line.long 0x14 "TSC_IOG6CR,TSC I/O group 6 counter register"
hexmask.long.word 0x14 0.--13. 1. "CNT,Counter value"
line.long 0x18 "TSC_IOG7CR,TSC I/O group 7 counter register"
hexmask.long.word 0x18 0.--13. 1. "CNT,Counter value"
tree.end
tree "SEC_TSC"
base ad:0x50024000
group.long 0x0++0xB
line.long 0x0 "TSC_CR,TSC control register"
hexmask.long.byte 0x0 28.--31. 1. "CTPH,Charge transfer pulse high"
hexmask.long.byte 0x0 24.--27. 1. "CTPL,Charge transfer pulse low"
newline
hexmask.long.byte 0x0 17.--23. 1. "SSD,Spread spectrum deviation"
bitfld.long 0x0 16. "SSE,Spread spectrum enable" "0: Spread spectrum disabled,1: Spread spectrum enabled"
newline
bitfld.long 0x0 15. "SSPSC,Spread spectrum prescaler" "0: fless thansub>HCLKless than/sub>,1: fless thansub>HCLKless than/sub> /2"
bitfld.long 0x0 12.--14. "PGPSC,Pulse generator prescaler" "0: fless thansub>HCLKless than/sub>,1: fless thansub>HCLKless than/sub> /2,2: fless thansub>HCLKless than/sub> /4,3: fless thansub>HCLKless than/sub> /8,4: fless thansub>HCLKless than/sub> /16,5: fless thansub>HCLKless than/sub> /32,6: fless thansub>HCLKless than/sub> /64,7: fless thansub>HCLKless than/sub> /128"
newline
bitfld.long 0x0 5.--7. "MCV,Max count value" "0: 255,1: 511,2: 1023,3: 2047,4: 4095,5: 8191,6: 16383,?"
bitfld.long 0x0 4. "IODEF,I/O Default mode" "0: I/Os are forced to output push-pull low,1: I/Os are in input floating"
newline
bitfld.long 0x0 3. "SYNCPOL,Synchronization pin polarity" "0: Falling edge only,1: Rising edge and high level"
bitfld.long 0x0 2. "AM,Acquisition mode" "0: Normal acquisition mode (acquisition starts as..,1: Synchronized acquisition mode (acquisition.."
newline
bitfld.long 0x0 1. "START,Start a new acquisition" "0: Acquisition not started,1: Start a new acquisition"
bitfld.long 0x0 0. "TSCE,Touch sensing controller enable" "0: Touch sensing controller disabled,1: Touch sensing controller enabled"
line.long 0x4 "TSC_IER,TSC interrupt enable register"
bitfld.long 0x4 1. "MCEIE,Max count error interrupt enable" "0: Max count error interrupt disabled,1: Max count error interrupt enabled"
bitfld.long 0x4 0. "EOAIE,End of acquisition interrupt enable" "0: End of acquisition interrupt disabled,1: End of acquisition interrupt enabled"
line.long 0x8 "TSC_ICR,TSC interrupt clear register"
bitfld.long 0x8 1. "MCEIC,Max count error interrupt clear" "0: No effect,1: Clears the corresponding MCEF of the TSC_ISR.."
bitfld.long 0x8 0. "EOAIC,End of acquisition interrupt clear" "0: No effect,1: Clears the corresponding EOAF of the TSC_ISR.."
rgroup.long 0xC++0x3
line.long 0x0 "TSC_ISR,TSC interrupt status register"
bitfld.long 0x0 1. "MCEF,Max count error flag" "0: No max count error (MCE) detected,1: Max count error (MCE) detected"
bitfld.long 0x0 0. "EOAF,End of acquisition flag" "0: Acquisition is ongoing or not started,1: Acquisition is complete"
group.long 0x10++0x3
line.long 0x0 "TSC_IOHCR,TSC I/O hysteresis control register"
bitfld.long 0x0 27. "G7_IO4,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 26. "G7_IO3,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 25. "G7_IO2,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 24. "G7_IO1,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 23. "G6_IO4,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 22. "G6_IO3,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 21. "G6_IO2,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 20. "G6_IO1,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 19. "G5_IO4,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 18. "G5_IO3,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 17. "G5_IO2,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 16. "G5_IO1,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 15. "G4_IO4,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 14. "G4_IO3,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 13. "G4_IO2,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 12. "G4_IO1,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 11. "G3_IO4,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 10. "G3_IO3,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 9. "G3_IO2,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 8. "G3_IO1,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 7. "G2_IO4,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 6. "G2_IO3,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 5. "G2_IO2,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 4. "G2_IO1,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 3. "G1_IO4,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 2. "G1_IO3,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 1. "G1_IO2,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 0. "G1_IO1,Gx_IOy Schmitt trigger hysteresis mode" "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
group.long 0x18++0x3
line.long 0x0 "TSC_IOASCR,TSC I/O analog switch control register"
bitfld.long 0x0 27. "G7_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 26. "G7_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 25. "G7_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 24. "G7_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 23. "G6_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 22. "G6_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 21. "G6_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 20. "G6_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 19. "G5_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 18. "G5_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 17. "G5_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 16. "G5_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 15. "G4_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 14. "G4_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 13. "G4_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 12. "G4_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 11. "G3_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 10. "G3_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 9. "G3_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 8. "G3_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 7. "G2_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 6. "G2_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 5. "G2_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 4. "G2_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 3. "G1_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 2. "G1_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 1. "G1_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 0. "G1_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
group.long 0x20++0x3
line.long 0x0 "TSC_IOSCR,TSC I/O sampling control register"
bitfld.long 0x0 27. "G7_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 26. "G7_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 25. "G7_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 24. "G7_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 23. "G6_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 22. "G6_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 21. "G6_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 20. "G6_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 19. "G5_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 18. "G5_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 17. "G5_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 16. "G5_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 15. "G4_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 14. "G4_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 13. "G4_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 12. "G4_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 11. "G3_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 10. "G3_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 9. "G3_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 8. "G3_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 7. "G2_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 6. "G2_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 5. "G2_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 4. "G2_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 3. "G1_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 2. "G1_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 1. "G1_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 0. "G1_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
group.long 0x28++0x3
line.long 0x0 "TSC_IOCCR,TSC I/O channel control register"
bitfld.long 0x0 27. "G7_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 26. "G7_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 25. "G7_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 24. "G7_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 23. "G6_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 22. "G6_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 21. "G6_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 20. "G6_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 19. "G5_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 18. "G5_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 17. "G5_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 16. "G5_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 15. "G4_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 14. "G4_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 13. "G4_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 12. "G4_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 11. "G3_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 10. "G3_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 9. "G3_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 8. "G3_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 7. "G2_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 6. "G2_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 5. "G2_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 4. "G2_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 3. "G1_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 2. "G1_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 1. "G1_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 0. "G1_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
group.long 0x30++0x3
line.long 0x0 "TSC_IOGCSR,TSC I/O group control status register"
rbitfld.long 0x0 22. "G7S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
rbitfld.long 0x0 21. "G6S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
newline
rbitfld.long 0x0 20. "G5S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
rbitfld.long 0x0 19. "G4S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
newline
rbitfld.long 0x0 18. "G3S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
rbitfld.long 0x0 17. "G2S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
newline
rbitfld.long 0x0 16. "G1S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
bitfld.long 0x0 6. "G7E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
newline
bitfld.long 0x0 5. "G6E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
bitfld.long 0x0 4. "G5E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
newline
bitfld.long 0x0 3. "G4E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
bitfld.long 0x0 2. "G3E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
newline
bitfld.long 0x0 1. "G2E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
bitfld.long 0x0 0. "G1E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
rgroup.long 0x34++0x1B
line.long 0x0 "TSC_IOG1CR,TSC I/O group 1 counter register"
hexmask.long.word 0x0 0.--13. 1. "CNT,Counter value"
line.long 0x4 "TSC_IOG2CR,TSC I/O group 2 counter register"
hexmask.long.word 0x4 0.--13. 1. "CNT,Counter value"
line.long 0x8 "TSC_IOG3CR,TSC I/O group 3 counter register"
hexmask.long.word 0x8 0.--13. 1. "CNT,Counter value"
line.long 0xC "TSC_IOG4CR,TSC I/O group 4 counter register"
hexmask.long.word 0xC 0.--13. 1. "CNT,Counter value"
line.long 0x10 "TSC_IOG5CR,TSC I/O group 5 counter register"
hexmask.long.word 0x10 0.--13. 1. "CNT,Counter value"
line.long 0x14 "TSC_IOG6CR,TSC I/O group 6 counter register"
hexmask.long.word 0x14 0.--13. 1. "CNT,Counter value"
line.long 0x18 "TSC_IOG7CR,TSC I/O group 7 counter register"
hexmask.long.word 0x18 0.--13. 1. "CNT,Counter value"
tree.end
tree.end
tree "USART (Universal Synchronous/Asynchronous Receiver Transmitter)"
base ad:0x0
tree "USART1"
base ad:0x40013800
group.long 0x0++0x3
line.long 0x0 "USART_CR1,USART control register 1"
bitfld.long 0x0 31. "RxFFIE,RxFIFO Full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RxFF=1 in the.."
bitfld.long 0x0 30. "TxFEIE,TxFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TxFE=1 in the.."
newline
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between mute mode and active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TxFNFIE,TxFIFO not full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TxFNF =1 in.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RxFNEIE,RxFIFO not empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
group.long 0x0++0xB
line.long 0x0 "USART_CR1_ALTERNATE1,USART control register 1"
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between mute mode and active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TxEIE,Transmit data register empty" "0: Interrupt inhibited,1: USART interrupt generated whenever TxE =1 in the.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RxNEIE,Receive data register not empty" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
line.long 0x4 "USART_CR2,USART control register 2"
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node"
bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled.,1: Receiver timeout feature enabled."
newline
bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Falling edge to falling edge measurement (the..,2: 0x7F frame detection.,3: 0x55 frame detection"
bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled.,1: Auto baud rate detection is enabled."
newline
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
newline
bitfld.long 0x4 17. "TxINV,Tx pin active level inversion" "0: Tx pin signal works using the standard logic..,1: Tx pin signal values are inverted."
bitfld.long 0x4 16. "RxINV,Rx pin active level inversion" "0: Rx pin signal works using the standard logic..,1: Rx pin signal values are inverted."
newline
bitfld.long 0x4 15. "SWAP,Swap Tx/Rx pins" "0: Tx/Rx pins are used as defined in standard pinout,1: The Tx and Rx pins functions are swapped."
bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled"
newline
bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,1: 0.,2: 2 stop bits,3: 1."
bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled"
newline
bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.."
bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.."
newline
bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.."
bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF=1 in the.."
newline
bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection"
bitfld.long 0x4 4. "ADDM7,7-bit address detection/4-bit address detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
newline
bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "0: SPI slave selection depends on NSS input pin.,1: SPI slave is always selected and NSS input pin.."
bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "0: Slave mode disabled.,1: Slave mode enabled."
line.long 0x8 "USART_CR3,USART control register 3"
bitfld.long 0x8 29.--31. "TxFTCFG,TxFIFO threshold configuration" "0: TxFIFO reaches 1/8 of its depth,1: TxFIFO reaches 1/4 of its depth,2: TxFIFO reaches 1/2 of its depth,3: TxFIFO reaches 3/4 of its depth,4: TxFIFO reaches 7/8 of its depth,5: TxFIFO becomes empty,?,?"
bitfld.long 0x8 28. "RxFTIE,RxFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.."
newline
bitfld.long 0x8 25.--27. "RxFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: Receive FIFO reaches 1/2 of its depth,3: Receive FIFO reaches 3/4 of its depth,4: Receive FIFO reaches 7/8 of its depth,5: Receive FIFO becomes full,?,?"
bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
newline
bitfld.long 0x8 23. "TxFTIE,TxFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TxFIFO reaches.."
bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled-No automatic..,?,?,?,?,?,?,?"
newline
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled."
newline
bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error."
bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled."
newline
bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.."
newline
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
newline
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
newline
bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0: Smartcard mode disabled,1: Smartcard mode enabled"
bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
newline
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
bitfld.long 0x8 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
newline
bitfld.long 0x8 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE=1 or ORE=1 or NE=1.."
group.long 0x8++0xF
line.long 0x0 "USART_CR3_ALTERNATE1,USART control register 3"
bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled-No automatic..,?,?,?,?,?,?,?"
newline
bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x0 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled."
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bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error."
bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled."
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bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF = 1 in.."
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bitfld.long 0x0 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
bitfld.long 0x0 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
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bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
bitfld.long 0x0 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
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bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "0: Smartcard mode disabled,1: Smartcard mode enabled"
bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
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bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
bitfld.long 0x0 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
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bitfld.long 0x0 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
bitfld.long 0x0 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE=1 or ORE=1 or NE=1.."
line.long 0x4 "USART_BRR,USART baud rate register"
hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate"
line.long 0x8 "USART_GTPR,USART guard time and prescaler register"
hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value"
hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value"
line.long 0xC "USART_RTOR,USART receiver timeout register"
hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length"
hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value"
wgroup.long 0x18++0x3
line.long 0x0 "USART_RQR,USART request register"
bitfld.long 0x0 4. "TxFRQ,Transmit data flush request" "0,1"
bitfld.long 0x0 3. "RxFRQ,Receive data flush request" "0,1"
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bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
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bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR,USART interrupt and status register"
bitfld.long 0x0 27. "TxFT,TxFIFO threshold flag" "0: TxFIFO does not reach the programmed threshold.,1: TxFIFO reached the programmed threshold."
bitfld.long 0x0 26. "RxFT,RxFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
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bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission has not completed or transmission..,1: Transmission has completed successfully (before.."
bitfld.long 0x0 24. "RxFF,RxFIFO Full" "0: RxFIFO not full.,1: RxFIFO Full."
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bitfld.long 0x0 23. "TxFE,TxFIFO Empty" "0: TxFIFO not empty.,1: TxFIFO empty."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
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bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "0: Receiver in active mode,1: Receiver in mute mode"
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bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
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bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception ongoing"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
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bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
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bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of block not reached,1: End of block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
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bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
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bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TxFNF,TxFIFO not full" "0: Transmit FIFO is full,1: Transmit FIFO is not full"
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bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RxFNE,RxFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
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bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
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bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
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bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR_ALTERNATE1,USART interrupt and status register"
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission has not completed or transmission..,1: Transmission has not completed successfully.."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
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bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "0: Receiver in active mode,1: Receiver in mute mode"
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bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
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bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception ongoing"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
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bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
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bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of block not reached,1: End of block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
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bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
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bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TxE,Transmit data register empty" "0: Data register full,1: Data register empty"
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bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RxNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
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bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "?,1: Overrun error is detected"
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bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
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bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
wgroup.long 0x20++0x3
line.long 0x0 "USART_ICR,USART interrupt flag clear register"
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1"
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bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1"
bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1"
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bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1"
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bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1"
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
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bitfld.long 0x0 5. "TxFECF,TxFIFO empty clear flag" "0,1"
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
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bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
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bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "USART_RDR,USART receive data register"
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
group.long 0x28++0xB
line.long 0x0 "USART_TDR,USART transmit data register"
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
line.long 0x4 "USART_PRESC,USART prescaler register"
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
line.long 0x8 "USART_AUTOCR,USART autonomous mode control register"
hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits"
bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "0: Idle frame sent after enabling the transmitter..,1: Idle frame not sent after enabling the transmitter"
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bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number"
tree.end
tree "SEC_USART1"
base ad:0x50013800
group.long 0x0++0x3
line.long 0x0 "USART_CR1,USART control register 1"
bitfld.long 0x0 31. "RxFFIE,RxFIFO Full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RxFF=1 in the.."
bitfld.long 0x0 30. "TxFEIE,TxFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TxFE=1 in the.."
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bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
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bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
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bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between mute mode and active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TxFNFIE,TxFIFO not full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TxFNF =1 in.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RxFNEIE,RxFIFO not empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
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bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
group.long 0x0++0xB
line.long 0x0 "USART_CR1_ALTERNATE1,USART control register 1"
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between mute mode and active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TxEIE,Transmit data register empty" "0: Interrupt inhibited,1: USART interrupt generated whenever TxE =1 in the.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RxNEIE,Receive data register not empty" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
line.long 0x4 "USART_CR2,USART control register 2"
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node"
bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled.,1: Receiver timeout feature enabled."
newline
bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Falling edge to falling edge measurement (the..,2: 0x7F frame detection.,3: 0x55 frame detection"
bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled.,1: Auto baud rate detection is enabled."
newline
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
newline
bitfld.long 0x4 17. "TxINV,Tx pin active level inversion" "0: Tx pin signal works using the standard logic..,1: Tx pin signal values are inverted."
bitfld.long 0x4 16. "RxINV,Rx pin active level inversion" "0: Rx pin signal works using the standard logic..,1: Rx pin signal values are inverted."
newline
bitfld.long 0x4 15. "SWAP,Swap Tx/Rx pins" "0: Tx/Rx pins are used as defined in standard pinout,1: The Tx and Rx pins functions are swapped."
bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled"
newline
bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,1: 0.,2: 2 stop bits,3: 1."
bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled"
newline
bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.."
bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.."
newline
bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.."
bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF=1 in the.."
newline
bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection"
bitfld.long 0x4 4. "ADDM7,7-bit address detection/4-bit address detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
newline
bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "0: SPI slave selection depends on NSS input pin.,1: SPI slave is always selected and NSS input pin.."
bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "0: Slave mode disabled.,1: Slave mode enabled."
line.long 0x8 "USART_CR3,USART control register 3"
bitfld.long 0x8 29.--31. "TxFTCFG,TxFIFO threshold configuration" "0: TxFIFO reaches 1/8 of its depth,1: TxFIFO reaches 1/4 of its depth,2: TxFIFO reaches 1/2 of its depth,3: TxFIFO reaches 3/4 of its depth,4: TxFIFO reaches 7/8 of its depth,5: TxFIFO becomes empty,?,?"
bitfld.long 0x8 28. "RxFTIE,RxFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.."
newline
bitfld.long 0x8 25.--27. "RxFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: Receive FIFO reaches 1/2 of its depth,3: Receive FIFO reaches 3/4 of its depth,4: Receive FIFO reaches 7/8 of its depth,5: Receive FIFO becomes full,?,?"
bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
newline
bitfld.long 0x8 23. "TxFTIE,TxFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TxFIFO reaches.."
bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled-No automatic..,?,?,?,?,?,?,?"
newline
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled."
newline
bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error."
bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled."
newline
bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.."
newline
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
newline
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
newline
bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0: Smartcard mode disabled,1: Smartcard mode enabled"
bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
newline
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
bitfld.long 0x8 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
newline
bitfld.long 0x8 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE=1 or ORE=1 or NE=1.."
group.long 0x8++0xF
line.long 0x0 "USART_CR3_ALTERNATE1,USART control register 3"
bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled-No automatic..,?,?,?,?,?,?,?"
newline
bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x0 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled."
newline
bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error."
bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled."
newline
bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF = 1 in.."
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bitfld.long 0x0 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
bitfld.long 0x0 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
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bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
bitfld.long 0x0 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
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bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "0: Smartcard mode disabled,1: Smartcard mode enabled"
bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
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bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
bitfld.long 0x0 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
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bitfld.long 0x0 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
bitfld.long 0x0 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE=1 or ORE=1 or NE=1.."
line.long 0x4 "USART_BRR,USART baud rate register"
hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate"
line.long 0x8 "USART_GTPR,USART guard time and prescaler register"
hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value"
hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value"
line.long 0xC "USART_RTOR,USART receiver timeout register"
hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length"
hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value"
wgroup.long 0x18++0x3
line.long 0x0 "USART_RQR,USART request register"
bitfld.long 0x0 4. "TxFRQ,Transmit data flush request" "0,1"
bitfld.long 0x0 3. "RxFRQ,Receive data flush request" "0,1"
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bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
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bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR,USART interrupt and status register"
bitfld.long 0x0 27. "TxFT,TxFIFO threshold flag" "0: TxFIFO does not reach the programmed threshold.,1: TxFIFO reached the programmed threshold."
bitfld.long 0x0 26. "RxFT,RxFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
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bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission has not completed or transmission..,1: Transmission has completed successfully (before.."
bitfld.long 0x0 24. "RxFF,RxFIFO Full" "0: RxFIFO not full.,1: RxFIFO Full."
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bitfld.long 0x0 23. "TxFE,TxFIFO Empty" "0: TxFIFO not empty.,1: TxFIFO empty."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
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bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "0: Receiver in active mode,1: Receiver in mute mode"
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bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
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bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception ongoing"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
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bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
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bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of block not reached,1: End of block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
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bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
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bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TxFNF,TxFIFO not full" "0: Transmit FIFO is full,1: Transmit FIFO is not full"
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bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RxFNE,RxFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
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bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
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bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
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bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR_ALTERNATE1,USART interrupt and status register"
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission has not completed or transmission..,1: Transmission has not completed successfully.."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
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bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "0: Receiver in active mode,1: Receiver in mute mode"
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bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
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bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception ongoing"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
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bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
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bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of block not reached,1: End of block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
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bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
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bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TxE,Transmit data register empty" "0: Data register full,1: Data register empty"
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bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RxNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
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bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "?,1: Overrun error is detected"
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bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
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bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
wgroup.long 0x20++0x3
line.long 0x0 "USART_ICR,USART interrupt flag clear register"
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1"
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bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1"
bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1"
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bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1"
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bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1"
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
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bitfld.long 0x0 5. "TxFECF,TxFIFO empty clear flag" "0,1"
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
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bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
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bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "USART_RDR,USART receive data register"
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
group.long 0x28++0xB
line.long 0x0 "USART_TDR,USART transmit data register"
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
line.long 0x4 "USART_PRESC,USART prescaler register"
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
line.long 0x8 "USART_AUTOCR,USART autonomous mode control register"
hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits"
bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "0: Idle frame sent after enabling the transmitter..,1: Idle frame not sent after enabling the transmitter"
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bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number"
tree.end
tree "USART3"
base ad:0x40004800
group.long 0x0++0x3
line.long 0x0 "USART_CR1,USART control register 1"
bitfld.long 0x0 31. "RxFFIE,RxFIFO Full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RxFF=1 in the.."
bitfld.long 0x0 30. "TxFEIE,TxFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TxFE=1 in the.."
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bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
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bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
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hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
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bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
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bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between mute mode and active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
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bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
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bitfld.long 0x0 7. "TxFNFIE,TxFIFO not full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TxFNF =1 in.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
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bitfld.long 0x0 5. "RxFNEIE,RxFIFO not empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
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bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
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bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
group.long 0x0++0xB
line.long 0x0 "USART_CR1_ALTERNATE1,USART control register 1"
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
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bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between mute mode and active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TxEIE,Transmit data register empty" "0: Interrupt inhibited,1: USART interrupt generated whenever TxE =1 in the.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RxNEIE,Receive data register not empty" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
line.long 0x4 "USART_CR2,USART control register 2"
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node"
bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled.,1: Receiver timeout feature enabled."
newline
bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Falling edge to falling edge measurement (the..,2: 0x7F frame detection.,3: 0x55 frame detection"
bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled.,1: Auto baud rate detection is enabled."
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bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
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bitfld.long 0x4 17. "TxINV,Tx pin active level inversion" "0: Tx pin signal works using the standard logic..,1: Tx pin signal values are inverted."
bitfld.long 0x4 16. "RxINV,Rx pin active level inversion" "0: Rx pin signal works using the standard logic..,1: Rx pin signal values are inverted."
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bitfld.long 0x4 15. "SWAP,Swap Tx/Rx pins" "0: Tx/Rx pins are used as defined in standard pinout,1: The Tx and Rx pins functions are swapped."
bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled"
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bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,1: 0.,2: 2 stop bits,3: 1."
bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled"
newline
bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.."
bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.."
newline
bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.."
bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF=1 in the.."
newline
bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection"
bitfld.long 0x4 4. "ADDM7,7-bit address detection/4-bit address detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
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bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "0: SPI slave selection depends on NSS input pin.,1: SPI slave is always selected and NSS input pin.."
bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "0: Slave mode disabled.,1: Slave mode enabled."
line.long 0x8 "USART_CR3,USART control register 3"
bitfld.long 0x8 29.--31. "TxFTCFG,TxFIFO threshold configuration" "0: TxFIFO reaches 1/8 of its depth,1: TxFIFO reaches 1/4 of its depth,2: TxFIFO reaches 1/2 of its depth,3: TxFIFO reaches 3/4 of its depth,4: TxFIFO reaches 7/8 of its depth,5: TxFIFO becomes empty,?,?"
bitfld.long 0x8 28. "RxFTIE,RxFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.."
newline
bitfld.long 0x8 25.--27. "RxFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: Receive FIFO reaches 1/2 of its depth,3: Receive FIFO reaches 3/4 of its depth,4: Receive FIFO reaches 7/8 of its depth,5: Receive FIFO becomes full,?,?"
bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
newline
bitfld.long 0x8 23. "TxFTIE,TxFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TxFIFO reaches.."
bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled-No automatic..,?,?,?,?,?,?,?"
newline
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled."
newline
bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error."
bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled."
newline
bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.."
newline
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
newline
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
newline
bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0: Smartcard mode disabled,1: Smartcard mode enabled"
bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
newline
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
bitfld.long 0x8 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
newline
bitfld.long 0x8 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE=1 or ORE=1 or NE=1.."
group.long 0x8++0xF
line.long 0x0 "USART_CR3_ALTERNATE1,USART control register 3"
bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled-No automatic..,?,?,?,?,?,?,?"
newline
bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x0 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled."
newline
bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error."
bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled."
newline
bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF = 1 in.."
newline
bitfld.long 0x0 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
bitfld.long 0x0 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
newline
bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
bitfld.long 0x0 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
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bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "0: Smartcard mode disabled,1: Smartcard mode enabled"
bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
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bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
bitfld.long 0x0 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
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bitfld.long 0x0 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
bitfld.long 0x0 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE=1 or ORE=1 or NE=1.."
line.long 0x4 "USART_BRR,USART baud rate register"
hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate"
line.long 0x8 "USART_GTPR,USART guard time and prescaler register"
hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value"
hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value"
line.long 0xC "USART_RTOR,USART receiver timeout register"
hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length"
hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value"
wgroup.long 0x18++0x3
line.long 0x0 "USART_RQR,USART request register"
bitfld.long 0x0 4. "TxFRQ,Transmit data flush request" "0,1"
bitfld.long 0x0 3. "RxFRQ,Receive data flush request" "0,1"
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bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
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bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR,USART interrupt and status register"
bitfld.long 0x0 27. "TxFT,TxFIFO threshold flag" "0: TxFIFO does not reach the programmed threshold.,1: TxFIFO reached the programmed threshold."
bitfld.long 0x0 26. "RxFT,RxFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
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bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission has not completed or transmission..,1: Transmission has completed successfully (before.."
bitfld.long 0x0 24. "RxFF,RxFIFO Full" "0: RxFIFO not full.,1: RxFIFO Full."
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bitfld.long 0x0 23. "TxFE,TxFIFO Empty" "0: TxFIFO not empty.,1: TxFIFO empty."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
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bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "0: Receiver in active mode,1: Receiver in mute mode"
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bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
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bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception ongoing"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
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bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
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bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of block not reached,1: End of block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
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bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
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bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TxFNF,TxFIFO not full" "0: Transmit FIFO is full,1: Transmit FIFO is not full"
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bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RxFNE,RxFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
newline
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
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bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
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bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR_ALTERNATE1,USART interrupt and status register"
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission has not completed or transmission..,1: Transmission has not completed successfully.."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
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bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "0: Receiver in active mode,1: Receiver in mute mode"
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bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
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bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception ongoing"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
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bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
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bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of block not reached,1: End of block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
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bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
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bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TxE,Transmit data register empty" "0: Data register full,1: Data register empty"
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bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RxNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
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bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "?,1: Overrun error is detected"
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bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
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bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
wgroup.long 0x20++0x3
line.long 0x0 "USART_ICR,USART interrupt flag clear register"
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1"
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bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1"
bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1"
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bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1"
newline
bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1"
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
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bitfld.long 0x0 5. "TxFECF,TxFIFO empty clear flag" "0,1"
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
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bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
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bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "USART_RDR,USART receive data register"
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
group.long 0x28++0xB
line.long 0x0 "USART_TDR,USART transmit data register"
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
line.long 0x4 "USART_PRESC,USART prescaler register"
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
line.long 0x8 "USART_AUTOCR,USART autonomous mode control register"
hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits"
bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "0: Idle frame sent after enabling the transmitter..,1: Idle frame not sent after enabling the transmitter"
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bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number"
tree.end
tree "SEC_USART3"
base ad:0x50004800
group.long 0x0++0x3
line.long 0x0 "USART_CR1,USART control register 1"
bitfld.long 0x0 31. "RxFFIE,RxFIFO Full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RxFF=1 in the.."
bitfld.long 0x0 30. "TxFEIE,TxFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TxFE=1 in the.."
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bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
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bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
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bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between mute mode and active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TxFNFIE,TxFIFO not full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TxFNF =1 in.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RxFNEIE,RxFIFO not empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
group.long 0x0++0xB
line.long 0x0 "USART_CR1_ALTERNATE1,USART control register 1"
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
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bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between mute mode and active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TxEIE,Transmit data register empty" "0: Interrupt inhibited,1: USART interrupt generated whenever TxE =1 in the.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RxNEIE,Receive data register not empty" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
line.long 0x4 "USART_CR2,USART control register 2"
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node"
bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled.,1: Receiver timeout feature enabled."
newline
bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Falling edge to falling edge measurement (the..,2: 0x7F frame detection.,3: 0x55 frame detection"
bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled.,1: Auto baud rate detection is enabled."
newline
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
newline
bitfld.long 0x4 17. "TxINV,Tx pin active level inversion" "0: Tx pin signal works using the standard logic..,1: Tx pin signal values are inverted."
bitfld.long 0x4 16. "RxINV,Rx pin active level inversion" "0: Rx pin signal works using the standard logic..,1: Rx pin signal values are inverted."
newline
bitfld.long 0x4 15. "SWAP,Swap Tx/Rx pins" "0: Tx/Rx pins are used as defined in standard pinout,1: The Tx and Rx pins functions are swapped."
bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled"
newline
bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,1: 0.,2: 2 stop bits,3: 1."
bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled"
newline
bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.."
bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.."
newline
bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.."
bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF=1 in the.."
newline
bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection"
bitfld.long 0x4 4. "ADDM7,7-bit address detection/4-bit address detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
newline
bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "0: SPI slave selection depends on NSS input pin.,1: SPI slave is always selected and NSS input pin.."
bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "0: Slave mode disabled.,1: Slave mode enabled."
line.long 0x8 "USART_CR3,USART control register 3"
bitfld.long 0x8 29.--31. "TxFTCFG,TxFIFO threshold configuration" "0: TxFIFO reaches 1/8 of its depth,1: TxFIFO reaches 1/4 of its depth,2: TxFIFO reaches 1/2 of its depth,3: TxFIFO reaches 3/4 of its depth,4: TxFIFO reaches 7/8 of its depth,5: TxFIFO becomes empty,?,?"
bitfld.long 0x8 28. "RxFTIE,RxFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.."
newline
bitfld.long 0x8 25.--27. "RxFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: Receive FIFO reaches 1/2 of its depth,3: Receive FIFO reaches 3/4 of its depth,4: Receive FIFO reaches 7/8 of its depth,5: Receive FIFO becomes full,?,?"
bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
newline
bitfld.long 0x8 23. "TxFTIE,TxFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TxFIFO reaches.."
bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled-No automatic..,?,?,?,?,?,?,?"
newline
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled."
newline
bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error."
bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled."
newline
bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.."
newline
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
newline
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
newline
bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0: Smartcard mode disabled,1: Smartcard mode enabled"
bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
newline
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
bitfld.long 0x8 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
newline
bitfld.long 0x8 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE=1 or ORE=1 or NE=1.."
group.long 0x8++0xF
line.long 0x0 "USART_CR3_ALTERNATE1,USART control register 3"
bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled-No automatic..,?,?,?,?,?,?,?"
newline
bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x0 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled."
newline
bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error."
bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled."
newline
bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF = 1 in.."
newline
bitfld.long 0x0 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
bitfld.long 0x0 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
newline
bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
bitfld.long 0x0 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
newline
bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "0: Smartcard mode disabled,1: Smartcard mode enabled"
bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
newline
bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
bitfld.long 0x0 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
newline
bitfld.long 0x0 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
bitfld.long 0x0 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE=1 or ORE=1 or NE=1.."
line.long 0x4 "USART_BRR,USART baud rate register"
hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate"
line.long 0x8 "USART_GTPR,USART guard time and prescaler register"
hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value"
hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value"
line.long 0xC "USART_RTOR,USART receiver timeout register"
hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length"
hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value"
wgroup.long 0x18++0x3
line.long 0x0 "USART_RQR,USART request register"
bitfld.long 0x0 4. "TxFRQ,Transmit data flush request" "0,1"
bitfld.long 0x0 3. "RxFRQ,Receive data flush request" "0,1"
newline
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
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bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR,USART interrupt and status register"
bitfld.long 0x0 27. "TxFT,TxFIFO threshold flag" "0: TxFIFO does not reach the programmed threshold.,1: TxFIFO reached the programmed threshold."
bitfld.long 0x0 26. "RxFT,RxFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
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bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission has not completed or transmission..,1: Transmission has completed successfully (before.."
bitfld.long 0x0 24. "RxFF,RxFIFO Full" "0: RxFIFO not full.,1: RxFIFO Full."
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bitfld.long 0x0 23. "TxFE,TxFIFO Empty" "0: TxFIFO not empty.,1: TxFIFO empty."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
newline
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "0: Receiver in active mode,1: Receiver in mute mode"
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bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
newline
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception ongoing"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
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bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
newline
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of block not reached,1: End of block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
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bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
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bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TxFNF,TxFIFO not full" "0: Transmit FIFO is full,1: Transmit FIFO is not full"
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bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RxFNE,RxFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
newline
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
newline
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
newline
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR_ALTERNATE1,USART interrupt and status register"
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission has not completed or transmission..,1: Transmission has not completed successfully.."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
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bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "0: Receiver in active mode,1: Receiver in mute mode"
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bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
newline
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception ongoing"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
newline
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
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bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of block not reached,1: End of block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
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bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TxE,Transmit data register empty" "0: Data register full,1: Data register empty"
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bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RxNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
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bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "?,1: Overrun error is detected"
newline
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
newline
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
wgroup.long 0x20++0x3
line.long 0x0 "USART_ICR,USART interrupt flag clear register"
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1"
newline
bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1"
bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1"
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bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1"
newline
bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1"
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
newline
bitfld.long 0x0 5. "TxFECF,TxFIFO empty clear flag" "0,1"
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
newline
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
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bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "USART_RDR,USART receive data register"
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
group.long 0x28++0xB
line.long 0x0 "USART_TDR,USART transmit data register"
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
line.long 0x4 "USART_PRESC,USART prescaler register"
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
line.long 0x8 "USART_AUTOCR,USART autonomous mode control register"
hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits"
bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "0: Idle frame sent after enabling the transmitter..,1: Idle frame not sent after enabling the transmitter"
newline
bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number"
tree.end
tree "UART4 (USART1 address block description)"
base ad:0x40004C00
group.long 0x0++0x3
line.long 0x0 "USART_CR1,USART control register 1"
bitfld.long 0x0 31. "RxFFIE,RxFIFO Full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RxFF=1 in the.."
bitfld.long 0x0 30. "TxFEIE,TxFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TxFE=1 in the.."
newline
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between mute mode and active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TxFNFIE,TxFIFO not full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TxFNF =1 in.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RxFNEIE,RxFIFO not empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
group.long 0x0++0xB
line.long 0x0 "USART_CR1_ALTERNATE1,USART control register 1"
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between mute mode and active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TxEIE,Transmit data register empty" "0: Interrupt inhibited,1: USART interrupt generated whenever TxE =1 in the.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RxNEIE,Receive data register not empty" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
line.long 0x4 "USART_CR2,USART control register 2"
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node"
bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled.,1: Receiver timeout feature enabled."
newline
bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Falling edge to falling edge measurement (the..,2: 0x7F frame detection.,3: 0x55 frame detection"
bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled.,1: Auto baud rate detection is enabled."
newline
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
newline
bitfld.long 0x4 17. "TxINV,Tx pin active level inversion" "0: Tx pin signal works using the standard logic..,1: Tx pin signal values are inverted."
bitfld.long 0x4 16. "RxINV,Rx pin active level inversion" "0: Rx pin signal works using the standard logic..,1: Rx pin signal values are inverted."
newline
bitfld.long 0x4 15. "SWAP,Swap Tx/Rx pins" "0: Tx/Rx pins are used as defined in standard pinout,1: The Tx and Rx pins functions are swapped."
bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled"
newline
bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,1: 0.,2: 2 stop bits,3: 1."
bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled"
newline
bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.."
bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.."
newline
bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.."
bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF=1 in the.."
newline
bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection"
bitfld.long 0x4 4. "ADDM7,7-bit address detection/4-bit address detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
newline
bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "0: SPI slave selection depends on NSS input pin.,1: SPI slave is always selected and NSS input pin.."
bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "0: Slave mode disabled.,1: Slave mode enabled."
line.long 0x8 "USART_CR3,USART control register 3"
bitfld.long 0x8 29.--31. "TxFTCFG,TxFIFO threshold configuration" "0: TxFIFO reaches 1/8 of its depth,1: TxFIFO reaches 1/4 of its depth,2: TxFIFO reaches 1/2 of its depth,3: TxFIFO reaches 3/4 of its depth,4: TxFIFO reaches 7/8 of its depth,5: TxFIFO becomes empty,?,?"
bitfld.long 0x8 28. "RxFTIE,RxFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.."
newline
bitfld.long 0x8 25.--27. "RxFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: Receive FIFO reaches 1/2 of its depth,3: Receive FIFO reaches 3/4 of its depth,4: Receive FIFO reaches 7/8 of its depth,5: Receive FIFO becomes full,?,?"
bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
newline
bitfld.long 0x8 23. "TxFTIE,TxFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TxFIFO reaches.."
bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled-No automatic..,?,?,?,?,?,?,?"
newline
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled."
newline
bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error."
bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled."
newline
bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.."
newline
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
newline
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
newline
bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0: Smartcard mode disabled,1: Smartcard mode enabled"
bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
newline
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
bitfld.long 0x8 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
newline
bitfld.long 0x8 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE=1 or ORE=1 or NE=1.."
group.long 0x8++0xF
line.long 0x0 "USART_CR3_ALTERNATE1,USART control register 3"
bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled-No automatic..,?,?,?,?,?,?,?"
newline
bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x0 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled."
newline
bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error."
bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled."
newline
bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF = 1 in.."
newline
bitfld.long 0x0 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
bitfld.long 0x0 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
newline
bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
bitfld.long 0x0 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
newline
bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "0: Smartcard mode disabled,1: Smartcard mode enabled"
bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
newline
bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
bitfld.long 0x0 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
newline
bitfld.long 0x0 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
bitfld.long 0x0 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE=1 or ORE=1 or NE=1.."
line.long 0x4 "USART_BRR,USART baud rate register"
hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate"
line.long 0x8 "USART_GTPR,USART guard time and prescaler register"
hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value"
hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value"
line.long 0xC "USART_RTOR,USART receiver timeout register"
hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length"
hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value"
wgroup.long 0x18++0x3
line.long 0x0 "USART_RQR,USART request register"
bitfld.long 0x0 4. "TxFRQ,Transmit data flush request" "0,1"
bitfld.long 0x0 3. "RxFRQ,Receive data flush request" "0,1"
newline
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
newline
bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR,USART interrupt and status register"
bitfld.long 0x0 27. "TxFT,TxFIFO threshold flag" "0: TxFIFO does not reach the programmed threshold.,1: TxFIFO reached the programmed threshold."
bitfld.long 0x0 26. "RxFT,RxFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
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bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission has not completed or transmission..,1: Transmission has completed successfully (before.."
bitfld.long 0x0 24. "RxFF,RxFIFO Full" "0: RxFIFO not full.,1: RxFIFO Full."
newline
bitfld.long 0x0 23. "TxFE,TxFIFO Empty" "0: TxFIFO not empty.,1: TxFIFO empty."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
newline
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "0: Receiver in active mode,1: Receiver in mute mode"
newline
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
newline
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception ongoing"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
newline
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
newline
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of block not reached,1: End of block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
newline
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TxFNF,TxFIFO not full" "0: Transmit FIFO is full,1: Transmit FIFO is not full"
newline
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RxFNE,RxFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
newline
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
newline
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
newline
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR_ALTERNATE1,USART interrupt and status register"
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission has not completed or transmission..,1: Transmission has not completed successfully.."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
newline
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "0: Receiver in active mode,1: Receiver in mute mode"
newline
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
newline
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception ongoing"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
newline
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
newline
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of block not reached,1: End of block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
newline
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TxE,Transmit data register empty" "0: Data register full,1: Data register empty"
newline
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RxNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
newline
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "?,1: Overrun error is detected"
newline
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
newline
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
wgroup.long 0x20++0x3
line.long 0x0 "USART_ICR,USART interrupt flag clear register"
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1"
newline
bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1"
bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1"
newline
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1"
newline
bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1"
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
newline
bitfld.long 0x0 5. "TxFECF,TxFIFO empty clear flag" "0,1"
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
newline
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
newline
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "USART_RDR,USART receive data register"
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
group.long 0x28++0xB
line.long 0x0 "USART_TDR,USART transmit data register"
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
line.long 0x4 "USART_PRESC,USART prescaler register"
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
line.long 0x8 "USART_AUTOCR,USART autonomous mode control register"
hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits"
bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "0: Idle frame sent after enabling the transmitter..,1: Idle frame not sent after enabling the transmitter"
newline
bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number"
tree.end
tree "SEC_UART4 (USART1 address block description)"
base ad:0x50004C00
group.long 0x0++0x3
line.long 0x0 "USART_CR1,USART control register 1"
bitfld.long 0x0 31. "RxFFIE,RxFIFO Full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RxFF=1 in the.."
bitfld.long 0x0 30. "TxFEIE,TxFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TxFE=1 in the.."
newline
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between mute mode and active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TxFNFIE,TxFIFO not full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TxFNF =1 in.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RxFNEIE,RxFIFO not empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
group.long 0x0++0xB
line.long 0x0 "USART_CR1_ALTERNATE1,USART control register 1"
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between mute mode and active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TxEIE,Transmit data register empty" "0: Interrupt inhibited,1: USART interrupt generated whenever TxE =1 in the.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RxNEIE,Receive data register not empty" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
line.long 0x4 "USART_CR2,USART control register 2"
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node"
bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled.,1: Receiver timeout feature enabled."
newline
bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Falling edge to falling edge measurement (the..,2: 0x7F frame detection.,3: 0x55 frame detection"
bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled.,1: Auto baud rate detection is enabled."
newline
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
newline
bitfld.long 0x4 17. "TxINV,Tx pin active level inversion" "0: Tx pin signal works using the standard logic..,1: Tx pin signal values are inverted."
bitfld.long 0x4 16. "RxINV,Rx pin active level inversion" "0: Rx pin signal works using the standard logic..,1: Rx pin signal values are inverted."
newline
bitfld.long 0x4 15. "SWAP,Swap Tx/Rx pins" "0: Tx/Rx pins are used as defined in standard pinout,1: The Tx and Rx pins functions are swapped."
bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled"
newline
bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,1: 0.,2: 2 stop bits,3: 1."
bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled"
newline
bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.."
bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.."
newline
bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.."
bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF=1 in the.."
newline
bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection"
bitfld.long 0x4 4. "ADDM7,7-bit address detection/4-bit address detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
newline
bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "0: SPI slave selection depends on NSS input pin.,1: SPI slave is always selected and NSS input pin.."
bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "0: Slave mode disabled.,1: Slave mode enabled."
line.long 0x8 "USART_CR3,USART control register 3"
bitfld.long 0x8 29.--31. "TxFTCFG,TxFIFO threshold configuration" "0: TxFIFO reaches 1/8 of its depth,1: TxFIFO reaches 1/4 of its depth,2: TxFIFO reaches 1/2 of its depth,3: TxFIFO reaches 3/4 of its depth,4: TxFIFO reaches 7/8 of its depth,5: TxFIFO becomes empty,?,?"
bitfld.long 0x8 28. "RxFTIE,RxFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.."
newline
bitfld.long 0x8 25.--27. "RxFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: Receive FIFO reaches 1/2 of its depth,3: Receive FIFO reaches 3/4 of its depth,4: Receive FIFO reaches 7/8 of its depth,5: Receive FIFO becomes full,?,?"
bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
newline
bitfld.long 0x8 23. "TxFTIE,TxFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TxFIFO reaches.."
bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled-No automatic..,?,?,?,?,?,?,?"
newline
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled."
newline
bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error."
bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled."
newline
bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.."
newline
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
newline
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
newline
bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0: Smartcard mode disabled,1: Smartcard mode enabled"
bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
newline
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
bitfld.long 0x8 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
newline
bitfld.long 0x8 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE=1 or ORE=1 or NE=1.."
group.long 0x8++0xF
line.long 0x0 "USART_CR3_ALTERNATE1,USART control register 3"
bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled-No automatic..,?,?,?,?,?,?,?"
newline
bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x0 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled."
newline
bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error."
bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled."
newline
bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF = 1 in.."
newline
bitfld.long 0x0 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
bitfld.long 0x0 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
newline
bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
bitfld.long 0x0 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
newline
bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "0: Smartcard mode disabled,1: Smartcard mode enabled"
bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
newline
bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
bitfld.long 0x0 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
newline
bitfld.long 0x0 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
bitfld.long 0x0 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE=1 or ORE=1 or NE=1.."
line.long 0x4 "USART_BRR,USART baud rate register"
hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate"
line.long 0x8 "USART_GTPR,USART guard time and prescaler register"
hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value"
hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value"
line.long 0xC "USART_RTOR,USART receiver timeout register"
hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length"
hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value"
wgroup.long 0x18++0x3
line.long 0x0 "USART_RQR,USART request register"
bitfld.long 0x0 4. "TxFRQ,Transmit data flush request" "0,1"
bitfld.long 0x0 3. "RxFRQ,Receive data flush request" "0,1"
newline
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
newline
bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR,USART interrupt and status register"
bitfld.long 0x0 27. "TxFT,TxFIFO threshold flag" "0: TxFIFO does not reach the programmed threshold.,1: TxFIFO reached the programmed threshold."
bitfld.long 0x0 26. "RxFT,RxFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
newline
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission has not completed or transmission..,1: Transmission has completed successfully (before.."
bitfld.long 0x0 24. "RxFF,RxFIFO Full" "0: RxFIFO not full.,1: RxFIFO Full."
newline
bitfld.long 0x0 23. "TxFE,TxFIFO Empty" "0: TxFIFO not empty.,1: TxFIFO empty."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
newline
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "0: Receiver in active mode,1: Receiver in mute mode"
newline
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
newline
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception ongoing"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
newline
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
newline
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of block not reached,1: End of block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
newline
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TxFNF,TxFIFO not full" "0: Transmit FIFO is full,1: Transmit FIFO is not full"
newline
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RxFNE,RxFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
newline
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
newline
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
newline
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR_ALTERNATE1,USART interrupt and status register"
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission has not completed or transmission..,1: Transmission has not completed successfully.."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
newline
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "0: Receiver in active mode,1: Receiver in mute mode"
newline
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
newline
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception ongoing"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
newline
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
newline
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of block not reached,1: End of block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
newline
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TxE,Transmit data register empty" "0: Data register full,1: Data register empty"
newline
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RxNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
newline
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "?,1: Overrun error is detected"
newline
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
newline
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
wgroup.long 0x20++0x3
line.long 0x0 "USART_ICR,USART interrupt flag clear register"
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1"
newline
bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1"
bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1"
newline
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1"
newline
bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1"
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
newline
bitfld.long 0x0 5. "TxFECF,TxFIFO empty clear flag" "0,1"
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
newline
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
newline
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "USART_RDR,USART receive data register"
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
group.long 0x28++0xB
line.long 0x0 "USART_TDR,USART transmit data register"
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
line.long 0x4 "USART_PRESC,USART prescaler register"
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
line.long 0x8 "USART_AUTOCR,USART autonomous mode control register"
hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits"
bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "0: Idle frame sent after enabling the transmitter..,1: Idle frame not sent after enabling the transmitter"
newline
bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number"
tree.end
tree "UART5 (USART1 address block description)"
base ad:0x40005000
group.long 0x0++0x3
line.long 0x0 "USART_CR1,USART control register 1"
bitfld.long 0x0 31. "RxFFIE,RxFIFO Full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RxFF=1 in the.."
bitfld.long 0x0 30. "TxFEIE,TxFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TxFE=1 in the.."
newline
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between mute mode and active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TxFNFIE,TxFIFO not full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TxFNF =1 in.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RxFNEIE,RxFIFO not empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
group.long 0x0++0xB
line.long 0x0 "USART_CR1_ALTERNATE1,USART control register 1"
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between mute mode and active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TxEIE,Transmit data register empty" "0: Interrupt inhibited,1: USART interrupt generated whenever TxE =1 in the.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RxNEIE,Receive data register not empty" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
line.long 0x4 "USART_CR2,USART control register 2"
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node"
bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled.,1: Receiver timeout feature enabled."
newline
bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Falling edge to falling edge measurement (the..,2: 0x7F frame detection.,3: 0x55 frame detection"
bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled.,1: Auto baud rate detection is enabled."
newline
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
newline
bitfld.long 0x4 17. "TxINV,Tx pin active level inversion" "0: Tx pin signal works using the standard logic..,1: Tx pin signal values are inverted."
bitfld.long 0x4 16. "RxINV,Rx pin active level inversion" "0: Rx pin signal works using the standard logic..,1: Rx pin signal values are inverted."
newline
bitfld.long 0x4 15. "SWAP,Swap Tx/Rx pins" "0: Tx/Rx pins are used as defined in standard pinout,1: The Tx and Rx pins functions are swapped."
bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled"
newline
bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,1: 0.,2: 2 stop bits,3: 1."
bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled"
newline
bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.."
bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.."
newline
bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.."
bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF=1 in the.."
newline
bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection"
bitfld.long 0x4 4. "ADDM7,7-bit address detection/4-bit address detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
newline
bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "0: SPI slave selection depends on NSS input pin.,1: SPI slave is always selected and NSS input pin.."
bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "0: Slave mode disabled.,1: Slave mode enabled."
line.long 0x8 "USART_CR3,USART control register 3"
bitfld.long 0x8 29.--31. "TxFTCFG,TxFIFO threshold configuration" "0: TxFIFO reaches 1/8 of its depth,1: TxFIFO reaches 1/4 of its depth,2: TxFIFO reaches 1/2 of its depth,3: TxFIFO reaches 3/4 of its depth,4: TxFIFO reaches 7/8 of its depth,5: TxFIFO becomes empty,?,?"
bitfld.long 0x8 28. "RxFTIE,RxFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.."
newline
bitfld.long 0x8 25.--27. "RxFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: Receive FIFO reaches 1/2 of its depth,3: Receive FIFO reaches 3/4 of its depth,4: Receive FIFO reaches 7/8 of its depth,5: Receive FIFO becomes full,?,?"
bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
newline
bitfld.long 0x8 23. "TxFTIE,TxFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TxFIFO reaches.."
bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled-No automatic..,?,?,?,?,?,?,?"
newline
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled."
newline
bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error."
bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled."
newline
bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.."
newline
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
newline
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
newline
bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0: Smartcard mode disabled,1: Smartcard mode enabled"
bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
newline
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
bitfld.long 0x8 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
newline
bitfld.long 0x8 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE=1 or ORE=1 or NE=1.."
group.long 0x8++0xF
line.long 0x0 "USART_CR3_ALTERNATE1,USART control register 3"
bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled-No automatic..,?,?,?,?,?,?,?"
newline
bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x0 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled."
newline
bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error."
bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled."
newline
bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF = 1 in.."
newline
bitfld.long 0x0 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
bitfld.long 0x0 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
newline
bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
bitfld.long 0x0 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
newline
bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "0: Smartcard mode disabled,1: Smartcard mode enabled"
bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
newline
bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
bitfld.long 0x0 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
newline
bitfld.long 0x0 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
bitfld.long 0x0 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE=1 or ORE=1 or NE=1.."
line.long 0x4 "USART_BRR,USART baud rate register"
hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate"
line.long 0x8 "USART_GTPR,USART guard time and prescaler register"
hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value"
hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value"
line.long 0xC "USART_RTOR,USART receiver timeout register"
hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length"
hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value"
wgroup.long 0x18++0x3
line.long 0x0 "USART_RQR,USART request register"
bitfld.long 0x0 4. "TxFRQ,Transmit data flush request" "0,1"
bitfld.long 0x0 3. "RxFRQ,Receive data flush request" "0,1"
newline
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
newline
bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR,USART interrupt and status register"
bitfld.long 0x0 27. "TxFT,TxFIFO threshold flag" "0: TxFIFO does not reach the programmed threshold.,1: TxFIFO reached the programmed threshold."
bitfld.long 0x0 26. "RxFT,RxFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
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bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission has not completed or transmission..,1: Transmission has completed successfully (before.."
bitfld.long 0x0 24. "RxFF,RxFIFO Full" "0: RxFIFO not full.,1: RxFIFO Full."
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bitfld.long 0x0 23. "TxFE,TxFIFO Empty" "0: TxFIFO not empty.,1: TxFIFO empty."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
newline
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "0: Receiver in active mode,1: Receiver in mute mode"
newline
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
newline
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception ongoing"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
newline
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
newline
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of block not reached,1: End of block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
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bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
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bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TxFNF,TxFIFO not full" "0: Transmit FIFO is full,1: Transmit FIFO is not full"
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bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RxFNE,RxFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
newline
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
newline
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
newline
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR_ALTERNATE1,USART interrupt and status register"
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission has not completed or transmission..,1: Transmission has not completed successfully.."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
newline
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "0: Receiver in active mode,1: Receiver in mute mode"
newline
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
newline
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception ongoing"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
newline
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
newline
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of block not reached,1: End of block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
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bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TxE,Transmit data register empty" "0: Data register full,1: Data register empty"
newline
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RxNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
newline
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "?,1: Overrun error is detected"
newline
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
newline
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
wgroup.long 0x20++0x3
line.long 0x0 "USART_ICR,USART interrupt flag clear register"
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1"
newline
bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1"
bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1"
newline
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1"
newline
bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1"
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
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bitfld.long 0x0 5. "TxFECF,TxFIFO empty clear flag" "0,1"
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
newline
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
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bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "USART_RDR,USART receive data register"
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
group.long 0x28++0xB
line.long 0x0 "USART_TDR,USART transmit data register"
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
line.long 0x4 "USART_PRESC,USART prescaler register"
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
line.long 0x8 "USART_AUTOCR,USART autonomous mode control register"
hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits"
bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "0: Idle frame sent after enabling the transmitter..,1: Idle frame not sent after enabling the transmitter"
newline
bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number"
tree.end
tree "SEC_UART5 (USART1 address block description)"
base ad:0x50005000
group.long 0x0++0x3
line.long 0x0 "USART_CR1,USART control register 1"
bitfld.long 0x0 31. "RxFFIE,RxFIFO Full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RxFF=1 in the.."
bitfld.long 0x0 30. "TxFEIE,TxFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TxFE=1 in the.."
newline
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
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bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between mute mode and active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TxFNFIE,TxFIFO not full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TxFNF =1 in.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RxFNEIE,RxFIFO not empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
group.long 0x0++0xB
line.long 0x0 "USART_CR1_ALTERNATE1,USART control register 1"
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
bitfld.long 0x0 27. "EOBIE,End of block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between mute mode and active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wake-up method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TxEIE,Transmit data register empty" "0: Interrupt inhibited,1: USART interrupt generated whenever TxE =1 in the.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RxNEIE,Receive data register not empty" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
line.long 0x4 "USART_CR2,USART control register 2"
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node"
bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled.,1: Receiver timeout feature enabled."
newline
bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Falling edge to falling edge measurement (the..,2: 0x7F frame detection.,3: 0x55 frame detection"
bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled.,1: Auto baud rate detection is enabled."
newline
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
newline
bitfld.long 0x4 17. "TxINV,Tx pin active level inversion" "0: Tx pin signal works using the standard logic..,1: Tx pin signal values are inverted."
bitfld.long 0x4 16. "RxINV,Rx pin active level inversion" "0: Rx pin signal works using the standard logic..,1: Rx pin signal values are inverted."
newline
bitfld.long 0x4 15. "SWAP,Swap Tx/Rx pins" "0: Tx/Rx pins are used as defined in standard pinout,1: The Tx and Rx pins functions are swapped."
bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled"
newline
bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,1: 0.,2: 2 stop bits,3: 1."
bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled"
newline
bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.."
bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.."
newline
bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.."
bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF=1 in the.."
newline
bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection"
bitfld.long 0x4 4. "ADDM7,7-bit address detection/4-bit address detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
newline
bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set the NSS pin input is ignored." "0: SPI slave selection depends on NSS input pin.,1: SPI slave is always selected and NSS input pin.."
bitfld.long 0x4 0. "SLVEN,Synchronous slave mode enable" "0: Slave mode disabled.,1: Slave mode enabled."
line.long 0x8 "USART_CR3,USART control register 3"
bitfld.long 0x8 29.--31. "TxFTCFG,TxFIFO threshold configuration" "0: TxFIFO reaches 1/8 of its depth,1: TxFIFO reaches 1/4 of its depth,2: TxFIFO reaches 1/2 of its depth,3: TxFIFO reaches 3/4 of its depth,4: TxFIFO reaches 7/8 of its depth,5: TxFIFO becomes empty,?,?"
bitfld.long 0x8 28. "RxFTIE,RxFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.."
newline
bitfld.long 0x8 25.--27. "RxFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: Receive FIFO reaches 1/2 of its depth,3: Receive FIFO reaches 3/4 of its depth,4: Receive FIFO reaches 7/8 of its depth,5: Receive FIFO becomes full,?,?"
bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
newline
bitfld.long 0x8 23. "TxFTIE,TxFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TxFIFO reaches.."
bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled-No automatic..,?,?,?,?,?,?,?"
newline
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled."
newline
bitfld.long 0x8 13. "DDRE,DMA Disable on reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error."
bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled."
newline
bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.."
newline
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
newline
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
newline
bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0: Smartcard mode disabled,1: Smartcard mode enabled"
bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
newline
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
bitfld.long 0x8 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
newline
bitfld.long 0x8 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE=1 or ORE=1 or NE=1.."
group.long 0x8++0xF
line.long 0x0 "USART_CR3_ALTERNATE1,USART control register 3"
bitfld.long 0x0 24. "TCBGTIE,Transmission Complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
bitfld.long 0x0 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled-No automatic..,?,?,?,?,?,?,?"
newline
bitfld.long 0x0 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x0 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled."
newline
bitfld.long 0x0 13. "DDRE,DMA Disable on reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error."
bitfld.long 0x0 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled."
newline
bitfld.long 0x0 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
bitfld.long 0x0 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF = 1 in.."
newline
bitfld.long 0x0 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
bitfld.long 0x0 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
newline
bitfld.long 0x0 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
bitfld.long 0x0 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
newline
bitfld.long 0x0 5. "SCEN,Smartcard mode enable" "0: Smartcard mode disabled,1: Smartcard mode enabled"
bitfld.long 0x0 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
newline
bitfld.long 0x0 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
bitfld.long 0x0 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
newline
bitfld.long 0x0 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
bitfld.long 0x0 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE=1 or ORE=1 or NE=1.."
line.long 0x4 "USART_BRR,USART baud rate register"
hexmask.long.word 0x4 0.--15. 1. "BRR,USART baud rate"
line.long 0x8 "USART_GTPR,USART guard time and prescaler register"
hexmask.long.byte 0x8 8.--15. 1. "GT,Guard time value"
hexmask.long.byte 0x8 0.--7. 1. "PSC,Prescaler value"
line.long 0xC "USART_RTOR,USART receiver timeout register"
hexmask.long.byte 0xC 24.--31. 1. "BLEN,Block Length"
hexmask.long.tbyte 0xC 0.--23. 1. "RTO,Receiver timeout value"
wgroup.long 0x18++0x3
line.long 0x0 "USART_RQR,USART request register"
bitfld.long 0x0 4. "TxFRQ,Transmit data flush request" "0,1"
bitfld.long 0x0 3. "RxFRQ,Receive data flush request" "0,1"
newline
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
newline
bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR,USART interrupt and status register"
bitfld.long 0x0 27. "TxFT,TxFIFO threshold flag" "0: TxFIFO does not reach the programmed threshold.,1: TxFIFO reached the programmed threshold."
bitfld.long 0x0 26. "RxFT,RxFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
newline
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission has not completed or transmission..,1: Transmission has completed successfully (before.."
bitfld.long 0x0 24. "RxFF,RxFIFO Full" "0: RxFIFO not full.,1: RxFIFO Full."
newline
bitfld.long 0x0 23. "TxFE,TxFIFO Empty" "0: TxFIFO not empty.,1: TxFIFO empty."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
newline
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "0: Receiver in active mode,1: Receiver in mute mode"
newline
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
newline
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception ongoing"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
newline
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
newline
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of block not reached,1: End of block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
newline
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TxFNF,TxFIFO not full" "0: Transmit FIFO is full,1: Transmit FIFO is not full"
newline
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RxFNE,RxFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
newline
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
newline
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
newline
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR_ALTERNATE1,USART interrupt and status register"
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission has not completed or transmission..,1: Transmission has not completed successfully.."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
newline
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wake-up from mute mode" "0: Receiver in active mode,1: Receiver in mute mode"
newline
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
newline
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception ongoing"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
newline
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
newline
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of block not reached,1: End of block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
newline
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TxE,Transmit data register empty" "0: Data register full,1: Data register empty"
newline
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RxNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
newline
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "?,1: Overrun error is detected"
newline
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
newline
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
wgroup.long 0x20++0x3
line.long 0x0 "USART_ICR,USART interrupt flag clear register"
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1"
newline
bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1"
bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1"
newline
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1"
newline
bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1"
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
newline
bitfld.long 0x0 5. "TxFECF,TxFIFO empty clear flag" "0,1"
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
newline
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
newline
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "USART_RDR,USART receive data register"
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
group.long 0x28++0xB
line.long 0x0 "USART_TDR,USART transmit data register"
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
line.long 0x4 "USART_PRESC,USART prescaler register"
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
line.long 0x8 "USART_AUTOCR,USART autonomous mode control register"
hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits"
bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "0: Idle frame sent after enabling the transmitter..,1: Idle frame not sent after enabling the transmitter"
newline
bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number"
tree.end
tree.end
tree "USB (Universal Serial Bus Interface)"
base ad:0x0
tree "USB"
base ad:0x40016000
group.long 0x0++0x1F
line.long 0x0 "USB_CHEP0R,USB endpoint/channel 0 register"
bitfld.long 0x0 29.--30. "THREE_ERR_Rx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
bitfld.long 0x0 27.--28. "THREE_ERR_Tx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
newline
bitfld.long 0x0 26. "ERR_Rx,- Host mode" "0,1"
bitfld.long 0x0 25. "ERR_Tx,- Host mode" "0,1"
newline
bitfld.long 0x0 24. "LS_EP,- Host mode" "0: Full speed endpoint,1: Low speed endpoint"
bitfld.long 0x0 23. "NAK,- Host mode" "0,1"
newline
hexmask.long.byte 0x0 16.--22. 1. "DEVADDR,- Host mode"
bitfld.long 0x0 15. "VTRx,- Device mode" "0,1"
newline
bitfld.long 0x0 14. "DTOGRx,If the endpoint/channel is not isochronous this bit contains the expected value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be received. Hardware toggles this bit when the ACK handshake is sent following a data.." "0: DATA0,1: DATA1"
bitfld.long 0x0 12.--13. "STATRx,- Device mode" "0: DISABLED: all reception requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
rbitfld.long 0x0 11. "SETUP,- Device mode" "0,1"
bitfld.long 0x0 9.--10. "UTYPE,These bits configure the behavior of this endpoint/channel as described in less than xe4 []/>. Channel0/Endpoint0 must always be a control endpoint/channel and each USB function must have at least one control endpoint/channel which has address 0 .." "0: BULK-EPKIND meaning : DBL_BUF,1: CONTROL-EPKIND meaning :STATUS_OUT,2: ISO-EPKIND meaning SBUF_ISO: This bit is set by..,3: INTERRUPT-EPKIND meaning : Not used"
newline
bitfld.long 0x0 8. "EPKIND,The meaning of this bit depends on the endpoint/channel type configured by the UTYPE bits. less than xe5 []/> summarizes the different meanings." "0,1"
bitfld.long 0x0 7. "VTTx,- Device mode" "0,1"
newline
bitfld.long 0x0 6. "DTOGTx,If the endpoint/channel is non-isochronous this bit contains the required value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be transmitted. Hardware toggles this bit when the ACK handshake is received from the USB.." "0: DATA0,1: DATA1"
bitfld.long 0x0 4.--5. "STATTx,- Device mode" "0: DISABLED: all transmission requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
hexmask.long.byte 0x0 0.--3. 1. "EA,- Device mode"
line.long 0x4 "USB_CHEP1R,USB endpoint/channel 1 register"
bitfld.long 0x4 29.--30. "THREE_ERR_Rx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
bitfld.long 0x4 27.--28. "THREE_ERR_Tx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
newline
bitfld.long 0x4 26. "ERR_Rx,- Host mode" "0,1"
bitfld.long 0x4 25. "ERR_Tx,- Host mode" "0,1"
newline
bitfld.long 0x4 24. "LS_EP,- Host mode" "0: Full speed endpoint,1: Low speed endpoint"
bitfld.long 0x4 23. "NAK,- Host mode" "0,1"
newline
hexmask.long.byte 0x4 16.--22. 1. "DEVADDR,- Host mode"
bitfld.long 0x4 15. "VTRx,- Device mode" "0,1"
newline
bitfld.long 0x4 14. "DTOGRx,If the endpoint/channel is not isochronous this bit contains the expected value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be received. Hardware toggles this bit when the ACK handshake is sent following a data.." "0: DATA0,1: DATA1"
bitfld.long 0x4 12.--13. "STATRx,- Device mode" "0: DISABLED: all reception requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
rbitfld.long 0x4 11. "SETUP,- Device mode" "0,1"
bitfld.long 0x4 9.--10. "UTYPE,These bits configure the behavior of this endpoint/channel as described in less than xe4 []/>. Channel0/Endpoint0 must always be a control endpoint/channel and each USB function must have at least one control endpoint/channel which has address 0 .." "0: BULK-EPKIND meaning : DBL_BUF,1: CONTROL-EPKIND meaning :STATUS_OUT,2: ISO-EPKIND meaning SBUF_ISO: This bit is set by..,3: INTERRUPT-EPKIND meaning : Not used"
newline
bitfld.long 0x4 8. "EPKIND,The meaning of this bit depends on the endpoint/channel type configured by the UTYPE bits. less than xe5 []/> summarizes the different meanings." "0,1"
bitfld.long 0x4 7. "VTTx,- Device mode" "0,1"
newline
bitfld.long 0x4 6. "DTOGTx,If the endpoint/channel is non-isochronous this bit contains the required value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be transmitted. Hardware toggles this bit when the ACK handshake is received from the USB.." "0: DATA0,1: DATA1"
bitfld.long 0x4 4.--5. "STATTx,- Device mode" "0: DISABLED: all transmission requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
hexmask.long.byte 0x4 0.--3. 1. "EA,- Device mode"
line.long 0x8 "USB_CHEP2R,USB endpoint/channel 2 register"
bitfld.long 0x8 29.--30. "THREE_ERR_Rx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
bitfld.long 0x8 27.--28. "THREE_ERR_Tx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
newline
bitfld.long 0x8 26. "ERR_Rx,- Host mode" "0,1"
bitfld.long 0x8 25. "ERR_Tx,- Host mode" "0,1"
newline
bitfld.long 0x8 24. "LS_EP,- Host mode" "0: Full speed endpoint,1: Low speed endpoint"
bitfld.long 0x8 23. "NAK,- Host mode" "0,1"
newline
hexmask.long.byte 0x8 16.--22. 1. "DEVADDR,- Host mode"
bitfld.long 0x8 15. "VTRx,- Device mode" "0,1"
newline
bitfld.long 0x8 14. "DTOGRx,If the endpoint/channel is not isochronous this bit contains the expected value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be received. Hardware toggles this bit when the ACK handshake is sent following a data.." "0: DATA0,1: DATA1"
bitfld.long 0x8 12.--13. "STATRx,- Device mode" "0: DISABLED: all reception requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
rbitfld.long 0x8 11. "SETUP,- Device mode" "0,1"
bitfld.long 0x8 9.--10. "UTYPE,These bits configure the behavior of this endpoint/channel as described in less than xe4 []/>. Channel0/Endpoint0 must always be a control endpoint/channel and each USB function must have at least one control endpoint/channel which has address 0 .." "0: BULK-EPKIND meaning : DBL_BUF,1: CONTROL-EPKIND meaning :STATUS_OUT,2: ISO-EPKIND meaning SBUF_ISO: This bit is set by..,3: INTERRUPT-EPKIND meaning : Not used"
newline
bitfld.long 0x8 8. "EPKIND,The meaning of this bit depends on the endpoint/channel type configured by the UTYPE bits. less than xe5 []/> summarizes the different meanings." "0,1"
bitfld.long 0x8 7. "VTTx,- Device mode" "0,1"
newline
bitfld.long 0x8 6. "DTOGTx,If the endpoint/channel is non-isochronous this bit contains the required value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be transmitted. Hardware toggles this bit when the ACK handshake is received from the USB.." "0: DATA0,1: DATA1"
bitfld.long 0x8 4.--5. "STATTx,- Device mode" "0: DISABLED: all transmission requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
hexmask.long.byte 0x8 0.--3. 1. "EA,- Device mode"
line.long 0xC "USB_CHEP3R,USB endpoint/channel 3 register"
bitfld.long 0xC 29.--30. "THREE_ERR_Rx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
bitfld.long 0xC 27.--28. "THREE_ERR_Tx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
newline
bitfld.long 0xC 26. "ERR_Rx,- Host mode" "0,1"
bitfld.long 0xC 25. "ERR_Tx,- Host mode" "0,1"
newline
bitfld.long 0xC 24. "LS_EP,- Host mode" "0: Full speed endpoint,1: Low speed endpoint"
bitfld.long 0xC 23. "NAK,- Host mode" "0,1"
newline
hexmask.long.byte 0xC 16.--22. 1. "DEVADDR,- Host mode"
bitfld.long 0xC 15. "VTRx,- Device mode" "0,1"
newline
bitfld.long 0xC 14. "DTOGRx,If the endpoint/channel is not isochronous this bit contains the expected value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be received. Hardware toggles this bit when the ACK handshake is sent following a data.." "0: DATA0,1: DATA1"
bitfld.long 0xC 12.--13. "STATRx,- Device mode" "0: DISABLED: all reception requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
rbitfld.long 0xC 11. "SETUP,- Device mode" "0,1"
bitfld.long 0xC 9.--10. "UTYPE,These bits configure the behavior of this endpoint/channel as described in less than xe4 []/>. Channel0/Endpoint0 must always be a control endpoint/channel and each USB function must have at least one control endpoint/channel which has address 0 .." "0: BULK-EPKIND meaning : DBL_BUF,1: CONTROL-EPKIND meaning :STATUS_OUT,2: ISO-EPKIND meaning SBUF_ISO: This bit is set by..,3: INTERRUPT-EPKIND meaning : Not used"
newline
bitfld.long 0xC 8. "EPKIND,The meaning of this bit depends on the endpoint/channel type configured by the UTYPE bits. less than xe5 []/> summarizes the different meanings." "0,1"
bitfld.long 0xC 7. "VTTx,- Device mode" "0,1"
newline
bitfld.long 0xC 6. "DTOGTx,If the endpoint/channel is non-isochronous this bit contains the required value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be transmitted. Hardware toggles this bit when the ACK handshake is received from the USB.." "0: DATA0,1: DATA1"
bitfld.long 0xC 4.--5. "STATTx,- Device mode" "0: DISABLED: all transmission requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
hexmask.long.byte 0xC 0.--3. 1. "EA,- Device mode"
line.long 0x10 "USB_CHEP4R,USB endpoint/channel 4 register"
bitfld.long 0x10 29.--30. "THREE_ERR_Rx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
bitfld.long 0x10 27.--28. "THREE_ERR_Tx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
newline
bitfld.long 0x10 26. "ERR_Rx,- Host mode" "0,1"
bitfld.long 0x10 25. "ERR_Tx,- Host mode" "0,1"
newline
bitfld.long 0x10 24. "LS_EP,- Host mode" "0: Full speed endpoint,1: Low speed endpoint"
bitfld.long 0x10 23. "NAK,- Host mode" "0,1"
newline
hexmask.long.byte 0x10 16.--22. 1. "DEVADDR,- Host mode"
bitfld.long 0x10 15. "VTRx,- Device mode" "0,1"
newline
bitfld.long 0x10 14. "DTOGRx,If the endpoint/channel is not isochronous this bit contains the expected value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be received. Hardware toggles this bit when the ACK handshake is sent following a data.." "0: DATA0,1: DATA1"
bitfld.long 0x10 12.--13. "STATRx,- Device mode" "0: DISABLED: all reception requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
rbitfld.long 0x10 11. "SETUP,- Device mode" "0,1"
bitfld.long 0x10 9.--10. "UTYPE,These bits configure the behavior of this endpoint/channel as described in less than xe4 []/>. Channel0/Endpoint0 must always be a control endpoint/channel and each USB function must have at least one control endpoint/channel which has address 0 .." "0: BULK-EPKIND meaning : DBL_BUF,1: CONTROL-EPKIND meaning :STATUS_OUT,2: ISO-EPKIND meaning SBUF_ISO: This bit is set by..,3: INTERRUPT-EPKIND meaning : Not used"
newline
bitfld.long 0x10 8. "EPKIND,The meaning of this bit depends on the endpoint/channel type configured by the UTYPE bits. less than xe5 []/> summarizes the different meanings." "0,1"
bitfld.long 0x10 7. "VTTx,- Device mode" "0,1"
newline
bitfld.long 0x10 6. "DTOGTx,If the endpoint/channel is non-isochronous this bit contains the required value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be transmitted. Hardware toggles this bit when the ACK handshake is received from the USB.." "0: DATA0,1: DATA1"
bitfld.long 0x10 4.--5. "STATTx,- Device mode" "0: DISABLED: all transmission requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
hexmask.long.byte 0x10 0.--3. 1. "EA,- Device mode"
line.long 0x14 "USB_CHEP5R,USB endpoint/channel 5 register"
bitfld.long 0x14 29.--30. "THREE_ERR_Rx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
bitfld.long 0x14 27.--28. "THREE_ERR_Tx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
newline
bitfld.long 0x14 26. "ERR_Rx,- Host mode" "0,1"
bitfld.long 0x14 25. "ERR_Tx,- Host mode" "0,1"
newline
bitfld.long 0x14 24. "LS_EP,- Host mode" "0: Full speed endpoint,1: Low speed endpoint"
bitfld.long 0x14 23. "NAK,- Host mode" "0,1"
newline
hexmask.long.byte 0x14 16.--22. 1. "DEVADDR,- Host mode"
bitfld.long 0x14 15. "VTRx,- Device mode" "0,1"
newline
bitfld.long 0x14 14. "DTOGRx,If the endpoint/channel is not isochronous this bit contains the expected value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be received. Hardware toggles this bit when the ACK handshake is sent following a data.." "0: DATA0,1: DATA1"
bitfld.long 0x14 12.--13. "STATRx,- Device mode" "0: DISABLED: all reception requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
rbitfld.long 0x14 11. "SETUP,- Device mode" "0,1"
bitfld.long 0x14 9.--10. "UTYPE,These bits configure the behavior of this endpoint/channel as described in less than xe4 []/>. Channel0/Endpoint0 must always be a control endpoint/channel and each USB function must have at least one control endpoint/channel which has address 0 .." "0: BULK-EPKIND meaning : DBL_BUF,1: CONTROL-EPKIND meaning :STATUS_OUT,2: ISO-EPKIND meaning SBUF_ISO: This bit is set by..,3: INTERRUPT-EPKIND meaning : Not used"
newline
bitfld.long 0x14 8. "EPKIND,The meaning of this bit depends on the endpoint/channel type configured by the UTYPE bits. less than xe5 []/> summarizes the different meanings." "0,1"
bitfld.long 0x14 7. "VTTx,- Device mode" "0,1"
newline
bitfld.long 0x14 6. "DTOGTx,If the endpoint/channel is non-isochronous this bit contains the required value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be transmitted. Hardware toggles this bit when the ACK handshake is received from the USB.." "0: DATA0,1: DATA1"
bitfld.long 0x14 4.--5. "STATTx,- Device mode" "0: DISABLED: all transmission requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
hexmask.long.byte 0x14 0.--3. 1. "EA,- Device mode"
line.long 0x18 "USB_CHEP6R,USB endpoint/channel 6 register"
bitfld.long 0x18 29.--30. "THREE_ERR_Rx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
bitfld.long 0x18 27.--28. "THREE_ERR_Tx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
newline
bitfld.long 0x18 26. "ERR_Rx,- Host mode" "0,1"
bitfld.long 0x18 25. "ERR_Tx,- Host mode" "0,1"
newline
bitfld.long 0x18 24. "LS_EP,- Host mode" "0: Full speed endpoint,1: Low speed endpoint"
bitfld.long 0x18 23. "NAK,- Host mode" "0,1"
newline
hexmask.long.byte 0x18 16.--22. 1. "DEVADDR,- Host mode"
bitfld.long 0x18 15. "VTRx,- Device mode" "0,1"
newline
bitfld.long 0x18 14. "DTOGRx,If the endpoint/channel is not isochronous this bit contains the expected value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be received. Hardware toggles this bit when the ACK handshake is sent following a data.." "0: DATA0,1: DATA1"
bitfld.long 0x18 12.--13. "STATRx,- Device mode" "0: DISABLED: all reception requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
rbitfld.long 0x18 11. "SETUP,- Device mode" "0,1"
bitfld.long 0x18 9.--10. "UTYPE,These bits configure the behavior of this endpoint/channel as described in less than xe4 []/>. Channel0/Endpoint0 must always be a control endpoint/channel and each USB function must have at least one control endpoint/channel which has address 0 .." "0: BULK-EPKIND meaning : DBL_BUF,1: CONTROL-EPKIND meaning :STATUS_OUT,2: ISO-EPKIND meaning SBUF_ISO: This bit is set by..,3: INTERRUPT-EPKIND meaning : Not used"
newline
bitfld.long 0x18 8. "EPKIND,The meaning of this bit depends on the endpoint/channel type configured by the UTYPE bits. less than xe5 []/> summarizes the different meanings." "0,1"
bitfld.long 0x18 7. "VTTx,- Device mode" "0,1"
newline
bitfld.long 0x18 6. "DTOGTx,If the endpoint/channel is non-isochronous this bit contains the required value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be transmitted. Hardware toggles this bit when the ACK handshake is received from the USB.." "0: DATA0,1: DATA1"
bitfld.long 0x18 4.--5. "STATTx,- Device mode" "0: DISABLED: all transmission requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
hexmask.long.byte 0x18 0.--3. 1. "EA,- Device mode"
line.long 0x1C "USB_CHEP7R,USB endpoint/channel 7 register"
bitfld.long 0x1C 29.--30. "THREE_ERR_Rx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
bitfld.long 0x1C 27.--28. "THREE_ERR_Tx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
newline
bitfld.long 0x1C 26. "ERR_Rx,- Host mode" "0,1"
bitfld.long 0x1C 25. "ERR_Tx,- Host mode" "0,1"
newline
bitfld.long 0x1C 24. "LS_EP,- Host mode" "0: Full speed endpoint,1: Low speed endpoint"
bitfld.long 0x1C 23. "NAK,- Host mode" "0,1"
newline
hexmask.long.byte 0x1C 16.--22. 1. "DEVADDR,- Host mode"
bitfld.long 0x1C 15. "VTRx,- Device mode" "0,1"
newline
bitfld.long 0x1C 14. "DTOGRx,If the endpoint/channel is not isochronous this bit contains the expected value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be received. Hardware toggles this bit when the ACK handshake is sent following a data.." "0: DATA0,1: DATA1"
bitfld.long 0x1C 12.--13. "STATRx,- Device mode" "0: DISABLED: all reception requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
rbitfld.long 0x1C 11. "SETUP,- Device mode" "0,1"
bitfld.long 0x1C 9.--10. "UTYPE,These bits configure the behavior of this endpoint/channel as described in less than xe4 []/>. Channel0/Endpoint0 must always be a control endpoint/channel and each USB function must have at least one control endpoint/channel which has address 0 .." "0: BULK-EPKIND meaning : DBL_BUF,1: CONTROL-EPKIND meaning :STATUS_OUT,2: ISO-EPKIND meaning SBUF_ISO: This bit is set by..,3: INTERRUPT-EPKIND meaning : Not used"
newline
bitfld.long 0x1C 8. "EPKIND,The meaning of this bit depends on the endpoint/channel type configured by the UTYPE bits. less than xe5 []/> summarizes the different meanings." "0,1"
bitfld.long 0x1C 7. "VTTx,- Device mode" "0,1"
newline
bitfld.long 0x1C 6. "DTOGTx,If the endpoint/channel is non-isochronous this bit contains the required value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be transmitted. Hardware toggles this bit when the ACK handshake is received from the USB.." "0: DATA0,1: DATA1"
bitfld.long 0x1C 4.--5. "STATTx,- Device mode" "0: DISABLED: all transmission requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
hexmask.long.byte 0x1C 0.--3. 1. "EA,- Device mode"
group.long 0x40++0x7
line.long 0x0 "USB_CNTR,USB control register"
bitfld.long 0x0 31. "HOST,HOST bit selects betweens host or device USB mode of operation. It must be set before enabling the USB peripheral by the function enable bit." "0: USB Device function,1: USB host function"
bitfld.long 0x0 17. "DDISCM,- Host mode" "0: Device disconnection interrupt disabled,1: Device disconnection interrupt enabled"
newline
bitfld.long 0x0 16. "THR512M,None" "0: 512 byte threshold interrupt disabled,1: 512 byte threshold interrupt enabled"
bitfld.long 0x0 15. "CTRM,None" "0: Correct transfer,1: CTR interrupt enabled"
newline
bitfld.long 0x0 14. "PMAOVRM,None" "0: PMAOVR interrupt disabled,1: PMAOVR interrupt enabled"
bitfld.long 0x0 13. "ERRM,None" "0: ERR interrupt disabled,1: ERR interrupt enabled"
newline
bitfld.long 0x0 12. "WKUPM,None" "0: WKUP interrupt disabled,1: WKUP interrupt enabled"
bitfld.long 0x0 11. "SUSPM,None" "0: Suspend mode request,1: SUSP interrupt enabled"
newline
bitfld.long 0x0 10. "RST_DCONM,None" "0: RESET interrupt disabled,1: RESET interrupt enabled"
bitfld.long 0x0 9. "SOFM,None" "0: SOF interrupt disabled,1: SOF interrupt enabled"
newline
bitfld.long 0x0 8. "ESOFM,None" "0: Expected start of frame,1: ESOF interrupt enabled"
bitfld.long 0x0 7. "L1REQM,None" "0: LPM L1 state request,1: L1REQ interrupt enabled"
newline
bitfld.long 0x0 5. "L1RES,- Device mode" "0: No effect,1: Send 50 us remote-wakeup signaling to host"
bitfld.long 0x0 4. "L2RES,- Device mode" "0: No effect,1: Send L2 resume signaling to device"
newline
bitfld.long 0x0 3. "SUSPEN,- Condition: Device mode" "0: No effect,1: Enter L1/L2 suspend"
rbitfld.long 0x0 2. "SUSPRDY,This bit is set by hardware as soon as the suspend state entered through the SUSPEN control gets internally effective. In this state USB activity is suspended USB clock is gated transceiver is set in low power mode by disabling the differential.." "0: Normal operation,1: Suspend state"
newline
bitfld.long 0x0 1. "PDWN,This bit is used to completely switch off all USB-related analog parts if it is required to completely disable the USB peripheral for any reason. When this bit is set the USB peripheral is disconnected from the transceivers and it cannot be used." "0: Exit power down,1: Enter power down mode"
bitfld.long 0x0 0. "USBRST,- Condition: Device mode" "0: No effect,1: USB reset driven"
line.long 0x4 "USB_ISTR,USB interrupt status register"
rbitfld.long 0x4 30. "LS_DCON,- Host mode:" "0,1"
rbitfld.long 0x4 29. "DCON_STAT,- Host mode:" "0: No device connected,1: FS or LS device connected to the host"
newline
bitfld.long 0x4 17. "DDISC,- Host mode" "0,1"
bitfld.long 0x4 16. "THR512,This bit is set to 1 by the hardware when 512 bytes have been transmitted or received during isochronous transfers. This bit is read/write but only 0 can be written and writing 1 has no effect. Note that no information is available to indicate the.." "0,1"
newline
rbitfld.long 0x4 15. "CTR,This bit is set by the hardware to indicate that an endpoint/channel has successfully completed a transaction; using DIR and IDN bits software can determine which endpoint/channel requested the interrupt. This bit is read-only." "0,1"
bitfld.long 0x4 14. "PMAOVR,This bit is set if the microcontroller has not been able to respond in time to an USB memory request. The USB peripheral handles this event in the following way: During reception an ACK handshake packet is not sent during transmission a bit-stuff.." "0,1"
newline
bitfld.long 0x4 13. "ERR,This flag is set whenever one of the errors listed below has occurred:" "0,1"
bitfld.long 0x4 12. "WKUP,This bit is set to 1 by the hardware when during suspend mode activity is detected that wakes up the USB peripheral. This event asynchronously clears the SUSPRDY bit in the CTLR register and activates the USB_WAKEUP line which can be used to.." "0,1"
newline
bitfld.long 0x4 11. "SUSP,- Device mode" "0,1"
bitfld.long 0x4 10. "RST_DCON,- Device mode" "0,1"
newline
bitfld.long 0x4 9. "SOF,This bit signals the beginning of a new USB frame and it is set when a SOF packet arrives through the USB bus. The interrupt service routine may monitor the SOF events to have a 1 ms synchronization event to the USB host and to safely read the.." "0,1"
bitfld.long 0x4 8. "ESOF,- Device mode" "0,1"
newline
bitfld.long 0x4 7. "L1REQ,- Device mode" "0,1"
rbitfld.long 0x4 4. "DIR,This bit is written by the hardware according to the direction of the successful transaction which generated the interrupt request." "0,1"
newline
hexmask.long.byte 0x4 0.--3. 1. "IDN,These bits are written by the hardware according to the host channel or device endpoint number which generated the interrupt request. If several endpoint/channel transactions are pending the hardware writes the identification number related to the.."
rgroup.long 0x48++0x3
line.long 0x0 "USB_FNR,USB frame number register"
bitfld.long 0x0 15. "RxDP,This bit can be used to observe the status of received data plus upstream port data line. It can be used during end-of-suspend routines to help determining the wakeup event." "0,1"
bitfld.long 0x0 14. "RxDM,This bit can be used to observe the status of received data minus upstream port data line. It can be used during end-of-suspend routines to help determining the wakeup event." "0,1"
newline
bitfld.long 0x0 13. "LCK,- Device mode" "0,1"
bitfld.long 0x0 11.--12. "LSOF,- Device mode" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--10. 1. "FN,This bit field contains the 11-bits frame number contained in the last received SOF packet. The frame number is incremented for every frame sent by the host and it is useful for isochronous transfers. This bit field is updated on the generation of an.."
group.long 0x4C++0x3
line.long 0x0 "USB_DADDR,USB Device address"
bitfld.long 0x0 7. "EF,This bit is set by the software to enable the USB Device. The address of this device is contained in the following ADD[6:0] bits. If this bit is at 0 no transactions are handled irrespective of the settings of USB_CHEPnR registers." "0,1"
hexmask.long.byte 0x0 0.--6. 1. "ADD,- Device mode"
group.long 0x54++0x7
line.long 0x0 "USB_LPMCSR,LPM control and status register"
hexmask.long.byte 0x0 4.--7. 1. "BESL,- Device mode"
rbitfld.long 0x0 3. "REMWAKE,- Device mode" "0,1"
newline
bitfld.long 0x0 1. "LPMACK,- Device mode:" "0: the valid LPM token is NYET,1: the valid LPM token is ACK"
bitfld.long 0x0 0. "LPMEN,- Device mode" "0,1"
line.long 0x4 "USB_BCDR,Battery charging detector"
bitfld.long 0x4 15. "DPPU_DPD,- Device mode" "0,1"
rbitfld.long 0x4 7. "PS2DET,- Device mode" "0: Normal port detected,1: PS2 port or proprietary charger detected"
newline
rbitfld.long 0x4 6. "SDET,- Device mode" "0: CDP detected,1: DCP detected"
rbitfld.long 0x4 5. "PDET,- Device mode" "0: no BCD support detected,1: BCD support detected"
newline
rbitfld.long 0x4 4. "DCDET,- Device mode" "0: data lines contact not detected,1: data lines contact detected"
bitfld.long 0x4 3. "SDEN,- Device mode" "0,1"
newline
bitfld.long 0x4 2. "PDEN,- Device mode" "0,1"
bitfld.long 0x4 1. "DCDEN,- Device mode" "0,1"
newline
bitfld.long 0x4 0. "BCDEN,- Device mode" "0,1"
tree.end
tree "SEC_USB"
base ad:0x50016000
group.long 0x0++0x1F
line.long 0x0 "USB_CHEP0R,USB endpoint/channel 0 register"
bitfld.long 0x0 29.--30. "THREE_ERR_Rx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
bitfld.long 0x0 27.--28. "THREE_ERR_Tx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
newline
bitfld.long 0x0 26. "ERR_Rx,- Host mode" "0,1"
bitfld.long 0x0 25. "ERR_Tx,- Host mode" "0,1"
newline
bitfld.long 0x0 24. "LS_EP,- Host mode" "0: Full speed endpoint,1: Low speed endpoint"
bitfld.long 0x0 23. "NAK,- Host mode" "0,1"
newline
hexmask.long.byte 0x0 16.--22. 1. "DEVADDR,- Host mode"
bitfld.long 0x0 15. "VTRx,- Device mode" "0,1"
newline
bitfld.long 0x0 14. "DTOGRx,If the endpoint/channel is not isochronous this bit contains the expected value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be received. Hardware toggles this bit when the ACK handshake is sent following a data.." "0: DATA0,1: DATA1"
bitfld.long 0x0 12.--13. "STATRx,- Device mode" "0: DISABLED: all reception requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
rbitfld.long 0x0 11. "SETUP,- Device mode" "0,1"
bitfld.long 0x0 9.--10. "UTYPE,These bits configure the behavior of this endpoint/channel as described in less than xe4 []/>. Channel0/Endpoint0 must always be a control endpoint/channel and each USB function must have at least one control endpoint/channel which has address 0 .." "0: BULK-EPKIND meaning : DBL_BUF,1: CONTROL-EPKIND meaning :STATUS_OUT,2: ISO-EPKIND meaning SBUF_ISO: This bit is set by..,3: INTERRUPT-EPKIND meaning : Not used"
newline
bitfld.long 0x0 8. "EPKIND,The meaning of this bit depends on the endpoint/channel type configured by the UTYPE bits. less than xe5 []/> summarizes the different meanings." "0,1"
bitfld.long 0x0 7. "VTTx,- Device mode" "0,1"
newline
bitfld.long 0x0 6. "DTOGTx,If the endpoint/channel is non-isochronous this bit contains the required value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be transmitted. Hardware toggles this bit when the ACK handshake is received from the USB.." "0: DATA0,1: DATA1"
bitfld.long 0x0 4.--5. "STATTx,- Device mode" "0: DISABLED: all transmission requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
hexmask.long.byte 0x0 0.--3. 1. "EA,- Device mode"
line.long 0x4 "USB_CHEP1R,USB endpoint/channel 1 register"
bitfld.long 0x4 29.--30. "THREE_ERR_Rx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
bitfld.long 0x4 27.--28. "THREE_ERR_Tx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
newline
bitfld.long 0x4 26. "ERR_Rx,- Host mode" "0,1"
bitfld.long 0x4 25. "ERR_Tx,- Host mode" "0,1"
newline
bitfld.long 0x4 24. "LS_EP,- Host mode" "0: Full speed endpoint,1: Low speed endpoint"
bitfld.long 0x4 23. "NAK,- Host mode" "0,1"
newline
hexmask.long.byte 0x4 16.--22. 1. "DEVADDR,- Host mode"
bitfld.long 0x4 15. "VTRx,- Device mode" "0,1"
newline
bitfld.long 0x4 14. "DTOGRx,If the endpoint/channel is not isochronous this bit contains the expected value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be received. Hardware toggles this bit when the ACK handshake is sent following a data.." "0: DATA0,1: DATA1"
bitfld.long 0x4 12.--13. "STATRx,- Device mode" "0: DISABLED: all reception requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
rbitfld.long 0x4 11. "SETUP,- Device mode" "0,1"
bitfld.long 0x4 9.--10. "UTYPE,These bits configure the behavior of this endpoint/channel as described in less than xe4 []/>. Channel0/Endpoint0 must always be a control endpoint/channel and each USB function must have at least one control endpoint/channel which has address 0 .." "0: BULK-EPKIND meaning : DBL_BUF,1: CONTROL-EPKIND meaning :STATUS_OUT,2: ISO-EPKIND meaning SBUF_ISO: This bit is set by..,3: INTERRUPT-EPKIND meaning : Not used"
newline
bitfld.long 0x4 8. "EPKIND,The meaning of this bit depends on the endpoint/channel type configured by the UTYPE bits. less than xe5 []/> summarizes the different meanings." "0,1"
bitfld.long 0x4 7. "VTTx,- Device mode" "0,1"
newline
bitfld.long 0x4 6. "DTOGTx,If the endpoint/channel is non-isochronous this bit contains the required value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be transmitted. Hardware toggles this bit when the ACK handshake is received from the USB.." "0: DATA0,1: DATA1"
bitfld.long 0x4 4.--5. "STATTx,- Device mode" "0: DISABLED: all transmission requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
hexmask.long.byte 0x4 0.--3. 1. "EA,- Device mode"
line.long 0x8 "USB_CHEP2R,USB endpoint/channel 2 register"
bitfld.long 0x8 29.--30. "THREE_ERR_Rx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
bitfld.long 0x8 27.--28. "THREE_ERR_Tx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
newline
bitfld.long 0x8 26. "ERR_Rx,- Host mode" "0,1"
bitfld.long 0x8 25. "ERR_Tx,- Host mode" "0,1"
newline
bitfld.long 0x8 24. "LS_EP,- Host mode" "0: Full speed endpoint,1: Low speed endpoint"
bitfld.long 0x8 23. "NAK,- Host mode" "0,1"
newline
hexmask.long.byte 0x8 16.--22. 1. "DEVADDR,- Host mode"
bitfld.long 0x8 15. "VTRx,- Device mode" "0,1"
newline
bitfld.long 0x8 14. "DTOGRx,If the endpoint/channel is not isochronous this bit contains the expected value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be received. Hardware toggles this bit when the ACK handshake is sent following a data.." "0: DATA0,1: DATA1"
bitfld.long 0x8 12.--13. "STATRx,- Device mode" "0: DISABLED: all reception requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
rbitfld.long 0x8 11. "SETUP,- Device mode" "0,1"
bitfld.long 0x8 9.--10. "UTYPE,These bits configure the behavior of this endpoint/channel as described in less than xe4 []/>. Channel0/Endpoint0 must always be a control endpoint/channel and each USB function must have at least one control endpoint/channel which has address 0 .." "0: BULK-EPKIND meaning : DBL_BUF,1: CONTROL-EPKIND meaning :STATUS_OUT,2: ISO-EPKIND meaning SBUF_ISO: This bit is set by..,3: INTERRUPT-EPKIND meaning : Not used"
newline
bitfld.long 0x8 8. "EPKIND,The meaning of this bit depends on the endpoint/channel type configured by the UTYPE bits. less than xe5 []/> summarizes the different meanings." "0,1"
bitfld.long 0x8 7. "VTTx,- Device mode" "0,1"
newline
bitfld.long 0x8 6. "DTOGTx,If the endpoint/channel is non-isochronous this bit contains the required value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be transmitted. Hardware toggles this bit when the ACK handshake is received from the USB.." "0: DATA0,1: DATA1"
bitfld.long 0x8 4.--5. "STATTx,- Device mode" "0: DISABLED: all transmission requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
hexmask.long.byte 0x8 0.--3. 1. "EA,- Device mode"
line.long 0xC "USB_CHEP3R,USB endpoint/channel 3 register"
bitfld.long 0xC 29.--30. "THREE_ERR_Rx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
bitfld.long 0xC 27.--28. "THREE_ERR_Tx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
newline
bitfld.long 0xC 26. "ERR_Rx,- Host mode" "0,1"
bitfld.long 0xC 25. "ERR_Tx,- Host mode" "0,1"
newline
bitfld.long 0xC 24. "LS_EP,- Host mode" "0: Full speed endpoint,1: Low speed endpoint"
bitfld.long 0xC 23. "NAK,- Host mode" "0,1"
newline
hexmask.long.byte 0xC 16.--22. 1. "DEVADDR,- Host mode"
bitfld.long 0xC 15. "VTRx,- Device mode" "0,1"
newline
bitfld.long 0xC 14. "DTOGRx,If the endpoint/channel is not isochronous this bit contains the expected value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be received. Hardware toggles this bit when the ACK handshake is sent following a data.." "0: DATA0,1: DATA1"
bitfld.long 0xC 12.--13. "STATRx,- Device mode" "0: DISABLED: all reception requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
rbitfld.long 0xC 11. "SETUP,- Device mode" "0,1"
bitfld.long 0xC 9.--10. "UTYPE,These bits configure the behavior of this endpoint/channel as described in less than xe4 []/>. Channel0/Endpoint0 must always be a control endpoint/channel and each USB function must have at least one control endpoint/channel which has address 0 .." "0: BULK-EPKIND meaning : DBL_BUF,1: CONTROL-EPKIND meaning :STATUS_OUT,2: ISO-EPKIND meaning SBUF_ISO: This bit is set by..,3: INTERRUPT-EPKIND meaning : Not used"
newline
bitfld.long 0xC 8. "EPKIND,The meaning of this bit depends on the endpoint/channel type configured by the UTYPE bits. less than xe5 []/> summarizes the different meanings." "0,1"
bitfld.long 0xC 7. "VTTx,- Device mode" "0,1"
newline
bitfld.long 0xC 6. "DTOGTx,If the endpoint/channel is non-isochronous this bit contains the required value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be transmitted. Hardware toggles this bit when the ACK handshake is received from the USB.." "0: DATA0,1: DATA1"
bitfld.long 0xC 4.--5. "STATTx,- Device mode" "0: DISABLED: all transmission requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
hexmask.long.byte 0xC 0.--3. 1. "EA,- Device mode"
line.long 0x10 "USB_CHEP4R,USB endpoint/channel 4 register"
bitfld.long 0x10 29.--30. "THREE_ERR_Rx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
bitfld.long 0x10 27.--28. "THREE_ERR_Tx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
newline
bitfld.long 0x10 26. "ERR_Rx,- Host mode" "0,1"
bitfld.long 0x10 25. "ERR_Tx,- Host mode" "0,1"
newline
bitfld.long 0x10 24. "LS_EP,- Host mode" "0: Full speed endpoint,1: Low speed endpoint"
bitfld.long 0x10 23. "NAK,- Host mode" "0,1"
newline
hexmask.long.byte 0x10 16.--22. 1. "DEVADDR,- Host mode"
bitfld.long 0x10 15. "VTRx,- Device mode" "0,1"
newline
bitfld.long 0x10 14. "DTOGRx,If the endpoint/channel is not isochronous this bit contains the expected value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be received. Hardware toggles this bit when the ACK handshake is sent following a data.." "0: DATA0,1: DATA1"
bitfld.long 0x10 12.--13. "STATRx,- Device mode" "0: DISABLED: all reception requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
rbitfld.long 0x10 11. "SETUP,- Device mode" "0,1"
bitfld.long 0x10 9.--10. "UTYPE,These bits configure the behavior of this endpoint/channel as described in less than xe4 []/>. Channel0/Endpoint0 must always be a control endpoint/channel and each USB function must have at least one control endpoint/channel which has address 0 .." "0: BULK-EPKIND meaning : DBL_BUF,1: CONTROL-EPKIND meaning :STATUS_OUT,2: ISO-EPKIND meaning SBUF_ISO: This bit is set by..,3: INTERRUPT-EPKIND meaning : Not used"
newline
bitfld.long 0x10 8. "EPKIND,The meaning of this bit depends on the endpoint/channel type configured by the UTYPE bits. less than xe5 []/> summarizes the different meanings." "0,1"
bitfld.long 0x10 7. "VTTx,- Device mode" "0,1"
newline
bitfld.long 0x10 6. "DTOGTx,If the endpoint/channel is non-isochronous this bit contains the required value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be transmitted. Hardware toggles this bit when the ACK handshake is received from the USB.." "0: DATA0,1: DATA1"
bitfld.long 0x10 4.--5. "STATTx,- Device mode" "0: DISABLED: all transmission requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
hexmask.long.byte 0x10 0.--3. 1. "EA,- Device mode"
line.long 0x14 "USB_CHEP5R,USB endpoint/channel 5 register"
bitfld.long 0x14 29.--30. "THREE_ERR_Rx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
bitfld.long 0x14 27.--28. "THREE_ERR_Tx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
newline
bitfld.long 0x14 26. "ERR_Rx,- Host mode" "0,1"
bitfld.long 0x14 25. "ERR_Tx,- Host mode" "0,1"
newline
bitfld.long 0x14 24. "LS_EP,- Host mode" "0: Full speed endpoint,1: Low speed endpoint"
bitfld.long 0x14 23. "NAK,- Host mode" "0,1"
newline
hexmask.long.byte 0x14 16.--22. 1. "DEVADDR,- Host mode"
bitfld.long 0x14 15. "VTRx,- Device mode" "0,1"
newline
bitfld.long 0x14 14. "DTOGRx,If the endpoint/channel is not isochronous this bit contains the expected value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be received. Hardware toggles this bit when the ACK handshake is sent following a data.." "0: DATA0,1: DATA1"
bitfld.long 0x14 12.--13. "STATRx,- Device mode" "0: DISABLED: all reception requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
rbitfld.long 0x14 11. "SETUP,- Device mode" "0,1"
bitfld.long 0x14 9.--10. "UTYPE,These bits configure the behavior of this endpoint/channel as described in less than xe4 []/>. Channel0/Endpoint0 must always be a control endpoint/channel and each USB function must have at least one control endpoint/channel which has address 0 .." "0: BULK-EPKIND meaning : DBL_BUF,1: CONTROL-EPKIND meaning :STATUS_OUT,2: ISO-EPKIND meaning SBUF_ISO: This bit is set by..,3: INTERRUPT-EPKIND meaning : Not used"
newline
bitfld.long 0x14 8. "EPKIND,The meaning of this bit depends on the endpoint/channel type configured by the UTYPE bits. less than xe5 []/> summarizes the different meanings." "0,1"
bitfld.long 0x14 7. "VTTx,- Device mode" "0,1"
newline
bitfld.long 0x14 6. "DTOGTx,If the endpoint/channel is non-isochronous this bit contains the required value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be transmitted. Hardware toggles this bit when the ACK handshake is received from the USB.." "0: DATA0,1: DATA1"
bitfld.long 0x14 4.--5. "STATTx,- Device mode" "0: DISABLED: all transmission requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
hexmask.long.byte 0x14 0.--3. 1. "EA,- Device mode"
line.long 0x18 "USB_CHEP6R,USB endpoint/channel 6 register"
bitfld.long 0x18 29.--30. "THREE_ERR_Rx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
bitfld.long 0x18 27.--28. "THREE_ERR_Tx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
newline
bitfld.long 0x18 26. "ERR_Rx,- Host mode" "0,1"
bitfld.long 0x18 25. "ERR_Tx,- Host mode" "0,1"
newline
bitfld.long 0x18 24. "LS_EP,- Host mode" "0: Full speed endpoint,1: Low speed endpoint"
bitfld.long 0x18 23. "NAK,- Host mode" "0,1"
newline
hexmask.long.byte 0x18 16.--22. 1. "DEVADDR,- Host mode"
bitfld.long 0x18 15. "VTRx,- Device mode" "0,1"
newline
bitfld.long 0x18 14. "DTOGRx,If the endpoint/channel is not isochronous this bit contains the expected value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be received. Hardware toggles this bit when the ACK handshake is sent following a data.." "0: DATA0,1: DATA1"
bitfld.long 0x18 12.--13. "STATRx,- Device mode" "0: DISABLED: all reception requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
rbitfld.long 0x18 11. "SETUP,- Device mode" "0,1"
bitfld.long 0x18 9.--10. "UTYPE,These bits configure the behavior of this endpoint/channel as described in less than xe4 []/>. Channel0/Endpoint0 must always be a control endpoint/channel and each USB function must have at least one control endpoint/channel which has address 0 .." "0: BULK-EPKIND meaning : DBL_BUF,1: CONTROL-EPKIND meaning :STATUS_OUT,2: ISO-EPKIND meaning SBUF_ISO: This bit is set by..,3: INTERRUPT-EPKIND meaning : Not used"
newline
bitfld.long 0x18 8. "EPKIND,The meaning of this bit depends on the endpoint/channel type configured by the UTYPE bits. less than xe5 []/> summarizes the different meanings." "0,1"
bitfld.long 0x18 7. "VTTx,- Device mode" "0,1"
newline
bitfld.long 0x18 6. "DTOGTx,If the endpoint/channel is non-isochronous this bit contains the required value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be transmitted. Hardware toggles this bit when the ACK handshake is received from the USB.." "0: DATA0,1: DATA1"
bitfld.long 0x18 4.--5. "STATTx,- Device mode" "0: DISABLED: all transmission requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
hexmask.long.byte 0x18 0.--3. 1. "EA,- Device mode"
line.long 0x1C "USB_CHEP7R,USB endpoint/channel 7 register"
bitfld.long 0x1C 29.--30. "THREE_ERR_Rx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
bitfld.long 0x1C 27.--28. "THREE_ERR_Tx,- Host mode" "0: Less than 3 errors received,1: More than 3 errors received,2: More than 3 errors received last error is data..,3: More than 3 errors received last error is.."
newline
bitfld.long 0x1C 26. "ERR_Rx,- Host mode" "0,1"
bitfld.long 0x1C 25. "ERR_Tx,- Host mode" "0,1"
newline
bitfld.long 0x1C 24. "LS_EP,- Host mode" "0: Full speed endpoint,1: Low speed endpoint"
bitfld.long 0x1C 23. "NAK,- Host mode" "0,1"
newline
hexmask.long.byte 0x1C 16.--22. 1. "DEVADDR,- Host mode"
bitfld.long 0x1C 15. "VTRx,- Device mode" "0,1"
newline
bitfld.long 0x1C 14. "DTOGRx,If the endpoint/channel is not isochronous this bit contains the expected value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be received. Hardware toggles this bit when the ACK handshake is sent following a data.." "0: DATA0,1: DATA1"
bitfld.long 0x1C 12.--13. "STATRx,- Device mode" "0: DISABLED: all reception requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
rbitfld.long 0x1C 11. "SETUP,- Device mode" "0,1"
bitfld.long 0x1C 9.--10. "UTYPE,These bits configure the behavior of this endpoint/channel as described in less than xe4 []/>. Channel0/Endpoint0 must always be a control endpoint/channel and each USB function must have at least one control endpoint/channel which has address 0 .." "0: BULK-EPKIND meaning : DBL_BUF,1: CONTROL-EPKIND meaning :STATUS_OUT,2: ISO-EPKIND meaning SBUF_ISO: This bit is set by..,3: INTERRUPT-EPKIND meaning : Not used"
newline
bitfld.long 0x1C 8. "EPKIND,The meaning of this bit depends on the endpoint/channel type configured by the UTYPE bits. less than xe5 []/> summarizes the different meanings." "0,1"
bitfld.long 0x1C 7. "VTTx,- Device mode" "0,1"
newline
bitfld.long 0x1C 6. "DTOGTx,If the endpoint/channel is non-isochronous this bit contains the required value of the data toggle bit (0 = DATA0 1 = DATA1) for the next data packet to be transmitted. Hardware toggles this bit when the ACK handshake is received from the USB.." "0: DATA0,1: DATA1"
bitfld.long 0x1C 4.--5. "STATTx,- Device mode" "0: DISABLED: all transmission requests addressed to..,1: STALL: Device mode: the endpoint is stalled and..,2: NAK: Device mode: the endpoint is NAKed and all..,3: VALID: this endpoint/channel is enabled for.."
newline
hexmask.long.byte 0x1C 0.--3. 1. "EA,- Device mode"
group.long 0x40++0x7
line.long 0x0 "USB_CNTR,USB control register"
bitfld.long 0x0 31. "HOST,HOST bit selects betweens host or device USB mode of operation. It must be set before enabling the USB peripheral by the function enable bit." "0: USB Device function,1: USB host function"
bitfld.long 0x0 17. "DDISCM,- Host mode" "0: Device disconnection interrupt disabled,1: Device disconnection interrupt enabled"
newline
bitfld.long 0x0 16. "THR512M,None" "0: 512 byte threshold interrupt disabled,1: 512 byte threshold interrupt enabled"
bitfld.long 0x0 15. "CTRM,None" "0: Correct transfer,1: CTR interrupt enabled"
newline
bitfld.long 0x0 14. "PMAOVRM,None" "0: PMAOVR interrupt disabled,1: PMAOVR interrupt enabled"
bitfld.long 0x0 13. "ERRM,None" "0: ERR interrupt disabled,1: ERR interrupt enabled"
newline
bitfld.long 0x0 12. "WKUPM,None" "0: WKUP interrupt disabled,1: WKUP interrupt enabled"
bitfld.long 0x0 11. "SUSPM,None" "0: Suspend mode request,1: SUSP interrupt enabled"
newline
bitfld.long 0x0 10. "RST_DCONM,None" "0: RESET interrupt disabled,1: RESET interrupt enabled"
bitfld.long 0x0 9. "SOFM,None" "0: SOF interrupt disabled,1: SOF interrupt enabled"
newline
bitfld.long 0x0 8. "ESOFM,None" "0: Expected start of frame,1: ESOF interrupt enabled"
bitfld.long 0x0 7. "L1REQM,None" "0: LPM L1 state request,1: L1REQ interrupt enabled"
newline
bitfld.long 0x0 5. "L1RES,- Device mode" "0: No effect,1: Send 50 us remote-wakeup signaling to host"
bitfld.long 0x0 4. "L2RES,- Device mode" "0: No effect,1: Send L2 resume signaling to device"
newline
bitfld.long 0x0 3. "SUSPEN,- Condition: Device mode" "0: No effect,1: Enter L1/L2 suspend"
rbitfld.long 0x0 2. "SUSPRDY,This bit is set by hardware as soon as the suspend state entered through the SUSPEN control gets internally effective. In this state USB activity is suspended USB clock is gated transceiver is set in low power mode by disabling the differential.." "0: Normal operation,1: Suspend state"
newline
bitfld.long 0x0 1. "PDWN,This bit is used to completely switch off all USB-related analog parts if it is required to completely disable the USB peripheral for any reason. When this bit is set the USB peripheral is disconnected from the transceivers and it cannot be used." "0: Exit power down,1: Enter power down mode"
bitfld.long 0x0 0. "USBRST,- Condition: Device mode" "0: No effect,1: USB reset driven"
line.long 0x4 "USB_ISTR,USB interrupt status register"
rbitfld.long 0x4 30. "LS_DCON,- Host mode:" "0,1"
rbitfld.long 0x4 29. "DCON_STAT,- Host mode:" "0: No device connected,1: FS or LS device connected to the host"
newline
bitfld.long 0x4 17. "DDISC,- Host mode" "0,1"
bitfld.long 0x4 16. "THR512,This bit is set to 1 by the hardware when 512 bytes have been transmitted or received during isochronous transfers. This bit is read/write but only 0 can be written and writing 1 has no effect. Note that no information is available to indicate the.." "0,1"
newline
rbitfld.long 0x4 15. "CTR,This bit is set by the hardware to indicate that an endpoint/channel has successfully completed a transaction; using DIR and IDN bits software can determine which endpoint/channel requested the interrupt. This bit is read-only." "0,1"
bitfld.long 0x4 14. "PMAOVR,This bit is set if the microcontroller has not been able to respond in time to an USB memory request. The USB peripheral handles this event in the following way: During reception an ACK handshake packet is not sent during transmission a bit-stuff.." "0,1"
newline
bitfld.long 0x4 13. "ERR,This flag is set whenever one of the errors listed below has occurred:" "0,1"
bitfld.long 0x4 12. "WKUP,This bit is set to 1 by the hardware when during suspend mode activity is detected that wakes up the USB peripheral. This event asynchronously clears the SUSPRDY bit in the CTLR register and activates the USB_WAKEUP line which can be used to.." "0,1"
newline
bitfld.long 0x4 11. "SUSP,- Device mode" "0,1"
bitfld.long 0x4 10. "RST_DCON,- Device mode" "0,1"
newline
bitfld.long 0x4 9. "SOF,This bit signals the beginning of a new USB frame and it is set when a SOF packet arrives through the USB bus. The interrupt service routine may monitor the SOF events to have a 1 ms synchronization event to the USB host and to safely read the.." "0,1"
bitfld.long 0x4 8. "ESOF,- Device mode" "0,1"
newline
bitfld.long 0x4 7. "L1REQ,- Device mode" "0,1"
rbitfld.long 0x4 4. "DIR,This bit is written by the hardware according to the direction of the successful transaction which generated the interrupt request." "0,1"
newline
hexmask.long.byte 0x4 0.--3. 1. "IDN,These bits are written by the hardware according to the host channel or device endpoint number which generated the interrupt request. If several endpoint/channel transactions are pending the hardware writes the identification number related to the.."
rgroup.long 0x48++0x3
line.long 0x0 "USB_FNR,USB frame number register"
bitfld.long 0x0 15. "RxDP,This bit can be used to observe the status of received data plus upstream port data line. It can be used during end-of-suspend routines to help determining the wakeup event." "0,1"
bitfld.long 0x0 14. "RxDM,This bit can be used to observe the status of received data minus upstream port data line. It can be used during end-of-suspend routines to help determining the wakeup event." "0,1"
newline
bitfld.long 0x0 13. "LCK,- Device mode" "0,1"
bitfld.long 0x0 11.--12. "LSOF,- Device mode" "0,1,2,3"
newline
hexmask.long.word 0x0 0.--10. 1. "FN,This bit field contains the 11-bits frame number contained in the last received SOF packet. The frame number is incremented for every frame sent by the host and it is useful for isochronous transfers. This bit field is updated on the generation of an.."
group.long 0x4C++0x3
line.long 0x0 "USB_DADDR,USB Device address"
bitfld.long 0x0 7. "EF,This bit is set by the software to enable the USB Device. The address of this device is contained in the following ADD[6:0] bits. If this bit is at 0 no transactions are handled irrespective of the settings of USB_CHEPnR registers." "0,1"
hexmask.long.byte 0x0 0.--6. 1. "ADD,- Device mode"
group.long 0x54++0x7
line.long 0x0 "USB_LPMCSR,LPM control and status register"
hexmask.long.byte 0x0 4.--7. 1. "BESL,- Device mode"
rbitfld.long 0x0 3. "REMWAKE,- Device mode" "0,1"
newline
bitfld.long 0x0 1. "LPMACK,- Device mode:" "0: the valid LPM token is NYET,1: the valid LPM token is ACK"
bitfld.long 0x0 0. "LPMEN,- Device mode" "0,1"
line.long 0x4 "USB_BCDR,Battery charging detector"
bitfld.long 0x4 15. "DPPU_DPD,- Device mode" "0,1"
rbitfld.long 0x4 7. "PS2DET,- Device mode" "0: Normal port detected,1: PS2 port or proprietary charger detected"
newline
rbitfld.long 0x4 6. "SDET,- Device mode" "0: CDP detected,1: DCP detected"
rbitfld.long 0x4 5. "PDET,- Device mode" "0: no BCD support detected,1: BCD support detected"
newline
rbitfld.long 0x4 4. "DCDET,- Device mode" "0: data lines contact not detected,1: data lines contact detected"
bitfld.long 0x4 3. "SDEN,- Device mode" "0,1"
newline
bitfld.long 0x4 2. "PDEN,- Device mode" "0,1"
bitfld.long 0x4 1. "DCDEN,- Device mode" "0,1"
newline
bitfld.long 0x4 0. "BCDEN,- Device mode" "0,1"
tree.end
tree "USBSRAM"
base ad:0x40016400
group.long 0x0++0x3
line.long 0x0 "USBSRAM_CHEP_TxRxBD_0,Channel/endpoint transmit buffer descriptor 0"
hexmask.long.word 0x0 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEP0R register at the next IN token addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel"
group.long 0x0++0x7
line.long 0x0 "USBSRAM_CHEP_TxRxBD_0_ALTERNATE,Channel/endpoint transmit buffer descriptor 0"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel"
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer"
line.long 0x4 "USBSRAM_CHEP_RxTxBD_0,Channel/endpoint transmit buffer descriptor 0"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEPnR register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP0R register at the next IN token addressed to it."
group.long 0x4++0x7
line.long 0x0 "USBSRAM_CHEP_RxTxBD_0_ALTERNATE,Channel/endpoint transmit buffer descriptor 0"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEPnR register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP0R register at the next OUT/SETUP token addressed to it."
line.long 0x4 "USBSRAM_CHEP_TxRxBD_1,Channel/endpoint transmit buffer descriptor 1"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEP1R register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP1R register at the next IN token addressed to it."
group.long 0x8++0x7
line.long 0x0 "USBSRAM_CHEP_TxRxBD_1_ALTERNATE,Channel/endpoint transmit buffer descriptor 1"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEP1R register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP1R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_RxTxBD_1,Channel/endpoint transmit buffer descriptor 1"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEPnR register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP1R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0xC++0x7
line.long 0x0 "USBSRAM_CHEP_RxTxBD_1_ALTERNATE,Channel/endpoint transmit buffer descriptor 1"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEPnR register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP1R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_TxRxBD_2,Channel/endpoint transmit buffer descriptor 2"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEP2R register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP2R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0x10++0x7
line.long 0x0 "USBSRAM_CHEP_TxRxBD_2_ALTERNATE,Channel/endpoint transmit buffer descriptor 2"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEP2R register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP2R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_RxTxBD_2,Channel/endpoint transmit buffer descriptor 2"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEPnR register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP2R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0x14++0x7
line.long 0x0 "USBSRAM_CHEP_RxTxBD_2_ALTERNATE,Channel/endpoint transmit buffer descriptor 2"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEPnR register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP2R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_TxRxBD_3,Channel/endpoint transmit buffer descriptor 3"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEP3R register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP3R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0x18++0x7
line.long 0x0 "USBSRAM_CHEP_TxRxBD_3_ALTERNATE,Channel/endpoint transmit buffer descriptor 3"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEP3R register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP3R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_RxTxBD_3,Channel/endpoint transmit buffer descriptor 3"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEPnR register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP3R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0x1C++0x7
line.long 0x0 "USBSRAM_CHEP_RxTxBD_3_ALTERNATE,Channel/endpoint transmit buffer descriptor 3"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEPnR register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP3R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_TxRxBD_4,Channel/endpoint transmit buffer descriptor 4"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEP4R register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP4R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0x20++0x7
line.long 0x0 "USBSRAM_CHEP_TxRxBD_4_ALTERNATE,Channel/endpoint transmit buffer descriptor 4"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEP4R register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP4R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_RxTxBD_4,Channel/endpoint transmit buffer descriptor 4"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEPnR register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP4R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0x24++0x7
line.long 0x0 "USBSRAM_CHEP_RxTxBD_4_ALTERNATE,Channel/endpoint transmit buffer descriptor 4"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEPnR register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP4R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_TxRxBD_5,Channel/endpoint transmit buffer descriptor 5"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEP5R register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP5R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0x28++0x7
line.long 0x0 "USBSRAM_CHEP_TxRxBD_5_ALTERNATE,Channel/endpoint transmit buffer descriptor 5"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEP5R register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP5R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_RxTxBD_5,Channel/endpoint transmit buffer descriptor 5"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEPnR register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP5R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0x2C++0x7
line.long 0x0 "USBSRAM_CHEP_RxTxBD_5_ALTERNATE,Channel/endpoint transmit buffer descriptor 5"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEPnR register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP5R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_TxRxBD_6,Channel/endpoint transmit buffer descriptor 6"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEP6R register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP6R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0x30++0x7
line.long 0x0 "USBSRAM_CHEP_TxRxBD_6_ALTERNATE,Channel/endpoint transmit buffer descriptor 6"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEP6R register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP6R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_RxTxBD_6,Channel/endpoint transmit buffer descriptor 6"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEPnR register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP6R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0x34++0x7
line.long 0x0 "USBSRAM_CHEP_RxTxBD_6_ALTERNATE,Channel/endpoint transmit buffer descriptor 6"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEPnR register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP6R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_TxRxBD_7,Channel/endpoint transmit buffer descriptor 7"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEP7R register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer"
group.long 0x38++0x7
line.long 0x0 "USBSRAM_CHEP_TxRxBD_7_ALTERNATE,Channel/endpoint transmit buffer descriptor 7"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEP7R register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer"
line.long 0x4 "USBSRAM_CHEP_RxTxBD_7,Channel/endpoint transmit buffer descriptor 7"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEPnR register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer"
group.long 0x3C++0x3
line.long 0x0 "USBSRAM_CHEP_RxTxBD_7_ALTERNATE,Channel/endpoint transmit buffer descriptor 7"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEPnR register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer"
tree.end
tree "SEC_USBSRAM"
base ad:0x50016400
group.long 0x0++0x3
line.long 0x0 "USBSRAM_CHEP_TxRxBD_0,Channel/endpoint transmit buffer descriptor 0"
hexmask.long.word 0x0 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEP0R register at the next IN token addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel"
group.long 0x0++0x7
line.long 0x0 "USBSRAM_CHEP_TxRxBD_0_ALTERNATE,Channel/endpoint transmit buffer descriptor 0"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel"
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer"
line.long 0x4 "USBSRAM_CHEP_RxTxBD_0,Channel/endpoint transmit buffer descriptor 0"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEPnR register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP0R register at the next IN token addressed to it."
group.long 0x4++0x7
line.long 0x0 "USBSRAM_CHEP_RxTxBD_0_ALTERNATE,Channel/endpoint transmit buffer descriptor 0"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEPnR register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP0R register at the next OUT/SETUP token addressed to it."
line.long 0x4 "USBSRAM_CHEP_TxRxBD_1,Channel/endpoint transmit buffer descriptor 1"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEP1R register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP1R register at the next IN token addressed to it."
group.long 0x8++0x7
line.long 0x0 "USBSRAM_CHEP_TxRxBD_1_ALTERNATE,Channel/endpoint transmit buffer descriptor 1"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEP1R register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP1R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_RxTxBD_1,Channel/endpoint transmit buffer descriptor 1"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEPnR register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP1R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0xC++0x7
line.long 0x0 "USBSRAM_CHEP_RxTxBD_1_ALTERNATE,Channel/endpoint transmit buffer descriptor 1"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEPnR register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP1R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_TxRxBD_2,Channel/endpoint transmit buffer descriptor 2"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEP2R register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP2R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0x10++0x7
line.long 0x0 "USBSRAM_CHEP_TxRxBD_2_ALTERNATE,Channel/endpoint transmit buffer descriptor 2"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEP2R register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP2R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_RxTxBD_2,Channel/endpoint transmit buffer descriptor 2"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEPnR register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP2R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0x14++0x7
line.long 0x0 "USBSRAM_CHEP_RxTxBD_2_ALTERNATE,Channel/endpoint transmit buffer descriptor 2"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEPnR register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP2R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_TxRxBD_3,Channel/endpoint transmit buffer descriptor 3"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEP3R register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP3R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0x18++0x7
line.long 0x0 "USBSRAM_CHEP_TxRxBD_3_ALTERNATE,Channel/endpoint transmit buffer descriptor 3"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEP3R register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP3R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_RxTxBD_3,Channel/endpoint transmit buffer descriptor 3"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEPnR register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP3R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0x1C++0x7
line.long 0x0 "USBSRAM_CHEP_RxTxBD_3_ALTERNATE,Channel/endpoint transmit buffer descriptor 3"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEPnR register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP3R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_TxRxBD_4,Channel/endpoint transmit buffer descriptor 4"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEP4R register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP4R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0x20++0x7
line.long 0x0 "USBSRAM_CHEP_TxRxBD_4_ALTERNATE,Channel/endpoint transmit buffer descriptor 4"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEP4R register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP4R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_RxTxBD_4,Channel/endpoint transmit buffer descriptor 4"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEPnR register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP4R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0x24++0x7
line.long 0x0 "USBSRAM_CHEP_RxTxBD_4_ALTERNATE,Channel/endpoint transmit buffer descriptor 4"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEPnR register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP4R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_TxRxBD_5,Channel/endpoint transmit buffer descriptor 5"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEP5R register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP5R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0x28++0x7
line.long 0x0 "USBSRAM_CHEP_TxRxBD_5_ALTERNATE,Channel/endpoint transmit buffer descriptor 5"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEP5R register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP5R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_RxTxBD_5,Channel/endpoint transmit buffer descriptor 5"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEPnR register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP5R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0x2C++0x7
line.long 0x0 "USBSRAM_CHEP_RxTxBD_5_ALTERNATE,Channel/endpoint transmit buffer descriptor 5"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEPnR register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP5R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_TxRxBD_6,Channel/endpoint transmit buffer descriptor 6"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEP6R register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP6R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0x30++0x7
line.long 0x0 "USBSRAM_CHEP_TxRxBD_6_ALTERNATE,Channel/endpoint transmit buffer descriptor 6"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEP6R register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP6R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_RxTxBD_6,Channel/endpoint transmit buffer descriptor 6"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEPnR register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer containing data to be transmitted by the endpoint/channel associated with the USB_CHEP6R register at the next IN token addressed to it. Bits 1 and 0 must always be written as '00 '.."
group.long 0x34++0x7
line.long 0x0 "USBSRAM_CHEP_RxTxBD_6_ALTERNATE,Channel/endpoint transmit buffer descriptor 6"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEPnR register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer which contains the data received by the endpoint/channel associated with the USB_CHEP6R register at the next OUT/SETUP token addressed to it. Bits 1 and 0 must always be written as.."
line.long 0x4 "USBSRAM_CHEP_TxRxBD_7,Channel/endpoint transmit buffer descriptor 7"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEP7R register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer"
group.long 0x38++0x7
line.long 0x0 "USBSRAM_CHEP_TxRxBD_7_ALTERNATE,Channel/endpoint transmit buffer descriptor 7"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEP7R register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer"
line.long 0x4 "USBSRAM_CHEP_RxTxBD_7,Channel/endpoint transmit buffer descriptor 7"
hexmask.long.word 0x4 16.--25. 1. "COUNT_Tx,These bits contain the number of bytes to be transmitted by the endpoint/channel associated with the USB_CHEPnR register at the next IN token addressed to it."
hexmask.long.word 0x4 0.--15. 1. "ADDR_Tx,These bits point to the starting address of the packet buffer"
group.long 0x3C++0x3
line.long 0x0 "USBSRAM_CHEP_RxTxBD_7_ALTERNATE,Channel/endpoint transmit buffer descriptor 7"
bitfld.long 0x0 31. "BLSIZE,This bit selects the size of memory block used to define the allocated buffer area." "0,1"
hexmask.long.byte 0x0 26.--30. 1. "NUM_BLOCK,These bits define the number of memory blocks allocated to this packet buffer. The actual amount of allocated memory depends on the BLSIZE value as illustrated in less than xe7 []/>."
hexmask.long.word 0x0 16.--25. 1. "COUNT_Rx,These bits contain the number of bytes received by the endpoint/channel associated with the USB_CHEPnR register during the last OUT/SETUP transaction addressed to it."
hexmask.long.word 0x0 0.--15. 1. "ADDR_Rx,These bits point to the starting address of the packet buffer"
tree.end
tree.end
tree "VREFBUF (Voltage Reference Buffer)"
base ad:0x0
tree "VREFBUF"
base ad:0x40007400
group.long 0x0++0x7
line.long 0x0 "VREFBUF_CSR,VREFBUF control and status register"
bitfld.long 0x0 4.--6. "VRS,Voltage reference scale" "0,1,2,3,4,5,6,7"
rbitfld.long 0x0 3. "VRR,Voltage reference buffer ready" "0: the voltage reference buffer output is not ready.,1: the voltage reference buffer output reached the.."
newline
bitfld.long 0x0 1. "HIZ,High impedance mode" "0: Vless thansub>REF+less than/sub> pin is..,1: Vless thansub>REF+less than/sub> pin is high.."
bitfld.long 0x0 0. "ENVR,Voltage reference buffer mode enable" "0: Internal voltage reference mode disable..,1: Internal voltage reference mode (reference.."
line.long 0x4 "VREFBUF_CCR,VREFBUF calibration control register"
hexmask.long.byte 0x4 0.--5. 1. "TRIM,Trimming code"
tree.end
tree "SEC_VREFBUF"
base ad:0x50007400
group.long 0x0++0x7
line.long 0x0 "VREFBUF_CSR,VREFBUF control and status register"
bitfld.long 0x0 4.--6. "VRS,Voltage reference scale" "0,1,2,3,4,5,6,7"
rbitfld.long 0x0 3. "VRR,Voltage reference buffer ready" "0: the voltage reference buffer output is not ready.,1: the voltage reference buffer output reached the.."
newline
bitfld.long 0x0 1. "HIZ,High impedance mode" "0: Vless thansub>REF+less than/sub> pin is..,1: Vless thansub>REF+less than/sub> pin is high.."
bitfld.long 0x0 0. "ENVR,Voltage reference buffer mode enable" "0: Internal voltage reference mode disable..,1: Internal voltage reference mode (reference.."
line.long 0x4 "VREFBUF_CCR,VREFBUF calibration control register"
hexmask.long.byte 0x4 0.--5. 1. "TRIM,Trimming code"
tree.end
tree.end
tree "WWDG (Window Watchdog)"
base ad:0x0
tree "WWDG"
base ad:0x40002C00
group.long 0x0++0xB
line.long 0x0 "WWDG_CR,WWDG control register"
bitfld.long 0x0 7. "WDGA,Activation bit" "0: Watchdog disabled,1: Watchdog enabled"
hexmask.long.byte 0x0 0.--6. 1. "T,7-bit counter (MSB to LSB)"
line.long 0x4 "WWDG_CFR,WWDG configuration register"
bitfld.long 0x4 11.--13. "WDGTB,Timer base" "0: CK counter clock (PCLK div 4096) div 1,1: CK counter clock (PCLK div 4096) div 2,2: CK counter clock (PCLK div 4096) div 4,3: CK counter clock (PCLK div 4096) div 8,4: CK counter clock (PCLK div 4096) div 16,5: CK counter clock (PCLK div 4096) div 32,6: CK counter clock (PCLK div 4096) div 64,7: CK counter clock (PCLK div 4096) div 128"
bitfld.long 0x4 9. "EWI,Early wake-up interrupt enable" "0,1"
hexmask.long.byte 0x4 0.--6. 1. "W,7-bit window value"
line.long 0x8 "WWDG_SR,WWDG status register"
bitfld.long 0x8 0. "EWIF,Early wake-up interrupt flag" "0,1"
tree.end
tree "SEC_WWDG"
base ad:0x50002C00
group.long 0x0++0xB
line.long 0x0 "WWDG_CR,WWDG control register"
bitfld.long 0x0 7. "WDGA,Activation bit" "0: Watchdog disabled,1: Watchdog enabled"
hexmask.long.byte 0x0 0.--6. 1. "T,7-bit counter (MSB to LSB)"
line.long 0x4 "WWDG_CFR,WWDG configuration register"
bitfld.long 0x4 11.--13. "WDGTB,Timer base" "0: CK counter clock (PCLK div 4096) div 1,1: CK counter clock (PCLK div 4096) div 2,2: CK counter clock (PCLK div 4096) div 4,3: CK counter clock (PCLK div 4096) div 8,4: CK counter clock (PCLK div 4096) div 16,5: CK counter clock (PCLK div 4096) div 32,6: CK counter clock (PCLK div 4096) div 64,7: CK counter clock (PCLK div 4096) div 128"
bitfld.long 0x4 9. "EWI,Early wake-up interrupt enable" "0,1"
hexmask.long.byte 0x4 0.--6. 1. "W,7-bit window value"
line.long 0x8 "WWDG_SR,WWDG status register"
bitfld.long 0x8 0. "EWIF,Early wake-up interrupt flag" "0,1"
tree.end
tree.end
newline
AUTOINDENT.OFF
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