38393 lines
1.9 MiB
38393 lines
1.9 MiB
; --------------------------------------------------------------------------------
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; @Title: PIC32CZ CA70/MC70 On-Chip Peripherals
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; @Props: Released
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; @Author: NEJ
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; @Changelog: 2025-06-03 NEJ
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; @Manufacturer: MICROCHIP - Microchip Technology Inc.
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; @Doc: Generated (TRACE32, build: 180251.), based on:
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; PIC32CZ-CA70_DFP (1.1.27, 2025-03-10)
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; @Core: Cortex-M7F
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; @Chip: PIC32CZ2051CA70064, PIC32CZ2051CA70100, PIC32CZ2051CA70144,
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; PIC32CZ2051MC70064, PIC32CZ2051MC70100, PIC32CZ2051MC70144
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; @Copyright: (C) 1989-2025 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perpic32czca70mc70.per 19573 2025-06-03 14:08:06Z kwisniewski $
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AUTOINDENT.ON CENTER TREE
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ENUMDELIMITER ","
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base ad:0x0
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tree.close "Core Registers (Cortex-M7F)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 12.
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group.long 0x08++0x03
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line.long 0x00 "ACTLR,Auxiliary Control Register"
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bitfld.long 0x00 28. " DISFPUISSOPT ,DISFPUISSOPT" "No,Yes"
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bitfld.long 0x00 27. " DISCRITAXIRUW ,Disables critical AXI read-under-write" "No,Yes"
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bitfld.long 0x00 26. " DISDYNADD ,Disables dynamic allocation of ADD and SUB instructions" "No,Yes"
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textline " "
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bitfld.long 0x00 21.--25. " DISISSCH1 ,DISISSCH1" "Normal,Not issued in ch1,,,,,,,,,,,,,,,,,,,,Direct branches,Indirect branches,Loaded to PC,Integer MAC and MUL,VFP,?..."
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bitfld.long 0x00 16.--20. " DISDI ,DISDI" "Normal,ch1,,,,,,,,,,,,,,,Direct branches,Indirect branches,Loaded to PC,Integer MAC and MUL,VFP,?..."
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bitfld.long 0x00 15. " DISCRITAXIRUR ,Disables critical AXI read-under-read" "No,Yes"
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textline " "
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bitfld.long 0x00 14. " DISBTACALLOC ,DISBTACALLOC" "No,Yes"
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bitfld.long 0x00 13. " DISBTACREAD ,DISBTACREAD" "No,Yes"
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bitfld.long 0x00 12. " DISITMATBFLUSH ,Disables ITM and DWT ATB flush" "No,Yes"
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textline " "
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bitfld.long 0x00 11. " DISRAMODE ,Disables dynamic read allocate mode for Write-Back Write-Allocate memory regions" "No,Yes"
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bitfld.long 0x00 10. " FPEXCODIS ,Disables FPU exception outputs" "No,Yes"
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bitfld.long 0x00 2. " DISFOLD ,Disables dual-issue functionality" "No,Yes"
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textline ""
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group.long 0x10++0x03
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line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
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rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
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bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core"
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bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
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textline " "
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bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
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group.long 0x14++0x07
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line.long 0x00 "SYST_RVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x00 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
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line.long 0x04 "SYST_CVR,SysTick Current Value Register"
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rgroup.long 0x1C++0x03
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line.long 0x00 "SYST_CALIB,SysTick Calibration value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
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rgroup.long 0xD00++0x03
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line.long 0x00 "CPUID,CPUID Base Register"
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abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited"
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bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15"
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bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,ARMv7-M"
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newline
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abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xC27=Cortex-M7"
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bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15"
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group.long 0xD04++0x23
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line.long 0x00 "ICSR,Interrupt Control and State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,On writes, makes the NMI exception active. On reads, indicates the state of the exception" "Inactive,Active"
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setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSVSET ,On writes, sets the PendSV exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending"
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setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDSTSET ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending"
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textline " "
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rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled"
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rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending"
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hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt"
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textline " "
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rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent"
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hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
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line.long 0x04 "VTOR,Vector Table Offset Register"
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hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address"
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line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector Key"
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rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian"
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bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
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textline " "
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bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
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bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear"
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bitfld.long 0x08 0. " VECTRESET ,Writing 1 to this bit causes a local system reset" "No effect,Reset"
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line.long 0x0C "SCR,System Control Register"
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bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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line.long 0x10 "CCR,Configuration and Control Register"
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bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
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bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
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bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 9. " STKALIGN ,Determines whether the exception entry sequence guarantees 8-byte stack frame alignment, adjusting the SP if necessary before saving state" "4-byte/no adjustment,8-byte/adjustment"
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bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise data access faults on handlers running at priority -1 or priority -2" "Lockup,Ignored"
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bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled"
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bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled"
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bitfld.long 0x10 0. " NONBASETHRDENA ,Controls whether the processor can enter Thread mode at an execution priority level other than base level" "Disabled,Enabled"
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line.long 0x14 "SHPR1,SSystem Handler Priority Register 1"
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hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
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hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
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hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
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textline " "
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hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
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line.long 0x18 "SHPR2,System Handler Priority Register 2"
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hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
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hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
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hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
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textline " "
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hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
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line.long 0x1C "SHPR3,System Handler Priority Register 3"
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hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
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hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
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hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
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textline " "
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hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
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line.long 0x20 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x20 18. " USGFAULTENA ,UsageFault" "Disabled,Enabled"
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bitfld.long 0x20 17. " BUSFAULTENA ,BusFault" "Disabled,Enabled"
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bitfld.long 0x20 16. " MEMFAULTENA ,MemManage" "Disabled,Enabled"
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textline " "
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bitfld.long 0x20 15. " SVCALLPENDED ,SVCall status" "Not pending,Pending"
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bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault status" "Not pending,Pending"
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bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage status" "Not pending,Pending"
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textline " "
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bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault status" "Not pending,Pending"
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bitfld.long 0x20 11. " SYSTICKACT ,SysTick status" "Not active,Active"
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bitfld.long 0x20 10. " PENDSVACT ,PendSV status" "Not active,Active"
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textline " "
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bitfld.long 0x20 8. " MONITORACT ,Monitor status" "Not active,Active"
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bitfld.long 0x20 7. " SVCALLACT ,SVCall status" "Not active,Active"
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bitfld.long 0x20 3. " USGFAULTACT ,UsageFault status" "Not active,Active"
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textline " "
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bitfld.long 0x20 1. " BUSFAULTACT ,BusFault status" "Not active,Active"
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bitfld.long 0x20 0. " MEMFAULTACT ,MemManage status" "Not active,Active"
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group.byte 0xD28++0x1
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line.byte 0x00 "MMFSR,MemManage Status Register"
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bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred"
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bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
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bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
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line.byte 0x01 "BFSR,Bus Fault Status Register"
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bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred"
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bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
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bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
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group.word 0xD2A++0x1
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line.word 0x00 "USAFAULT,Usage Fault Status Register"
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bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
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bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
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bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
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textline " "
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bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
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bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error"
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bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
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group.long 0xD2C++0x13
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line.long 0x00 "HFSR,HardFault Status Register"
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eventfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
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eventfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority has been escalated to a HardFault exception" "Not occurred,Occurred"
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eventfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
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line.long 0x04 "DFSR,Debug Fault Status Register"
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eventfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not occurred,Occurred"
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eventfld.long 0x04 3. " VCATCH ,Indicates triggering of a Vector catch" "Not occurred,Occurred"
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eventfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred"
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textline " "
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eventfld.long 0x04 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not occurred,Occurred"
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eventfld.long 0x04 0. " HALTED ,Indicates a debug event generated by a C_HALT or C_STEP request or a step request triggered by setting DEMCR.MON_STEP to 1" "Not occurred,Occurred"
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line.long 0x08 "MMFAR,MemManage Fault Address Register"
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line.long 0x0C "BFAR,BusFault Address Register"
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line.long 0x10 "AFSR,Auxiliary Fault Status Register"
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group.long 0xD88++0x03
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line.long 0x00 "CPACR,Coprocessor Access Control Register"
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bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Denied,Privileged,,Full"
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bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Denied,Privileged,,Full"
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bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Denied,Privileged,,Full"
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textline " "
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bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Denied,Privileged,,Full"
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bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Denied,Privileged,,Full"
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bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Denied,Privileged,,Full"
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textline " "
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bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Denied,Privileged,,Full"
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bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Denied,Privileged,,Full"
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bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Denied,Privileged,,Full"
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textline " "
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bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Denied,Privileged,,Full"
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wgroup.long 0xF00++0x03
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line.long 0x00 "STIR,Software Triggered Interrupt Register"
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hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
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tree "Memory System"
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width 10.
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rgroup.long 0xD78++0x0B
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line.long 0x00 "CLIDR,Cache Level ID Register"
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bitfld.long 0x00 27.--29. " LOU ,Level of Unification" "Level 1,level 2,?..."
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bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,level 2,?..."
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bitfld.long 0x00 18.--20. " CL7 ,Cache type field level 7" "No cache,?..."
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textline " "
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bitfld.long 0x00 15.--17. " CL6 ,Cache type field level 6" "No cache,?..."
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bitfld.long 0x00 12.--14. " CL5 ,Cache type field level 5" "No cache,?..."
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bitfld.long 0x00 9.--11. " CL4 ,Cache type field level 4" "No cache,?..."
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textline " "
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bitfld.long 0x00 6.--8. " CL3 ,Cache type field level 3" "No cache,?..."
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bitfld.long 0x00 3.--5. " CL2 ,Cache type field level 2" "No cache,?..."
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bitfld.long 0x00 0.--2. " CL1 ,Cache type field level 1" "No cache,Instr. only,Data only,Data and Instr.,?..."
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line.long 0x04 "CTR,Cache Type Register"
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bitfld.long 0x04 29.--31. " FORMAT ,Indicates the implemented CTR format" ",,,,ARMv7,?..."
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bitfld.long 0x04 24.--27. " CWG ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,9,?..."
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bitfld.long 0x04 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,?..."
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textline " "
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bitfld.long 0x04 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x04 0.--3. " IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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line.long 0x08 "CCSIDR,Cache Size ID Register"
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bitfld.long 0x08 31. " WT ,Indicates support available for Write-Through" "Not supported,Supported"
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bitfld.long 0x08 30. " WB ,Indicates support available for Write-Back" "Not supported,Supported"
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bitfld.long 0x08 29. " RA ,Indicates support available for read allocation" "Not supported,Supported"
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textline " "
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bitfld.long 0x08 28. " WA ,Indicates support available for write allocation" "Not supported,Supported"
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hexmask.long.word 0x08 13.--27. 1. " NUMSETS ,Indicates the number of sets as (number of sets) - 1"
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hexmask.long.word 0x08 3.--12. 1. " ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1"
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textline " "
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bitfld.long 0x08 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "4,8,16,32,64,128,256,512"
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group.long 0xD84++0x03
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line.long 0x00 "CSSELR,Cache Size Selection Register"
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bitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,?..."
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bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data,Instruction"
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wgroup.long 0xF50++0x03
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line.long 0x00 "ICIALLU,Instruction cache invalidate all to Point of Unification"
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wgroup.long 0xF58++0x1F
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line.long 0x00 "ICIMVAU,Instruction cache invalidate by address to PoU"
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line.long 0x04 "DCIMVAC,Data cache invalidate by address to Point of Coherency (PoC)"
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line.long 0x08 "DCISW,Data cache invalidate by set/way"
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line.long 0x0C "DCCMVAU,Data cache by address to PoU"
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line.long 0x10 "DCCMVAC,Data cache clean by address to PoC"
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line.long 0x14 "DCCSW,Data cache clean by set/way"
|
|
line.long 0x18 "DCCIMVAC,Data cache clean and invalidate by address to PoC"
|
|
line.long 0x1C "DCCISW,Data cache clean and invalidate by set/way"
|
|
group.long 0xF90++0x13
|
|
line.long 0x00 "ITCMCR,Instruction Tightly-Coupled Memory Control Register"
|
|
bitfld.long 0x00 3.--6. " SZ ,TCM size" "Not implemented,,,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB"
|
|
bitfld.long 0x00 2. " RETEN ,Retry phase enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RMW ,Read-Modify-Write enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,TCM enable" "Disabled,Enabled"
|
|
line.long 0x04 "DTCMCR,Data Tightly-Coupled Memory Control Register"
|
|
bitfld.long 0x04 3.--6. " SZ ,TCM size" "Not implemented,,,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB"
|
|
bitfld.long 0x04 2. " RETEN ,Retry phase enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " RMW ,Read-Modify-Write enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " EN ,TCM enable" "Disabled,Enabled"
|
|
line.long 0x08 "AHBPCR,AHBP control register"
|
|
bitfld.long 0x08 1.--3. " SZ ,AHBP size" "AHBP disabled,64 MB,128 MB,256 MB,512 MB,?..."
|
|
bitfld.long 0x08 0. " EN ,AHBP enable" "Disabled,Enabled"
|
|
line.long 0x0C "CACR,L1 Cache Control Register"
|
|
bitfld.long 0x0C 2. " FORCEWT ,Enables Force Write-through in the data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0C 1. " ECCDIS ,Disables ECC in the instruction and data cache" "No,Yes"
|
|
bitfld.long 0x0C 0. " SIWT ,Enables limited cache coherency usage" "Disabled,Enabled"
|
|
line.long 0x10 "AHBSCR,AHB Slave Control Register"
|
|
bitfld.long 0x10 11.--15. " INITCOUNT ,Fairness counter initialization value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x10 2.--10. 1. " TPRI ,Threshold execution priority for AHBS traffic demotion"
|
|
bitfld.long 0x10 0.--1. " CTL ,AHBS prioritization control" "AHBS,Software,AHBSCR.INITCOUNT,AHBSPRI"
|
|
group.long 0xFA8++0x03
|
|
line.long 0x00 "ABFSR,Auxiliary Bus Fault Status Register"
|
|
bitfld.long 0x00 8.--9. " AXIMTYPE ,Indicates the type of fault on the AXIM interface" "OKAY,EXOKAY,SLVERR,DECERR"
|
|
bitfld.long 0x00 4. " EPPB ,Asynchronous fault on EPPB interface" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " AXIM ,Asynchronous fault on AXIM interface" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AHBP ,Asynchronous fault on AHBP interface" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " DTCM ,Asynchronous fault on DTCM interface" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " ITCM ,Asynchronous fault on ITCM interface" "Not occurred,Occurred"
|
|
group.long 0xFB0++0x03
|
|
line.long 0x00 "IEBR0,Instruction Error bank Register 0"
|
|
bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3"
|
|
bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable"
|
|
bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM"
|
|
bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid"
|
|
group.long 0xFB4++0x03
|
|
line.long 0x00 "IEBR1,Instruction Error bank Register 1"
|
|
bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3"
|
|
bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable"
|
|
bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM"
|
|
bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid"
|
|
group.long 0xFB8++0x03
|
|
line.long 0x00 "DEBR0,Data Error bank Register 0"
|
|
bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3"
|
|
bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable"
|
|
bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM"
|
|
bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid"
|
|
group.long 0xFBC++0x03
|
|
line.long 0x00 "DEBR1,Data Error bank Register 1"
|
|
bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3"
|
|
bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable"
|
|
bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM"
|
|
bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid"
|
|
tree.end
|
|
tree "Feature Registers"
|
|
width 10.
|
|
rgroup.long 0xD40++0x0B
|
|
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
|
|
line.long 0x04 "ID_PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
|
|
line.long 0x08 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
|
|
hgroup.long 0xD4C++0x03
|
|
hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
|
|
rgroup.long 0xD50++0x03
|
|
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
|
|
bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
|
|
bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
|
|
bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
|
|
hgroup.long 0xD54++0x03
|
|
hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
|
|
rgroup.long 0xD58++0x03
|
|
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
|
|
bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
|
|
rgroup.long 0xD60++0x13
|
|
line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
|
|
bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
|
|
bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
|
|
bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
|
|
bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
|
|
bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
|
|
line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
|
|
bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
|
|
bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
|
|
bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
|
|
line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
|
|
bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
|
|
bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
|
|
bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
|
|
bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
|
|
bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
|
|
line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
|
|
bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
|
|
bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
|
|
line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
|
|
bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
|
|
bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
|
|
tree.end
|
|
tree "CoreSight Identification Registers"
|
|
width 6.
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit (MPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller (NVIC)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
sif CORENAME()=="CORTEXM7F"
|
|
tree "Floating-point Unit (FPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 8.
|
|
group.long 0xF34++0x0B
|
|
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
|
|
newline
|
|
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
|
|
newline
|
|
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
|
|
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
|
|
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
|
|
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
|
|
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
|
|
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
|
|
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
|
|
newline
|
|
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
|
|
rgroup.long 0xF40++0x0B
|
|
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
|
|
bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
|
|
bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
|
|
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
|
|
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
|
|
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
|
|
newline
|
|
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
|
|
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..."
|
|
line.long 0x08 "MVFR2,Media and FP Feature Register 2"
|
|
bitfld.long 0x08 4.--7. " VFP_MISC ,Indicates the hardware support for FP miscellaneous features" "Not supported,,,,Supported,?..."
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
newline
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
newline
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
newline
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register, special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
newline
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported"
|
|
newline
|
|
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
newline
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count register"
|
|
line.long 0x08 "DWT_CPICNT,CPI Count register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x14 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
newline
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
line.long 0x04 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x30)++0x07
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
line.long 0x04 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x40)++0x07
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
line.long 0x04 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x50)++0x07
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
line.long 0x04 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
tree "ACC (Analog Comparator Controller)"
|
|
base ad:0x40044000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "MR,Mode Register"
|
|
bitfld.long 0x0 14. "FE,Fault Enable" "0: The FAULT output is tied to 0.,1: The FAULT output is driven by the signal defined.."
|
|
bitfld.long 0x0 13. "SELFS,Selection Of Fault Source" "0: The CE flag is used to drive the FAULT output.,1: The output of the analog comparator flag is used.."
|
|
newline
|
|
bitfld.long 0x0 12. "INV,Invert Comparator Output" "0: Analog comparator output is directly processed.,1: Analog comparator output is inverted prior to.."
|
|
bitfld.long 0x0 9.--10. "EDGETYP,Edge Type" "0: Only rising edge of comparator output,1: Falling edge of comparator output,2: Any edge of comparator output,?"
|
|
newline
|
|
bitfld.long 0x0 8. "ACEN,Analog Comparator Enable" "0: Analog comparator disabled.,1: Analog comparator enabled."
|
|
bitfld.long 0x0 4.--6. "SELPLUS,Selection For Plus Comparator Input" "0: Select AFE0_AD0,1: Select AFE0_AD1,2: Select AFE0_AD2,3: Select AFE0_AD3,4: Select AFE0_AD4,5: Select AFE0_AD5,6: Select AFE1_AD0,7: Select AFE1_AD1"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "SELMINUS,Selection for Minus Comparator Input" "0: Select TS,1: Select VREFP,2: Select DAC0,3: Select DAC1,4: Select AFE0_AD0,5: Select AFE0_AD1,6: Select AFE0_AD2,7: Select AFE0_AD3"
|
|
wgroup.long 0x24++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 0. "CE,Comparison Edge" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 0. "CE,Comparison Edge" "0,1"
|
|
rgroup.long 0x2C++0x7
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 0. "CE,Comparison Edge" "0,1"
|
|
line.long 0x4 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x4 31. "MASK,Flag Mask" "0,1"
|
|
bitfld.long 0x4 1. "SCO,Synchronized Comparator Output" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "CE,Comparison Edge (cleared on read)" "0,1"
|
|
group.long 0x94++0x3
|
|
line.long 0x0 "ACR,Analog Control Register"
|
|
bitfld.long 0x0 1.--2. "HYST,Hysteresis Selection" "0,1,2,3"
|
|
bitfld.long 0x0 0. "ISEL,Current Selection" "0: Low-power option.,1: High-speed option."
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
tree.end
|
|
tree "AES (Advanced Encryption Standard)"
|
|
base ad:0x4006C000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 8. "SWRST,Software Reset" "0,1"
|
|
bitfld.long 0x0 0. "START,Start Processing" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "MR,Mode Register"
|
|
hexmask.long.byte 0x0 20.--23. 1. "CKEY,Countermeasure Key"
|
|
bitfld.long 0x0 16.--18. "CFBS,Cipher Feedback Data Size" "0: 128-bit,1: 64-bit,2: 32-bit,3: 16-bit,4: 8-bit,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 15. "LOD,Last Output Data Mode" "0,1"
|
|
bitfld.long 0x0 12.--14. "OPMOD,Operating Mode" "0: ECB: Electronic Code Book mode,1: CBC: Cipher Block Chaining mode,2: OFB: Output Feedback mode,3: CFB: Cipher Feedback mode,4: CTR: Counter mode (16-bit internal counter),5: GCM: Galois/Counter mode,?,?"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "KEYSIZE,Key Size" "0: AES Key Size is 128 bits,1: AES Key Size is 192 bits,2: AES Key Size is 256 bits,?"
|
|
bitfld.long 0x0 8.--9. "SMOD,Start Mode" "0: Manual Mode,1: Auto Mode,2: AES_IDATAR0 access only Auto Mode (DMA),?"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "PROCDLY,Processing Delay"
|
|
bitfld.long 0x0 3. "DUALBUFF,Dual Input Buffer" "0: AES_IDATARx cannot be written during processing..,1: AES_IDATARx can be written during processing of.."
|
|
newline
|
|
bitfld.long 0x0 1. "GTAGEN,GCM Automatic Tag Generation Enable" "0,1"
|
|
bitfld.long 0x0 0. "CIPHER,Processing Mode" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 16. "TAGRDY,GCM Tag Ready Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 8. "URAD,Unspecified Register Access Detection Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DATRDY,Data Ready Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 16. "TAGRDY,GCM Tag Ready Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 8. "URAD,Unspecified Register Access Detection Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "DATRDY,Data Ready Interrupt Disable" "0,1"
|
|
rgroup.long 0x18++0x7
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 16. "TAGRDY,GCM Tag Ready Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 8. "URAD,Unspecified Register Access Detection Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DATRDY,Data Ready Interrupt Mask" "0,1"
|
|
line.long 0x4 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x4 16. "TAGRDY,GCM Tag Ready" "0,1"
|
|
hexmask.long.byte 0x4 12.--15. 1. "URAT,Unspecified Register Access (cleared by writing SWRST in AES_CR)"
|
|
newline
|
|
bitfld.long 0x4 8. "URAD,Unspecified Register Access Detection Status (cleared by writing SWRST in AES_CR)" "0,1"
|
|
bitfld.long 0x4 0. "DATRDY,Data Ready (cleared by setting bit START or bit SWRST in AES_CR or by reading AES_ODATARx)" "0,1"
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x20)++0x3
|
|
line.long 0x0 "KEYWR[$1],Key Word Register"
|
|
hexmask.long 0x0 0.--31. 1. "KEYW,Key Word"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x40)++0x3
|
|
line.long 0x0 "IDATAR[$1],Input Data Register"
|
|
hexmask.long 0x0 0.--31. 1. "IDATA,Input Data Word"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x50)++0x3
|
|
line.long 0x0 "ODATAR[$1],Output Data Register"
|
|
hexmask.long 0x0 0.--31. 1. "ODATA,Output Data"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x60)++0x3
|
|
line.long 0x0 "IVR[$1],Initialization Vector Register"
|
|
hexmask.long 0x0 0.--31. 1. "IV,Initialization Vector"
|
|
repeat.end
|
|
group.long 0x70++0x7
|
|
line.long 0x0 "AADLENR,Additional Authenticated Data Length Register"
|
|
hexmask.long 0x0 0.--31. 1. "AADLEN,Additional Authenticated Data Length"
|
|
line.long 0x4 "CLENR,Plaintext/Ciphertext Length Register"
|
|
hexmask.long 0x4 0.--31. 1. "CLEN,Plaintext/Ciphertext Length"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x78)++0x3
|
|
line.long 0x0 "GHASHR[$1],GCM Intermediate Hash Word Register"
|
|
hexmask.long 0x0 0.--31. 1. "GHASH,Intermediate GCM Hash Word x"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x88)++0x3
|
|
line.long 0x0 "TAGR[$1],GCM Authentication Tag Word Register"
|
|
hexmask.long 0x0 0.--31. 1. "TAG,GCM Authentication Tag x"
|
|
repeat.end
|
|
rgroup.long 0x98++0x3
|
|
line.long 0x0 "CTRR,GCM Encryption Counter Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "CTR,GCM Encryption Counter"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x9C)++0x3
|
|
line.long 0x0 "GCMHR[$1],GCM H Word Register"
|
|
hexmask.long 0x0 0.--31. 1. "H,GCM H Word x"
|
|
repeat.end
|
|
tree.end
|
|
tree "AFEC (Analog Front-End Controllers)"
|
|
base ad:0x0
|
|
tree "AFEC0"
|
|
base ad:0x4003C000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,AFEC Control Register"
|
|
bitfld.long 0x0 1. "START,Start Conversion" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.long 0x4++0xF
|
|
line.long 0x0 "MR,AFEC Mode Register"
|
|
bitfld.long 0x0 31. "USEQ,User Sequence Enable" "0: Normal mode: The controller converts channels in..,1: User Sequence mode: The sequence respects what.."
|
|
bitfld.long 0x0 28.--29. "TRANSFER,Transfer Period" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x0 24.--27. 1. "TRACKTIM,Tracking Time"
|
|
bitfld.long 0x0 23. "ONE,One" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "STARTUP,Start-up Time"
|
|
hexmask.long.byte 0x0 8.--15. 1. "PRESCAL,Prescaler Rate Selection"
|
|
newline
|
|
bitfld.long 0x0 7. "FREERUN,Free Run Mode" "0: Normal mode,1: Free Run mode: Never wait for any trigger."
|
|
bitfld.long 0x0 6. "FWUP,Fast Wake-up" "0: Normal Sleep mode: The sleep mode is defined by..,1: Fast wake-up Sleep mode: The voltage reference.."
|
|
newline
|
|
bitfld.long 0x0 5. "SLEEP,Sleep Mode" "0: Normal mode: The AFE and reference voltage..,1: Sleep mode: The AFE and reference voltage.."
|
|
bitfld.long 0x0 1.--3. "TRGSEL,Trigger Selection" "0: AFE0_ADTRG for AFEC0 / AFE1_ADTRG for AFEC1,1: TIOA Output of the Timer Counter Channel 0 for..,2: TIOA Output of the Timer Counter Channel 1 for..,3: TIOA Output of the Timer Counter Channel 2 for..,4: PWM0 event line 0 for AFEC0 / PWM1 event line 0..,5: PWM0 event line 1 for AFEC0 / PWM1 event line 1..,6: Analog Comparator,?"
|
|
newline
|
|
bitfld.long 0x0 0. "TRGEN,Trigger Enable" "0: Hardware triggers are disabled. Starting a..,1: Hardware trigger selected by TRGSEL field is.."
|
|
line.long 0x4 "EMR,AFEC Extended Mode Register"
|
|
bitfld.long 0x4 28.--29. "SIGNMODE,Sign Mode" "0: Single-Ended channels: Unsigned..,1: Single-Ended channels: Signed..,2: All channels: Unsigned conversions.,3: All channels: Signed conversions."
|
|
bitfld.long 0x4 25. "STM,Single Trigger Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "TAG,TAG of the AFEC_LDCR" "0,1"
|
|
bitfld.long 0x4 16.--18. "RES,Resolution" "0: 12-bit resolution AFE sample rate is maximum (no..,?,2: 13-bit resolution AFE sample rate divided by 4..,3: 14-bit resolution AFE sample rate divided by 16..,4: 15-bit resolution AFE sample rate divided by 64..,5: 16-bit resolution AFE sample rate divided by 256..,?,?"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CMPFILTER,Compare Event Filtering" "0,1,2,3"
|
|
bitfld.long 0x4 9. "CMPALL,Compare All Channels" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4 3.--7. 1. "CMPSEL,Comparison Selected Channel"
|
|
bitfld.long 0x4 0.--1. "CMPMODE,Comparison Mode" "0: Generates an event when the converted data is..,1: Generates an event when the converted data is..,2: Generates an event when the converted data is in..,3: Generates an event when the converted data is.."
|
|
line.long 0x8 "SEQ1R,AFEC Channel Sequence 1 Register"
|
|
hexmask.long.byte 0x8 28.--31. 1. "USCH7,User Sequence Number 7"
|
|
hexmask.long.byte 0x8 24.--27. 1. "USCH6,User Sequence Number 6"
|
|
newline
|
|
hexmask.long.byte 0x8 20.--23. 1. "USCH5,User Sequence Number 5"
|
|
hexmask.long.byte 0x8 16.--19. 1. "USCH4,User Sequence Number 4"
|
|
newline
|
|
hexmask.long.byte 0x8 12.--15. 1. "USCH3,User Sequence Number 3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "USCH2,User Sequence Number 2"
|
|
newline
|
|
hexmask.long.byte 0x8 4.--7. 1. "USCH1,User Sequence Number 1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "USCH0,User Sequence Number 0"
|
|
line.long 0xC "SEQ2R,AFEC Channel Sequence 2 Register"
|
|
hexmask.long.byte 0xC 12.--15. 1. "USCH11,User Sequence Number 11"
|
|
hexmask.long.byte 0xC 8.--11. 1. "USCH10,User Sequence Number 10"
|
|
newline
|
|
hexmask.long.byte 0xC 4.--7. 1. "USCH9,User Sequence Number 9"
|
|
hexmask.long.byte 0xC 0.--3. 1. "USCH8,User Sequence Number 8"
|
|
wgroup.long 0x14++0x7
|
|
line.long 0x0 "CHER,AFEC Channel Enable Register"
|
|
bitfld.long 0x0 11. "CH11,Channel 11 Enable" "0,1"
|
|
bitfld.long 0x0 10. "CH10,Channel 10 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CH9,Channel 9 Enable" "0,1"
|
|
bitfld.long 0x0 8. "CH8,Channel 8 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "CH7,Channel 7 Enable" "0,1"
|
|
bitfld.long 0x0 6. "CH6,Channel 6 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CH5,Channel 5 Enable" "0,1"
|
|
bitfld.long 0x0 4. "CH4,Channel 4 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CH3,Channel 3 Enable" "0,1"
|
|
bitfld.long 0x0 2. "CH2,Channel 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CH1,Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 0. "CH0,Channel 0 Enable" "0,1"
|
|
line.long 0x4 "CHDR,AFEC Channel Disable Register"
|
|
bitfld.long 0x4 11. "CH11,Channel 11 Disable" "0,1"
|
|
bitfld.long 0x4 10. "CH10,Channel 10 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "CH9,Channel 9 Disable" "0,1"
|
|
bitfld.long 0x4 8. "CH8,Channel 8 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "CH7,Channel 7 Disable" "0,1"
|
|
bitfld.long 0x4 6. "CH6,Channel 6 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CH5,Channel 5 Disable" "0,1"
|
|
bitfld.long 0x4 4. "CH4,Channel 4 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CH3,Channel 3 Disable" "0,1"
|
|
bitfld.long 0x4 2. "CH2,Channel 2 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CH1,Channel 1 Disable" "0,1"
|
|
bitfld.long 0x4 0. "CH0,Channel 0 Disable" "0,1"
|
|
rgroup.long 0x1C++0x7
|
|
line.long 0x0 "CHSR,AFEC Channel Status Register"
|
|
bitfld.long 0x0 11. "CH11,Channel 11 Status" "0,1"
|
|
bitfld.long 0x0 10. "CH10,Channel 10 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CH9,Channel 9 Status" "0,1"
|
|
bitfld.long 0x0 8. "CH8,Channel 8 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "CH7,Channel 7 Status" "0,1"
|
|
bitfld.long 0x0 6. "CH6,Channel 6 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CH5,Channel 5 Status" "0,1"
|
|
bitfld.long 0x0 4. "CH4,Channel 4 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CH3,Channel 3 Status" "0,1"
|
|
bitfld.long 0x0 2. "CH2,Channel 2 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CH1,Channel 1 Status" "0,1"
|
|
bitfld.long 0x0 0. "CH0,Channel 0 Status" "0,1"
|
|
line.long 0x4 "LCDR,AFEC Last Converted Data Register"
|
|
hexmask.long.byte 0x4 24.--27. 1. "CHNB,Channel Number"
|
|
hexmask.long.word 0x4 0.--15. 1. "LDATA,Last Data Converted"
|
|
wgroup.long 0x24++0x7
|
|
line.long 0x0 "IER,AFEC Interrupt Enable Register"
|
|
bitfld.long 0x0 30. "TEMPCHG,Temperature Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 26. "COMPE,Comparison Event Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "GOVRE,General Overrun Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 24. "DRDY,Data Ready Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "EOC11,End of Conversion Interrupt Enable 11" "0,1"
|
|
bitfld.long 0x0 10. "EOC10,End of Conversion Interrupt Enable 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "EOC9,End of Conversion Interrupt Enable 9" "0,1"
|
|
bitfld.long 0x0 8. "EOC8,End of Conversion Interrupt Enable 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "EOC7,End of Conversion Interrupt Enable 7" "0,1"
|
|
bitfld.long 0x0 6. "EOC6,End of Conversion Interrupt Enable 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "EOC5,End of Conversion Interrupt Enable 5" "0,1"
|
|
bitfld.long 0x0 4. "EOC4,End of Conversion Interrupt Enable 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EOC3,End of Conversion Interrupt Enable 3" "0,1"
|
|
bitfld.long 0x0 2. "EOC2,End of Conversion Interrupt Enable 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "EOC1,End of Conversion Interrupt Enable 1" "0,1"
|
|
bitfld.long 0x0 0. "EOC0,End of Conversion Interrupt Enable 0" "0,1"
|
|
line.long 0x4 "IDR,AFEC Interrupt Disable Register"
|
|
bitfld.long 0x4 30. "TEMPCHG,Temperature Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 26. "COMPE,Comparison Event Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "GOVRE,General Overrun Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 24. "DRDY,Data Ready Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "EOC11,End of Conversion Interrupt Disable 11" "0,1"
|
|
bitfld.long 0x4 10. "EOC10,End of Conversion Interrupt Disable 10" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "EOC9,End of Conversion Interrupt Disable 9" "0,1"
|
|
bitfld.long 0x4 8. "EOC8,End of Conversion Interrupt Disable 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "EOC7,End of Conversion Interrupt Disable 7" "0,1"
|
|
bitfld.long 0x4 6. "EOC6,End of Conversion Interrupt Disable 6" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "EOC5,End of Conversion Interrupt Disable 5" "0,1"
|
|
bitfld.long 0x4 4. "EOC4,End of Conversion Interrupt Disable 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "EOC3,End of Conversion Interrupt Disable 3" "0,1"
|
|
bitfld.long 0x4 2. "EOC2,End of Conversion Interrupt Disable 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "EOC1,End of Conversion Interrupt Disable 1" "0,1"
|
|
bitfld.long 0x4 0. "EOC0,End of Conversion Interrupt Disable 0" "0,1"
|
|
rgroup.long 0x2C++0x7
|
|
line.long 0x0 "IMR,AFEC Interrupt Mask Register"
|
|
bitfld.long 0x0 30. "TEMPCHG,Temperature Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 26. "COMPE,Comparison Event Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "GOVRE,General Overrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 24. "DRDY,Data Ready Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "EOC11,End of Conversion Interrupt Mask 11" "0,1"
|
|
bitfld.long 0x0 10. "EOC10,End of Conversion Interrupt Mask 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "EOC9,End of Conversion Interrupt Mask 9" "0,1"
|
|
bitfld.long 0x0 8. "EOC8,End of Conversion Interrupt Mask 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "EOC7,End of Conversion Interrupt Mask 7" "0,1"
|
|
bitfld.long 0x0 6. "EOC6,End of Conversion Interrupt Mask 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "EOC5,End of Conversion Interrupt Mask 5" "0,1"
|
|
bitfld.long 0x0 4. "EOC4,End of Conversion Interrupt Mask 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EOC3,End of Conversion Interrupt Mask 3" "0,1"
|
|
bitfld.long 0x0 2. "EOC2,End of Conversion Interrupt Mask 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "EOC1,End of Conversion Interrupt Mask 1" "0,1"
|
|
bitfld.long 0x0 0. "EOC0,End of Conversion Interrupt Mask 0" "0,1"
|
|
line.long 0x4 "ISR,AFEC Interrupt Status Register"
|
|
bitfld.long 0x4 30. "TEMPCHG,Temperature Change (cleared on read)" "0,1"
|
|
bitfld.long 0x4 26. "COMPE,Comparison Error (cleared by reading AFEC_ISR)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "GOVRE,General Overrun Error (cleared by reading AFEC_ISR)" "0,1"
|
|
bitfld.long 0x4 24. "DRDY,Data Ready (cleared by reading AFEC_LCDR)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "EOC11,End of Conversion 11 (cleared by reading AFEC_CDRx)" "0,1"
|
|
bitfld.long 0x4 10. "EOC10,End of Conversion 10 (cleared by reading AFEC_CDRx)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "EOC9,End of Conversion 9 (cleared by reading AFEC_CDRx)" "0,1"
|
|
bitfld.long 0x4 8. "EOC8,End of Conversion 8 (cleared by reading AFEC_CDRx)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "EOC7,End of Conversion 7 (cleared by reading AFEC_CDRx)" "0,1"
|
|
bitfld.long 0x4 6. "EOC6,End of Conversion 6 (cleared by reading AFEC_CDRx)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "EOC5,End of Conversion 5 (cleared by reading AFEC_CDRx)" "0,1"
|
|
bitfld.long 0x4 4. "EOC4,End of Conversion 4 (cleared by reading AFEC_CDRx)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "EOC3,End of Conversion 3 (cleared by reading AFEC_CDRx)" "0,1"
|
|
bitfld.long 0x4 2. "EOC2,End of Conversion 2 (cleared by reading AFEC_CDRx)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "EOC1,End of Conversion 1 (cleared by reading AFEC_CDRx)" "0,1"
|
|
bitfld.long 0x4 0. "EOC0,End of Conversion 0 (cleared by reading AFEC_CDRx)" "0,1"
|
|
rgroup.long 0x4C++0x3
|
|
line.long 0x0 "OVER,AFEC Overrun Status Register"
|
|
bitfld.long 0x0 11. "OVRE11,Overrun Error 11" "0,1"
|
|
bitfld.long 0x0 10. "OVRE10,Overrun Error 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "OVRE9,Overrun Error 9" "0,1"
|
|
bitfld.long 0x0 8. "OVRE8,Overrun Error 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "OVRE7,Overrun Error 7" "0,1"
|
|
bitfld.long 0x0 6. "OVRE6,Overrun Error 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE5,Overrun Error 5" "0,1"
|
|
bitfld.long 0x0 4. "OVRE4,Overrun Error 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "OVRE3,Overrun Error 3" "0,1"
|
|
bitfld.long 0x0 2. "OVRE2,Overrun Error 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "OVRE1,Overrun Error 1" "0,1"
|
|
bitfld.long 0x0 0. "OVRE0,Overrun Error 0" "0,1"
|
|
group.long 0x50++0x7
|
|
line.long 0x0 "CWR,AFEC Compare Window Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "HIGHTHRES,High Threshold"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOWTHRES,Low Threshold"
|
|
line.long 0x4 "CGR,AFEC Channel Gain Register"
|
|
bitfld.long 0x4 22.--23. "GAIN11,Gain for Channel 11" "0,1,2,3"
|
|
bitfld.long 0x4 20.--21. "GAIN10,Gain for Channel 10" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "GAIN9,Gain for Channel 9" "0,1,2,3"
|
|
bitfld.long 0x4 16.--17. "GAIN8,Gain for Channel 8" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 14.--15. "GAIN7,Gain for Channel 7" "0,1,2,3"
|
|
bitfld.long 0x4 12.--13. "GAIN6,Gain for Channel 6" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 10.--11. "GAIN5,Gain for Channel 5" "0,1,2,3"
|
|
bitfld.long 0x4 8.--9. "GAIN4,Gain for Channel 4" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 6.--7. "GAIN3,Gain for Channel 3" "0,1,2,3"
|
|
bitfld.long 0x4 4.--5. "GAIN2,Gain for Channel 2" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 2.--3. "GAIN1,Gain for Channel 1" "0,1,2,3"
|
|
bitfld.long 0x4 0.--1. "GAIN0,Gain for Channel 0" "0,1,2,3"
|
|
group.long 0x60++0x7
|
|
line.long 0x0 "DIFFR,AFEC Channel Differential Register"
|
|
bitfld.long 0x0 11. "DIFF11,Differential inputs for channel 11" "0,1"
|
|
bitfld.long 0x0 10. "DIFF10,Differential inputs for channel 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "DIFF9,Differential inputs for channel 9" "0,1"
|
|
bitfld.long 0x0 8. "DIFF8,Differential inputs for channel 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "DIFF7,Differential inputs for channel 7" "0,1"
|
|
bitfld.long 0x0 6. "DIFF6,Differential inputs for channel 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "DIFF5,Differential inputs for channel 5" "0,1"
|
|
bitfld.long 0x0 4. "DIFF4,Differential inputs for channel 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "DIFF3,Differential inputs for channel 3" "0,1"
|
|
bitfld.long 0x0 2. "DIFF2,Differential inputs for channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "DIFF1,Differential inputs for channel 1" "0,1"
|
|
bitfld.long 0x0 0. "DIFF0,Differential inputs for channel 0" "0,1"
|
|
line.long 0x4 "CSELR,AFEC Channel Selection Register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "CSEL,Channel Selection"
|
|
rgroup.long 0x68++0x3
|
|
line.long 0x0 "CDR,AFEC Channel Data Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "DATA,Converted Data"
|
|
group.long 0x6C++0xB
|
|
line.long 0x0 "COCR,AFEC Channel Offset Compensation Register"
|
|
hexmask.long.word 0x0 0.--9. 1. "AOFF,Analog Offset"
|
|
line.long 0x4 "TEMPMR,AFEC Temperature Sensor Mode Register"
|
|
bitfld.long 0x4 4.--5. "TEMPCMPMOD,Temperature Comparison Mode" "0: Generates an event when the converted data is..,1: Generates an event when the converted data is..,2: Generates an event when the converted data is in..,3: Generates an event when the converted data is.."
|
|
bitfld.long 0x4 0. "RTCT,Temperature Sensor RTC Trigger Mode" "0,1"
|
|
line.long 0x8 "TEMPCWR,AFEC Temperature Compare Window Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "THIGHTHRES,Temperature High Threshold"
|
|
hexmask.long.word 0x8 0.--15. 1. "TLOWTHRES,Temperature Low Threshold"
|
|
group.long 0x94++0x3
|
|
line.long 0x0 "ACR,AFEC Analog Control Register"
|
|
bitfld.long 0x0 8.--9. "IBCTL,AFE Bias Current Control" "0,1,2,3"
|
|
bitfld.long 0x0 3. "PGA1EN,PGA1 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "PGA0EN,PGA0 Enable" "0,1"
|
|
group.long 0xA0++0x3
|
|
line.long 0x0 "SHMR,AFEC Sample & Hold Mode Register"
|
|
bitfld.long 0x0 11. "DUAL11,Dual Sample & Hold for channel 11" "0,1"
|
|
bitfld.long 0x0 10. "DUAL10,Dual Sample & Hold for channel 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "DUAL9,Dual Sample & Hold for channel 9" "0,1"
|
|
bitfld.long 0x0 8. "DUAL8,Dual Sample & Hold for channel 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "DUAL7,Dual Sample & Hold for channel 7" "0,1"
|
|
bitfld.long 0x0 6. "DUAL6,Dual Sample & Hold for channel 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "DUAL5,Dual Sample & Hold for channel 5" "0,1"
|
|
bitfld.long 0x0 4. "DUAL4,Dual Sample & Hold for channel 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "DUAL3,Dual Sample & Hold for channel 3" "0,1"
|
|
bitfld.long 0x0 2. "DUAL2,Dual Sample & Hold for channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "DUAL1,Dual Sample & Hold for channel 1" "0,1"
|
|
bitfld.long 0x0 0. "DUAL0,Dual Sample & Hold for channel 0" "0,1"
|
|
group.long 0xD0++0xB
|
|
line.long 0x0 "COSR,AFEC Correction Select Register"
|
|
bitfld.long 0x0 0. "CSEL,Sample & Hold unit Correction Select" "0,1"
|
|
line.long 0x4 "CVR,AFEC Correction Values Register"
|
|
hexmask.long.word 0x4 16.--31. 1. "GAINCORR,Gain Correction"
|
|
hexmask.long.word 0x4 0.--15. 1. "OFFSETCORR,Offset Correction"
|
|
line.long 0x8 "CECR,AFEC Channel Error Correction Register"
|
|
bitfld.long 0x8 11. "ECORR11,Error Correction Enable for channel 11" "0,1"
|
|
bitfld.long 0x8 10. "ECORR10,Error Correction Enable for channel 10" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "ECORR9,Error Correction Enable for channel 9" "0,1"
|
|
bitfld.long 0x8 8. "ECORR8,Error Correction Enable for channel 8" "0,1"
|
|
newline
|
|
bitfld.long 0x8 7. "ECORR7,Error Correction Enable for channel 7" "0,1"
|
|
bitfld.long 0x8 6. "ECORR6,Error Correction Enable for channel 6" "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "ECORR5,Error Correction Enable for channel 5" "0,1"
|
|
bitfld.long 0x8 4. "ECORR4,Error Correction Enable for channel 4" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "ECORR3,Error Correction Enable for channel 3" "0,1"
|
|
bitfld.long 0x8 2. "ECORR2,Error Correction Enable for channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "ECORR1,Error Correction Enable for channel 1" "0,1"
|
|
bitfld.long 0x8 0. "ECORR0,Error Correction Enable for channel 0" "0,1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,AFEC Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protect KEY"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,AFEC Write Protection Status Register"
|
|
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protect Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protect Violation Status" "0,1"
|
|
tree.end
|
|
tree "AFEC1"
|
|
base ad:0x40064000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,AFEC Control Register"
|
|
bitfld.long 0x0 1. "START,Start Conversion" "0,1"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.long 0x4++0xF
|
|
line.long 0x0 "MR,AFEC Mode Register"
|
|
bitfld.long 0x0 31. "USEQ,User Sequence Enable" "0: Normal mode: The controller converts channels in..,1: User Sequence mode: The sequence respects what.."
|
|
bitfld.long 0x0 28.--29. "TRANSFER,Transfer Period" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x0 24.--27. 1. "TRACKTIM,Tracking Time"
|
|
bitfld.long 0x0 23. "ONE,One" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "STARTUP,Start-up Time"
|
|
hexmask.long.byte 0x0 8.--15. 1. "PRESCAL,Prescaler Rate Selection"
|
|
newline
|
|
bitfld.long 0x0 7. "FREERUN,Free Run Mode" "0: Normal mode,1: Free Run mode: Never wait for any trigger."
|
|
bitfld.long 0x0 6. "FWUP,Fast Wake-up" "0: Normal Sleep mode: The sleep mode is defined by..,1: Fast wake-up Sleep mode: The voltage reference.."
|
|
newline
|
|
bitfld.long 0x0 5. "SLEEP,Sleep Mode" "0: Normal mode: The AFE and reference voltage..,1: Sleep mode: The AFE and reference voltage.."
|
|
bitfld.long 0x0 1.--3. "TRGSEL,Trigger Selection" "0: AFE0_ADTRG for AFEC0 / AFE1_ADTRG for AFEC1,1: TIOA Output of the Timer Counter Channel 0 for..,2: TIOA Output of the Timer Counter Channel 1 for..,3: TIOA Output of the Timer Counter Channel 2 for..,4: PWM0 event line 0 for AFEC0 / PWM1 event line 0..,5: PWM0 event line 1 for AFEC0 / PWM1 event line 1..,6: Analog Comparator,?"
|
|
newline
|
|
bitfld.long 0x0 0. "TRGEN,Trigger Enable" "0: Hardware triggers are disabled. Starting a..,1: Hardware trigger selected by TRGSEL field is.."
|
|
line.long 0x4 "EMR,AFEC Extended Mode Register"
|
|
bitfld.long 0x4 28.--29. "SIGNMODE,Sign Mode" "0: Single-Ended channels: Unsigned..,1: Single-Ended channels: Signed..,2: All channels: Unsigned conversions.,3: All channels: Signed conversions."
|
|
bitfld.long 0x4 25. "STM,Single Trigger Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "TAG,TAG of the AFEC_LDCR" "0,1"
|
|
bitfld.long 0x4 16.--18. "RES,Resolution" "0: 12-bit resolution AFE sample rate is maximum (no..,?,2: 13-bit resolution AFE sample rate divided by 4..,3: 14-bit resolution AFE sample rate divided by 16..,4: 15-bit resolution AFE sample rate divided by 64..,5: 16-bit resolution AFE sample rate divided by 256..,?,?"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CMPFILTER,Compare Event Filtering" "0,1,2,3"
|
|
bitfld.long 0x4 9. "CMPALL,Compare All Channels" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4 3.--7. 1. "CMPSEL,Comparison Selected Channel"
|
|
bitfld.long 0x4 0.--1. "CMPMODE,Comparison Mode" "0: Generates an event when the converted data is..,1: Generates an event when the converted data is..,2: Generates an event when the converted data is in..,3: Generates an event when the converted data is.."
|
|
line.long 0x8 "SEQ1R,AFEC Channel Sequence 1 Register"
|
|
hexmask.long.byte 0x8 28.--31. 1. "USCH7,User Sequence Number 7"
|
|
hexmask.long.byte 0x8 24.--27. 1. "USCH6,User Sequence Number 6"
|
|
newline
|
|
hexmask.long.byte 0x8 20.--23. 1. "USCH5,User Sequence Number 5"
|
|
hexmask.long.byte 0x8 16.--19. 1. "USCH4,User Sequence Number 4"
|
|
newline
|
|
hexmask.long.byte 0x8 12.--15. 1. "USCH3,User Sequence Number 3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "USCH2,User Sequence Number 2"
|
|
newline
|
|
hexmask.long.byte 0x8 4.--7. 1. "USCH1,User Sequence Number 1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "USCH0,User Sequence Number 0"
|
|
line.long 0xC "SEQ2R,AFEC Channel Sequence 2 Register"
|
|
hexmask.long.byte 0xC 12.--15. 1. "USCH11,User Sequence Number 11"
|
|
hexmask.long.byte 0xC 8.--11. 1. "USCH10,User Sequence Number 10"
|
|
newline
|
|
hexmask.long.byte 0xC 4.--7. 1. "USCH9,User Sequence Number 9"
|
|
hexmask.long.byte 0xC 0.--3. 1. "USCH8,User Sequence Number 8"
|
|
wgroup.long 0x14++0x7
|
|
line.long 0x0 "CHER,AFEC Channel Enable Register"
|
|
bitfld.long 0x0 11. "CH11,Channel 11 Enable" "0,1"
|
|
bitfld.long 0x0 10. "CH10,Channel 10 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CH9,Channel 9 Enable" "0,1"
|
|
bitfld.long 0x0 8. "CH8,Channel 8 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "CH7,Channel 7 Enable" "0,1"
|
|
bitfld.long 0x0 6. "CH6,Channel 6 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CH5,Channel 5 Enable" "0,1"
|
|
bitfld.long 0x0 4. "CH4,Channel 4 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CH3,Channel 3 Enable" "0,1"
|
|
bitfld.long 0x0 2. "CH2,Channel 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CH1,Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 0. "CH0,Channel 0 Enable" "0,1"
|
|
line.long 0x4 "CHDR,AFEC Channel Disable Register"
|
|
bitfld.long 0x4 11. "CH11,Channel 11 Disable" "0,1"
|
|
bitfld.long 0x4 10. "CH10,Channel 10 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "CH9,Channel 9 Disable" "0,1"
|
|
bitfld.long 0x4 8. "CH8,Channel 8 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "CH7,Channel 7 Disable" "0,1"
|
|
bitfld.long 0x4 6. "CH6,Channel 6 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CH5,Channel 5 Disable" "0,1"
|
|
bitfld.long 0x4 4. "CH4,Channel 4 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CH3,Channel 3 Disable" "0,1"
|
|
bitfld.long 0x4 2. "CH2,Channel 2 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CH1,Channel 1 Disable" "0,1"
|
|
bitfld.long 0x4 0. "CH0,Channel 0 Disable" "0,1"
|
|
rgroup.long 0x1C++0x7
|
|
line.long 0x0 "CHSR,AFEC Channel Status Register"
|
|
bitfld.long 0x0 11. "CH11,Channel 11 Status" "0,1"
|
|
bitfld.long 0x0 10. "CH10,Channel 10 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CH9,Channel 9 Status" "0,1"
|
|
bitfld.long 0x0 8. "CH8,Channel 8 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "CH7,Channel 7 Status" "0,1"
|
|
bitfld.long 0x0 6. "CH6,Channel 6 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CH5,Channel 5 Status" "0,1"
|
|
bitfld.long 0x0 4. "CH4,Channel 4 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CH3,Channel 3 Status" "0,1"
|
|
bitfld.long 0x0 2. "CH2,Channel 2 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CH1,Channel 1 Status" "0,1"
|
|
bitfld.long 0x0 0. "CH0,Channel 0 Status" "0,1"
|
|
line.long 0x4 "LCDR,AFEC Last Converted Data Register"
|
|
hexmask.long.byte 0x4 24.--27. 1. "CHNB,Channel Number"
|
|
hexmask.long.word 0x4 0.--15. 1. "LDATA,Last Data Converted"
|
|
wgroup.long 0x24++0x7
|
|
line.long 0x0 "IER,AFEC Interrupt Enable Register"
|
|
bitfld.long 0x0 30. "TEMPCHG,Temperature Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 26. "COMPE,Comparison Event Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "GOVRE,General Overrun Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 24. "DRDY,Data Ready Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "EOC11,End of Conversion Interrupt Enable 11" "0,1"
|
|
bitfld.long 0x0 10. "EOC10,End of Conversion Interrupt Enable 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "EOC9,End of Conversion Interrupt Enable 9" "0,1"
|
|
bitfld.long 0x0 8. "EOC8,End of Conversion Interrupt Enable 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "EOC7,End of Conversion Interrupt Enable 7" "0,1"
|
|
bitfld.long 0x0 6. "EOC6,End of Conversion Interrupt Enable 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "EOC5,End of Conversion Interrupt Enable 5" "0,1"
|
|
bitfld.long 0x0 4. "EOC4,End of Conversion Interrupt Enable 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EOC3,End of Conversion Interrupt Enable 3" "0,1"
|
|
bitfld.long 0x0 2. "EOC2,End of Conversion Interrupt Enable 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "EOC1,End of Conversion Interrupt Enable 1" "0,1"
|
|
bitfld.long 0x0 0. "EOC0,End of Conversion Interrupt Enable 0" "0,1"
|
|
line.long 0x4 "IDR,AFEC Interrupt Disable Register"
|
|
bitfld.long 0x4 30. "TEMPCHG,Temperature Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 26. "COMPE,Comparison Event Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "GOVRE,General Overrun Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 24. "DRDY,Data Ready Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "EOC11,End of Conversion Interrupt Disable 11" "0,1"
|
|
bitfld.long 0x4 10. "EOC10,End of Conversion Interrupt Disable 10" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "EOC9,End of Conversion Interrupt Disable 9" "0,1"
|
|
bitfld.long 0x4 8. "EOC8,End of Conversion Interrupt Disable 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "EOC7,End of Conversion Interrupt Disable 7" "0,1"
|
|
bitfld.long 0x4 6. "EOC6,End of Conversion Interrupt Disable 6" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "EOC5,End of Conversion Interrupt Disable 5" "0,1"
|
|
bitfld.long 0x4 4. "EOC4,End of Conversion Interrupt Disable 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "EOC3,End of Conversion Interrupt Disable 3" "0,1"
|
|
bitfld.long 0x4 2. "EOC2,End of Conversion Interrupt Disable 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "EOC1,End of Conversion Interrupt Disable 1" "0,1"
|
|
bitfld.long 0x4 0. "EOC0,End of Conversion Interrupt Disable 0" "0,1"
|
|
rgroup.long 0x2C++0x7
|
|
line.long 0x0 "IMR,AFEC Interrupt Mask Register"
|
|
bitfld.long 0x0 30. "TEMPCHG,Temperature Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 26. "COMPE,Comparison Event Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "GOVRE,General Overrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 24. "DRDY,Data Ready Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "EOC11,End of Conversion Interrupt Mask 11" "0,1"
|
|
bitfld.long 0x0 10. "EOC10,End of Conversion Interrupt Mask 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "EOC9,End of Conversion Interrupt Mask 9" "0,1"
|
|
bitfld.long 0x0 8. "EOC8,End of Conversion Interrupt Mask 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "EOC7,End of Conversion Interrupt Mask 7" "0,1"
|
|
bitfld.long 0x0 6. "EOC6,End of Conversion Interrupt Mask 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "EOC5,End of Conversion Interrupt Mask 5" "0,1"
|
|
bitfld.long 0x0 4. "EOC4,End of Conversion Interrupt Mask 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EOC3,End of Conversion Interrupt Mask 3" "0,1"
|
|
bitfld.long 0x0 2. "EOC2,End of Conversion Interrupt Mask 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "EOC1,End of Conversion Interrupt Mask 1" "0,1"
|
|
bitfld.long 0x0 0. "EOC0,End of Conversion Interrupt Mask 0" "0,1"
|
|
line.long 0x4 "ISR,AFEC Interrupt Status Register"
|
|
bitfld.long 0x4 30. "TEMPCHG,Temperature Change (cleared on read)" "0,1"
|
|
bitfld.long 0x4 26. "COMPE,Comparison Error (cleared by reading AFEC_ISR)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "GOVRE,General Overrun Error (cleared by reading AFEC_ISR)" "0,1"
|
|
bitfld.long 0x4 24. "DRDY,Data Ready (cleared by reading AFEC_LCDR)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "EOC11,End of Conversion 11 (cleared by reading AFEC_CDRx)" "0,1"
|
|
bitfld.long 0x4 10. "EOC10,End of Conversion 10 (cleared by reading AFEC_CDRx)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "EOC9,End of Conversion 9 (cleared by reading AFEC_CDRx)" "0,1"
|
|
bitfld.long 0x4 8. "EOC8,End of Conversion 8 (cleared by reading AFEC_CDRx)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "EOC7,End of Conversion 7 (cleared by reading AFEC_CDRx)" "0,1"
|
|
bitfld.long 0x4 6. "EOC6,End of Conversion 6 (cleared by reading AFEC_CDRx)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "EOC5,End of Conversion 5 (cleared by reading AFEC_CDRx)" "0,1"
|
|
bitfld.long 0x4 4. "EOC4,End of Conversion 4 (cleared by reading AFEC_CDRx)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "EOC3,End of Conversion 3 (cleared by reading AFEC_CDRx)" "0,1"
|
|
bitfld.long 0x4 2. "EOC2,End of Conversion 2 (cleared by reading AFEC_CDRx)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "EOC1,End of Conversion 1 (cleared by reading AFEC_CDRx)" "0,1"
|
|
bitfld.long 0x4 0. "EOC0,End of Conversion 0 (cleared by reading AFEC_CDRx)" "0,1"
|
|
rgroup.long 0x4C++0x3
|
|
line.long 0x0 "OVER,AFEC Overrun Status Register"
|
|
bitfld.long 0x0 11. "OVRE11,Overrun Error 11" "0,1"
|
|
bitfld.long 0x0 10. "OVRE10,Overrun Error 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "OVRE9,Overrun Error 9" "0,1"
|
|
bitfld.long 0x0 8. "OVRE8,Overrun Error 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "OVRE7,Overrun Error 7" "0,1"
|
|
bitfld.long 0x0 6. "OVRE6,Overrun Error 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE5,Overrun Error 5" "0,1"
|
|
bitfld.long 0x0 4. "OVRE4,Overrun Error 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "OVRE3,Overrun Error 3" "0,1"
|
|
bitfld.long 0x0 2. "OVRE2,Overrun Error 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "OVRE1,Overrun Error 1" "0,1"
|
|
bitfld.long 0x0 0. "OVRE0,Overrun Error 0" "0,1"
|
|
group.long 0x50++0x7
|
|
line.long 0x0 "CWR,AFEC Compare Window Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "HIGHTHRES,High Threshold"
|
|
hexmask.long.word 0x0 0.--15. 1. "LOWTHRES,Low Threshold"
|
|
line.long 0x4 "CGR,AFEC Channel Gain Register"
|
|
bitfld.long 0x4 22.--23. "GAIN11,Gain for Channel 11" "0,1,2,3"
|
|
bitfld.long 0x4 20.--21. "GAIN10,Gain for Channel 10" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "GAIN9,Gain for Channel 9" "0,1,2,3"
|
|
bitfld.long 0x4 16.--17. "GAIN8,Gain for Channel 8" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 14.--15. "GAIN7,Gain for Channel 7" "0,1,2,3"
|
|
bitfld.long 0x4 12.--13. "GAIN6,Gain for Channel 6" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 10.--11. "GAIN5,Gain for Channel 5" "0,1,2,3"
|
|
bitfld.long 0x4 8.--9. "GAIN4,Gain for Channel 4" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 6.--7. "GAIN3,Gain for Channel 3" "0,1,2,3"
|
|
bitfld.long 0x4 4.--5. "GAIN2,Gain for Channel 2" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 2.--3. "GAIN1,Gain for Channel 1" "0,1,2,3"
|
|
bitfld.long 0x4 0.--1. "GAIN0,Gain for Channel 0" "0,1,2,3"
|
|
group.long 0x60++0x7
|
|
line.long 0x0 "DIFFR,AFEC Channel Differential Register"
|
|
bitfld.long 0x0 11. "DIFF11,Differential inputs for channel 11" "0,1"
|
|
bitfld.long 0x0 10. "DIFF10,Differential inputs for channel 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "DIFF9,Differential inputs for channel 9" "0,1"
|
|
bitfld.long 0x0 8. "DIFF8,Differential inputs for channel 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "DIFF7,Differential inputs for channel 7" "0,1"
|
|
bitfld.long 0x0 6. "DIFF6,Differential inputs for channel 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "DIFF5,Differential inputs for channel 5" "0,1"
|
|
bitfld.long 0x0 4. "DIFF4,Differential inputs for channel 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "DIFF3,Differential inputs for channel 3" "0,1"
|
|
bitfld.long 0x0 2. "DIFF2,Differential inputs for channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "DIFF1,Differential inputs for channel 1" "0,1"
|
|
bitfld.long 0x0 0. "DIFF0,Differential inputs for channel 0" "0,1"
|
|
line.long 0x4 "CSELR,AFEC Channel Selection Register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "CSEL,Channel Selection"
|
|
rgroup.long 0x68++0x3
|
|
line.long 0x0 "CDR,AFEC Channel Data Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "DATA,Converted Data"
|
|
group.long 0x6C++0xB
|
|
line.long 0x0 "COCR,AFEC Channel Offset Compensation Register"
|
|
hexmask.long.word 0x0 0.--9. 1. "AOFF,Analog Offset"
|
|
line.long 0x4 "TEMPMR,AFEC Temperature Sensor Mode Register"
|
|
bitfld.long 0x4 4.--5. "TEMPCMPMOD,Temperature Comparison Mode" "0: Generates an event when the converted data is..,1: Generates an event when the converted data is..,2: Generates an event when the converted data is in..,3: Generates an event when the converted data is.."
|
|
bitfld.long 0x4 0. "RTCT,Temperature Sensor RTC Trigger Mode" "0,1"
|
|
line.long 0x8 "TEMPCWR,AFEC Temperature Compare Window Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "THIGHTHRES,Temperature High Threshold"
|
|
hexmask.long.word 0x8 0.--15. 1. "TLOWTHRES,Temperature Low Threshold"
|
|
group.long 0x94++0x3
|
|
line.long 0x0 "ACR,AFEC Analog Control Register"
|
|
bitfld.long 0x0 8.--9. "IBCTL,AFE Bias Current Control" "0,1,2,3"
|
|
bitfld.long 0x0 3. "PGA1EN,PGA1 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "PGA0EN,PGA0 Enable" "0,1"
|
|
group.long 0xA0++0x3
|
|
line.long 0x0 "SHMR,AFEC Sample & Hold Mode Register"
|
|
bitfld.long 0x0 11. "DUAL11,Dual Sample & Hold for channel 11" "0,1"
|
|
bitfld.long 0x0 10. "DUAL10,Dual Sample & Hold for channel 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "DUAL9,Dual Sample & Hold for channel 9" "0,1"
|
|
bitfld.long 0x0 8. "DUAL8,Dual Sample & Hold for channel 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "DUAL7,Dual Sample & Hold for channel 7" "0,1"
|
|
bitfld.long 0x0 6. "DUAL6,Dual Sample & Hold for channel 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "DUAL5,Dual Sample & Hold for channel 5" "0,1"
|
|
bitfld.long 0x0 4. "DUAL4,Dual Sample & Hold for channel 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "DUAL3,Dual Sample & Hold for channel 3" "0,1"
|
|
bitfld.long 0x0 2. "DUAL2,Dual Sample & Hold for channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "DUAL1,Dual Sample & Hold for channel 1" "0,1"
|
|
bitfld.long 0x0 0. "DUAL0,Dual Sample & Hold for channel 0" "0,1"
|
|
group.long 0xD0++0xB
|
|
line.long 0x0 "COSR,AFEC Correction Select Register"
|
|
bitfld.long 0x0 0. "CSEL,Sample & Hold unit Correction Select" "0,1"
|
|
line.long 0x4 "CVR,AFEC Correction Values Register"
|
|
hexmask.long.word 0x4 16.--31. 1. "GAINCORR,Gain Correction"
|
|
hexmask.long.word 0x4 0.--15. 1. "OFFSETCORR,Offset Correction"
|
|
line.long 0x8 "CECR,AFEC Channel Error Correction Register"
|
|
bitfld.long 0x8 11. "ECORR11,Error Correction Enable for channel 11" "0,1"
|
|
bitfld.long 0x8 10. "ECORR10,Error Correction Enable for channel 10" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "ECORR9,Error Correction Enable for channel 9" "0,1"
|
|
bitfld.long 0x8 8. "ECORR8,Error Correction Enable for channel 8" "0,1"
|
|
newline
|
|
bitfld.long 0x8 7. "ECORR7,Error Correction Enable for channel 7" "0,1"
|
|
bitfld.long 0x8 6. "ECORR6,Error Correction Enable for channel 6" "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "ECORR5,Error Correction Enable for channel 5" "0,1"
|
|
bitfld.long 0x8 4. "ECORR4,Error Correction Enable for channel 4" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "ECORR3,Error Correction Enable for channel 3" "0,1"
|
|
bitfld.long 0x8 2. "ECORR2,Error Correction Enable for channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "ECORR1,Error Correction Enable for channel 1" "0,1"
|
|
bitfld.long 0x8 0. "ECORR0,Error Correction Enable for channel 0" "0,1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,AFEC Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protect KEY"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,AFEC Write Protection Status Register"
|
|
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protect Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protect Violation Status" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "CHIPID (Chip Identifier)"
|
|
base ad:0x400E0940
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "CIDR,Chip ID Register"
|
|
bitfld.long 0x0 31. "EXT,Extension Flag" "0,1"
|
|
bitfld.long 0x0 28.--30. "NVPTYP,Nonvolatile Program Memory Type" "0: ROM,1: ROMless or on-chip Flash,2: Embedded Flash Memory,3: ROM and Embedded Flash Memory- NVPSIZ is ROM..,4: SRAM emulating ROM,?,?,?"
|
|
hexmask.long.byte 0x0 20.--27. 1. "ARCH,Architecture Identifier"
|
|
hexmask.long.byte 0x0 16.--19. 1. "SRAMSIZ,Internal SRAM Size"
|
|
hexmask.long.byte 0x0 12.--15. 1. "NVPSIZ2,Second Nonvolatile Program Memory Size"
|
|
hexmask.long.byte 0x0 8.--11. 1. "NVPSIZ,Nonvolatile Program Memory Size"
|
|
newline
|
|
bitfld.long 0x0 5.--7. "EPROC,Embedded Processor" "0: Cortex-M7,1: ARM946ES,2: ARM7TDMI,3: Cortex-M3,4: ARM920T,5: ARM926EJS,6: Cortex-A5,7: Cortex-M4"
|
|
hexmask.long.byte 0x0 0.--4. 1. "VERSION,Version of the Device"
|
|
line.long 0x4 "EXID,Chip ID Extension Register"
|
|
hexmask.long 0x4 0.--31. 1. "EXID,Chip ID Extension"
|
|
tree.end
|
|
tree "DACC (Digital-to-Analog Converter Controller)"
|
|
base ad:0x40040000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 0. "SWRST,Software Reset" "0,1"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "MR,Mode Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "PRESCALER,Peripheral Clock to DAC Clock Ratio"
|
|
bitfld.long 0x0 23. "DIFF,Differential Mode" "0: DAC0 and DAC1 are single-ended outputs.,1: DACP and DACN are differential outputs. The.."
|
|
newline
|
|
bitfld.long 0x0 5. "ZERO,Must always be written to 0." "0,1"
|
|
bitfld.long 0x0 4. "WORD,Word Transfer Mode" "0: One data to convert is written to the FIFO per..,1: Two data to convert are written to the FIFO per.."
|
|
newline
|
|
bitfld.long 0x0 1. "MAXS1,Max Speed Mode for Channel 1" "0: External trigger mode or Free-running mode..,1: Max speed mode enabled."
|
|
bitfld.long 0x0 0. "MAXS0,Max Speed Mode for Channel 0" "0: External trigger mode or Free-running mode..,1: Max speed mode enabled."
|
|
line.long 0x4 "TRIGR,Trigger Register"
|
|
bitfld.long 0x4 20.--22. "OSR1,Over Sampling Ratio of Channel 1" "0: OSR = 1,1: OSR = 2,2: OSR = 4,3: OSR = 8,4: OSR = 16,5: OSR = 32,?,?"
|
|
bitfld.long 0x4 16.--18. "OSR0,Over Sampling Ratio of Channel 0" "0: OSR = 1,1: OSR = 2,2: OSR = 4,3: OSR = 8,4: OSR = 16,5: OSR = 32,?,?"
|
|
newline
|
|
bitfld.long 0x4 8.--10. "TRGSEL1,Trigger Selection of Channel 1" "0: DAC External Trigger Input (DATRG),1: TC0 Channel 0 Output (TIOA0),2: TC0 Channel 1 Output (TIOA1),3: TC0 Channel 2 Output (TIOA2),4: PWM0 Event Line 0,5: PWM0 Event Line 1,6: PWM1 Event Line 0,7: PWM1 Event Line 1"
|
|
bitfld.long 0x4 4.--6. "TRGSEL0,Trigger Selection of Channel 0" "0: DAC External Trigger Input (DATRG),1: TC0 Channel 0 Output (TIOA0),2: TC0 Channel 1 Output (TIOA1),3: TC0 Channel 2 Output (TIOA2),4: PWM0 Event Line 0,5: PWM0 Event Line 1,6: PWM1 Event Line 0,7: PWM1 Event Line 1"
|
|
newline
|
|
bitfld.long 0x4 1. "TRGEN1,Trigger Enable of Channel 1" "0: External trigger mode disabled. DACC is in..,1: External trigger mode enabled."
|
|
bitfld.long 0x4 0. "TRGEN0,Trigger Enable of Channel 0" "0: External trigger mode disabled. DACC is in..,1: External trigger mode enabled."
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "CHER,Channel Enable Register"
|
|
bitfld.long 0x0 1. "CH1,Channel 1 Enable" "0,1"
|
|
bitfld.long 0x0 0. "CH0,Channel 0 Enable" "0,1"
|
|
line.long 0x4 "CHDR,Channel Disable Register"
|
|
bitfld.long 0x4 1. "CH1,Channel 1 Disable" "0,1"
|
|
bitfld.long 0x4 0. "CH0,Channel 0 Disable" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "CHSR,Channel Status Register"
|
|
bitfld.long 0x0 9. "DACRDY1,DAC Ready Flag" "0,1"
|
|
bitfld.long 0x0 8. "DACRDY0,DAC Ready Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CH1,Channel 1 Status" "0,1"
|
|
bitfld.long 0x0 0. "CH0,Channel 0 Status" "0,1"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x1C)++0x3
|
|
line.long 0x0 "CDR[$1],Conversion Data Register 0"
|
|
hexmask.long.word 0x0 16.--31. 1. "DATA1,Data to Convert for channel 1"
|
|
hexmask.long.word 0x0 0.--15. 1. "DATA0,Data to Convert for channel 0"
|
|
repeat.end
|
|
wgroup.long 0x24++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 5. "EOC1,End of Conversion Interrupt Enable of channel 1" "0,1"
|
|
bitfld.long 0x0 4. "EOC0,End of Conversion Interrupt Enable of channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY1,Transmit Ready Interrupt Enable of channel 1" "0,1"
|
|
bitfld.long 0x0 0. "TXRDY0,Transmit Ready Interrupt Enable of channel 0" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 5. "EOC1,End of Conversion Interrupt Disable of channel 1" "0,1"
|
|
bitfld.long 0x4 4. "EOC0,End of Conversion Interrupt Disable of channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "TXRDY1,Transmit Ready Interrupt Disable of channel 1" "0,1"
|
|
bitfld.long 0x4 0. "TXRDY0,Transmit Ready Interrupt Disable of channel 0" "0,1"
|
|
rgroup.long 0x2C++0x7
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 5. "EOC1,End of Conversion Interrupt Mask of channel 1" "0,1"
|
|
bitfld.long 0x0 4. "EOC0,End of Conversion Interrupt Mask of channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY1,Transmit Ready Interrupt Mask of channel 1" "0,1"
|
|
bitfld.long 0x0 0. "TXRDY0,Transmit Ready Interrupt Mask of channel 0" "0,1"
|
|
line.long 0x4 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x4 5. "EOC1,End of Conversion Interrupt Flag of channel 1" "0,1"
|
|
bitfld.long 0x4 4. "EOC0,End of Conversion Interrupt Flag of channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "TXRDY1,Transmit Ready Interrupt Flag of channel 1" "0,1"
|
|
bitfld.long 0x4 0. "TXRDY0,Transmit Ready Interrupt Flag of channel 0" "0,1"
|
|
group.long 0x94++0x3
|
|
line.long 0x0 "ACR,Analog Current Register"
|
|
bitfld.long 0x0 2.--3. "IBCTLCH1,Analog Output Current Control" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "IBCTLCH0,Analog Output Current Control" "0,1,2,3"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protect Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.byte 0x0 8.--15. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
tree.end
|
|
tree "EFC (Embedded Flash Controller)"
|
|
base ad:0x400E0C00
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "EEFC_FMR,EEFC Flash Mode Register"
|
|
bitfld.long 0x0 26. "CLOE,Code Loop Optimization Enable" "0,1"
|
|
bitfld.long 0x0 16. "SCOD,Sequential Code Optimization Disable" "0,1"
|
|
hexmask.long.byte 0x0 8.--11. 1. "FWS,Flash Wait State"
|
|
bitfld.long 0x0 0. "FRDY,Flash Ready Interrupt Enable" "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x0 "EEFC_FCR,EEFC Flash Command Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "FKEY,Flash Writing Protection Key"
|
|
hexmask.long.word 0x0 8.--23. 1. "FARG,Flash Command Argument"
|
|
hexmask.long.byte 0x0 0.--7. 1. "FCMD,Flash Command"
|
|
rgroup.long 0x8++0x7
|
|
line.long 0x0 "EEFC_FSR,EEFC Flash Status Register"
|
|
bitfld.long 0x0 19. "MECCEMSB,Multiple ECC Error on MSB Part of the Memory Flash Data Bus (cleared on read)" "0,1"
|
|
bitfld.long 0x0 18. "UECCEMSB,Unique ECC Error on MSB Part of the Memory Flash Data Bus (cleared on read)" "0,1"
|
|
bitfld.long 0x0 17. "MECCELSB,Multiple ECC Error on LSB Part of the Memory Flash Data Bus (cleared on read)" "0,1"
|
|
bitfld.long 0x0 16. "UECCELSB,Unique ECC Error on LSB Part of the Memory Flash Data Bus (cleared on read)" "0,1"
|
|
bitfld.long 0x0 3. "FLERR,Flash Error Status (cleared when a programming operation starts)" "0,1"
|
|
bitfld.long 0x0 2. "FLOCKE,Flash Lock Error Status (cleared on read)" "0,1"
|
|
bitfld.long 0x0 1. "FCMDE,Flash Command Error Status (cleared on read or by writing EEFC_FCR)" "0,1"
|
|
bitfld.long 0x0 0. "FRDY,Flash Ready Status (cleared when Flash is busy)" "0,1"
|
|
line.long 0x4 "EEFC_FRR,EEFC Flash Result Register"
|
|
hexmask.long 0x4 0.--31. 1. "FVALUE,Flash Result Value"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "EEFC_WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
tree.end
|
|
sif (cpuis("PIC32CZ2051CA70064")||cpuis("PIC32CZ2051CA70100")||cpuis("PIC32CZ2051CA70144"))
|
|
tree "GMAC (Gigabit Ethernet MAC)"
|
|
base ad:0x40050000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "NCR,Network Control Register"
|
|
bitfld.long 0x0 19. "TXLPIEN,Enable LPI Transmission" "0,1"
|
|
bitfld.long 0x0 18. "FNP,Flush Next Packet" "0,1"
|
|
bitfld.long 0x0 17. "TXPBPF,Transmit PFC Priority-based Pause Frame" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ENPBPR,Enable PFC Priority-based Pause Reception" "0,1"
|
|
bitfld.long 0x0 15. "SRTSM,Store Receive Time Stamp to Memory" "0,1"
|
|
bitfld.long 0x0 12. "TXZQPF,Transmit Zero Quantum Pause Frame" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TXPF,Transmit Pause Frame" "0,1"
|
|
bitfld.long 0x0 10. "THALT,Transmit Halt" "0,1"
|
|
bitfld.long 0x0 9. "TSTART,Start Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "BP,Back pressure" "0,1"
|
|
bitfld.long 0x0 7. "WESTAT,Write Enable for Statistics Registers" "0,1"
|
|
bitfld.long 0x0 6. "INCSTAT,Increment Statistics Registers" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CLRSTAT,Clear Statistics Registers" "0,1"
|
|
bitfld.long 0x0 4. "MPE,Management Port Enable" "0,1"
|
|
bitfld.long 0x0 3. "TXEN,Transmit Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXEN,Receive Enable" "0,1"
|
|
bitfld.long 0x0 1. "LBL,Loop Back Local" "0,1"
|
|
line.long 0x4 "NCFGR,Network Configuration Register"
|
|
bitfld.long 0x4 30. "IRXER,Ignore IPG GRXER" "0,1"
|
|
bitfld.long 0x4 29. "RXBP,Receive Bad Preamble" "0,1"
|
|
bitfld.long 0x4 28. "IPGSEN,IP Stretch Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 26. "IRXFCS,Ignore RX FCS" "0,1"
|
|
bitfld.long 0x4 25. "EFRHD,Enable Frames Received in Half Duplex" "0,1"
|
|
bitfld.long 0x4 24. "RXCOEN,Receive Checksum Offload Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "DCPF,Disable Copy of Pause Frames" "0,1"
|
|
bitfld.long 0x4 21.--22. "DBW,Data Bus Width" "0,1,2,3"
|
|
bitfld.long 0x4 18.--20. "CLK,MDC CLock Division" "0: MCK divided by 8 (MCK up to 20 MHz),1: MCK divided by 16 (MCK up to 40 MHz),2: MCK divided by 32 (MCK up to 80 MHz),3: MCK divided by 48 (MCK up to 120 MHz),4: MCK divided by 64 (MCK up to 160 MHz),5: MCK divided by 96 (MCK up to 240 MHz),?,?"
|
|
newline
|
|
bitfld.long 0x4 17. "RFCS,Remove FCS" "0,1"
|
|
bitfld.long 0x4 16. "LFERD,Length Field Error Frame Discard" "0,1"
|
|
bitfld.long 0x4 14.--15. "RXBUFO,Receive Buffer Offset" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 13. "PEN,Pause Enable" "0,1"
|
|
bitfld.long 0x4 12. "RTY,Retry Test" "0,1"
|
|
bitfld.long 0x4 8. "MAXFS,1536 Maximum Frame Size" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "UNIHEN,Unicast Hash Enable" "0,1"
|
|
bitfld.long 0x4 6. "MTIHEN,Multicast Hash Enable" "0,1"
|
|
bitfld.long 0x4 5. "NBC,No Broadcast" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "CAF,Copy All Frames" "0,1"
|
|
bitfld.long 0x4 3. "JFRAME,Jumbo Frame Size" "0,1"
|
|
bitfld.long 0x4 2. "DNVLAN,Discard Non-VLAN FRAMES" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "FD,Full Duplex" "0,1"
|
|
bitfld.long 0x4 0. "SPD,Speed" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "NSR,Network Status Register"
|
|
bitfld.long 0x0 7. "RXLPIS,LPI Indication" "0,1"
|
|
bitfld.long 0x0 2. "IDLE,PHY Management Logic Idle" "0,1"
|
|
bitfld.long 0x0 1. "MDIO,MDIO Input Status" "0,1"
|
|
group.long 0xC++0x17
|
|
line.long 0x0 "UR,User Register"
|
|
bitfld.long 0x0 0. "RMII,Reduced MII Mode" "0,1"
|
|
line.long 0x4 "DCFGR,DMA Configuration Register"
|
|
bitfld.long 0x4 24. "DDRP,DMA Discard Receive Packets" "0,1"
|
|
hexmask.long.byte 0x4 16.--23. 1. "DRBS,DMA Receive Buffer Size"
|
|
bitfld.long 0x4 11. "TXCOEN,Transmitter Checksum Generation Offload Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "TXPBMS,Transmitter Packet Buffer Memory Size Select" "0,1"
|
|
bitfld.long 0x4 8.--9. "RXBMS,Receiver Packet Buffer Memory Size Select" "0: 4/8 Kbyte Memory Size,1: 4/4 Kbytes Memory Size,2: 4/2 Kbytes Memory Size,3: 4 Kbytes Memory Size"
|
|
bitfld.long 0x4 7. "ESPA,Endian Swap Mode Enable for Packet Data Accesses" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "ESMA,Endian Swap Mode Enable for Management Descriptor Accesses" "0,1"
|
|
hexmask.long.byte 0x4 0.--4. 1. "FBLDO,Fixed Burst Length for DMA Data Operations:"
|
|
line.long 0x8 "TSR,Transmit Status Register"
|
|
bitfld.long 0x8 8. "HRESP,HRESP Not OK" "0,1"
|
|
bitfld.long 0x8 5. "TXCOMP,Transmit Complete" "0,1"
|
|
bitfld.long 0x8 4. "TFC,Transmit Frame Corruption Due to AHB Error" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "TXGO,Transmit Go" "0,1"
|
|
bitfld.long 0x8 2. "RLE,Retry Limit Exceeded" "0,1"
|
|
bitfld.long 0x8 1. "COL,Collision Occurred" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "UBR,Used Bit Read" "0,1"
|
|
line.long 0xC "RBQB,Receive Buffer Queue Base Address Register"
|
|
hexmask.long 0xC 2.--31. 1. "ADDR,Receive Buffer Queue Base Address"
|
|
line.long 0x10 "TBQB,Transmit Buffer Queue Base Address Register"
|
|
hexmask.long 0x10 2.--31. 1. "ADDR,Transmit Buffer Queue Base Address"
|
|
line.long 0x14 "RSR,Receive Status Register"
|
|
bitfld.long 0x14 3. "HNO,HRESP Not OK" "0,1"
|
|
bitfld.long 0x14 2. "RXOVR,Receive Overrun" "0,1"
|
|
bitfld.long 0x14 1. "REC,Frame Received" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. "BNA,Buffer Not Available" "0,1"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x0 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x0 29. "TSUTIMCOMP,TSU Timer Comparison" "0,1"
|
|
bitfld.long 0x0 28. "WOL,Wake On LAN" "0,1"
|
|
bitfld.long 0x0 27. "RXLPISBC,Receive LPI indication Status Bit Change" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "SRI,TSU Seconds Register Increment" "0,1"
|
|
bitfld.long 0x0 25. "PDRSFT,PDelay Response Frame Transmitted" "0,1"
|
|
bitfld.long 0x0 24. "PDRQFT,PDelay Request Frame Transmitted" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "PDRSFR,PDelay Response Frame Received" "0,1"
|
|
bitfld.long 0x0 22. "PDRQFR,PDelay Request Frame Received" "0,1"
|
|
bitfld.long 0x0 21. "SFT,PTP Sync Frame Transmitted" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "DRQFT,PTP Delay Request Frame Transmitted" "0,1"
|
|
bitfld.long 0x0 19. "SFR,PTP Sync Frame Received" "0,1"
|
|
bitfld.long 0x0 18. "DRQFR,PTP Delay Request Frame Received" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "PFTR,Pause Frame Transmitted" "0,1"
|
|
bitfld.long 0x0 13. "PTZ,Pause Time Zero" "0,1"
|
|
bitfld.long 0x0 12. "PFNZ,Pause Frame with Non-zero Pause Quantum Received" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "HRESP,HRESP Not OK" "0,1"
|
|
bitfld.long 0x0 10. "ROVR,Receive Overrun" "0,1"
|
|
bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to AHB Error" "0,1"
|
|
bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded" "0,1"
|
|
bitfld.long 0x0 4. "TUR,Transmit Underrun" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TXUBR,TX Used Bit Read" "0,1"
|
|
bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1"
|
|
bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "MFS,Management Frame Sent" "0,1"
|
|
wgroup.long 0x28++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 29. "TSUTIMCOMP,TSU Timer Comparison" "0,1"
|
|
bitfld.long 0x0 28. "WOL,Wake On LAN" "0,1"
|
|
bitfld.long 0x0 27. "RXLPISBC,Enable RX LPI Indication" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "SRI,TSU Seconds Register Increment" "0,1"
|
|
bitfld.long 0x0 25. "PDRSFT,PDelay Response Frame Transmitted" "0,1"
|
|
bitfld.long 0x0 24. "PDRQFT,PDelay Request Frame Transmitted" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "PDRSFR,PDelay Response Frame Received" "0,1"
|
|
bitfld.long 0x0 22. "PDRQFR,PDelay Request Frame Received" "0,1"
|
|
bitfld.long 0x0 21. "SFT,PTP Sync Frame Transmitted" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "DRQFT,PTP Delay Request Frame Transmitted" "0,1"
|
|
bitfld.long 0x0 19. "SFR,PTP Sync Frame Received" "0,1"
|
|
bitfld.long 0x0 18. "DRQFR,PTP Delay Request Frame Received" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "EXINT,External Interrupt" "0,1"
|
|
bitfld.long 0x0 14. "PFTR,Pause Frame Transmitted" "0,1"
|
|
bitfld.long 0x0 13. "PTZ,Pause Time Zero" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "PFNZ,Pause Frame with Non-zero Pause Quantum Received" "0,1"
|
|
bitfld.long 0x0 11. "HRESP,HRESP Not OK" "0,1"
|
|
bitfld.long 0x0 10. "ROVR,Receive Overrun" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1"
|
|
bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to AHB Error" "0,1"
|
|
bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded or Late Collision" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "TUR,Transmit Underrun" "0,1"
|
|
bitfld.long 0x0 3. "TXUBR,TX Used Bit Read" "0,1"
|
|
bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1"
|
|
bitfld.long 0x0 0. "MFS,Management Frame Sent" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 29. "TSUTIMCOMP,TSU Timer Comparison" "0,1"
|
|
bitfld.long 0x4 28. "WOL,Wake On LAN" "0,1"
|
|
bitfld.long 0x4 27. "RXLPISBC,Enable RX LPI Indication" "0,1"
|
|
newline
|
|
bitfld.long 0x4 26. "SRI,TSU Seconds Register Increment" "0,1"
|
|
bitfld.long 0x4 25. "PDRSFT,PDelay Response Frame Transmitted" "0,1"
|
|
bitfld.long 0x4 24. "PDRQFT,PDelay Request Frame Transmitted" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "PDRSFR,PDelay Response Frame Received" "0,1"
|
|
bitfld.long 0x4 22. "PDRQFR,PDelay Request Frame Received" "0,1"
|
|
bitfld.long 0x4 21. "SFT,PTP Sync Frame Transmitted" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "DRQFT,PTP Delay Request Frame Transmitted" "0,1"
|
|
bitfld.long 0x4 19. "SFR,PTP Sync Frame Received" "0,1"
|
|
bitfld.long 0x4 18. "DRQFR,PTP Delay Request Frame Received" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "EXINT,External Interrupt" "0,1"
|
|
bitfld.long 0x4 14. "PFTR,Pause Frame Transmitted" "0,1"
|
|
bitfld.long 0x4 13. "PTZ,Pause Time Zero" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "PFNZ,Pause Frame with Non-zero Pause Quantum Received" "0,1"
|
|
bitfld.long 0x4 11. "HRESP,HRESP Not OK" "0,1"
|
|
bitfld.long 0x4 10. "ROVR,Receive Overrun" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "TCOMP,Transmit Complete" "0,1"
|
|
bitfld.long 0x4 6. "TFC,Transmit Frame Corruption Due to AHB Error" "0,1"
|
|
bitfld.long 0x4 5. "RLEX,Retry Limit Exceeded or Late Collision" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "TUR,Transmit Underrun" "0,1"
|
|
bitfld.long 0x4 3. "TXUBR,TX Used Bit Read" "0,1"
|
|
bitfld.long 0x4 2. "RXUBR,RX Used Bit Read" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "RCOMP,Receive Complete" "0,1"
|
|
bitfld.long 0x4 0. "MFS,Management Frame Sent" "0,1"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 29. "TSUTIMCOMP,TSU Timer Comparison" "0,1"
|
|
bitfld.long 0x0 28. "WOL,Wake On LAN" "0,1"
|
|
bitfld.long 0x0 27. "RXLPISBC,Enable RX LPI Indication" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "SRI,TSU Seconds Register Increment" "0,1"
|
|
bitfld.long 0x0 25. "PDRSFT,PDelay Response Frame Transmitted" "0,1"
|
|
bitfld.long 0x0 24. "PDRQFT,PDelay Request Frame Transmitted" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "PDRSFR,PDelay Response Frame Received" "0,1"
|
|
bitfld.long 0x0 22. "PDRQFR,PDelay Request Frame Received" "0,1"
|
|
bitfld.long 0x0 21. "SFT,PTP Sync Frame Transmitted" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "DRQFT,PTP Delay Request Frame Transmitted" "0,1"
|
|
bitfld.long 0x0 19. "SFR,PTP Sync Frame Received" "0,1"
|
|
bitfld.long 0x0 18. "DRQFR,PTP Delay Request Frame Received" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "EXINT,External Interrupt" "0,1"
|
|
bitfld.long 0x0 14. "PFTR,Pause Frame Transmitted" "0,1"
|
|
bitfld.long 0x0 13. "PTZ,Pause Time Zero" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "PFNZ,Pause Frame with Non-zero Pause Quantum Received" "0,1"
|
|
bitfld.long 0x0 11. "HRESP,HRESP Not OK" "0,1"
|
|
bitfld.long 0x0 10. "ROVR,Receive Overrun" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1"
|
|
bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to AHB Error" "0,1"
|
|
bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "TUR,Transmit Underrun" "0,1"
|
|
bitfld.long 0x0 3. "TXUBR,TX Used Bit Read" "0,1"
|
|
bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1"
|
|
bitfld.long 0x0 0. "MFS,Management Frame Sent" "0,1"
|
|
line.long 0x4 "MAN,PHY Maintenance Register"
|
|
bitfld.long 0x4 31. "WZO,Write ZERO" "0,1"
|
|
bitfld.long 0x4 30. "CLTTO,Clause 22 Operation" "0,1"
|
|
bitfld.long 0x4 28.--29. "OP,Operation" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x4 23.--27. 1. "PHYA,PHY Address"
|
|
hexmask.long.byte 0x4 18.--22. 1. "REGA,Register Address"
|
|
bitfld.long 0x4 16.--17. "WTN,Write Ten" "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "DATA,PHY Data"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "RPQ,Received Pause Quantum Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RPQ,Received Pause Quantum"
|
|
group.long 0x3C++0xF
|
|
line.long 0x0 "TPQ,Transmit Pause Quantum Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "TPQ,Transmit Pause Quantum"
|
|
line.long 0x4 "TPSF,TX Partial Store and Forward Register"
|
|
bitfld.long 0x4 31. "ENTXP,Enable TX Partial Store and Forward Operation" "0,1"
|
|
hexmask.long.word 0x4 0.--11. 1. "TPB1ADR,Transmit Partial Store and Forward Address"
|
|
line.long 0x8 "RPSF,RX Partial Store and Forward Register"
|
|
bitfld.long 0x8 31. "ENRXP,Enable RX Partial Store and Forward Operation" "0,1"
|
|
hexmask.long.word 0x8 0.--11. 1. "RPB1ADR,Receive Partial Store and Forward Address"
|
|
line.long 0xC "RJFML,RX Jumbo Frame Max Length Register"
|
|
hexmask.long.word 0xC 0.--13. 1. "FML,Frame Max Length"
|
|
group.long 0x80++0x7
|
|
line.long 0x0 "HRB,Hash Register Bottom"
|
|
hexmask.long 0x0 0.--31. 1. "ADDR,Hash Address"
|
|
line.long 0x4 "HRT,Hash Register Top"
|
|
hexmask.long 0x4 0.--31. 1. "ADDR,Hash Address"
|
|
repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x40050088 ad:0x40050090 ad:0x40050098 ad:0x400500A0)
|
|
tree "GMAC_SA$1"
|
|
base $2
|
|
group.long ($2)++0x7
|
|
line.long 0x0 "SAB,Specific Address 1 Bottom Register"
|
|
hexmask.long 0x0 0.--31. 1. "ADDR,Specific Address 1"
|
|
line.long 0x4 "SAT,Specific Address 1 Top Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "ADDR,Specific Address 1"
|
|
tree.end
|
|
repeat.end
|
|
base ad:0x40050000
|
|
newline
|
|
group.long 0xA8++0x27
|
|
line.long 0x0 "TIDM1,Type ID Match 1 Register"
|
|
bitfld.long 0x0 31. "ENID1,Enable Copying of TID Matched Frames" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "TID,Type ID Match 1"
|
|
line.long 0x4 "TIDM2,Type ID Match 2 Register"
|
|
bitfld.long 0x4 31. "ENID2,Enable Copying of TID Matched Frames" "0,1"
|
|
hexmask.long.word 0x4 0.--15. 1. "TID,Type ID Match 2"
|
|
line.long 0x8 "TIDM3,Type ID Match 3 Register"
|
|
bitfld.long 0x8 31. "ENID3,Enable Copying of TID Matched Frames" "0,1"
|
|
hexmask.long.word 0x8 0.--15. 1. "TID,Type ID Match 3"
|
|
line.long 0xC "TIDM4,Type ID Match 4 Register"
|
|
bitfld.long 0xC 31. "ENID4,Enable Copying of TID Matched Frames" "0,1"
|
|
hexmask.long.word 0xC 0.--15. 1. "TID,Type ID Match 4"
|
|
line.long 0x10 "WOL,Wake on LAN Register"
|
|
bitfld.long 0x10 19. "MTI,Multicast Hash Event Enable" "0,1"
|
|
bitfld.long 0x10 18. "SA1,Specific Address Register 1 Event Enable" "0,1"
|
|
bitfld.long 0x10 17. "ARP,ARP Request IP Address" "0,1"
|
|
newline
|
|
bitfld.long 0x10 16. "MAG,Magic Packet Event Enable" "0,1"
|
|
hexmask.long.word 0x10 0.--15. 1. "IP,ARP Request IP Address"
|
|
line.long 0x14 "IPGS,IPG Stretch Register"
|
|
hexmask.long.word 0x14 0.--15. 1. "FL,Frame Length"
|
|
line.long 0x18 "SVLAN,Stacked VLAN Register"
|
|
bitfld.long 0x18 31. "ESVLAN,Enable Stacked VLAN Processing Mode" "0,1"
|
|
hexmask.long.word 0x18 0.--15. 1. "VLAN_TYPE,User Defined VLAN_TYPE Field"
|
|
line.long 0x1C "TPFCP,Transmit PFC Pause Register"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "PQ,Pause Quantum"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "PEV,Priority Enable Vector"
|
|
line.long 0x20 "SAMB1,Specific Address 1 Mask Bottom Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Specific Address 1 Mask"
|
|
line.long 0x24 "SAMT1,Specific Address 1 Mask Top Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "ADDR,Specific Address 1 Mask"
|
|
group.long 0xDC++0xB
|
|
line.long 0x0 "NSC,1588 Timer Nanosecond Comparison Register"
|
|
hexmask.long.tbyte 0x0 0.--21. 1. "NANOSEC,1588 Timer Nanosecond Comparison Value"
|
|
line.long 0x4 "SCL,1588 Timer Second Comparison Low Register"
|
|
hexmask.long 0x4 0.--31. 1. "SEC,1588 Timer Second Comparison Value"
|
|
line.long 0x8 "SCH,1588 Timer Second Comparison High Register"
|
|
hexmask.long.word 0x8 0.--15. 1. "SEC,1588 Timer Second Comparison Value"
|
|
rgroup.long 0xE8++0xF
|
|
line.long 0x0 "EFTSH,PTP Event Frame Transmitted Seconds High Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RUD,Register Update"
|
|
line.long 0x4 "EFRSH,PTP Event Frame Received Seconds High Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "RUD,Register Update"
|
|
line.long 0x8 "PEFTSH,PTP Peer Event Frame Transmitted Seconds High Register"
|
|
hexmask.long.word 0x8 0.--15. 1. "RUD,Register Update"
|
|
line.long 0xC "PEFRSH,PTP Peer Event Frame Received Seconds High Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "RUD,Register Update"
|
|
rgroup.long 0x100++0xB3
|
|
line.long 0x0 "OTLO,Octets Transmitted Low Register"
|
|
hexmask.long 0x0 0.--31. 1. "TXO,Transmitted Octets"
|
|
line.long 0x4 "OTHI,Octets Transmitted High Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "TXO,Transmitted Octets"
|
|
line.long 0x8 "FT,Frames Transmitted Register"
|
|
hexmask.long 0x8 0.--31. 1. "FTX,Frames Transmitted without Error"
|
|
line.long 0xC "BCFT,Broadcast Frames Transmitted Register"
|
|
hexmask.long 0xC 0.--31. 1. "BFTX,Broadcast Frames Transmitted without Error"
|
|
line.long 0x10 "MFT,Multicast Frames Transmitted Register"
|
|
hexmask.long 0x10 0.--31. 1. "MFTX,Multicast Frames Transmitted without Error"
|
|
line.long 0x14 "PFT,Pause Frames Transmitted Register"
|
|
hexmask.long.word 0x14 0.--15. 1. "PFTX,Pause Frames Transmitted Register"
|
|
line.long 0x18 "BFT64,64 Byte Frames Transmitted Register"
|
|
hexmask.long 0x18 0.--31. 1. "NFTX,64 Byte Frames Transmitted without Error"
|
|
line.long 0x1C "TBFT127,65 to 127 Byte Frames Transmitted Register"
|
|
hexmask.long 0x1C 0.--31. 1. "NFTX,65 to 127 Byte Frames Transmitted without Error"
|
|
line.long 0x20 "TBFT255,128 to 255 Byte Frames Transmitted Register"
|
|
hexmask.long 0x20 0.--31. 1. "NFTX,128 to 255 Byte Frames Transmitted without Error"
|
|
line.long 0x24 "TBFT511,256 to 511 Byte Frames Transmitted Register"
|
|
hexmask.long 0x24 0.--31. 1. "NFTX,256 to 511 Byte Frames Transmitted without Error"
|
|
line.long 0x28 "TBFT1023,512 to 1023 Byte Frames Transmitted Register"
|
|
hexmask.long 0x28 0.--31. 1. "NFTX,512 to 1023 Byte Frames Transmitted without Error"
|
|
line.long 0x2C "TBFT1518,1024 to 1518 Byte Frames Transmitted Register"
|
|
hexmask.long 0x2C 0.--31. 1. "NFTX,1024 to 1518 Byte Frames Transmitted without Error"
|
|
line.long 0x30 "GTBFT1518,Greater Than 1518 Byte Frames Transmitted Register"
|
|
hexmask.long 0x30 0.--31. 1. "NFTX,Greater than 1518 Byte Frames Transmitted without Error"
|
|
line.long 0x34 "TUR,Transmit Underruns Register"
|
|
hexmask.long.word 0x34 0.--9. 1. "TXUNR,Transmit Underruns"
|
|
line.long 0x38 "SCF,Single Collision Frames Register"
|
|
hexmask.long.tbyte 0x38 0.--17. 1. "SCOL,Single Collision"
|
|
line.long 0x3C "MCF,Multiple Collision Frames Register"
|
|
hexmask.long.tbyte 0x3C 0.--17. 1. "MCOL,Multiple Collision"
|
|
line.long 0x40 "EC,Excessive Collisions Register"
|
|
hexmask.long.word 0x40 0.--9. 1. "XCOL,Excessive Collisions"
|
|
line.long 0x44 "LC,Late Collisions Register"
|
|
hexmask.long.word 0x44 0.--9. 1. "LCOL,Late Collisions"
|
|
line.long 0x48 "DTF,Deferred Transmission Frames Register"
|
|
hexmask.long.tbyte 0x48 0.--17. 1. "DEFT,Deferred Transmission"
|
|
line.long 0x4C "CSE,Carrier Sense Errors Register"
|
|
hexmask.long.word 0x4C 0.--9. 1. "CSR,Carrier Sense Error"
|
|
line.long 0x50 "ORLO,Octets Received Low Received Register"
|
|
hexmask.long 0x50 0.--31. 1. "RXO,Received Octets"
|
|
line.long 0x54 "ORHI,Octets Received High Received Register"
|
|
hexmask.long.word 0x54 0.--15. 1. "RXO,Received Octets"
|
|
line.long 0x58 "FR,Frames Received Register"
|
|
hexmask.long 0x58 0.--31. 1. "FRX,Frames Received without Error"
|
|
line.long 0x5C "BCFR,Broadcast Frames Received Register"
|
|
hexmask.long 0x5C 0.--31. 1. "BFRX,Broadcast Frames Received without Error"
|
|
line.long 0x60 "MFR,Multicast Frames Received Register"
|
|
hexmask.long 0x60 0.--31. 1. "MFRX,Multicast Frames Received without Error"
|
|
line.long 0x64 "PFR,Pause Frames Received Register"
|
|
hexmask.long.word 0x64 0.--15. 1. "PFRX,Pause Frames Received Register"
|
|
line.long 0x68 "BFR64,64 Byte Frames Received Register"
|
|
hexmask.long 0x68 0.--31. 1. "NFRX,64 Byte Frames Received without Error"
|
|
line.long 0x6C "TBFR127,65 to 127 Byte Frames Received Register"
|
|
hexmask.long 0x6C 0.--31. 1. "NFRX,65 to 127 Byte Frames Received without Error"
|
|
line.long 0x70 "TBFR255,128 to 255 Byte Frames Received Register"
|
|
hexmask.long 0x70 0.--31. 1. "NFRX,128 to 255 Byte Frames Received without Error"
|
|
line.long 0x74 "TBFR511,256 to 511 Byte Frames Received Register"
|
|
hexmask.long 0x74 0.--31. 1. "NFRX,256 to 511 Byte Frames Received without Error"
|
|
line.long 0x78 "TBFR1023,512 to 1023 Byte Frames Received Register"
|
|
hexmask.long 0x78 0.--31. 1. "NFRX,512 to 1023 Byte Frames Received without Error"
|
|
line.long 0x7C "TBFR1518,1024 to 1518 Byte Frames Received Register"
|
|
hexmask.long 0x7C 0.--31. 1. "NFRX,1024 to 1518 Byte Frames Received without Error"
|
|
line.long 0x80 "TMXBFR,1519 to Maximum Byte Frames Received Register"
|
|
hexmask.long 0x80 0.--31. 1. "NFRX,1519 to Maximum Byte Frames Received without Error"
|
|
line.long 0x84 "UFR,Undersize Frames Received Register"
|
|
hexmask.long.word 0x84 0.--9. 1. "UFRX,Undersize Frames Received"
|
|
line.long 0x88 "OFR,Oversize Frames Received Register"
|
|
hexmask.long.word 0x88 0.--9. 1. "OFRX,Oversized Frames Received"
|
|
line.long 0x8C "JR,Jabbers Received Register"
|
|
hexmask.long.word 0x8C 0.--9. 1. "JRX,Jabbers Received"
|
|
line.long 0x90 "FCSE,Frame Check Sequence Errors Register"
|
|
hexmask.long.word 0x90 0.--9. 1. "FCKR,Frame Check Sequence Errors"
|
|
line.long 0x94 "LFFE,Length Field Frame Errors Register"
|
|
hexmask.long.word 0x94 0.--9. 1. "LFER,Length Field Frame Errors"
|
|
line.long 0x98 "RSE,Receive Symbol Errors Register"
|
|
hexmask.long.word 0x98 0.--9. 1. "RXSE,Receive Symbol Errors"
|
|
line.long 0x9C "AE,Alignment Errors Register"
|
|
hexmask.long.word 0x9C 0.--9. 1. "AER,Alignment Errors"
|
|
line.long 0xA0 "RRE,Receive Resource Errors Register"
|
|
hexmask.long.tbyte 0xA0 0.--17. 1. "RXRER,Receive Resource Errors"
|
|
line.long 0xA4 "ROE,Receive Overrun Register"
|
|
hexmask.long.word 0xA4 0.--9. 1. "RXOVR,Receive Overruns"
|
|
line.long 0xA8 "IHCE,IP Header Checksum Errors Register"
|
|
hexmask.long.byte 0xA8 0.--7. 1. "HCKER,IP Header Checksum Errors"
|
|
line.long 0xAC "TCE,TCP Checksum Errors Register"
|
|
hexmask.long.byte 0xAC 0.--7. 1. "TCKER,TCP Checksum Errors"
|
|
line.long 0xB0 "UCE,UDP Checksum Errors Register"
|
|
hexmask.long.byte 0xB0 0.--7. 1. "UCKER,UDP Checksum Errors"
|
|
group.long 0x1BC++0x7
|
|
line.long 0x0 "TISUBN,1588 Timer Increment Sub-nanoseconds Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LSBTIR,Lower Significant Bits of Timer Increment Register"
|
|
line.long 0x4 "TSH,1588 Timer Seconds High Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "TCS,Timer Count in Seconds"
|
|
group.long 0x1D0++0x7
|
|
line.long 0x0 "TSL,1588 Timer Seconds Low Register"
|
|
hexmask.long 0x0 0.--31. 1. "TCS,Timer Count in Seconds"
|
|
line.long 0x4 "TN,1588 Timer Nanoseconds Register"
|
|
hexmask.long 0x4 0.--29. 1. "TNS,Timer Count in Nanoseconds"
|
|
wgroup.long 0x1D8++0x3
|
|
line.long 0x0 "TA,1588 Timer Adjust Register"
|
|
bitfld.long 0x0 31. "ADJ,Adjust 1588 Timer" "0,1"
|
|
hexmask.long 0x0 0.--29. 1. "ITDT,Increment/Decrement"
|
|
group.long 0x1DC++0x3
|
|
line.long 0x0 "TI,1588 Timer Increment Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "NIT,Number of Increments"
|
|
hexmask.long.byte 0x0 8.--15. 1. "ACNS,Alternative Count Nanoseconds"
|
|
hexmask.long.byte 0x0 0.--7. 1. "CNS,Count Nanoseconds"
|
|
rgroup.long 0x1E0++0x1F
|
|
line.long 0x0 "EFTSL,PTP Event Frame Transmitted Seconds Low Register"
|
|
hexmask.long 0x0 0.--31. 1. "RUD,Register Update"
|
|
line.long 0x4 "EFTN,PTP Event Frame Transmitted Nanoseconds Register"
|
|
hexmask.long 0x4 0.--29. 1. "RUD,Register Update"
|
|
line.long 0x8 "EFRSL,PTP Event Frame Received Seconds Low Register"
|
|
hexmask.long 0x8 0.--31. 1. "RUD,Register Update"
|
|
line.long 0xC "EFRN,PTP Event Frame Received Nanoseconds Register"
|
|
hexmask.long 0xC 0.--29. 1. "RUD,Register Update"
|
|
line.long 0x10 "PEFTSL,PTP Peer Event Frame Transmitted Seconds Low Register"
|
|
hexmask.long 0x10 0.--31. 1. "RUD,Register Update"
|
|
line.long 0x14 "PEFTN,PTP Peer Event Frame Transmitted Nanoseconds Register"
|
|
hexmask.long 0x14 0.--29. 1. "RUD,Register Update"
|
|
line.long 0x18 "PEFRSL,PTP Peer Event Frame Received Seconds Low Register"
|
|
hexmask.long 0x18 0.--31. 1. "RUD,Register Update"
|
|
line.long 0x1C "PEFRN,PTP Peer Event Frame Received Nanoseconds Register"
|
|
hexmask.long 0x1C 0.--29. 1. "RUD,Register Update"
|
|
rgroup.long 0x270++0xF
|
|
line.long 0x0 "RXLPI,Received LPI Transitions"
|
|
hexmask.long.word 0x0 0.--15. 1. "COUNT,Count of RX LPI transitions (cleared on read)"
|
|
line.long 0x4 "RXLPITIME,Received LPI Time"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "LPITIME,Time in LPI (cleared on read)"
|
|
line.long 0x8 "TXLPI,Transmit LPI Transitions"
|
|
hexmask.long.word 0x8 0.--15. 1. "COUNT,Count of LPI transitions (cleared on read)"
|
|
line.long 0xC "TXLPITIME,Transmit LPI Time"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. "LPITIME,Time in LPI (cleared on read)"
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x400)++0x3
|
|
line.long 0x0 "ISRPQ[$1],Interrupt Status Register Priority Queue (1..5)"
|
|
bitfld.long 0x0 11. "HRESP,HRESP Not OK" "0,1"
|
|
bitfld.long 0x0 10. "ROVR,Receive Overrun" "0,1"
|
|
bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to AHB Error" "0,1"
|
|
bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded or Late Collision" "0,1"
|
|
bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1"
|
|
repeat.end
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x440)++0x3
|
|
line.long 0x0 "TBQBAPQ[$1],Transmit Buffer Queue Base Address Register Priority Queue (1..5)"
|
|
hexmask.long 0x0 2.--31. 1. "TXBQBA,Transmit Buffer Queue Base Address"
|
|
repeat.end
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x480)++0x3
|
|
line.long 0x0 "RBQBAPQ[$1],Receive Buffer Queue Base Address Register Priority Queue (1..5)"
|
|
hexmask.long 0x0 2.--31. 1. "RXBQBA,Receive Buffer Queue Base Address"
|
|
repeat.end
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x4A0)++0x3
|
|
line.long 0x0 "RBSRPQ[$1],Receive Buffer Size Register Priority Queue (1..5)"
|
|
hexmask.long.word 0x0 0.--15. 1. "RBS,Receive Buffer Size"
|
|
repeat.end
|
|
group.long 0x4BC++0xB
|
|
line.long 0x0 "CBSCR,Credit-Based Shaping Control Register"
|
|
bitfld.long 0x0 1. "QAE,Queue A CBS Enable" "0,1"
|
|
bitfld.long 0x0 0. "QBE,Queue B CBS Enable" "0,1"
|
|
line.long 0x4 "CBSISQA,Credit-Based Shaping IdleSlope Register for Queue A"
|
|
hexmask.long 0x4 0.--31. 1. "IS,IdleSlope"
|
|
line.long 0x8 "CBSISQB,Credit-Based Shaping IdleSlope Register for Queue B"
|
|
hexmask.long 0x8 0.--31. 1. "IS,IdleSlope"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x500)++0x3
|
|
line.long 0x0 "ST1RPQ[$1],Screening Type 1 Register Priority Queue"
|
|
bitfld.long 0x0 29. "UDPE,UDP Port Match Enable" "0,1"
|
|
bitfld.long 0x0 28. "DSTCE,Differentiated Services or Traffic Class Match Enable" "0,1"
|
|
hexmask.long.word 0x0 12.--27. 1. "UDPM,UDP Port Match"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--11. 1. "DSTCM,Differentiated Services or Traffic Class Match"
|
|
bitfld.long 0x0 0.--2. "QNB,Queue Number (0-5)" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x540)++0x3
|
|
line.long 0x0 "ST2RPQ[$1],Screening Type 2 Register Priority Queue"
|
|
bitfld.long 0x0 30. "COMPCE,Compare C Enable" "0,1"
|
|
hexmask.long.byte 0x0 25.--29. 1. "COMPC,Index of Screening Type 2 Compare Word 0/Word 1 register x"
|
|
bitfld.long 0x0 24. "COMPBE,Compare B Enable" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--23. 1. "COMPB,Index of Screening Type 2 Compare Word 0/Word 1 register x"
|
|
bitfld.long 0x0 18. "COMPAE,Compare A Enable" "0,1"
|
|
hexmask.long.byte 0x0 13.--17. 1. "COMPA,Index of Screening Type 2 Compare Word 0/Word 1 register x"
|
|
newline
|
|
bitfld.long 0x0 12. "ETHE,EtherType Enable" "0,1"
|
|
bitfld.long 0x0 9.--11. "I2ETH,Index of Screening Type 2 EtherType register x" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 8. "VLANE,VLAN Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "VLANP,VLAN Priority" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "QNB,Queue Number (0-5)" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x600)++0x3
|
|
line.long 0x0 "IERPQ[$1],Interrupt Enable Register Priority Queue (1..5)"
|
|
bitfld.long 0x0 11. "HRESP,HRESP Not OK" "0,1"
|
|
bitfld.long 0x0 10. "ROVR,Receive Overrun" "0,1"
|
|
bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to AHB Error" "0,1"
|
|
bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded or Late Collision" "0,1"
|
|
bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1"
|
|
repeat.end
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x620)++0x3
|
|
line.long 0x0 "IDRPQ[$1],Interrupt Disable Register Priority Queue (1..5)"
|
|
bitfld.long 0x0 11. "HRESP,HRESP Not OK" "0,1"
|
|
bitfld.long 0x0 10. "ROVR,Receive Overrun" "0,1"
|
|
bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to AHB Error" "0,1"
|
|
bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded or Late Collision" "0,1"
|
|
bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1"
|
|
repeat.end
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x640)++0x3
|
|
line.long 0x0 "IMRPQ[$1],Interrupt Mask Register Priority Queue (1..5)"
|
|
bitfld.long 0x0 11. "HRESP,HRESP Not OK" "0,1"
|
|
bitfld.long 0x0 10. "ROVR,Receive Overrun" "0,1"
|
|
bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "AHB,AHB Error" "0,1"
|
|
bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded or Late Collision" "0,1"
|
|
bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x6E0)++0x3
|
|
line.long 0x0 "ST2ER[$1],Screening Type 2 Ethertype Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "COMPVAL,Ethertype Compare Value"
|
|
repeat.end
|
|
repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0x40050700 ad:0x40050708 ad:0x40050710 ad:0x40050718 ad:0x40050720 ad:0x40050728 ad:0x40050730 ad:0x40050738 ad:0x40050740 ad:0x40050748 ad:0x40050750 ad:0x40050758 ad:0x40050760 ad:0x40050768 ad:0x40050770 ad:0x40050778)
|
|
tree "GMAC_ST2CW[$1]"
|
|
base $2
|
|
group.long ($2)++0x7
|
|
line.long 0x0 "ST2CW0,Screening Type 2 Compare Word 0 Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "COMPVAL,Compare Value"
|
|
hexmask.long.word 0x0 0.--15. 1. "MASKVAL,Mask Value"
|
|
line.long 0x4 "ST2CW1,Screening Type 2 Compare Word 1 Register"
|
|
bitfld.long 0x4 7.--8. "OFFSSTRT,Ethernet Frame Offset Start" "0: Offset from the start of the frame,1: Offset from the byte after the EtherType field,2: Offset from the byte after the IP header field,3: Offset from the byte after the TCP/UDP header.."
|
|
hexmask.long.byte 0x4 0.--6. 1. "OFFSVAL,Offset Value in Bytes"
|
|
tree.end
|
|
repeat.end
|
|
repeat 8. (list 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17)(list ad:0x40050780 ad:0x40050788 ad:0x40050790 ad:0x40050798 ad:0x400507A0 ad:0x400507A8 ad:0x400507B0 ad:0x400507B8)
|
|
tree "GMAC_ST2CW[$1]"
|
|
base $2
|
|
group.long ($2)++0x7
|
|
line.long 0x0 "ST2CW0,Screening Type 2 Compare Word 0 Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "COMPVAL,Compare Value"
|
|
hexmask.long.word 0x0 0.--15. 1. "MASKVAL,Mask Value"
|
|
line.long 0x4 "ST2CW1,Screening Type 2 Compare Word 1 Register"
|
|
bitfld.long 0x4 7.--8. "OFFSSTRT,Ethernet Frame Offset Start" "0: Offset from the start of the frame,1: Offset from the byte after the EtherType field,2: Offset from the byte after the IP header field,3: Offset from the byte after the TCP/UDP header.."
|
|
hexmask.long.byte 0x4 0.--6. 1. "OFFSVAL,Offset Value in Bytes"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
endif
|
|
tree "GPBR (General Purpose Backup Registers)"
|
|
base ad:0x400E1890
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2)++0x3
|
|
line.long 0x0 "SYS_GPBR[$1],General Purpose Backup Register 0"
|
|
hexmask.long 0x0 0.--31. 1. "GPBR_VALUE,Value of GPBR x"
|
|
repeat.end
|
|
tree.end
|
|
sif (cpuis("PIC32CZ2051CA70100")||cpuis("PIC32CZ2051CA70144")||cpuis("PIC32CZ2051MC70100")||cpuis("PIC32CZ2051MC70144"))
|
|
tree "HSMCI (High Speed MultiMedia Card Interface)"
|
|
base ad:0x40000000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 7. "SWRST,Software Reset" "0,1"
|
|
bitfld.long 0x0 3. "PWSDIS,Power Save Mode Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "PWSEN,Power Save Mode Enable" "0,1"
|
|
bitfld.long 0x0 1. "MCIDIS,Multi-Media Interface Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "MCIEN,Multi-Media Interface Enable" "0,1"
|
|
group.long 0x4++0xF
|
|
line.long 0x0 "MR,Mode Register"
|
|
bitfld.long 0x0 16. "CLKODD,Clock divider is odd" "0,1"
|
|
bitfld.long 0x0 14. "PADV,Padding Value" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "FBYTE,Force Byte Transfer" "0,1"
|
|
bitfld.long 0x0 12. "WRPROOF,Write Proof Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "RDPROOF,Read Proof Enable" "0,1"
|
|
bitfld.long 0x0 8.--10. "PWSDIV,Power Saving Divider" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "CLKDIV,Clock Divider"
|
|
line.long 0x4 "DTOR,Data Timeout Register"
|
|
bitfld.long 0x4 4.--6. "DTOMUL,Data Timeout Multiplier" "0: DTOCYC,1: DTOCYC x 16,2: DTOCYC x 128,3: DTOCYC x 256,4: DTOCYC x 1024,5: DTOCYC x 4096,6: DTOCYC x 65536,7: DTOCYC x 1048576"
|
|
hexmask.long.byte 0x4 0.--3. 1. "DTOCYC,Data Timeout Cycle Number"
|
|
line.long 0x8 "SDCR,SD/SDIO Card Register"
|
|
bitfld.long 0x8 6.--7. "SDCBUS,SDCard/SDIO Bus Width" "0: 1 bit,?,2: 4 bits,3: 8 bits"
|
|
bitfld.long 0x8 0.--1. "SDCSEL,SDCard/SDIO Slot" "0: Slot A is selected.,?,?,?"
|
|
line.long 0xC "ARGR,Argument Register"
|
|
hexmask.long 0xC 0.--31. 1. "ARG,Command Argument"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x0 "CMDR,Command Register"
|
|
bitfld.long 0x0 27. "BOOT_ACK,Boot Operation Acknowledge" "0,1"
|
|
bitfld.long 0x0 26. "ATACS,ATA with Command Completion Signal" "0: Normal operation mode.,1: This bit indicates that a completion signal is.."
|
|
newline
|
|
bitfld.long 0x0 24.--25. "IOSPCMD,SDIO Special Command" "0: Not an SDIO Special Command,1: SDIO Suspend Command,2: SDIO Resume Command,?"
|
|
bitfld.long 0x0 19.--21. "TRTYP,Transfer Type" "0: MMC/SD Card Single Block,1: MMC/SD Card Multiple Block,2: MMC Stream,?,4: SDIO Byte,5: SDIO Block,?,?"
|
|
newline
|
|
bitfld.long 0x0 18. "TRDIR,Transfer Direction" "0: Write.,1: Read."
|
|
bitfld.long 0x0 16.--17. "TRCMD,Transfer Command" "0: No data transfer,1: Start data transfer,2: Stop data transfer,?"
|
|
newline
|
|
bitfld.long 0x0 12. "MAXLAT,Max Latency for Command to Response" "0: 5-cycle max latency.,1: 64-cycle max latency."
|
|
bitfld.long 0x0 11. "OPDCMD,Open Drain Command" "0: Push pull command.,1: Open drain command."
|
|
newline
|
|
bitfld.long 0x0 8.--10. "SPCMD,Special Command" "0: Not a special CMD.,1: Initialization CMD: 74 clock cycles for..,2: Synchronized CMD: Wait for the end of the..,3: CE-ATA Completion Signal disable Command. The..,4: Interrupt command: Corresponds to the Interrupt..,5: Interrupt response: Corresponds to the Interrupt..,6: Boot Operation Request. Start a boot operation..,7: End Boot Operation. This command allows the host.."
|
|
bitfld.long 0x0 6.--7. "RSPTYP,Response Type" "0: No response,1: 48-bit response,2: 136-bit response,3: R1b response type"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "CMDNB,Command Number"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "BLKR,Block Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "BLKLEN,Data Block Length"
|
|
hexmask.long.word 0x0 0.--15. 1. "BCNT,MMC/SDIO Block Count - SDIO Byte Count"
|
|
line.long 0x4 "CSTOR,Completion Signal Timeout Register"
|
|
bitfld.long 0x4 4.--6. "CSTOMUL,Completion Signal Timeout Multiplier" "0: CSTOCYC x 1,1: CSTOCYC x 16,2: CSTOCYC x 128,3: CSTOCYC x 256,4: CSTOCYC x 1024,5: CSTOCYC x 4096,6: CSTOCYC x 65536,7: CSTOCYC x 1048576"
|
|
hexmask.long.byte 0x4 0.--3. 1. "CSTOCYC,Completion Signal Timeout Cycle Number"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x20)++0x3
|
|
line.long 0x0 "RSPR[$1],Response Register 0"
|
|
hexmask.long 0x0 0.--31. 1. "RSP,Response"
|
|
repeat.end
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x0 "RDR,Receive Data Register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data to Read"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x0 "TDR,Transmit Data Register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data to Write"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 31. "UNRE,Underrun (if FERRCTRL = 1 cleared by writing in HSMCI_CMDR or cleared on read if FERRCTRL = 0)" "0,1"
|
|
bitfld.long 0x0 30. "OVRE,Overrun (if FERRCTRL = 1 cleared by writing in HSMCI_CMDR or cleared on read if FERRCTRL = 0)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "ACKRCVE,Boot Operation Acknowledge Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 28. "ACKRCV,Boot Operation Acknowledge Received (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "XFRDONE,Transfer Done flag" "0,1"
|
|
bitfld.long 0x0 26. "FIFOEMPTY,FIFO empty flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "BLKOVRE,DMA Block Overrun Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 23. "CSTOE,Completion Signal Time-out Error (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "DTOE,Data Time-out Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 21. "DCRCE,Data CRC Error (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "RTOE,Response Time-out Error (cleared by writing in HSMCI_CMDR)" "0,1"
|
|
bitfld.long 0x0 19. "RENDE,Response End Bit Error (cleared by writing in HSMCI_CMDR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "RCRCE,Response CRC Error (cleared by writing in HSMCI_CMDR)" "0,1"
|
|
bitfld.long 0x0 17. "RDIRE,Response Direction Error (cleared by writing in HSMCI_CMDR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "RINDE,Response Index Error (cleared by writing in HSMCI_CMDR)" "0,1"
|
|
bitfld.long 0x0 13. "CSRCV,CE-ATA Completion Signal Received (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "SDIOWAIT,SDIO Read Wait Operation Status" "0,1"
|
|
bitfld.long 0x0 8. "SDIOIRQA,SDIO Interrupt for Slot A (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "NOTBUSY,HSMCI Not Busy" "0,1"
|
|
bitfld.long 0x0 4. "DTIP,Data Transfer in Progress (cleared at the end of CRC16 calculation)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "BLKE,Data Block Ended (cleared on read)" "0,1"
|
|
bitfld.long 0x0 2. "TXRDY,Transmit Ready (cleared by writing in HSMCI_TDR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXRDY,Receiver Ready (cleared by reading HSMCI_RDR)" "0,1"
|
|
bitfld.long 0x0 0. "CMDRDY,Command Ready (cleared by writing in HSMCI_CMDR)" "0,1"
|
|
wgroup.long 0x44++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 31. "UNRE,Underrun Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 30. "OVRE,Overrun Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "ACKRCVE,Boot Acknowledge Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 28. "ACKRCV,Boot Acknowledge Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "XFRDONE,Transfer Done Interrupt enable" "0,1"
|
|
bitfld.long 0x0 26. "FIFOEMPTY,FIFO empty Interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "BLKOVRE,DMA Block Overrun Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 23. "CSTOE,Completion Signal Timeout Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "DTOE,Data Time-out Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 21. "DCRCE,Data CRC Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "RTOE,Response Time-out Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 19. "RENDE,Response End Bit Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "RCRCE,Response CRC Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 17. "RDIRE,Response Direction Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "RINDE,Response Index Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 13. "CSRCV,Completion Signal Received Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "SDIOWAIT,SDIO Read Wait Operation Status Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 8. "SDIOIRQA,SDIO Interrupt for Slot A Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "NOTBUSY,Data Not Busy Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 4. "DTIP,Data Transfer in Progress Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "BLKE,Data Block Ended Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "TXRDY,Transmit Ready Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXRDY,Receiver Ready Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "CMDRDY,Command Ready Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 31. "UNRE,Underrun Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 30. "OVRE,Overrun Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "ACKRCVE,Boot Acknowledge Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 28. "ACKRCV,Boot Acknowledge Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "XFRDONE,Transfer Done Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 26. "FIFOEMPTY,FIFO empty Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "BLKOVRE,DMA Block Overrun Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 23. "CSTOE,Completion Signal Time out Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "DTOE,Data Time-out Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 21. "DCRCE,Data CRC Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "RTOE,Response Time-out Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 19. "RENDE,Response End Bit Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "RCRCE,Response CRC Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 17. "RDIRE,Response Direction Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "RINDE,Response Index Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 13. "CSRCV,Completion Signal received interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "SDIOWAIT,SDIO Read Wait Operation Status Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 8. "SDIOIRQA,SDIO Interrupt for Slot A Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "NOTBUSY,Data Not Busy Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 4. "DTIP,Data Transfer in Progress Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "BLKE,Data Block Ended Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "TXRDY,Transmit Ready Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "RXRDY,Receiver Ready Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 0. "CMDRDY,Command Ready Interrupt Disable" "0,1"
|
|
rgroup.long 0x4C++0x3
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 31. "UNRE,Underrun Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 30. "OVRE,Overrun Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "ACKRCVE,Boot Operation Acknowledge Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 28. "ACKRCV,Boot Operation Acknowledge Received Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "XFRDONE,Transfer Done Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 26. "FIFOEMPTY,FIFO Empty Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "BLKOVRE,DMA Block Overrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 23. "CSTOE,Completion Signal Time-out Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "DTOE,Data Time-out Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 21. "DCRCE,Data CRC Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "RTOE,Response Time-out Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 19. "RENDE,Response End Bit Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "RCRCE,Response CRC Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 17. "RDIRE,Response Direction Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "RINDE,Response Index Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 13. "CSRCV,Completion Signal Received Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "SDIOWAIT,SDIO Read Wait Operation Status Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 8. "SDIOIRQA,SDIO Interrupt for Slot A Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "NOTBUSY,Data Not Busy Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 4. "DTIP,Data Transfer in Progress Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "BLKE,Data Block Ended Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "TXRDY,Transmit Ready Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXRDY,Receiver Ready Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 0. "CMDRDY,Command Ready Interrupt Mask" "0,1"
|
|
group.long 0x50++0x7
|
|
line.long 0x0 "DMA,DMA Configuration Register"
|
|
bitfld.long 0x0 8. "DMAEN,DMA Hardware Handshaking Enable" "0,1"
|
|
bitfld.long 0x0 4.--6. "CHKSIZE,DMA Channel Read and Write Chunk Size" "0: 1 data available,1: 2 data available,2: 4 data available,3: 8 data available,4: 16 data available,?,?,?"
|
|
line.long 0x4 "CFG,Configuration Register"
|
|
bitfld.long 0x4 12. "LSYNC,Synchronize on the last block" "0,1"
|
|
bitfld.long 0x4 8. "HSMODE,High Speed Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "FERRCTRL,Flow Error flag reset control mode" "0,1"
|
|
bitfld.long 0x4 0. "FIFOMODE,HSMCI Internal FIFO control mode" "0,1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protect Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protect Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
repeat 256. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x200)++0x3
|
|
line.long 0x0 "FIFO[$1],FIFO Memory Aperture0 0"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data to Read or Data to Write"
|
|
repeat.end
|
|
tree.end
|
|
tree "I2SC (Inter-IC Sound Controller)"
|
|
base ad:0x0
|
|
tree "I2SC0"
|
|
base ad:0x4008C000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 7. "SWRST,Software Reset" "0,1"
|
|
bitfld.long 0x0 5. "TXDIS,Transmitter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "TXEN,Transmitter Enable" "0,1"
|
|
bitfld.long 0x0 3. "CKDIS,Clocks Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CKEN,Clocks Enable" "0,1"
|
|
bitfld.long 0x0 1. "RXDIS,Receiver Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXEN,Receiver Enable" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "MR,Mode Register"
|
|
bitfld.long 0x0 31. "IWS,I2SC_WS Slot Width" "0,1"
|
|
bitfld.long 0x0 30. "IMCKMODE,Master Clock Mode" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 24.--29. 1. "IMCKFS,Master Clock to fs Ratio"
|
|
hexmask.long.byte 0x0 16.--21. 1. "IMCKDIV,Selected Clock to I2SC Master Clock Ratio"
|
|
newline
|
|
bitfld.long 0x0 14. "TXSAME,Transmit Data when Underrun" "0,1"
|
|
bitfld.long 0x0 13. "TXDMA,Single or Multiple DMA Controller Channels for Transmitter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "TXMONO,Transmit Mono" "0,1"
|
|
bitfld.long 0x0 10. "RXLOOP,Loopback Test Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "RXDMA,Single or Multiple DMA Controller Channels for Receiver" "0,1"
|
|
bitfld.long 0x0 8. "RXMONO,Receive Mono" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "DATALENGTH,Data Word Length" "0: Data length is set to 32 bits,1: Data length is set to 24 bits,2: Data length is set to 20 bits,3: Data length is set to 18 bits,4: Data length is set to 16 bits,5: Data length is set to 16-bit compact stereo.,6: Data length is set to 8 bits,7: Data length is set to 8-bit compact stereo. Left.."
|
|
bitfld.long 0x0 0. "MODE,Inter-IC Sound Controller Mode" "0: I2SC_CK and I2SC_WS pin inputs used as bit clock..,1: Bit clock and word select/frame synchronization.."
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 20.--21. "TXURCH,Transmit Underrun Channel" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "RXORCH,Receive Overrun Channel" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 6. "TXUR,Transmit Underrun" "0,1"
|
|
bitfld.long 0x0 5. "TXRDY,Transmit Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "TXEN,Transmitter Enabled" "0,1"
|
|
bitfld.long 0x0 2. "RXOR,Receive Overrun" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXRDY,Receive Ready" "0,1"
|
|
bitfld.long 0x0 0. "RXEN,Receiver Enabled" "0,1"
|
|
wgroup.long 0xC++0xF
|
|
line.long 0x0 "SCR,Status Clear Register"
|
|
bitfld.long 0x0 20.--21. "TXURCH,Transmit Underrun Per Channel Status Clear" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "RXORCH,Receive Overrun Per Channel Status Clear" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 6. "TXUR,Transmit Underrun Status Clear" "0,1"
|
|
bitfld.long 0x0 2. "RXOR,Receive Overrun Status Clear" "0,1"
|
|
line.long 0x4 "SSR,Status Set Register"
|
|
bitfld.long 0x4 20.--21. "TXURCH,Transmit Underrun Per Channel Status Set" "0,1,2,3"
|
|
bitfld.long 0x4 8.--9. "RXORCH,Receive Overrun Per Channel Status Set" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 6. "TXUR,Transmit Underrun Status Set" "0,1"
|
|
bitfld.long 0x4 2. "RXOR,Receive Overrun Status Set" "0,1"
|
|
line.long 0x8 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x8 6. "TXUR,Transmit Underflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 5. "TXRDY,Transmit Ready Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "RXOR,Receiver Overrun Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 1. "RXRDY,Receiver Ready Interrupt Enable" "0,1"
|
|
line.long 0xC "IDR,Interrupt Disable Register"
|
|
bitfld.long 0xC 6. "TXUR,Transmit Underflow Interrupt Disable" "0,1"
|
|
bitfld.long 0xC 5. "TXRDY,Transmit Ready Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 2. "RXOR,Receiver Overrun Interrupt Disable" "0,1"
|
|
bitfld.long 0xC 1. "RXRDY,Receiver Ready Interrupt Disable" "0,1"
|
|
rgroup.long 0x1C++0x7
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 6. "TXUR,Transmit Underflow Interrupt Disable" "0,1"
|
|
bitfld.long 0x0 5. "TXRDY,Transmit Ready Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXOR,Receiver Overrun Interrupt Disable" "0,1"
|
|
bitfld.long 0x0 1. "RXRDY,Receiver Ready Interrupt Disable" "0,1"
|
|
line.long 0x4 "RHR,Receiver Holding Register"
|
|
hexmask.long 0x4 0.--31. 1. "RHR,Receiver Holding Register"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "THR,Transmitter Holding Register"
|
|
hexmask.long 0x0 0.--31. 1. "THR,Transmitter Holding Register"
|
|
tree.end
|
|
sif (cpuis("PIC32CZ2051CA70144"))
|
|
tree "I2SC1"
|
|
base ad:0x40090000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 7. "SWRST,Software Reset" "0,1"
|
|
bitfld.long 0x0 5. "TXDIS,Transmitter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "TXEN,Transmitter Enable" "0,1"
|
|
bitfld.long 0x0 3. "CKDIS,Clocks Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CKEN,Clocks Enable" "0,1"
|
|
bitfld.long 0x0 1. "RXDIS,Receiver Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXEN,Receiver Enable" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "MR,Mode Register"
|
|
bitfld.long 0x0 31. "IWS,I2SC_WS Slot Width" "0,1"
|
|
bitfld.long 0x0 30. "IMCKMODE,Master Clock Mode" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 24.--29. 1. "IMCKFS,Master Clock to fs Ratio"
|
|
hexmask.long.byte 0x0 16.--21. 1. "IMCKDIV,Selected Clock to I2SC Master Clock Ratio"
|
|
newline
|
|
bitfld.long 0x0 14. "TXSAME,Transmit Data when Underrun" "0,1"
|
|
bitfld.long 0x0 13. "TXDMA,Single or Multiple DMA Controller Channels for Transmitter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "TXMONO,Transmit Mono" "0,1"
|
|
bitfld.long 0x0 10. "RXLOOP,Loopback Test Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "RXDMA,Single or Multiple DMA Controller Channels for Receiver" "0,1"
|
|
bitfld.long 0x0 8. "RXMONO,Receive Mono" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "DATALENGTH,Data Word Length" "0: Data length is set to 32 bits,1: Data length is set to 24 bits,2: Data length is set to 20 bits,3: Data length is set to 18 bits,4: Data length is set to 16 bits,5: Data length is set to 16-bit compact stereo.,6: Data length is set to 8 bits,7: Data length is set to 8-bit compact stereo. Left.."
|
|
bitfld.long 0x0 0. "MODE,Inter-IC Sound Controller Mode" "0: I2SC_CK and I2SC_WS pin inputs used as bit clock..,1: Bit clock and word select/frame synchronization.."
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 20.--21. "TXURCH,Transmit Underrun Channel" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "RXORCH,Receive Overrun Channel" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 6. "TXUR,Transmit Underrun" "0,1"
|
|
bitfld.long 0x0 5. "TXRDY,Transmit Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "TXEN,Transmitter Enabled" "0,1"
|
|
bitfld.long 0x0 2. "RXOR,Receive Overrun" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXRDY,Receive Ready" "0,1"
|
|
bitfld.long 0x0 0. "RXEN,Receiver Enabled" "0,1"
|
|
wgroup.long 0xC++0xF
|
|
line.long 0x0 "SCR,Status Clear Register"
|
|
bitfld.long 0x0 20.--21. "TXURCH,Transmit Underrun Per Channel Status Clear" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "RXORCH,Receive Overrun Per Channel Status Clear" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 6. "TXUR,Transmit Underrun Status Clear" "0,1"
|
|
bitfld.long 0x0 2. "RXOR,Receive Overrun Status Clear" "0,1"
|
|
line.long 0x4 "SSR,Status Set Register"
|
|
bitfld.long 0x4 20.--21. "TXURCH,Transmit Underrun Per Channel Status Set" "0,1,2,3"
|
|
bitfld.long 0x4 8.--9. "RXORCH,Receive Overrun Per Channel Status Set" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 6. "TXUR,Transmit Underrun Status Set" "0,1"
|
|
bitfld.long 0x4 2. "RXOR,Receive Overrun Status Set" "0,1"
|
|
line.long 0x8 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x8 6. "TXUR,Transmit Underflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 5. "TXRDY,Transmit Ready Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "RXOR,Receiver Overrun Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 1. "RXRDY,Receiver Ready Interrupt Enable" "0,1"
|
|
line.long 0xC "IDR,Interrupt Disable Register"
|
|
bitfld.long 0xC 6. "TXUR,Transmit Underflow Interrupt Disable" "0,1"
|
|
bitfld.long 0xC 5. "TXRDY,Transmit Ready Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 2. "RXOR,Receiver Overrun Interrupt Disable" "0,1"
|
|
bitfld.long 0xC 1. "RXRDY,Receiver Ready Interrupt Disable" "0,1"
|
|
rgroup.long 0x1C++0x7
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 6. "TXUR,Transmit Underflow Interrupt Disable" "0,1"
|
|
bitfld.long 0x0 5. "TXRDY,Transmit Ready Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXOR,Receiver Overrun Interrupt Disable" "0,1"
|
|
bitfld.long 0x0 1. "RXRDY,Receiver Ready Interrupt Disable" "0,1"
|
|
line.long 0x4 "RHR,Receiver Holding Register"
|
|
hexmask.long 0x4 0.--31. 1. "RHR,Receiver Holding Register"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "THR,Transmitter Holding Register"
|
|
hexmask.long 0x0 0.--31. 1. "THR,Transmitter Holding Register"
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "ICM (Integrity Check Monitor)"
|
|
base ad:0x40048000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CFG,Configuration Register"
|
|
bitfld.long 0x0 13.--15. "UALGO,User SHA Algorithm" "0: SHA1 algorithm processed,1: SHA256 algorithm processed,?,?,4: SHA224 algorithm processed,?,?,?"
|
|
bitfld.long 0x0 12. "UIHASH,User Initial Hash Value" "0,1"
|
|
bitfld.long 0x0 9. "DUALBUFF,Dual Input Buffer" "0,1"
|
|
bitfld.long 0x0 8. "ASCD,Automatic Switch To Compare Digest" "0,1"
|
|
hexmask.long.byte 0x0 4.--7. 1. "BBC,Bus Burden Control"
|
|
bitfld.long 0x0 2. "SLBDIS,Secondary List Branching Disable" "0,1"
|
|
bitfld.long 0x0 1. "EOMDIS,End of Monitoring Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "WBDIS,Write Back Disable" "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x0 "CTRL,Control Register"
|
|
hexmask.long.byte 0x0 12.--15. 1. "RMEN,Region Monitoring Enable"
|
|
hexmask.long.byte 0x0 8.--11. 1. "RMDIS,Region Monitoring Disable"
|
|
hexmask.long.byte 0x0 4.--7. 1. "REHASH,Recompute Internal Hash"
|
|
bitfld.long 0x0 2. "SWRST,Software Reset" "0,1"
|
|
bitfld.long 0x0 1. "DISABLE,ICM Disable Register" "0,1"
|
|
bitfld.long 0x0 0. "ENABLE,ICM Enable" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
hexmask.long.byte 0x0 12.--15. 1. "RMDIS,Region Monitoring Disabled Status"
|
|
hexmask.long.byte 0x0 8.--11. 1. "RAWRMDIS,Region Monitoring Disabled Raw Status"
|
|
bitfld.long 0x0 0. "ENABLE,ICM Controller Enable Register" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 24. "URAD,Undefined Register Access Detection Interrupt Enable" "0,1"
|
|
hexmask.long.byte 0x0 20.--23. 1. "RSU,Region Status Updated Interrupt Disable"
|
|
hexmask.long.byte 0x0 16.--19. 1. "REC,Region End bit Condition Detected Interrupt Enable"
|
|
hexmask.long.byte 0x0 12.--15. 1. "RWC,Region Wrap Condition detected Interrupt Enable"
|
|
hexmask.long.byte 0x0 8.--11. 1. "RBE,Region Bus Error Interrupt Enable"
|
|
hexmask.long.byte 0x0 4.--7. 1. "RDM,Region Digest Mismatch Interrupt Enable"
|
|
hexmask.long.byte 0x0 0.--3. 1. "RHC,Region Hash Completed Interrupt Enable"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 24. "URAD,Undefined Register Access Detection Interrupt Disable" "0,1"
|
|
hexmask.long.byte 0x4 20.--23. 1. "RSU,Region Status Updated Interrupt Disable"
|
|
hexmask.long.byte 0x4 16.--19. 1. "REC,Region End bit Condition detected Interrupt Disable"
|
|
hexmask.long.byte 0x4 12.--15. 1. "RWC,Region Wrap Condition Detected Interrupt Disable"
|
|
hexmask.long.byte 0x4 8.--11. 1. "RBE,Region Bus Error Interrupt Disable"
|
|
hexmask.long.byte 0x4 4.--7. 1. "RDM,Region Digest Mismatch Interrupt Disable"
|
|
hexmask.long.byte 0x4 0.--3. 1. "RHC,Region Hash Completed Interrupt Disable"
|
|
rgroup.long 0x18++0xB
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 24. "URAD,Undefined Register Access Detection Interrupt Mask" "0,1"
|
|
hexmask.long.byte 0x0 20.--23. 1. "RSU,Region Status Updated Interrupt Mask"
|
|
hexmask.long.byte 0x0 16.--19. 1. "REC,Region End bit Condition Detected Interrupt Mask"
|
|
hexmask.long.byte 0x0 12.--15. 1. "RWC,Region Wrap Condition Detected Interrupt Mask"
|
|
hexmask.long.byte 0x0 8.--11. 1. "RBE,Region Bus Error Interrupt Mask"
|
|
hexmask.long.byte 0x0 4.--7. 1. "RDM,Region Digest Mismatch Interrupt Mask"
|
|
hexmask.long.byte 0x0 0.--3. 1. "RHC,Region Hash Completed Interrupt Mask"
|
|
line.long 0x4 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x4 24. "URAD,Undefined Register Access Detection Status" "0,1"
|
|
hexmask.long.byte 0x4 20.--23. 1. "RSU,Region Status Updated Detected"
|
|
hexmask.long.byte 0x4 16.--19. 1. "REC,Region End bit Condition Detected"
|
|
hexmask.long.byte 0x4 12.--15. 1. "RWC,Region Wrap Condition Detected"
|
|
hexmask.long.byte 0x4 8.--11. 1. "RBE,Region Bus Error"
|
|
hexmask.long.byte 0x4 4.--7. 1. "RDM,Region Digest Mismatch"
|
|
hexmask.long.byte 0x4 0.--3. 1. "RHC,Region Hash Completed"
|
|
line.long 0x8 "UASR,Undefined Access Status Register"
|
|
bitfld.long 0x8 0.--2. "URAT,Undefined Register Access Trace" "0: Unspecified structure member set to one detected..,1: ICM_CFG modified during active monitoring.,2: ICM_DSCR modified during active monitoring.,3: ICM_HASH modified during active monitoring,4: Write-only register read access,?,?,?"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "DSCR,Region Descriptor Area Start Address Register"
|
|
hexmask.long 0x0 6.--31. 1. "DASA,Descriptor Area Start Address"
|
|
line.long 0x4 "HASH,Region Hash Area Start Address Register"
|
|
hexmask.long 0x4 7.--31. 1. "HASA,Hash Area Start Address"
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x38)++0x3
|
|
line.long 0x0 "UIHVAL[$1],User Initial Hash Value 0 Register 0"
|
|
hexmask.long 0x0 0.--31. 1. "VAL,Initial Hash Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "ISI (Image Sensor Interface)"
|
|
base ad:0x4004C000
|
|
group.long 0x0++0x23
|
|
line.long 0x0 "CFG1,ISI Configuration 1 Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "SFD,Start of Frame Delay"
|
|
hexmask.long.byte 0x0 16.--23. 1. "SLD,Start of Line Delay"
|
|
newline
|
|
bitfld.long 0x0 13.--14. "THMASK,Threshold Mask" "0: Only 4 beats AHB burst allowed,1: Only 4 and 8 beats AHB burst allowed,2: 4 8 and 16 beats AHB burst allowed,?"
|
|
bitfld.long 0x0 12. "FULL,Full Mode is Allowed" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "DISCR,Disable Codec Request" "0,1"
|
|
bitfld.long 0x0 8.--10. "FRATE,Frame Rate [0..7]" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 7. "CRC_SYNC,Embedded Synchronization Correction" "0,1"
|
|
bitfld.long 0x0 6. "EMB_SYNC,Embedded Synchronization" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "GRAYLE,Grayscale Little Endian" "0,1"
|
|
bitfld.long 0x0 4. "PIXCLK_POL,Pixel Clock Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "VSYNC_POL,Vertical Synchronization Polarity" "0,1"
|
|
bitfld.long 0x0 2. "HSYNC_POL,Horizontal Synchronization Polarity" "0,1"
|
|
line.long 0x4 "CFG2,ISI Configuration 2 Register"
|
|
bitfld.long 0x4 30.--31. "RGB_CFG,RGB Pixel Mapping Configuration" "0: Byte 0 R/G(MSB)Byte 1 G(LSB)/BByte 2..,1: Byte 0 B/G(MSB)Byte 1 G(LSB)/RByte 2..,2: Byte 0 G(LSB)/RByte 1 B/G(MSB)Byte 2..,3: Byte 0 G(LSB)/BByte 1 R/G(MSB)Byte 2.."
|
|
bitfld.long 0x4 28.--29. "YCC_SWAP,YCrCb Format Swap Mode" "0: Byte 0 Cb(i)Byte 1 Y(i)Byte 2 Cr(i)Byte 3 Y(i+1),1: Byte 0 Cr(i)Byte 1 Y(i)Byte 2 Cb(i)Byte 3 Y(i+1),2: Byte 0 Y(i)Byte 1 Cb(i)Byte 2 Y(i+1)Byte 3 Cr(i),3: Byte 0 Y(i)Byte 1 Cr(i)Byte 2 Y(i+1)Byte 3 Cb(i)"
|
|
newline
|
|
hexmask.long.word 0x4 16.--26. 1. "IM_HSIZE,Horizontal Size of the Image Sensor [0..2047]"
|
|
bitfld.long 0x4 15. "COL_SPACE,Color Space for the Image Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "RGB_SWAP,RGB Format Swap Mode" "0,1"
|
|
bitfld.long 0x4 13. "GRAYSCALE,Grayscale Mode Format Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "RGB_MODE,RGB Input Mode" "0,1"
|
|
bitfld.long 0x4 11. "GS_MODE,Grayscale Pixel Format Mode" "0,1"
|
|
newline
|
|
hexmask.long.word 0x4 0.--10. 1. "IM_VSIZE,Vertical Size of the Image Sensor [0..2047]"
|
|
line.long 0x8 "PSIZE,ISI Preview Size Register"
|
|
hexmask.long.word 0x8 16.--25. 1. "PREV_HSIZE,Horizontal Size for the Preview Path"
|
|
hexmask.long.word 0x8 0.--9. 1. "PREV_VSIZE,Vertical Size for the Preview Path"
|
|
line.long 0xC "PDECF,ISI Preview Decimation Factor Register"
|
|
hexmask.long.byte 0xC 0.--7. 1. "DEC_FACTOR,Decimation Factor"
|
|
line.long 0x10 "Y2R_SET0,ISI Color Space Conversion YCrCb To RGB Set 0 Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. "C3,Color Space Conversion Matrix Coefficient C3"
|
|
hexmask.long.byte 0x10 16.--23. 1. "C2,Color Space Conversion Matrix Coefficient C2"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--15. 1. "C1,Color Space Conversion Matrix Coefficient C1"
|
|
hexmask.long.byte 0x10 0.--7. 1. "C0,Color Space Conversion Matrix Coefficient C0"
|
|
line.long 0x14 "Y2R_SET1,ISI Color Space Conversion YCrCb To RGB Set 1 Register"
|
|
bitfld.long 0x14 14. "Cboff,Color Space Conversion Blue Chrominance Default Offset" "0,1"
|
|
bitfld.long 0x14 13. "Croff,Color Space Conversion Red Chrominance Default Offset" "0,1"
|
|
newline
|
|
bitfld.long 0x14 12. "Yoff,Color Space Conversion Luminance Default Offset" "0,1"
|
|
hexmask.long.word 0x14 0.--8. 1. "C4,Color Space Conversion Matrix Coefficient C4"
|
|
line.long 0x18 "R2Y_SET0,ISI Color Space Conversion RGB To YCrCb Set 0 Register"
|
|
bitfld.long 0x18 24. "Roff,Color Space Conversion Red Component Offset" "0,1"
|
|
hexmask.long.byte 0x18 16.--22. 1. "C2,Color Space Conversion Matrix Coefficient C2"
|
|
newline
|
|
hexmask.long.byte 0x18 8.--14. 1. "C1,Color Space Conversion Matrix Coefficient C1"
|
|
hexmask.long.byte 0x18 0.--6. 1. "C0,Color Space Conversion Matrix Coefficient C0"
|
|
line.long 0x1C "R2Y_SET1,ISI Color Space Conversion RGB To YCrCb Set 1 Register"
|
|
bitfld.long 0x1C 24. "Goff,Color Space Conversion Green Component Offset" "0,1"
|
|
hexmask.long.byte 0x1C 16.--22. 1. "C5,Color Space Conversion Matrix Coefficient C5"
|
|
newline
|
|
hexmask.long.byte 0x1C 8.--14. 1. "C4,Color Space Conversion Matrix Coefficient C4"
|
|
hexmask.long.byte 0x1C 0.--6. 1. "C3,Color Space Conversion Matrix Coefficient C3"
|
|
line.long 0x20 "R2Y_SET2,ISI Color Space Conversion RGB To YCrCb Set 2 Register"
|
|
bitfld.long 0x20 24. "Boff,Color Space Conversion Blue Component Offset" "0,1"
|
|
hexmask.long.byte 0x20 16.--22. 1. "C8,Color Space Conversion Matrix Coefficient C8"
|
|
newline
|
|
hexmask.long.byte 0x20 8.--14. 1. "C7,Color Space Conversion Matrix Coefficient C7"
|
|
hexmask.long.byte 0x20 0.--6. 1. "C6,Color Space Conversion Matrix Coefficient C6"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "CR,ISI Control Register"
|
|
bitfld.long 0x0 8. "ISI_CDC,ISI Codec Request" "0,1"
|
|
bitfld.long 0x0 2. "ISI_SRST,ISI Software Reset Request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ISI_DIS,ISI Module Disable Request" "0,1"
|
|
bitfld.long 0x0 0. "ISI_EN,ISI Module Enable Request" "0,1"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "SR,ISI Status Register"
|
|
bitfld.long 0x0 27. "FR_OVR,Frame Rate Overrun (cleared on read)" "0,1"
|
|
bitfld.long 0x0 26. "CRC_ERR,CRC Synchronization Error (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "C_OVR,Codec Datapath Overflow (cleared on read)" "0,1"
|
|
bitfld.long 0x0 24. "P_OVR,Preview Datapath Overflow (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "SIP,Synchronization in Progress" "0,1"
|
|
bitfld.long 0x0 17. "CXFR_DONE,Codec DMA Transfer has Terminated (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PXFR_DONE,Preview DMA Transfer has Terminated (cleared on read)" "0,1"
|
|
bitfld.long 0x0 10. "VSYNC,Vertical Synchronization (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "CDC_PND,Pending Codec Request" "0,1"
|
|
bitfld.long 0x0 2. "SRST,Module Software Reset Request has Terminated (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "DIS_DONE,Module Disable Request has Terminated (cleared on read)" "0,1"
|
|
bitfld.long 0x0 0. "ENABLE,Module Enable" "0,1"
|
|
wgroup.long 0x2C++0x7
|
|
line.long 0x0 "IER,ISI Interrupt Enable Register"
|
|
bitfld.long 0x0 27. "FR_OVR,Frame Rate Overflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 26. "CRC_ERR,Embedded Synchronization CRC Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "C_OVR,Codec Datapath Overflow Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 24. "P_OVR,Preview Datapath Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CXFR_DONE,Codec DMA Transfer Done Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 16. "PXFR_DONE,Preview DMA Transfer Done Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "VSYNC,Vertical Synchronization Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "SRST,Software Reset Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "DIS_DONE,Disable Done Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR,ISI Interrupt Disable Register"
|
|
bitfld.long 0x4 27. "FR_OVR,Frame Rate Overflow Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 26. "CRC_ERR,Embedded Synchronization CRC Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "C_OVR,Codec Datapath Overflow Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 24. "P_OVR,Preview Datapath Overflow Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CXFR_DONE,Codec DMA Transfer Done Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 16. "PXFR_DONE,Preview DMA Transfer Done Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "VSYNC,Vertical Synchronization Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "SRST,Software Reset Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "DIS_DONE,Disable Done Interrupt Disable" "0,1"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x0 "IMR,ISI Interrupt Mask Register"
|
|
bitfld.long 0x0 27. "FR_OVR,Frame Rate Overrun" "0,1"
|
|
bitfld.long 0x0 26. "CRC_ERR,CRC Synchronization Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "C_OVR,Codec FIFO Overflow" "0,1"
|
|
bitfld.long 0x0 24. "P_OVR,Preview FIFO Overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CXFR_DONE,Codec DMA Transfer Completed" "0,1"
|
|
bitfld.long 0x0 16. "PXFR_DONE,Preview DMA Transfer Completed" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "VSYNC,Vertical Synchronization" "0,1"
|
|
bitfld.long 0x0 2. "SRST,Software Reset Completed" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "DIS_DONE,Module Disable Operation Completed" "0,1"
|
|
wgroup.long 0x38++0x7
|
|
line.long 0x0 "DMA_CHER,DMA Channel Enable Register"
|
|
bitfld.long 0x0 1. "C_CH_EN,Codec Channel Enable" "0,1"
|
|
bitfld.long 0x0 0. "P_CH_EN,Preview Channel Enable" "0,1"
|
|
line.long 0x4 "DMA_CHDR,DMA Channel Disable Register"
|
|
bitfld.long 0x4 1. "C_CH_DIS,Codec Channel Disable Request" "0,1"
|
|
bitfld.long 0x4 0. "P_CH_DIS,Preview Channel Disable Request" "0,1"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "DMA_CHSR,DMA Channel Status Register"
|
|
bitfld.long 0x0 1. "C_CH_S,Code DMA Channel Status" "0,1"
|
|
bitfld.long 0x0 0. "P_CH_S,Preview DMA Channel Status" "0,1"
|
|
group.long 0x44++0x17
|
|
line.long 0x0 "DMA_P_ADDR,DMA Preview Base Address Register"
|
|
hexmask.long 0x0 2.--31. 1. "P_ADDR,Preview Image Base Address"
|
|
line.long 0x4 "DMA_P_CTRL,DMA Preview Control Register"
|
|
bitfld.long 0x4 3. "P_DONE,Preview Transfer Done" "0,1"
|
|
bitfld.long 0x4 2. "P_IEN,Transfer Done Flag Control" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P_WB,Descriptor Writeback Control Bit" "0,1"
|
|
bitfld.long 0x4 0. "P_FETCH,Descriptor Fetch Control Bit" "0,1"
|
|
line.long 0x8 "DMA_P_DSCR,DMA Preview Descriptor Address Register"
|
|
hexmask.long 0x8 2.--31. 1. "P_DSCR,Preview Descriptor Base Address"
|
|
line.long 0xC "DMA_C_ADDR,DMA Codec Base Address Register"
|
|
hexmask.long 0xC 2.--31. 1. "C_ADDR,Codec Image Base Address"
|
|
line.long 0x10 "DMA_C_CTRL,DMA Codec Control Register"
|
|
bitfld.long 0x10 3. "C_DONE,Codec Transfer Done" "0,1"
|
|
bitfld.long 0x10 2. "C_IEN,Transfer Done Flag Control" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "C_WB,Descriptor Writeback Control Bit" "0,1"
|
|
bitfld.long 0x10 0. "C_FETCH,Descriptor Fetch Control Bit" "0,1"
|
|
line.long 0x14 "DMA_C_DSCR,DMA Codec Descriptor Address Register"
|
|
hexmask.long 0x14 2.--31. 1. "C_DSCR,Codec Descriptor Base Address"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key Password"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
tree.end
|
|
tree "LOCKBIT"
|
|
base ad:0x0
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "WORD0,Lock Bits Word 0"
|
|
bitfld.long 0x0 31. "LOCK_REGION_31,Lock Region 31" "0,1"
|
|
bitfld.long 0x0 30. "LOCK_REGION_30,Lock Region 30" "0,1"
|
|
bitfld.long 0x0 29. "LOCK_REGION_29,Lock Region 29" "0,1"
|
|
bitfld.long 0x0 28. "LOCK_REGION_28,Lock Region 28" "0,1"
|
|
bitfld.long 0x0 27. "LOCK_REGION_27,Lock Region 27" "0,1"
|
|
bitfld.long 0x0 26. "LOCK_REGION_26,Lock Region 26" "0,1"
|
|
bitfld.long 0x0 25. "LOCK_REGION_25,Lock Region 25" "0,1"
|
|
bitfld.long 0x0 24. "LOCK_REGION_24,Lock Region 24" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "LOCK_REGION_23,Lock Region 23" "0,1"
|
|
bitfld.long 0x0 22. "LOCK_REGION_22,Lock Region 22" "0,1"
|
|
bitfld.long 0x0 21. "LOCK_REGION_21,Lock Region 21" "0,1"
|
|
bitfld.long 0x0 20. "LOCK_REGION_20,Lock Region 20" "0,1"
|
|
bitfld.long 0x0 19. "LOCK_REGION_19,Lock Region 19" "0,1"
|
|
bitfld.long 0x0 18. "LOCK_REGION_18,Lock Region 18" "0,1"
|
|
bitfld.long 0x0 17. "LOCK_REGION_17,Lock Region 17" "0,1"
|
|
bitfld.long 0x0 16. "LOCK_REGION_16,Lock Region 16" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "LOCK_REGION_15,Lock Region 15" "0,1"
|
|
bitfld.long 0x0 14. "LOCK_REGION_14,Lock Region 14" "0,1"
|
|
bitfld.long 0x0 13. "LOCK_REGION_13,Lock Region 13" "0,1"
|
|
bitfld.long 0x0 12. "LOCK_REGION_12,Lock Region 12" "0,1"
|
|
bitfld.long 0x0 11. "LOCK_REGION_11,Lock Region 11" "0,1"
|
|
bitfld.long 0x0 10. "LOCK_REGION_10,Lock Region 10" "0,1"
|
|
bitfld.long 0x0 9. "LOCK_REGION_9,Lock Region 9" "0,1"
|
|
bitfld.long 0x0 8. "LOCK_REGION_8,Lock Region 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "LOCK_REGION_7,Lock Region 7" "0,1"
|
|
bitfld.long 0x0 6. "LOCK_REGION_6,Lock Region 6" "0,1"
|
|
bitfld.long 0x0 5. "LOCK_REGION_5,Lock Region 5" "0,1"
|
|
bitfld.long 0x0 4. "LOCK_REGION_4,Lock Region 4" "0,1"
|
|
bitfld.long 0x0 3. "LOCK_REGION_3,Lock Region 3" "0,1"
|
|
bitfld.long 0x0 2. "LOCK_REGION_2,Lock Region 2" "0,1"
|
|
bitfld.long 0x0 1. "LOCK_REGION_1,Lock Region 1" "0,1"
|
|
bitfld.long 0x0 0. "LOCK_REGION_0,Lock Region 0" "0,1"
|
|
line.long 0x4 "WORD1,Lock Bits Word 1"
|
|
bitfld.long 0x4 31. "LOCK_REGION_63,Lock Region 63" "0,1"
|
|
bitfld.long 0x4 30. "LOCK_REGION_62,Lock Region 62" "0,1"
|
|
bitfld.long 0x4 29. "LOCK_REGION_61,Lock Region 61" "0,1"
|
|
bitfld.long 0x4 28. "LOCK_REGION_60,Lock Region 60" "0,1"
|
|
bitfld.long 0x4 27. "LOCK_REGION_59,Lock Region 59" "0,1"
|
|
bitfld.long 0x4 26. "LOCK_REGION_58,Lock Region 58" "0,1"
|
|
bitfld.long 0x4 25. "LOCK_REGION_57,Lock Region 57" "0,1"
|
|
bitfld.long 0x4 24. "LOCK_REGION_56,Lock Region 56" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "LOCK_REGION_55,Lock Region 55" "0,1"
|
|
bitfld.long 0x4 22. "LOCK_REGION_54,Lock Region 54" "0,1"
|
|
bitfld.long 0x4 21. "LOCK_REGION_53,Lock Region 53" "0,1"
|
|
bitfld.long 0x4 20. "LOCK_REGION_52,Lock Region 52" "0,1"
|
|
bitfld.long 0x4 19. "LOCK_REGION_51,Lock Region 51" "0,1"
|
|
bitfld.long 0x4 18. "LOCK_REGION_50,Lock Region 50" "0,1"
|
|
bitfld.long 0x4 17. "LOCK_REGION_49,Lock Region 49" "0,1"
|
|
bitfld.long 0x4 16. "LOCK_REGION_48,Lock Region 48" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "LOCK_REGION_47,Lock Region 47" "0,1"
|
|
bitfld.long 0x4 14. "LOCK_REGION_46,Lock Region 46" "0,1"
|
|
bitfld.long 0x4 13. "LOCK_REGION_45,Lock Region 45" "0,1"
|
|
bitfld.long 0x4 12. "LOCK_REGION_44,Lock Region 44" "0,1"
|
|
bitfld.long 0x4 11. "LOCK_REGION_43,Lock Region 43" "0,1"
|
|
bitfld.long 0x4 10. "LOCK_REGION_42,Lock Region 42" "0,1"
|
|
bitfld.long 0x4 9. "LOCK_REGION_41,Lock Region 41" "0,1"
|
|
bitfld.long 0x4 8. "LOCK_REGION_40,Lock Region 40" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "LOCK_REGION_39,Lock Region 39" "0,1"
|
|
bitfld.long 0x4 6. "LOCK_REGION_38,Lock Region 38" "0,1"
|
|
bitfld.long 0x4 5. "LOCK_REGION_37,Lock Region 37" "0,1"
|
|
bitfld.long 0x4 4. "LOCK_REGION_36,Lock Region 36" "0,1"
|
|
bitfld.long 0x4 3. "LOCK_REGION_35,Lock Region 35" "0,1"
|
|
bitfld.long 0x4 2. "LOCK_REGION_34,Lock Region 34" "0,1"
|
|
bitfld.long 0x4 1. "LOCK_REGION_33,Lock Region 33" "0,1"
|
|
bitfld.long 0x4 0. "LOCK_REGION_32,Lock Region 32" "0,1"
|
|
sif (cpuis("PIC32CZ2051CA70064")||cpuis("PIC32CZ2051CA70100")||cpuis("PIC32CZ2051CA70144"))
|
|
group.long 0x8++0x7
|
|
line.long 0x0 "WORD2,Lock Bits Word 2"
|
|
bitfld.long 0x0 31. "LOCK_REGION_95,Lock Region 95" "0,1"
|
|
bitfld.long 0x0 30. "LOCK_REGION_94,Lock Region 94" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "LOCK_REGION_93,Lock Region 93" "0,1"
|
|
bitfld.long 0x0 28. "LOCK_REGION_92,Lock Region 92" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LOCK_REGION_91,Lock Region 91" "0,1"
|
|
bitfld.long 0x0 26. "LOCK_REGION_90,Lock Region 90" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LOCK_REGION_89,Lock Region 89" "0,1"
|
|
bitfld.long 0x0 24. "LOCK_REGION_88,Lock Region 88" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "LOCK_REGION_87,Lock Region 87" "0,1"
|
|
bitfld.long 0x0 22. "LOCK_REGION_86,Lock Region 86" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "LOCK_REGION_85,Lock Region 85" "0,1"
|
|
bitfld.long 0x0 20. "LOCK_REGION_84,Lock Region 84" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "LOCK_REGION_83,Lock Region 83" "0,1"
|
|
bitfld.long 0x0 18. "LOCK_REGION_82,Lock Region 82" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "LOCK_REGION_81,Lock Region 81" "0,1"
|
|
bitfld.long 0x0 16. "LOCK_REGION_80,Lock Region 80" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "LOCK_REGION_79,Lock Region 79" "0,1"
|
|
bitfld.long 0x0 14. "LOCK_REGION_78,Lock Region 78" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "LOCK_REGION_77,Lock Region 77" "0,1"
|
|
bitfld.long 0x0 12. "LOCK_REGION_76,Lock Region 76" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "LOCK_REGION_75,Lock Region 75" "0,1"
|
|
bitfld.long 0x0 10. "LOCK_REGION_74,Lock Region 74" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "LOCK_REGION_73,Lock Region 73" "0,1"
|
|
bitfld.long 0x0 8. "LOCK_REGION_72,Lock Region 72" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "LOCK_REGION_71,Lock Region 71" "0,1"
|
|
bitfld.long 0x0 6. "LOCK_REGION_70,Lock Region 70" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "LOCK_REGION_69,Lock Region 69" "0,1"
|
|
bitfld.long 0x0 4. "LOCK_REGION_68,Lock Region 68" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "LOCK_REGION_67,Lock Region 67" "0,1"
|
|
bitfld.long 0x0 2. "LOCK_REGION_66,Lock Region 66" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "LOCK_REGION_65,Lock Region 65" "0,1"
|
|
bitfld.long 0x0 0. "LOCK_REGION_64,Lock Region 64" "0,1"
|
|
line.long 0x4 "WORD3,Lock Bits Word 3"
|
|
bitfld.long 0x4 31. "LOCK_REGION_127,Lock Region 127" "0,1"
|
|
bitfld.long 0x4 30. "LOCK_REGION_126,Lock Region 126" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "LOCK_REGION_125,Lock Region 125" "0,1"
|
|
bitfld.long 0x4 28. "LOCK_REGION_124,Lock Region 124" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "LOCK_REGION_123,Lock Region 123" "0,1"
|
|
bitfld.long 0x4 26. "LOCK_REGION_122,Lock Region 122" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "LOCK_REGION_121,Lock Region 121" "0,1"
|
|
bitfld.long 0x4 24. "LOCK_REGION_120,Lock Region 120" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "LOCK_REGION_119,Lock Region 119" "0,1"
|
|
bitfld.long 0x4 22. "LOCK_REGION_118,Lock Region 118" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "LOCK_REGION_117,Lock Region 117" "0,1"
|
|
bitfld.long 0x4 20. "LOCK_REGION_116,Lock Region 116" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "LOCK_REGION_115,Lock Region 115" "0,1"
|
|
bitfld.long 0x4 18. "LOCK_REGION_114,Lock Region 114" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "LOCK_REGION_113,Lock Region 113" "0,1"
|
|
bitfld.long 0x4 16. "LOCK_REGION_112,Lock Region 112" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "LOCK_REGION_111,Lock Region 111" "0,1"
|
|
bitfld.long 0x4 14. "LOCK_REGION_110,Lock Region 110" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "LOCK_REGION_109,Lock Region 109" "0,1"
|
|
bitfld.long 0x4 12. "LOCK_REGION_108,Lock Region 108" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "LOCK_REGION_107,Lock Region 107" "0,1"
|
|
bitfld.long 0x4 10. "LOCK_REGION_106,Lock Region 106" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "LOCK_REGION_105,Lock Region 105" "0,1"
|
|
bitfld.long 0x4 8. "LOCK_REGION_104,Lock Region 104" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "LOCK_REGION_103,Lock Region 103" "0,1"
|
|
bitfld.long 0x4 6. "LOCK_REGION_102,Lock Region 102" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "LOCK_REGION_101,Lock Region 101" "0,1"
|
|
bitfld.long 0x4 4. "LOCK_REGION_100,Lock Region 100" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "LOCK_REGION_99,Lock Region 99" "0,1"
|
|
bitfld.long 0x4 2. "LOCK_REGION_98,Lock Region 98" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "LOCK_REGION_97,Lock Region 97" "0,1"
|
|
bitfld.long 0x4 0. "LOCK_REGION_96,Lock Region 96" "0,1"
|
|
endif
|
|
tree.end
|
|
tree "MATRIX (AHB Bus Matrix)"
|
|
base ad:0x40088000
|
|
repeat 13. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2)++0x3
|
|
line.long 0x0 "MCFG[$1],Master Configuration Register 0"
|
|
bitfld.long 0x0 0.--2. "ULBT,Undefined Length Burst Type" "0: Unlimited Length Burst-No predicted end of burst..,1: Single Access-The undefined length burst is..,2: 4-beat Burst-The undefined length burst or..,3: 8-beat Burst-The undefined length burst or..,4: 16-beat Burst-The undefined length burst or..,5: 32-beat Burst -The undefined length burst or..,6: 64-beat Burst-The undefined length burst or..,7: 128-beat Burst-The undefined length burst or.."
|
|
repeat.end
|
|
repeat 9. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x40)++0x3
|
|
line.long 0x0 "SCFG[$1],Slave Configuration Register 0"
|
|
hexmask.long.byte 0x0 18.--21. 1. "FIXED_DEFMSTR,Fixed Default Master"
|
|
bitfld.long 0x0 16.--17. "DEFMSTR_TYPE,Default Master Type" "0: No Default Master-At the end of the current..,1: Last Default Master-At the end of the current..,2: Fixed Default Master-At the end of the current..,?"
|
|
newline
|
|
hexmask.long.word 0x0 0.--8. 1. "SLOT_CYCLE,Maximum Bus Grant Duration for Masters"
|
|
repeat.end
|
|
repeat 9. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8)(list ad:0x40088080 ad:0x40088088 ad:0x40088090 ad:0x40088098 ad:0x400880A0 ad:0x400880A8 ad:0x400880B0 ad:0x400880B8 ad:0x400880C0)
|
|
tree "MATRIX_PR[$1]"
|
|
base $2
|
|
group.long ($2)++0x7
|
|
line.long 0x0 "PRAS,Priority Register A for Slave 0"
|
|
bitfld.long 0x0 28.--29. "M7PR,Master 7 Priority" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "M6PR,Master 6 Priority" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "M5PR,Master 5 Priority" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "M4PR,Master 4 Priority" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "M3PR,Master 3 Priority" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "M2PR,Master 2 Priority" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "M1PR,Master 1 Priority" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "M0PR,Master 0 Priority" "0,1,2,3"
|
|
line.long 0x4 "PRBS,Priority Register B for Slave 0"
|
|
bitfld.long 0x4 16.--17. "M12PR,Master 12 Priority" "0,1,2,3"
|
|
bitfld.long 0x4 12.--13. "M11PR,Master 11 Priority" "0,1,2,3"
|
|
bitfld.long 0x4 8.--9. "M10PR,Master 10 Priority" "0,1,2,3"
|
|
bitfld.long 0x4 4.--5. "M9PR,Master 9 Priority" "0,1,2,3"
|
|
bitfld.long 0x4 0.--1. "M8PR,Master 8 Priority" "0,1,2,3"
|
|
tree.end
|
|
repeat.end
|
|
base ad:0x40088000
|
|
newline
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "MRCR,Master Remap Control Register"
|
|
bitfld.long 0x0 12. "RCB12,Remap Command Bit for Master 12" "0,1"
|
|
bitfld.long 0x0 11. "RCB11,Remap Command Bit for Master 11" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "RCB10,Remap Command Bit for Master 10" "0,1"
|
|
bitfld.long 0x0 9. "RCB9,Remap Command Bit for Master 9" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "RCB8,Remap Command Bit for Master 8" "0,1"
|
|
bitfld.long 0x0 7. "RCB7,Remap Command Bit for Master 7" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RCB6,Remap Command Bit for Master 6" "0,1"
|
|
bitfld.long 0x0 5. "RCB5,Remap Command Bit for Master 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RCB4,Remap Command Bit for Master 4" "0,1"
|
|
bitfld.long 0x0 3. "RCB3,Remap Command Bit for Master 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RCB2,Remap Command Bit for Master 2" "0,1"
|
|
bitfld.long 0x0 1. "RCB1,Remap Command Bit for Master 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RCB0,Remap Command Bit for Master 0" "0,1"
|
|
group.long 0x110++0xF
|
|
line.long 0x0 "CCFG_CAN0,CAN0 Configuration Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CAN0DMABA,CAN0 DMA Base Address"
|
|
line.long 0x4 "CCFG_SYSIO,System I/O and CAN1 Configuration Register"
|
|
hexmask.long.word 0x4 16.--31. 1. "CAN1DMABA,CAN1 DMA Base Address"
|
|
bitfld.long 0x4 12. "SYSIO12,PB12 or ERASE Assignment" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "SYSIO7,PB7 or TCK/SWCLK Assignment" "0,1"
|
|
bitfld.long 0x4 6. "SYSIO6,PB6 or TMS/SWDIO Assignment" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "SYSIO5,PB5 or TDO/TRACESWO Assignment" "0,1"
|
|
bitfld.long 0x4 4. "SYSIO4,PB4 or TDI Assignment" "0,1"
|
|
line.long 0x8 "CCFG_PCCR,Peripheral Clock Configuration Register"
|
|
bitfld.long 0x8 22. "I2SC1CC,I2SC1 Clock Configuration" "0,1"
|
|
bitfld.long 0x8 21. "I2SC0CC,I2SC0 Clock Configuration" "0,1"
|
|
newline
|
|
bitfld.long 0x8 20. "TC0CC,TC0 Clock Configuration" "0,1"
|
|
line.long 0xC "CCFG_DYNCKG,Dynamic Clock Gating Register"
|
|
bitfld.long 0xC 2. "EFCCKG,EFC Dynamic Clock Gating Enable" "0,1"
|
|
bitfld.long 0xC 1. "BRIDCKG,Bridge Dynamic Clock Gating Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "MATCKG,MATRIX Dynamic Clock Gating" "0,1"
|
|
group.long 0x124++0x3
|
|
line.long 0x0 "CCFG_SMCNFCS,SMC NAND Flash Chip Select Configuration Register"
|
|
bitfld.long 0x0 3. "SMC_NFCS3,SMC NAND Flash Chip Select 3 Assignment" "0,1"
|
|
bitfld.long 0x0 2. "SMC_NFCS2,SMC NAND Flash Chip Select 2 Assignment" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SMC_NFCS1,SMC NAND Flash Chip Select 1 Assignment" "0,1"
|
|
bitfld.long 0x0 0. "SMC_NFCS0,SMC NAND Flash Chip Select 0 Assignment" "0,1"
|
|
group.long 0x1E4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0x1E8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
tree.end
|
|
tree "MCAN (Controller Area Network)"
|
|
base ad:0x0
|
|
tree "MCAN0"
|
|
base ad:0x40030000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "CREL,Core Release Register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "REL,Core Release"
|
|
hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of Core Release"
|
|
newline
|
|
hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of Core Release"
|
|
hexmask.long.byte 0x0 16.--19. 1. "YEAR,Timestamp Year"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "MON,Timestamp Month"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DAY,Timestamp Day"
|
|
line.long 0x4 "ENDN,Endian Register"
|
|
hexmask.long 0x4 0.--31. 1. "ETV,Endianness Test Value"
|
|
group.long 0x8++0x27
|
|
line.long 0x0 "CUST,Customer Register"
|
|
hexmask.long 0x0 0.--31. 1. "CSV,Customer-specific Value"
|
|
line.long 0x4 "DBTP,Data Bit Timing and Prescaler Register"
|
|
bitfld.long 0x4 23. "TDC,Transmitter Delay Compensation" "0: Transmitter Delay Compensation disabled.,1: Transmitter Delay Compensation enabled."
|
|
hexmask.long.byte 0x4 16.--20. 1. "DBRP,Data Bit Rate Prescaler"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--12. 1. "DTSEG1,Data Time Segment Before Sample Point"
|
|
hexmask.long.byte 0x4 4.--7. 1. "DTSEG2,Data Time Segment After Sample Point"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "DSJW,Data (Re) Synchronization Jump Width" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "TEST,Test Register"
|
|
bitfld.long 0x8 7. "RX,Receive Pin (read-only)" "0,1"
|
|
bitfld.long 0x8 5.--6. "TX,Control of Transmit Pin (read/write)" "0: Reset value CANTX controlled by the CAN Core..,1: Sample Point can be monitored at pin CANTX.,2: Dominant ('0') level at pin CANTX.,3: Recessive ('1') at pin CANTX."
|
|
newline
|
|
bitfld.long 0x8 4. "LBCK,Loop Back Mode (read/write)" "0: Reset value. Loop Back mode is disabled.,1: Loop Back mode is enabled (see Section 6.1.9)."
|
|
line.long 0xC "RWD,RAM Watchdog Register"
|
|
hexmask.long.byte 0xC 8.--15. 1. "WDV,Watchdog Value (read-only)"
|
|
hexmask.long.byte 0xC 0.--7. 1. "WDC,Watchdog Configuration (read/write)"
|
|
line.long 0x10 "CCCR,CC Control Register"
|
|
bitfld.long 0x10 15. "NISO,Non-ISO Operation" "0,1"
|
|
bitfld.long 0x10 14. "TXP,Transmit Pause (read/write write protection)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 13. "EFBI,Edge Filtering during Bus Integration (read/write write protection)" "0,1"
|
|
bitfld.long 0x10 12. "PXHD,Protocol Exception Event Handling (read/write write protection)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "BRSE,Bit Rate Switching Enable (read/write write protection)" "0: Bit rate switching for transmissions disabled.,1: Bit rate switching for transmissions enabled."
|
|
bitfld.long 0x10 8. "FDOE,CAN FD Operation Enable (read/write write protection)" "0: FD operation disabled.,1: FD operation enabled."
|
|
newline
|
|
bitfld.long 0x10 7. "TEST,Test Mode Enable (read/write write protection against '1')" "0: Normal operation MCAN_TEST register holds reset..,1: Test mode write access to MCAN_TEST register.."
|
|
bitfld.long 0x10 6. "DAR,Disable Automatic Retransmission (read/write write protection)" "0: Automatic retransmission of messages not..,1: Automatic retransmission disabled."
|
|
newline
|
|
bitfld.long 0x10 5. "MON,Bus Monitoring Mode (read/write write protection against '1')" "0: Bus Monitoring mode is disabled.,1: Bus Monitoring mode is enabled."
|
|
bitfld.long 0x10 4. "CSR,Clock Stop Request (read/write)" "0: No clock stop is requested.,1: Clock stop requested. When clock stop is.."
|
|
newline
|
|
bitfld.long 0x10 3. "CSA,Clock Stop Acknowledge (read-only)" "0,1"
|
|
bitfld.long 0x10 2. "ASM,Restricted Operation Mode (read/write write protection against '1')" "0: Normal CAN operation.,1: Restricted Operation mode active."
|
|
newline
|
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bitfld.long 0x10 1. "CCE,Configuration Change Enable (read/write write protection)" "0: The processor has no write access to the..,1: The processor has write access to the protected.."
|
|
bitfld.long 0x10 0. "INIT,Initialization (read/write)" "0: Normal operation.,1: Initialization is started."
|
|
line.long 0x14 "NBTP,Nominal Bit Timing and Prescaler Register"
|
|
hexmask.long.byte 0x14 25.--31. 1. "NSJW,Nominal (Re) Synchronization Jump Width"
|
|
hexmask.long.word 0x14 16.--24. 1. "NBRP,Nominal Bit Rate Prescaler"
|
|
newline
|
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hexmask.long.byte 0x14 8.--15. 1. "NTSEG1,Nominal Time Segment Before Sample Point"
|
|
hexmask.long.byte 0x14 0.--6. 1. "NTSEG2,Nominal Time Segment After Sample Point"
|
|
line.long 0x18 "TSCC,Timestamp Counter Configuration Register"
|
|
hexmask.long.byte 0x18 16.--19. 1. "TCP,Timestamp Counter Prescaler"
|
|
bitfld.long 0x18 0.--1. "TSS,Timestamp Select" "0: Timestamp counter value always 0x0000,1: Timestamp counter value incremented according to..,2: External timestamp counter value used,?"
|
|
line.long 0x1C "TSCV,Timestamp Counter Value Register"
|
|
hexmask.long.word 0x1C 0.--15. 1. "TSC,Timestamp Counter (cleared on write)"
|
|
line.long 0x20 "TOCC,Timeout Counter Configuration Register"
|
|
hexmask.long.word 0x20 16.--31. 1. "TOP,Timeout Period"
|
|
bitfld.long 0x20 1.--2. "TOS,Timeout Select" "0: Continuous operation,1: Timeout controlled by Tx Event FIFO,2: Timeout controlled by Receive FIFO 0,3: Timeout controlled by Receive FIFO 1"
|
|
newline
|
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bitfld.long 0x20 0. "ETOC,Enable Timeout Counter" "0: Timeout Counter disabled.,1: Timeout Counter enabled."
|
|
line.long 0x24 "TOCV,Timeout Counter Value Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "TOC,Timeout Counter (cleared on write)"
|
|
rgroup.long 0x40++0x7
|
|
line.long 0x0 "ECR,Error Counter Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CEL,CAN Error Logging (cleared on read)"
|
|
bitfld.long 0x0 15. "RP,Receive Error Passive" "0,1"
|
|
newline
|
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hexmask.long.byte 0x0 8.--14. 1. "REC,Receive Error Counter"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TEC,Transmit Error Counter"
|
|
line.long 0x4 "PSR,Protocol Status Register"
|
|
hexmask.long.byte 0x4 16.--22. 1. "TDCV,Transmitter Delay Compensation Value"
|
|
bitfld.long 0x4 14. "PXE,Protocol Exception Event (cleared on read)" "0,1"
|
|
newline
|
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bitfld.long 0x4 13. "RFDF,Received a CAN FD Message (cleared on read)" "0,1"
|
|
bitfld.long 0x4 12. "RBRS,BRS Flag of Last Received CAN FD Message (cleared on read)" "0,1"
|
|
newline
|
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bitfld.long 0x4 11. "RESI,ESI Flag of Last Received CAN FD Message (cleared on read)" "0,1"
|
|
bitfld.long 0x4 8.--10. "DLEC,Data Phase Last Error Code (set to 111 on read)" "0,1,2,3,4,5,6,7"
|
|
newline
|
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bitfld.long 0x4 7. "BO,Bus_Off Status" "0,1"
|
|
bitfld.long 0x4 6. "EW,Warning Status" "0,1"
|
|
newline
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bitfld.long 0x4 5. "EP,Error Passive" "0,1"
|
|
bitfld.long 0x4 3.--4. "ACT,Activity" "0: Node is synchronizing on CAN communication,1: Node is neither receiver nor transmitter,2: Node is operating as receiver,3: Node is operating as transmitter"
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newline
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bitfld.long 0x4 0.--2. "LEC,Last Error Code (set to 111 on read)" "0: No error occurred since LEC has been reset by..,1: More than 5 equal bits in a sequence have..,2: A fixed format part of a received frame has the..,3: The message transmitted by the MCAN was not..,4: During transmission of a message (with the..,5: During transmission of a message (or acknowledge..,6: The CRC check sum of a received message was..,7: Any read access to the Protocol Status Register.."
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|
group.long 0x48++0x3
|
|
line.long 0x0 "TDCR,Transmit Delay Compensation Register"
|
|
hexmask.long.byte 0x0 8.--14. 1. "TDCO,Transmitter Delay Compensation Offset"
|
|
hexmask.long.byte 0x0 0.--6. 1. "TDCF,Transmitter Delay Compensation Filter"
|
|
group.long 0x50++0xF
|
|
line.long 0x0 "IR,Interrupt Register"
|
|
bitfld.long 0x0 29. "ARA,Access to Reserved Address" "0,1"
|
|
bitfld.long 0x0 28. "PED,Protocol Error in Data Phase" "0,1"
|
|
newline
|
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bitfld.long 0x0 27. "PEA,Protocol Error in Arbitration Phase" "0,1"
|
|
bitfld.long 0x0 26. "WDI,Watchdog Interrupt" "0,1"
|
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newline
|
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bitfld.long 0x0 25. "BO,Bus_Off Status" "0,1"
|
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bitfld.long 0x0 24. "EW,Warning Status" "0,1"
|
|
newline
|
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bitfld.long 0x0 23. "EP,Error Passive" "0,1"
|
|
bitfld.long 0x0 22. "ELO,Error Logging Overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "DRX,Message stored to Dedicated Receive Buffer" "0,1"
|
|
bitfld.long 0x0 18. "TOO,Timeout Occurred" "0,1"
|
|
newline
|
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bitfld.long 0x0 17. "MRAF,Message RAM Access Failure" "0,1"
|
|
bitfld.long 0x0 16. "TSW,Timestamp Wraparound" "0,1"
|
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newline
|
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bitfld.long 0x0 15. "TEFL,Tx Event FIFO Element Lost" "0,1"
|
|
bitfld.long 0x0 14. "TEFF,Tx Event FIFO Full" "0,1"
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newline
|
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bitfld.long 0x0 13. "TEFW,Tx Event FIFO Watermark Reached" "0,1"
|
|
bitfld.long 0x0 12. "TEFN,Tx Event FIFO New Entry" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TFE,Tx FIFO Empty" "0,1"
|
|
bitfld.long 0x0 10. "TCF,Transmission Cancellation Finished" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TC,Transmission Completed" "0,1"
|
|
bitfld.long 0x0 8. "HPM,High Priority Message" "0,1"
|
|
newline
|
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bitfld.long 0x0 7. "RF1L,Receive FIFO 1 Message Lost" "0,1"
|
|
bitfld.long 0x0 6. "RF1F,Receive FIFO 1 Full" "0,1"
|
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newline
|
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bitfld.long 0x0 5. "RF1W,Receive FIFO 1 Watermark Reached" "0,1"
|
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bitfld.long 0x0 4. "RF1N,Receive FIFO 1 New Message" "0,1"
|
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newline
|
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bitfld.long 0x0 3. "RF0L,Receive FIFO 0 Message Lost" "0,1"
|
|
bitfld.long 0x0 2. "RF0F,Receive FIFO 0 Full" "0,1"
|
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newline
|
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bitfld.long 0x0 1. "RF0W,Receive FIFO 0 Watermark Reached" "0,1"
|
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bitfld.long 0x0 0. "RF0N,Receive FIFO 0 New Message" "0,1"
|
|
line.long 0x4 "IE,Interrupt Enable Register"
|
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bitfld.long 0x4 29. "ARAE,Access to Reserved Address Enable" "0,1"
|
|
bitfld.long 0x4 28. "PEDE,Protocol Error in Data Phase Enable" "0,1"
|
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newline
|
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bitfld.long 0x4 27. "PEAE,Protocol Error in Arbitration Phase Enable" "0,1"
|
|
bitfld.long 0x4 26. "WDIE,Watchdog Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x4 25. "BOE,Bus_Off Status Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 24. "EWE,Warning Status Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "EPE,Error Passive Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 22. "ELOE,Error Logging Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "DRXE,Message stored to Dedicated Receive Buffer Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 18. "TOOE,Timeout Occurred Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x4 17. "MRAFE,Message RAM Access Failure Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 16. "TSWE,Timestamp Wraparound Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x4 15. "TEFLE,Tx Event FIFO Event Lost Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 14. "TEFFE,Tx Event FIFO Full Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x4 13. "TEFWE,Tx Event FIFO Watermark Reached Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 12. "TEFNE,Tx Event FIFO New Entry Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x4 11. "TFEE,Tx FIFO Empty Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 10. "TCFE,Transmission Cancellation Finished Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x4 9. "TCE,Transmission Completed Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 8. "HPME,High Priority Message Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x4 7. "RF1LE,Receive FIFO 1 Message Lost Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 6. "RF1FE,Receive FIFO 1 Full Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x4 5. "RF1WE,Receive FIFO 1 Watermark Reached Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 4. "RF1NE,Receive FIFO 1 New Message Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x4 3. "RF0LE,Receive FIFO 0 Message Lost Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 2. "RF0FE,Receive FIFO 0 Full Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x4 1. "RF0WE,Receive FIFO 0 Watermark Reached Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "RF0NE,Receive FIFO 0 New Message Interrupt Enable" "0,1"
|
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line.long 0x8 "ILS,Interrupt Line Select Register"
|
|
bitfld.long 0x8 29. "ARAL,Access to Reserved Address Line" "0,1"
|
|
bitfld.long 0x8 28. "PEDL,Protocol Error in Data Phase Line" "0,1"
|
|
newline
|
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bitfld.long 0x8 27. "PEAL,Protocol Error in Arbitration Phase Line" "0,1"
|
|
bitfld.long 0x8 26. "WDIL,Watchdog Interrupt Line" "0,1"
|
|
newline
|
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bitfld.long 0x8 25. "BOL,Bus_Off Status Interrupt Line" "0,1"
|
|
bitfld.long 0x8 24. "EWL,Warning Status Interrupt Line" "0,1"
|
|
newline
|
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bitfld.long 0x8 23. "EPL,Error Passive Interrupt Line" "0,1"
|
|
bitfld.long 0x8 22. "ELOL,Error Logging Overflow Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 19. "DRXL,Message stored to Dedicated Receive Buffer Interrupt Line" "0,1"
|
|
bitfld.long 0x8 18. "TOOL,Timeout Occurred Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 17. "MRAFL,Message RAM Access Failure Interrupt Line" "0,1"
|
|
bitfld.long 0x8 16. "TSWL,Timestamp Wraparound Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 15. "TEFLL,Tx Event FIFO Event Lost Interrupt Line" "0,1"
|
|
bitfld.long 0x8 14. "TEFFL,Tx Event FIFO Full Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "TEFWL,Tx Event FIFO Watermark Reached Interrupt Line" "0,1"
|
|
bitfld.long 0x8 12. "TEFNL,Tx Event FIFO New Entry Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "TFEL,Tx FIFO Empty Interrupt Line" "0,1"
|
|
bitfld.long 0x8 10. "TCFL,Transmission Cancellation Finished Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "TCL,Transmission Completed Interrupt Line" "0,1"
|
|
bitfld.long 0x8 8. "HPML,High Priority Message Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 7. "RF1LL,Receive FIFO 1 Message Lost Interrupt Line" "0,1"
|
|
bitfld.long 0x8 6. "RF1FL,Receive FIFO 1 Full Interrupt Line" "0,1"
|
|
newline
|
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bitfld.long 0x8 5. "RF1WL,Receive FIFO 1 Watermark Reached Interrupt Line" "0,1"
|
|
bitfld.long 0x8 4. "RF1NL,Receive FIFO 1 New Message Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "RF0LL,Receive FIFO 0 Message Lost Interrupt Line" "0,1"
|
|
bitfld.long 0x8 2. "RF0FL,Receive FIFO 0 Full Interrupt Line" "0,1"
|
|
newline
|
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bitfld.long 0x8 1. "RF0WL,Receive FIFO 0 Watermark Reached Interrupt Line" "0,1"
|
|
bitfld.long 0x8 0. "RF0NL,Receive FIFO 0 New Message Interrupt Line" "0,1"
|
|
line.long 0xC "ILE,Interrupt Line Enable Register"
|
|
bitfld.long 0xC 1. "EINT1,Enable Interrupt Line 1" "0,1"
|
|
bitfld.long 0xC 0. "EINT0,Enable Interrupt Line 0" "0,1"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "GFC,Global Filter Configuration Register"
|
|
bitfld.long 0x0 4.--5. "ANFS,Accept Non-matching Frames Standard" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,?,?"
|
|
bitfld.long 0x0 2.--3. "ANFE,Accept Non-matching Frames Extended" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,?,?"
|
|
newline
|
|
bitfld.long 0x0 1. "RRFS,Reject Remote Frames Standard" "0: Filter remote frames with 11-bit standard IDs.,1: Reject all remote frames with 11-bit standard IDs."
|
|
bitfld.long 0x0 0. "RRFE,Reject Remote Frames Extended" "0: Filter remote frames with 29-bit extended IDs.,1: Reject all remote frames with 29-bit extended IDs."
|
|
line.long 0x4 "SIDFC,Standard ID Filter Configuration Register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "LSS,List Size Standard"
|
|
hexmask.long.word 0x4 2.--15. 1. "FLSSA,Filter List Standard Start Address"
|
|
line.long 0x8 "XIDFC,Extended ID Filter Configuration Register"
|
|
hexmask.long.byte 0x8 16.--22. 1. "LSE,List Size Extended"
|
|
hexmask.long.word 0x8 2.--15. 1. "FLESA,Filter List Extended Start Address"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "XIDAM,Extended ID AND Mask Register"
|
|
hexmask.long 0x0 0.--28. 1. "EIDM,Extended ID Mask"
|
|
rgroup.long 0x94++0x3
|
|
line.long 0x0 "HPMS,High Priority Message Status Register"
|
|
bitfld.long 0x0 15. "FLST,Filter List" "0,1"
|
|
hexmask.long.byte 0x0 8.--14. 1. "FIDX,Filter Index"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "MSI,Message Storage Indicator" "0: No FIFO selected.,1: FIFO message lost.,2: Message stored in FIFO 0.,3: Message stored in FIFO 1."
|
|
hexmask.long.byte 0x0 0.--5. 1. "BIDX,Buffer Index"
|
|
group.long 0x98++0xB
|
|
line.long 0x0 "NDAT1,New Data 1 Register"
|
|
bitfld.long 0x0 31. "ND31,New Data" "0,1"
|
|
bitfld.long 0x0 30. "ND30,New Data" "0,1"
|
|
newline
|
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bitfld.long 0x0 29. "ND29,New Data" "0,1"
|
|
bitfld.long 0x0 28. "ND28,New Data" "0,1"
|
|
newline
|
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bitfld.long 0x0 27. "ND27,New Data" "0,1"
|
|
bitfld.long 0x0 26. "ND26,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "ND25,New Data" "0,1"
|
|
bitfld.long 0x0 24. "ND24,New Data" "0,1"
|
|
newline
|
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bitfld.long 0x0 23. "ND23,New Data" "0,1"
|
|
bitfld.long 0x0 22. "ND22,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "ND21,New Data" "0,1"
|
|
bitfld.long 0x0 20. "ND20,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "ND19,New Data" "0,1"
|
|
bitfld.long 0x0 18. "ND18,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "ND17,New Data" "0,1"
|
|
bitfld.long 0x0 16. "ND16,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "ND15,New Data" "0,1"
|
|
bitfld.long 0x0 14. "ND14,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "ND13,New Data" "0,1"
|
|
bitfld.long 0x0 12. "ND12,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "ND11,New Data" "0,1"
|
|
bitfld.long 0x0 10. "ND10,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ND9,New Data" "0,1"
|
|
bitfld.long 0x0 8. "ND8,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "ND7,New Data" "0,1"
|
|
bitfld.long 0x0 6. "ND6,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ND5,New Data" "0,1"
|
|
bitfld.long 0x0 4. "ND4,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ND3,New Data" "0,1"
|
|
bitfld.long 0x0 2. "ND2,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ND1,New Data" "0,1"
|
|
bitfld.long 0x0 0. "ND0,New Data" "0,1"
|
|
line.long 0x4 "NDAT2,New Data 2 Register"
|
|
bitfld.long 0x4 31. "ND63,New Data" "0,1"
|
|
bitfld.long 0x4 30. "ND62,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "ND61,New Data" "0,1"
|
|
bitfld.long 0x4 28. "ND60,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "ND59,New Data" "0,1"
|
|
bitfld.long 0x4 26. "ND58,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "ND57,New Data" "0,1"
|
|
bitfld.long 0x4 24. "ND56,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "ND55,New Data" "0,1"
|
|
bitfld.long 0x4 22. "ND54,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "ND53,New Data" "0,1"
|
|
bitfld.long 0x4 20. "ND52,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "ND51,New Data" "0,1"
|
|
bitfld.long 0x4 18. "ND50,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "ND49,New Data" "0,1"
|
|
bitfld.long 0x4 16. "ND48,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "ND47,New Data" "0,1"
|
|
bitfld.long 0x4 14. "ND46,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "ND45,New Data" "0,1"
|
|
bitfld.long 0x4 12. "ND44,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "ND43,New Data" "0,1"
|
|
bitfld.long 0x4 10. "ND42,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "ND41,New Data" "0,1"
|
|
bitfld.long 0x4 8. "ND40,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "ND39,New Data" "0,1"
|
|
bitfld.long 0x4 6. "ND38,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "ND37,New Data" "0,1"
|
|
bitfld.long 0x4 4. "ND36,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "ND35,New Data" "0,1"
|
|
bitfld.long 0x4 2. "ND34,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "ND33,New Data" "0,1"
|
|
bitfld.long 0x4 0. "ND32,New Data" "0,1"
|
|
line.long 0x8 "RXF0C,Receive FIFO 0 Configuration Register"
|
|
bitfld.long 0x8 31. "F0OM,FIFO 0 Operation Mode" "0,1"
|
|
hexmask.long.byte 0x8 24.--30. 1. "F0WM,Receive FIFO 0 Watermark"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--22. 1. "F0S,Receive FIFO 0 Start Address"
|
|
hexmask.long.word 0x8 2.--15. 1. "F0SA,Receive FIFO 0 Start Address"
|
|
rgroup.long 0xA4++0x3
|
|
line.long 0x0 "RXF0S,Receive FIFO 0 Status Register"
|
|
bitfld.long 0x0 25. "RF0L,Receive FIFO 0 Message Lost" "0,1"
|
|
bitfld.long 0x0 24. "F0F,Receive FIFO 0 Fill Level" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--21. 1. "F0PI,Receive FIFO 0 Put Index"
|
|
hexmask.long.byte 0x0 8.--13. 1. "F0GI,Receive FIFO 0 Get Index"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "F0FL,Receive FIFO 0 Fill Level"
|
|
group.long 0xA8++0xB
|
|
line.long 0x0 "RXF0A,Receive FIFO 0 Acknowledge Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "F0AI,Receive FIFO 0 Acknowledge Index"
|
|
line.long 0x4 "RXBC,Receive Rx Buffer Configuration Register"
|
|
hexmask.long.word 0x4 2.--15. 1. "RBSA,Receive Buffer Start Address"
|
|
line.long 0x8 "RXF1C,Receive FIFO 1 Configuration Register"
|
|
bitfld.long 0x8 31. "F1OM,FIFO 1 Operation Mode" "0,1"
|
|
hexmask.long.byte 0x8 24.--30. 1. "F1WM,Receive FIFO 1 Watermark"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--22. 1. "F1S,Receive FIFO 1 Start Address"
|
|
hexmask.long.word 0x8 2.--15. 1. "F1SA,Receive FIFO 1 Start Address"
|
|
rgroup.long 0xB4++0x3
|
|
line.long 0x0 "RXF1S,Receive FIFO 1 Status Register"
|
|
bitfld.long 0x0 30.--31. "DMS,Debug Message Status" "0: Idle state wait for reception of debug messages..,1: Debug message A received.,2: Debug messages A B received.,3: Debug messages A B C received DMA request is set."
|
|
bitfld.long 0x0 25. "RF1L,Receive FIFO 1 Message Lost" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "F1F,Receive FIFO 1 Fill Level" "0,1"
|
|
hexmask.long.byte 0x0 16.--21. 1. "F1PI,Receive FIFO 1 Put Index"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "F1GI,Receive FIFO 1 Get Index"
|
|
hexmask.long.byte 0x0 0.--6. 1. "F1FL,Receive FIFO 1 Fill Level"
|
|
group.long 0xB8++0xB
|
|
line.long 0x0 "RXF1A,Receive FIFO 1 Acknowledge Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "F1AI,Receive FIFO 1 Acknowledge Index"
|
|
line.long 0x4 "RXESC,Receive Buffer / FIFO Element Size Configuration Register"
|
|
bitfld.long 0x4 8.--10. "RBDS,Receive Buffer Data Field Size" "0: 8-byte data field,1: 12-byte data field,2: 16-byte data field,3: 20-byte data field,4: 24-byte data field,5: 32-byte data field,6: 48-byte data field,7: 64-byte data field"
|
|
bitfld.long 0x4 4.--6. "F1DS,Receive FIFO 1 Data Field Size" "0: 8-byte data field,1: 12-byte data field,2: 16-byte data field,3: 20-byte data field,4: 24-byte data field,5: 32-byte data field,6: 48-byte data field,7: 64-byte data field"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "F0DS,Receive FIFO 0 Data Field Size" "0: 8-byte data field,1: 12-byte data field,2: 16-byte data field,3: 20-byte data field,4: 24-byte data field,5: 32-byte data field,6: 48-byte data field,7: 64-byte data field"
|
|
line.long 0x8 "TXBC,Transmit Buffer Configuration Register"
|
|
bitfld.long 0x8 30. "TFQM,Tx FIFO/Queue Mode" "0,1"
|
|
hexmask.long.byte 0x8 24.--29. 1. "TFQS,Transmit FIFO/Queue Size"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--21. 1. "NDTB,Number of Dedicated Transmit Buffers"
|
|
hexmask.long.word 0x8 2.--15. 1. "TBSA,Tx Buffers Start Address"
|
|
rgroup.long 0xC4++0x3
|
|
line.long 0x0 "TXFQS,Transmit FIFO/Queue Status Register"
|
|
bitfld.long 0x0 21. "TFQF,Tx FIFO/Queue Full" "0,1"
|
|
hexmask.long.byte 0x0 16.--20. 1. "TFQPI,Tx FIFO/Queue Put Index"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--12. 1. "TFGI,Tx FIFO Get Index"
|
|
hexmask.long.byte 0x0 0.--5. 1. "TFFL,Tx FIFO Free Level"
|
|
group.long 0xC8++0x3
|
|
line.long 0x0 "TXESC,Transmit Buffer Element Size Configuration Register"
|
|
bitfld.long 0x0 0.--2. "TBDS,Tx Buffer Data Field Size" "0: 8-byte data field,1: 12-byte data field,2: 16-byte data field,3: 20-byte data field,4: 24-byte data field,5: 32-byte data field,6: 48-byte data field,7: 64-byte data field"
|
|
rgroup.long 0xCC++0x3
|
|
line.long 0x0 "TXBRP,Transmit Buffer Request Pending Register"
|
|
bitfld.long 0x0 31. "TRP31,Transmission Request Pending for Buffer 31" "0,1"
|
|
bitfld.long 0x0 30. "TRP30,Transmission Request Pending for Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TRP29,Transmission Request Pending for Buffer 29" "0,1"
|
|
bitfld.long 0x0 28. "TRP28,Transmission Request Pending for Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "TRP27,Transmission Request Pending for Buffer 27" "0,1"
|
|
bitfld.long 0x0 26. "TRP26,Transmission Request Pending for Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "TRP25,Transmission Request Pending for Buffer 25" "0,1"
|
|
bitfld.long 0x0 24. "TRP24,Transmission Request Pending for Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "TRP23,Transmission Request Pending for Buffer 23" "0,1"
|
|
bitfld.long 0x0 22. "TRP22,Transmission Request Pending for Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "TRP21,Transmission Request Pending for Buffer 21" "0,1"
|
|
bitfld.long 0x0 20. "TRP20,Transmission Request Pending for Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "TRP19,Transmission Request Pending for Buffer 19" "0,1"
|
|
bitfld.long 0x0 18. "TRP18,Transmission Request Pending for Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "TRP17,Transmission Request Pending for Buffer 17" "0,1"
|
|
bitfld.long 0x0 16. "TRP16,Transmission Request Pending for Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TRP15,Transmission Request Pending for Buffer 15" "0,1"
|
|
bitfld.long 0x0 14. "TRP14,Transmission Request Pending for Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TRP13,Transmission Request Pending for Buffer 13" "0,1"
|
|
bitfld.long 0x0 12. "TRP12,Transmission Request Pending for Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TRP11,Transmission Request Pending for Buffer 11" "0,1"
|
|
bitfld.long 0x0 10. "TRP10,Transmission Request Pending for Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TRP9,Transmission Request Pending for Buffer 9" "0,1"
|
|
bitfld.long 0x0 8. "TRP8,Transmission Request Pending for Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TRP7,Transmission Request Pending for Buffer 7" "0,1"
|
|
bitfld.long 0x0 6. "TRP6,Transmission Request Pending for Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TRP5,Transmission Request Pending for Buffer 5" "0,1"
|
|
bitfld.long 0x0 4. "TRP4,Transmission Request Pending for Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TRP3,Transmission Request Pending for Buffer 3" "0,1"
|
|
bitfld.long 0x0 2. "TRP2,Transmission Request Pending for Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TRP1,Transmission Request Pending for Buffer 1" "0,1"
|
|
bitfld.long 0x0 0. "TRP0,Transmission Request Pending for Buffer 0" "0,1"
|
|
group.long 0xD0++0x7
|
|
line.long 0x0 "TXBAR,Transmit Buffer Add Request Register"
|
|
bitfld.long 0x0 31. "AR31,Add Request for Transmit Buffer 31" "0,1"
|
|
bitfld.long 0x0 30. "AR30,Add Request for Transmit Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "AR29,Add Request for Transmit Buffer 29" "0,1"
|
|
bitfld.long 0x0 28. "AR28,Add Request for Transmit Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "AR27,Add Request for Transmit Buffer 27" "0,1"
|
|
bitfld.long 0x0 26. "AR26,Add Request for Transmit Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "AR25,Add Request for Transmit Buffer 25" "0,1"
|
|
bitfld.long 0x0 24. "AR24,Add Request for Transmit Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "AR23,Add Request for Transmit Buffer 23" "0,1"
|
|
bitfld.long 0x0 22. "AR22,Add Request for Transmit Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "AR21,Add Request for Transmit Buffer 21" "0,1"
|
|
bitfld.long 0x0 20. "AR20,Add Request for Transmit Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "AR19,Add Request for Transmit Buffer 19" "0,1"
|
|
bitfld.long 0x0 18. "AR18,Add Request for Transmit Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "AR17,Add Request for Transmit Buffer 17" "0,1"
|
|
bitfld.long 0x0 16. "AR16,Add Request for Transmit Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "AR15,Add Request for Transmit Buffer 15" "0,1"
|
|
bitfld.long 0x0 14. "AR14,Add Request for Transmit Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "AR13,Add Request for Transmit Buffer 13" "0,1"
|
|
bitfld.long 0x0 12. "AR12,Add Request for Transmit Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "AR11,Add Request for Transmit Buffer 11" "0,1"
|
|
bitfld.long 0x0 10. "AR10,Add Request for Transmit Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "AR9,Add Request for Transmit Buffer 9" "0,1"
|
|
bitfld.long 0x0 8. "AR8,Add Request for Transmit Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "AR7,Add Request for Transmit Buffer 7" "0,1"
|
|
bitfld.long 0x0 6. "AR6,Add Request for Transmit Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "AR5,Add Request for Transmit Buffer 5" "0,1"
|
|
bitfld.long 0x0 4. "AR4,Add Request for Transmit Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "AR3,Add Request for Transmit Buffer 3" "0,1"
|
|
bitfld.long 0x0 2. "AR2,Add Request for Transmit Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "AR1,Add Request for Transmit Buffer 1" "0,1"
|
|
bitfld.long 0x0 0. "AR0,Add Request for Transmit Buffer 0" "0,1"
|
|
line.long 0x4 "TXBCR,Transmit Buffer Cancellation Request Register"
|
|
bitfld.long 0x4 31. "CR31,Cancellation Request for Transmit Buffer 31" "0,1"
|
|
bitfld.long 0x4 30. "CR30,Cancellation Request for Transmit Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "CR29,Cancellation Request for Transmit Buffer 29" "0,1"
|
|
bitfld.long 0x4 28. "CR28,Cancellation Request for Transmit Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "CR27,Cancellation Request for Transmit Buffer 27" "0,1"
|
|
bitfld.long 0x4 26. "CR26,Cancellation Request for Transmit Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "CR25,Cancellation Request for Transmit Buffer 25" "0,1"
|
|
bitfld.long 0x4 24. "CR24,Cancellation Request for Transmit Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "CR23,Cancellation Request for Transmit Buffer 23" "0,1"
|
|
bitfld.long 0x4 22. "CR22,Cancellation Request for Transmit Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "CR21,Cancellation Request for Transmit Buffer 21" "0,1"
|
|
bitfld.long 0x4 20. "CR20,Cancellation Request for Transmit Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CR19,Cancellation Request for Transmit Buffer 19" "0,1"
|
|
bitfld.long 0x4 18. "CR18,Cancellation Request for Transmit Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CR17,Cancellation Request for Transmit Buffer 17" "0,1"
|
|
bitfld.long 0x4 16. "CR16,Cancellation Request for Transmit Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CR15,Cancellation Request for Transmit Buffer 15" "0,1"
|
|
bitfld.long 0x4 14. "CR14,Cancellation Request for Transmit Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "CR13,Cancellation Request for Transmit Buffer 13" "0,1"
|
|
bitfld.long 0x4 12. "CR12,Cancellation Request for Transmit Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "CR11,Cancellation Request for Transmit Buffer 11" "0,1"
|
|
bitfld.long 0x4 10. "CR10,Cancellation Request for Transmit Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "CR9,Cancellation Request for Transmit Buffer 9" "0,1"
|
|
bitfld.long 0x4 8. "CR8,Cancellation Request for Transmit Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "CR7,Cancellation Request for Transmit Buffer 7" "0,1"
|
|
bitfld.long 0x4 6. "CR6,Cancellation Request for Transmit Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CR5,Cancellation Request for Transmit Buffer 5" "0,1"
|
|
bitfld.long 0x4 4. "CR4,Cancellation Request for Transmit Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CR3,Cancellation Request for Transmit Buffer 3" "0,1"
|
|
bitfld.long 0x4 2. "CR2,Cancellation Request for Transmit Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CR1,Cancellation Request for Transmit Buffer 1" "0,1"
|
|
bitfld.long 0x4 0. "CR0,Cancellation Request for Transmit Buffer 0" "0,1"
|
|
rgroup.long 0xD8++0x7
|
|
line.long 0x0 "TXBTO,Transmit Buffer Transmission Occurred Register"
|
|
bitfld.long 0x0 31. "TO31,Transmission Occurred for Buffer 31" "0,1"
|
|
bitfld.long 0x0 30. "TO30,Transmission Occurred for Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TO29,Transmission Occurred for Buffer 29" "0,1"
|
|
bitfld.long 0x0 28. "TO28,Transmission Occurred for Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "TO27,Transmission Occurred for Buffer 27" "0,1"
|
|
bitfld.long 0x0 26. "TO26,Transmission Occurred for Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "TO25,Transmission Occurred for Buffer 25" "0,1"
|
|
bitfld.long 0x0 24. "TO24,Transmission Occurred for Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "TO23,Transmission Occurred for Buffer 23" "0,1"
|
|
bitfld.long 0x0 22. "TO22,Transmission Occurred for Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "TO21,Transmission Occurred for Buffer 21" "0,1"
|
|
bitfld.long 0x0 20. "TO20,Transmission Occurred for Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "TO19,Transmission Occurred for Buffer 19" "0,1"
|
|
bitfld.long 0x0 18. "TO18,Transmission Occurred for Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "TO17,Transmission Occurred for Buffer 17" "0,1"
|
|
bitfld.long 0x0 16. "TO16,Transmission Occurred for Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TO15,Transmission Occurred for Buffer 15" "0,1"
|
|
bitfld.long 0x0 14. "TO14,Transmission Occurred for Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TO13,Transmission Occurred for Buffer 13" "0,1"
|
|
bitfld.long 0x0 12. "TO12,Transmission Occurred for Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TO11,Transmission Occurred for Buffer 11" "0,1"
|
|
bitfld.long 0x0 10. "TO10,Transmission Occurred for Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TO9,Transmission Occurred for Buffer 9" "0,1"
|
|
bitfld.long 0x0 8. "TO8,Transmission Occurred for Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TO7,Transmission Occurred for Buffer 7" "0,1"
|
|
bitfld.long 0x0 6. "TO6,Transmission Occurred for Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TO5,Transmission Occurred for Buffer 5" "0,1"
|
|
bitfld.long 0x0 4. "TO4,Transmission Occurred for Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TO3,Transmission Occurred for Buffer 3" "0,1"
|
|
bitfld.long 0x0 2. "TO2,Transmission Occurred for Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TO1,Transmission Occurred for Buffer 1" "0,1"
|
|
bitfld.long 0x0 0. "TO0,Transmission Occurred for Buffer 0" "0,1"
|
|
line.long 0x4 "TXBCF,Transmit Buffer Cancellation Finished Register"
|
|
bitfld.long 0x4 31. "CF31,Cancellation Finished for Transmit Buffer 31" "0,1"
|
|
bitfld.long 0x4 30. "CF30,Cancellation Finished for Transmit Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "CF29,Cancellation Finished for Transmit Buffer 29" "0,1"
|
|
bitfld.long 0x4 28. "CF28,Cancellation Finished for Transmit Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "CF27,Cancellation Finished for Transmit Buffer 27" "0,1"
|
|
bitfld.long 0x4 26. "CF26,Cancellation Finished for Transmit Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "CF25,Cancellation Finished for Transmit Buffer 25" "0,1"
|
|
bitfld.long 0x4 24. "CF24,Cancellation Finished for Transmit Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "CF23,Cancellation Finished for Transmit Buffer 23" "0,1"
|
|
bitfld.long 0x4 22. "CF22,Cancellation Finished for Transmit Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "CF21,Cancellation Finished for Transmit Buffer 21" "0,1"
|
|
bitfld.long 0x4 20. "CF20,Cancellation Finished for Transmit Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CF19,Cancellation Finished for Transmit Buffer 19" "0,1"
|
|
bitfld.long 0x4 18. "CF18,Cancellation Finished for Transmit Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CF17,Cancellation Finished for Transmit Buffer 17" "0,1"
|
|
bitfld.long 0x4 16. "CF16,Cancellation Finished for Transmit Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CF15,Cancellation Finished for Transmit Buffer 15" "0,1"
|
|
bitfld.long 0x4 14. "CF14,Cancellation Finished for Transmit Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "CF13,Cancellation Finished for Transmit Buffer 13" "0,1"
|
|
bitfld.long 0x4 12. "CF12,Cancellation Finished for Transmit Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "CF11,Cancellation Finished for Transmit Buffer 11" "0,1"
|
|
bitfld.long 0x4 10. "CF10,Cancellation Finished for Transmit Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "CF9,Cancellation Finished for Transmit Buffer 9" "0,1"
|
|
bitfld.long 0x4 8. "CF8,Cancellation Finished for Transmit Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "CF7,Cancellation Finished for Transmit Buffer 7" "0,1"
|
|
bitfld.long 0x4 6. "CF6,Cancellation Finished for Transmit Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CF5,Cancellation Finished for Transmit Buffer 5" "0,1"
|
|
bitfld.long 0x4 4. "CF4,Cancellation Finished for Transmit Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CF3,Cancellation Finished for Transmit Buffer 3" "0,1"
|
|
bitfld.long 0x4 2. "CF2,Cancellation Finished for Transmit Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CF1,Cancellation Finished for Transmit Buffer 1" "0,1"
|
|
bitfld.long 0x4 0. "CF0,Cancellation Finished for Transmit Buffer 0" "0,1"
|
|
group.long 0xE0++0x7
|
|
line.long 0x0 "TXBTIE,Transmit Buffer Transmission Interrupt Enable Register"
|
|
bitfld.long 0x0 31. "TIE31,Transmission Interrupt Enable for Buffer 31" "0,1"
|
|
bitfld.long 0x0 30. "TIE30,Transmission Interrupt Enable for Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TIE29,Transmission Interrupt Enable for Buffer 29" "0,1"
|
|
bitfld.long 0x0 28. "TIE28,Transmission Interrupt Enable for Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "TIE27,Transmission Interrupt Enable for Buffer 27" "0,1"
|
|
bitfld.long 0x0 26. "TIE26,Transmission Interrupt Enable for Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "TIE25,Transmission Interrupt Enable for Buffer 25" "0,1"
|
|
bitfld.long 0x0 24. "TIE24,Transmission Interrupt Enable for Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "TIE23,Transmission Interrupt Enable for Buffer 23" "0,1"
|
|
bitfld.long 0x0 22. "TIE22,Transmission Interrupt Enable for Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "TIE21,Transmission Interrupt Enable for Buffer 21" "0,1"
|
|
bitfld.long 0x0 20. "TIE20,Transmission Interrupt Enable for Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "TIE19,Transmission Interrupt Enable for Buffer 19" "0,1"
|
|
bitfld.long 0x0 18. "TIE18,Transmission Interrupt Enable for Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "TIE17,Transmission Interrupt Enable for Buffer 17" "0,1"
|
|
bitfld.long 0x0 16. "TIE16,Transmission Interrupt Enable for Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TIE15,Transmission Interrupt Enable for Buffer 15" "0,1"
|
|
bitfld.long 0x0 14. "TIE14,Transmission Interrupt Enable for Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TIE13,Transmission Interrupt Enable for Buffer 13" "0,1"
|
|
bitfld.long 0x0 12. "TIE12,Transmission Interrupt Enable for Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TIE11,Transmission Interrupt Enable for Buffer 11" "0,1"
|
|
bitfld.long 0x0 10. "TIE10,Transmission Interrupt Enable for Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TIE9,Transmission Interrupt Enable for Buffer 9" "0,1"
|
|
bitfld.long 0x0 8. "TIE8,Transmission Interrupt Enable for Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TIE7,Transmission Interrupt Enable for Buffer 7" "0,1"
|
|
bitfld.long 0x0 6. "TIE6,Transmission Interrupt Enable for Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TIE5,Transmission Interrupt Enable for Buffer 5" "0,1"
|
|
bitfld.long 0x0 4. "TIE4,Transmission Interrupt Enable for Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TIE3,Transmission Interrupt Enable for Buffer 3" "0,1"
|
|
bitfld.long 0x0 2. "TIE2,Transmission Interrupt Enable for Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TIE1,Transmission Interrupt Enable for Buffer 1" "0,1"
|
|
bitfld.long 0x0 0. "TIE0,Transmission Interrupt Enable for Buffer 0" "0,1"
|
|
line.long 0x4 "TXBCIE,Transmit Buffer Cancellation Finished Interrupt Enable Register"
|
|
bitfld.long 0x4 31. "CFIE31,Cancellation Finished Interrupt Enable for Transmit Buffer 31" "0,1"
|
|
bitfld.long 0x4 30. "CFIE30,Cancellation Finished Interrupt Enable for Transmit Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "CFIE29,Cancellation Finished Interrupt Enable for Transmit Buffer 29" "0,1"
|
|
bitfld.long 0x4 28. "CFIE28,Cancellation Finished Interrupt Enable for Transmit Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "CFIE27,Cancellation Finished Interrupt Enable for Transmit Buffer 27" "0,1"
|
|
bitfld.long 0x4 26. "CFIE26,Cancellation Finished Interrupt Enable for Transmit Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "CFIE25,Cancellation Finished Interrupt Enable for Transmit Buffer 25" "0,1"
|
|
bitfld.long 0x4 24. "CFIE24,Cancellation Finished Interrupt Enable for Transmit Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "CFIE23,Cancellation Finished Interrupt Enable for Transmit Buffer 23" "0,1"
|
|
bitfld.long 0x4 22. "CFIE22,Cancellation Finished Interrupt Enable for Transmit Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "CFIE21,Cancellation Finished Interrupt Enable for Transmit Buffer 21" "0,1"
|
|
bitfld.long 0x4 20. "CFIE20,Cancellation Finished Interrupt Enable for Transmit Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CFIE19,Cancellation Finished Interrupt Enable for Transmit Buffer 19" "0,1"
|
|
bitfld.long 0x4 18. "CFIE18,Cancellation Finished Interrupt Enable for Transmit Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CFIE17,Cancellation Finished Interrupt Enable for Transmit Buffer 17" "0,1"
|
|
bitfld.long 0x4 16. "CFIE16,Cancellation Finished Interrupt Enable for Transmit Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CFIE15,Cancellation Finished Interrupt Enable for Transmit Buffer 15" "0,1"
|
|
bitfld.long 0x4 14. "CFIE14,Cancellation Finished Interrupt Enable for Transmit Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "CFIE13,Cancellation Finished Interrupt Enable for Transmit Buffer 13" "0,1"
|
|
bitfld.long 0x4 12. "CFIE12,Cancellation Finished Interrupt Enable for Transmit Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "CFIE11,Cancellation Finished Interrupt Enable for Transmit Buffer 11" "0,1"
|
|
bitfld.long 0x4 10. "CFIE10,Cancellation Finished Interrupt Enable for Transmit Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "CFIE9,Cancellation Finished Interrupt Enable for Transmit Buffer 9" "0,1"
|
|
bitfld.long 0x4 8. "CFIE8,Cancellation Finished Interrupt Enable for Transmit Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "CFIE7,Cancellation Finished Interrupt Enable for Transmit Buffer 7" "0,1"
|
|
bitfld.long 0x4 6. "CFIE6,Cancellation Finished Interrupt Enable for Transmit Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CFIE5,Cancellation Finished Interrupt Enable for Transmit Buffer 5" "0,1"
|
|
bitfld.long 0x4 4. "CFIE4,Cancellation Finished Interrupt Enable for Transmit Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CFIE3,Cancellation Finished Interrupt Enable for Transmit Buffer 3" "0,1"
|
|
bitfld.long 0x4 2. "CFIE2,Cancellation Finished Interrupt Enable for Transmit Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CFIE1,Cancellation Finished Interrupt Enable for Transmit Buffer 1" "0,1"
|
|
bitfld.long 0x4 0. "CFIE0,Cancellation Finished Interrupt Enable for Transmit Buffer 0" "0,1"
|
|
group.long 0xF0++0x3
|
|
line.long 0x0 "TXEFC,Transmit Event FIFO Configuration Register"
|
|
hexmask.long.byte 0x0 24.--29. 1. "EFWM,Event FIFO Watermark"
|
|
hexmask.long.byte 0x0 16.--21. 1. "EFS,Event FIFO Size"
|
|
newline
|
|
hexmask.long.word 0x0 2.--15. 1. "EFSA,Event FIFO Start Address"
|
|
rgroup.long 0xF4++0x3
|
|
line.long 0x0 "TXEFS,Transmit Event FIFO Status Register"
|
|
bitfld.long 0x0 25. "TEFL,Tx Event FIFO Element Lost" "0,1"
|
|
bitfld.long 0x0 24. "EFF,Event FIFO Full" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--20. 1. "EFPI,Event FIFO Put Index"
|
|
hexmask.long.byte 0x0 8.--12. 1. "EFGI,Event FIFO Get Index"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "EFFL,Event FIFO Fill Level"
|
|
group.long 0xF8++0x3
|
|
line.long 0x0 "TXEFA,Transmit Event FIFO Acknowledge Register"
|
|
hexmask.long.byte 0x0 0.--4. 1. "EFAI,Event FIFO Acknowledge Index"
|
|
tree.end
|
|
sif (cpuis("PIC32CZ2051CA70100"))
|
|
tree "MCAN1"
|
|
base ad:0x40034000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "CREL,Core Release Register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "REL,Core Release"
|
|
hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of Core Release"
|
|
newline
|
|
hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of Core Release"
|
|
hexmask.long.byte 0x0 16.--19. 1. "YEAR,Timestamp Year"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "MON,Timestamp Month"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DAY,Timestamp Day"
|
|
line.long 0x4 "ENDN,Endian Register"
|
|
hexmask.long 0x4 0.--31. 1. "ETV,Endianness Test Value"
|
|
group.long 0x8++0x27
|
|
line.long 0x0 "CUST,Customer Register"
|
|
hexmask.long 0x0 0.--31. 1. "CSV,Customer-specific Value"
|
|
line.long 0x4 "DBTP,Data Bit Timing and Prescaler Register"
|
|
bitfld.long 0x4 23. "TDC,Transmitter Delay Compensation" "0: Transmitter Delay Compensation disabled.,1: Transmitter Delay Compensation enabled."
|
|
hexmask.long.byte 0x4 16.--20. 1. "DBRP,Data Bit Rate Prescaler"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--12. 1. "DTSEG1,Data Time Segment Before Sample Point"
|
|
hexmask.long.byte 0x4 4.--7. 1. "DTSEG2,Data Time Segment After Sample Point"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "DSJW,Data (Re) Synchronization Jump Width" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "TEST,Test Register"
|
|
bitfld.long 0x8 7. "RX,Receive Pin (read-only)" "0,1"
|
|
bitfld.long 0x8 5.--6. "TX,Control of Transmit Pin (read/write)" "0: Reset value CANTX controlled by the CAN Core..,1: Sample Point can be monitored at pin CANTX.,2: Dominant ('0') level at pin CANTX.,3: Recessive ('1') at pin CANTX."
|
|
newline
|
|
bitfld.long 0x8 4. "LBCK,Loop Back Mode (read/write)" "0: Reset value. Loop Back mode is disabled.,1: Loop Back mode is enabled (see Section 6.1.9)."
|
|
line.long 0xC "RWD,RAM Watchdog Register"
|
|
hexmask.long.byte 0xC 8.--15. 1. "WDV,Watchdog Value (read-only)"
|
|
hexmask.long.byte 0xC 0.--7. 1. "WDC,Watchdog Configuration (read/write)"
|
|
line.long 0x10 "CCCR,CC Control Register"
|
|
bitfld.long 0x10 15. "NISO,Non-ISO Operation" "0,1"
|
|
bitfld.long 0x10 14. "TXP,Transmit Pause (read/write write protection)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 13. "EFBI,Edge Filtering during Bus Integration (read/write write protection)" "0,1"
|
|
bitfld.long 0x10 12. "PXHD,Protocol Exception Event Handling (read/write write protection)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "BRSE,Bit Rate Switching Enable (read/write write protection)" "0: Bit rate switching for transmissions disabled.,1: Bit rate switching for transmissions enabled."
|
|
bitfld.long 0x10 8. "FDOE,CAN FD Operation Enable (read/write write protection)" "0: FD operation disabled.,1: FD operation enabled."
|
|
newline
|
|
bitfld.long 0x10 7. "TEST,Test Mode Enable (read/write write protection against '1')" "0: Normal operation MCAN_TEST register holds reset..,1: Test mode write access to MCAN_TEST register.."
|
|
bitfld.long 0x10 6. "DAR,Disable Automatic Retransmission (read/write write protection)" "0: Automatic retransmission of messages not..,1: Automatic retransmission disabled."
|
|
newline
|
|
bitfld.long 0x10 5. "MON,Bus Monitoring Mode (read/write write protection against '1')" "0: Bus Monitoring mode is disabled.,1: Bus Monitoring mode is enabled."
|
|
bitfld.long 0x10 4. "CSR,Clock Stop Request (read/write)" "0: No clock stop is requested.,1: Clock stop requested. When clock stop is.."
|
|
newline
|
|
bitfld.long 0x10 3. "CSA,Clock Stop Acknowledge (read-only)" "0,1"
|
|
bitfld.long 0x10 2. "ASM,Restricted Operation Mode (read/write write protection against '1')" "0: Normal CAN operation.,1: Restricted Operation mode active."
|
|
newline
|
|
bitfld.long 0x10 1. "CCE,Configuration Change Enable (read/write write protection)" "0: The processor has no write access to the..,1: The processor has write access to the protected.."
|
|
bitfld.long 0x10 0. "INIT,Initialization (read/write)" "0: Normal operation.,1: Initialization is started."
|
|
line.long 0x14 "NBTP,Nominal Bit Timing and Prescaler Register"
|
|
hexmask.long.byte 0x14 25.--31. 1. "NSJW,Nominal (Re) Synchronization Jump Width"
|
|
hexmask.long.word 0x14 16.--24. 1. "NBRP,Nominal Bit Rate Prescaler"
|
|
newline
|
|
hexmask.long.byte 0x14 8.--15. 1. "NTSEG1,Nominal Time Segment Before Sample Point"
|
|
hexmask.long.byte 0x14 0.--6. 1. "NTSEG2,Nominal Time Segment After Sample Point"
|
|
line.long 0x18 "TSCC,Timestamp Counter Configuration Register"
|
|
hexmask.long.byte 0x18 16.--19. 1. "TCP,Timestamp Counter Prescaler"
|
|
bitfld.long 0x18 0.--1. "TSS,Timestamp Select" "0: Timestamp counter value always 0x0000,1: Timestamp counter value incremented according to..,2: External timestamp counter value used,?"
|
|
line.long 0x1C "TSCV,Timestamp Counter Value Register"
|
|
hexmask.long.word 0x1C 0.--15. 1. "TSC,Timestamp Counter (cleared on write)"
|
|
line.long 0x20 "TOCC,Timeout Counter Configuration Register"
|
|
hexmask.long.word 0x20 16.--31. 1. "TOP,Timeout Period"
|
|
bitfld.long 0x20 1.--2. "TOS,Timeout Select" "0: Continuous operation,1: Timeout controlled by Tx Event FIFO,2: Timeout controlled by Receive FIFO 0,3: Timeout controlled by Receive FIFO 1"
|
|
newline
|
|
bitfld.long 0x20 0. "ETOC,Enable Timeout Counter" "0: Timeout Counter disabled.,1: Timeout Counter enabled."
|
|
line.long 0x24 "TOCV,Timeout Counter Value Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "TOC,Timeout Counter (cleared on write)"
|
|
rgroup.long 0x40++0x7
|
|
line.long 0x0 "ECR,Error Counter Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CEL,CAN Error Logging (cleared on read)"
|
|
bitfld.long 0x0 15. "RP,Receive Error Passive" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--14. 1. "REC,Receive Error Counter"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TEC,Transmit Error Counter"
|
|
line.long 0x4 "PSR,Protocol Status Register"
|
|
hexmask.long.byte 0x4 16.--22. 1. "TDCV,Transmitter Delay Compensation Value"
|
|
bitfld.long 0x4 14. "PXE,Protocol Exception Event (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "RFDF,Received a CAN FD Message (cleared on read)" "0,1"
|
|
bitfld.long 0x4 12. "RBRS,BRS Flag of Last Received CAN FD Message (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "RESI,ESI Flag of Last Received CAN FD Message (cleared on read)" "0,1"
|
|
bitfld.long 0x4 8.--10. "DLEC,Data Phase Last Error Code (set to 111 on read)" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 7. "BO,Bus_Off Status" "0,1"
|
|
bitfld.long 0x4 6. "EW,Warning Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "EP,Error Passive" "0,1"
|
|
bitfld.long 0x4 3.--4. "ACT,Activity" "0: Node is synchronizing on CAN communication,1: Node is neither receiver nor transmitter,2: Node is operating as receiver,3: Node is operating as transmitter"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "LEC,Last Error Code (set to 111 on read)" "0: No error occurred since LEC has been reset by..,1: More than 5 equal bits in a sequence have..,2: A fixed format part of a received frame has the..,3: The message transmitted by the MCAN was not..,4: During transmission of a message (with the..,5: During transmission of a message (or acknowledge..,6: The CRC check sum of a received message was..,7: Any read access to the Protocol Status Register.."
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "TDCR,Transmit Delay Compensation Register"
|
|
hexmask.long.byte 0x0 8.--14. 1. "TDCO,Transmitter Delay Compensation Offset"
|
|
hexmask.long.byte 0x0 0.--6. 1. "TDCF,Transmitter Delay Compensation Filter"
|
|
group.long 0x50++0xF
|
|
line.long 0x0 "IR,Interrupt Register"
|
|
bitfld.long 0x0 29. "ARA,Access to Reserved Address" "0,1"
|
|
bitfld.long 0x0 28. "PED,Protocol Error in Data Phase" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "PEA,Protocol Error in Arbitration Phase" "0,1"
|
|
bitfld.long 0x0 26. "WDI,Watchdog Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "BO,Bus_Off Status" "0,1"
|
|
bitfld.long 0x0 24. "EW,Warning Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "EP,Error Passive" "0,1"
|
|
bitfld.long 0x0 22. "ELO,Error Logging Overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "DRX,Message stored to Dedicated Receive Buffer" "0,1"
|
|
bitfld.long 0x0 18. "TOO,Timeout Occurred" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "MRAF,Message RAM Access Failure" "0,1"
|
|
bitfld.long 0x0 16. "TSW,Timestamp Wraparound" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TEFL,Tx Event FIFO Element Lost" "0,1"
|
|
bitfld.long 0x0 14. "TEFF,Tx Event FIFO Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TEFW,Tx Event FIFO Watermark Reached" "0,1"
|
|
bitfld.long 0x0 12. "TEFN,Tx Event FIFO New Entry" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TFE,Tx FIFO Empty" "0,1"
|
|
bitfld.long 0x0 10. "TCF,Transmission Cancellation Finished" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TC,Transmission Completed" "0,1"
|
|
bitfld.long 0x0 8. "HPM,High Priority Message" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RF1L,Receive FIFO 1 Message Lost" "0,1"
|
|
bitfld.long 0x0 6. "RF1F,Receive FIFO 1 Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RF1W,Receive FIFO 1 Watermark Reached" "0,1"
|
|
bitfld.long 0x0 4. "RF1N,Receive FIFO 1 New Message" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RF0L,Receive FIFO 0 Message Lost" "0,1"
|
|
bitfld.long 0x0 2. "RF0F,Receive FIFO 0 Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RF0W,Receive FIFO 0 Watermark Reached" "0,1"
|
|
bitfld.long 0x0 0. "RF0N,Receive FIFO 0 New Message" "0,1"
|
|
line.long 0x4 "IE,Interrupt Enable Register"
|
|
bitfld.long 0x4 29. "ARAE,Access to Reserved Address Enable" "0,1"
|
|
bitfld.long 0x4 28. "PEDE,Protocol Error in Data Phase Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "PEAE,Protocol Error in Arbitration Phase Enable" "0,1"
|
|
bitfld.long 0x4 26. "WDIE,Watchdog Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "BOE,Bus_Off Status Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 24. "EWE,Warning Status Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "EPE,Error Passive Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 22. "ELOE,Error Logging Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "DRXE,Message stored to Dedicated Receive Buffer Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 18. "TOOE,Timeout Occurred Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "MRAFE,Message RAM Access Failure Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 16. "TSWE,Timestamp Wraparound Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "TEFLE,Tx Event FIFO Event Lost Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 14. "TEFFE,Tx Event FIFO Full Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "TEFWE,Tx Event FIFO Watermark Reached Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 12. "TEFNE,Tx Event FIFO New Entry Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "TFEE,Tx FIFO Empty Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 10. "TCFE,Transmission Cancellation Finished Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "TCE,Transmission Completed Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 8. "HPME,High Priority Message Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "RF1LE,Receive FIFO 1 Message Lost Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 6. "RF1FE,Receive FIFO 1 Full Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "RF1WE,Receive FIFO 1 Watermark Reached Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 4. "RF1NE,Receive FIFO 1 New Message Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "RF0LE,Receive FIFO 0 Message Lost Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 2. "RF0FE,Receive FIFO 0 Full Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "RF0WE,Receive FIFO 0 Watermark Reached Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "RF0NE,Receive FIFO 0 New Message Interrupt Enable" "0,1"
|
|
line.long 0x8 "ILS,Interrupt Line Select Register"
|
|
bitfld.long 0x8 29. "ARAL,Access to Reserved Address Line" "0,1"
|
|
bitfld.long 0x8 28. "PEDL,Protocol Error in Data Phase Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 27. "PEAL,Protocol Error in Arbitration Phase Line" "0,1"
|
|
bitfld.long 0x8 26. "WDIL,Watchdog Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 25. "BOL,Bus_Off Status Interrupt Line" "0,1"
|
|
bitfld.long 0x8 24. "EWL,Warning Status Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 23. "EPL,Error Passive Interrupt Line" "0,1"
|
|
bitfld.long 0x8 22. "ELOL,Error Logging Overflow Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 19. "DRXL,Message stored to Dedicated Receive Buffer Interrupt Line" "0,1"
|
|
bitfld.long 0x8 18. "TOOL,Timeout Occurred Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 17. "MRAFL,Message RAM Access Failure Interrupt Line" "0,1"
|
|
bitfld.long 0x8 16. "TSWL,Timestamp Wraparound Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 15. "TEFLL,Tx Event FIFO Event Lost Interrupt Line" "0,1"
|
|
bitfld.long 0x8 14. "TEFFL,Tx Event FIFO Full Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "TEFWL,Tx Event FIFO Watermark Reached Interrupt Line" "0,1"
|
|
bitfld.long 0x8 12. "TEFNL,Tx Event FIFO New Entry Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "TFEL,Tx FIFO Empty Interrupt Line" "0,1"
|
|
bitfld.long 0x8 10. "TCFL,Transmission Cancellation Finished Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "TCL,Transmission Completed Interrupt Line" "0,1"
|
|
bitfld.long 0x8 8. "HPML,High Priority Message Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 7. "RF1LL,Receive FIFO 1 Message Lost Interrupt Line" "0,1"
|
|
bitfld.long 0x8 6. "RF1FL,Receive FIFO 1 Full Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "RF1WL,Receive FIFO 1 Watermark Reached Interrupt Line" "0,1"
|
|
bitfld.long 0x8 4. "RF1NL,Receive FIFO 1 New Message Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "RF0LL,Receive FIFO 0 Message Lost Interrupt Line" "0,1"
|
|
bitfld.long 0x8 2. "RF0FL,Receive FIFO 0 Full Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "RF0WL,Receive FIFO 0 Watermark Reached Interrupt Line" "0,1"
|
|
bitfld.long 0x8 0. "RF0NL,Receive FIFO 0 New Message Interrupt Line" "0,1"
|
|
line.long 0xC "ILE,Interrupt Line Enable Register"
|
|
bitfld.long 0xC 1. "EINT1,Enable Interrupt Line 1" "0,1"
|
|
bitfld.long 0xC 0. "EINT0,Enable Interrupt Line 0" "0,1"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "GFC,Global Filter Configuration Register"
|
|
bitfld.long 0x0 4.--5. "ANFS,Accept Non-matching Frames Standard" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,?,?"
|
|
bitfld.long 0x0 2.--3. "ANFE,Accept Non-matching Frames Extended" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,?,?"
|
|
newline
|
|
bitfld.long 0x0 1. "RRFS,Reject Remote Frames Standard" "0: Filter remote frames with 11-bit standard IDs.,1: Reject all remote frames with 11-bit standard IDs."
|
|
bitfld.long 0x0 0. "RRFE,Reject Remote Frames Extended" "0: Filter remote frames with 29-bit extended IDs.,1: Reject all remote frames with 29-bit extended IDs."
|
|
line.long 0x4 "SIDFC,Standard ID Filter Configuration Register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "LSS,List Size Standard"
|
|
hexmask.long.word 0x4 2.--15. 1. "FLSSA,Filter List Standard Start Address"
|
|
line.long 0x8 "XIDFC,Extended ID Filter Configuration Register"
|
|
hexmask.long.byte 0x8 16.--22. 1. "LSE,List Size Extended"
|
|
hexmask.long.word 0x8 2.--15. 1. "FLESA,Filter List Extended Start Address"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "XIDAM,Extended ID AND Mask Register"
|
|
hexmask.long 0x0 0.--28. 1. "EIDM,Extended ID Mask"
|
|
rgroup.long 0x94++0x3
|
|
line.long 0x0 "HPMS,High Priority Message Status Register"
|
|
bitfld.long 0x0 15. "FLST,Filter List" "0,1"
|
|
hexmask.long.byte 0x0 8.--14. 1. "FIDX,Filter Index"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "MSI,Message Storage Indicator" "0: No FIFO selected.,1: FIFO message lost.,2: Message stored in FIFO 0.,3: Message stored in FIFO 1."
|
|
hexmask.long.byte 0x0 0.--5. 1. "BIDX,Buffer Index"
|
|
group.long 0x98++0xB
|
|
line.long 0x0 "NDAT1,New Data 1 Register"
|
|
bitfld.long 0x0 31. "ND31,New Data" "0,1"
|
|
bitfld.long 0x0 30. "ND30,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "ND29,New Data" "0,1"
|
|
bitfld.long 0x0 28. "ND28,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "ND27,New Data" "0,1"
|
|
bitfld.long 0x0 26. "ND26,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "ND25,New Data" "0,1"
|
|
bitfld.long 0x0 24. "ND24,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "ND23,New Data" "0,1"
|
|
bitfld.long 0x0 22. "ND22,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "ND21,New Data" "0,1"
|
|
bitfld.long 0x0 20. "ND20,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "ND19,New Data" "0,1"
|
|
bitfld.long 0x0 18. "ND18,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "ND17,New Data" "0,1"
|
|
bitfld.long 0x0 16. "ND16,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "ND15,New Data" "0,1"
|
|
bitfld.long 0x0 14. "ND14,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "ND13,New Data" "0,1"
|
|
bitfld.long 0x0 12. "ND12,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "ND11,New Data" "0,1"
|
|
bitfld.long 0x0 10. "ND10,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ND9,New Data" "0,1"
|
|
bitfld.long 0x0 8. "ND8,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "ND7,New Data" "0,1"
|
|
bitfld.long 0x0 6. "ND6,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ND5,New Data" "0,1"
|
|
bitfld.long 0x0 4. "ND4,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ND3,New Data" "0,1"
|
|
bitfld.long 0x0 2. "ND2,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ND1,New Data" "0,1"
|
|
bitfld.long 0x0 0. "ND0,New Data" "0,1"
|
|
line.long 0x4 "NDAT2,New Data 2 Register"
|
|
bitfld.long 0x4 31. "ND63,New Data" "0,1"
|
|
bitfld.long 0x4 30. "ND62,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "ND61,New Data" "0,1"
|
|
bitfld.long 0x4 28. "ND60,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "ND59,New Data" "0,1"
|
|
bitfld.long 0x4 26. "ND58,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "ND57,New Data" "0,1"
|
|
bitfld.long 0x4 24. "ND56,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "ND55,New Data" "0,1"
|
|
bitfld.long 0x4 22. "ND54,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "ND53,New Data" "0,1"
|
|
bitfld.long 0x4 20. "ND52,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "ND51,New Data" "0,1"
|
|
bitfld.long 0x4 18. "ND50,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "ND49,New Data" "0,1"
|
|
bitfld.long 0x4 16. "ND48,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "ND47,New Data" "0,1"
|
|
bitfld.long 0x4 14. "ND46,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "ND45,New Data" "0,1"
|
|
bitfld.long 0x4 12. "ND44,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "ND43,New Data" "0,1"
|
|
bitfld.long 0x4 10. "ND42,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "ND41,New Data" "0,1"
|
|
bitfld.long 0x4 8. "ND40,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "ND39,New Data" "0,1"
|
|
bitfld.long 0x4 6. "ND38,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "ND37,New Data" "0,1"
|
|
bitfld.long 0x4 4. "ND36,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "ND35,New Data" "0,1"
|
|
bitfld.long 0x4 2. "ND34,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "ND33,New Data" "0,1"
|
|
bitfld.long 0x4 0. "ND32,New Data" "0,1"
|
|
line.long 0x8 "RXF0C,Receive FIFO 0 Configuration Register"
|
|
bitfld.long 0x8 31. "F0OM,FIFO 0 Operation Mode" "0,1"
|
|
hexmask.long.byte 0x8 24.--30. 1. "F0WM,Receive FIFO 0 Watermark"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--22. 1. "F0S,Receive FIFO 0 Start Address"
|
|
hexmask.long.word 0x8 2.--15. 1. "F0SA,Receive FIFO 0 Start Address"
|
|
rgroup.long 0xA4++0x3
|
|
line.long 0x0 "RXF0S,Receive FIFO 0 Status Register"
|
|
bitfld.long 0x0 25. "RF0L,Receive FIFO 0 Message Lost" "0,1"
|
|
bitfld.long 0x0 24. "F0F,Receive FIFO 0 Fill Level" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--21. 1. "F0PI,Receive FIFO 0 Put Index"
|
|
hexmask.long.byte 0x0 8.--13. 1. "F0GI,Receive FIFO 0 Get Index"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "F0FL,Receive FIFO 0 Fill Level"
|
|
group.long 0xA8++0xB
|
|
line.long 0x0 "RXF0A,Receive FIFO 0 Acknowledge Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "F0AI,Receive FIFO 0 Acknowledge Index"
|
|
line.long 0x4 "RXBC,Receive Rx Buffer Configuration Register"
|
|
hexmask.long.word 0x4 2.--15. 1. "RBSA,Receive Buffer Start Address"
|
|
line.long 0x8 "RXF1C,Receive FIFO 1 Configuration Register"
|
|
bitfld.long 0x8 31. "F1OM,FIFO 1 Operation Mode" "0,1"
|
|
hexmask.long.byte 0x8 24.--30. 1. "F1WM,Receive FIFO 1 Watermark"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--22. 1. "F1S,Receive FIFO 1 Start Address"
|
|
hexmask.long.word 0x8 2.--15. 1. "F1SA,Receive FIFO 1 Start Address"
|
|
rgroup.long 0xB4++0x3
|
|
line.long 0x0 "RXF1S,Receive FIFO 1 Status Register"
|
|
bitfld.long 0x0 30.--31. "DMS,Debug Message Status" "0: Idle state wait for reception of debug messages..,1: Debug message A received.,2: Debug messages A B received.,3: Debug messages A B C received DMA request is set."
|
|
bitfld.long 0x0 25. "RF1L,Receive FIFO 1 Message Lost" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "F1F,Receive FIFO 1 Fill Level" "0,1"
|
|
hexmask.long.byte 0x0 16.--21. 1. "F1PI,Receive FIFO 1 Put Index"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "F1GI,Receive FIFO 1 Get Index"
|
|
hexmask.long.byte 0x0 0.--6. 1. "F1FL,Receive FIFO 1 Fill Level"
|
|
group.long 0xB8++0xB
|
|
line.long 0x0 "RXF1A,Receive FIFO 1 Acknowledge Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "F1AI,Receive FIFO 1 Acknowledge Index"
|
|
line.long 0x4 "RXESC,Receive Buffer / FIFO Element Size Configuration Register"
|
|
bitfld.long 0x4 8.--10. "RBDS,Receive Buffer Data Field Size" "0: 8-byte data field,1: 12-byte data field,2: 16-byte data field,3: 20-byte data field,4: 24-byte data field,5: 32-byte data field,6: 48-byte data field,7: 64-byte data field"
|
|
bitfld.long 0x4 4.--6. "F1DS,Receive FIFO 1 Data Field Size" "0: 8-byte data field,1: 12-byte data field,2: 16-byte data field,3: 20-byte data field,4: 24-byte data field,5: 32-byte data field,6: 48-byte data field,7: 64-byte data field"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "F0DS,Receive FIFO 0 Data Field Size" "0: 8-byte data field,1: 12-byte data field,2: 16-byte data field,3: 20-byte data field,4: 24-byte data field,5: 32-byte data field,6: 48-byte data field,7: 64-byte data field"
|
|
line.long 0x8 "TXBC,Transmit Buffer Configuration Register"
|
|
bitfld.long 0x8 30. "TFQM,Tx FIFO/Queue Mode" "0,1"
|
|
hexmask.long.byte 0x8 24.--29. 1. "TFQS,Transmit FIFO/Queue Size"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--21. 1. "NDTB,Number of Dedicated Transmit Buffers"
|
|
hexmask.long.word 0x8 2.--15. 1. "TBSA,Tx Buffers Start Address"
|
|
rgroup.long 0xC4++0x3
|
|
line.long 0x0 "TXFQS,Transmit FIFO/Queue Status Register"
|
|
bitfld.long 0x0 21. "TFQF,Tx FIFO/Queue Full" "0,1"
|
|
hexmask.long.byte 0x0 16.--20. 1. "TFQPI,Tx FIFO/Queue Put Index"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--12. 1. "TFGI,Tx FIFO Get Index"
|
|
hexmask.long.byte 0x0 0.--5. 1. "TFFL,Tx FIFO Free Level"
|
|
group.long 0xC8++0x3
|
|
line.long 0x0 "TXESC,Transmit Buffer Element Size Configuration Register"
|
|
bitfld.long 0x0 0.--2. "TBDS,Tx Buffer Data Field Size" "0: 8-byte data field,1: 12-byte data field,2: 16-byte data field,3: 20-byte data field,4: 24-byte data field,5: 32-byte data field,6: 48-byte data field,7: 64-byte data field"
|
|
rgroup.long 0xCC++0x3
|
|
line.long 0x0 "TXBRP,Transmit Buffer Request Pending Register"
|
|
bitfld.long 0x0 31. "TRP31,Transmission Request Pending for Buffer 31" "0,1"
|
|
bitfld.long 0x0 30. "TRP30,Transmission Request Pending for Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TRP29,Transmission Request Pending for Buffer 29" "0,1"
|
|
bitfld.long 0x0 28. "TRP28,Transmission Request Pending for Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "TRP27,Transmission Request Pending for Buffer 27" "0,1"
|
|
bitfld.long 0x0 26. "TRP26,Transmission Request Pending for Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "TRP25,Transmission Request Pending for Buffer 25" "0,1"
|
|
bitfld.long 0x0 24. "TRP24,Transmission Request Pending for Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "TRP23,Transmission Request Pending for Buffer 23" "0,1"
|
|
bitfld.long 0x0 22. "TRP22,Transmission Request Pending for Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "TRP21,Transmission Request Pending for Buffer 21" "0,1"
|
|
bitfld.long 0x0 20. "TRP20,Transmission Request Pending for Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "TRP19,Transmission Request Pending for Buffer 19" "0,1"
|
|
bitfld.long 0x0 18. "TRP18,Transmission Request Pending for Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "TRP17,Transmission Request Pending for Buffer 17" "0,1"
|
|
bitfld.long 0x0 16. "TRP16,Transmission Request Pending for Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TRP15,Transmission Request Pending for Buffer 15" "0,1"
|
|
bitfld.long 0x0 14. "TRP14,Transmission Request Pending for Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TRP13,Transmission Request Pending for Buffer 13" "0,1"
|
|
bitfld.long 0x0 12. "TRP12,Transmission Request Pending for Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TRP11,Transmission Request Pending for Buffer 11" "0,1"
|
|
bitfld.long 0x0 10. "TRP10,Transmission Request Pending for Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TRP9,Transmission Request Pending for Buffer 9" "0,1"
|
|
bitfld.long 0x0 8. "TRP8,Transmission Request Pending for Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TRP7,Transmission Request Pending for Buffer 7" "0,1"
|
|
bitfld.long 0x0 6. "TRP6,Transmission Request Pending for Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TRP5,Transmission Request Pending for Buffer 5" "0,1"
|
|
bitfld.long 0x0 4. "TRP4,Transmission Request Pending for Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TRP3,Transmission Request Pending for Buffer 3" "0,1"
|
|
bitfld.long 0x0 2. "TRP2,Transmission Request Pending for Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TRP1,Transmission Request Pending for Buffer 1" "0,1"
|
|
bitfld.long 0x0 0. "TRP0,Transmission Request Pending for Buffer 0" "0,1"
|
|
group.long 0xD0++0x7
|
|
line.long 0x0 "TXBAR,Transmit Buffer Add Request Register"
|
|
bitfld.long 0x0 31. "AR31,Add Request for Transmit Buffer 31" "0,1"
|
|
bitfld.long 0x0 30. "AR30,Add Request for Transmit Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "AR29,Add Request for Transmit Buffer 29" "0,1"
|
|
bitfld.long 0x0 28. "AR28,Add Request for Transmit Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "AR27,Add Request for Transmit Buffer 27" "0,1"
|
|
bitfld.long 0x0 26. "AR26,Add Request for Transmit Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "AR25,Add Request for Transmit Buffer 25" "0,1"
|
|
bitfld.long 0x0 24. "AR24,Add Request for Transmit Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "AR23,Add Request for Transmit Buffer 23" "0,1"
|
|
bitfld.long 0x0 22. "AR22,Add Request for Transmit Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "AR21,Add Request for Transmit Buffer 21" "0,1"
|
|
bitfld.long 0x0 20. "AR20,Add Request for Transmit Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "AR19,Add Request for Transmit Buffer 19" "0,1"
|
|
bitfld.long 0x0 18. "AR18,Add Request for Transmit Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "AR17,Add Request for Transmit Buffer 17" "0,1"
|
|
bitfld.long 0x0 16. "AR16,Add Request for Transmit Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "AR15,Add Request for Transmit Buffer 15" "0,1"
|
|
bitfld.long 0x0 14. "AR14,Add Request for Transmit Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "AR13,Add Request for Transmit Buffer 13" "0,1"
|
|
bitfld.long 0x0 12. "AR12,Add Request for Transmit Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "AR11,Add Request for Transmit Buffer 11" "0,1"
|
|
bitfld.long 0x0 10. "AR10,Add Request for Transmit Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "AR9,Add Request for Transmit Buffer 9" "0,1"
|
|
bitfld.long 0x0 8. "AR8,Add Request for Transmit Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "AR7,Add Request for Transmit Buffer 7" "0,1"
|
|
bitfld.long 0x0 6. "AR6,Add Request for Transmit Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "AR5,Add Request for Transmit Buffer 5" "0,1"
|
|
bitfld.long 0x0 4. "AR4,Add Request for Transmit Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "AR3,Add Request for Transmit Buffer 3" "0,1"
|
|
bitfld.long 0x0 2. "AR2,Add Request for Transmit Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "AR1,Add Request for Transmit Buffer 1" "0,1"
|
|
bitfld.long 0x0 0. "AR0,Add Request for Transmit Buffer 0" "0,1"
|
|
line.long 0x4 "TXBCR,Transmit Buffer Cancellation Request Register"
|
|
bitfld.long 0x4 31. "CR31,Cancellation Request for Transmit Buffer 31" "0,1"
|
|
bitfld.long 0x4 30. "CR30,Cancellation Request for Transmit Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "CR29,Cancellation Request for Transmit Buffer 29" "0,1"
|
|
bitfld.long 0x4 28. "CR28,Cancellation Request for Transmit Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "CR27,Cancellation Request for Transmit Buffer 27" "0,1"
|
|
bitfld.long 0x4 26. "CR26,Cancellation Request for Transmit Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "CR25,Cancellation Request for Transmit Buffer 25" "0,1"
|
|
bitfld.long 0x4 24. "CR24,Cancellation Request for Transmit Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "CR23,Cancellation Request for Transmit Buffer 23" "0,1"
|
|
bitfld.long 0x4 22. "CR22,Cancellation Request for Transmit Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "CR21,Cancellation Request for Transmit Buffer 21" "0,1"
|
|
bitfld.long 0x4 20. "CR20,Cancellation Request for Transmit Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CR19,Cancellation Request for Transmit Buffer 19" "0,1"
|
|
bitfld.long 0x4 18. "CR18,Cancellation Request for Transmit Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CR17,Cancellation Request for Transmit Buffer 17" "0,1"
|
|
bitfld.long 0x4 16. "CR16,Cancellation Request for Transmit Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CR15,Cancellation Request for Transmit Buffer 15" "0,1"
|
|
bitfld.long 0x4 14. "CR14,Cancellation Request for Transmit Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "CR13,Cancellation Request for Transmit Buffer 13" "0,1"
|
|
bitfld.long 0x4 12. "CR12,Cancellation Request for Transmit Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "CR11,Cancellation Request for Transmit Buffer 11" "0,1"
|
|
bitfld.long 0x4 10. "CR10,Cancellation Request for Transmit Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "CR9,Cancellation Request for Transmit Buffer 9" "0,1"
|
|
bitfld.long 0x4 8. "CR8,Cancellation Request for Transmit Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "CR7,Cancellation Request for Transmit Buffer 7" "0,1"
|
|
bitfld.long 0x4 6. "CR6,Cancellation Request for Transmit Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CR5,Cancellation Request for Transmit Buffer 5" "0,1"
|
|
bitfld.long 0x4 4. "CR4,Cancellation Request for Transmit Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CR3,Cancellation Request for Transmit Buffer 3" "0,1"
|
|
bitfld.long 0x4 2. "CR2,Cancellation Request for Transmit Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CR1,Cancellation Request for Transmit Buffer 1" "0,1"
|
|
bitfld.long 0x4 0. "CR0,Cancellation Request for Transmit Buffer 0" "0,1"
|
|
rgroup.long 0xD8++0x7
|
|
line.long 0x0 "TXBTO,Transmit Buffer Transmission Occurred Register"
|
|
bitfld.long 0x0 31. "TO31,Transmission Occurred for Buffer 31" "0,1"
|
|
bitfld.long 0x0 30. "TO30,Transmission Occurred for Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TO29,Transmission Occurred for Buffer 29" "0,1"
|
|
bitfld.long 0x0 28. "TO28,Transmission Occurred for Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "TO27,Transmission Occurred for Buffer 27" "0,1"
|
|
bitfld.long 0x0 26. "TO26,Transmission Occurred for Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "TO25,Transmission Occurred for Buffer 25" "0,1"
|
|
bitfld.long 0x0 24. "TO24,Transmission Occurred for Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "TO23,Transmission Occurred for Buffer 23" "0,1"
|
|
bitfld.long 0x0 22. "TO22,Transmission Occurred for Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "TO21,Transmission Occurred for Buffer 21" "0,1"
|
|
bitfld.long 0x0 20. "TO20,Transmission Occurred for Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "TO19,Transmission Occurred for Buffer 19" "0,1"
|
|
bitfld.long 0x0 18. "TO18,Transmission Occurred for Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "TO17,Transmission Occurred for Buffer 17" "0,1"
|
|
bitfld.long 0x0 16. "TO16,Transmission Occurred for Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TO15,Transmission Occurred for Buffer 15" "0,1"
|
|
bitfld.long 0x0 14. "TO14,Transmission Occurred for Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TO13,Transmission Occurred for Buffer 13" "0,1"
|
|
bitfld.long 0x0 12. "TO12,Transmission Occurred for Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TO11,Transmission Occurred for Buffer 11" "0,1"
|
|
bitfld.long 0x0 10. "TO10,Transmission Occurred for Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TO9,Transmission Occurred for Buffer 9" "0,1"
|
|
bitfld.long 0x0 8. "TO8,Transmission Occurred for Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TO7,Transmission Occurred for Buffer 7" "0,1"
|
|
bitfld.long 0x0 6. "TO6,Transmission Occurred for Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TO5,Transmission Occurred for Buffer 5" "0,1"
|
|
bitfld.long 0x0 4. "TO4,Transmission Occurred for Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TO3,Transmission Occurred for Buffer 3" "0,1"
|
|
bitfld.long 0x0 2. "TO2,Transmission Occurred for Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TO1,Transmission Occurred for Buffer 1" "0,1"
|
|
bitfld.long 0x0 0. "TO0,Transmission Occurred for Buffer 0" "0,1"
|
|
line.long 0x4 "TXBCF,Transmit Buffer Cancellation Finished Register"
|
|
bitfld.long 0x4 31. "CF31,Cancellation Finished for Transmit Buffer 31" "0,1"
|
|
bitfld.long 0x4 30. "CF30,Cancellation Finished for Transmit Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "CF29,Cancellation Finished for Transmit Buffer 29" "0,1"
|
|
bitfld.long 0x4 28. "CF28,Cancellation Finished for Transmit Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "CF27,Cancellation Finished for Transmit Buffer 27" "0,1"
|
|
bitfld.long 0x4 26. "CF26,Cancellation Finished for Transmit Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "CF25,Cancellation Finished for Transmit Buffer 25" "0,1"
|
|
bitfld.long 0x4 24. "CF24,Cancellation Finished for Transmit Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "CF23,Cancellation Finished for Transmit Buffer 23" "0,1"
|
|
bitfld.long 0x4 22. "CF22,Cancellation Finished for Transmit Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "CF21,Cancellation Finished for Transmit Buffer 21" "0,1"
|
|
bitfld.long 0x4 20. "CF20,Cancellation Finished for Transmit Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CF19,Cancellation Finished for Transmit Buffer 19" "0,1"
|
|
bitfld.long 0x4 18. "CF18,Cancellation Finished for Transmit Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CF17,Cancellation Finished for Transmit Buffer 17" "0,1"
|
|
bitfld.long 0x4 16. "CF16,Cancellation Finished for Transmit Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CF15,Cancellation Finished for Transmit Buffer 15" "0,1"
|
|
bitfld.long 0x4 14. "CF14,Cancellation Finished for Transmit Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "CF13,Cancellation Finished for Transmit Buffer 13" "0,1"
|
|
bitfld.long 0x4 12. "CF12,Cancellation Finished for Transmit Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "CF11,Cancellation Finished for Transmit Buffer 11" "0,1"
|
|
bitfld.long 0x4 10. "CF10,Cancellation Finished for Transmit Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "CF9,Cancellation Finished for Transmit Buffer 9" "0,1"
|
|
bitfld.long 0x4 8. "CF8,Cancellation Finished for Transmit Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "CF7,Cancellation Finished for Transmit Buffer 7" "0,1"
|
|
bitfld.long 0x4 6. "CF6,Cancellation Finished for Transmit Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CF5,Cancellation Finished for Transmit Buffer 5" "0,1"
|
|
bitfld.long 0x4 4. "CF4,Cancellation Finished for Transmit Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CF3,Cancellation Finished for Transmit Buffer 3" "0,1"
|
|
bitfld.long 0x4 2. "CF2,Cancellation Finished for Transmit Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CF1,Cancellation Finished for Transmit Buffer 1" "0,1"
|
|
bitfld.long 0x4 0. "CF0,Cancellation Finished for Transmit Buffer 0" "0,1"
|
|
group.long 0xE0++0x7
|
|
line.long 0x0 "TXBTIE,Transmit Buffer Transmission Interrupt Enable Register"
|
|
bitfld.long 0x0 31. "TIE31,Transmission Interrupt Enable for Buffer 31" "0,1"
|
|
bitfld.long 0x0 30. "TIE30,Transmission Interrupt Enable for Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TIE29,Transmission Interrupt Enable for Buffer 29" "0,1"
|
|
bitfld.long 0x0 28. "TIE28,Transmission Interrupt Enable for Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "TIE27,Transmission Interrupt Enable for Buffer 27" "0,1"
|
|
bitfld.long 0x0 26. "TIE26,Transmission Interrupt Enable for Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "TIE25,Transmission Interrupt Enable for Buffer 25" "0,1"
|
|
bitfld.long 0x0 24. "TIE24,Transmission Interrupt Enable for Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "TIE23,Transmission Interrupt Enable for Buffer 23" "0,1"
|
|
bitfld.long 0x0 22. "TIE22,Transmission Interrupt Enable for Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "TIE21,Transmission Interrupt Enable for Buffer 21" "0,1"
|
|
bitfld.long 0x0 20. "TIE20,Transmission Interrupt Enable for Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "TIE19,Transmission Interrupt Enable for Buffer 19" "0,1"
|
|
bitfld.long 0x0 18. "TIE18,Transmission Interrupt Enable for Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "TIE17,Transmission Interrupt Enable for Buffer 17" "0,1"
|
|
bitfld.long 0x0 16. "TIE16,Transmission Interrupt Enable for Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TIE15,Transmission Interrupt Enable for Buffer 15" "0,1"
|
|
bitfld.long 0x0 14. "TIE14,Transmission Interrupt Enable for Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TIE13,Transmission Interrupt Enable for Buffer 13" "0,1"
|
|
bitfld.long 0x0 12. "TIE12,Transmission Interrupt Enable for Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TIE11,Transmission Interrupt Enable for Buffer 11" "0,1"
|
|
bitfld.long 0x0 10. "TIE10,Transmission Interrupt Enable for Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TIE9,Transmission Interrupt Enable for Buffer 9" "0,1"
|
|
bitfld.long 0x0 8. "TIE8,Transmission Interrupt Enable for Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TIE7,Transmission Interrupt Enable for Buffer 7" "0,1"
|
|
bitfld.long 0x0 6. "TIE6,Transmission Interrupt Enable for Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TIE5,Transmission Interrupt Enable for Buffer 5" "0,1"
|
|
bitfld.long 0x0 4. "TIE4,Transmission Interrupt Enable for Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TIE3,Transmission Interrupt Enable for Buffer 3" "0,1"
|
|
bitfld.long 0x0 2. "TIE2,Transmission Interrupt Enable for Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TIE1,Transmission Interrupt Enable for Buffer 1" "0,1"
|
|
bitfld.long 0x0 0. "TIE0,Transmission Interrupt Enable for Buffer 0" "0,1"
|
|
line.long 0x4 "TXBCIE,Transmit Buffer Cancellation Finished Interrupt Enable Register"
|
|
bitfld.long 0x4 31. "CFIE31,Cancellation Finished Interrupt Enable for Transmit Buffer 31" "0,1"
|
|
bitfld.long 0x4 30. "CFIE30,Cancellation Finished Interrupt Enable for Transmit Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "CFIE29,Cancellation Finished Interrupt Enable for Transmit Buffer 29" "0,1"
|
|
bitfld.long 0x4 28. "CFIE28,Cancellation Finished Interrupt Enable for Transmit Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "CFIE27,Cancellation Finished Interrupt Enable for Transmit Buffer 27" "0,1"
|
|
bitfld.long 0x4 26. "CFIE26,Cancellation Finished Interrupt Enable for Transmit Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "CFIE25,Cancellation Finished Interrupt Enable for Transmit Buffer 25" "0,1"
|
|
bitfld.long 0x4 24. "CFIE24,Cancellation Finished Interrupt Enable for Transmit Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "CFIE23,Cancellation Finished Interrupt Enable for Transmit Buffer 23" "0,1"
|
|
bitfld.long 0x4 22. "CFIE22,Cancellation Finished Interrupt Enable for Transmit Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "CFIE21,Cancellation Finished Interrupt Enable for Transmit Buffer 21" "0,1"
|
|
bitfld.long 0x4 20. "CFIE20,Cancellation Finished Interrupt Enable for Transmit Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CFIE19,Cancellation Finished Interrupt Enable for Transmit Buffer 19" "0,1"
|
|
bitfld.long 0x4 18. "CFIE18,Cancellation Finished Interrupt Enable for Transmit Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CFIE17,Cancellation Finished Interrupt Enable for Transmit Buffer 17" "0,1"
|
|
bitfld.long 0x4 16. "CFIE16,Cancellation Finished Interrupt Enable for Transmit Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CFIE15,Cancellation Finished Interrupt Enable for Transmit Buffer 15" "0,1"
|
|
bitfld.long 0x4 14. "CFIE14,Cancellation Finished Interrupt Enable for Transmit Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "CFIE13,Cancellation Finished Interrupt Enable for Transmit Buffer 13" "0,1"
|
|
bitfld.long 0x4 12. "CFIE12,Cancellation Finished Interrupt Enable for Transmit Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "CFIE11,Cancellation Finished Interrupt Enable for Transmit Buffer 11" "0,1"
|
|
bitfld.long 0x4 10. "CFIE10,Cancellation Finished Interrupt Enable for Transmit Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "CFIE9,Cancellation Finished Interrupt Enable for Transmit Buffer 9" "0,1"
|
|
bitfld.long 0x4 8. "CFIE8,Cancellation Finished Interrupt Enable for Transmit Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "CFIE7,Cancellation Finished Interrupt Enable for Transmit Buffer 7" "0,1"
|
|
bitfld.long 0x4 6. "CFIE6,Cancellation Finished Interrupt Enable for Transmit Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CFIE5,Cancellation Finished Interrupt Enable for Transmit Buffer 5" "0,1"
|
|
bitfld.long 0x4 4. "CFIE4,Cancellation Finished Interrupt Enable for Transmit Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CFIE3,Cancellation Finished Interrupt Enable for Transmit Buffer 3" "0,1"
|
|
bitfld.long 0x4 2. "CFIE2,Cancellation Finished Interrupt Enable for Transmit Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CFIE1,Cancellation Finished Interrupt Enable for Transmit Buffer 1" "0,1"
|
|
bitfld.long 0x4 0. "CFIE0,Cancellation Finished Interrupt Enable for Transmit Buffer 0" "0,1"
|
|
group.long 0xF0++0x3
|
|
line.long 0x0 "TXEFC,Transmit Event FIFO Configuration Register"
|
|
hexmask.long.byte 0x0 24.--29. 1. "EFWM,Event FIFO Watermark"
|
|
hexmask.long.byte 0x0 16.--21. 1. "EFS,Event FIFO Size"
|
|
newline
|
|
hexmask.long.word 0x0 2.--15. 1. "EFSA,Event FIFO Start Address"
|
|
rgroup.long 0xF4++0x3
|
|
line.long 0x0 "TXEFS,Transmit Event FIFO Status Register"
|
|
bitfld.long 0x0 25. "TEFL,Tx Event FIFO Element Lost" "0,1"
|
|
bitfld.long 0x0 24. "EFF,Event FIFO Full" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--20. 1. "EFPI,Event FIFO Put Index"
|
|
hexmask.long.byte 0x0 8.--12. 1. "EFGI,Event FIFO Get Index"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "EFFL,Event FIFO Fill Level"
|
|
group.long 0xF8++0x3
|
|
line.long 0x0 "TXEFA,Transmit Event FIFO Acknowledge Register"
|
|
hexmask.long.byte 0x0 0.--4. 1. "EFAI,Event FIFO Acknowledge Index"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("PIC32CZ2051CA70144"))
|
|
tree "MCAN1"
|
|
base ad:0x40034000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "CREL,Core Release Register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "REL,Core Release"
|
|
hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of Core Release"
|
|
newline
|
|
hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of Core Release"
|
|
hexmask.long.byte 0x0 16.--19. 1. "YEAR,Timestamp Year"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "MON,Timestamp Month"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DAY,Timestamp Day"
|
|
line.long 0x4 "ENDN,Endian Register"
|
|
hexmask.long 0x4 0.--31. 1. "ETV,Endianness Test Value"
|
|
group.long 0x8++0x27
|
|
line.long 0x0 "CUST,Customer Register"
|
|
hexmask.long 0x0 0.--31. 1. "CSV,Customer-specific Value"
|
|
line.long 0x4 "DBTP,Data Bit Timing and Prescaler Register"
|
|
bitfld.long 0x4 23. "TDC,Transmitter Delay Compensation" "0: Transmitter Delay Compensation disabled.,1: Transmitter Delay Compensation enabled."
|
|
hexmask.long.byte 0x4 16.--20. 1. "DBRP,Data Bit Rate Prescaler"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--12. 1. "DTSEG1,Data Time Segment Before Sample Point"
|
|
hexmask.long.byte 0x4 4.--7. 1. "DTSEG2,Data Time Segment After Sample Point"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "DSJW,Data (Re) Synchronization Jump Width" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "TEST,Test Register"
|
|
bitfld.long 0x8 7. "RX,Receive Pin (read-only)" "0,1"
|
|
bitfld.long 0x8 5.--6. "TX,Control of Transmit Pin (read/write)" "0: Reset value CANTX controlled by the CAN Core..,1: Sample Point can be monitored at pin CANTX.,2: Dominant ('0') level at pin CANTX.,3: Recessive ('1') at pin CANTX."
|
|
newline
|
|
bitfld.long 0x8 4. "LBCK,Loop Back Mode (read/write)" "0: Reset value. Loop Back mode is disabled.,1: Loop Back mode is enabled (see Section 6.1.9)."
|
|
line.long 0xC "RWD,RAM Watchdog Register"
|
|
hexmask.long.byte 0xC 8.--15. 1. "WDV,Watchdog Value (read-only)"
|
|
hexmask.long.byte 0xC 0.--7. 1. "WDC,Watchdog Configuration (read/write)"
|
|
line.long 0x10 "CCCR,CC Control Register"
|
|
bitfld.long 0x10 15. "NISO,Non-ISO Operation" "0,1"
|
|
bitfld.long 0x10 14. "TXP,Transmit Pause (read/write write protection)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 13. "EFBI,Edge Filtering during Bus Integration (read/write write protection)" "0,1"
|
|
bitfld.long 0x10 12. "PXHD,Protocol Exception Event Handling (read/write write protection)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "BRSE,Bit Rate Switching Enable (read/write write protection)" "0: Bit rate switching for transmissions disabled.,1: Bit rate switching for transmissions enabled."
|
|
bitfld.long 0x10 8. "FDOE,CAN FD Operation Enable (read/write write protection)" "0: FD operation disabled.,1: FD operation enabled."
|
|
newline
|
|
bitfld.long 0x10 7. "TEST,Test Mode Enable (read/write write protection against '1')" "0: Normal operation MCAN_TEST register holds reset..,1: Test mode write access to MCAN_TEST register.."
|
|
bitfld.long 0x10 6. "DAR,Disable Automatic Retransmission (read/write write protection)" "0: Automatic retransmission of messages not..,1: Automatic retransmission disabled."
|
|
newline
|
|
bitfld.long 0x10 5. "MON,Bus Monitoring Mode (read/write write protection against '1')" "0: Bus Monitoring mode is disabled.,1: Bus Monitoring mode is enabled."
|
|
bitfld.long 0x10 4. "CSR,Clock Stop Request (read/write)" "0: No clock stop is requested.,1: Clock stop requested. When clock stop is.."
|
|
newline
|
|
bitfld.long 0x10 3. "CSA,Clock Stop Acknowledge (read-only)" "0,1"
|
|
bitfld.long 0x10 2. "ASM,Restricted Operation Mode (read/write write protection against '1')" "0: Normal CAN operation.,1: Restricted Operation mode active."
|
|
newline
|
|
bitfld.long 0x10 1. "CCE,Configuration Change Enable (read/write write protection)" "0: The processor has no write access to the..,1: The processor has write access to the protected.."
|
|
bitfld.long 0x10 0. "INIT,Initialization (read/write)" "0: Normal operation.,1: Initialization is started."
|
|
line.long 0x14 "NBTP,Nominal Bit Timing and Prescaler Register"
|
|
hexmask.long.byte 0x14 25.--31. 1. "NSJW,Nominal (Re) Synchronization Jump Width"
|
|
hexmask.long.word 0x14 16.--24. 1. "NBRP,Nominal Bit Rate Prescaler"
|
|
newline
|
|
hexmask.long.byte 0x14 8.--15. 1. "NTSEG1,Nominal Time Segment Before Sample Point"
|
|
hexmask.long.byte 0x14 0.--6. 1. "NTSEG2,Nominal Time Segment After Sample Point"
|
|
line.long 0x18 "TSCC,Timestamp Counter Configuration Register"
|
|
hexmask.long.byte 0x18 16.--19. 1. "TCP,Timestamp Counter Prescaler"
|
|
bitfld.long 0x18 0.--1. "TSS,Timestamp Select" "0: Timestamp counter value always 0x0000,1: Timestamp counter value incremented according to..,2: External timestamp counter value used,?"
|
|
line.long 0x1C "TSCV,Timestamp Counter Value Register"
|
|
hexmask.long.word 0x1C 0.--15. 1. "TSC,Timestamp Counter (cleared on write)"
|
|
line.long 0x20 "TOCC,Timeout Counter Configuration Register"
|
|
hexmask.long.word 0x20 16.--31. 1. "TOP,Timeout Period"
|
|
bitfld.long 0x20 1.--2. "TOS,Timeout Select" "0: Continuous operation,1: Timeout controlled by Tx Event FIFO,2: Timeout controlled by Receive FIFO 0,3: Timeout controlled by Receive FIFO 1"
|
|
newline
|
|
bitfld.long 0x20 0. "ETOC,Enable Timeout Counter" "0: Timeout Counter disabled.,1: Timeout Counter enabled."
|
|
line.long 0x24 "TOCV,Timeout Counter Value Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "TOC,Timeout Counter (cleared on write)"
|
|
rgroup.long 0x40++0x7
|
|
line.long 0x0 "ECR,Error Counter Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CEL,CAN Error Logging (cleared on read)"
|
|
bitfld.long 0x0 15. "RP,Receive Error Passive" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--14. 1. "REC,Receive Error Counter"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TEC,Transmit Error Counter"
|
|
line.long 0x4 "PSR,Protocol Status Register"
|
|
hexmask.long.byte 0x4 16.--22. 1. "TDCV,Transmitter Delay Compensation Value"
|
|
bitfld.long 0x4 14. "PXE,Protocol Exception Event (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "RFDF,Received a CAN FD Message (cleared on read)" "0,1"
|
|
bitfld.long 0x4 12. "RBRS,BRS Flag of Last Received CAN FD Message (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "RESI,ESI Flag of Last Received CAN FD Message (cleared on read)" "0,1"
|
|
bitfld.long 0x4 8.--10. "DLEC,Data Phase Last Error Code (set to 111 on read)" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 7. "BO,Bus_Off Status" "0,1"
|
|
bitfld.long 0x4 6. "EW,Warning Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "EP,Error Passive" "0,1"
|
|
bitfld.long 0x4 3.--4. "ACT,Activity" "0: Node is synchronizing on CAN communication,1: Node is neither receiver nor transmitter,2: Node is operating as receiver,3: Node is operating as transmitter"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "LEC,Last Error Code (set to 111 on read)" "0: No error occurred since LEC has been reset by..,1: More than 5 equal bits in a sequence have..,2: A fixed format part of a received frame has the..,3: The message transmitted by the MCAN was not..,4: During transmission of a message (with the..,5: During transmission of a message (or acknowledge..,6: The CRC check sum of a received message was..,7: Any read access to the Protocol Status Register.."
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "TDCR,Transmit Delay Compensation Register"
|
|
hexmask.long.byte 0x0 8.--14. 1. "TDCO,Transmitter Delay Compensation Offset"
|
|
hexmask.long.byte 0x0 0.--6. 1. "TDCF,Transmitter Delay Compensation Filter"
|
|
group.long 0x50++0xF
|
|
line.long 0x0 "IR,Interrupt Register"
|
|
bitfld.long 0x0 29. "ARA,Access to Reserved Address" "0,1"
|
|
bitfld.long 0x0 28. "PED,Protocol Error in Data Phase" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "PEA,Protocol Error in Arbitration Phase" "0,1"
|
|
bitfld.long 0x0 26. "WDI,Watchdog Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "BO,Bus_Off Status" "0,1"
|
|
bitfld.long 0x0 24. "EW,Warning Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "EP,Error Passive" "0,1"
|
|
bitfld.long 0x0 22. "ELO,Error Logging Overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "DRX,Message stored to Dedicated Receive Buffer" "0,1"
|
|
bitfld.long 0x0 18. "TOO,Timeout Occurred" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "MRAF,Message RAM Access Failure" "0,1"
|
|
bitfld.long 0x0 16. "TSW,Timestamp Wraparound" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TEFL,Tx Event FIFO Element Lost" "0,1"
|
|
bitfld.long 0x0 14. "TEFF,Tx Event FIFO Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TEFW,Tx Event FIFO Watermark Reached" "0,1"
|
|
bitfld.long 0x0 12. "TEFN,Tx Event FIFO New Entry" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TFE,Tx FIFO Empty" "0,1"
|
|
bitfld.long 0x0 10. "TCF,Transmission Cancellation Finished" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TC,Transmission Completed" "0,1"
|
|
bitfld.long 0x0 8. "HPM,High Priority Message" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "RF1L,Receive FIFO 1 Message Lost" "0,1"
|
|
bitfld.long 0x0 6. "RF1F,Receive FIFO 1 Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RF1W,Receive FIFO 1 Watermark Reached" "0,1"
|
|
bitfld.long 0x0 4. "RF1N,Receive FIFO 1 New Message" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RF0L,Receive FIFO 0 Message Lost" "0,1"
|
|
bitfld.long 0x0 2. "RF0F,Receive FIFO 0 Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RF0W,Receive FIFO 0 Watermark Reached" "0,1"
|
|
bitfld.long 0x0 0. "RF0N,Receive FIFO 0 New Message" "0,1"
|
|
line.long 0x4 "IE,Interrupt Enable Register"
|
|
bitfld.long 0x4 29. "ARAE,Access to Reserved Address Enable" "0,1"
|
|
bitfld.long 0x4 28. "PEDE,Protocol Error in Data Phase Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "PEAE,Protocol Error in Arbitration Phase Enable" "0,1"
|
|
bitfld.long 0x4 26. "WDIE,Watchdog Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "BOE,Bus_Off Status Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 24. "EWE,Warning Status Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "EPE,Error Passive Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 22. "ELOE,Error Logging Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "DRXE,Message stored to Dedicated Receive Buffer Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 18. "TOOE,Timeout Occurred Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "MRAFE,Message RAM Access Failure Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 16. "TSWE,Timestamp Wraparound Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "TEFLE,Tx Event FIFO Event Lost Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 14. "TEFFE,Tx Event FIFO Full Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "TEFWE,Tx Event FIFO Watermark Reached Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 12. "TEFNE,Tx Event FIFO New Entry Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "TFEE,Tx FIFO Empty Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 10. "TCFE,Transmission Cancellation Finished Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "TCE,Transmission Completed Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 8. "HPME,High Priority Message Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "RF1LE,Receive FIFO 1 Message Lost Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 6. "RF1FE,Receive FIFO 1 Full Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "RF1WE,Receive FIFO 1 Watermark Reached Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 4. "RF1NE,Receive FIFO 1 New Message Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "RF0LE,Receive FIFO 0 Message Lost Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 2. "RF0FE,Receive FIFO 0 Full Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "RF0WE,Receive FIFO 0 Watermark Reached Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "RF0NE,Receive FIFO 0 New Message Interrupt Enable" "0,1"
|
|
line.long 0x8 "ILS,Interrupt Line Select Register"
|
|
bitfld.long 0x8 29. "ARAL,Access to Reserved Address Line" "0,1"
|
|
bitfld.long 0x8 28. "PEDL,Protocol Error in Data Phase Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 27. "PEAL,Protocol Error in Arbitration Phase Line" "0,1"
|
|
bitfld.long 0x8 26. "WDIL,Watchdog Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 25. "BOL,Bus_Off Status Interrupt Line" "0,1"
|
|
bitfld.long 0x8 24. "EWL,Warning Status Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 23. "EPL,Error Passive Interrupt Line" "0,1"
|
|
bitfld.long 0x8 22. "ELOL,Error Logging Overflow Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 19. "DRXL,Message stored to Dedicated Receive Buffer Interrupt Line" "0,1"
|
|
bitfld.long 0x8 18. "TOOL,Timeout Occurred Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 17. "MRAFL,Message RAM Access Failure Interrupt Line" "0,1"
|
|
bitfld.long 0x8 16. "TSWL,Timestamp Wraparound Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 15. "TEFLL,Tx Event FIFO Event Lost Interrupt Line" "0,1"
|
|
bitfld.long 0x8 14. "TEFFL,Tx Event FIFO Full Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "TEFWL,Tx Event FIFO Watermark Reached Interrupt Line" "0,1"
|
|
bitfld.long 0x8 12. "TEFNL,Tx Event FIFO New Entry Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "TFEL,Tx FIFO Empty Interrupt Line" "0,1"
|
|
bitfld.long 0x8 10. "TCFL,Transmission Cancellation Finished Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "TCL,Transmission Completed Interrupt Line" "0,1"
|
|
bitfld.long 0x8 8. "HPML,High Priority Message Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 7. "RF1LL,Receive FIFO 1 Message Lost Interrupt Line" "0,1"
|
|
bitfld.long 0x8 6. "RF1FL,Receive FIFO 1 Full Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "RF1WL,Receive FIFO 1 Watermark Reached Interrupt Line" "0,1"
|
|
bitfld.long 0x8 4. "RF1NL,Receive FIFO 1 New Message Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "RF0LL,Receive FIFO 0 Message Lost Interrupt Line" "0,1"
|
|
bitfld.long 0x8 2. "RF0FL,Receive FIFO 0 Full Interrupt Line" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "RF0WL,Receive FIFO 0 Watermark Reached Interrupt Line" "0,1"
|
|
bitfld.long 0x8 0. "RF0NL,Receive FIFO 0 New Message Interrupt Line" "0,1"
|
|
line.long 0xC "ILE,Interrupt Line Enable Register"
|
|
bitfld.long 0xC 1. "EINT1,Enable Interrupt Line 1" "0,1"
|
|
bitfld.long 0xC 0. "EINT0,Enable Interrupt Line 0" "0,1"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "GFC,Global Filter Configuration Register"
|
|
bitfld.long 0x0 4.--5. "ANFS,Accept Non-matching Frames Standard" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,?,?"
|
|
bitfld.long 0x0 2.--3. "ANFE,Accept Non-matching Frames Extended" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,?,?"
|
|
newline
|
|
bitfld.long 0x0 1. "RRFS,Reject Remote Frames Standard" "0: Filter remote frames with 11-bit standard IDs.,1: Reject all remote frames with 11-bit standard IDs."
|
|
bitfld.long 0x0 0. "RRFE,Reject Remote Frames Extended" "0: Filter remote frames with 29-bit extended IDs.,1: Reject all remote frames with 29-bit extended IDs."
|
|
line.long 0x4 "SIDFC,Standard ID Filter Configuration Register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "LSS,List Size Standard"
|
|
hexmask.long.word 0x4 2.--15. 1. "FLSSA,Filter List Standard Start Address"
|
|
line.long 0x8 "XIDFC,Extended ID Filter Configuration Register"
|
|
hexmask.long.byte 0x8 16.--22. 1. "LSE,List Size Extended"
|
|
hexmask.long.word 0x8 2.--15. 1. "FLESA,Filter List Extended Start Address"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "XIDAM,Extended ID AND Mask Register"
|
|
hexmask.long 0x0 0.--28. 1. "EIDM,Extended ID Mask"
|
|
rgroup.long 0x94++0x3
|
|
line.long 0x0 "HPMS,High Priority Message Status Register"
|
|
bitfld.long 0x0 15. "FLST,Filter List" "0,1"
|
|
hexmask.long.byte 0x0 8.--14. 1. "FIDX,Filter Index"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "MSI,Message Storage Indicator" "0: No FIFO selected.,1: FIFO message lost.,2: Message stored in FIFO 0.,3: Message stored in FIFO 1."
|
|
hexmask.long.byte 0x0 0.--5. 1. "BIDX,Buffer Index"
|
|
group.long 0x98++0xB
|
|
line.long 0x0 "NDAT1,New Data 1 Register"
|
|
bitfld.long 0x0 31. "ND31,New Data" "0,1"
|
|
bitfld.long 0x0 30. "ND30,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "ND29,New Data" "0,1"
|
|
bitfld.long 0x0 28. "ND28,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "ND27,New Data" "0,1"
|
|
bitfld.long 0x0 26. "ND26,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "ND25,New Data" "0,1"
|
|
bitfld.long 0x0 24. "ND24,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "ND23,New Data" "0,1"
|
|
bitfld.long 0x0 22. "ND22,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "ND21,New Data" "0,1"
|
|
bitfld.long 0x0 20. "ND20,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "ND19,New Data" "0,1"
|
|
bitfld.long 0x0 18. "ND18,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "ND17,New Data" "0,1"
|
|
bitfld.long 0x0 16. "ND16,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "ND15,New Data" "0,1"
|
|
bitfld.long 0x0 14. "ND14,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "ND13,New Data" "0,1"
|
|
bitfld.long 0x0 12. "ND12,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "ND11,New Data" "0,1"
|
|
bitfld.long 0x0 10. "ND10,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ND9,New Data" "0,1"
|
|
bitfld.long 0x0 8. "ND8,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "ND7,New Data" "0,1"
|
|
bitfld.long 0x0 6. "ND6,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ND5,New Data" "0,1"
|
|
bitfld.long 0x0 4. "ND4,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ND3,New Data" "0,1"
|
|
bitfld.long 0x0 2. "ND2,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ND1,New Data" "0,1"
|
|
bitfld.long 0x0 0. "ND0,New Data" "0,1"
|
|
line.long 0x4 "NDAT2,New Data 2 Register"
|
|
bitfld.long 0x4 31. "ND63,New Data" "0,1"
|
|
bitfld.long 0x4 30. "ND62,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "ND61,New Data" "0,1"
|
|
bitfld.long 0x4 28. "ND60,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "ND59,New Data" "0,1"
|
|
bitfld.long 0x4 26. "ND58,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "ND57,New Data" "0,1"
|
|
bitfld.long 0x4 24. "ND56,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "ND55,New Data" "0,1"
|
|
bitfld.long 0x4 22. "ND54,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "ND53,New Data" "0,1"
|
|
bitfld.long 0x4 20. "ND52,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "ND51,New Data" "0,1"
|
|
bitfld.long 0x4 18. "ND50,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "ND49,New Data" "0,1"
|
|
bitfld.long 0x4 16. "ND48,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "ND47,New Data" "0,1"
|
|
bitfld.long 0x4 14. "ND46,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "ND45,New Data" "0,1"
|
|
bitfld.long 0x4 12. "ND44,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "ND43,New Data" "0,1"
|
|
bitfld.long 0x4 10. "ND42,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "ND41,New Data" "0,1"
|
|
bitfld.long 0x4 8. "ND40,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "ND39,New Data" "0,1"
|
|
bitfld.long 0x4 6. "ND38,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "ND37,New Data" "0,1"
|
|
bitfld.long 0x4 4. "ND36,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "ND35,New Data" "0,1"
|
|
bitfld.long 0x4 2. "ND34,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "ND33,New Data" "0,1"
|
|
bitfld.long 0x4 0. "ND32,New Data" "0,1"
|
|
line.long 0x8 "RXF0C,Receive FIFO 0 Configuration Register"
|
|
bitfld.long 0x8 31. "F0OM,FIFO 0 Operation Mode" "0,1"
|
|
hexmask.long.byte 0x8 24.--30. 1. "F0WM,Receive FIFO 0 Watermark"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--22. 1. "F0S,Receive FIFO 0 Start Address"
|
|
hexmask.long.word 0x8 2.--15. 1. "F0SA,Receive FIFO 0 Start Address"
|
|
rgroup.long 0xA4++0x3
|
|
line.long 0x0 "RXF0S,Receive FIFO 0 Status Register"
|
|
bitfld.long 0x0 25. "RF0L,Receive FIFO 0 Message Lost" "0,1"
|
|
bitfld.long 0x0 24. "F0F,Receive FIFO 0 Fill Level" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--21. 1. "F0PI,Receive FIFO 0 Put Index"
|
|
hexmask.long.byte 0x0 8.--13. 1. "F0GI,Receive FIFO 0 Get Index"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "F0FL,Receive FIFO 0 Fill Level"
|
|
group.long 0xA8++0xB
|
|
line.long 0x0 "RXF0A,Receive FIFO 0 Acknowledge Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "F0AI,Receive FIFO 0 Acknowledge Index"
|
|
line.long 0x4 "RXBC,Receive Rx Buffer Configuration Register"
|
|
hexmask.long.word 0x4 2.--15. 1. "RBSA,Receive Buffer Start Address"
|
|
line.long 0x8 "RXF1C,Receive FIFO 1 Configuration Register"
|
|
bitfld.long 0x8 31. "F1OM,FIFO 1 Operation Mode" "0,1"
|
|
hexmask.long.byte 0x8 24.--30. 1. "F1WM,Receive FIFO 1 Watermark"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--22. 1. "F1S,Receive FIFO 1 Start Address"
|
|
hexmask.long.word 0x8 2.--15. 1. "F1SA,Receive FIFO 1 Start Address"
|
|
rgroup.long 0xB4++0x3
|
|
line.long 0x0 "RXF1S,Receive FIFO 1 Status Register"
|
|
bitfld.long 0x0 30.--31. "DMS,Debug Message Status" "0: Idle state wait for reception of debug messages..,1: Debug message A received.,2: Debug messages A B received.,3: Debug messages A B C received DMA request is set."
|
|
bitfld.long 0x0 25. "RF1L,Receive FIFO 1 Message Lost" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "F1F,Receive FIFO 1 Fill Level" "0,1"
|
|
hexmask.long.byte 0x0 16.--21. 1. "F1PI,Receive FIFO 1 Put Index"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "F1GI,Receive FIFO 1 Get Index"
|
|
hexmask.long.byte 0x0 0.--6. 1. "F1FL,Receive FIFO 1 Fill Level"
|
|
group.long 0xB8++0xB
|
|
line.long 0x0 "RXF1A,Receive FIFO 1 Acknowledge Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "F1AI,Receive FIFO 1 Acknowledge Index"
|
|
line.long 0x4 "RXESC,Receive Buffer / FIFO Element Size Configuration Register"
|
|
bitfld.long 0x4 8.--10. "RBDS,Receive Buffer Data Field Size" "0: 8-byte data field,1: 12-byte data field,2: 16-byte data field,3: 20-byte data field,4: 24-byte data field,5: 32-byte data field,6: 48-byte data field,7: 64-byte data field"
|
|
bitfld.long 0x4 4.--6. "F1DS,Receive FIFO 1 Data Field Size" "0: 8-byte data field,1: 12-byte data field,2: 16-byte data field,3: 20-byte data field,4: 24-byte data field,5: 32-byte data field,6: 48-byte data field,7: 64-byte data field"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "F0DS,Receive FIFO 0 Data Field Size" "0: 8-byte data field,1: 12-byte data field,2: 16-byte data field,3: 20-byte data field,4: 24-byte data field,5: 32-byte data field,6: 48-byte data field,7: 64-byte data field"
|
|
line.long 0x8 "TXBC,Transmit Buffer Configuration Register"
|
|
bitfld.long 0x8 30. "TFQM,Tx FIFO/Queue Mode" "0,1"
|
|
hexmask.long.byte 0x8 24.--29. 1. "TFQS,Transmit FIFO/Queue Size"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--21. 1. "NDTB,Number of Dedicated Transmit Buffers"
|
|
hexmask.long.word 0x8 2.--15. 1. "TBSA,Tx Buffers Start Address"
|
|
rgroup.long 0xC4++0x3
|
|
line.long 0x0 "TXFQS,Transmit FIFO/Queue Status Register"
|
|
bitfld.long 0x0 21. "TFQF,Tx FIFO/Queue Full" "0,1"
|
|
hexmask.long.byte 0x0 16.--20. 1. "TFQPI,Tx FIFO/Queue Put Index"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--12. 1. "TFGI,Tx FIFO Get Index"
|
|
hexmask.long.byte 0x0 0.--5. 1. "TFFL,Tx FIFO Free Level"
|
|
group.long 0xC8++0x3
|
|
line.long 0x0 "TXESC,Transmit Buffer Element Size Configuration Register"
|
|
bitfld.long 0x0 0.--2. "TBDS,Tx Buffer Data Field Size" "0: 8-byte data field,1: 12-byte data field,2: 16-byte data field,3: 20-byte data field,4: 24-byte data field,5: 32-byte data field,6: 48-byte data field,7: 64-byte data field"
|
|
rgroup.long 0xCC++0x3
|
|
line.long 0x0 "TXBRP,Transmit Buffer Request Pending Register"
|
|
bitfld.long 0x0 31. "TRP31,Transmission Request Pending for Buffer 31" "0,1"
|
|
bitfld.long 0x0 30. "TRP30,Transmission Request Pending for Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TRP29,Transmission Request Pending for Buffer 29" "0,1"
|
|
bitfld.long 0x0 28. "TRP28,Transmission Request Pending for Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "TRP27,Transmission Request Pending for Buffer 27" "0,1"
|
|
bitfld.long 0x0 26. "TRP26,Transmission Request Pending for Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "TRP25,Transmission Request Pending for Buffer 25" "0,1"
|
|
bitfld.long 0x0 24. "TRP24,Transmission Request Pending for Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "TRP23,Transmission Request Pending for Buffer 23" "0,1"
|
|
bitfld.long 0x0 22. "TRP22,Transmission Request Pending for Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "TRP21,Transmission Request Pending for Buffer 21" "0,1"
|
|
bitfld.long 0x0 20. "TRP20,Transmission Request Pending for Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "TRP19,Transmission Request Pending for Buffer 19" "0,1"
|
|
bitfld.long 0x0 18. "TRP18,Transmission Request Pending for Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "TRP17,Transmission Request Pending for Buffer 17" "0,1"
|
|
bitfld.long 0x0 16. "TRP16,Transmission Request Pending for Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TRP15,Transmission Request Pending for Buffer 15" "0,1"
|
|
bitfld.long 0x0 14. "TRP14,Transmission Request Pending for Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TRP13,Transmission Request Pending for Buffer 13" "0,1"
|
|
bitfld.long 0x0 12. "TRP12,Transmission Request Pending for Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TRP11,Transmission Request Pending for Buffer 11" "0,1"
|
|
bitfld.long 0x0 10. "TRP10,Transmission Request Pending for Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TRP9,Transmission Request Pending for Buffer 9" "0,1"
|
|
bitfld.long 0x0 8. "TRP8,Transmission Request Pending for Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TRP7,Transmission Request Pending for Buffer 7" "0,1"
|
|
bitfld.long 0x0 6. "TRP6,Transmission Request Pending for Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TRP5,Transmission Request Pending for Buffer 5" "0,1"
|
|
bitfld.long 0x0 4. "TRP4,Transmission Request Pending for Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TRP3,Transmission Request Pending for Buffer 3" "0,1"
|
|
bitfld.long 0x0 2. "TRP2,Transmission Request Pending for Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TRP1,Transmission Request Pending for Buffer 1" "0,1"
|
|
bitfld.long 0x0 0. "TRP0,Transmission Request Pending for Buffer 0" "0,1"
|
|
group.long 0xD0++0x7
|
|
line.long 0x0 "TXBAR,Transmit Buffer Add Request Register"
|
|
bitfld.long 0x0 31. "AR31,Add Request for Transmit Buffer 31" "0,1"
|
|
bitfld.long 0x0 30. "AR30,Add Request for Transmit Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "AR29,Add Request for Transmit Buffer 29" "0,1"
|
|
bitfld.long 0x0 28. "AR28,Add Request for Transmit Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "AR27,Add Request for Transmit Buffer 27" "0,1"
|
|
bitfld.long 0x0 26. "AR26,Add Request for Transmit Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "AR25,Add Request for Transmit Buffer 25" "0,1"
|
|
bitfld.long 0x0 24. "AR24,Add Request for Transmit Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "AR23,Add Request for Transmit Buffer 23" "0,1"
|
|
bitfld.long 0x0 22. "AR22,Add Request for Transmit Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "AR21,Add Request for Transmit Buffer 21" "0,1"
|
|
bitfld.long 0x0 20. "AR20,Add Request for Transmit Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "AR19,Add Request for Transmit Buffer 19" "0,1"
|
|
bitfld.long 0x0 18. "AR18,Add Request for Transmit Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "AR17,Add Request for Transmit Buffer 17" "0,1"
|
|
bitfld.long 0x0 16. "AR16,Add Request for Transmit Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "AR15,Add Request for Transmit Buffer 15" "0,1"
|
|
bitfld.long 0x0 14. "AR14,Add Request for Transmit Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "AR13,Add Request for Transmit Buffer 13" "0,1"
|
|
bitfld.long 0x0 12. "AR12,Add Request for Transmit Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "AR11,Add Request for Transmit Buffer 11" "0,1"
|
|
bitfld.long 0x0 10. "AR10,Add Request for Transmit Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "AR9,Add Request for Transmit Buffer 9" "0,1"
|
|
bitfld.long 0x0 8. "AR8,Add Request for Transmit Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "AR7,Add Request for Transmit Buffer 7" "0,1"
|
|
bitfld.long 0x0 6. "AR6,Add Request for Transmit Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "AR5,Add Request for Transmit Buffer 5" "0,1"
|
|
bitfld.long 0x0 4. "AR4,Add Request for Transmit Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "AR3,Add Request for Transmit Buffer 3" "0,1"
|
|
bitfld.long 0x0 2. "AR2,Add Request for Transmit Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "AR1,Add Request for Transmit Buffer 1" "0,1"
|
|
bitfld.long 0x0 0. "AR0,Add Request for Transmit Buffer 0" "0,1"
|
|
line.long 0x4 "TXBCR,Transmit Buffer Cancellation Request Register"
|
|
bitfld.long 0x4 31. "CR31,Cancellation Request for Transmit Buffer 31" "0,1"
|
|
bitfld.long 0x4 30. "CR30,Cancellation Request for Transmit Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "CR29,Cancellation Request for Transmit Buffer 29" "0,1"
|
|
bitfld.long 0x4 28. "CR28,Cancellation Request for Transmit Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "CR27,Cancellation Request for Transmit Buffer 27" "0,1"
|
|
bitfld.long 0x4 26. "CR26,Cancellation Request for Transmit Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "CR25,Cancellation Request for Transmit Buffer 25" "0,1"
|
|
bitfld.long 0x4 24. "CR24,Cancellation Request for Transmit Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "CR23,Cancellation Request for Transmit Buffer 23" "0,1"
|
|
bitfld.long 0x4 22. "CR22,Cancellation Request for Transmit Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "CR21,Cancellation Request for Transmit Buffer 21" "0,1"
|
|
bitfld.long 0x4 20. "CR20,Cancellation Request for Transmit Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CR19,Cancellation Request for Transmit Buffer 19" "0,1"
|
|
bitfld.long 0x4 18. "CR18,Cancellation Request for Transmit Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CR17,Cancellation Request for Transmit Buffer 17" "0,1"
|
|
bitfld.long 0x4 16. "CR16,Cancellation Request for Transmit Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CR15,Cancellation Request for Transmit Buffer 15" "0,1"
|
|
bitfld.long 0x4 14. "CR14,Cancellation Request for Transmit Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "CR13,Cancellation Request for Transmit Buffer 13" "0,1"
|
|
bitfld.long 0x4 12. "CR12,Cancellation Request for Transmit Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "CR11,Cancellation Request for Transmit Buffer 11" "0,1"
|
|
bitfld.long 0x4 10. "CR10,Cancellation Request for Transmit Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "CR9,Cancellation Request for Transmit Buffer 9" "0,1"
|
|
bitfld.long 0x4 8. "CR8,Cancellation Request for Transmit Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "CR7,Cancellation Request for Transmit Buffer 7" "0,1"
|
|
bitfld.long 0x4 6. "CR6,Cancellation Request for Transmit Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CR5,Cancellation Request for Transmit Buffer 5" "0,1"
|
|
bitfld.long 0x4 4. "CR4,Cancellation Request for Transmit Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CR3,Cancellation Request for Transmit Buffer 3" "0,1"
|
|
bitfld.long 0x4 2. "CR2,Cancellation Request for Transmit Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CR1,Cancellation Request for Transmit Buffer 1" "0,1"
|
|
bitfld.long 0x4 0. "CR0,Cancellation Request for Transmit Buffer 0" "0,1"
|
|
rgroup.long 0xD8++0x7
|
|
line.long 0x0 "TXBTO,Transmit Buffer Transmission Occurred Register"
|
|
bitfld.long 0x0 31. "TO31,Transmission Occurred for Buffer 31" "0,1"
|
|
bitfld.long 0x0 30. "TO30,Transmission Occurred for Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TO29,Transmission Occurred for Buffer 29" "0,1"
|
|
bitfld.long 0x0 28. "TO28,Transmission Occurred for Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "TO27,Transmission Occurred for Buffer 27" "0,1"
|
|
bitfld.long 0x0 26. "TO26,Transmission Occurred for Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "TO25,Transmission Occurred for Buffer 25" "0,1"
|
|
bitfld.long 0x0 24. "TO24,Transmission Occurred for Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "TO23,Transmission Occurred for Buffer 23" "0,1"
|
|
bitfld.long 0x0 22. "TO22,Transmission Occurred for Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "TO21,Transmission Occurred for Buffer 21" "0,1"
|
|
bitfld.long 0x0 20. "TO20,Transmission Occurred for Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "TO19,Transmission Occurred for Buffer 19" "0,1"
|
|
bitfld.long 0x0 18. "TO18,Transmission Occurred for Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "TO17,Transmission Occurred for Buffer 17" "0,1"
|
|
bitfld.long 0x0 16. "TO16,Transmission Occurred for Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TO15,Transmission Occurred for Buffer 15" "0,1"
|
|
bitfld.long 0x0 14. "TO14,Transmission Occurred for Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TO13,Transmission Occurred for Buffer 13" "0,1"
|
|
bitfld.long 0x0 12. "TO12,Transmission Occurred for Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TO11,Transmission Occurred for Buffer 11" "0,1"
|
|
bitfld.long 0x0 10. "TO10,Transmission Occurred for Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TO9,Transmission Occurred for Buffer 9" "0,1"
|
|
bitfld.long 0x0 8. "TO8,Transmission Occurred for Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TO7,Transmission Occurred for Buffer 7" "0,1"
|
|
bitfld.long 0x0 6. "TO6,Transmission Occurred for Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TO5,Transmission Occurred for Buffer 5" "0,1"
|
|
bitfld.long 0x0 4. "TO4,Transmission Occurred for Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TO3,Transmission Occurred for Buffer 3" "0,1"
|
|
bitfld.long 0x0 2. "TO2,Transmission Occurred for Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TO1,Transmission Occurred for Buffer 1" "0,1"
|
|
bitfld.long 0x0 0. "TO0,Transmission Occurred for Buffer 0" "0,1"
|
|
line.long 0x4 "TXBCF,Transmit Buffer Cancellation Finished Register"
|
|
bitfld.long 0x4 31. "CF31,Cancellation Finished for Transmit Buffer 31" "0,1"
|
|
bitfld.long 0x4 30. "CF30,Cancellation Finished for Transmit Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "CF29,Cancellation Finished for Transmit Buffer 29" "0,1"
|
|
bitfld.long 0x4 28. "CF28,Cancellation Finished for Transmit Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "CF27,Cancellation Finished for Transmit Buffer 27" "0,1"
|
|
bitfld.long 0x4 26. "CF26,Cancellation Finished for Transmit Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "CF25,Cancellation Finished for Transmit Buffer 25" "0,1"
|
|
bitfld.long 0x4 24. "CF24,Cancellation Finished for Transmit Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "CF23,Cancellation Finished for Transmit Buffer 23" "0,1"
|
|
bitfld.long 0x4 22. "CF22,Cancellation Finished for Transmit Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "CF21,Cancellation Finished for Transmit Buffer 21" "0,1"
|
|
bitfld.long 0x4 20. "CF20,Cancellation Finished for Transmit Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CF19,Cancellation Finished for Transmit Buffer 19" "0,1"
|
|
bitfld.long 0x4 18. "CF18,Cancellation Finished for Transmit Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CF17,Cancellation Finished for Transmit Buffer 17" "0,1"
|
|
bitfld.long 0x4 16. "CF16,Cancellation Finished for Transmit Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CF15,Cancellation Finished for Transmit Buffer 15" "0,1"
|
|
bitfld.long 0x4 14. "CF14,Cancellation Finished for Transmit Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "CF13,Cancellation Finished for Transmit Buffer 13" "0,1"
|
|
bitfld.long 0x4 12. "CF12,Cancellation Finished for Transmit Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "CF11,Cancellation Finished for Transmit Buffer 11" "0,1"
|
|
bitfld.long 0x4 10. "CF10,Cancellation Finished for Transmit Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "CF9,Cancellation Finished for Transmit Buffer 9" "0,1"
|
|
bitfld.long 0x4 8. "CF8,Cancellation Finished for Transmit Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "CF7,Cancellation Finished for Transmit Buffer 7" "0,1"
|
|
bitfld.long 0x4 6. "CF6,Cancellation Finished for Transmit Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CF5,Cancellation Finished for Transmit Buffer 5" "0,1"
|
|
bitfld.long 0x4 4. "CF4,Cancellation Finished for Transmit Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CF3,Cancellation Finished for Transmit Buffer 3" "0,1"
|
|
bitfld.long 0x4 2. "CF2,Cancellation Finished for Transmit Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CF1,Cancellation Finished for Transmit Buffer 1" "0,1"
|
|
bitfld.long 0x4 0. "CF0,Cancellation Finished for Transmit Buffer 0" "0,1"
|
|
group.long 0xE0++0x7
|
|
line.long 0x0 "TXBTIE,Transmit Buffer Transmission Interrupt Enable Register"
|
|
bitfld.long 0x0 31. "TIE31,Transmission Interrupt Enable for Buffer 31" "0,1"
|
|
bitfld.long 0x0 30. "TIE30,Transmission Interrupt Enable for Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TIE29,Transmission Interrupt Enable for Buffer 29" "0,1"
|
|
bitfld.long 0x0 28. "TIE28,Transmission Interrupt Enable for Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "TIE27,Transmission Interrupt Enable for Buffer 27" "0,1"
|
|
bitfld.long 0x0 26. "TIE26,Transmission Interrupt Enable for Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "TIE25,Transmission Interrupt Enable for Buffer 25" "0,1"
|
|
bitfld.long 0x0 24. "TIE24,Transmission Interrupt Enable for Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "TIE23,Transmission Interrupt Enable for Buffer 23" "0,1"
|
|
bitfld.long 0x0 22. "TIE22,Transmission Interrupt Enable for Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "TIE21,Transmission Interrupt Enable for Buffer 21" "0,1"
|
|
bitfld.long 0x0 20. "TIE20,Transmission Interrupt Enable for Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "TIE19,Transmission Interrupt Enable for Buffer 19" "0,1"
|
|
bitfld.long 0x0 18. "TIE18,Transmission Interrupt Enable for Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "TIE17,Transmission Interrupt Enable for Buffer 17" "0,1"
|
|
bitfld.long 0x0 16. "TIE16,Transmission Interrupt Enable for Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TIE15,Transmission Interrupt Enable for Buffer 15" "0,1"
|
|
bitfld.long 0x0 14. "TIE14,Transmission Interrupt Enable for Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TIE13,Transmission Interrupt Enable for Buffer 13" "0,1"
|
|
bitfld.long 0x0 12. "TIE12,Transmission Interrupt Enable for Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TIE11,Transmission Interrupt Enable for Buffer 11" "0,1"
|
|
bitfld.long 0x0 10. "TIE10,Transmission Interrupt Enable for Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TIE9,Transmission Interrupt Enable for Buffer 9" "0,1"
|
|
bitfld.long 0x0 8. "TIE8,Transmission Interrupt Enable for Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TIE7,Transmission Interrupt Enable for Buffer 7" "0,1"
|
|
bitfld.long 0x0 6. "TIE6,Transmission Interrupt Enable for Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TIE5,Transmission Interrupt Enable for Buffer 5" "0,1"
|
|
bitfld.long 0x0 4. "TIE4,Transmission Interrupt Enable for Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TIE3,Transmission Interrupt Enable for Buffer 3" "0,1"
|
|
bitfld.long 0x0 2. "TIE2,Transmission Interrupt Enable for Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TIE1,Transmission Interrupt Enable for Buffer 1" "0,1"
|
|
bitfld.long 0x0 0. "TIE0,Transmission Interrupt Enable for Buffer 0" "0,1"
|
|
line.long 0x4 "TXBCIE,Transmit Buffer Cancellation Finished Interrupt Enable Register"
|
|
bitfld.long 0x4 31. "CFIE31,Cancellation Finished Interrupt Enable for Transmit Buffer 31" "0,1"
|
|
bitfld.long 0x4 30. "CFIE30,Cancellation Finished Interrupt Enable for Transmit Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "CFIE29,Cancellation Finished Interrupt Enable for Transmit Buffer 29" "0,1"
|
|
bitfld.long 0x4 28. "CFIE28,Cancellation Finished Interrupt Enable for Transmit Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "CFIE27,Cancellation Finished Interrupt Enable for Transmit Buffer 27" "0,1"
|
|
bitfld.long 0x4 26. "CFIE26,Cancellation Finished Interrupt Enable for Transmit Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "CFIE25,Cancellation Finished Interrupt Enable for Transmit Buffer 25" "0,1"
|
|
bitfld.long 0x4 24. "CFIE24,Cancellation Finished Interrupt Enable for Transmit Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "CFIE23,Cancellation Finished Interrupt Enable for Transmit Buffer 23" "0,1"
|
|
bitfld.long 0x4 22. "CFIE22,Cancellation Finished Interrupt Enable for Transmit Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "CFIE21,Cancellation Finished Interrupt Enable for Transmit Buffer 21" "0,1"
|
|
bitfld.long 0x4 20. "CFIE20,Cancellation Finished Interrupt Enable for Transmit Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CFIE19,Cancellation Finished Interrupt Enable for Transmit Buffer 19" "0,1"
|
|
bitfld.long 0x4 18. "CFIE18,Cancellation Finished Interrupt Enable for Transmit Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CFIE17,Cancellation Finished Interrupt Enable for Transmit Buffer 17" "0,1"
|
|
bitfld.long 0x4 16. "CFIE16,Cancellation Finished Interrupt Enable for Transmit Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CFIE15,Cancellation Finished Interrupt Enable for Transmit Buffer 15" "0,1"
|
|
bitfld.long 0x4 14. "CFIE14,Cancellation Finished Interrupt Enable for Transmit Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "CFIE13,Cancellation Finished Interrupt Enable for Transmit Buffer 13" "0,1"
|
|
bitfld.long 0x4 12. "CFIE12,Cancellation Finished Interrupt Enable for Transmit Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "CFIE11,Cancellation Finished Interrupt Enable for Transmit Buffer 11" "0,1"
|
|
bitfld.long 0x4 10. "CFIE10,Cancellation Finished Interrupt Enable for Transmit Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "CFIE9,Cancellation Finished Interrupt Enable for Transmit Buffer 9" "0,1"
|
|
bitfld.long 0x4 8. "CFIE8,Cancellation Finished Interrupt Enable for Transmit Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "CFIE7,Cancellation Finished Interrupt Enable for Transmit Buffer 7" "0,1"
|
|
bitfld.long 0x4 6. "CFIE6,Cancellation Finished Interrupt Enable for Transmit Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CFIE5,Cancellation Finished Interrupt Enable for Transmit Buffer 5" "0,1"
|
|
bitfld.long 0x4 4. "CFIE4,Cancellation Finished Interrupt Enable for Transmit Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CFIE3,Cancellation Finished Interrupt Enable for Transmit Buffer 3" "0,1"
|
|
bitfld.long 0x4 2. "CFIE2,Cancellation Finished Interrupt Enable for Transmit Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CFIE1,Cancellation Finished Interrupt Enable for Transmit Buffer 1" "0,1"
|
|
bitfld.long 0x4 0. "CFIE0,Cancellation Finished Interrupt Enable for Transmit Buffer 0" "0,1"
|
|
group.long 0xF0++0x3
|
|
line.long 0x0 "TXEFC,Transmit Event FIFO Configuration Register"
|
|
hexmask.long.byte 0x0 24.--29. 1. "EFWM,Event FIFO Watermark"
|
|
hexmask.long.byte 0x0 16.--21. 1. "EFS,Event FIFO Size"
|
|
newline
|
|
hexmask.long.word 0x0 2.--15. 1. "EFSA,Event FIFO Start Address"
|
|
rgroup.long 0xF4++0x3
|
|
line.long 0x0 "TXEFS,Transmit Event FIFO Status Register"
|
|
bitfld.long 0x0 25. "TEFL,Tx Event FIFO Element Lost" "0,1"
|
|
bitfld.long 0x0 24. "EFF,Event FIFO Full" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--20. 1. "EFPI,Event FIFO Put Index"
|
|
hexmask.long.byte 0x0 8.--12. 1. "EFGI,Event FIFO Get Index"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "EFFL,Event FIFO Fill Level"
|
|
group.long 0xF8++0x3
|
|
line.long 0x0 "TXEFA,Transmit Event FIFO Acknowledge Register"
|
|
hexmask.long.byte 0x0 0.--4. 1. "EFAI,Event FIFO Acknowledge Index"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("PIC32CZ2051MC70100")||cpuis("PIC32CZ2051MC70144"))
|
|
tree "MCAN1"
|
|
base ad:0x40034000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "CREL,Core Release Register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "REL,Core Release"
|
|
hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of Core Release"
|
|
newline
|
|
hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of Core Release"
|
|
hexmask.long.byte 0x0 16.--19. 1. "YEAR,Timestamp Year"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "MON,Timestamp Month"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DAY,Timestamp Day"
|
|
line.long 0x4 "ENDN,Endian Register"
|
|
hexmask.long 0x4 0.--31. 1. "ETV,Endianness Test Value"
|
|
group.long 0x8++0x27
|
|
line.long 0x0 "CUST,Customer Register"
|
|
hexmask.long 0x0 0.--31. 1. "CSV,Customer-specific Value"
|
|
line.long 0x4 "DBTP,Data Bit Timing and Prescaler Register"
|
|
bitfld.long 0x4 23. "TDC,Transmitter Delay Compensation" "0: Transmitter Delay Compensation disabled.,1: Transmitter Delay Compensation enabled."
|
|
hexmask.long.byte 0x4 16.--20. 1. "DBRP,Data Bit Rate Prescaler"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--12. 1. "DTSEG1,Data Time Segment Before Sample Point"
|
|
hexmask.long.byte 0x4 4.--7. 1. "DTSEG2,Data Time Segment After Sample Point"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "DSJW,Data (Re) Synchronization Jump Width" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "TEST,Test Register"
|
|
bitfld.long 0x8 7. "RX,Receive Pin (read-only)" "0,1"
|
|
bitfld.long 0x8 5.--6. "TX,Control of Transmit Pin (read/write)" "0: Reset value CANTX controlled by the CAN Core..,1: Sample Point can be monitored at pin CANTX.,2: Dominant ('0') level at pin CANTX.,3: Recessive ('1') at pin CANTX."
|
|
newline
|
|
bitfld.long 0x8 4. "LBCK,Loop Back Mode (read/write)" "0: Reset value. Loop Back mode is disabled.,1: Loop Back mode is enabled (see Section 6.1.9)."
|
|
line.long 0xC "RWD,RAM Watchdog Register"
|
|
hexmask.long.byte 0xC 8.--15. 1. "WDV,Watchdog Value (read-only)"
|
|
hexmask.long.byte 0xC 0.--7. 1. "WDC,Watchdog Configuration (read/write)"
|
|
line.long 0x10 "CCCR,CC Control Register"
|
|
bitfld.long 0x10 15. "NISO,Non-ISO Operation" "0,1"
|
|
bitfld.long 0x10 14. "TXP,Transmit Pause (read/write write protection)" "0,1"
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|
newline
|
|
bitfld.long 0x10 13. "EFBI,Edge Filtering during Bus Integration (read/write write protection)" "0,1"
|
|
bitfld.long 0x10 12. "PXHD,Protocol Exception Event Handling (read/write write protection)" "0,1"
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|
newline
|
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bitfld.long 0x10 9. "BRSE,Bit Rate Switching Enable (read/write write protection)" "0: Bit rate switching for transmissions disabled.,1: Bit rate switching for transmissions enabled."
|
|
bitfld.long 0x10 8. "FDOE,CAN FD Operation Enable (read/write write protection)" "0: FD operation disabled.,1: FD operation enabled."
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|
newline
|
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bitfld.long 0x10 7. "TEST,Test Mode Enable (read/write write protection against '1')" "0: Normal operation MCAN_TEST register holds reset..,1: Test mode write access to MCAN_TEST register.."
|
|
bitfld.long 0x10 6. "DAR,Disable Automatic Retransmission (read/write write protection)" "0: Automatic retransmission of messages not..,1: Automatic retransmission disabled."
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|
newline
|
|
bitfld.long 0x10 5. "MON,Bus Monitoring Mode (read/write write protection against '1')" "0: Bus Monitoring mode is disabled.,1: Bus Monitoring mode is enabled."
|
|
bitfld.long 0x10 4. "CSR,Clock Stop Request (read/write)" "0: No clock stop is requested.,1: Clock stop requested. When clock stop is.."
|
|
newline
|
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bitfld.long 0x10 3. "CSA,Clock Stop Acknowledge (read-only)" "0,1"
|
|
bitfld.long 0x10 2. "ASM,Restricted Operation Mode (read/write write protection against '1')" "0: Normal CAN operation.,1: Restricted Operation mode active."
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newline
|
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bitfld.long 0x10 1. "CCE,Configuration Change Enable (read/write write protection)" "0: The processor has no write access to the..,1: The processor has write access to the protected.."
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bitfld.long 0x10 0. "INIT,Initialization (read/write)" "0: Normal operation.,1: Initialization is started."
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|
line.long 0x14 "NBTP,Nominal Bit Timing and Prescaler Register"
|
|
hexmask.long.byte 0x14 25.--31. 1. "NSJW,Nominal (Re) Synchronization Jump Width"
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hexmask.long.word 0x14 16.--24. 1. "NBRP,Nominal Bit Rate Prescaler"
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|
newline
|
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hexmask.long.byte 0x14 8.--15. 1. "NTSEG1,Nominal Time Segment Before Sample Point"
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|
hexmask.long.byte 0x14 0.--6. 1. "NTSEG2,Nominal Time Segment After Sample Point"
|
|
line.long 0x18 "TSCC,Timestamp Counter Configuration Register"
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|
hexmask.long.byte 0x18 16.--19. 1. "TCP,Timestamp Counter Prescaler"
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bitfld.long 0x18 0.--1. "TSS,Timestamp Select" "0: Timestamp counter value always 0x0000,1: Timestamp counter value incremented according to..,2: External timestamp counter value used,?"
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line.long 0x1C "TSCV,Timestamp Counter Value Register"
|
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hexmask.long.word 0x1C 0.--15. 1. "TSC,Timestamp Counter (cleared on write)"
|
|
line.long 0x20 "TOCC,Timeout Counter Configuration Register"
|
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hexmask.long.word 0x20 16.--31. 1. "TOP,Timeout Period"
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bitfld.long 0x20 1.--2. "TOS,Timeout Select" "0: Continuous operation,1: Timeout controlled by Tx Event FIFO,2: Timeout controlled by Receive FIFO 0,3: Timeout controlled by Receive FIFO 1"
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newline
|
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bitfld.long 0x20 0. "ETOC,Enable Timeout Counter" "0: Timeout Counter disabled.,1: Timeout Counter enabled."
|
|
line.long 0x24 "TOCV,Timeout Counter Value Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "TOC,Timeout Counter (cleared on write)"
|
|
rgroup.long 0x40++0x7
|
|
line.long 0x0 "ECR,Error Counter Register"
|
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hexmask.long.byte 0x0 16.--23. 1. "CEL,CAN Error Logging (cleared on read)"
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bitfld.long 0x0 15. "RP,Receive Error Passive" "0,1"
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newline
|
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hexmask.long.byte 0x0 8.--14. 1. "REC,Receive Error Counter"
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hexmask.long.byte 0x0 0.--7. 1. "TEC,Transmit Error Counter"
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|
line.long 0x4 "PSR,Protocol Status Register"
|
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hexmask.long.byte 0x4 16.--22. 1. "TDCV,Transmitter Delay Compensation Value"
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bitfld.long 0x4 14. "PXE,Protocol Exception Event (cleared on read)" "0,1"
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newline
|
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bitfld.long 0x4 13. "RFDF,Received a CAN FD Message (cleared on read)" "0,1"
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bitfld.long 0x4 12. "RBRS,BRS Flag of Last Received CAN FD Message (cleared on read)" "0,1"
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newline
|
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bitfld.long 0x4 11. "RESI,ESI Flag of Last Received CAN FD Message (cleared on read)" "0,1"
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|
bitfld.long 0x4 8.--10. "DLEC,Data Phase Last Error Code (set to 111 on read)" "0,1,2,3,4,5,6,7"
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newline
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bitfld.long 0x4 7. "BO,Bus_Off Status" "0,1"
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bitfld.long 0x4 6. "EW,Warning Status" "0,1"
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newline
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bitfld.long 0x4 5. "EP,Error Passive" "0,1"
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bitfld.long 0x4 3.--4. "ACT,Activity" "0: Node is synchronizing on CAN communication,1: Node is neither receiver nor transmitter,2: Node is operating as receiver,3: Node is operating as transmitter"
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newline
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bitfld.long 0x4 0.--2. "LEC,Last Error Code (set to 111 on read)" "0: No error occurred since LEC has been reset by..,1: More than 5 equal bits in a sequence have..,2: A fixed format part of a received frame has the..,3: The message transmitted by the MCAN was not..,4: During transmission of a message (with the..,5: During transmission of a message (or acknowledge..,6: The CRC check sum of a received message was..,7: Any read access to the Protocol Status Register.."
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|
group.long 0x48++0x3
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line.long 0x0 "TDCR,Transmit Delay Compensation Register"
|
|
hexmask.long.byte 0x0 8.--14. 1. "TDCO,Transmitter Delay Compensation Offset"
|
|
hexmask.long.byte 0x0 0.--6. 1. "TDCF,Transmitter Delay Compensation Filter"
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group.long 0x50++0xF
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line.long 0x0 "IR,Interrupt Register"
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bitfld.long 0x0 29. "ARA,Access to Reserved Address" "0,1"
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bitfld.long 0x0 28. "PED,Protocol Error in Data Phase" "0,1"
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newline
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bitfld.long 0x0 27. "PEA,Protocol Error in Arbitration Phase" "0,1"
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|
bitfld.long 0x0 26. "WDI,Watchdog Interrupt" "0,1"
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newline
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bitfld.long 0x0 25. "BO,Bus_Off Status" "0,1"
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|
bitfld.long 0x0 24. "EW,Warning Status" "0,1"
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newline
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bitfld.long 0x0 23. "EP,Error Passive" "0,1"
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bitfld.long 0x0 22. "ELO,Error Logging Overflow" "0,1"
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newline
|
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bitfld.long 0x0 19. "DRX,Message stored to Dedicated Receive Buffer" "0,1"
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|
bitfld.long 0x0 18. "TOO,Timeout Occurred" "0,1"
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newline
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bitfld.long 0x0 17. "MRAF,Message RAM Access Failure" "0,1"
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|
bitfld.long 0x0 16. "TSW,Timestamp Wraparound" "0,1"
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|
newline
|
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bitfld.long 0x0 15. "TEFL,Tx Event FIFO Element Lost" "0,1"
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|
bitfld.long 0x0 14. "TEFF,Tx Event FIFO Full" "0,1"
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newline
|
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bitfld.long 0x0 13. "TEFW,Tx Event FIFO Watermark Reached" "0,1"
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|
bitfld.long 0x0 12. "TEFN,Tx Event FIFO New Entry" "0,1"
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newline
|
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bitfld.long 0x0 11. "TFE,Tx FIFO Empty" "0,1"
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bitfld.long 0x0 10. "TCF,Transmission Cancellation Finished" "0,1"
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newline
|
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bitfld.long 0x0 9. "TC,Transmission Completed" "0,1"
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bitfld.long 0x0 8. "HPM,High Priority Message" "0,1"
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newline
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bitfld.long 0x0 7. "RF1L,Receive FIFO 1 Message Lost" "0,1"
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bitfld.long 0x0 6. "RF1F,Receive FIFO 1 Full" "0,1"
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newline
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bitfld.long 0x0 5. "RF1W,Receive FIFO 1 Watermark Reached" "0,1"
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bitfld.long 0x0 4. "RF1N,Receive FIFO 1 New Message" "0,1"
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newline
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bitfld.long 0x0 3. "RF0L,Receive FIFO 0 Message Lost" "0,1"
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bitfld.long 0x0 2. "RF0F,Receive FIFO 0 Full" "0,1"
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newline
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bitfld.long 0x0 1. "RF0W,Receive FIFO 0 Watermark Reached" "0,1"
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bitfld.long 0x0 0. "RF0N,Receive FIFO 0 New Message" "0,1"
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line.long 0x4 "IE,Interrupt Enable Register"
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bitfld.long 0x4 29. "ARAE,Access to Reserved Address Enable" "0,1"
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bitfld.long 0x4 28. "PEDE,Protocol Error in Data Phase Enable" "0,1"
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newline
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bitfld.long 0x4 27. "PEAE,Protocol Error in Arbitration Phase Enable" "0,1"
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bitfld.long 0x4 26. "WDIE,Watchdog Interrupt Enable" "0,1"
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newline
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bitfld.long 0x4 25. "BOE,Bus_Off Status Interrupt Enable" "0,1"
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bitfld.long 0x4 24. "EWE,Warning Status Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x4 23. "EPE,Error Passive Interrupt Enable" "0,1"
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bitfld.long 0x4 22. "ELOE,Error Logging Overflow Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x4 19. "DRXE,Message stored to Dedicated Receive Buffer Interrupt Enable" "0,1"
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bitfld.long 0x4 18. "TOOE,Timeout Occurred Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x4 17. "MRAFE,Message RAM Access Failure Interrupt Enable" "0,1"
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bitfld.long 0x4 16. "TSWE,Timestamp Wraparound Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x4 15. "TEFLE,Tx Event FIFO Event Lost Interrupt Enable" "0,1"
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bitfld.long 0x4 14. "TEFFE,Tx Event FIFO Full Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x4 13. "TEFWE,Tx Event FIFO Watermark Reached Interrupt Enable" "0,1"
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bitfld.long 0x4 12. "TEFNE,Tx Event FIFO New Entry Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x4 11. "TFEE,Tx FIFO Empty Interrupt Enable" "0,1"
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bitfld.long 0x4 10. "TCFE,Transmission Cancellation Finished Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x4 9. "TCE,Transmission Completed Interrupt Enable" "0,1"
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bitfld.long 0x4 8. "HPME,High Priority Message Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x4 7. "RF1LE,Receive FIFO 1 Message Lost Interrupt Enable" "0,1"
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bitfld.long 0x4 6. "RF1FE,Receive FIFO 1 Full Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x4 5. "RF1WE,Receive FIFO 1 Watermark Reached Interrupt Enable" "0,1"
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bitfld.long 0x4 4. "RF1NE,Receive FIFO 1 New Message Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x4 3. "RF0LE,Receive FIFO 0 Message Lost Interrupt Enable" "0,1"
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bitfld.long 0x4 2. "RF0FE,Receive FIFO 0 Full Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x4 1. "RF0WE,Receive FIFO 0 Watermark Reached Interrupt Enable" "0,1"
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bitfld.long 0x4 0. "RF0NE,Receive FIFO 0 New Message Interrupt Enable" "0,1"
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line.long 0x8 "ILS,Interrupt Line Select Register"
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bitfld.long 0x8 29. "ARAL,Access to Reserved Address Line" "0,1"
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bitfld.long 0x8 28. "PEDL,Protocol Error in Data Phase Line" "0,1"
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newline
|
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bitfld.long 0x8 27. "PEAL,Protocol Error in Arbitration Phase Line" "0,1"
|
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bitfld.long 0x8 26. "WDIL,Watchdog Interrupt Line" "0,1"
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newline
|
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bitfld.long 0x8 25. "BOL,Bus_Off Status Interrupt Line" "0,1"
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bitfld.long 0x8 24. "EWL,Warning Status Interrupt Line" "0,1"
|
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newline
|
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bitfld.long 0x8 23. "EPL,Error Passive Interrupt Line" "0,1"
|
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bitfld.long 0x8 22. "ELOL,Error Logging Overflow Interrupt Line" "0,1"
|
|
newline
|
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bitfld.long 0x8 19. "DRXL,Message stored to Dedicated Receive Buffer Interrupt Line" "0,1"
|
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bitfld.long 0x8 18. "TOOL,Timeout Occurred Interrupt Line" "0,1"
|
|
newline
|
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bitfld.long 0x8 17. "MRAFL,Message RAM Access Failure Interrupt Line" "0,1"
|
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bitfld.long 0x8 16. "TSWL,Timestamp Wraparound Interrupt Line" "0,1"
|
|
newline
|
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bitfld.long 0x8 15. "TEFLL,Tx Event FIFO Event Lost Interrupt Line" "0,1"
|
|
bitfld.long 0x8 14. "TEFFL,Tx Event FIFO Full Interrupt Line" "0,1"
|
|
newline
|
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bitfld.long 0x8 13. "TEFWL,Tx Event FIFO Watermark Reached Interrupt Line" "0,1"
|
|
bitfld.long 0x8 12. "TEFNL,Tx Event FIFO New Entry Interrupt Line" "0,1"
|
|
newline
|
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bitfld.long 0x8 11. "TFEL,Tx FIFO Empty Interrupt Line" "0,1"
|
|
bitfld.long 0x8 10. "TCFL,Transmission Cancellation Finished Interrupt Line" "0,1"
|
|
newline
|
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bitfld.long 0x8 9. "TCL,Transmission Completed Interrupt Line" "0,1"
|
|
bitfld.long 0x8 8. "HPML,High Priority Message Interrupt Line" "0,1"
|
|
newline
|
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bitfld.long 0x8 7. "RF1LL,Receive FIFO 1 Message Lost Interrupt Line" "0,1"
|
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bitfld.long 0x8 6. "RF1FL,Receive FIFO 1 Full Interrupt Line" "0,1"
|
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newline
|
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bitfld.long 0x8 5. "RF1WL,Receive FIFO 1 Watermark Reached Interrupt Line" "0,1"
|
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bitfld.long 0x8 4. "RF1NL,Receive FIFO 1 New Message Interrupt Line" "0,1"
|
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newline
|
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bitfld.long 0x8 3. "RF0LL,Receive FIFO 0 Message Lost Interrupt Line" "0,1"
|
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bitfld.long 0x8 2. "RF0FL,Receive FIFO 0 Full Interrupt Line" "0,1"
|
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newline
|
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bitfld.long 0x8 1. "RF0WL,Receive FIFO 0 Watermark Reached Interrupt Line" "0,1"
|
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bitfld.long 0x8 0. "RF0NL,Receive FIFO 0 New Message Interrupt Line" "0,1"
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line.long 0xC "ILE,Interrupt Line Enable Register"
|
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bitfld.long 0xC 1. "EINT1,Enable Interrupt Line 1" "0,1"
|
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bitfld.long 0xC 0. "EINT0,Enable Interrupt Line 0" "0,1"
|
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group.long 0x80++0xB
|
|
line.long 0x0 "GFC,Global Filter Configuration Register"
|
|
bitfld.long 0x0 4.--5. "ANFS,Accept Non-matching Frames Standard" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,?,?"
|
|
bitfld.long 0x0 2.--3. "ANFE,Accept Non-matching Frames Extended" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,?,?"
|
|
newline
|
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bitfld.long 0x0 1. "RRFS,Reject Remote Frames Standard" "0: Filter remote frames with 11-bit standard IDs.,1: Reject all remote frames with 11-bit standard IDs."
|
|
bitfld.long 0x0 0. "RRFE,Reject Remote Frames Extended" "0: Filter remote frames with 29-bit extended IDs.,1: Reject all remote frames with 29-bit extended IDs."
|
|
line.long 0x4 "SIDFC,Standard ID Filter Configuration Register"
|
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hexmask.long.byte 0x4 16.--23. 1. "LSS,List Size Standard"
|
|
hexmask.long.word 0x4 2.--15. 1. "FLSSA,Filter List Standard Start Address"
|
|
line.long 0x8 "XIDFC,Extended ID Filter Configuration Register"
|
|
hexmask.long.byte 0x8 16.--22. 1. "LSE,List Size Extended"
|
|
hexmask.long.word 0x8 2.--15. 1. "FLESA,Filter List Extended Start Address"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "XIDAM,Extended ID AND Mask Register"
|
|
hexmask.long 0x0 0.--28. 1. "EIDM,Extended ID Mask"
|
|
rgroup.long 0x94++0x3
|
|
line.long 0x0 "HPMS,High Priority Message Status Register"
|
|
bitfld.long 0x0 15. "FLST,Filter List" "0,1"
|
|
hexmask.long.byte 0x0 8.--14. 1. "FIDX,Filter Index"
|
|
newline
|
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bitfld.long 0x0 6.--7. "MSI,Message Storage Indicator" "0: No FIFO selected.,1: FIFO message lost.,2: Message stored in FIFO 0.,3: Message stored in FIFO 1."
|
|
hexmask.long.byte 0x0 0.--5. 1. "BIDX,Buffer Index"
|
|
group.long 0x98++0xB
|
|
line.long 0x0 "NDAT1,New Data 1 Register"
|
|
bitfld.long 0x0 31. "ND31,New Data" "0,1"
|
|
bitfld.long 0x0 30. "ND30,New Data" "0,1"
|
|
newline
|
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bitfld.long 0x0 29. "ND29,New Data" "0,1"
|
|
bitfld.long 0x0 28. "ND28,New Data" "0,1"
|
|
newline
|
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bitfld.long 0x0 27. "ND27,New Data" "0,1"
|
|
bitfld.long 0x0 26. "ND26,New Data" "0,1"
|
|
newline
|
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bitfld.long 0x0 25. "ND25,New Data" "0,1"
|
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bitfld.long 0x0 24. "ND24,New Data" "0,1"
|
|
newline
|
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bitfld.long 0x0 23. "ND23,New Data" "0,1"
|
|
bitfld.long 0x0 22. "ND22,New Data" "0,1"
|
|
newline
|
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bitfld.long 0x0 21. "ND21,New Data" "0,1"
|
|
bitfld.long 0x0 20. "ND20,New Data" "0,1"
|
|
newline
|
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bitfld.long 0x0 19. "ND19,New Data" "0,1"
|
|
bitfld.long 0x0 18. "ND18,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "ND17,New Data" "0,1"
|
|
bitfld.long 0x0 16. "ND16,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "ND15,New Data" "0,1"
|
|
bitfld.long 0x0 14. "ND14,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "ND13,New Data" "0,1"
|
|
bitfld.long 0x0 12. "ND12,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "ND11,New Data" "0,1"
|
|
bitfld.long 0x0 10. "ND10,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ND9,New Data" "0,1"
|
|
bitfld.long 0x0 8. "ND8,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "ND7,New Data" "0,1"
|
|
bitfld.long 0x0 6. "ND6,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ND5,New Data" "0,1"
|
|
bitfld.long 0x0 4. "ND4,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ND3,New Data" "0,1"
|
|
bitfld.long 0x0 2. "ND2,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ND1,New Data" "0,1"
|
|
bitfld.long 0x0 0. "ND0,New Data" "0,1"
|
|
line.long 0x4 "NDAT2,New Data 2 Register"
|
|
bitfld.long 0x4 31. "ND63,New Data" "0,1"
|
|
bitfld.long 0x4 30. "ND62,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "ND61,New Data" "0,1"
|
|
bitfld.long 0x4 28. "ND60,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "ND59,New Data" "0,1"
|
|
bitfld.long 0x4 26. "ND58,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "ND57,New Data" "0,1"
|
|
bitfld.long 0x4 24. "ND56,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "ND55,New Data" "0,1"
|
|
bitfld.long 0x4 22. "ND54,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "ND53,New Data" "0,1"
|
|
bitfld.long 0x4 20. "ND52,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "ND51,New Data" "0,1"
|
|
bitfld.long 0x4 18. "ND50,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "ND49,New Data" "0,1"
|
|
bitfld.long 0x4 16. "ND48,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "ND47,New Data" "0,1"
|
|
bitfld.long 0x4 14. "ND46,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "ND45,New Data" "0,1"
|
|
bitfld.long 0x4 12. "ND44,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "ND43,New Data" "0,1"
|
|
bitfld.long 0x4 10. "ND42,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "ND41,New Data" "0,1"
|
|
bitfld.long 0x4 8. "ND40,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "ND39,New Data" "0,1"
|
|
bitfld.long 0x4 6. "ND38,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "ND37,New Data" "0,1"
|
|
bitfld.long 0x4 4. "ND36,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "ND35,New Data" "0,1"
|
|
bitfld.long 0x4 2. "ND34,New Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "ND33,New Data" "0,1"
|
|
bitfld.long 0x4 0. "ND32,New Data" "0,1"
|
|
line.long 0x8 "RXF0C,Receive FIFO 0 Configuration Register"
|
|
bitfld.long 0x8 31. "F0OM,FIFO 0 Operation Mode" "0,1"
|
|
hexmask.long.byte 0x8 24.--30. 1. "F0WM,Receive FIFO 0 Watermark"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--22. 1. "F0S,Receive FIFO 0 Start Address"
|
|
hexmask.long.word 0x8 2.--15. 1. "F0SA,Receive FIFO 0 Start Address"
|
|
rgroup.long 0xA4++0x3
|
|
line.long 0x0 "RXF0S,Receive FIFO 0 Status Register"
|
|
bitfld.long 0x0 25. "RF0L,Receive FIFO 0 Message Lost" "0,1"
|
|
bitfld.long 0x0 24. "F0F,Receive FIFO 0 Fill Level" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--21. 1. "F0PI,Receive FIFO 0 Put Index"
|
|
hexmask.long.byte 0x0 8.--13. 1. "F0GI,Receive FIFO 0 Get Index"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "F0FL,Receive FIFO 0 Fill Level"
|
|
group.long 0xA8++0xB
|
|
line.long 0x0 "RXF0A,Receive FIFO 0 Acknowledge Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "F0AI,Receive FIFO 0 Acknowledge Index"
|
|
line.long 0x4 "RXBC,Receive Rx Buffer Configuration Register"
|
|
hexmask.long.word 0x4 2.--15. 1. "RBSA,Receive Buffer Start Address"
|
|
line.long 0x8 "RXF1C,Receive FIFO 1 Configuration Register"
|
|
bitfld.long 0x8 31. "F1OM,FIFO 1 Operation Mode" "0,1"
|
|
hexmask.long.byte 0x8 24.--30. 1. "F1WM,Receive FIFO 1 Watermark"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--22. 1. "F1S,Receive FIFO 1 Start Address"
|
|
hexmask.long.word 0x8 2.--15. 1. "F1SA,Receive FIFO 1 Start Address"
|
|
rgroup.long 0xB4++0x3
|
|
line.long 0x0 "RXF1S,Receive FIFO 1 Status Register"
|
|
bitfld.long 0x0 30.--31. "DMS,Debug Message Status" "0: Idle state wait for reception of debug messages..,1: Debug message A received.,2: Debug messages A B received.,3: Debug messages A B C received DMA request is set."
|
|
bitfld.long 0x0 25. "RF1L,Receive FIFO 1 Message Lost" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "F1F,Receive FIFO 1 Fill Level" "0,1"
|
|
hexmask.long.byte 0x0 16.--21. 1. "F1PI,Receive FIFO 1 Put Index"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "F1GI,Receive FIFO 1 Get Index"
|
|
hexmask.long.byte 0x0 0.--6. 1. "F1FL,Receive FIFO 1 Fill Level"
|
|
group.long 0xB8++0xB
|
|
line.long 0x0 "RXF1A,Receive FIFO 1 Acknowledge Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "F1AI,Receive FIFO 1 Acknowledge Index"
|
|
line.long 0x4 "RXESC,Receive Buffer / FIFO Element Size Configuration Register"
|
|
bitfld.long 0x4 8.--10. "RBDS,Receive Buffer Data Field Size" "0: 8-byte data field,1: 12-byte data field,2: 16-byte data field,3: 20-byte data field,4: 24-byte data field,5: 32-byte data field,6: 48-byte data field,7: 64-byte data field"
|
|
bitfld.long 0x4 4.--6. "F1DS,Receive FIFO 1 Data Field Size" "0: 8-byte data field,1: 12-byte data field,2: 16-byte data field,3: 20-byte data field,4: 24-byte data field,5: 32-byte data field,6: 48-byte data field,7: 64-byte data field"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "F0DS,Receive FIFO 0 Data Field Size" "0: 8-byte data field,1: 12-byte data field,2: 16-byte data field,3: 20-byte data field,4: 24-byte data field,5: 32-byte data field,6: 48-byte data field,7: 64-byte data field"
|
|
line.long 0x8 "TXBC,Transmit Buffer Configuration Register"
|
|
bitfld.long 0x8 30. "TFQM,Tx FIFO/Queue Mode" "0,1"
|
|
hexmask.long.byte 0x8 24.--29. 1. "TFQS,Transmit FIFO/Queue Size"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--21. 1. "NDTB,Number of Dedicated Transmit Buffers"
|
|
hexmask.long.word 0x8 2.--15. 1. "TBSA,Tx Buffers Start Address"
|
|
rgroup.long 0xC4++0x3
|
|
line.long 0x0 "TXFQS,Transmit FIFO/Queue Status Register"
|
|
bitfld.long 0x0 21. "TFQF,Tx FIFO/Queue Full" "0,1"
|
|
hexmask.long.byte 0x0 16.--20. 1. "TFQPI,Tx FIFO/Queue Put Index"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--12. 1. "TFGI,Tx FIFO Get Index"
|
|
hexmask.long.byte 0x0 0.--5. 1. "TFFL,Tx FIFO Free Level"
|
|
group.long 0xC8++0x3
|
|
line.long 0x0 "TXESC,Transmit Buffer Element Size Configuration Register"
|
|
bitfld.long 0x0 0.--2. "TBDS,Tx Buffer Data Field Size" "0: 8-byte data field,1: 12-byte data field,2: 16-byte data field,3: 20-byte data field,4: 24-byte data field,5: 32-byte data field,6: 48-byte data field,7: 64-byte data field"
|
|
rgroup.long 0xCC++0x3
|
|
line.long 0x0 "TXBRP,Transmit Buffer Request Pending Register"
|
|
bitfld.long 0x0 31. "TRP31,Transmission Request Pending for Buffer 31" "0,1"
|
|
bitfld.long 0x0 30. "TRP30,Transmission Request Pending for Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TRP29,Transmission Request Pending for Buffer 29" "0,1"
|
|
bitfld.long 0x0 28. "TRP28,Transmission Request Pending for Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "TRP27,Transmission Request Pending for Buffer 27" "0,1"
|
|
bitfld.long 0x0 26. "TRP26,Transmission Request Pending for Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "TRP25,Transmission Request Pending for Buffer 25" "0,1"
|
|
bitfld.long 0x0 24. "TRP24,Transmission Request Pending for Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "TRP23,Transmission Request Pending for Buffer 23" "0,1"
|
|
bitfld.long 0x0 22. "TRP22,Transmission Request Pending for Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "TRP21,Transmission Request Pending for Buffer 21" "0,1"
|
|
bitfld.long 0x0 20. "TRP20,Transmission Request Pending for Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "TRP19,Transmission Request Pending for Buffer 19" "0,1"
|
|
bitfld.long 0x0 18. "TRP18,Transmission Request Pending for Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "TRP17,Transmission Request Pending for Buffer 17" "0,1"
|
|
bitfld.long 0x0 16. "TRP16,Transmission Request Pending for Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TRP15,Transmission Request Pending for Buffer 15" "0,1"
|
|
bitfld.long 0x0 14. "TRP14,Transmission Request Pending for Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TRP13,Transmission Request Pending for Buffer 13" "0,1"
|
|
bitfld.long 0x0 12. "TRP12,Transmission Request Pending for Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TRP11,Transmission Request Pending for Buffer 11" "0,1"
|
|
bitfld.long 0x0 10. "TRP10,Transmission Request Pending for Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TRP9,Transmission Request Pending for Buffer 9" "0,1"
|
|
bitfld.long 0x0 8. "TRP8,Transmission Request Pending for Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TRP7,Transmission Request Pending for Buffer 7" "0,1"
|
|
bitfld.long 0x0 6. "TRP6,Transmission Request Pending for Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TRP5,Transmission Request Pending for Buffer 5" "0,1"
|
|
bitfld.long 0x0 4. "TRP4,Transmission Request Pending for Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TRP3,Transmission Request Pending for Buffer 3" "0,1"
|
|
bitfld.long 0x0 2. "TRP2,Transmission Request Pending for Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TRP1,Transmission Request Pending for Buffer 1" "0,1"
|
|
bitfld.long 0x0 0. "TRP0,Transmission Request Pending for Buffer 0" "0,1"
|
|
group.long 0xD0++0x7
|
|
line.long 0x0 "TXBAR,Transmit Buffer Add Request Register"
|
|
bitfld.long 0x0 31. "AR31,Add Request for Transmit Buffer 31" "0,1"
|
|
bitfld.long 0x0 30. "AR30,Add Request for Transmit Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "AR29,Add Request for Transmit Buffer 29" "0,1"
|
|
bitfld.long 0x0 28. "AR28,Add Request for Transmit Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "AR27,Add Request for Transmit Buffer 27" "0,1"
|
|
bitfld.long 0x0 26. "AR26,Add Request for Transmit Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "AR25,Add Request for Transmit Buffer 25" "0,1"
|
|
bitfld.long 0x0 24. "AR24,Add Request for Transmit Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "AR23,Add Request for Transmit Buffer 23" "0,1"
|
|
bitfld.long 0x0 22. "AR22,Add Request for Transmit Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "AR21,Add Request for Transmit Buffer 21" "0,1"
|
|
bitfld.long 0x0 20. "AR20,Add Request for Transmit Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "AR19,Add Request for Transmit Buffer 19" "0,1"
|
|
bitfld.long 0x0 18. "AR18,Add Request for Transmit Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "AR17,Add Request for Transmit Buffer 17" "0,1"
|
|
bitfld.long 0x0 16. "AR16,Add Request for Transmit Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "AR15,Add Request for Transmit Buffer 15" "0,1"
|
|
bitfld.long 0x0 14. "AR14,Add Request for Transmit Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "AR13,Add Request for Transmit Buffer 13" "0,1"
|
|
bitfld.long 0x0 12. "AR12,Add Request for Transmit Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "AR11,Add Request for Transmit Buffer 11" "0,1"
|
|
bitfld.long 0x0 10. "AR10,Add Request for Transmit Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "AR9,Add Request for Transmit Buffer 9" "0,1"
|
|
bitfld.long 0x0 8. "AR8,Add Request for Transmit Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "AR7,Add Request for Transmit Buffer 7" "0,1"
|
|
bitfld.long 0x0 6. "AR6,Add Request for Transmit Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "AR5,Add Request for Transmit Buffer 5" "0,1"
|
|
bitfld.long 0x0 4. "AR4,Add Request for Transmit Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "AR3,Add Request for Transmit Buffer 3" "0,1"
|
|
bitfld.long 0x0 2. "AR2,Add Request for Transmit Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "AR1,Add Request for Transmit Buffer 1" "0,1"
|
|
bitfld.long 0x0 0. "AR0,Add Request for Transmit Buffer 0" "0,1"
|
|
line.long 0x4 "TXBCR,Transmit Buffer Cancellation Request Register"
|
|
bitfld.long 0x4 31. "CR31,Cancellation Request for Transmit Buffer 31" "0,1"
|
|
bitfld.long 0x4 30. "CR30,Cancellation Request for Transmit Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "CR29,Cancellation Request for Transmit Buffer 29" "0,1"
|
|
bitfld.long 0x4 28. "CR28,Cancellation Request for Transmit Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "CR27,Cancellation Request for Transmit Buffer 27" "0,1"
|
|
bitfld.long 0x4 26. "CR26,Cancellation Request for Transmit Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "CR25,Cancellation Request for Transmit Buffer 25" "0,1"
|
|
bitfld.long 0x4 24. "CR24,Cancellation Request for Transmit Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "CR23,Cancellation Request for Transmit Buffer 23" "0,1"
|
|
bitfld.long 0x4 22. "CR22,Cancellation Request for Transmit Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "CR21,Cancellation Request for Transmit Buffer 21" "0,1"
|
|
bitfld.long 0x4 20. "CR20,Cancellation Request for Transmit Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CR19,Cancellation Request for Transmit Buffer 19" "0,1"
|
|
bitfld.long 0x4 18. "CR18,Cancellation Request for Transmit Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CR17,Cancellation Request for Transmit Buffer 17" "0,1"
|
|
bitfld.long 0x4 16. "CR16,Cancellation Request for Transmit Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CR15,Cancellation Request for Transmit Buffer 15" "0,1"
|
|
bitfld.long 0x4 14. "CR14,Cancellation Request for Transmit Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "CR13,Cancellation Request for Transmit Buffer 13" "0,1"
|
|
bitfld.long 0x4 12. "CR12,Cancellation Request for Transmit Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "CR11,Cancellation Request for Transmit Buffer 11" "0,1"
|
|
bitfld.long 0x4 10. "CR10,Cancellation Request for Transmit Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "CR9,Cancellation Request for Transmit Buffer 9" "0,1"
|
|
bitfld.long 0x4 8. "CR8,Cancellation Request for Transmit Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "CR7,Cancellation Request for Transmit Buffer 7" "0,1"
|
|
bitfld.long 0x4 6. "CR6,Cancellation Request for Transmit Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CR5,Cancellation Request for Transmit Buffer 5" "0,1"
|
|
bitfld.long 0x4 4. "CR4,Cancellation Request for Transmit Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CR3,Cancellation Request for Transmit Buffer 3" "0,1"
|
|
bitfld.long 0x4 2. "CR2,Cancellation Request for Transmit Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CR1,Cancellation Request for Transmit Buffer 1" "0,1"
|
|
bitfld.long 0x4 0. "CR0,Cancellation Request for Transmit Buffer 0" "0,1"
|
|
rgroup.long 0xD8++0x7
|
|
line.long 0x0 "TXBTO,Transmit Buffer Transmission Occurred Register"
|
|
bitfld.long 0x0 31. "TO31,Transmission Occurred for Buffer 31" "0,1"
|
|
bitfld.long 0x0 30. "TO30,Transmission Occurred for Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TO29,Transmission Occurred for Buffer 29" "0,1"
|
|
bitfld.long 0x0 28. "TO28,Transmission Occurred for Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "TO27,Transmission Occurred for Buffer 27" "0,1"
|
|
bitfld.long 0x0 26. "TO26,Transmission Occurred for Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "TO25,Transmission Occurred for Buffer 25" "0,1"
|
|
bitfld.long 0x0 24. "TO24,Transmission Occurred for Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "TO23,Transmission Occurred for Buffer 23" "0,1"
|
|
bitfld.long 0x0 22. "TO22,Transmission Occurred for Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "TO21,Transmission Occurred for Buffer 21" "0,1"
|
|
bitfld.long 0x0 20. "TO20,Transmission Occurred for Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "TO19,Transmission Occurred for Buffer 19" "0,1"
|
|
bitfld.long 0x0 18. "TO18,Transmission Occurred for Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "TO17,Transmission Occurred for Buffer 17" "0,1"
|
|
bitfld.long 0x0 16. "TO16,Transmission Occurred for Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TO15,Transmission Occurred for Buffer 15" "0,1"
|
|
bitfld.long 0x0 14. "TO14,Transmission Occurred for Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TO13,Transmission Occurred for Buffer 13" "0,1"
|
|
bitfld.long 0x0 12. "TO12,Transmission Occurred for Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TO11,Transmission Occurred for Buffer 11" "0,1"
|
|
bitfld.long 0x0 10. "TO10,Transmission Occurred for Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TO9,Transmission Occurred for Buffer 9" "0,1"
|
|
bitfld.long 0x0 8. "TO8,Transmission Occurred for Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TO7,Transmission Occurred for Buffer 7" "0,1"
|
|
bitfld.long 0x0 6. "TO6,Transmission Occurred for Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TO5,Transmission Occurred for Buffer 5" "0,1"
|
|
bitfld.long 0x0 4. "TO4,Transmission Occurred for Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TO3,Transmission Occurred for Buffer 3" "0,1"
|
|
bitfld.long 0x0 2. "TO2,Transmission Occurred for Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TO1,Transmission Occurred for Buffer 1" "0,1"
|
|
bitfld.long 0x0 0. "TO0,Transmission Occurred for Buffer 0" "0,1"
|
|
line.long 0x4 "TXBCF,Transmit Buffer Cancellation Finished Register"
|
|
bitfld.long 0x4 31. "CF31,Cancellation Finished for Transmit Buffer 31" "0,1"
|
|
bitfld.long 0x4 30. "CF30,Cancellation Finished for Transmit Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "CF29,Cancellation Finished for Transmit Buffer 29" "0,1"
|
|
bitfld.long 0x4 28. "CF28,Cancellation Finished for Transmit Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "CF27,Cancellation Finished for Transmit Buffer 27" "0,1"
|
|
bitfld.long 0x4 26. "CF26,Cancellation Finished for Transmit Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "CF25,Cancellation Finished for Transmit Buffer 25" "0,1"
|
|
bitfld.long 0x4 24. "CF24,Cancellation Finished for Transmit Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "CF23,Cancellation Finished for Transmit Buffer 23" "0,1"
|
|
bitfld.long 0x4 22. "CF22,Cancellation Finished for Transmit Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "CF21,Cancellation Finished for Transmit Buffer 21" "0,1"
|
|
bitfld.long 0x4 20. "CF20,Cancellation Finished for Transmit Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CF19,Cancellation Finished for Transmit Buffer 19" "0,1"
|
|
bitfld.long 0x4 18. "CF18,Cancellation Finished for Transmit Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CF17,Cancellation Finished for Transmit Buffer 17" "0,1"
|
|
bitfld.long 0x4 16. "CF16,Cancellation Finished for Transmit Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CF15,Cancellation Finished for Transmit Buffer 15" "0,1"
|
|
bitfld.long 0x4 14. "CF14,Cancellation Finished for Transmit Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "CF13,Cancellation Finished for Transmit Buffer 13" "0,1"
|
|
bitfld.long 0x4 12. "CF12,Cancellation Finished for Transmit Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "CF11,Cancellation Finished for Transmit Buffer 11" "0,1"
|
|
bitfld.long 0x4 10. "CF10,Cancellation Finished for Transmit Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "CF9,Cancellation Finished for Transmit Buffer 9" "0,1"
|
|
bitfld.long 0x4 8. "CF8,Cancellation Finished for Transmit Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "CF7,Cancellation Finished for Transmit Buffer 7" "0,1"
|
|
bitfld.long 0x4 6. "CF6,Cancellation Finished for Transmit Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CF5,Cancellation Finished for Transmit Buffer 5" "0,1"
|
|
bitfld.long 0x4 4. "CF4,Cancellation Finished for Transmit Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CF3,Cancellation Finished for Transmit Buffer 3" "0,1"
|
|
bitfld.long 0x4 2. "CF2,Cancellation Finished for Transmit Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CF1,Cancellation Finished for Transmit Buffer 1" "0,1"
|
|
bitfld.long 0x4 0. "CF0,Cancellation Finished for Transmit Buffer 0" "0,1"
|
|
group.long 0xE0++0x7
|
|
line.long 0x0 "TXBTIE,Transmit Buffer Transmission Interrupt Enable Register"
|
|
bitfld.long 0x0 31. "TIE31,Transmission Interrupt Enable for Buffer 31" "0,1"
|
|
bitfld.long 0x0 30. "TIE30,Transmission Interrupt Enable for Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TIE29,Transmission Interrupt Enable for Buffer 29" "0,1"
|
|
bitfld.long 0x0 28. "TIE28,Transmission Interrupt Enable for Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "TIE27,Transmission Interrupt Enable for Buffer 27" "0,1"
|
|
bitfld.long 0x0 26. "TIE26,Transmission Interrupt Enable for Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "TIE25,Transmission Interrupt Enable for Buffer 25" "0,1"
|
|
bitfld.long 0x0 24. "TIE24,Transmission Interrupt Enable for Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "TIE23,Transmission Interrupt Enable for Buffer 23" "0,1"
|
|
bitfld.long 0x0 22. "TIE22,Transmission Interrupt Enable for Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "TIE21,Transmission Interrupt Enable for Buffer 21" "0,1"
|
|
bitfld.long 0x0 20. "TIE20,Transmission Interrupt Enable for Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "TIE19,Transmission Interrupt Enable for Buffer 19" "0,1"
|
|
bitfld.long 0x0 18. "TIE18,Transmission Interrupt Enable for Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "TIE17,Transmission Interrupt Enable for Buffer 17" "0,1"
|
|
bitfld.long 0x0 16. "TIE16,Transmission Interrupt Enable for Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TIE15,Transmission Interrupt Enable for Buffer 15" "0,1"
|
|
bitfld.long 0x0 14. "TIE14,Transmission Interrupt Enable for Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TIE13,Transmission Interrupt Enable for Buffer 13" "0,1"
|
|
bitfld.long 0x0 12. "TIE12,Transmission Interrupt Enable for Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TIE11,Transmission Interrupt Enable for Buffer 11" "0,1"
|
|
bitfld.long 0x0 10. "TIE10,Transmission Interrupt Enable for Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TIE9,Transmission Interrupt Enable for Buffer 9" "0,1"
|
|
bitfld.long 0x0 8. "TIE8,Transmission Interrupt Enable for Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TIE7,Transmission Interrupt Enable for Buffer 7" "0,1"
|
|
bitfld.long 0x0 6. "TIE6,Transmission Interrupt Enable for Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TIE5,Transmission Interrupt Enable for Buffer 5" "0,1"
|
|
bitfld.long 0x0 4. "TIE4,Transmission Interrupt Enable for Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TIE3,Transmission Interrupt Enable for Buffer 3" "0,1"
|
|
bitfld.long 0x0 2. "TIE2,Transmission Interrupt Enable for Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TIE1,Transmission Interrupt Enable for Buffer 1" "0,1"
|
|
bitfld.long 0x0 0. "TIE0,Transmission Interrupt Enable for Buffer 0" "0,1"
|
|
line.long 0x4 "TXBCIE,Transmit Buffer Cancellation Finished Interrupt Enable Register"
|
|
bitfld.long 0x4 31. "CFIE31,Cancellation Finished Interrupt Enable for Transmit Buffer 31" "0,1"
|
|
bitfld.long 0x4 30. "CFIE30,Cancellation Finished Interrupt Enable for Transmit Buffer 30" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "CFIE29,Cancellation Finished Interrupt Enable for Transmit Buffer 29" "0,1"
|
|
bitfld.long 0x4 28. "CFIE28,Cancellation Finished Interrupt Enable for Transmit Buffer 28" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "CFIE27,Cancellation Finished Interrupt Enable for Transmit Buffer 27" "0,1"
|
|
bitfld.long 0x4 26. "CFIE26,Cancellation Finished Interrupt Enable for Transmit Buffer 26" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "CFIE25,Cancellation Finished Interrupt Enable for Transmit Buffer 25" "0,1"
|
|
bitfld.long 0x4 24. "CFIE24,Cancellation Finished Interrupt Enable for Transmit Buffer 24" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "CFIE23,Cancellation Finished Interrupt Enable for Transmit Buffer 23" "0,1"
|
|
bitfld.long 0x4 22. "CFIE22,Cancellation Finished Interrupt Enable for Transmit Buffer 22" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "CFIE21,Cancellation Finished Interrupt Enable for Transmit Buffer 21" "0,1"
|
|
bitfld.long 0x4 20. "CFIE20,Cancellation Finished Interrupt Enable for Transmit Buffer 20" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CFIE19,Cancellation Finished Interrupt Enable for Transmit Buffer 19" "0,1"
|
|
bitfld.long 0x4 18. "CFIE18,Cancellation Finished Interrupt Enable for Transmit Buffer 18" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CFIE17,Cancellation Finished Interrupt Enable for Transmit Buffer 17" "0,1"
|
|
bitfld.long 0x4 16. "CFIE16,Cancellation Finished Interrupt Enable for Transmit Buffer 16" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CFIE15,Cancellation Finished Interrupt Enable for Transmit Buffer 15" "0,1"
|
|
bitfld.long 0x4 14. "CFIE14,Cancellation Finished Interrupt Enable for Transmit Buffer 14" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "CFIE13,Cancellation Finished Interrupt Enable for Transmit Buffer 13" "0,1"
|
|
bitfld.long 0x4 12. "CFIE12,Cancellation Finished Interrupt Enable for Transmit Buffer 12" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "CFIE11,Cancellation Finished Interrupt Enable for Transmit Buffer 11" "0,1"
|
|
bitfld.long 0x4 10. "CFIE10,Cancellation Finished Interrupt Enable for Transmit Buffer 10" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "CFIE9,Cancellation Finished Interrupt Enable for Transmit Buffer 9" "0,1"
|
|
bitfld.long 0x4 8. "CFIE8,Cancellation Finished Interrupt Enable for Transmit Buffer 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "CFIE7,Cancellation Finished Interrupt Enable for Transmit Buffer 7" "0,1"
|
|
bitfld.long 0x4 6. "CFIE6,Cancellation Finished Interrupt Enable for Transmit Buffer 6" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "CFIE5,Cancellation Finished Interrupt Enable for Transmit Buffer 5" "0,1"
|
|
bitfld.long 0x4 4. "CFIE4,Cancellation Finished Interrupt Enable for Transmit Buffer 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CFIE3,Cancellation Finished Interrupt Enable for Transmit Buffer 3" "0,1"
|
|
bitfld.long 0x4 2. "CFIE2,Cancellation Finished Interrupt Enable for Transmit Buffer 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CFIE1,Cancellation Finished Interrupt Enable for Transmit Buffer 1" "0,1"
|
|
bitfld.long 0x4 0. "CFIE0,Cancellation Finished Interrupt Enable for Transmit Buffer 0" "0,1"
|
|
group.long 0xF0++0x3
|
|
line.long 0x0 "TXEFC,Transmit Event FIFO Configuration Register"
|
|
hexmask.long.byte 0x0 24.--29. 1. "EFWM,Event FIFO Watermark"
|
|
hexmask.long.byte 0x0 16.--21. 1. "EFS,Event FIFO Size"
|
|
newline
|
|
hexmask.long.word 0x0 2.--15. 1. "EFSA,Event FIFO Start Address"
|
|
rgroup.long 0xF4++0x3
|
|
line.long 0x0 "TXEFS,Transmit Event FIFO Status Register"
|
|
bitfld.long 0x0 25. "TEFL,Tx Event FIFO Element Lost" "0,1"
|
|
bitfld.long 0x0 24. "EFF,Event FIFO Full" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--20. 1. "EFPI,Event FIFO Put Index"
|
|
hexmask.long.byte 0x0 8.--12. 1. "EFGI,Event FIFO Get Index"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "EFFL,Event FIFO Fill Level"
|
|
group.long 0xF8++0x3
|
|
line.long 0x0 "TXEFA,Transmit Event FIFO Acknowledge Register"
|
|
hexmask.long.byte 0x0 0.--4. 1. "EFAI,Event FIFO Acknowledge Index"
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
sif (cpuis("PIC32CZ2051CA70064")||cpuis("PIC32CZ2051CA70100")||cpuis("PIC32CZ2051CA70144")||cpuis("PIC32CZ2051MC70100")||cpuis("PIC32CZ2051MC70144"))
|
|
tree "MLB (Media Local Bus)"
|
|
base ad:0x40068000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "MLBC0,MediaLB Control 0 Register"
|
|
bitfld.long 0x0 15.--17. "FCNT,The number of frames per sub-buffer for synchronous channels" "0: 1 frame per sub-buffer (Operation is the same as..,1: 2 frames per sub-buffer,2: 4 frames per sub-buffer,3: 8 frames per sub-buffer,4: 16 frames per sub-buffer,5: 32 frames per sub-buffer,6: 64 frames per sub-buffer,?"
|
|
bitfld.long 0x0 14. "CTLRETRY,Control Tx Packet Retry" "0,1"
|
|
bitfld.long 0x0 12. "ASYRETRY,Asynchronous Tx Packet Retry" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "MLBLK,MediaLB Lock Status (read-only)" "0,1"
|
|
bitfld.long 0x0 5. "ZERO,Must be Written to 0" "0,1"
|
|
bitfld.long 0x0 2.--4. "MLBCLK,MLBCLK (MediaLB clock) Speed Select" "0: 256xFs (for MLBPEN = 0),1: 512xFs (for MLBPEN = 0),2: 1024xFs (for MLBPEN = 0),?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 0. "MLBEN,MediaLB Enable" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "MS0,MediaLB Channel Status 0 Register"
|
|
hexmask.long 0x0 0.--31. 1. "MCS,MediaLB Channel Status [31:0] (cleared by writing a 0)"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "MS1,MediaLB Channel Status1 Register"
|
|
hexmask.long 0x0 0.--31. 1. "MCS,MediaLB Channel Status [63:32] (cleared by writing a 0)"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "MSS,MediaLB System Status Register"
|
|
bitfld.long 0x0 5. "SERVREQ,Service Request Enabled" "0,1"
|
|
bitfld.long 0x0 4. "SWSYSCMD,Software System Command Detected in the System Quadlet (cleared by writing a 0)" "0,1"
|
|
bitfld.long 0x0 3. "CSSYSCMD,Channel Scan System Command Detected in the System Quadlet (cleared by writing a 0)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "ULKSYSCMD,Network Unlock System Command Detected in the System Quadlet (cleared by writing a 0)" "0,1"
|
|
bitfld.long 0x0 1. "LKSYSCMD,Network Lock System Command Detected in the System Quadlet (cleared by writing a 0)" "0,1"
|
|
bitfld.long 0x0 0. "RSTSYSCMD,Reset System Command Detected in the System Quadlet (cleared by writing a 0)" "0,1"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x0 "MSD,MediaLB System Data Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "SD3,System Data (Byte 3)"
|
|
hexmask.long.byte 0x0 16.--23. 1. "SD2,System Data (Byte 2)"
|
|
hexmask.long.byte 0x0 8.--15. 1. "SD1,System Data (Byte 1)"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "SD0,System Data (Byte 0)"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "MIEN,MediaLB Interrupt Enable Register"
|
|
bitfld.long 0x0 29. "CTX_BREAK,Control Tx Break Enable" "0,1"
|
|
bitfld.long 0x0 28. "CTX_PE,Control Tx Protocol Error Enable" "0,1"
|
|
bitfld.long 0x0 27. "CTX_DONE,Control Tx Packet Done Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "CRX_BREAK,Control Rx Break Enable" "0,1"
|
|
bitfld.long 0x0 25. "CRX_PE,Control Rx Protocol Error Enable" "0,1"
|
|
bitfld.long 0x0 24. "CRX_DONE,Control Rx Packet Done Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "ATX_BREAK,Asynchronous Tx Break Enable" "0,1"
|
|
bitfld.long 0x0 21. "ATX_PE,Asynchronous Tx Protocol Error Enable" "0,1"
|
|
bitfld.long 0x0 20. "ATX_DONE,Asynchronous Tx Packet Done Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "ARX_BREAK,Asynchronous Rx Break Enable" "0,1"
|
|
bitfld.long 0x0 18. "ARX_PE,Asynchronous Rx Protocol Error Enable" "0,1"
|
|
bitfld.long 0x0 17. "ARX_DONE,Asynchronous Rx Done Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "SYNC_PE,Synchronous Protocol Error Enable" "0,1"
|
|
bitfld.long 0x0 1. "ISOC_BUFO,Isochronous Rx Buffer Overflow Enable" "0,1"
|
|
bitfld.long 0x0 0. "ISOC_PE,Isochronous Rx Protocol Error Enable" "0,1"
|
|
group.long 0x3C++0x3
|
|
line.long 0x0 "MLBC1,MediaLB Control 1 Register"
|
|
hexmask.long.byte 0x0 8.--15. 1. "NDA,Node Device Address"
|
|
bitfld.long 0x0 7. "CLKM,MediaLB Clock Missing Status (cleared by writing a 0)" "0,1"
|
|
bitfld.long 0x0 6. "LOCK,MediaLB Lock Error Status (cleared by writing a 0)" "0,1"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "HCTL,HBI Control Register"
|
|
bitfld.long 0x0 15. "EN,HBI Enable" "0,1"
|
|
bitfld.long 0x0 1. "RST1,Address Generation Unit 1 Software Reset" "0,1"
|
|
bitfld.long 0x0 0. "RST0,Address Generation Unit 0 Software Reset" "0,1"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x88)++0x3
|
|
line.long 0x0 "HCMR[$1],HBI Channel Mask 0 Register 0"
|
|
hexmask.long 0x0 0.--31. 1. "CHM,Bitwise Channel Mask Bit [31:0]"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x90)++0x3
|
|
line.long 0x0 "HCER[$1],HBI Channel Error 0 Register 0"
|
|
hexmask.long 0x0 0.--31. 1. "CERR,Bitwise Channel Error Bit [31:0]"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x98)++0x3
|
|
line.long 0x0 "HCBR[$1],HBI Channel Busy 0 Register 0"
|
|
hexmask.long 0x0 0.--31. 1. "CHB,Bitwise Channel Busy Bit [31:0]"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0xC0)++0x3
|
|
line.long 0x0 "MDAT[$1],MIF Data 0 Register 0"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,CRT or DBR Data"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0xD0)++0x3
|
|
line.long 0x0 "MDWE[$1],MIF Data Write Enable 0 Register 0"
|
|
hexmask.long 0x0 0.--31. 1. "MASK,Bitwise Write Enable for CTR Data - bits[31:0]"
|
|
repeat.end
|
|
group.long 0xE0++0x7
|
|
line.long 0x0 "MCTL,MIF Control Register"
|
|
bitfld.long 0x0 0. "XCMP,Transfer Complete (Write 0 to Clear)" "0,1"
|
|
line.long 0x4 "MADR,MIF Address Register"
|
|
bitfld.long 0x4 31. "WNR,Write-Not-Read Selection" "0,1"
|
|
bitfld.long 0x4 30. "TB,Target Location Bit" "0: Selects CTR,1: Selects DBR"
|
|
hexmask.long.word 0x4 0.--13. 1. "ADDR,CTR or DBR Address"
|
|
group.long 0x3C0++0x3
|
|
line.long 0x0 "ACTL,AHB Control Register"
|
|
bitfld.long 0x0 4. "MPB,DMA Packet Buffering Mode" "0: Single-packet mode,1: Multiple-packet mode"
|
|
bitfld.long 0x0 2. "DMA_MODE,DMA Mode" "0,1"
|
|
bitfld.long 0x0 1. "SMX,AHB Interrupt Mux Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SCE,Software Clear Enable" "0,1"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x3D0)++0x3
|
|
line.long 0x0 "ACSR[$1],AHB Channel Status 0 Register 0"
|
|
hexmask.long 0x0 0.--31. 1. "CHS,Interrupt Status for Logical Channels [31:0] (cleared by writing a 1)"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x3D8)++0x3
|
|
line.long 0x0 "ACMR[$1],AHB Channel Mask 0 Register 0"
|
|
hexmask.long 0x0 0.--31. 1. "CHM,Bitwise Channel Mask Bits 31 to 0"
|
|
repeat.end
|
|
tree.end
|
|
endif
|
|
tree "PIO (Parallel Input/Output Controller)"
|
|
base ad:0x0
|
|
tree "PIOA"
|
|
base ad:0x400E0E00
|
|
wgroup.long 0x0++0x7
|
|
line.long 0x0 "PER,PIO Enable Register"
|
|
bitfld.long 0x0 31. "P31,PIO Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,PIO Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,PIO Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,PIO Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,PIO Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,PIO Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,PIO Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,PIO Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,PIO Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,PIO Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,PIO Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,PIO Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,PIO Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,PIO Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,PIO Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,PIO Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,PIO Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,PIO Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,PIO Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,PIO Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,PIO Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,PIO Enable" "0,1"
|
|
line.long 0x4 "PDR,PIO Disable Register"
|
|
bitfld.long 0x4 31. "P31,PIO Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,PIO Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,PIO Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,PIO Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,PIO Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,PIO Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,PIO Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,PIO Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,PIO Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,PIO Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,PIO Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,PIO Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,PIO Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,PIO Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,PIO Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,PIO Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,PIO Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,PIO Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,PIO Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,PIO Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,PIO Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,PIO Disable" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "PSR,PIO Status Register"
|
|
bitfld.long 0x0 31. "P31,PIO Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,PIO Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,PIO Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,PIO Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,PIO Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,PIO Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,PIO Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,PIO Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,PIO Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,PIO Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,PIO Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,PIO Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,PIO Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,PIO Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,PIO Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,PIO Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,PIO Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,PIO Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,PIO Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,PIO Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,PIO Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,PIO Status" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "OER,Output Enable Register"
|
|
bitfld.long 0x0 31. "P31,Output Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Enable" "0,1"
|
|
line.long 0x4 "ODR,Output Disable Register"
|
|
bitfld.long 0x4 31. "P31,Output Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Output Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Output Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Output Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Output Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Output Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Output Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Output Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Output Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Output Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Output Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Output Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Output Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Output Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Output Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Output Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Output Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Output Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Output Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Output Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Output Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Output Disable" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "OSR,Output Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Status" "0,1"
|
|
wgroup.long 0x20++0x7
|
|
line.long 0x0 "IFER,Glitch Input Filter Enable Register"
|
|
bitfld.long 0x0 31. "P31,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Filter Enable" "0,1"
|
|
line.long 0x4 "IFDR,Glitch Input Filter Disable Register"
|
|
bitfld.long 0x4 31. "P31,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Filter Disable" "0,1"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "IFSR,Glitch Input Filter Status Register"
|
|
bitfld.long 0x0 31. "P31,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Filter Status" "0,1"
|
|
wgroup.long 0x30++0x7
|
|
line.long 0x0 "SODR,Set Output Data Register"
|
|
bitfld.long 0x0 31. "P31,Set Output Data" "0,1"
|
|
bitfld.long 0x0 30. "P30,Set Output Data" "0,1"
|
|
bitfld.long 0x0 29. "P29,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Set Output Data" "0,1"
|
|
bitfld.long 0x0 27. "P27,Set Output Data" "0,1"
|
|
bitfld.long 0x0 26. "P26,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Set Output Data" "0,1"
|
|
bitfld.long 0x0 24. "P24,Set Output Data" "0,1"
|
|
bitfld.long 0x0 23. "P23,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Set Output Data" "0,1"
|
|
bitfld.long 0x0 21. "P21,Set Output Data" "0,1"
|
|
bitfld.long 0x0 20. "P20,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Set Output Data" "0,1"
|
|
bitfld.long 0x0 18. "P18,Set Output Data" "0,1"
|
|
bitfld.long 0x0 17. "P17,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Set Output Data" "0,1"
|
|
bitfld.long 0x0 15. "P15,Set Output Data" "0,1"
|
|
bitfld.long 0x0 14. "P14,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Set Output Data" "0,1"
|
|
bitfld.long 0x0 12. "P12,Set Output Data" "0,1"
|
|
bitfld.long 0x0 11. "P11,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Set Output Data" "0,1"
|
|
bitfld.long 0x0 9. "P9,Set Output Data" "0,1"
|
|
bitfld.long 0x0 8. "P8,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Set Output Data" "0,1"
|
|
bitfld.long 0x0 6. "P6,Set Output Data" "0,1"
|
|
bitfld.long 0x0 5. "P5,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Set Output Data" "0,1"
|
|
bitfld.long 0x0 3. "P3,Set Output Data" "0,1"
|
|
bitfld.long 0x0 2. "P2,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Set Output Data" "0,1"
|
|
bitfld.long 0x0 0. "P0,Set Output Data" "0,1"
|
|
line.long 0x4 "CODR,Clear Output Data Register"
|
|
bitfld.long 0x4 31. "P31,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 30. "P30,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 29. "P29,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 27. "P27,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 26. "P26,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 24. "P24,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 23. "P23,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 21. "P21,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 20. "P20,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 18. "P18,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 17. "P17,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 15. "P15,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 14. "P14,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 12. "P12,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 11. "P11,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 9. "P9,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 8. "P8,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 6. "P6,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 5. "P5,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 3. "P3,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 2. "P2,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 0. "P0,Clear Output Data" "0,1"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "ODSR,Output Data Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Data Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Data Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Data Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Data Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Data Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Data Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Data Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Data Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Data Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Data Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Data Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Data Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Data Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Data Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Data Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Data Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Data Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Data Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Data Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Data Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Data Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Data Status" "0,1"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x0 "PDSR,Pin Data Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Data Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Data Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Data Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Data Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Data Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Data Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Data Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Data Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Data Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Data Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Data Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Data Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Data Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Data Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Data Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Data Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Data Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Data Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Data Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Data Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Data Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Data Status" "0,1"
|
|
wgroup.long 0x40++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 31. "P31,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Change Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 31. "P31,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Change Interrupt Disable" "0,1"
|
|
rgroup.long 0x48++0x7
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 31. "P31,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Change Interrupt Mask" "0,1"
|
|
line.long 0x4 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x4 31. "P31,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 30. "P30,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 29. "P29,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 27. "P27,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 26. "P26,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Change Interrupt Status" "0,1"
|
|
wgroup.long 0x50++0x7
|
|
line.long 0x0 "MDER,Multi-driver Enable Register"
|
|
bitfld.long 0x0 31. "P31,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Multi-drive Enable" "0,1"
|
|
line.long 0x4 "MDDR,Multi-driver Disable Register"
|
|
bitfld.long 0x4 31. "P31,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Multi-drive Disable" "0,1"
|
|
rgroup.long 0x58++0x3
|
|
line.long 0x0 "MDSR,Multi-driver Status Register"
|
|
bitfld.long 0x0 31. "P31,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Multi-drive Status" "0,1"
|
|
wgroup.long 0x60++0x7
|
|
line.long 0x0 "PUDR,Pull-up Disable Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Up Disable" "0,1"
|
|
line.long 0x4 "PUER,Pull-up Enable Register"
|
|
bitfld.long 0x4 31. "P31,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Pull-Up Enable" "0,1"
|
|
rgroup.long 0x68++0x3
|
|
line.long 0x0 "PUSR,Pad Pull-up Status Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Up Status" "0,1"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "ABCDSR[$1],Peripheral ABCD Select Register 0"
|
|
bitfld.long 0x0 31. "P31,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 30. "P30,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 29. "P29,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 27. "P27,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 26. "P26,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 24. "P24,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 23. "P23,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 21. "P21,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 20. "P20,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 18. "P18,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 17. "P17,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 15. "P15,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 14. "P14,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 12. "P12,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 11. "P11,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 9. "P9,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 8. "P8,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 6. "P6,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 5. "P5,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 3. "P3,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 2. "P2,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 0. "P0,Peripheral Select" "0,1"
|
|
repeat.end
|
|
wgroup.long 0x80++0x7
|
|
line.long 0x0 "IFSCDR,Input Filter Slow Clock Disable Register"
|
|
bitfld.long 0x0 31. "P31,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 30. "P30,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 29. "P29,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 27. "P27,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 26. "P26,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 24. "P24,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 23. "P23,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 21. "P21,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 20. "P20,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 18. "P18,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 17. "P17,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 15. "P15,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 14. "P14,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 12. "P12,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 11. "P11,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 9. "P9,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 8. "P8,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 6. "P6,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 5. "P5,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 3. "P3,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 2. "P2,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 0. "P0,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
line.long 0x4 "IFSCER,Input Filter Slow Clock Enable Register"
|
|
bitfld.long 0x4 31. "P31,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 30. "P30,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 29. "P29,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 27. "P27,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 26. "P26,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 24. "P24,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 23. "P23,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 21. "P21,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 20. "P20,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 18. "P18,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 17. "P17,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 15. "P15,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 14. "P14,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 12. "P12,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 11. "P11,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 9. "P9,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 8. "P8,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 6. "P6,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 5. "P5,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 3. "P3,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 2. "P2,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 0. "P0,Slow Clock Debouncing Filtering Select" "0,1"
|
|
rgroup.long 0x88++0x3
|
|
line.long 0x0 "IFSCSR,Input Filter Slow Clock Status Register"
|
|
bitfld.long 0x0 31. "P31,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
group.long 0x8C++0x3
|
|
line.long 0x0 "SCDR,Slow Clock Divider Debouncing Register"
|
|
hexmask.long.word 0x0 0.--13. 1. "DIV,Slow Clock Divider Selection for Debouncing"
|
|
wgroup.long 0x90++0x7
|
|
line.long 0x0 "PPDDR,Pad Pull-down Disable Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Down Disable" "0,1"
|
|
line.long 0x4 "PPDER,Pad Pull-down Enable Register"
|
|
bitfld.long 0x4 31. "P31,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Pull-Down Enable" "0,1"
|
|
rgroup.long 0x98++0x3
|
|
line.long 0x0 "PPDSR,Pad Pull-down Status Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Down Status" "0,1"
|
|
wgroup.long 0xA0++0x7
|
|
line.long 0x0 "OWER,Output Write Enable"
|
|
bitfld.long 0x0 31. "P31,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Write Enable" "0,1"
|
|
line.long 0x4 "OWDR,Output Write Disable"
|
|
bitfld.long 0x4 31. "P31,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Output Write Disable" "0,1"
|
|
rgroup.long 0xA8++0x3
|
|
line.long 0x0 "OWSR,Output Write Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Write Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Write Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Write Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Write Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Write Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Write Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Write Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Write Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Write Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Write Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Write Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Write Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Write Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Write Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Write Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Write Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Write Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Write Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Write Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Write Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Write Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Write Status" "0,1"
|
|
wgroup.long 0xB0++0x7
|
|
line.long 0x0 "AIMER,Additional Interrupt Modes Enable Register"
|
|
bitfld.long 0x0 31. "P31,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Additional Interrupt Modes Enable" "0,1"
|
|
line.long 0x4 "AIMDR,Additional Interrupt Modes Disable Register"
|
|
bitfld.long 0x4 31. "P31,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Additional Interrupt Modes Disable" "0,1"
|
|
rgroup.long 0xB8++0x3
|
|
line.long 0x0 "AIMMR,Additional Interrupt Modes Mask Register"
|
|
bitfld.long 0x0 31. "P31,IO Line Index" "0,1"
|
|
bitfld.long 0x0 30. "P30,IO Line Index" "0,1"
|
|
bitfld.long 0x0 29. "P29,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,IO Line Index" "0,1"
|
|
bitfld.long 0x0 27. "P27,IO Line Index" "0,1"
|
|
bitfld.long 0x0 26. "P26,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,IO Line Index" "0,1"
|
|
bitfld.long 0x0 24. "P24,IO Line Index" "0,1"
|
|
bitfld.long 0x0 23. "P23,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,IO Line Index" "0,1"
|
|
bitfld.long 0x0 21. "P21,IO Line Index" "0,1"
|
|
bitfld.long 0x0 20. "P20,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,IO Line Index" "0,1"
|
|
bitfld.long 0x0 18. "P18,IO Line Index" "0,1"
|
|
bitfld.long 0x0 17. "P17,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,IO Line Index" "0,1"
|
|
bitfld.long 0x0 15. "P15,IO Line Index" "0,1"
|
|
bitfld.long 0x0 14. "P14,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,IO Line Index" "0,1"
|
|
bitfld.long 0x0 12. "P12,IO Line Index" "0,1"
|
|
bitfld.long 0x0 11. "P11,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,IO Line Index" "0,1"
|
|
bitfld.long 0x0 9. "P9,IO Line Index" "0,1"
|
|
bitfld.long 0x0 8. "P8,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,IO Line Index" "0,1"
|
|
bitfld.long 0x0 6. "P6,IO Line Index" "0,1"
|
|
bitfld.long 0x0 5. "P5,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,IO Line Index" "0,1"
|
|
bitfld.long 0x0 3. "P3,IO Line Index" "0,1"
|
|
bitfld.long 0x0 2. "P2,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,IO Line Index" "0,1"
|
|
bitfld.long 0x0 0. "P0,IO Line Index" "0,1"
|
|
wgroup.long 0xC0++0x7
|
|
line.long 0x0 "ESR,Edge Select Register"
|
|
bitfld.long 0x0 31. "P31,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge Interrupt Selection" "0,1"
|
|
line.long 0x4 "LSR,Level Select Register"
|
|
bitfld.long 0x4 31. "P31,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 30. "P30,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 29. "P29,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 27. "P27,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 26. "P26,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 24. "P24,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 23. "P23,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 21. "P21,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 20. "P20,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 18. "P18,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 17. "P17,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 15. "P15,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 14. "P14,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 12. "P12,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 11. "P11,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 9. "P9,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 8. "P8,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 6. "P6,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 5. "P5,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 3. "P3,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 2. "P2,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 0. "P0,Level Interrupt Selection" "0,1"
|
|
rgroup.long 0xC8++0x3
|
|
line.long 0x0 "ELSR,Edge/Level Status Register"
|
|
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0,1"
|
|
wgroup.long 0xD0++0x7
|
|
line.long 0x0 "FELLSR,Falling Edge/Low-Level Select Register"
|
|
bitfld.long 0x0 31. "P31,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
line.long 0x4 "REHLSR,Rising Edge/High-Level Select Register"
|
|
bitfld.long 0x4 31. "P31,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 30. "P30,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 29. "P29,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 27. "P27,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 26. "P26,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 24. "P24,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 23. "P23,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 21. "P21,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 20. "P20,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 18. "P18,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 17. "P17,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 15. "P15,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 14. "P14,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 12. "P12,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 11. "P11,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 9. "P9,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 8. "P8,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 6. "P6,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 5. "P5,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 3. "P3,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 2. "P2,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 0. "P0,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
rgroup.long 0xD8++0x3
|
|
line.long 0x0 "FRLHSR,Fall/Rise - Low/High Status Register"
|
|
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0,1"
|
|
rgroup.long 0xE0++0x3
|
|
line.long 0x0 "LOCKSR,Lock Status"
|
|
bitfld.long 0x0 31. "P31,Lock Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Lock Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Lock Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Lock Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Lock Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Lock Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Lock Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Lock Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Lock Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Lock Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Lock Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Lock Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Lock Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Lock Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Lock Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Lock Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Lock Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Lock Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Lock Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Lock Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Lock Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Lock Status" "0,1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "SCHMITT,Schmitt Trigger Register"
|
|
bitfld.long 0x0 31. "SCHMITT31,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 30. "SCHMITT30,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 29. "SCHMITT29,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "SCHMITT28,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 27. "SCHMITT27,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 26. "SCHMITT26,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "SCHMITT25,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 24. "SCHMITT24,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 23. "SCHMITT23,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "SCHMITT22,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 21. "SCHMITT21,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 20. "SCHMITT20,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "SCHMITT19,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 18. "SCHMITT18,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 17. "SCHMITT17,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "SCHMITT16,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 15. "SCHMITT15,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 14. "SCHMITT14,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "SCHMITT13,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 12. "SCHMITT12,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 11. "SCHMITT11,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "SCHMITT10,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 9. "SCHMITT9,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 8. "SCHMITT8,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SCHMITT7,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 6. "SCHMITT6,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 5. "SCHMITT5,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "SCHMITT4,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 3. "SCHMITT3,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 2. "SCHMITT2,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SCHMITT1,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 0. "SCHMITT0,Schmitt Trigger Control" "0,1"
|
|
group.long 0x118++0x3
|
|
line.long 0x0 "DRIVER,I/O Drive Register"
|
|
bitfld.long 0x0 31. "LINE31,Drive of PIO Line 31" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 30. "LINE30,Drive of PIO Line 30" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 29. "LINE29,Drive of PIO Line 29" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 28. "LINE28,Drive of PIO Line 28" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 27. "LINE27,Drive of PIO Line 27" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 26. "LINE26,Drive of PIO Line 26" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 25. "LINE25,Drive of PIO Line 25" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 24. "LINE24,Drive of PIO Line 24" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 23. "LINE23,Drive of PIO Line 23" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 22. "LINE22,Drive of PIO Line 22" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 21. "LINE21,Drive of PIO Line 21" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 20. "LINE20,Drive of PIO Line 20" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 19. "LINE19,Drive of PIO Line 19" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 18. "LINE18,Drive of PIO Line 18" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 17. "LINE17,Drive of PIO Line 17" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 16. "LINE16,Drive of PIO Line 16" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 15. "LINE15,Drive of PIO Line 15" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 14. "LINE14,Drive of PIO Line 14" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 13. "LINE13,Drive of PIO Line 13" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 12. "LINE12,Drive of PIO Line 12" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 11. "LINE11,Drive of PIO Line 11" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 10. "LINE10,Drive of PIO Line 10" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 9. "LINE9,Drive of PIO Line 9" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 8. "LINE8,Drive of PIO Line 8" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 7. "LINE7,Drive of PIO Line 7" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 6. "LINE6,Drive of PIO Line 6" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 5. "LINE5,Drive of PIO Line 5" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 4. "LINE4,Drive of PIO Line 4" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 3. "LINE3,Drive of PIO Line 3" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 2. "LINE2,Drive of PIO Line 2" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 1. "LINE1,Drive of PIO Line 1" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 0. "LINE0,Drive of PIO Line 0" "0: Lowest drive,1: Highest drive"
|
|
group.long 0x150++0x3
|
|
line.long 0x0 "PCMR,Parallel Capture Mode Register"
|
|
bitfld.long 0x0 11. "FRSTS,Parallel Capture Mode First Sample" "0,1"
|
|
bitfld.long 0x0 10. "HALFS,Parallel Capture Mode Half Sampling" "0,1"
|
|
bitfld.long 0x0 9. "ALWYS,Parallel Capture Mode Always Sampling" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "DSIZE,Parallel Capture Mode Data Size" "0: The reception data in the PIO_PCRHR is a byte..,1: The reception data in the PIO_PCRHR is a..,2: The reception data in the PIO_PCRHR is a word..,?"
|
|
bitfld.long 0x0 0. "PCEN,Parallel Capture Mode Enable" "0,1"
|
|
wgroup.long 0x154++0x7
|
|
line.long 0x0 "PCIER,Parallel Capture Interrupt Enable Register"
|
|
bitfld.long 0x0 3. "RXBUFF,Reception Buffer Full Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "ENDRX,End of Reception Transfer Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Enable" "0,1"
|
|
line.long 0x4 "PCIDR,Parallel Capture Interrupt Disable Register"
|
|
bitfld.long 0x4 3. "RXBUFF,Reception Buffer Full Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "ENDRX,End of Reception Transfer Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Disable" "0,1"
|
|
rgroup.long 0x15C++0xB
|
|
line.long 0x0 "PCIMR,Parallel Capture Interrupt Mask Register"
|
|
bitfld.long 0x0 3. "RXBUFF,Reception Buffer Full Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "ENDRX,End of Reception Transfer Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Mask" "0,1"
|
|
line.long 0x4 "PCISR,Parallel Capture Interrupt Status Register"
|
|
bitfld.long 0x4 1. "OVRE,Parallel Capture Mode Overrun Error" "0,1"
|
|
bitfld.long 0x4 0. "DRDY,Parallel Capture Mode Data Ready" "0,1"
|
|
line.long 0x8 "PCRHR,Parallel Capture Reception Holding Register"
|
|
hexmask.long 0x8 0.--31. 1. "RDATA,Parallel Capture Mode Reception Data"
|
|
tree.end
|
|
tree "PIOB"
|
|
base ad:0x400E1000
|
|
wgroup.long 0x0++0x7
|
|
line.long 0x0 "PER,PIO Enable Register"
|
|
bitfld.long 0x0 31. "P31,PIO Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,PIO Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,PIO Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,PIO Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,PIO Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,PIO Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,PIO Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,PIO Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,PIO Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,PIO Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,PIO Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,PIO Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,PIO Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,PIO Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,PIO Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,PIO Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,PIO Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,PIO Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,PIO Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,PIO Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,PIO Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,PIO Enable" "0,1"
|
|
line.long 0x4 "PDR,PIO Disable Register"
|
|
bitfld.long 0x4 31. "P31,PIO Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,PIO Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,PIO Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,PIO Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,PIO Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,PIO Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,PIO Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,PIO Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,PIO Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,PIO Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,PIO Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,PIO Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,PIO Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,PIO Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,PIO Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,PIO Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,PIO Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,PIO Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,PIO Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,PIO Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,PIO Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,PIO Disable" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "PSR,PIO Status Register"
|
|
bitfld.long 0x0 31. "P31,PIO Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,PIO Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,PIO Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,PIO Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,PIO Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,PIO Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,PIO Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,PIO Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,PIO Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,PIO Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,PIO Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,PIO Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,PIO Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,PIO Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,PIO Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,PIO Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,PIO Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,PIO Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,PIO Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,PIO Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,PIO Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,PIO Status" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "OER,Output Enable Register"
|
|
bitfld.long 0x0 31. "P31,Output Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Enable" "0,1"
|
|
line.long 0x4 "ODR,Output Disable Register"
|
|
bitfld.long 0x4 31. "P31,Output Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Output Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Output Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Output Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Output Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Output Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Output Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Output Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Output Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Output Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Output Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Output Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Output Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Output Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Output Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Output Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Output Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Output Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Output Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Output Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Output Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Output Disable" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "OSR,Output Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Status" "0,1"
|
|
wgroup.long 0x20++0x7
|
|
line.long 0x0 "IFER,Glitch Input Filter Enable Register"
|
|
bitfld.long 0x0 31. "P31,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Filter Enable" "0,1"
|
|
line.long 0x4 "IFDR,Glitch Input Filter Disable Register"
|
|
bitfld.long 0x4 31. "P31,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Filter Disable" "0,1"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "IFSR,Glitch Input Filter Status Register"
|
|
bitfld.long 0x0 31. "P31,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Filter Status" "0,1"
|
|
wgroup.long 0x30++0x7
|
|
line.long 0x0 "SODR,Set Output Data Register"
|
|
bitfld.long 0x0 31. "P31,Set Output Data" "0,1"
|
|
bitfld.long 0x0 30. "P30,Set Output Data" "0,1"
|
|
bitfld.long 0x0 29. "P29,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Set Output Data" "0,1"
|
|
bitfld.long 0x0 27. "P27,Set Output Data" "0,1"
|
|
bitfld.long 0x0 26. "P26,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Set Output Data" "0,1"
|
|
bitfld.long 0x0 24. "P24,Set Output Data" "0,1"
|
|
bitfld.long 0x0 23. "P23,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Set Output Data" "0,1"
|
|
bitfld.long 0x0 21. "P21,Set Output Data" "0,1"
|
|
bitfld.long 0x0 20. "P20,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Set Output Data" "0,1"
|
|
bitfld.long 0x0 18. "P18,Set Output Data" "0,1"
|
|
bitfld.long 0x0 17. "P17,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Set Output Data" "0,1"
|
|
bitfld.long 0x0 15. "P15,Set Output Data" "0,1"
|
|
bitfld.long 0x0 14. "P14,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Set Output Data" "0,1"
|
|
bitfld.long 0x0 12. "P12,Set Output Data" "0,1"
|
|
bitfld.long 0x0 11. "P11,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Set Output Data" "0,1"
|
|
bitfld.long 0x0 9. "P9,Set Output Data" "0,1"
|
|
bitfld.long 0x0 8. "P8,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Set Output Data" "0,1"
|
|
bitfld.long 0x0 6. "P6,Set Output Data" "0,1"
|
|
bitfld.long 0x0 5. "P5,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Set Output Data" "0,1"
|
|
bitfld.long 0x0 3. "P3,Set Output Data" "0,1"
|
|
bitfld.long 0x0 2. "P2,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Set Output Data" "0,1"
|
|
bitfld.long 0x0 0. "P0,Set Output Data" "0,1"
|
|
line.long 0x4 "CODR,Clear Output Data Register"
|
|
bitfld.long 0x4 31. "P31,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 30. "P30,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 29. "P29,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 27. "P27,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 26. "P26,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 24. "P24,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 23. "P23,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 21. "P21,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 20. "P20,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 18. "P18,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 17. "P17,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 15. "P15,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 14. "P14,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 12. "P12,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 11. "P11,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 9. "P9,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 8. "P8,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 6. "P6,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 5. "P5,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 3. "P3,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 2. "P2,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 0. "P0,Clear Output Data" "0,1"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "ODSR,Output Data Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Data Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Data Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Data Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Data Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Data Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Data Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Data Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Data Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Data Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Data Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Data Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Data Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Data Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Data Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Data Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Data Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Data Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Data Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Data Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Data Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Data Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Data Status" "0,1"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x0 "PDSR,Pin Data Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Data Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Data Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Data Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Data Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Data Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Data Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Data Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Data Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Data Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Data Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Data Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Data Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Data Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Data Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Data Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Data Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Data Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Data Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Data Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Data Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Data Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Data Status" "0,1"
|
|
wgroup.long 0x40++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 31. "P31,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Change Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 31. "P31,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Change Interrupt Disable" "0,1"
|
|
rgroup.long 0x48++0x7
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 31. "P31,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Change Interrupt Mask" "0,1"
|
|
line.long 0x4 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x4 31. "P31,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 30. "P30,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 29. "P29,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 27. "P27,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 26. "P26,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Change Interrupt Status" "0,1"
|
|
wgroup.long 0x50++0x7
|
|
line.long 0x0 "MDER,Multi-driver Enable Register"
|
|
bitfld.long 0x0 31. "P31,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Multi-drive Enable" "0,1"
|
|
line.long 0x4 "MDDR,Multi-driver Disable Register"
|
|
bitfld.long 0x4 31. "P31,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Multi-drive Disable" "0,1"
|
|
rgroup.long 0x58++0x3
|
|
line.long 0x0 "MDSR,Multi-driver Status Register"
|
|
bitfld.long 0x0 31. "P31,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Multi-drive Status" "0,1"
|
|
wgroup.long 0x60++0x7
|
|
line.long 0x0 "PUDR,Pull-up Disable Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Up Disable" "0,1"
|
|
line.long 0x4 "PUER,Pull-up Enable Register"
|
|
bitfld.long 0x4 31. "P31,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Pull-Up Enable" "0,1"
|
|
rgroup.long 0x68++0x3
|
|
line.long 0x0 "PUSR,Pad Pull-up Status Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Up Status" "0,1"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "ABCDSR[$1],Peripheral ABCD Select Register 0"
|
|
bitfld.long 0x0 31. "P31,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 30. "P30,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 29. "P29,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 27. "P27,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 26. "P26,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 24. "P24,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 23. "P23,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 21. "P21,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 20. "P20,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 18. "P18,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 17. "P17,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 15. "P15,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 14. "P14,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 12. "P12,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 11. "P11,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 9. "P9,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 8. "P8,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 6. "P6,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 5. "P5,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 3. "P3,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 2. "P2,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 0. "P0,Peripheral Select" "0,1"
|
|
repeat.end
|
|
wgroup.long 0x80++0x7
|
|
line.long 0x0 "IFSCDR,Input Filter Slow Clock Disable Register"
|
|
bitfld.long 0x0 31. "P31,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 30. "P30,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 29. "P29,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 27. "P27,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 26. "P26,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 24. "P24,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 23. "P23,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 21. "P21,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 20. "P20,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 18. "P18,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 17. "P17,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 15. "P15,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 14. "P14,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 12. "P12,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 11. "P11,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 9. "P9,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 8. "P8,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 6. "P6,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 5. "P5,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 3. "P3,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 2. "P2,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 0. "P0,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
line.long 0x4 "IFSCER,Input Filter Slow Clock Enable Register"
|
|
bitfld.long 0x4 31. "P31,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 30. "P30,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 29. "P29,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 27. "P27,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 26. "P26,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 24. "P24,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 23. "P23,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 21. "P21,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 20. "P20,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 18. "P18,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 17. "P17,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 15. "P15,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 14. "P14,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 12. "P12,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 11. "P11,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 9. "P9,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 8. "P8,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 6. "P6,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 5. "P5,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 3. "P3,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 2. "P2,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 0. "P0,Slow Clock Debouncing Filtering Select" "0,1"
|
|
rgroup.long 0x88++0x3
|
|
line.long 0x0 "IFSCSR,Input Filter Slow Clock Status Register"
|
|
bitfld.long 0x0 31. "P31,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
group.long 0x8C++0x3
|
|
line.long 0x0 "SCDR,Slow Clock Divider Debouncing Register"
|
|
hexmask.long.word 0x0 0.--13. 1. "DIV,Slow Clock Divider Selection for Debouncing"
|
|
wgroup.long 0x90++0x7
|
|
line.long 0x0 "PPDDR,Pad Pull-down Disable Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Down Disable" "0,1"
|
|
line.long 0x4 "PPDER,Pad Pull-down Enable Register"
|
|
bitfld.long 0x4 31. "P31,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Pull-Down Enable" "0,1"
|
|
rgroup.long 0x98++0x3
|
|
line.long 0x0 "PPDSR,Pad Pull-down Status Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Down Status" "0,1"
|
|
wgroup.long 0xA0++0x7
|
|
line.long 0x0 "OWER,Output Write Enable"
|
|
bitfld.long 0x0 31. "P31,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Write Enable" "0,1"
|
|
line.long 0x4 "OWDR,Output Write Disable"
|
|
bitfld.long 0x4 31. "P31,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Output Write Disable" "0,1"
|
|
rgroup.long 0xA8++0x3
|
|
line.long 0x0 "OWSR,Output Write Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Write Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Write Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Write Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Write Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Write Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Write Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Write Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Write Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Write Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Write Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Write Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Write Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Write Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Write Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Write Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Write Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Write Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Write Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Write Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Write Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Write Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Write Status" "0,1"
|
|
wgroup.long 0xB0++0x7
|
|
line.long 0x0 "AIMER,Additional Interrupt Modes Enable Register"
|
|
bitfld.long 0x0 31. "P31,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Additional Interrupt Modes Enable" "0,1"
|
|
line.long 0x4 "AIMDR,Additional Interrupt Modes Disable Register"
|
|
bitfld.long 0x4 31. "P31,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Additional Interrupt Modes Disable" "0,1"
|
|
rgroup.long 0xB8++0x3
|
|
line.long 0x0 "AIMMR,Additional Interrupt Modes Mask Register"
|
|
bitfld.long 0x0 31. "P31,IO Line Index" "0,1"
|
|
bitfld.long 0x0 30. "P30,IO Line Index" "0,1"
|
|
bitfld.long 0x0 29. "P29,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,IO Line Index" "0,1"
|
|
bitfld.long 0x0 27. "P27,IO Line Index" "0,1"
|
|
bitfld.long 0x0 26. "P26,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,IO Line Index" "0,1"
|
|
bitfld.long 0x0 24. "P24,IO Line Index" "0,1"
|
|
bitfld.long 0x0 23. "P23,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,IO Line Index" "0,1"
|
|
bitfld.long 0x0 21. "P21,IO Line Index" "0,1"
|
|
bitfld.long 0x0 20. "P20,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,IO Line Index" "0,1"
|
|
bitfld.long 0x0 18. "P18,IO Line Index" "0,1"
|
|
bitfld.long 0x0 17. "P17,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,IO Line Index" "0,1"
|
|
bitfld.long 0x0 15. "P15,IO Line Index" "0,1"
|
|
bitfld.long 0x0 14. "P14,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,IO Line Index" "0,1"
|
|
bitfld.long 0x0 12. "P12,IO Line Index" "0,1"
|
|
bitfld.long 0x0 11. "P11,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,IO Line Index" "0,1"
|
|
bitfld.long 0x0 9. "P9,IO Line Index" "0,1"
|
|
bitfld.long 0x0 8. "P8,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,IO Line Index" "0,1"
|
|
bitfld.long 0x0 6. "P6,IO Line Index" "0,1"
|
|
bitfld.long 0x0 5. "P5,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,IO Line Index" "0,1"
|
|
bitfld.long 0x0 3. "P3,IO Line Index" "0,1"
|
|
bitfld.long 0x0 2. "P2,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,IO Line Index" "0,1"
|
|
bitfld.long 0x0 0. "P0,IO Line Index" "0,1"
|
|
wgroup.long 0xC0++0x7
|
|
line.long 0x0 "ESR,Edge Select Register"
|
|
bitfld.long 0x0 31. "P31,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge Interrupt Selection" "0,1"
|
|
line.long 0x4 "LSR,Level Select Register"
|
|
bitfld.long 0x4 31. "P31,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 30. "P30,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 29. "P29,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 27. "P27,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 26. "P26,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 24. "P24,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 23. "P23,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 21. "P21,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 20. "P20,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 18. "P18,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 17. "P17,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 15. "P15,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 14. "P14,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 12. "P12,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 11. "P11,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 9. "P9,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 8. "P8,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 6. "P6,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 5. "P5,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 3. "P3,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 2. "P2,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 0. "P0,Level Interrupt Selection" "0,1"
|
|
rgroup.long 0xC8++0x3
|
|
line.long 0x0 "ELSR,Edge/Level Status Register"
|
|
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0,1"
|
|
wgroup.long 0xD0++0x7
|
|
line.long 0x0 "FELLSR,Falling Edge/Low-Level Select Register"
|
|
bitfld.long 0x0 31. "P31,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
line.long 0x4 "REHLSR,Rising Edge/High-Level Select Register"
|
|
bitfld.long 0x4 31. "P31,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 30. "P30,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 29. "P29,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 27. "P27,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 26. "P26,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 24. "P24,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 23. "P23,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 21. "P21,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 20. "P20,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 18. "P18,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 17. "P17,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 15. "P15,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 14. "P14,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 12. "P12,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 11. "P11,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 9. "P9,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 8. "P8,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 6. "P6,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 5. "P5,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 3. "P3,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 2. "P2,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 0. "P0,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
rgroup.long 0xD8++0x3
|
|
line.long 0x0 "FRLHSR,Fall/Rise - Low/High Status Register"
|
|
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0,1"
|
|
rgroup.long 0xE0++0x3
|
|
line.long 0x0 "LOCKSR,Lock Status"
|
|
bitfld.long 0x0 31. "P31,Lock Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Lock Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Lock Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Lock Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Lock Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Lock Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Lock Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Lock Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Lock Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Lock Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Lock Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Lock Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Lock Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Lock Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Lock Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Lock Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Lock Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Lock Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Lock Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Lock Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Lock Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Lock Status" "0,1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "SCHMITT,Schmitt Trigger Register"
|
|
bitfld.long 0x0 31. "SCHMITT31,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 30. "SCHMITT30,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 29. "SCHMITT29,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "SCHMITT28,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 27. "SCHMITT27,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 26. "SCHMITT26,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "SCHMITT25,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 24. "SCHMITT24,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 23. "SCHMITT23,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "SCHMITT22,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 21. "SCHMITT21,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 20. "SCHMITT20,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "SCHMITT19,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 18. "SCHMITT18,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 17. "SCHMITT17,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "SCHMITT16,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 15. "SCHMITT15,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 14. "SCHMITT14,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "SCHMITT13,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 12. "SCHMITT12,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 11. "SCHMITT11,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "SCHMITT10,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 9. "SCHMITT9,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 8. "SCHMITT8,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SCHMITT7,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 6. "SCHMITT6,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 5. "SCHMITT5,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "SCHMITT4,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 3. "SCHMITT3,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 2. "SCHMITT2,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SCHMITT1,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 0. "SCHMITT0,Schmitt Trigger Control" "0,1"
|
|
group.long 0x118++0x3
|
|
line.long 0x0 "DRIVER,I/O Drive Register"
|
|
bitfld.long 0x0 31. "LINE31,Drive of PIO Line 31" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 30. "LINE30,Drive of PIO Line 30" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 29. "LINE29,Drive of PIO Line 29" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 28. "LINE28,Drive of PIO Line 28" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 27. "LINE27,Drive of PIO Line 27" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 26. "LINE26,Drive of PIO Line 26" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 25. "LINE25,Drive of PIO Line 25" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 24. "LINE24,Drive of PIO Line 24" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 23. "LINE23,Drive of PIO Line 23" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 22. "LINE22,Drive of PIO Line 22" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 21. "LINE21,Drive of PIO Line 21" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 20. "LINE20,Drive of PIO Line 20" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 19. "LINE19,Drive of PIO Line 19" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 18. "LINE18,Drive of PIO Line 18" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 17. "LINE17,Drive of PIO Line 17" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 16. "LINE16,Drive of PIO Line 16" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 15. "LINE15,Drive of PIO Line 15" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 14. "LINE14,Drive of PIO Line 14" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 13. "LINE13,Drive of PIO Line 13" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 12. "LINE12,Drive of PIO Line 12" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 11. "LINE11,Drive of PIO Line 11" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 10. "LINE10,Drive of PIO Line 10" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 9. "LINE9,Drive of PIO Line 9" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 8. "LINE8,Drive of PIO Line 8" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 7. "LINE7,Drive of PIO Line 7" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 6. "LINE6,Drive of PIO Line 6" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 5. "LINE5,Drive of PIO Line 5" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 4. "LINE4,Drive of PIO Line 4" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 3. "LINE3,Drive of PIO Line 3" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 2. "LINE2,Drive of PIO Line 2" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 1. "LINE1,Drive of PIO Line 1" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 0. "LINE0,Drive of PIO Line 0" "0: Lowest drive,1: Highest drive"
|
|
group.long 0x150++0x3
|
|
line.long 0x0 "PCMR,Parallel Capture Mode Register"
|
|
bitfld.long 0x0 11. "FRSTS,Parallel Capture Mode First Sample" "0,1"
|
|
bitfld.long 0x0 10. "HALFS,Parallel Capture Mode Half Sampling" "0,1"
|
|
bitfld.long 0x0 9. "ALWYS,Parallel Capture Mode Always Sampling" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "DSIZE,Parallel Capture Mode Data Size" "0: The reception data in the PIO_PCRHR is a byte..,1: The reception data in the PIO_PCRHR is a..,2: The reception data in the PIO_PCRHR is a word..,?"
|
|
bitfld.long 0x0 0. "PCEN,Parallel Capture Mode Enable" "0,1"
|
|
wgroup.long 0x154++0x7
|
|
line.long 0x0 "PCIER,Parallel Capture Interrupt Enable Register"
|
|
bitfld.long 0x0 3. "RXBUFF,Reception Buffer Full Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "ENDRX,End of Reception Transfer Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Enable" "0,1"
|
|
line.long 0x4 "PCIDR,Parallel Capture Interrupt Disable Register"
|
|
bitfld.long 0x4 3. "RXBUFF,Reception Buffer Full Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "ENDRX,End of Reception Transfer Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Disable" "0,1"
|
|
rgroup.long 0x15C++0xB
|
|
line.long 0x0 "PCIMR,Parallel Capture Interrupt Mask Register"
|
|
bitfld.long 0x0 3. "RXBUFF,Reception Buffer Full Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "ENDRX,End of Reception Transfer Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Mask" "0,1"
|
|
line.long 0x4 "PCISR,Parallel Capture Interrupt Status Register"
|
|
bitfld.long 0x4 1. "OVRE,Parallel Capture Mode Overrun Error" "0,1"
|
|
bitfld.long 0x4 0. "DRDY,Parallel Capture Mode Data Ready" "0,1"
|
|
line.long 0x8 "PCRHR,Parallel Capture Reception Holding Register"
|
|
hexmask.long 0x8 0.--31. 1. "RDATA,Parallel Capture Mode Reception Data"
|
|
tree.end
|
|
sif (cpuis("PIC32CZ2051CA70144"))
|
|
tree "PIOC"
|
|
base ad:0x400E1200
|
|
wgroup.long 0x0++0x7
|
|
line.long 0x0 "PER,PIO Enable Register"
|
|
bitfld.long 0x0 31. "P31,PIO Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,PIO Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,PIO Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,PIO Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,PIO Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,PIO Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,PIO Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,PIO Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,PIO Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,PIO Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,PIO Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,PIO Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,PIO Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,PIO Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,PIO Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,PIO Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,PIO Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,PIO Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,PIO Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,PIO Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,PIO Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,PIO Enable" "0,1"
|
|
line.long 0x4 "PDR,PIO Disable Register"
|
|
bitfld.long 0x4 31. "P31,PIO Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,PIO Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,PIO Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,PIO Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,PIO Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,PIO Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,PIO Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,PIO Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,PIO Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,PIO Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,PIO Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,PIO Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,PIO Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,PIO Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,PIO Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,PIO Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,PIO Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,PIO Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,PIO Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,PIO Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,PIO Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,PIO Disable" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "PSR,PIO Status Register"
|
|
bitfld.long 0x0 31. "P31,PIO Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,PIO Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,PIO Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,PIO Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,PIO Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,PIO Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,PIO Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,PIO Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,PIO Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,PIO Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,PIO Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,PIO Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,PIO Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,PIO Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,PIO Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,PIO Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,PIO Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,PIO Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,PIO Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,PIO Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,PIO Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,PIO Status" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "OER,Output Enable Register"
|
|
bitfld.long 0x0 31. "P31,Output Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Enable" "0,1"
|
|
line.long 0x4 "ODR,Output Disable Register"
|
|
bitfld.long 0x4 31. "P31,Output Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Output Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Output Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Output Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Output Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Output Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Output Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Output Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Output Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Output Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Output Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Output Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Output Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Output Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Output Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Output Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Output Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Output Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Output Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Output Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Output Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Output Disable" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "OSR,Output Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Status" "0,1"
|
|
wgroup.long 0x20++0x7
|
|
line.long 0x0 "IFER,Glitch Input Filter Enable Register"
|
|
bitfld.long 0x0 31. "P31,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Filter Enable" "0,1"
|
|
line.long 0x4 "IFDR,Glitch Input Filter Disable Register"
|
|
bitfld.long 0x4 31. "P31,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Filter Disable" "0,1"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "IFSR,Glitch Input Filter Status Register"
|
|
bitfld.long 0x0 31. "P31,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Filter Status" "0,1"
|
|
wgroup.long 0x30++0x7
|
|
line.long 0x0 "SODR,Set Output Data Register"
|
|
bitfld.long 0x0 31. "P31,Set Output Data" "0,1"
|
|
bitfld.long 0x0 30. "P30,Set Output Data" "0,1"
|
|
bitfld.long 0x0 29. "P29,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Set Output Data" "0,1"
|
|
bitfld.long 0x0 27. "P27,Set Output Data" "0,1"
|
|
bitfld.long 0x0 26. "P26,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Set Output Data" "0,1"
|
|
bitfld.long 0x0 24. "P24,Set Output Data" "0,1"
|
|
bitfld.long 0x0 23. "P23,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Set Output Data" "0,1"
|
|
bitfld.long 0x0 21. "P21,Set Output Data" "0,1"
|
|
bitfld.long 0x0 20. "P20,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Set Output Data" "0,1"
|
|
bitfld.long 0x0 18. "P18,Set Output Data" "0,1"
|
|
bitfld.long 0x0 17. "P17,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Set Output Data" "0,1"
|
|
bitfld.long 0x0 15. "P15,Set Output Data" "0,1"
|
|
bitfld.long 0x0 14. "P14,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Set Output Data" "0,1"
|
|
bitfld.long 0x0 12. "P12,Set Output Data" "0,1"
|
|
bitfld.long 0x0 11. "P11,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Set Output Data" "0,1"
|
|
bitfld.long 0x0 9. "P9,Set Output Data" "0,1"
|
|
bitfld.long 0x0 8. "P8,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Set Output Data" "0,1"
|
|
bitfld.long 0x0 6. "P6,Set Output Data" "0,1"
|
|
bitfld.long 0x0 5. "P5,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Set Output Data" "0,1"
|
|
bitfld.long 0x0 3. "P3,Set Output Data" "0,1"
|
|
bitfld.long 0x0 2. "P2,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Set Output Data" "0,1"
|
|
bitfld.long 0x0 0. "P0,Set Output Data" "0,1"
|
|
line.long 0x4 "CODR,Clear Output Data Register"
|
|
bitfld.long 0x4 31. "P31,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 30. "P30,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 29. "P29,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 27. "P27,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 26. "P26,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 24. "P24,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 23. "P23,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 21. "P21,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 20. "P20,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 18. "P18,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 17. "P17,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 15. "P15,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 14. "P14,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 12. "P12,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 11. "P11,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 9. "P9,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 8. "P8,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 6. "P6,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 5. "P5,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 3. "P3,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 2. "P2,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 0. "P0,Clear Output Data" "0,1"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "ODSR,Output Data Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Data Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Data Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Data Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Data Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Data Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Data Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Data Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Data Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Data Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Data Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Data Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Data Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Data Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Data Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Data Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Data Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Data Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Data Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Data Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Data Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Data Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Data Status" "0,1"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x0 "PDSR,Pin Data Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Data Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Data Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Data Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Data Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Data Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Data Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Data Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Data Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Data Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Data Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Data Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Data Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Data Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Data Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Data Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Data Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Data Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Data Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Data Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Data Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Data Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Data Status" "0,1"
|
|
wgroup.long 0x40++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 31. "P31,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Change Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 31. "P31,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Change Interrupt Disable" "0,1"
|
|
rgroup.long 0x48++0x7
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 31. "P31,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Change Interrupt Mask" "0,1"
|
|
line.long 0x4 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x4 31. "P31,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 30. "P30,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 29. "P29,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 27. "P27,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 26. "P26,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Change Interrupt Status" "0,1"
|
|
wgroup.long 0x50++0x7
|
|
line.long 0x0 "MDER,Multi-driver Enable Register"
|
|
bitfld.long 0x0 31. "P31,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Multi-drive Enable" "0,1"
|
|
line.long 0x4 "MDDR,Multi-driver Disable Register"
|
|
bitfld.long 0x4 31. "P31,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Multi-drive Disable" "0,1"
|
|
rgroup.long 0x58++0x3
|
|
line.long 0x0 "MDSR,Multi-driver Status Register"
|
|
bitfld.long 0x0 31. "P31,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Multi-drive Status" "0,1"
|
|
wgroup.long 0x60++0x7
|
|
line.long 0x0 "PUDR,Pull-up Disable Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Up Disable" "0,1"
|
|
line.long 0x4 "PUER,Pull-up Enable Register"
|
|
bitfld.long 0x4 31. "P31,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Pull-Up Enable" "0,1"
|
|
rgroup.long 0x68++0x3
|
|
line.long 0x0 "PUSR,Pad Pull-up Status Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Up Status" "0,1"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "ABCDSR[$1],Peripheral ABCD Select Register 0"
|
|
bitfld.long 0x0 31. "P31,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 30. "P30,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 29. "P29,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 27. "P27,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 26. "P26,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 24. "P24,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 23. "P23,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 21. "P21,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 20. "P20,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 18. "P18,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 17. "P17,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 15. "P15,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 14. "P14,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 12. "P12,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 11. "P11,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 9. "P9,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 8. "P8,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 6. "P6,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 5. "P5,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 3. "P3,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 2. "P2,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 0. "P0,Peripheral Select" "0,1"
|
|
repeat.end
|
|
wgroup.long 0x80++0x7
|
|
line.long 0x0 "IFSCDR,Input Filter Slow Clock Disable Register"
|
|
bitfld.long 0x0 31. "P31,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 30. "P30,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 29. "P29,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 27. "P27,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 26. "P26,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 24. "P24,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 23. "P23,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 21. "P21,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 20. "P20,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 18. "P18,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 17. "P17,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 15. "P15,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 14. "P14,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 12. "P12,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 11. "P11,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 9. "P9,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 8. "P8,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 6. "P6,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 5. "P5,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 3. "P3,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 2. "P2,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 0. "P0,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
line.long 0x4 "IFSCER,Input Filter Slow Clock Enable Register"
|
|
bitfld.long 0x4 31. "P31,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 30. "P30,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 29. "P29,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 27. "P27,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 26. "P26,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 24. "P24,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 23. "P23,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 21. "P21,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 20. "P20,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 18. "P18,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 17. "P17,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 15. "P15,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 14. "P14,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 12. "P12,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 11. "P11,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 9. "P9,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 8. "P8,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 6. "P6,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 5. "P5,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 3. "P3,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 2. "P2,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 0. "P0,Slow Clock Debouncing Filtering Select" "0,1"
|
|
rgroup.long 0x88++0x3
|
|
line.long 0x0 "IFSCSR,Input Filter Slow Clock Status Register"
|
|
bitfld.long 0x0 31. "P31,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
group.long 0x8C++0x3
|
|
line.long 0x0 "SCDR,Slow Clock Divider Debouncing Register"
|
|
hexmask.long.word 0x0 0.--13. 1. "DIV,Slow Clock Divider Selection for Debouncing"
|
|
wgroup.long 0x90++0x7
|
|
line.long 0x0 "PPDDR,Pad Pull-down Disable Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Down Disable" "0,1"
|
|
line.long 0x4 "PPDER,Pad Pull-down Enable Register"
|
|
bitfld.long 0x4 31. "P31,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Pull-Down Enable" "0,1"
|
|
rgroup.long 0x98++0x3
|
|
line.long 0x0 "PPDSR,Pad Pull-down Status Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Down Status" "0,1"
|
|
wgroup.long 0xA0++0x7
|
|
line.long 0x0 "OWER,Output Write Enable"
|
|
bitfld.long 0x0 31. "P31,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Write Enable" "0,1"
|
|
line.long 0x4 "OWDR,Output Write Disable"
|
|
bitfld.long 0x4 31. "P31,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Output Write Disable" "0,1"
|
|
rgroup.long 0xA8++0x3
|
|
line.long 0x0 "OWSR,Output Write Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Write Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Write Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Write Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Write Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Write Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Write Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Write Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Write Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Write Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Write Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Write Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Write Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Write Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Write Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Write Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Write Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Write Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Write Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Write Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Write Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Write Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Write Status" "0,1"
|
|
wgroup.long 0xB0++0x7
|
|
line.long 0x0 "AIMER,Additional Interrupt Modes Enable Register"
|
|
bitfld.long 0x0 31. "P31,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Additional Interrupt Modes Enable" "0,1"
|
|
line.long 0x4 "AIMDR,Additional Interrupt Modes Disable Register"
|
|
bitfld.long 0x4 31. "P31,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Additional Interrupt Modes Disable" "0,1"
|
|
rgroup.long 0xB8++0x3
|
|
line.long 0x0 "AIMMR,Additional Interrupt Modes Mask Register"
|
|
bitfld.long 0x0 31. "P31,IO Line Index" "0,1"
|
|
bitfld.long 0x0 30. "P30,IO Line Index" "0,1"
|
|
bitfld.long 0x0 29. "P29,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,IO Line Index" "0,1"
|
|
bitfld.long 0x0 27. "P27,IO Line Index" "0,1"
|
|
bitfld.long 0x0 26. "P26,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,IO Line Index" "0,1"
|
|
bitfld.long 0x0 24. "P24,IO Line Index" "0,1"
|
|
bitfld.long 0x0 23. "P23,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,IO Line Index" "0,1"
|
|
bitfld.long 0x0 21. "P21,IO Line Index" "0,1"
|
|
bitfld.long 0x0 20. "P20,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,IO Line Index" "0,1"
|
|
bitfld.long 0x0 18. "P18,IO Line Index" "0,1"
|
|
bitfld.long 0x0 17. "P17,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,IO Line Index" "0,1"
|
|
bitfld.long 0x0 15. "P15,IO Line Index" "0,1"
|
|
bitfld.long 0x0 14. "P14,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,IO Line Index" "0,1"
|
|
bitfld.long 0x0 12. "P12,IO Line Index" "0,1"
|
|
bitfld.long 0x0 11. "P11,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,IO Line Index" "0,1"
|
|
bitfld.long 0x0 9. "P9,IO Line Index" "0,1"
|
|
bitfld.long 0x0 8. "P8,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,IO Line Index" "0,1"
|
|
bitfld.long 0x0 6. "P6,IO Line Index" "0,1"
|
|
bitfld.long 0x0 5. "P5,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,IO Line Index" "0,1"
|
|
bitfld.long 0x0 3. "P3,IO Line Index" "0,1"
|
|
bitfld.long 0x0 2. "P2,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,IO Line Index" "0,1"
|
|
bitfld.long 0x0 0. "P0,IO Line Index" "0,1"
|
|
wgroup.long 0xC0++0x7
|
|
line.long 0x0 "ESR,Edge Select Register"
|
|
bitfld.long 0x0 31. "P31,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge Interrupt Selection" "0,1"
|
|
line.long 0x4 "LSR,Level Select Register"
|
|
bitfld.long 0x4 31. "P31,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 30. "P30,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 29. "P29,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 27. "P27,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 26. "P26,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 24. "P24,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 23. "P23,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 21. "P21,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 20. "P20,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 18. "P18,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 17. "P17,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 15. "P15,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 14. "P14,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 12. "P12,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 11. "P11,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 9. "P9,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 8. "P8,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 6. "P6,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 5. "P5,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 3. "P3,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 2. "P2,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 0. "P0,Level Interrupt Selection" "0,1"
|
|
rgroup.long 0xC8++0x3
|
|
line.long 0x0 "ELSR,Edge/Level Status Register"
|
|
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0,1"
|
|
wgroup.long 0xD0++0x7
|
|
line.long 0x0 "FELLSR,Falling Edge/Low-Level Select Register"
|
|
bitfld.long 0x0 31. "P31,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
line.long 0x4 "REHLSR,Rising Edge/High-Level Select Register"
|
|
bitfld.long 0x4 31. "P31,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 30. "P30,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 29. "P29,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 27. "P27,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 26. "P26,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 24. "P24,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 23. "P23,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 21. "P21,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 20. "P20,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 18. "P18,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 17. "P17,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 15. "P15,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 14. "P14,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 12. "P12,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 11. "P11,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 9. "P9,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 8. "P8,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 6. "P6,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 5. "P5,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 3. "P3,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 2. "P2,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 0. "P0,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
rgroup.long 0xD8++0x3
|
|
line.long 0x0 "FRLHSR,Fall/Rise - Low/High Status Register"
|
|
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0,1"
|
|
rgroup.long 0xE0++0x3
|
|
line.long 0x0 "LOCKSR,Lock Status"
|
|
bitfld.long 0x0 31. "P31,Lock Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Lock Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Lock Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Lock Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Lock Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Lock Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Lock Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Lock Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Lock Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Lock Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Lock Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Lock Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Lock Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Lock Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Lock Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Lock Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Lock Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Lock Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Lock Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Lock Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Lock Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Lock Status" "0,1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "SCHMITT,Schmitt Trigger Register"
|
|
bitfld.long 0x0 31. "SCHMITT31,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 30. "SCHMITT30,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 29. "SCHMITT29,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "SCHMITT28,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 27. "SCHMITT27,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 26. "SCHMITT26,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "SCHMITT25,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 24. "SCHMITT24,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 23. "SCHMITT23,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "SCHMITT22,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 21. "SCHMITT21,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 20. "SCHMITT20,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "SCHMITT19,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 18. "SCHMITT18,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 17. "SCHMITT17,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "SCHMITT16,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 15. "SCHMITT15,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 14. "SCHMITT14,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "SCHMITT13,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 12. "SCHMITT12,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 11. "SCHMITT11,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "SCHMITT10,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 9. "SCHMITT9,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 8. "SCHMITT8,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SCHMITT7,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 6. "SCHMITT6,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 5. "SCHMITT5,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "SCHMITT4,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 3. "SCHMITT3,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 2. "SCHMITT2,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SCHMITT1,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 0. "SCHMITT0,Schmitt Trigger Control" "0,1"
|
|
group.long 0x118++0x3
|
|
line.long 0x0 "DRIVER,I/O Drive Register"
|
|
bitfld.long 0x0 31. "LINE31,Drive of PIO Line 31" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 30. "LINE30,Drive of PIO Line 30" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 29. "LINE29,Drive of PIO Line 29" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 28. "LINE28,Drive of PIO Line 28" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 27. "LINE27,Drive of PIO Line 27" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 26. "LINE26,Drive of PIO Line 26" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 25. "LINE25,Drive of PIO Line 25" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 24. "LINE24,Drive of PIO Line 24" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 23. "LINE23,Drive of PIO Line 23" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 22. "LINE22,Drive of PIO Line 22" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 21. "LINE21,Drive of PIO Line 21" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 20. "LINE20,Drive of PIO Line 20" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 19. "LINE19,Drive of PIO Line 19" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 18. "LINE18,Drive of PIO Line 18" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 17. "LINE17,Drive of PIO Line 17" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 16. "LINE16,Drive of PIO Line 16" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 15. "LINE15,Drive of PIO Line 15" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 14. "LINE14,Drive of PIO Line 14" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 13. "LINE13,Drive of PIO Line 13" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 12. "LINE12,Drive of PIO Line 12" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 11. "LINE11,Drive of PIO Line 11" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 10. "LINE10,Drive of PIO Line 10" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 9. "LINE9,Drive of PIO Line 9" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 8. "LINE8,Drive of PIO Line 8" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 7. "LINE7,Drive of PIO Line 7" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 6. "LINE6,Drive of PIO Line 6" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 5. "LINE5,Drive of PIO Line 5" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 4. "LINE4,Drive of PIO Line 4" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 3. "LINE3,Drive of PIO Line 3" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 2. "LINE2,Drive of PIO Line 2" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 1. "LINE1,Drive of PIO Line 1" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 0. "LINE0,Drive of PIO Line 0" "0: Lowest drive,1: Highest drive"
|
|
group.long 0x150++0x3
|
|
line.long 0x0 "PCMR,Parallel Capture Mode Register"
|
|
bitfld.long 0x0 11. "FRSTS,Parallel Capture Mode First Sample" "0,1"
|
|
bitfld.long 0x0 10. "HALFS,Parallel Capture Mode Half Sampling" "0,1"
|
|
bitfld.long 0x0 9. "ALWYS,Parallel Capture Mode Always Sampling" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "DSIZE,Parallel Capture Mode Data Size" "0: The reception data in the PIO_PCRHR is a byte..,1: The reception data in the PIO_PCRHR is a..,2: The reception data in the PIO_PCRHR is a word..,?"
|
|
bitfld.long 0x0 0. "PCEN,Parallel Capture Mode Enable" "0,1"
|
|
wgroup.long 0x154++0x7
|
|
line.long 0x0 "PCIER,Parallel Capture Interrupt Enable Register"
|
|
bitfld.long 0x0 3. "RXBUFF,Reception Buffer Full Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "ENDRX,End of Reception Transfer Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Enable" "0,1"
|
|
line.long 0x4 "PCIDR,Parallel Capture Interrupt Disable Register"
|
|
bitfld.long 0x4 3. "RXBUFF,Reception Buffer Full Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "ENDRX,End of Reception Transfer Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Disable" "0,1"
|
|
rgroup.long 0x15C++0xB
|
|
line.long 0x0 "PCIMR,Parallel Capture Interrupt Mask Register"
|
|
bitfld.long 0x0 3. "RXBUFF,Reception Buffer Full Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "ENDRX,End of Reception Transfer Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Mask" "0,1"
|
|
line.long 0x4 "PCISR,Parallel Capture Interrupt Status Register"
|
|
bitfld.long 0x4 1. "OVRE,Parallel Capture Mode Overrun Error" "0,1"
|
|
bitfld.long 0x4 0. "DRDY,Parallel Capture Mode Data Ready" "0,1"
|
|
line.long 0x8 "PCRHR,Parallel Capture Reception Holding Register"
|
|
hexmask.long 0x8 0.--31. 1. "RDATA,Parallel Capture Mode Reception Data"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("PIC32CZ2051MC70064"))
|
|
tree "PIOC"
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base ad:0x400E1200
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wgroup.long 0x0++0x7
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line.long 0x0 "PER,PIO Enable Register"
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bitfld.long 0x0 31. "P31,PIO Enable" "0,1"
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bitfld.long 0x0 30. "P30,PIO Enable" "0,1"
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bitfld.long 0x0 29. "P29,PIO Enable" "0,1"
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newline
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bitfld.long 0x0 28. "P28,PIO Enable" "0,1"
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bitfld.long 0x0 27. "P27,PIO Enable" "0,1"
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bitfld.long 0x0 26. "P26,PIO Enable" "0,1"
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newline
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bitfld.long 0x0 25. "P25,PIO Enable" "0,1"
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bitfld.long 0x0 24. "P24,PIO Enable" "0,1"
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bitfld.long 0x0 23. "P23,PIO Enable" "0,1"
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newline
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bitfld.long 0x0 22. "P22,PIO Enable" "0,1"
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bitfld.long 0x0 21. "P21,PIO Enable" "0,1"
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bitfld.long 0x0 20. "P20,PIO Enable" "0,1"
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newline
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bitfld.long 0x0 19. "P19,PIO Enable" "0,1"
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bitfld.long 0x0 18. "P18,PIO Enable" "0,1"
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bitfld.long 0x0 17. "P17,PIO Enable" "0,1"
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newline
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bitfld.long 0x0 16. "P16,PIO Enable" "0,1"
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bitfld.long 0x0 15. "P15,PIO Enable" "0,1"
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bitfld.long 0x0 14. "P14,PIO Enable" "0,1"
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newline
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bitfld.long 0x0 13. "P13,PIO Enable" "0,1"
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bitfld.long 0x0 12. "P12,PIO Enable" "0,1"
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bitfld.long 0x0 11. "P11,PIO Enable" "0,1"
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newline
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bitfld.long 0x0 10. "P10,PIO Enable" "0,1"
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bitfld.long 0x0 9. "P9,PIO Enable" "0,1"
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bitfld.long 0x0 8. "P8,PIO Enable" "0,1"
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newline
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bitfld.long 0x0 7. "P7,PIO Enable" "0,1"
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bitfld.long 0x0 6. "P6,PIO Enable" "0,1"
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bitfld.long 0x0 5. "P5,PIO Enable" "0,1"
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newline
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bitfld.long 0x0 4. "P4,PIO Enable" "0,1"
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bitfld.long 0x0 3. "P3,PIO Enable" "0,1"
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bitfld.long 0x0 2. "P2,PIO Enable" "0,1"
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newline
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bitfld.long 0x0 1. "P1,PIO Enable" "0,1"
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bitfld.long 0x0 0. "P0,PIO Enable" "0,1"
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line.long 0x4 "PDR,PIO Disable Register"
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bitfld.long 0x4 31. "P31,PIO Disable" "0,1"
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bitfld.long 0x4 30. "P30,PIO Disable" "0,1"
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bitfld.long 0x4 29. "P29,PIO Disable" "0,1"
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newline
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bitfld.long 0x4 28. "P28,PIO Disable" "0,1"
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bitfld.long 0x4 27. "P27,PIO Disable" "0,1"
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bitfld.long 0x4 26. "P26,PIO Disable" "0,1"
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newline
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bitfld.long 0x4 25. "P25,PIO Disable" "0,1"
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bitfld.long 0x4 24. "P24,PIO Disable" "0,1"
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bitfld.long 0x4 23. "P23,PIO Disable" "0,1"
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newline
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bitfld.long 0x4 22. "P22,PIO Disable" "0,1"
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bitfld.long 0x4 21. "P21,PIO Disable" "0,1"
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bitfld.long 0x4 20. "P20,PIO Disable" "0,1"
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newline
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bitfld.long 0x4 19. "P19,PIO Disable" "0,1"
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bitfld.long 0x4 18. "P18,PIO Disable" "0,1"
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bitfld.long 0x4 17. "P17,PIO Disable" "0,1"
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newline
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bitfld.long 0x4 16. "P16,PIO Disable" "0,1"
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bitfld.long 0x4 15. "P15,PIO Disable" "0,1"
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bitfld.long 0x4 14. "P14,PIO Disable" "0,1"
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newline
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bitfld.long 0x4 13. "P13,PIO Disable" "0,1"
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bitfld.long 0x4 12. "P12,PIO Disable" "0,1"
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bitfld.long 0x4 11. "P11,PIO Disable" "0,1"
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newline
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bitfld.long 0x4 10. "P10,PIO Disable" "0,1"
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bitfld.long 0x4 9. "P9,PIO Disable" "0,1"
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bitfld.long 0x4 8. "P8,PIO Disable" "0,1"
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newline
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bitfld.long 0x4 7. "P7,PIO Disable" "0,1"
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bitfld.long 0x4 6. "P6,PIO Disable" "0,1"
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bitfld.long 0x4 5. "P5,PIO Disable" "0,1"
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newline
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bitfld.long 0x4 4. "P4,PIO Disable" "0,1"
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bitfld.long 0x4 3. "P3,PIO Disable" "0,1"
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bitfld.long 0x4 2. "P2,PIO Disable" "0,1"
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newline
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bitfld.long 0x4 1. "P1,PIO Disable" "0,1"
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bitfld.long 0x4 0. "P0,PIO Disable" "0,1"
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rgroup.long 0x8++0x3
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line.long 0x0 "PSR,PIO Status Register"
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bitfld.long 0x0 31. "P31,PIO Status" "0,1"
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bitfld.long 0x0 30. "P30,PIO Status" "0,1"
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bitfld.long 0x0 29. "P29,PIO Status" "0,1"
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newline
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bitfld.long 0x0 28. "P28,PIO Status" "0,1"
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bitfld.long 0x0 27. "P27,PIO Status" "0,1"
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bitfld.long 0x0 26. "P26,PIO Status" "0,1"
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newline
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bitfld.long 0x0 25. "P25,PIO Status" "0,1"
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bitfld.long 0x0 24. "P24,PIO Status" "0,1"
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bitfld.long 0x0 23. "P23,PIO Status" "0,1"
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newline
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bitfld.long 0x0 22. "P22,PIO Status" "0,1"
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bitfld.long 0x0 21. "P21,PIO Status" "0,1"
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bitfld.long 0x0 20. "P20,PIO Status" "0,1"
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newline
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bitfld.long 0x0 19. "P19,PIO Status" "0,1"
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bitfld.long 0x0 18. "P18,PIO Status" "0,1"
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bitfld.long 0x0 17. "P17,PIO Status" "0,1"
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newline
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bitfld.long 0x0 16. "P16,PIO Status" "0,1"
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bitfld.long 0x0 15. "P15,PIO Status" "0,1"
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bitfld.long 0x0 14. "P14,PIO Status" "0,1"
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newline
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bitfld.long 0x0 13. "P13,PIO Status" "0,1"
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bitfld.long 0x0 12. "P12,PIO Status" "0,1"
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bitfld.long 0x0 11. "P11,PIO Status" "0,1"
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newline
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bitfld.long 0x0 10. "P10,PIO Status" "0,1"
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bitfld.long 0x0 9. "P9,PIO Status" "0,1"
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bitfld.long 0x0 8. "P8,PIO Status" "0,1"
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newline
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bitfld.long 0x0 7. "P7,PIO Status" "0,1"
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bitfld.long 0x0 6. "P6,PIO Status" "0,1"
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bitfld.long 0x0 5. "P5,PIO Status" "0,1"
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newline
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bitfld.long 0x0 4. "P4,PIO Status" "0,1"
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bitfld.long 0x0 3. "P3,PIO Status" "0,1"
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bitfld.long 0x0 2. "P2,PIO Status" "0,1"
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newline
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bitfld.long 0x0 1. "P1,PIO Status" "0,1"
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bitfld.long 0x0 0. "P0,PIO Status" "0,1"
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wgroup.long 0x10++0x7
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line.long 0x0 "OER,Output Enable Register"
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bitfld.long 0x0 31. "P31,Output Enable" "0,1"
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bitfld.long 0x0 30. "P30,Output Enable" "0,1"
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bitfld.long 0x0 29. "P29,Output Enable" "0,1"
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newline
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bitfld.long 0x0 28. "P28,Output Enable" "0,1"
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bitfld.long 0x0 27. "P27,Output Enable" "0,1"
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bitfld.long 0x0 26. "P26,Output Enable" "0,1"
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newline
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bitfld.long 0x0 25. "P25,Output Enable" "0,1"
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bitfld.long 0x0 24. "P24,Output Enable" "0,1"
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bitfld.long 0x0 23. "P23,Output Enable" "0,1"
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newline
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bitfld.long 0x0 22. "P22,Output Enable" "0,1"
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bitfld.long 0x0 21. "P21,Output Enable" "0,1"
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bitfld.long 0x0 20. "P20,Output Enable" "0,1"
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newline
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bitfld.long 0x0 19. "P19,Output Enable" "0,1"
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bitfld.long 0x0 18. "P18,Output Enable" "0,1"
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bitfld.long 0x0 17. "P17,Output Enable" "0,1"
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newline
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bitfld.long 0x0 16. "P16,Output Enable" "0,1"
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bitfld.long 0x0 15. "P15,Output Enable" "0,1"
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bitfld.long 0x0 14. "P14,Output Enable" "0,1"
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newline
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bitfld.long 0x0 13. "P13,Output Enable" "0,1"
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bitfld.long 0x0 12. "P12,Output Enable" "0,1"
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bitfld.long 0x0 11. "P11,Output Enable" "0,1"
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newline
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bitfld.long 0x0 10. "P10,Output Enable" "0,1"
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bitfld.long 0x0 9. "P9,Output Enable" "0,1"
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bitfld.long 0x0 8. "P8,Output Enable" "0,1"
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newline
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bitfld.long 0x0 7. "P7,Output Enable" "0,1"
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bitfld.long 0x0 6. "P6,Output Enable" "0,1"
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bitfld.long 0x0 5. "P5,Output Enable" "0,1"
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newline
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bitfld.long 0x0 4. "P4,Output Enable" "0,1"
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bitfld.long 0x0 3. "P3,Output Enable" "0,1"
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bitfld.long 0x0 2. "P2,Output Enable" "0,1"
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newline
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bitfld.long 0x0 1. "P1,Output Enable" "0,1"
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bitfld.long 0x0 0. "P0,Output Enable" "0,1"
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line.long 0x4 "ODR,Output Disable Register"
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bitfld.long 0x4 31. "P31,Output Disable" "0,1"
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bitfld.long 0x4 30. "P30,Output Disable" "0,1"
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bitfld.long 0x4 29. "P29,Output Disable" "0,1"
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newline
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bitfld.long 0x4 28. "P28,Output Disable" "0,1"
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bitfld.long 0x4 27. "P27,Output Disable" "0,1"
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bitfld.long 0x4 26. "P26,Output Disable" "0,1"
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newline
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bitfld.long 0x4 25. "P25,Output Disable" "0,1"
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bitfld.long 0x4 24. "P24,Output Disable" "0,1"
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bitfld.long 0x4 23. "P23,Output Disable" "0,1"
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newline
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bitfld.long 0x4 22. "P22,Output Disable" "0,1"
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bitfld.long 0x4 21. "P21,Output Disable" "0,1"
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bitfld.long 0x4 20. "P20,Output Disable" "0,1"
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newline
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bitfld.long 0x4 19. "P19,Output Disable" "0,1"
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bitfld.long 0x4 18. "P18,Output Disable" "0,1"
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bitfld.long 0x4 17. "P17,Output Disable" "0,1"
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newline
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bitfld.long 0x4 16. "P16,Output Disable" "0,1"
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bitfld.long 0x4 15. "P15,Output Disable" "0,1"
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bitfld.long 0x4 14. "P14,Output Disable" "0,1"
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newline
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bitfld.long 0x4 13. "P13,Output Disable" "0,1"
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bitfld.long 0x4 12. "P12,Output Disable" "0,1"
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bitfld.long 0x4 11. "P11,Output Disable" "0,1"
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newline
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bitfld.long 0x4 10. "P10,Output Disable" "0,1"
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bitfld.long 0x4 9. "P9,Output Disable" "0,1"
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bitfld.long 0x4 8. "P8,Output Disable" "0,1"
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newline
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bitfld.long 0x4 7. "P7,Output Disable" "0,1"
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bitfld.long 0x4 6. "P6,Output Disable" "0,1"
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bitfld.long 0x4 5. "P5,Output Disable" "0,1"
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newline
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bitfld.long 0x4 4. "P4,Output Disable" "0,1"
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bitfld.long 0x4 3. "P3,Output Disable" "0,1"
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bitfld.long 0x4 2. "P2,Output Disable" "0,1"
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newline
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bitfld.long 0x4 1. "P1,Output Disable" "0,1"
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bitfld.long 0x4 0. "P0,Output Disable" "0,1"
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rgroup.long 0x18++0x3
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line.long 0x0 "OSR,Output Status Register"
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bitfld.long 0x0 31. "P31,Output Status" "0,1"
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bitfld.long 0x0 30. "P30,Output Status" "0,1"
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bitfld.long 0x0 29. "P29,Output Status" "0,1"
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newline
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bitfld.long 0x0 28. "P28,Output Status" "0,1"
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bitfld.long 0x0 27. "P27,Output Status" "0,1"
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bitfld.long 0x0 26. "P26,Output Status" "0,1"
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newline
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bitfld.long 0x0 25. "P25,Output Status" "0,1"
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bitfld.long 0x0 24. "P24,Output Status" "0,1"
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bitfld.long 0x0 23. "P23,Output Status" "0,1"
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newline
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bitfld.long 0x0 22. "P22,Output Status" "0,1"
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bitfld.long 0x0 21. "P21,Output Status" "0,1"
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bitfld.long 0x0 20. "P20,Output Status" "0,1"
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newline
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bitfld.long 0x0 19. "P19,Output Status" "0,1"
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bitfld.long 0x0 18. "P18,Output Status" "0,1"
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bitfld.long 0x0 17. "P17,Output Status" "0,1"
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newline
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bitfld.long 0x0 16. "P16,Output Status" "0,1"
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bitfld.long 0x0 15. "P15,Output Status" "0,1"
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bitfld.long 0x0 14. "P14,Output Status" "0,1"
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newline
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bitfld.long 0x0 13. "P13,Output Status" "0,1"
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bitfld.long 0x0 12. "P12,Output Status" "0,1"
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bitfld.long 0x0 11. "P11,Output Status" "0,1"
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newline
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bitfld.long 0x0 10. "P10,Output Status" "0,1"
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bitfld.long 0x0 9. "P9,Output Status" "0,1"
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bitfld.long 0x0 8. "P8,Output Status" "0,1"
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newline
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bitfld.long 0x0 7. "P7,Output Status" "0,1"
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bitfld.long 0x0 6. "P6,Output Status" "0,1"
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bitfld.long 0x0 5. "P5,Output Status" "0,1"
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newline
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bitfld.long 0x0 4. "P4,Output Status" "0,1"
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bitfld.long 0x0 3. "P3,Output Status" "0,1"
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bitfld.long 0x0 2. "P2,Output Status" "0,1"
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newline
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bitfld.long 0x0 1. "P1,Output Status" "0,1"
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bitfld.long 0x0 0. "P0,Output Status" "0,1"
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wgroup.long 0x20++0x7
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line.long 0x0 "IFER,Glitch Input Filter Enable Register"
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bitfld.long 0x0 31. "P31,Input Filter Enable" "0,1"
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bitfld.long 0x0 30. "P30,Input Filter Enable" "0,1"
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bitfld.long 0x0 29. "P29,Input Filter Enable" "0,1"
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newline
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bitfld.long 0x0 28. "P28,Input Filter Enable" "0,1"
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bitfld.long 0x0 27. "P27,Input Filter Enable" "0,1"
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bitfld.long 0x0 26. "P26,Input Filter Enable" "0,1"
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newline
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bitfld.long 0x0 25. "P25,Input Filter Enable" "0,1"
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bitfld.long 0x0 24. "P24,Input Filter Enable" "0,1"
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bitfld.long 0x0 23. "P23,Input Filter Enable" "0,1"
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newline
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bitfld.long 0x0 22. "P22,Input Filter Enable" "0,1"
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bitfld.long 0x0 21. "P21,Input Filter Enable" "0,1"
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bitfld.long 0x0 20. "P20,Input Filter Enable" "0,1"
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newline
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bitfld.long 0x0 19. "P19,Input Filter Enable" "0,1"
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bitfld.long 0x0 18. "P18,Input Filter Enable" "0,1"
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bitfld.long 0x0 17. "P17,Input Filter Enable" "0,1"
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newline
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bitfld.long 0x0 16. "P16,Input Filter Enable" "0,1"
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bitfld.long 0x0 15. "P15,Input Filter Enable" "0,1"
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bitfld.long 0x0 14. "P14,Input Filter Enable" "0,1"
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newline
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bitfld.long 0x0 13. "P13,Input Filter Enable" "0,1"
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bitfld.long 0x0 12. "P12,Input Filter Enable" "0,1"
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bitfld.long 0x0 11. "P11,Input Filter Enable" "0,1"
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newline
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bitfld.long 0x0 10. "P10,Input Filter Enable" "0,1"
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bitfld.long 0x0 9. "P9,Input Filter Enable" "0,1"
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bitfld.long 0x0 8. "P8,Input Filter Enable" "0,1"
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newline
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bitfld.long 0x0 7. "P7,Input Filter Enable" "0,1"
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bitfld.long 0x0 6. "P6,Input Filter Enable" "0,1"
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bitfld.long 0x0 5. "P5,Input Filter Enable" "0,1"
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newline
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bitfld.long 0x0 4. "P4,Input Filter Enable" "0,1"
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bitfld.long 0x0 3. "P3,Input Filter Enable" "0,1"
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bitfld.long 0x0 2. "P2,Input Filter Enable" "0,1"
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newline
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bitfld.long 0x0 1. "P1,Input Filter Enable" "0,1"
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bitfld.long 0x0 0. "P0,Input Filter Enable" "0,1"
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line.long 0x4 "IFDR,Glitch Input Filter Disable Register"
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bitfld.long 0x4 31. "P31,Input Filter Disable" "0,1"
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bitfld.long 0x4 30. "P30,Input Filter Disable" "0,1"
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bitfld.long 0x4 29. "P29,Input Filter Disable" "0,1"
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newline
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bitfld.long 0x4 28. "P28,Input Filter Disable" "0,1"
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bitfld.long 0x4 27. "P27,Input Filter Disable" "0,1"
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bitfld.long 0x4 26. "P26,Input Filter Disable" "0,1"
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newline
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bitfld.long 0x4 25. "P25,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Filter Disable" "0,1"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "IFSR,Glitch Input Filter Status Register"
|
|
bitfld.long 0x0 31. "P31,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Filter Status" "0,1"
|
|
wgroup.long 0x30++0x7
|
|
line.long 0x0 "SODR,Set Output Data Register"
|
|
bitfld.long 0x0 31. "P31,Set Output Data" "0,1"
|
|
bitfld.long 0x0 30. "P30,Set Output Data" "0,1"
|
|
bitfld.long 0x0 29. "P29,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Set Output Data" "0,1"
|
|
bitfld.long 0x0 27. "P27,Set Output Data" "0,1"
|
|
bitfld.long 0x0 26. "P26,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Set Output Data" "0,1"
|
|
bitfld.long 0x0 24. "P24,Set Output Data" "0,1"
|
|
bitfld.long 0x0 23. "P23,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Set Output Data" "0,1"
|
|
bitfld.long 0x0 21. "P21,Set Output Data" "0,1"
|
|
bitfld.long 0x0 20. "P20,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Set Output Data" "0,1"
|
|
bitfld.long 0x0 18. "P18,Set Output Data" "0,1"
|
|
bitfld.long 0x0 17. "P17,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Set Output Data" "0,1"
|
|
bitfld.long 0x0 15. "P15,Set Output Data" "0,1"
|
|
bitfld.long 0x0 14. "P14,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Set Output Data" "0,1"
|
|
bitfld.long 0x0 12. "P12,Set Output Data" "0,1"
|
|
bitfld.long 0x0 11. "P11,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Set Output Data" "0,1"
|
|
bitfld.long 0x0 9. "P9,Set Output Data" "0,1"
|
|
bitfld.long 0x0 8. "P8,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Set Output Data" "0,1"
|
|
bitfld.long 0x0 6. "P6,Set Output Data" "0,1"
|
|
bitfld.long 0x0 5. "P5,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Set Output Data" "0,1"
|
|
bitfld.long 0x0 3. "P3,Set Output Data" "0,1"
|
|
bitfld.long 0x0 2. "P2,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Set Output Data" "0,1"
|
|
bitfld.long 0x0 0. "P0,Set Output Data" "0,1"
|
|
line.long 0x4 "CODR,Clear Output Data Register"
|
|
bitfld.long 0x4 31. "P31,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 30. "P30,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 29. "P29,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 27. "P27,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 26. "P26,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 24. "P24,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 23. "P23,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 21. "P21,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 20. "P20,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 18. "P18,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 17. "P17,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 15. "P15,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 14. "P14,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 12. "P12,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 11. "P11,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 9. "P9,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 8. "P8,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 6. "P6,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 5. "P5,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 3. "P3,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 2. "P2,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 0. "P0,Clear Output Data" "0,1"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "ODSR,Output Data Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Data Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Data Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Data Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Data Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Data Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Data Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Data Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Data Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Data Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Data Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Data Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Data Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Data Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Data Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Data Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Data Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Data Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Data Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Data Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Data Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Data Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Data Status" "0,1"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x0 "PDSR,Pin Data Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Data Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Data Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Data Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Data Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Data Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Data Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Data Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Data Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Data Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Data Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Data Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Data Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Data Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Data Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Data Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Data Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Data Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Data Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Data Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Data Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Data Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Data Status" "0,1"
|
|
wgroup.long 0x40++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 31. "P31,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Change Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 31. "P31,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Change Interrupt Disable" "0,1"
|
|
rgroup.long 0x48++0x7
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 31. "P31,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Change Interrupt Mask" "0,1"
|
|
line.long 0x4 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x4 31. "P31,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 30. "P30,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 29. "P29,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 27. "P27,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 26. "P26,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Change Interrupt Status" "0,1"
|
|
wgroup.long 0x50++0x7
|
|
line.long 0x0 "MDER,Multi-driver Enable Register"
|
|
bitfld.long 0x0 31. "P31,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Multi-drive Enable" "0,1"
|
|
line.long 0x4 "MDDR,Multi-driver Disable Register"
|
|
bitfld.long 0x4 31. "P31,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Multi-drive Disable" "0,1"
|
|
rgroup.long 0x58++0x3
|
|
line.long 0x0 "MDSR,Multi-driver Status Register"
|
|
bitfld.long 0x0 31. "P31,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Multi-drive Status" "0,1"
|
|
wgroup.long 0x60++0x7
|
|
line.long 0x0 "PUDR,Pull-up Disable Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Up Disable" "0,1"
|
|
line.long 0x4 "PUER,Pull-up Enable Register"
|
|
bitfld.long 0x4 31. "P31,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Pull-Up Enable" "0,1"
|
|
rgroup.long 0x68++0x3
|
|
line.long 0x0 "PUSR,Pad Pull-up Status Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Up Status" "0,1"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "ABCDSR[$1],Peripheral ABCD Select Register 0"
|
|
bitfld.long 0x0 31. "P31,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 30. "P30,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 29. "P29,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 27. "P27,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 26. "P26,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 24. "P24,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 23. "P23,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 21. "P21,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 20. "P20,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 18. "P18,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 17. "P17,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 15. "P15,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 14. "P14,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 12. "P12,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 11. "P11,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 9. "P9,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 8. "P8,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 6. "P6,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 5. "P5,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 3. "P3,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 2. "P2,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 0. "P0,Peripheral Select" "0,1"
|
|
repeat.end
|
|
wgroup.long 0x80++0x7
|
|
line.long 0x0 "IFSCDR,Input Filter Slow Clock Disable Register"
|
|
bitfld.long 0x0 31. "P31,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 30. "P30,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 29. "P29,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 27. "P27,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 26. "P26,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 24. "P24,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 23. "P23,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 21. "P21,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 20. "P20,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 18. "P18,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 17. "P17,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 15. "P15,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 14. "P14,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 12. "P12,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 11. "P11,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 9. "P9,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 8. "P8,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 6. "P6,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 5. "P5,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 3. "P3,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 2. "P2,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 0. "P0,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
line.long 0x4 "IFSCER,Input Filter Slow Clock Enable Register"
|
|
bitfld.long 0x4 31. "P31,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 30. "P30,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 29. "P29,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 27. "P27,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 26. "P26,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 24. "P24,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 23. "P23,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 21. "P21,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 20. "P20,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 18. "P18,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 17. "P17,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 15. "P15,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 14. "P14,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 12. "P12,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 11. "P11,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 9. "P9,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 8. "P8,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 6. "P6,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 5. "P5,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 3. "P3,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 2. "P2,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 0. "P0,Slow Clock Debouncing Filtering Select" "0,1"
|
|
rgroup.long 0x88++0x3
|
|
line.long 0x0 "IFSCSR,Input Filter Slow Clock Status Register"
|
|
bitfld.long 0x0 31. "P31,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
group.long 0x8C++0x3
|
|
line.long 0x0 "SCDR,Slow Clock Divider Debouncing Register"
|
|
hexmask.long.word 0x0 0.--13. 1. "DIV,Slow Clock Divider Selection for Debouncing"
|
|
wgroup.long 0x90++0x7
|
|
line.long 0x0 "PPDDR,Pad Pull-down Disable Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Down Disable" "0,1"
|
|
line.long 0x4 "PPDER,Pad Pull-down Enable Register"
|
|
bitfld.long 0x4 31. "P31,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Pull-Down Enable" "0,1"
|
|
rgroup.long 0x98++0x3
|
|
line.long 0x0 "PPDSR,Pad Pull-down Status Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Down Status" "0,1"
|
|
wgroup.long 0xA0++0x7
|
|
line.long 0x0 "OWER,Output Write Enable"
|
|
bitfld.long 0x0 31. "P31,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Write Enable" "0,1"
|
|
line.long 0x4 "OWDR,Output Write Disable"
|
|
bitfld.long 0x4 31. "P31,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Output Write Disable" "0,1"
|
|
rgroup.long 0xA8++0x3
|
|
line.long 0x0 "OWSR,Output Write Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Write Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Write Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Write Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Write Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Write Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Write Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Write Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Write Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Write Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Write Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Write Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Write Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Write Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Write Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Write Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Write Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Write Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Write Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Write Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Write Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Write Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Write Status" "0,1"
|
|
wgroup.long 0xB0++0x7
|
|
line.long 0x0 "AIMER,Additional Interrupt Modes Enable Register"
|
|
bitfld.long 0x0 31. "P31,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Additional Interrupt Modes Enable" "0,1"
|
|
line.long 0x4 "AIMDR,Additional Interrupt Modes Disable Register"
|
|
bitfld.long 0x4 31. "P31,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Additional Interrupt Modes Disable" "0,1"
|
|
rgroup.long 0xB8++0x3
|
|
line.long 0x0 "AIMMR,Additional Interrupt Modes Mask Register"
|
|
bitfld.long 0x0 31. "P31,IO Line Index" "0,1"
|
|
bitfld.long 0x0 30. "P30,IO Line Index" "0,1"
|
|
bitfld.long 0x0 29. "P29,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,IO Line Index" "0,1"
|
|
bitfld.long 0x0 27. "P27,IO Line Index" "0,1"
|
|
bitfld.long 0x0 26. "P26,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,IO Line Index" "0,1"
|
|
bitfld.long 0x0 24. "P24,IO Line Index" "0,1"
|
|
bitfld.long 0x0 23. "P23,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,IO Line Index" "0,1"
|
|
bitfld.long 0x0 21. "P21,IO Line Index" "0,1"
|
|
bitfld.long 0x0 20. "P20,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,IO Line Index" "0,1"
|
|
bitfld.long 0x0 18. "P18,IO Line Index" "0,1"
|
|
bitfld.long 0x0 17. "P17,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,IO Line Index" "0,1"
|
|
bitfld.long 0x0 15. "P15,IO Line Index" "0,1"
|
|
bitfld.long 0x0 14. "P14,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,IO Line Index" "0,1"
|
|
bitfld.long 0x0 12. "P12,IO Line Index" "0,1"
|
|
bitfld.long 0x0 11. "P11,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,IO Line Index" "0,1"
|
|
bitfld.long 0x0 9. "P9,IO Line Index" "0,1"
|
|
bitfld.long 0x0 8. "P8,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,IO Line Index" "0,1"
|
|
bitfld.long 0x0 6. "P6,IO Line Index" "0,1"
|
|
bitfld.long 0x0 5. "P5,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,IO Line Index" "0,1"
|
|
bitfld.long 0x0 3. "P3,IO Line Index" "0,1"
|
|
bitfld.long 0x0 2. "P2,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,IO Line Index" "0,1"
|
|
bitfld.long 0x0 0. "P0,IO Line Index" "0,1"
|
|
wgroup.long 0xC0++0x7
|
|
line.long 0x0 "ESR,Edge Select Register"
|
|
bitfld.long 0x0 31. "P31,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge Interrupt Selection" "0,1"
|
|
line.long 0x4 "LSR,Level Select Register"
|
|
bitfld.long 0x4 31. "P31,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 30. "P30,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 29. "P29,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 27. "P27,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 26. "P26,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 24. "P24,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 23. "P23,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 21. "P21,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 20. "P20,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 18. "P18,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 17. "P17,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 15. "P15,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 14. "P14,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 12. "P12,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 11. "P11,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 9. "P9,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 8. "P8,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 6. "P6,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 5. "P5,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 3. "P3,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 2. "P2,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 0. "P0,Level Interrupt Selection" "0,1"
|
|
rgroup.long 0xC8++0x3
|
|
line.long 0x0 "ELSR,Edge/Level Status Register"
|
|
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0,1"
|
|
wgroup.long 0xD0++0x7
|
|
line.long 0x0 "FELLSR,Falling Edge/Low-Level Select Register"
|
|
bitfld.long 0x0 31. "P31,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
line.long 0x4 "REHLSR,Rising Edge/High-Level Select Register"
|
|
bitfld.long 0x4 31. "P31,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 30. "P30,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 29. "P29,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 27. "P27,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 26. "P26,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 24. "P24,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 23. "P23,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 21. "P21,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 20. "P20,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 18. "P18,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 17. "P17,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 15. "P15,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 14. "P14,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 12. "P12,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 11. "P11,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 9. "P9,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 8. "P8,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 6. "P6,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 5. "P5,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 3. "P3,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 2. "P2,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 0. "P0,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
rgroup.long 0xD8++0x3
|
|
line.long 0x0 "FRLHSR,Fall/Rise - Low/High Status Register"
|
|
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0,1"
|
|
rgroup.long 0xE0++0x3
|
|
line.long 0x0 "LOCKSR,Lock Status"
|
|
bitfld.long 0x0 31. "P31,Lock Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Lock Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Lock Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Lock Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Lock Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Lock Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Lock Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Lock Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Lock Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Lock Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Lock Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Lock Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Lock Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Lock Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Lock Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Lock Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Lock Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Lock Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Lock Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Lock Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Lock Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Lock Status" "0,1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "SCHMITT,Schmitt Trigger Register"
|
|
bitfld.long 0x0 31. "SCHMITT31,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 30. "SCHMITT30,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 29. "SCHMITT29,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "SCHMITT28,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 27. "SCHMITT27,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 26. "SCHMITT26,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "SCHMITT25,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 24. "SCHMITT24,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 23. "SCHMITT23,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "SCHMITT22,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 21. "SCHMITT21,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 20. "SCHMITT20,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "SCHMITT19,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 18. "SCHMITT18,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 17. "SCHMITT17,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "SCHMITT16,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 15. "SCHMITT15,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 14. "SCHMITT14,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "SCHMITT13,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 12. "SCHMITT12,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 11. "SCHMITT11,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "SCHMITT10,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 9. "SCHMITT9,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 8. "SCHMITT8,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SCHMITT7,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 6. "SCHMITT6,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 5. "SCHMITT5,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "SCHMITT4,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 3. "SCHMITT3,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 2. "SCHMITT2,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SCHMITT1,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 0. "SCHMITT0,Schmitt Trigger Control" "0,1"
|
|
group.long 0x118++0x3
|
|
line.long 0x0 "DRIVER,I/O Drive Register"
|
|
bitfld.long 0x0 31. "LINE31,Drive of PIO Line 31" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 30. "LINE30,Drive of PIO Line 30" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 29. "LINE29,Drive of PIO Line 29" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 28. "LINE28,Drive of PIO Line 28" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 27. "LINE27,Drive of PIO Line 27" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 26. "LINE26,Drive of PIO Line 26" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 25. "LINE25,Drive of PIO Line 25" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 24. "LINE24,Drive of PIO Line 24" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 23. "LINE23,Drive of PIO Line 23" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 22. "LINE22,Drive of PIO Line 22" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 21. "LINE21,Drive of PIO Line 21" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 20. "LINE20,Drive of PIO Line 20" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 19. "LINE19,Drive of PIO Line 19" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 18. "LINE18,Drive of PIO Line 18" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 17. "LINE17,Drive of PIO Line 17" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 16. "LINE16,Drive of PIO Line 16" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 15. "LINE15,Drive of PIO Line 15" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 14. "LINE14,Drive of PIO Line 14" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 13. "LINE13,Drive of PIO Line 13" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 12. "LINE12,Drive of PIO Line 12" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 11. "LINE11,Drive of PIO Line 11" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 10. "LINE10,Drive of PIO Line 10" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 9. "LINE9,Drive of PIO Line 9" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 8. "LINE8,Drive of PIO Line 8" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 7. "LINE7,Drive of PIO Line 7" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 6. "LINE6,Drive of PIO Line 6" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 5. "LINE5,Drive of PIO Line 5" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 4. "LINE4,Drive of PIO Line 4" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 3. "LINE3,Drive of PIO Line 3" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 2. "LINE2,Drive of PIO Line 2" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 1. "LINE1,Drive of PIO Line 1" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 0. "LINE0,Drive of PIO Line 0" "0: Lowest drive,1: Highest drive"
|
|
group.long 0x150++0x3
|
|
line.long 0x0 "PCMR,Parallel Capture Mode Register"
|
|
bitfld.long 0x0 11. "FRSTS,Parallel Capture Mode First Sample" "0,1"
|
|
bitfld.long 0x0 10. "HALFS,Parallel Capture Mode Half Sampling" "0,1"
|
|
bitfld.long 0x0 9. "ALWYS,Parallel Capture Mode Always Sampling" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "DSIZE,Parallel Capture Mode Data Size" "0: The reception data in the PIO_PCRHR is a byte..,1: The reception data in the PIO_PCRHR is a..,2: The reception data in the PIO_PCRHR is a word..,?"
|
|
bitfld.long 0x0 0. "PCEN,Parallel Capture Mode Enable" "0,1"
|
|
wgroup.long 0x154++0x7
|
|
line.long 0x0 "PCIER,Parallel Capture Interrupt Enable Register"
|
|
bitfld.long 0x0 3. "RXBUFF,Reception Buffer Full Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "ENDRX,End of Reception Transfer Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Enable" "0,1"
|
|
line.long 0x4 "PCIDR,Parallel Capture Interrupt Disable Register"
|
|
bitfld.long 0x4 3. "RXBUFF,Reception Buffer Full Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "ENDRX,End of Reception Transfer Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Disable" "0,1"
|
|
rgroup.long 0x15C++0xB
|
|
line.long 0x0 "PCIMR,Parallel Capture Interrupt Mask Register"
|
|
bitfld.long 0x0 3. "RXBUFF,Reception Buffer Full Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "ENDRX,End of Reception Transfer Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Mask" "0,1"
|
|
line.long 0x4 "PCISR,Parallel Capture Interrupt Status Register"
|
|
bitfld.long 0x4 1. "OVRE,Parallel Capture Mode Overrun Error" "0,1"
|
|
bitfld.long 0x4 0. "DRDY,Parallel Capture Mode Data Ready" "0,1"
|
|
line.long 0x8 "PCRHR,Parallel Capture Reception Holding Register"
|
|
hexmask.long 0x8 0.--31. 1. "RDATA,Parallel Capture Mode Reception Data"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("PIC32CZ2051MC70100")||cpuis("PIC32CZ2051MC70144"))
|
|
tree "PIOC"
|
|
base ad:0x400E1200
|
|
wgroup.long 0x0++0x7
|
|
line.long 0x0 "PER,PIO Enable Register"
|
|
bitfld.long 0x0 31. "P31,PIO Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,PIO Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,PIO Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,PIO Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,PIO Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,PIO Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,PIO Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,PIO Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,PIO Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,PIO Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,PIO Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,PIO Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,PIO Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,PIO Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,PIO Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,PIO Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,PIO Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,PIO Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,PIO Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,PIO Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,PIO Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,PIO Enable" "0,1"
|
|
line.long 0x4 "PDR,PIO Disable Register"
|
|
bitfld.long 0x4 31. "P31,PIO Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,PIO Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,PIO Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,PIO Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,PIO Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,PIO Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,PIO Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,PIO Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,PIO Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,PIO Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,PIO Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,PIO Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,PIO Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,PIO Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,PIO Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,PIO Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,PIO Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,PIO Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,PIO Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,PIO Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,PIO Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,PIO Disable" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "PSR,PIO Status Register"
|
|
bitfld.long 0x0 31. "P31,PIO Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,PIO Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,PIO Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,PIO Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,PIO Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,PIO Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,PIO Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,PIO Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,PIO Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,PIO Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,PIO Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,PIO Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,PIO Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,PIO Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,PIO Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,PIO Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,PIO Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,PIO Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,PIO Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,PIO Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,PIO Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,PIO Status" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "OER,Output Enable Register"
|
|
bitfld.long 0x0 31. "P31,Output Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Enable" "0,1"
|
|
line.long 0x4 "ODR,Output Disable Register"
|
|
bitfld.long 0x4 31. "P31,Output Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Output Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Output Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Output Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Output Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Output Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Output Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Output Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Output Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Output Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Output Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Output Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Output Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Output Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Output Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Output Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Output Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Output Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Output Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Output Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Output Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Output Disable" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "OSR,Output Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Status" "0,1"
|
|
wgroup.long 0x20++0x7
|
|
line.long 0x0 "IFER,Glitch Input Filter Enable Register"
|
|
bitfld.long 0x0 31. "P31,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Filter Enable" "0,1"
|
|
line.long 0x4 "IFDR,Glitch Input Filter Disable Register"
|
|
bitfld.long 0x4 31. "P31,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Filter Disable" "0,1"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "IFSR,Glitch Input Filter Status Register"
|
|
bitfld.long 0x0 31. "P31,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Filter Status" "0,1"
|
|
wgroup.long 0x30++0x7
|
|
line.long 0x0 "SODR,Set Output Data Register"
|
|
bitfld.long 0x0 31. "P31,Set Output Data" "0,1"
|
|
bitfld.long 0x0 30. "P30,Set Output Data" "0,1"
|
|
bitfld.long 0x0 29. "P29,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Set Output Data" "0,1"
|
|
bitfld.long 0x0 27. "P27,Set Output Data" "0,1"
|
|
bitfld.long 0x0 26. "P26,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Set Output Data" "0,1"
|
|
bitfld.long 0x0 24. "P24,Set Output Data" "0,1"
|
|
bitfld.long 0x0 23. "P23,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Set Output Data" "0,1"
|
|
bitfld.long 0x0 21. "P21,Set Output Data" "0,1"
|
|
bitfld.long 0x0 20. "P20,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Set Output Data" "0,1"
|
|
bitfld.long 0x0 18. "P18,Set Output Data" "0,1"
|
|
bitfld.long 0x0 17. "P17,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Set Output Data" "0,1"
|
|
bitfld.long 0x0 15. "P15,Set Output Data" "0,1"
|
|
bitfld.long 0x0 14. "P14,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Set Output Data" "0,1"
|
|
bitfld.long 0x0 12. "P12,Set Output Data" "0,1"
|
|
bitfld.long 0x0 11. "P11,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Set Output Data" "0,1"
|
|
bitfld.long 0x0 9. "P9,Set Output Data" "0,1"
|
|
bitfld.long 0x0 8. "P8,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Set Output Data" "0,1"
|
|
bitfld.long 0x0 6. "P6,Set Output Data" "0,1"
|
|
bitfld.long 0x0 5. "P5,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Set Output Data" "0,1"
|
|
bitfld.long 0x0 3. "P3,Set Output Data" "0,1"
|
|
bitfld.long 0x0 2. "P2,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Set Output Data" "0,1"
|
|
bitfld.long 0x0 0. "P0,Set Output Data" "0,1"
|
|
line.long 0x4 "CODR,Clear Output Data Register"
|
|
bitfld.long 0x4 31. "P31,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 30. "P30,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 29. "P29,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 27. "P27,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 26. "P26,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 24. "P24,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 23. "P23,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 21. "P21,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 20. "P20,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 18. "P18,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 17. "P17,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 15. "P15,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 14. "P14,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 12. "P12,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 11. "P11,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 9. "P9,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 8. "P8,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 6. "P6,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 5. "P5,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 3. "P3,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 2. "P2,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 0. "P0,Clear Output Data" "0,1"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "ODSR,Output Data Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Data Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Data Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Data Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Data Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Data Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Data Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Data Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Data Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Data Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Data Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Data Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Data Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Data Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Data Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Data Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Data Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Data Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Data Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Data Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Data Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Data Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Data Status" "0,1"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x0 "PDSR,Pin Data Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Data Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Data Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Data Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Data Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Data Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Data Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Data Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Data Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Data Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Data Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Data Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Data Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Data Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Data Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Data Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Data Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Data Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Data Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Data Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Data Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Data Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Data Status" "0,1"
|
|
wgroup.long 0x40++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 31. "P31,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Change Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 31. "P31,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Change Interrupt Disable" "0,1"
|
|
rgroup.long 0x48++0x7
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 31. "P31,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Change Interrupt Mask" "0,1"
|
|
line.long 0x4 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x4 31. "P31,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 30. "P30,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 29. "P29,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 27. "P27,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 26. "P26,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Change Interrupt Status" "0,1"
|
|
wgroup.long 0x50++0x7
|
|
line.long 0x0 "MDER,Multi-driver Enable Register"
|
|
bitfld.long 0x0 31. "P31,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Multi-drive Enable" "0,1"
|
|
line.long 0x4 "MDDR,Multi-driver Disable Register"
|
|
bitfld.long 0x4 31. "P31,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Multi-drive Disable" "0,1"
|
|
rgroup.long 0x58++0x3
|
|
line.long 0x0 "MDSR,Multi-driver Status Register"
|
|
bitfld.long 0x0 31. "P31,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Multi-drive Status" "0,1"
|
|
wgroup.long 0x60++0x7
|
|
line.long 0x0 "PUDR,Pull-up Disable Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Up Disable" "0,1"
|
|
line.long 0x4 "PUER,Pull-up Enable Register"
|
|
bitfld.long 0x4 31. "P31,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Pull-Up Enable" "0,1"
|
|
rgroup.long 0x68++0x3
|
|
line.long 0x0 "PUSR,Pad Pull-up Status Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Up Status" "0,1"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "ABCDSR[$1],Peripheral ABCD Select Register 0"
|
|
bitfld.long 0x0 31. "P31,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 30. "P30,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 29. "P29,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 27. "P27,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 26. "P26,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 24. "P24,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 23. "P23,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 21. "P21,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 20. "P20,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 18. "P18,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 17. "P17,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 15. "P15,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 14. "P14,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 12. "P12,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 11. "P11,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 9. "P9,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 8. "P8,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 6. "P6,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 5. "P5,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 3. "P3,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 2. "P2,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 0. "P0,Peripheral Select" "0,1"
|
|
repeat.end
|
|
wgroup.long 0x80++0x7
|
|
line.long 0x0 "IFSCDR,Input Filter Slow Clock Disable Register"
|
|
bitfld.long 0x0 31. "P31,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 30. "P30,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 29. "P29,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 27. "P27,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 26. "P26,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 24. "P24,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 23. "P23,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 21. "P21,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 20. "P20,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 18. "P18,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 17. "P17,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 15. "P15,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 14. "P14,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 12. "P12,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 11. "P11,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 9. "P9,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 8. "P8,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 6. "P6,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 5. "P5,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 3. "P3,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 2. "P2,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 0. "P0,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
line.long 0x4 "IFSCER,Input Filter Slow Clock Enable Register"
|
|
bitfld.long 0x4 31. "P31,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 30. "P30,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 29. "P29,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 27. "P27,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 26. "P26,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 24. "P24,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 23. "P23,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 21. "P21,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 20. "P20,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 18. "P18,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 17. "P17,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 15. "P15,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 14. "P14,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 12. "P12,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 11. "P11,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 9. "P9,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 8. "P8,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 6. "P6,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 5. "P5,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 3. "P3,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 2. "P2,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 0. "P0,Slow Clock Debouncing Filtering Select" "0,1"
|
|
rgroup.long 0x88++0x3
|
|
line.long 0x0 "IFSCSR,Input Filter Slow Clock Status Register"
|
|
bitfld.long 0x0 31. "P31,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
group.long 0x8C++0x3
|
|
line.long 0x0 "SCDR,Slow Clock Divider Debouncing Register"
|
|
hexmask.long.word 0x0 0.--13. 1. "DIV,Slow Clock Divider Selection for Debouncing"
|
|
wgroup.long 0x90++0x7
|
|
line.long 0x0 "PPDDR,Pad Pull-down Disable Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Down Disable" "0,1"
|
|
line.long 0x4 "PPDER,Pad Pull-down Enable Register"
|
|
bitfld.long 0x4 31. "P31,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Pull-Down Enable" "0,1"
|
|
rgroup.long 0x98++0x3
|
|
line.long 0x0 "PPDSR,Pad Pull-down Status Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Down Status" "0,1"
|
|
wgroup.long 0xA0++0x7
|
|
line.long 0x0 "OWER,Output Write Enable"
|
|
bitfld.long 0x0 31. "P31,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Write Enable" "0,1"
|
|
line.long 0x4 "OWDR,Output Write Disable"
|
|
bitfld.long 0x4 31. "P31,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Output Write Disable" "0,1"
|
|
rgroup.long 0xA8++0x3
|
|
line.long 0x0 "OWSR,Output Write Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Write Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Write Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Write Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Write Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Write Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Write Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Write Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Write Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Write Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Write Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Write Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Write Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Write Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Write Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Write Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Write Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Write Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Write Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Write Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Write Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Write Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Write Status" "0,1"
|
|
wgroup.long 0xB0++0x7
|
|
line.long 0x0 "AIMER,Additional Interrupt Modes Enable Register"
|
|
bitfld.long 0x0 31. "P31,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Additional Interrupt Modes Enable" "0,1"
|
|
line.long 0x4 "AIMDR,Additional Interrupt Modes Disable Register"
|
|
bitfld.long 0x4 31. "P31,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Additional Interrupt Modes Disable" "0,1"
|
|
rgroup.long 0xB8++0x3
|
|
line.long 0x0 "AIMMR,Additional Interrupt Modes Mask Register"
|
|
bitfld.long 0x0 31. "P31,IO Line Index" "0,1"
|
|
bitfld.long 0x0 30. "P30,IO Line Index" "0,1"
|
|
bitfld.long 0x0 29. "P29,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,IO Line Index" "0,1"
|
|
bitfld.long 0x0 27. "P27,IO Line Index" "0,1"
|
|
bitfld.long 0x0 26. "P26,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,IO Line Index" "0,1"
|
|
bitfld.long 0x0 24. "P24,IO Line Index" "0,1"
|
|
bitfld.long 0x0 23. "P23,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,IO Line Index" "0,1"
|
|
bitfld.long 0x0 21. "P21,IO Line Index" "0,1"
|
|
bitfld.long 0x0 20. "P20,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,IO Line Index" "0,1"
|
|
bitfld.long 0x0 18. "P18,IO Line Index" "0,1"
|
|
bitfld.long 0x0 17. "P17,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,IO Line Index" "0,1"
|
|
bitfld.long 0x0 15. "P15,IO Line Index" "0,1"
|
|
bitfld.long 0x0 14. "P14,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,IO Line Index" "0,1"
|
|
bitfld.long 0x0 12. "P12,IO Line Index" "0,1"
|
|
bitfld.long 0x0 11. "P11,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,IO Line Index" "0,1"
|
|
bitfld.long 0x0 9. "P9,IO Line Index" "0,1"
|
|
bitfld.long 0x0 8. "P8,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,IO Line Index" "0,1"
|
|
bitfld.long 0x0 6. "P6,IO Line Index" "0,1"
|
|
bitfld.long 0x0 5. "P5,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,IO Line Index" "0,1"
|
|
bitfld.long 0x0 3. "P3,IO Line Index" "0,1"
|
|
bitfld.long 0x0 2. "P2,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,IO Line Index" "0,1"
|
|
bitfld.long 0x0 0. "P0,IO Line Index" "0,1"
|
|
wgroup.long 0xC0++0x7
|
|
line.long 0x0 "ESR,Edge Select Register"
|
|
bitfld.long 0x0 31. "P31,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge Interrupt Selection" "0,1"
|
|
line.long 0x4 "LSR,Level Select Register"
|
|
bitfld.long 0x4 31. "P31,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 30. "P30,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 29. "P29,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 27. "P27,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 26. "P26,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 24. "P24,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 23. "P23,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 21. "P21,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 20. "P20,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 18. "P18,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 17. "P17,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 15. "P15,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 14. "P14,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 12. "P12,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 11. "P11,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 9. "P9,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 8. "P8,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 6. "P6,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 5. "P5,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 3. "P3,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 2. "P2,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 0. "P0,Level Interrupt Selection" "0,1"
|
|
rgroup.long 0xC8++0x3
|
|
line.long 0x0 "ELSR,Edge/Level Status Register"
|
|
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0,1"
|
|
wgroup.long 0xD0++0x7
|
|
line.long 0x0 "FELLSR,Falling Edge/Low-Level Select Register"
|
|
bitfld.long 0x0 31. "P31,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
line.long 0x4 "REHLSR,Rising Edge/High-Level Select Register"
|
|
bitfld.long 0x4 31. "P31,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 30. "P30,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 29. "P29,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 27. "P27,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 26. "P26,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 24. "P24,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 23. "P23,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 21. "P21,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 20. "P20,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 18. "P18,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 17. "P17,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 15. "P15,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 14. "P14,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 12. "P12,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 11. "P11,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 9. "P9,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 8. "P8,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 6. "P6,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 5. "P5,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 3. "P3,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 2. "P2,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 0. "P0,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
rgroup.long 0xD8++0x3
|
|
line.long 0x0 "FRLHSR,Fall/Rise - Low/High Status Register"
|
|
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0,1"
|
|
rgroup.long 0xE0++0x3
|
|
line.long 0x0 "LOCKSR,Lock Status"
|
|
bitfld.long 0x0 31. "P31,Lock Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Lock Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Lock Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Lock Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Lock Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Lock Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Lock Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Lock Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Lock Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Lock Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Lock Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Lock Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Lock Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Lock Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Lock Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Lock Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Lock Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Lock Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Lock Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Lock Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Lock Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Lock Status" "0,1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "SCHMITT,Schmitt Trigger Register"
|
|
bitfld.long 0x0 31. "SCHMITT31,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 30. "SCHMITT30,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 29. "SCHMITT29,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "SCHMITT28,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 27. "SCHMITT27,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 26. "SCHMITT26,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "SCHMITT25,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 24. "SCHMITT24,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 23. "SCHMITT23,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "SCHMITT22,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 21. "SCHMITT21,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 20. "SCHMITT20,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "SCHMITT19,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 18. "SCHMITT18,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 17. "SCHMITT17,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "SCHMITT16,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 15. "SCHMITT15,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 14. "SCHMITT14,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "SCHMITT13,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 12. "SCHMITT12,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 11. "SCHMITT11,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "SCHMITT10,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 9. "SCHMITT9,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 8. "SCHMITT8,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SCHMITT7,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 6. "SCHMITT6,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 5. "SCHMITT5,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "SCHMITT4,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 3. "SCHMITT3,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 2. "SCHMITT2,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SCHMITT1,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 0. "SCHMITT0,Schmitt Trigger Control" "0,1"
|
|
group.long 0x118++0x3
|
|
line.long 0x0 "DRIVER,I/O Drive Register"
|
|
bitfld.long 0x0 31. "LINE31,Drive of PIO Line 31" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 30. "LINE30,Drive of PIO Line 30" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 29. "LINE29,Drive of PIO Line 29" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 28. "LINE28,Drive of PIO Line 28" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 27. "LINE27,Drive of PIO Line 27" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 26. "LINE26,Drive of PIO Line 26" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 25. "LINE25,Drive of PIO Line 25" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 24. "LINE24,Drive of PIO Line 24" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 23. "LINE23,Drive of PIO Line 23" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 22. "LINE22,Drive of PIO Line 22" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 21. "LINE21,Drive of PIO Line 21" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 20. "LINE20,Drive of PIO Line 20" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 19. "LINE19,Drive of PIO Line 19" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 18. "LINE18,Drive of PIO Line 18" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 17. "LINE17,Drive of PIO Line 17" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 16. "LINE16,Drive of PIO Line 16" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 15. "LINE15,Drive of PIO Line 15" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 14. "LINE14,Drive of PIO Line 14" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 13. "LINE13,Drive of PIO Line 13" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 12. "LINE12,Drive of PIO Line 12" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 11. "LINE11,Drive of PIO Line 11" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 10. "LINE10,Drive of PIO Line 10" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 9. "LINE9,Drive of PIO Line 9" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 8. "LINE8,Drive of PIO Line 8" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 7. "LINE7,Drive of PIO Line 7" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 6. "LINE6,Drive of PIO Line 6" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 5. "LINE5,Drive of PIO Line 5" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 4. "LINE4,Drive of PIO Line 4" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 3. "LINE3,Drive of PIO Line 3" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 2. "LINE2,Drive of PIO Line 2" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 1. "LINE1,Drive of PIO Line 1" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 0. "LINE0,Drive of PIO Line 0" "0: Lowest drive,1: Highest drive"
|
|
group.long 0x150++0x3
|
|
line.long 0x0 "PCMR,Parallel Capture Mode Register"
|
|
bitfld.long 0x0 11. "FRSTS,Parallel Capture Mode First Sample" "0,1"
|
|
bitfld.long 0x0 10. "HALFS,Parallel Capture Mode Half Sampling" "0,1"
|
|
bitfld.long 0x0 9. "ALWYS,Parallel Capture Mode Always Sampling" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "DSIZE,Parallel Capture Mode Data Size" "0: The reception data in the PIO_PCRHR is a byte..,1: The reception data in the PIO_PCRHR is a..,2: The reception data in the PIO_PCRHR is a word..,?"
|
|
bitfld.long 0x0 0. "PCEN,Parallel Capture Mode Enable" "0,1"
|
|
wgroup.long 0x154++0x7
|
|
line.long 0x0 "PCIER,Parallel Capture Interrupt Enable Register"
|
|
bitfld.long 0x0 3. "RXBUFF,Reception Buffer Full Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "ENDRX,End of Reception Transfer Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Enable" "0,1"
|
|
line.long 0x4 "PCIDR,Parallel Capture Interrupt Disable Register"
|
|
bitfld.long 0x4 3. "RXBUFF,Reception Buffer Full Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "ENDRX,End of Reception Transfer Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Disable" "0,1"
|
|
rgroup.long 0x15C++0xB
|
|
line.long 0x0 "PCIMR,Parallel Capture Interrupt Mask Register"
|
|
bitfld.long 0x0 3. "RXBUFF,Reception Buffer Full Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "ENDRX,End of Reception Transfer Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Mask" "0,1"
|
|
line.long 0x4 "PCISR,Parallel Capture Interrupt Status Register"
|
|
bitfld.long 0x4 1. "OVRE,Parallel Capture Mode Overrun Error" "0,1"
|
|
bitfld.long 0x4 0. "DRDY,Parallel Capture Mode Data Ready" "0,1"
|
|
line.long 0x8 "PCRHR,Parallel Capture Reception Holding Register"
|
|
hexmask.long 0x8 0.--31. 1. "RDATA,Parallel Capture Mode Reception Data"
|
|
tree.end
|
|
endif
|
|
tree "PIOD"
|
|
base ad:0x400E1400
|
|
wgroup.long 0x0++0x7
|
|
line.long 0x0 "PER,PIO Enable Register"
|
|
bitfld.long 0x0 31. "P31,PIO Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,PIO Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,PIO Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,PIO Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,PIO Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,PIO Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,PIO Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,PIO Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,PIO Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,PIO Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,PIO Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,PIO Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,PIO Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,PIO Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,PIO Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,PIO Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,PIO Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,PIO Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,PIO Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,PIO Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,PIO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,PIO Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,PIO Enable" "0,1"
|
|
line.long 0x4 "PDR,PIO Disable Register"
|
|
bitfld.long 0x4 31. "P31,PIO Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,PIO Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,PIO Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,PIO Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,PIO Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,PIO Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,PIO Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,PIO Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,PIO Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,PIO Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,PIO Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,PIO Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,PIO Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,PIO Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,PIO Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,PIO Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,PIO Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,PIO Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,PIO Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,PIO Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,PIO Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,PIO Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,PIO Disable" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "PSR,PIO Status Register"
|
|
bitfld.long 0x0 31. "P31,PIO Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,PIO Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,PIO Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,PIO Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,PIO Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,PIO Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,PIO Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,PIO Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,PIO Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,PIO Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,PIO Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,PIO Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,PIO Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,PIO Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,PIO Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,PIO Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,PIO Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,PIO Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,PIO Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,PIO Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,PIO Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,PIO Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,PIO Status" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "OER,Output Enable Register"
|
|
bitfld.long 0x0 31. "P31,Output Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Enable" "0,1"
|
|
line.long 0x4 "ODR,Output Disable Register"
|
|
bitfld.long 0x4 31. "P31,Output Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Output Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Output Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Output Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Output Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Output Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Output Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Output Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Output Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Output Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Output Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Output Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Output Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Output Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Output Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Output Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Output Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Output Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Output Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Output Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Output Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Output Disable" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "OSR,Output Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Status" "0,1"
|
|
wgroup.long 0x20++0x7
|
|
line.long 0x0 "IFER,Glitch Input Filter Enable Register"
|
|
bitfld.long 0x0 31. "P31,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Filter Enable" "0,1"
|
|
line.long 0x4 "IFDR,Glitch Input Filter Disable Register"
|
|
bitfld.long 0x4 31. "P31,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Filter Disable" "0,1"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "IFSR,Glitch Input Filter Status Register"
|
|
bitfld.long 0x0 31. "P31,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Filter Status" "0,1"
|
|
wgroup.long 0x30++0x7
|
|
line.long 0x0 "SODR,Set Output Data Register"
|
|
bitfld.long 0x0 31. "P31,Set Output Data" "0,1"
|
|
bitfld.long 0x0 30. "P30,Set Output Data" "0,1"
|
|
bitfld.long 0x0 29. "P29,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Set Output Data" "0,1"
|
|
bitfld.long 0x0 27. "P27,Set Output Data" "0,1"
|
|
bitfld.long 0x0 26. "P26,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Set Output Data" "0,1"
|
|
bitfld.long 0x0 24. "P24,Set Output Data" "0,1"
|
|
bitfld.long 0x0 23. "P23,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Set Output Data" "0,1"
|
|
bitfld.long 0x0 21. "P21,Set Output Data" "0,1"
|
|
bitfld.long 0x0 20. "P20,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Set Output Data" "0,1"
|
|
bitfld.long 0x0 18. "P18,Set Output Data" "0,1"
|
|
bitfld.long 0x0 17. "P17,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Set Output Data" "0,1"
|
|
bitfld.long 0x0 15. "P15,Set Output Data" "0,1"
|
|
bitfld.long 0x0 14. "P14,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Set Output Data" "0,1"
|
|
bitfld.long 0x0 12. "P12,Set Output Data" "0,1"
|
|
bitfld.long 0x0 11. "P11,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Set Output Data" "0,1"
|
|
bitfld.long 0x0 9. "P9,Set Output Data" "0,1"
|
|
bitfld.long 0x0 8. "P8,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Set Output Data" "0,1"
|
|
bitfld.long 0x0 6. "P6,Set Output Data" "0,1"
|
|
bitfld.long 0x0 5. "P5,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Set Output Data" "0,1"
|
|
bitfld.long 0x0 3. "P3,Set Output Data" "0,1"
|
|
bitfld.long 0x0 2. "P2,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Set Output Data" "0,1"
|
|
bitfld.long 0x0 0. "P0,Set Output Data" "0,1"
|
|
line.long 0x4 "CODR,Clear Output Data Register"
|
|
bitfld.long 0x4 31. "P31,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 30. "P30,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 29. "P29,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 27. "P27,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 26. "P26,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 24. "P24,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 23. "P23,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 21. "P21,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 20. "P20,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 18. "P18,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 17. "P17,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 15. "P15,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 14. "P14,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 12. "P12,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 11. "P11,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 9. "P9,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 8. "P8,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 6. "P6,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 5. "P5,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 3. "P3,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 2. "P2,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 0. "P0,Clear Output Data" "0,1"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "ODSR,Output Data Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Data Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Data Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Data Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Data Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Data Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Data Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Data Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Data Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Data Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Data Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Data Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Data Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Data Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Data Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Data Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Data Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Data Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Data Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Data Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Data Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Data Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Data Status" "0,1"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x0 "PDSR,Pin Data Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Data Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Data Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Data Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Data Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Data Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Data Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Data Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Data Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Data Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Data Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Data Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Data Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Data Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Data Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Data Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Data Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Data Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Data Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Data Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Data Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Data Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Data Status" "0,1"
|
|
wgroup.long 0x40++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 31. "P31,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Change Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 31. "P31,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Change Interrupt Disable" "0,1"
|
|
rgroup.long 0x48++0x7
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 31. "P31,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Change Interrupt Mask" "0,1"
|
|
line.long 0x4 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x4 31. "P31,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 30. "P30,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 29. "P29,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 27. "P27,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 26. "P26,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Change Interrupt Status" "0,1"
|
|
wgroup.long 0x50++0x7
|
|
line.long 0x0 "MDER,Multi-driver Enable Register"
|
|
bitfld.long 0x0 31. "P31,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Multi-drive Enable" "0,1"
|
|
line.long 0x4 "MDDR,Multi-driver Disable Register"
|
|
bitfld.long 0x4 31. "P31,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Multi-drive Disable" "0,1"
|
|
rgroup.long 0x58++0x3
|
|
line.long 0x0 "MDSR,Multi-driver Status Register"
|
|
bitfld.long 0x0 31. "P31,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Multi-drive Status" "0,1"
|
|
wgroup.long 0x60++0x7
|
|
line.long 0x0 "PUDR,Pull-up Disable Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Up Disable" "0,1"
|
|
line.long 0x4 "PUER,Pull-up Enable Register"
|
|
bitfld.long 0x4 31. "P31,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Pull-Up Enable" "0,1"
|
|
rgroup.long 0x68++0x3
|
|
line.long 0x0 "PUSR,Pad Pull-up Status Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Up Status" "0,1"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "ABCDSR[$1],Peripheral ABCD Select Register 0"
|
|
bitfld.long 0x0 31. "P31,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 30. "P30,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 29. "P29,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 27. "P27,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 26. "P26,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 24. "P24,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 23. "P23,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 21. "P21,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 20. "P20,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 18. "P18,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 17. "P17,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 15. "P15,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 14. "P14,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 12. "P12,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 11. "P11,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 9. "P9,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 8. "P8,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 6. "P6,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 5. "P5,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 3. "P3,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 2. "P2,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 0. "P0,Peripheral Select" "0,1"
|
|
repeat.end
|
|
wgroup.long 0x80++0x7
|
|
line.long 0x0 "IFSCDR,Input Filter Slow Clock Disable Register"
|
|
bitfld.long 0x0 31. "P31,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 30. "P30,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 29. "P29,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 27. "P27,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 26. "P26,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 24. "P24,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 23. "P23,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 21. "P21,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 20. "P20,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 18. "P18,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 17. "P17,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 15. "P15,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 14. "P14,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 12. "P12,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 11. "P11,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 9. "P9,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 8. "P8,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 6. "P6,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 5. "P5,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 3. "P3,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 2. "P2,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 0. "P0,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
line.long 0x4 "IFSCER,Input Filter Slow Clock Enable Register"
|
|
bitfld.long 0x4 31. "P31,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 30. "P30,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 29. "P29,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 27. "P27,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 26. "P26,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 24. "P24,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 23. "P23,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 21. "P21,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 20. "P20,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 18. "P18,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 17. "P17,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 15. "P15,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 14. "P14,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 12. "P12,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 11. "P11,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 9. "P9,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 8. "P8,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 6. "P6,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 5. "P5,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 3. "P3,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 2. "P2,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 0. "P0,Slow Clock Debouncing Filtering Select" "0,1"
|
|
rgroup.long 0x88++0x3
|
|
line.long 0x0 "IFSCSR,Input Filter Slow Clock Status Register"
|
|
bitfld.long 0x0 31. "P31,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
group.long 0x8C++0x3
|
|
line.long 0x0 "SCDR,Slow Clock Divider Debouncing Register"
|
|
hexmask.long.word 0x0 0.--13. 1. "DIV,Slow Clock Divider Selection for Debouncing"
|
|
wgroup.long 0x90++0x7
|
|
line.long 0x0 "PPDDR,Pad Pull-down Disable Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Down Disable" "0,1"
|
|
line.long 0x4 "PPDER,Pad Pull-down Enable Register"
|
|
bitfld.long 0x4 31. "P31,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Pull-Down Enable" "0,1"
|
|
rgroup.long 0x98++0x3
|
|
line.long 0x0 "PPDSR,Pad Pull-down Status Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Down Status" "0,1"
|
|
wgroup.long 0xA0++0x7
|
|
line.long 0x0 "OWER,Output Write Enable"
|
|
bitfld.long 0x0 31. "P31,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Write Enable" "0,1"
|
|
line.long 0x4 "OWDR,Output Write Disable"
|
|
bitfld.long 0x4 31. "P31,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Output Write Disable" "0,1"
|
|
rgroup.long 0xA8++0x3
|
|
line.long 0x0 "OWSR,Output Write Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Write Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Write Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Write Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Write Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Write Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Write Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Write Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Write Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Write Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Write Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Write Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Write Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Write Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Write Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Write Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Write Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Write Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Write Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Write Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Write Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Write Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Write Status" "0,1"
|
|
wgroup.long 0xB0++0x7
|
|
line.long 0x0 "AIMER,Additional Interrupt Modes Enable Register"
|
|
bitfld.long 0x0 31. "P31,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Additional Interrupt Modes Enable" "0,1"
|
|
line.long 0x4 "AIMDR,Additional Interrupt Modes Disable Register"
|
|
bitfld.long 0x4 31. "P31,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Additional Interrupt Modes Disable" "0,1"
|
|
rgroup.long 0xB8++0x3
|
|
line.long 0x0 "AIMMR,Additional Interrupt Modes Mask Register"
|
|
bitfld.long 0x0 31. "P31,IO Line Index" "0,1"
|
|
bitfld.long 0x0 30. "P30,IO Line Index" "0,1"
|
|
bitfld.long 0x0 29. "P29,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,IO Line Index" "0,1"
|
|
bitfld.long 0x0 27. "P27,IO Line Index" "0,1"
|
|
bitfld.long 0x0 26. "P26,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,IO Line Index" "0,1"
|
|
bitfld.long 0x0 24. "P24,IO Line Index" "0,1"
|
|
bitfld.long 0x0 23. "P23,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,IO Line Index" "0,1"
|
|
bitfld.long 0x0 21. "P21,IO Line Index" "0,1"
|
|
bitfld.long 0x0 20. "P20,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,IO Line Index" "0,1"
|
|
bitfld.long 0x0 18. "P18,IO Line Index" "0,1"
|
|
bitfld.long 0x0 17. "P17,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,IO Line Index" "0,1"
|
|
bitfld.long 0x0 15. "P15,IO Line Index" "0,1"
|
|
bitfld.long 0x0 14. "P14,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,IO Line Index" "0,1"
|
|
bitfld.long 0x0 12. "P12,IO Line Index" "0,1"
|
|
bitfld.long 0x0 11. "P11,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,IO Line Index" "0,1"
|
|
bitfld.long 0x0 9. "P9,IO Line Index" "0,1"
|
|
bitfld.long 0x0 8. "P8,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,IO Line Index" "0,1"
|
|
bitfld.long 0x0 6. "P6,IO Line Index" "0,1"
|
|
bitfld.long 0x0 5. "P5,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,IO Line Index" "0,1"
|
|
bitfld.long 0x0 3. "P3,IO Line Index" "0,1"
|
|
bitfld.long 0x0 2. "P2,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,IO Line Index" "0,1"
|
|
bitfld.long 0x0 0. "P0,IO Line Index" "0,1"
|
|
wgroup.long 0xC0++0x7
|
|
line.long 0x0 "ESR,Edge Select Register"
|
|
bitfld.long 0x0 31. "P31,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge Interrupt Selection" "0,1"
|
|
line.long 0x4 "LSR,Level Select Register"
|
|
bitfld.long 0x4 31. "P31,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 30. "P30,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 29. "P29,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 27. "P27,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 26. "P26,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 24. "P24,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 23. "P23,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 21. "P21,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 20. "P20,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 18. "P18,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 17. "P17,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 15. "P15,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 14. "P14,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 12. "P12,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 11. "P11,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 9. "P9,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 8. "P8,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 6. "P6,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 5. "P5,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 3. "P3,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 2. "P2,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 0. "P0,Level Interrupt Selection" "0,1"
|
|
rgroup.long 0xC8++0x3
|
|
line.long 0x0 "ELSR,Edge/Level Status Register"
|
|
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0,1"
|
|
wgroup.long 0xD0++0x7
|
|
line.long 0x0 "FELLSR,Falling Edge/Low-Level Select Register"
|
|
bitfld.long 0x0 31. "P31,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
line.long 0x4 "REHLSR,Rising Edge/High-Level Select Register"
|
|
bitfld.long 0x4 31. "P31,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 30. "P30,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 29. "P29,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 27. "P27,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 26. "P26,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 24. "P24,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 23. "P23,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 21. "P21,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 20. "P20,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 18. "P18,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 17. "P17,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 15. "P15,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 14. "P14,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 12. "P12,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 11. "P11,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 9. "P9,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 8. "P8,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 6. "P6,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 5. "P5,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 3. "P3,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 2. "P2,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 0. "P0,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
rgroup.long 0xD8++0x3
|
|
line.long 0x0 "FRLHSR,Fall/Rise - Low/High Status Register"
|
|
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0,1"
|
|
rgroup.long 0xE0++0x3
|
|
line.long 0x0 "LOCKSR,Lock Status"
|
|
bitfld.long 0x0 31. "P31,Lock Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Lock Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Lock Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Lock Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Lock Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Lock Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Lock Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Lock Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Lock Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Lock Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Lock Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Lock Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Lock Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Lock Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Lock Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Lock Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Lock Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Lock Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Lock Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Lock Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Lock Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Lock Status" "0,1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "SCHMITT,Schmitt Trigger Register"
|
|
bitfld.long 0x0 31. "SCHMITT31,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 30. "SCHMITT30,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 29. "SCHMITT29,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "SCHMITT28,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 27. "SCHMITT27,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 26. "SCHMITT26,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "SCHMITT25,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 24. "SCHMITT24,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 23. "SCHMITT23,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "SCHMITT22,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 21. "SCHMITT21,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 20. "SCHMITT20,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "SCHMITT19,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 18. "SCHMITT18,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 17. "SCHMITT17,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "SCHMITT16,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 15. "SCHMITT15,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 14. "SCHMITT14,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "SCHMITT13,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 12. "SCHMITT12,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 11. "SCHMITT11,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "SCHMITT10,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 9. "SCHMITT9,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 8. "SCHMITT8,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SCHMITT7,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 6. "SCHMITT6,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 5. "SCHMITT5,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "SCHMITT4,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 3. "SCHMITT3,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 2. "SCHMITT2,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SCHMITT1,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 0. "SCHMITT0,Schmitt Trigger Control" "0,1"
|
|
group.long 0x118++0x3
|
|
line.long 0x0 "DRIVER,I/O Drive Register"
|
|
bitfld.long 0x0 31. "LINE31,Drive of PIO Line 31" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 30. "LINE30,Drive of PIO Line 30" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 29. "LINE29,Drive of PIO Line 29" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 28. "LINE28,Drive of PIO Line 28" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 27. "LINE27,Drive of PIO Line 27" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 26. "LINE26,Drive of PIO Line 26" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 25. "LINE25,Drive of PIO Line 25" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 24. "LINE24,Drive of PIO Line 24" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 23. "LINE23,Drive of PIO Line 23" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 22. "LINE22,Drive of PIO Line 22" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 21. "LINE21,Drive of PIO Line 21" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 20. "LINE20,Drive of PIO Line 20" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 19. "LINE19,Drive of PIO Line 19" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 18. "LINE18,Drive of PIO Line 18" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 17. "LINE17,Drive of PIO Line 17" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 16. "LINE16,Drive of PIO Line 16" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 15. "LINE15,Drive of PIO Line 15" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 14. "LINE14,Drive of PIO Line 14" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 13. "LINE13,Drive of PIO Line 13" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 12. "LINE12,Drive of PIO Line 12" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 11. "LINE11,Drive of PIO Line 11" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 10. "LINE10,Drive of PIO Line 10" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 9. "LINE9,Drive of PIO Line 9" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 8. "LINE8,Drive of PIO Line 8" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 7. "LINE7,Drive of PIO Line 7" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 6. "LINE6,Drive of PIO Line 6" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 5. "LINE5,Drive of PIO Line 5" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 4. "LINE4,Drive of PIO Line 4" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 3. "LINE3,Drive of PIO Line 3" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 2. "LINE2,Drive of PIO Line 2" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 1. "LINE1,Drive of PIO Line 1" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 0. "LINE0,Drive of PIO Line 0" "0: Lowest drive,1: Highest drive"
|
|
group.long 0x150++0x3
|
|
line.long 0x0 "PCMR,Parallel Capture Mode Register"
|
|
bitfld.long 0x0 11. "FRSTS,Parallel Capture Mode First Sample" "0,1"
|
|
bitfld.long 0x0 10. "HALFS,Parallel Capture Mode Half Sampling" "0,1"
|
|
bitfld.long 0x0 9. "ALWYS,Parallel Capture Mode Always Sampling" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "DSIZE,Parallel Capture Mode Data Size" "0: The reception data in the PIO_PCRHR is a byte..,1: The reception data in the PIO_PCRHR is a..,2: The reception data in the PIO_PCRHR is a word..,?"
|
|
bitfld.long 0x0 0. "PCEN,Parallel Capture Mode Enable" "0,1"
|
|
wgroup.long 0x154++0x7
|
|
line.long 0x0 "PCIER,Parallel Capture Interrupt Enable Register"
|
|
bitfld.long 0x0 3. "RXBUFF,Reception Buffer Full Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "ENDRX,End of Reception Transfer Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Enable" "0,1"
|
|
line.long 0x4 "PCIDR,Parallel Capture Interrupt Disable Register"
|
|
bitfld.long 0x4 3. "RXBUFF,Reception Buffer Full Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "ENDRX,End of Reception Transfer Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Disable" "0,1"
|
|
rgroup.long 0x15C++0xB
|
|
line.long 0x0 "PCIMR,Parallel Capture Interrupt Mask Register"
|
|
bitfld.long 0x0 3. "RXBUFF,Reception Buffer Full Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "ENDRX,End of Reception Transfer Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Mask" "0,1"
|
|
line.long 0x4 "PCISR,Parallel Capture Interrupt Status Register"
|
|
bitfld.long 0x4 1. "OVRE,Parallel Capture Mode Overrun Error" "0,1"
|
|
bitfld.long 0x4 0. "DRDY,Parallel Capture Mode Data Ready" "0,1"
|
|
line.long 0x8 "PCRHR,Parallel Capture Reception Holding Register"
|
|
hexmask.long 0x8 0.--31. 1. "RDATA,Parallel Capture Mode Reception Data"
|
|
tree.end
|
|
sif (cpuis("PIC32CZ2051CA70144"))
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tree "PIOE"
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base ad:0x400E1600
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wgroup.long 0x0++0x7
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line.long 0x0 "PER,PIO Enable Register"
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bitfld.long 0x0 31. "P31,PIO Enable" "0,1"
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bitfld.long 0x0 30. "P30,PIO Enable" "0,1"
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bitfld.long 0x0 29. "P29,PIO Enable" "0,1"
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newline
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bitfld.long 0x0 28. "P28,PIO Enable" "0,1"
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bitfld.long 0x0 27. "P27,PIO Enable" "0,1"
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bitfld.long 0x0 26. "P26,PIO Enable" "0,1"
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newline
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bitfld.long 0x0 25. "P25,PIO Enable" "0,1"
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bitfld.long 0x0 24. "P24,PIO Enable" "0,1"
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bitfld.long 0x0 23. "P23,PIO Enable" "0,1"
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newline
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bitfld.long 0x0 22. "P22,PIO Enable" "0,1"
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bitfld.long 0x0 21. "P21,PIO Enable" "0,1"
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bitfld.long 0x0 20. "P20,PIO Enable" "0,1"
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newline
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bitfld.long 0x0 19. "P19,PIO Enable" "0,1"
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bitfld.long 0x0 18. "P18,PIO Enable" "0,1"
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bitfld.long 0x0 17. "P17,PIO Enable" "0,1"
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newline
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bitfld.long 0x0 16. "P16,PIO Enable" "0,1"
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bitfld.long 0x0 15. "P15,PIO Enable" "0,1"
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bitfld.long 0x0 14. "P14,PIO Enable" "0,1"
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newline
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bitfld.long 0x0 13. "P13,PIO Enable" "0,1"
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bitfld.long 0x0 12. "P12,PIO Enable" "0,1"
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bitfld.long 0x0 11. "P11,PIO Enable" "0,1"
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newline
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bitfld.long 0x0 10. "P10,PIO Enable" "0,1"
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bitfld.long 0x0 9. "P9,PIO Enable" "0,1"
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bitfld.long 0x0 8. "P8,PIO Enable" "0,1"
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newline
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bitfld.long 0x0 7. "P7,PIO Enable" "0,1"
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bitfld.long 0x0 6. "P6,PIO Enable" "0,1"
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bitfld.long 0x0 5. "P5,PIO Enable" "0,1"
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newline
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bitfld.long 0x0 4. "P4,PIO Enable" "0,1"
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bitfld.long 0x0 3. "P3,PIO Enable" "0,1"
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bitfld.long 0x0 2. "P2,PIO Enable" "0,1"
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newline
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bitfld.long 0x0 1. "P1,PIO Enable" "0,1"
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bitfld.long 0x0 0. "P0,PIO Enable" "0,1"
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line.long 0x4 "PDR,PIO Disable Register"
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bitfld.long 0x4 31. "P31,PIO Disable" "0,1"
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bitfld.long 0x4 30. "P30,PIO Disable" "0,1"
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bitfld.long 0x4 29. "P29,PIO Disable" "0,1"
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newline
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bitfld.long 0x4 28. "P28,PIO Disable" "0,1"
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bitfld.long 0x4 27. "P27,PIO Disable" "0,1"
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bitfld.long 0x4 26. "P26,PIO Disable" "0,1"
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newline
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bitfld.long 0x4 25. "P25,PIO Disable" "0,1"
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bitfld.long 0x4 24. "P24,PIO Disable" "0,1"
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bitfld.long 0x4 23. "P23,PIO Disable" "0,1"
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newline
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bitfld.long 0x4 22. "P22,PIO Disable" "0,1"
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bitfld.long 0x4 21. "P21,PIO Disable" "0,1"
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bitfld.long 0x4 20. "P20,PIO Disable" "0,1"
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newline
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bitfld.long 0x4 19. "P19,PIO Disable" "0,1"
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bitfld.long 0x4 18. "P18,PIO Disable" "0,1"
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bitfld.long 0x4 17. "P17,PIO Disable" "0,1"
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newline
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bitfld.long 0x4 16. "P16,PIO Disable" "0,1"
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bitfld.long 0x4 15. "P15,PIO Disable" "0,1"
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bitfld.long 0x4 14. "P14,PIO Disable" "0,1"
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newline
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bitfld.long 0x4 13. "P13,PIO Disable" "0,1"
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bitfld.long 0x4 12. "P12,PIO Disable" "0,1"
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bitfld.long 0x4 11. "P11,PIO Disable" "0,1"
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newline
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bitfld.long 0x4 10. "P10,PIO Disable" "0,1"
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bitfld.long 0x4 9. "P9,PIO Disable" "0,1"
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bitfld.long 0x4 8. "P8,PIO Disable" "0,1"
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newline
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bitfld.long 0x4 7. "P7,PIO Disable" "0,1"
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bitfld.long 0x4 6. "P6,PIO Disable" "0,1"
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bitfld.long 0x4 5. "P5,PIO Disable" "0,1"
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newline
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bitfld.long 0x4 4. "P4,PIO Disable" "0,1"
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bitfld.long 0x4 3. "P3,PIO Disable" "0,1"
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bitfld.long 0x4 2. "P2,PIO Disable" "0,1"
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newline
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bitfld.long 0x4 1. "P1,PIO Disable" "0,1"
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bitfld.long 0x4 0. "P0,PIO Disable" "0,1"
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rgroup.long 0x8++0x3
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line.long 0x0 "PSR,PIO Status Register"
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bitfld.long 0x0 31. "P31,PIO Status" "0,1"
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bitfld.long 0x0 30. "P30,PIO Status" "0,1"
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bitfld.long 0x0 29. "P29,PIO Status" "0,1"
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newline
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bitfld.long 0x0 28. "P28,PIO Status" "0,1"
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bitfld.long 0x0 27. "P27,PIO Status" "0,1"
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bitfld.long 0x0 26. "P26,PIO Status" "0,1"
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newline
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bitfld.long 0x0 25. "P25,PIO Status" "0,1"
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bitfld.long 0x0 24. "P24,PIO Status" "0,1"
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bitfld.long 0x0 23. "P23,PIO Status" "0,1"
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newline
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bitfld.long 0x0 22. "P22,PIO Status" "0,1"
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bitfld.long 0x0 21. "P21,PIO Status" "0,1"
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bitfld.long 0x0 20. "P20,PIO Status" "0,1"
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newline
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bitfld.long 0x0 19. "P19,PIO Status" "0,1"
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bitfld.long 0x0 18. "P18,PIO Status" "0,1"
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bitfld.long 0x0 17. "P17,PIO Status" "0,1"
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newline
|
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bitfld.long 0x0 16. "P16,PIO Status" "0,1"
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bitfld.long 0x0 15. "P15,PIO Status" "0,1"
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bitfld.long 0x0 14. "P14,PIO Status" "0,1"
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newline
|
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bitfld.long 0x0 13. "P13,PIO Status" "0,1"
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bitfld.long 0x0 12. "P12,PIO Status" "0,1"
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bitfld.long 0x0 11. "P11,PIO Status" "0,1"
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newline
|
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bitfld.long 0x0 10. "P10,PIO Status" "0,1"
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bitfld.long 0x0 9. "P9,PIO Status" "0,1"
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bitfld.long 0x0 8. "P8,PIO Status" "0,1"
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newline
|
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bitfld.long 0x0 7. "P7,PIO Status" "0,1"
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bitfld.long 0x0 6. "P6,PIO Status" "0,1"
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bitfld.long 0x0 5. "P5,PIO Status" "0,1"
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newline
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bitfld.long 0x0 4. "P4,PIO Status" "0,1"
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bitfld.long 0x0 3. "P3,PIO Status" "0,1"
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bitfld.long 0x0 2. "P2,PIO Status" "0,1"
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newline
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bitfld.long 0x0 1. "P1,PIO Status" "0,1"
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bitfld.long 0x0 0. "P0,PIO Status" "0,1"
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wgroup.long 0x10++0x7
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line.long 0x0 "OER,Output Enable Register"
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bitfld.long 0x0 31. "P31,Output Enable" "0,1"
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bitfld.long 0x0 30. "P30,Output Enable" "0,1"
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bitfld.long 0x0 29. "P29,Output Enable" "0,1"
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newline
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bitfld.long 0x0 28. "P28,Output Enable" "0,1"
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bitfld.long 0x0 27. "P27,Output Enable" "0,1"
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bitfld.long 0x0 26. "P26,Output Enable" "0,1"
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newline
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bitfld.long 0x0 25. "P25,Output Enable" "0,1"
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bitfld.long 0x0 24. "P24,Output Enable" "0,1"
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bitfld.long 0x0 23. "P23,Output Enable" "0,1"
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newline
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bitfld.long 0x0 22. "P22,Output Enable" "0,1"
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bitfld.long 0x0 21. "P21,Output Enable" "0,1"
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bitfld.long 0x0 20. "P20,Output Enable" "0,1"
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newline
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bitfld.long 0x0 19. "P19,Output Enable" "0,1"
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bitfld.long 0x0 18. "P18,Output Enable" "0,1"
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bitfld.long 0x0 17. "P17,Output Enable" "0,1"
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newline
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bitfld.long 0x0 16. "P16,Output Enable" "0,1"
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bitfld.long 0x0 15. "P15,Output Enable" "0,1"
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bitfld.long 0x0 14. "P14,Output Enable" "0,1"
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newline
|
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bitfld.long 0x0 13. "P13,Output Enable" "0,1"
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bitfld.long 0x0 12. "P12,Output Enable" "0,1"
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bitfld.long 0x0 11. "P11,Output Enable" "0,1"
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newline
|
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bitfld.long 0x0 10. "P10,Output Enable" "0,1"
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bitfld.long 0x0 9. "P9,Output Enable" "0,1"
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bitfld.long 0x0 8. "P8,Output Enable" "0,1"
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newline
|
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bitfld.long 0x0 7. "P7,Output Enable" "0,1"
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bitfld.long 0x0 6. "P6,Output Enable" "0,1"
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bitfld.long 0x0 5. "P5,Output Enable" "0,1"
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newline
|
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bitfld.long 0x0 4. "P4,Output Enable" "0,1"
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bitfld.long 0x0 3. "P3,Output Enable" "0,1"
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bitfld.long 0x0 2. "P2,Output Enable" "0,1"
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newline
|
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bitfld.long 0x0 1. "P1,Output Enable" "0,1"
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bitfld.long 0x0 0. "P0,Output Enable" "0,1"
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line.long 0x4 "ODR,Output Disable Register"
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bitfld.long 0x4 31. "P31,Output Disable" "0,1"
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bitfld.long 0x4 30. "P30,Output Disable" "0,1"
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bitfld.long 0x4 29. "P29,Output Disable" "0,1"
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newline
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bitfld.long 0x4 28. "P28,Output Disable" "0,1"
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bitfld.long 0x4 27. "P27,Output Disable" "0,1"
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bitfld.long 0x4 26. "P26,Output Disable" "0,1"
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newline
|
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bitfld.long 0x4 25. "P25,Output Disable" "0,1"
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bitfld.long 0x4 24. "P24,Output Disable" "0,1"
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bitfld.long 0x4 23. "P23,Output Disable" "0,1"
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newline
|
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bitfld.long 0x4 22. "P22,Output Disable" "0,1"
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bitfld.long 0x4 21. "P21,Output Disable" "0,1"
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bitfld.long 0x4 20. "P20,Output Disable" "0,1"
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newline
|
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bitfld.long 0x4 19. "P19,Output Disable" "0,1"
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bitfld.long 0x4 18. "P18,Output Disable" "0,1"
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bitfld.long 0x4 17. "P17,Output Disable" "0,1"
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newline
|
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bitfld.long 0x4 16. "P16,Output Disable" "0,1"
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bitfld.long 0x4 15. "P15,Output Disable" "0,1"
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bitfld.long 0x4 14. "P14,Output Disable" "0,1"
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newline
|
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bitfld.long 0x4 13. "P13,Output Disable" "0,1"
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bitfld.long 0x4 12. "P12,Output Disable" "0,1"
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bitfld.long 0x4 11. "P11,Output Disable" "0,1"
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newline
|
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bitfld.long 0x4 10. "P10,Output Disable" "0,1"
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bitfld.long 0x4 9. "P9,Output Disable" "0,1"
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bitfld.long 0x4 8. "P8,Output Disable" "0,1"
|
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newline
|
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bitfld.long 0x4 7. "P7,Output Disable" "0,1"
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bitfld.long 0x4 6. "P6,Output Disable" "0,1"
|
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bitfld.long 0x4 5. "P5,Output Disable" "0,1"
|
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newline
|
|
bitfld.long 0x4 4. "P4,Output Disable" "0,1"
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bitfld.long 0x4 3. "P3,Output Disable" "0,1"
|
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bitfld.long 0x4 2. "P2,Output Disable" "0,1"
|
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newline
|
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bitfld.long 0x4 1. "P1,Output Disable" "0,1"
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bitfld.long 0x4 0. "P0,Output Disable" "0,1"
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rgroup.long 0x18++0x3
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line.long 0x0 "OSR,Output Status Register"
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bitfld.long 0x0 31. "P31,Output Status" "0,1"
|
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bitfld.long 0x0 30. "P30,Output Status" "0,1"
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bitfld.long 0x0 29. "P29,Output Status" "0,1"
|
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newline
|
|
bitfld.long 0x0 28. "P28,Output Status" "0,1"
|
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bitfld.long 0x0 27. "P27,Output Status" "0,1"
|
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bitfld.long 0x0 26. "P26,Output Status" "0,1"
|
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newline
|
|
bitfld.long 0x0 25. "P25,Output Status" "0,1"
|
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bitfld.long 0x0 24. "P24,Output Status" "0,1"
|
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bitfld.long 0x0 23. "P23,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Status" "0,1"
|
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bitfld.long 0x0 21. "P21,Output Status" "0,1"
|
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bitfld.long 0x0 20. "P20,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Status" "0,1"
|
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bitfld.long 0x0 18. "P18,Output Status" "0,1"
|
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bitfld.long 0x0 17. "P17,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Status" "0,1"
|
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bitfld.long 0x0 14. "P14,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Status" "0,1"
|
|
wgroup.long 0x20++0x7
|
|
line.long 0x0 "IFER,Glitch Input Filter Enable Register"
|
|
bitfld.long 0x0 31. "P31,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Filter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Filter Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Filter Enable" "0,1"
|
|
line.long 0x4 "IFDR,Glitch Input Filter Disable Register"
|
|
bitfld.long 0x4 31. "P31,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Filter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Filter Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Filter Disable" "0,1"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "IFSR,Glitch Input Filter Status Register"
|
|
bitfld.long 0x0 31. "P31,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Filter Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Filter Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Filter Status" "0,1"
|
|
wgroup.long 0x30++0x7
|
|
line.long 0x0 "SODR,Set Output Data Register"
|
|
bitfld.long 0x0 31. "P31,Set Output Data" "0,1"
|
|
bitfld.long 0x0 30. "P30,Set Output Data" "0,1"
|
|
bitfld.long 0x0 29. "P29,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Set Output Data" "0,1"
|
|
bitfld.long 0x0 27. "P27,Set Output Data" "0,1"
|
|
bitfld.long 0x0 26. "P26,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Set Output Data" "0,1"
|
|
bitfld.long 0x0 24. "P24,Set Output Data" "0,1"
|
|
bitfld.long 0x0 23. "P23,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Set Output Data" "0,1"
|
|
bitfld.long 0x0 21. "P21,Set Output Data" "0,1"
|
|
bitfld.long 0x0 20. "P20,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Set Output Data" "0,1"
|
|
bitfld.long 0x0 18. "P18,Set Output Data" "0,1"
|
|
bitfld.long 0x0 17. "P17,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Set Output Data" "0,1"
|
|
bitfld.long 0x0 15. "P15,Set Output Data" "0,1"
|
|
bitfld.long 0x0 14. "P14,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Set Output Data" "0,1"
|
|
bitfld.long 0x0 12. "P12,Set Output Data" "0,1"
|
|
bitfld.long 0x0 11. "P11,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Set Output Data" "0,1"
|
|
bitfld.long 0x0 9. "P9,Set Output Data" "0,1"
|
|
bitfld.long 0x0 8. "P8,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Set Output Data" "0,1"
|
|
bitfld.long 0x0 6. "P6,Set Output Data" "0,1"
|
|
bitfld.long 0x0 5. "P5,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Set Output Data" "0,1"
|
|
bitfld.long 0x0 3. "P3,Set Output Data" "0,1"
|
|
bitfld.long 0x0 2. "P2,Set Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Set Output Data" "0,1"
|
|
bitfld.long 0x0 0. "P0,Set Output Data" "0,1"
|
|
line.long 0x4 "CODR,Clear Output Data Register"
|
|
bitfld.long 0x4 31. "P31,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 30. "P30,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 29. "P29,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 27. "P27,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 26. "P26,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 24. "P24,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 23. "P23,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 21. "P21,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 20. "P20,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 18. "P18,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 17. "P17,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 15. "P15,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 14. "P14,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 12. "P12,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 11. "P11,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 9. "P9,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 8. "P8,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 6. "P6,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 5. "P5,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 3. "P3,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 2. "P2,Clear Output Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Clear Output Data" "0,1"
|
|
bitfld.long 0x4 0. "P0,Clear Output Data" "0,1"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "ODSR,Output Data Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Data Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Data Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Data Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Data Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Data Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Data Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Data Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Data Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Data Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Data Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Data Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Data Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Data Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Data Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Data Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Data Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Data Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Data Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Data Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Data Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Data Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Data Status" "0,1"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x0 "PDSR,Pin Data Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Data Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Data Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Data Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Data Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Data Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Data Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Data Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Data Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Data Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Data Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Data Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Data Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Data Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Data Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Data Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Data Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Data Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Data Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Data Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Data Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Data Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Data Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Data Status" "0,1"
|
|
wgroup.long 0x40++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 31. "P31,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Change Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 31. "P31,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Change Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Change Interrupt Disable" "0,1"
|
|
rgroup.long 0x48++0x7
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 31. "P31,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 30. "P30,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 29. "P29,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 27. "P27,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 26. "P26,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 24. "P24,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 23. "P23,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 21. "P21,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 20. "P20,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 18. "P18,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 17. "P17,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 15. "P15,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 14. "P14,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 12. "P12,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 11. "P11,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 9. "P9,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 8. "P8,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 6. "P6,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 5. "P5,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 3. "P3,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "P2,Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Input Change Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 0. "P0,Input Change Interrupt Mask" "0,1"
|
|
line.long 0x4 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x4 31. "P31,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 30. "P30,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 29. "P29,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 27. "P27,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 26. "P26,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 24. "P24,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 23. "P23,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 21. "P21,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 20. "P20,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 18. "P18,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 17. "P17,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 15. "P15,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 14. "P14,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 12. "P12,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 11. "P11,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 9. "P9,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 8. "P8,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 6. "P6,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 5. "P5,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 3. "P3,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 2. "P2,Input Change Interrupt Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Input Change Interrupt Status" "0,1"
|
|
bitfld.long 0x4 0. "P0,Input Change Interrupt Status" "0,1"
|
|
wgroup.long 0x50++0x7
|
|
line.long 0x0 "MDER,Multi-driver Enable Register"
|
|
bitfld.long 0x0 31. "P31,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Multi-drive Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Multi-drive Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Multi-drive Enable" "0,1"
|
|
line.long 0x4 "MDDR,Multi-driver Disable Register"
|
|
bitfld.long 0x4 31. "P31,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Multi-drive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Multi-drive Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Multi-drive Disable" "0,1"
|
|
rgroup.long 0x58++0x3
|
|
line.long 0x0 "MDSR,Multi-driver Status Register"
|
|
bitfld.long 0x0 31. "P31,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Multi-drive Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Multi-drive Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Multi-drive Status" "0,1"
|
|
wgroup.long 0x60++0x7
|
|
line.long 0x0 "PUDR,Pull-up Disable Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Up Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Up Disable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Up Disable" "0,1"
|
|
line.long 0x4 "PUER,Pull-up Enable Register"
|
|
bitfld.long 0x4 31. "P31,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Pull-Up Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Pull-Up Enable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Pull-Up Enable" "0,1"
|
|
rgroup.long 0x68++0x3
|
|
line.long 0x0 "PUSR,Pad Pull-up Status Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Up Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Up Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Up Status" "0,1"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x70)++0x3
|
|
line.long 0x0 "ABCDSR[$1],Peripheral ABCD Select Register 0"
|
|
bitfld.long 0x0 31. "P31,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 30. "P30,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 29. "P29,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 27. "P27,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 26. "P26,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 24. "P24,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 23. "P23,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 21. "P21,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 20. "P20,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 18. "P18,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 17. "P17,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 15. "P15,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 14. "P14,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 12. "P12,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 11. "P11,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 9. "P9,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 8. "P8,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 6. "P6,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 5. "P5,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 3. "P3,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 2. "P2,Peripheral Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 0. "P0,Peripheral Select" "0,1"
|
|
repeat.end
|
|
wgroup.long 0x80++0x7
|
|
line.long 0x0 "IFSCDR,Input Filter Slow Clock Disable Register"
|
|
bitfld.long 0x0 31. "P31,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 30. "P30,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 29. "P29,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 27. "P27,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 26. "P26,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 24. "P24,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 23. "P23,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 21. "P21,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 20. "P20,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 18. "P18,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 17. "P17,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 15. "P15,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 14. "P14,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 12. "P12,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 11. "P11,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 9. "P9,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 8. "P8,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 6. "P6,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 5. "P5,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 3. "P3,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 2. "P2,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
bitfld.long 0x0 0. "P0,Peripheral Clock Glitch Filtering Select" "0,1"
|
|
line.long 0x4 "IFSCER,Input Filter Slow Clock Enable Register"
|
|
bitfld.long 0x4 31. "P31,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 30. "P30,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 29. "P29,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 27. "P27,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 26. "P26,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 24. "P24,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 23. "P23,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 21. "P21,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 20. "P20,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 18. "P18,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 17. "P17,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 15. "P15,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 14. "P14,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 12. "P12,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 11. "P11,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 9. "P9,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 8. "P8,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 6. "P6,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 5. "P5,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 3. "P3,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 2. "P2,Slow Clock Debouncing Filtering Select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Slow Clock Debouncing Filtering Select" "0,1"
|
|
bitfld.long 0x4 0. "P0,Slow Clock Debouncing Filtering Select" "0,1"
|
|
rgroup.long 0x88++0x3
|
|
line.long 0x0 "IFSCSR,Input Filter Slow Clock Status Register"
|
|
bitfld.long 0x0 31. "P31,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Glitch or Debouncing Filter Selection Status" "0,1"
|
|
group.long 0x8C++0x3
|
|
line.long 0x0 "SCDR,Slow Clock Divider Debouncing Register"
|
|
hexmask.long.word 0x0 0.--13. 1. "DIV,Slow Clock Divider Selection for Debouncing"
|
|
wgroup.long 0x90++0x7
|
|
line.long 0x0 "PPDDR,Pad Pull-down Disable Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Down Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Down Disable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Down Disable" "0,1"
|
|
line.long 0x4 "PPDER,Pad Pull-down Enable Register"
|
|
bitfld.long 0x4 31. "P31,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Pull-Down Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Pull-Down Enable" "0,1"
|
|
rgroup.long 0x98++0x3
|
|
line.long 0x0 "PPDSR,Pad Pull-down Status Register"
|
|
bitfld.long 0x0 31. "P31,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Pull-Down Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Pull-Down Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Pull-Down Status" "0,1"
|
|
wgroup.long 0xA0++0x7
|
|
line.long 0x0 "OWER,Output Write Enable"
|
|
bitfld.long 0x0 31. "P31,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Write Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Write Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Write Enable" "0,1"
|
|
line.long 0x4 "OWDR,Output Write Disable"
|
|
bitfld.long 0x4 31. "P31,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Output Write Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Output Write Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Output Write Disable" "0,1"
|
|
rgroup.long 0xA8++0x3
|
|
line.long 0x0 "OWSR,Output Write Status Register"
|
|
bitfld.long 0x0 31. "P31,Output Write Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Output Write Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Output Write Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Output Write Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Output Write Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Output Write Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Output Write Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Output Write Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Output Write Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Output Write Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Output Write Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Output Write Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Output Write Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Output Write Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Output Write Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Output Write Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Output Write Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Output Write Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Output Write Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Output Write Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Output Write Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Output Write Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Output Write Status" "0,1"
|
|
wgroup.long 0xB0++0x7
|
|
line.long 0x0 "AIMER,Additional Interrupt Modes Enable Register"
|
|
bitfld.long 0x0 31. "P31,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 30. "P30,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 29. "P29,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 27. "P27,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 26. "P26,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 24. "P24,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 23. "P23,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 21. "P21,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 20. "P20,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 18. "P18,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 17. "P17,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 15. "P15,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 14. "P14,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 12. "P12,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 11. "P11,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 9. "P9,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 8. "P8,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 6. "P6,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 5. "P5,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 3. "P3,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 2. "P2,Additional Interrupt Modes Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Additional Interrupt Modes Enable" "0,1"
|
|
bitfld.long 0x0 0. "P0,Additional Interrupt Modes Enable" "0,1"
|
|
line.long 0x4 "AIMDR,Additional Interrupt Modes Disable Register"
|
|
bitfld.long 0x4 31. "P31,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 30. "P30,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 29. "P29,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 27. "P27,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 26. "P26,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 24. "P24,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 23. "P23,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 21. "P21,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 20. "P20,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 18. "P18,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 17. "P17,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 15. "P15,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 14. "P14,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 12. "P12,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 11. "P11,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 9. "P9,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 8. "P8,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 6. "P6,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 5. "P5,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 3. "P3,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 2. "P2,Additional Interrupt Modes Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Additional Interrupt Modes Disable" "0,1"
|
|
bitfld.long 0x4 0. "P0,Additional Interrupt Modes Disable" "0,1"
|
|
rgroup.long 0xB8++0x3
|
|
line.long 0x0 "AIMMR,Additional Interrupt Modes Mask Register"
|
|
bitfld.long 0x0 31. "P31,IO Line Index" "0,1"
|
|
bitfld.long 0x0 30. "P30,IO Line Index" "0,1"
|
|
bitfld.long 0x0 29. "P29,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,IO Line Index" "0,1"
|
|
bitfld.long 0x0 27. "P27,IO Line Index" "0,1"
|
|
bitfld.long 0x0 26. "P26,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,IO Line Index" "0,1"
|
|
bitfld.long 0x0 24. "P24,IO Line Index" "0,1"
|
|
bitfld.long 0x0 23. "P23,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,IO Line Index" "0,1"
|
|
bitfld.long 0x0 21. "P21,IO Line Index" "0,1"
|
|
bitfld.long 0x0 20. "P20,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,IO Line Index" "0,1"
|
|
bitfld.long 0x0 18. "P18,IO Line Index" "0,1"
|
|
bitfld.long 0x0 17. "P17,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,IO Line Index" "0,1"
|
|
bitfld.long 0x0 15. "P15,IO Line Index" "0,1"
|
|
bitfld.long 0x0 14. "P14,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,IO Line Index" "0,1"
|
|
bitfld.long 0x0 12. "P12,IO Line Index" "0,1"
|
|
bitfld.long 0x0 11. "P11,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,IO Line Index" "0,1"
|
|
bitfld.long 0x0 9. "P9,IO Line Index" "0,1"
|
|
bitfld.long 0x0 8. "P8,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,IO Line Index" "0,1"
|
|
bitfld.long 0x0 6. "P6,IO Line Index" "0,1"
|
|
bitfld.long 0x0 5. "P5,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,IO Line Index" "0,1"
|
|
bitfld.long 0x0 3. "P3,IO Line Index" "0,1"
|
|
bitfld.long 0x0 2. "P2,IO Line Index" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,IO Line Index" "0,1"
|
|
bitfld.long 0x0 0. "P0,IO Line Index" "0,1"
|
|
wgroup.long 0xC0++0x7
|
|
line.long 0x0 "ESR,Edge Select Register"
|
|
bitfld.long 0x0 31. "P31,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge Interrupt Selection" "0,1"
|
|
line.long 0x4 "LSR,Level Select Register"
|
|
bitfld.long 0x4 31. "P31,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 30. "P30,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 29. "P29,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 27. "P27,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 26. "P26,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 24. "P24,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 23. "P23,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 21. "P21,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 20. "P20,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 18. "P18,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 17. "P17,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 15. "P15,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 14. "P14,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 12. "P12,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 11. "P11,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 9. "P9,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 8. "P8,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 6. "P6,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 5. "P5,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 3. "P3,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 2. "P2,Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 0. "P0,Level Interrupt Selection" "0,1"
|
|
rgroup.long 0xC8++0x3
|
|
line.long 0x0 "ELSR,Edge/Level Status Register"
|
|
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0,1"
|
|
wgroup.long 0xD0++0x7
|
|
line.long 0x0 "FELLSR,Falling Edge/Low-Level Select Register"
|
|
bitfld.long 0x0 31. "P31,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Falling Edge/Low-Level Interrupt Selection" "0,1"
|
|
line.long 0x4 "REHLSR,Rising Edge/High-Level Select Register"
|
|
bitfld.long 0x4 31. "P31,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 30. "P30,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 29. "P29,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "P28,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 27. "P27,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 26. "P26,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "P25,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 24. "P24,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 23. "P23,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "P22,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 21. "P21,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 20. "P20,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "P19,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 18. "P18,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 17. "P17,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "P16,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 15. "P15,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 14. "P14,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "P13,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 12. "P12,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 11. "P11,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "P10,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 9. "P9,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 8. "P8,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "P7,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 6. "P6,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 5. "P5,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "P4,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 3. "P3,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 2. "P2,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "P1,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
bitfld.long 0x4 0. "P0,Rising Edge/High-Level Interrupt Selection" "0,1"
|
|
rgroup.long 0xD8++0x3
|
|
line.long 0x0 "FRLHSR,Fall/Rise - Low/High Status Register"
|
|
bitfld.long 0x0 31. "P31,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 30. "P30,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 29. "P29,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 27. "P27,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 26. "P26,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 24. "P24,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 23. "P23,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 21. "P21,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 20. "P20,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 18. "P18,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 17. "P17,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 15. "P15,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 14. "P14,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 12. "P12,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 11. "P11,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 9. "P9,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 8. "P8,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 6. "P6,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 5. "P5,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 3. "P3,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 2. "P2,Edge/Level Interrupt Source Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Edge/Level Interrupt Source Selection" "0,1"
|
|
bitfld.long 0x0 0. "P0,Edge/Level Interrupt Source Selection" "0,1"
|
|
rgroup.long 0xE0++0x3
|
|
line.long 0x0 "LOCKSR,Lock Status"
|
|
bitfld.long 0x0 31. "P31,Lock Status" "0,1"
|
|
bitfld.long 0x0 30. "P30,Lock Status" "0,1"
|
|
bitfld.long 0x0 29. "P29,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "P28,Lock Status" "0,1"
|
|
bitfld.long 0x0 27. "P27,Lock Status" "0,1"
|
|
bitfld.long 0x0 26. "P26,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "P25,Lock Status" "0,1"
|
|
bitfld.long 0x0 24. "P24,Lock Status" "0,1"
|
|
bitfld.long 0x0 23. "P23,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22,Lock Status" "0,1"
|
|
bitfld.long 0x0 21. "P21,Lock Status" "0,1"
|
|
bitfld.long 0x0 20. "P20,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "P19,Lock Status" "0,1"
|
|
bitfld.long 0x0 18. "P18,Lock Status" "0,1"
|
|
bitfld.long 0x0 17. "P17,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "P16,Lock Status" "0,1"
|
|
bitfld.long 0x0 15. "P15,Lock Status" "0,1"
|
|
bitfld.long 0x0 14. "P14,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13,Lock Status" "0,1"
|
|
bitfld.long 0x0 12. "P12,Lock Status" "0,1"
|
|
bitfld.long 0x0 11. "P11,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "P10,Lock Status" "0,1"
|
|
bitfld.long 0x0 9. "P9,Lock Status" "0,1"
|
|
bitfld.long 0x0 8. "P8,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "P7,Lock Status" "0,1"
|
|
bitfld.long 0x0 6. "P6,Lock Status" "0,1"
|
|
bitfld.long 0x0 5. "P5,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4,Lock Status" "0,1"
|
|
bitfld.long 0x0 3. "P3,Lock Status" "0,1"
|
|
bitfld.long 0x0 2. "P2,Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "P1,Lock Status" "0,1"
|
|
bitfld.long 0x0 0. "P0,Lock Status" "0,1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "SCHMITT,Schmitt Trigger Register"
|
|
bitfld.long 0x0 31. "SCHMITT31,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 30. "SCHMITT30,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 29. "SCHMITT29,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "SCHMITT28,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 27. "SCHMITT27,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 26. "SCHMITT26,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "SCHMITT25,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 24. "SCHMITT24,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 23. "SCHMITT23,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "SCHMITT22,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 21. "SCHMITT21,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 20. "SCHMITT20,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "SCHMITT19,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 18. "SCHMITT18,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 17. "SCHMITT17,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "SCHMITT16,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 15. "SCHMITT15,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 14. "SCHMITT14,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "SCHMITT13,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 12. "SCHMITT12,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 11. "SCHMITT11,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "SCHMITT10,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 9. "SCHMITT9,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 8. "SCHMITT8,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SCHMITT7,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 6. "SCHMITT6,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 5. "SCHMITT5,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "SCHMITT4,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 3. "SCHMITT3,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 2. "SCHMITT2,Schmitt Trigger Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SCHMITT1,Schmitt Trigger Control" "0,1"
|
|
bitfld.long 0x0 0. "SCHMITT0,Schmitt Trigger Control" "0,1"
|
|
group.long 0x118++0x3
|
|
line.long 0x0 "DRIVER,I/O Drive Register"
|
|
bitfld.long 0x0 31. "LINE31,Drive of PIO Line 31" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 30. "LINE30,Drive of PIO Line 30" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 29. "LINE29,Drive of PIO Line 29" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 28. "LINE28,Drive of PIO Line 28" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 27. "LINE27,Drive of PIO Line 27" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 26. "LINE26,Drive of PIO Line 26" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 25. "LINE25,Drive of PIO Line 25" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 24. "LINE24,Drive of PIO Line 24" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 23. "LINE23,Drive of PIO Line 23" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 22. "LINE22,Drive of PIO Line 22" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 21. "LINE21,Drive of PIO Line 21" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 20. "LINE20,Drive of PIO Line 20" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 19. "LINE19,Drive of PIO Line 19" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 18. "LINE18,Drive of PIO Line 18" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 17. "LINE17,Drive of PIO Line 17" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 16. "LINE16,Drive of PIO Line 16" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 15. "LINE15,Drive of PIO Line 15" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 14. "LINE14,Drive of PIO Line 14" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 13. "LINE13,Drive of PIO Line 13" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 12. "LINE12,Drive of PIO Line 12" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 11. "LINE11,Drive of PIO Line 11" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 10. "LINE10,Drive of PIO Line 10" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 9. "LINE9,Drive of PIO Line 9" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 8. "LINE8,Drive of PIO Line 8" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 7. "LINE7,Drive of PIO Line 7" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 6. "LINE6,Drive of PIO Line 6" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 5. "LINE5,Drive of PIO Line 5" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 4. "LINE4,Drive of PIO Line 4" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 3. "LINE3,Drive of PIO Line 3" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 2. "LINE2,Drive of PIO Line 2" "0: Lowest drive,1: Highest drive"
|
|
newline
|
|
bitfld.long 0x0 1. "LINE1,Drive of PIO Line 1" "0: Lowest drive,1: Highest drive"
|
|
bitfld.long 0x0 0. "LINE0,Drive of PIO Line 0" "0: Lowest drive,1: Highest drive"
|
|
group.long 0x150++0x3
|
|
line.long 0x0 "PCMR,Parallel Capture Mode Register"
|
|
bitfld.long 0x0 11. "FRSTS,Parallel Capture Mode First Sample" "0,1"
|
|
bitfld.long 0x0 10. "HALFS,Parallel Capture Mode Half Sampling" "0,1"
|
|
bitfld.long 0x0 9. "ALWYS,Parallel Capture Mode Always Sampling" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "DSIZE,Parallel Capture Mode Data Size" "0: The reception data in the PIO_PCRHR is a byte..,1: The reception data in the PIO_PCRHR is a..,2: The reception data in the PIO_PCRHR is a word..,?"
|
|
bitfld.long 0x0 0. "PCEN,Parallel Capture Mode Enable" "0,1"
|
|
wgroup.long 0x154++0x7
|
|
line.long 0x0 "PCIER,Parallel Capture Interrupt Enable Register"
|
|
bitfld.long 0x0 3. "RXBUFF,Reception Buffer Full Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "ENDRX,End of Reception Transfer Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Enable" "0,1"
|
|
line.long 0x4 "PCIDR,Parallel Capture Interrupt Disable Register"
|
|
bitfld.long 0x4 3. "RXBUFF,Reception Buffer Full Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "ENDRX,End of Reception Transfer Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Disable" "0,1"
|
|
rgroup.long 0x15C++0xB
|
|
line.long 0x0 "PCIMR,Parallel Capture Interrupt Mask Register"
|
|
bitfld.long 0x0 3. "RXBUFF,Reception Buffer Full Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "ENDRX,End of Reception Transfer Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 1. "OVRE,Parallel Capture Mode Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DRDY,Parallel Capture Mode Data Ready Interrupt Mask" "0,1"
|
|
line.long 0x4 "PCISR,Parallel Capture Interrupt Status Register"
|
|
bitfld.long 0x4 1. "OVRE,Parallel Capture Mode Overrun Error" "0,1"
|
|
bitfld.long 0x4 0. "DRDY,Parallel Capture Mode Data Ready" "0,1"
|
|
line.long 0x8 "PCRHR,Parallel Capture Reception Holding Register"
|
|
hexmask.long 0x8 0.--31. 1. "RDATA,Parallel Capture Mode Reception Data"
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "PMC (Power Management Controller)"
|
|
base ad:0x400E0600
|
|
wgroup.long 0x0++0x7
|
|
line.long 0x0 "SCER,System Clock Enable Register"
|
|
bitfld.long 0x0 15. "PCK7,Programmable Clock 7 Output Enable" "0,1"
|
|
bitfld.long 0x0 14. "PCK6,Programmable Clock 6 Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "PCK5,Programmable Clock 5 Output Enable" "0,1"
|
|
bitfld.long 0x0 12. "PCK4,Programmable Clock 4 Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "PCK3,Programmable Clock 3 Output Enable" "0,1"
|
|
bitfld.long 0x0 10. "PCK2,Programmable Clock 2 Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "PCK1,Programmable Clock 1 Output Enable" "0,1"
|
|
bitfld.long 0x0 8. "PCK0,Programmable Clock 0 Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "USBCLK,Enable USB FS Clock" "0,1"
|
|
line.long 0x4 "SCDR,System Clock Disable Register"
|
|
bitfld.long 0x4 15. "PCK7,Programmable Clock 7 Output Disable" "0,1"
|
|
bitfld.long 0x4 14. "PCK6,Programmable Clock 6 Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "PCK5,Programmable Clock 5 Output Disable" "0,1"
|
|
bitfld.long 0x4 12. "PCK4,Programmable Clock 4 Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "PCK3,Programmable Clock 3 Output Disable" "0,1"
|
|
bitfld.long 0x4 10. "PCK2,Programmable Clock 2 Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "PCK1,Programmable Clock 1 Output Disable" "0,1"
|
|
bitfld.long 0x4 8. "PCK0,Programmable Clock 0 Output Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "USBCLK,Disable USB FS Clock" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "SCSR,System Clock Status Register"
|
|
bitfld.long 0x0 15. "PCK7,Programmable Clock 7 Output Status" "0,1"
|
|
bitfld.long 0x0 14. "PCK6,Programmable Clock 6 Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "PCK5,Programmable Clock 5 Output Status" "0,1"
|
|
bitfld.long 0x0 12. "PCK4,Programmable Clock 4 Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "PCK3,Programmable Clock 3 Output Status" "0,1"
|
|
bitfld.long 0x0 10. "PCK2,Programmable Clock 2 Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "PCK1,Programmable Clock 1 Output Status" "0,1"
|
|
bitfld.long 0x0 8. "PCK0,Programmable Clock 0 Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "USBCLK,USB FS Clock Status" "0,1"
|
|
bitfld.long 0x0 0. "HCLKS,HCLK Status" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "PCER0,Peripheral Clock Enable Register 0"
|
|
bitfld.long 0x0 31. "PID31,Peripheral Clock 31 Enable" "0,1"
|
|
bitfld.long 0x0 30. "PID30,Peripheral Clock 30 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "PID29,Peripheral Clock 29 Enable" "0,1"
|
|
bitfld.long 0x0 28. "PID28,Peripheral Clock 28 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "PID27,Peripheral Clock 27 Enable" "0,1"
|
|
bitfld.long 0x0 26. "PID26,Peripheral Clock 26 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "PID25,Peripheral Clock 25 Enable" "0,1"
|
|
bitfld.long 0x0 24. "PID24,Peripheral Clock 24 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "PID23,Peripheral Clock 23 Enable" "0,1"
|
|
bitfld.long 0x0 22. "PID22,Peripheral Clock 22 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "PID21,Peripheral Clock 21 Enable" "0,1"
|
|
bitfld.long 0x0 20. "PID20,Peripheral Clock 20 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "PID19,Peripheral Clock 19 Enable" "0,1"
|
|
bitfld.long 0x0 18. "PID18,Peripheral Clock 18 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "PID17,Peripheral Clock 17 Enable" "0,1"
|
|
bitfld.long 0x0 16. "PID16,Peripheral Clock 16 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "PID15,Peripheral Clock 15 Enable" "0,1"
|
|
bitfld.long 0x0 14. "PID14,Peripheral Clock 14 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "PID13,Peripheral Clock 13 Enable" "0,1"
|
|
bitfld.long 0x0 12. "PID12,Peripheral Clock 12 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "PID11,Peripheral Clock 11 Enable" "0,1"
|
|
bitfld.long 0x0 10. "PID10,Peripheral Clock 10 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "PID9,Peripheral Clock 9 Enable" "0,1"
|
|
bitfld.long 0x0 8. "PID8,Peripheral Clock 8 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PID7,Peripheral Clock 7 Enable" "0,1"
|
|
line.long 0x4 "PCDR0,Peripheral Clock Disable Register 0"
|
|
bitfld.long 0x4 31. "PID31,Peripheral Clock 31 Disable" "0,1"
|
|
bitfld.long 0x4 30. "PID30,Peripheral Clock 30 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "PID29,Peripheral Clock 29 Disable" "0,1"
|
|
bitfld.long 0x4 28. "PID28,Peripheral Clock 28 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "PID27,Peripheral Clock 27 Disable" "0,1"
|
|
bitfld.long 0x4 26. "PID26,Peripheral Clock 26 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "PID25,Peripheral Clock 25 Disable" "0,1"
|
|
bitfld.long 0x4 24. "PID24,Peripheral Clock 24 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "PID23,Peripheral Clock 23 Disable" "0,1"
|
|
bitfld.long 0x4 22. "PID22,Peripheral Clock 22 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "PID21,Peripheral Clock 21 Disable" "0,1"
|
|
bitfld.long 0x4 20. "PID20,Peripheral Clock 20 Disable" "0,1"
|
|
newline
|
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bitfld.long 0x4 19. "PID19,Peripheral Clock 19 Disable" "0,1"
|
|
bitfld.long 0x4 18. "PID18,Peripheral Clock 18 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "PID17,Peripheral Clock 17 Disable" "0,1"
|
|
bitfld.long 0x4 16. "PID16,Peripheral Clock 16 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "PID15,Peripheral Clock 15 Disable" "0,1"
|
|
bitfld.long 0x4 14. "PID14,Peripheral Clock 14 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "PID13,Peripheral Clock 13 Disable" "0,1"
|
|
bitfld.long 0x4 12. "PID12,Peripheral Clock 12 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "PID11,Peripheral Clock 11 Disable" "0,1"
|
|
bitfld.long 0x4 10. "PID10,Peripheral Clock 10 Disable" "0,1"
|
|
newline
|
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bitfld.long 0x4 9. "PID9,Peripheral Clock 9 Disable" "0,1"
|
|
bitfld.long 0x4 8. "PID8,Peripheral Clock 8 Disable" "0,1"
|
|
newline
|
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bitfld.long 0x4 7. "PID7,Peripheral Clock 7 Disable" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "PCSR0,Peripheral Clock Status Register 0"
|
|
bitfld.long 0x0 31. "PID31,Peripheral Clock 31 Status" "0,1"
|
|
bitfld.long 0x0 30. "PID30,Peripheral Clock 30 Status" "0,1"
|
|
newline
|
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bitfld.long 0x0 29. "PID29,Peripheral Clock 29 Status" "0,1"
|
|
bitfld.long 0x0 28. "PID28,Peripheral Clock 28 Status" "0,1"
|
|
newline
|
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bitfld.long 0x0 27. "PID27,Peripheral Clock 27 Status" "0,1"
|
|
bitfld.long 0x0 26. "PID26,Peripheral Clock 26 Status" "0,1"
|
|
newline
|
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bitfld.long 0x0 25. "PID25,Peripheral Clock 25 Status" "0,1"
|
|
bitfld.long 0x0 24. "PID24,Peripheral Clock 24 Status" "0,1"
|
|
newline
|
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bitfld.long 0x0 23. "PID23,Peripheral Clock 23 Status" "0,1"
|
|
bitfld.long 0x0 22. "PID22,Peripheral Clock 22 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "PID21,Peripheral Clock 21 Status" "0,1"
|
|
bitfld.long 0x0 20. "PID20,Peripheral Clock 20 Status" "0,1"
|
|
newline
|
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bitfld.long 0x0 19. "PID19,Peripheral Clock 19 Status" "0,1"
|
|
bitfld.long 0x0 18. "PID18,Peripheral Clock 18 Status" "0,1"
|
|
newline
|
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bitfld.long 0x0 17. "PID17,Peripheral Clock 17 Status" "0,1"
|
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bitfld.long 0x0 16. "PID16,Peripheral Clock 16 Status" "0,1"
|
|
newline
|
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bitfld.long 0x0 15. "PID15,Peripheral Clock 15 Status" "0,1"
|
|
bitfld.long 0x0 14. "PID14,Peripheral Clock 14 Status" "0,1"
|
|
newline
|
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bitfld.long 0x0 13. "PID13,Peripheral Clock 13 Status" "0,1"
|
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bitfld.long 0x0 12. "PID12,Peripheral Clock 12 Status" "0,1"
|
|
newline
|
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bitfld.long 0x0 11. "PID11,Peripheral Clock 11 Status" "0,1"
|
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bitfld.long 0x0 10. "PID10,Peripheral Clock 10 Status" "0,1"
|
|
newline
|
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bitfld.long 0x0 9. "PID9,Peripheral Clock 9 Status" "0,1"
|
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bitfld.long 0x0 8. "PID8,Peripheral Clock 8 Status" "0,1"
|
|
newline
|
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bitfld.long 0x0 7. "PID7,Peripheral Clock 7 Status" "0,1"
|
|
group.long 0x1C++0xF
|
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line.long 0x0 "CKGR_UCKR,UTMI Clock Register"
|
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hexmask.long.byte 0x0 20.--23. 1. "UPLLCOUNT,UTMI PLL Start-up Time"
|
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bitfld.long 0x0 16. "UPLLEN,UTMI PLL Enable" "0,1"
|
|
line.long 0x4 "CKGR_MOR,Main Oscillator Register"
|
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bitfld.long 0x4 26. "XT32KFME,32.768 kHz Crystal Oscillator Frequency Monitoring Enable" "0,1"
|
|
bitfld.long 0x4 25. "CFDEN,Clock Failure Detector Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "MOSCSEL,Main Clock Oscillator Selection" "0,1"
|
|
hexmask.long.byte 0x4 16.--23. 1. "KEY,Write Access Password"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "MOSCXTST,Main Crystal Oscillator Startup Time"
|
|
bitfld.long 0x4 4.--6. "MOSCRCF,Main RC Oscillator Frequency Selection" "0: The RC oscillator frequency is at 4 MHz,1: The RC oscillator frequency is at 8 MHz,2: The RC oscillator frequency is at 12 MHz,?,?,?,?,?"
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|
newline
|
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bitfld.long 0x4 3. "MOSCRCEN,Main RC Oscillator Enable" "0,1"
|
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bitfld.long 0x4 2. "WAITMODE,Wait Mode Command (Write-only)" "0,1"
|
|
newline
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bitfld.long 0x4 1. "MOSCXTBY,Main Crystal Oscillator Bypass" "0,1"
|
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bitfld.long 0x4 0. "MOSCXTEN,Main Crystal Oscillator Enable" "0,1"
|
|
line.long 0x8 "CKGR_MCFR,Main Clock Frequency Register"
|
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bitfld.long 0x8 24. "CCSS,Counter Clock Source Selection" "0,1"
|
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bitfld.long 0x8 20. "RCMEAS,RC Oscillator Frequency Measure (write-only)" "0,1"
|
|
newline
|
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bitfld.long 0x8 16. "MAINFRDY,Main Clock Frequency Measure Ready" "0,1"
|
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hexmask.long.word 0x8 0.--15. 1. "MAINF,Main Clock Frequency"
|
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line.long 0xC "CKGR_PLLAR,PLLA Register"
|
|
bitfld.long 0xC 29. "ONE,Must Be Set to 1" "0,1"
|
|
hexmask.long.word 0xC 16.--26. 1. "MULA,PLLA Multiplier"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--13. 1. "PLLACOUNT,PLLA Counter"
|
|
hexmask.long.byte 0xC 0.--7. 1. "DIVA,PLLA Front End Divider"
|
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group.long 0x30++0x3
|
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line.long 0x0 "MCKR,Master Clock Register"
|
|
bitfld.long 0x0 13. "UPLLDIV2,UPLL Divider by 2" "0,1"
|
|
bitfld.long 0x0 8.--9. "MDIV,Master Clock Division" "0: Master Clock is Prescaler Output Clock divided..,1: Master Clock is Prescaler Output Clock divided..,2: Master Clock is Prescaler Output Clock divided..,3: Master Clock is Prescaler Output Clock divided.."
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|
newline
|
|
bitfld.long 0x0 4.--6. "PRES,Processor Clock Prescaler" "0: Selected clock,1: Selected clock divided by 2,2: Selected clock divided by 4,3: Selected clock divided by 8,4: Selected clock divided by 16,5: Selected clock divided by 32,6: Selected clock divided by 64,7: Selected clock divided by 3"
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bitfld.long 0x0 0.--1. "CSS,Master Clock Source Selection" "0: Slow Clock is selected,1: Main Clock is selected,2: PLLA Clock is selected,3: Divided UPLL Clock is selected"
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group.long 0x38++0x3
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line.long 0x0 "USB,USB Clock Register"
|
|
hexmask.long.byte 0x0 8.--11. 1. "USBDIV,Divider for USB_48M"
|
|
bitfld.long 0x0 0. "USBS,USB Input Clock Selection" "0,1"
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x40)++0x3
|
|
line.long 0x0 "PCK[$1],Programmable Clock Register"
|
|
hexmask.long.byte 0x0 4.--11. 1. "PRES,Programmable Clock Prescaler"
|
|
bitfld.long 0x0 0.--2. "CSS,Programmable Clock Source Selection" "0: SLCK is selected,1: MAINCK is selected,2: PLLACK is selected,3: UPLLCKDIV is selected,4: MCK is selected,?,?,?"
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|
repeat.end
|
|
wgroup.long 0x60++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 21. "XT32KERR,32.768 kHz Crystal Oscillator Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 18. "CFDEV,Clock Failure Detector Event Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x0 17. "MOSCRCS,Main RC Oscillator Status Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 16. "MOSCSELS,Main Clock Source Oscillator Selection Status Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "PCKRDY7,Programmable Clock Ready 7 Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 14. "PCKRDY6,Programmable Clock Ready 6 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "PCKRDY5,Programmable Clock Ready 5 Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 12. "PCKRDY4,Programmable Clock Ready 4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "PCKRDY3,Programmable Clock Ready 3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 10. "PCKRDY2,Programmable Clock Ready 2 Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x0 9. "PCKRDY1,Programmable Clock Ready 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 8. "PCKRDY0,Programmable Clock Ready 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LOCKU,UTMI PLL Lock Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 3. "MCKRDY,Master Clock Ready Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "LOCKA,PLLA Lock Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "MOSCXTS,Main Crystal Oscillator Status Interrupt Enable" "0,1"
|
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line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 21. "XT32KERR,32.768 kHz Crystal Oscillator Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 18. "CFDEV,Clock Failure Detector Event Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "MOSCRCS,Main RC Status Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 16. "MOSCSELS,Main Clock Source Oscillator Selection Status Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "PCKRDY7,Programmable Clock Ready 7 Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 14. "PCKRDY6,Programmable Clock Ready 6 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "PCKRDY5,Programmable Clock Ready 5 Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 12. "PCKRDY4,Programmable Clock Ready 4 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "PCKRDY3,Programmable Clock Ready 3 Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 10. "PCKRDY2,Programmable Clock Ready 2 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "PCKRDY1,Programmable Clock Ready 1 Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 8. "PCKRDY0,Programmable Clock Ready 0 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "LOCKU,UTMI PLL Lock Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 3. "MCKRDY,Master Clock Ready Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "LOCKA,PLLA Lock Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 0. "MOSCXTS,Main Crystal Oscillator Status Interrupt Disable" "0,1"
|
|
rgroup.long 0x68++0x7
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 21. "XT32KERR,Slow Crystal Oscillator Error" "0,1"
|
|
bitfld.long 0x0 20. "FOS,Clock Failure Detector Fault Output Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "CFDS,Clock Failure Detector Status" "0,1"
|
|
bitfld.long 0x0 18. "CFDEV,Clock Failure Detector Event" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "MOSCRCS,Main RC Oscillator Status" "0,1"
|
|
bitfld.long 0x0 16. "MOSCSELS,Main Clock Source Oscillator Selection Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "PCKRDY7,Programmable Clock Ready 7 Status" "0,1"
|
|
bitfld.long 0x0 14. "PCKRDY6,Programmable Clock Ready 6 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "PCKRDY5,Programmable Clock Ready 5 Status" "0,1"
|
|
bitfld.long 0x0 12. "PCKRDY4,Programmable Clock Ready 4 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "PCKRDY3,Programmable Clock Ready 3 Status" "0,1"
|
|
bitfld.long 0x0 10. "PCKRDY2,Programmable Clock Ready 2 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "PCKRDY1,Programmable Clock Ready 1 Status" "0,1"
|
|
bitfld.long 0x0 8. "PCKRDY0,Programmable Clock Ready 0 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "OSCSELS,Slow Clock Source Oscillator Selection" "0,1"
|
|
bitfld.long 0x0 6. "LOCKU,UTMI PLL Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "MCKRDY,Master Clock Status" "0,1"
|
|
bitfld.long 0x0 1. "LOCKA,PLLA Lock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "MOSCXTS,Main Crystal Oscillator Status" "0,1"
|
|
line.long 0x4 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x4 21. "XT32KERR,32.768 kHz Crystal Oscillator Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x4 18. "CFDEV,Clock Failure Detector Event Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "MOSCRCS,Main RC Status Interrupt Mask" "0,1"
|
|
bitfld.long 0x4 16. "MOSCSELS,Main Clock Source Oscillator Selection Status Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "PCKRDY7,Programmable Clock Ready 7 Interrupt Mask" "0,1"
|
|
bitfld.long 0x4 14. "PCKRDY6,Programmable Clock Ready 6 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "PCKRDY5,Programmable Clock Ready 5 Interrupt Mask" "0,1"
|
|
bitfld.long 0x4 12. "PCKRDY4,Programmable Clock Ready 4 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "PCKRDY3,Programmable Clock Ready 3 Interrupt Mask" "0,1"
|
|
bitfld.long 0x4 10. "PCKRDY2,Programmable Clock Ready 2 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "PCKRDY1,Programmable Clock Ready 1 Interrupt Mask" "0,1"
|
|
bitfld.long 0x4 8. "PCKRDY0,Programmable Clock Ready 0 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "LOCKU,UTMI PLL Lock Interrupt Mask" "0,1"
|
|
bitfld.long 0x4 3. "MCKRDY,Master Clock Ready Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "LOCKA,PLLA Lock Interrupt Mask" "0,1"
|
|
bitfld.long 0x4 0. "MOSCXTS,Main Crystal Oscillator Status Interrupt Mask" "0,1"
|
|
group.long 0x70++0x7
|
|
line.long 0x0 "FSMR,Fast Startup Mode Register"
|
|
bitfld.long 0x0 23. "FFLPM,Force Flash Low-power Mode" "0,1"
|
|
bitfld.long 0x0 21.--22. "FLPM,Flash Low-power Mode" "0: Flash is in Standby Mode when system enters Wait..,1: Flash is in Deep-power-down mode when system..,2: Idle mode,?"
|
|
newline
|
|
bitfld.long 0x0 20. "LPM,Low-power Mode" "0,1"
|
|
bitfld.long 0x0 18. "USBAL,USB Alarm Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "RTCAL,RTC Alarm Enable" "0,1"
|
|
bitfld.long 0x0 16. "RTTAL,RTT Alarm Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "FSTT15,Fast Startup Input Enable 15" "0,1"
|
|
bitfld.long 0x0 14. "FSTT14,Fast Startup Input Enable 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "FSTT13,Fast Startup Input Enable 13" "0,1"
|
|
bitfld.long 0x0 12. "FSTT12,Fast Startup Input Enable 12" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "FSTT11,Fast Startup Input Enable 11" "0,1"
|
|
bitfld.long 0x0 10. "FSTT10,Fast Startup Input Enable 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "FSTT9,Fast Startup Input Enable 9" "0,1"
|
|
bitfld.long 0x0 8. "FSTT8,Fast Startup Input Enable 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "FSTT7,Fast Startup Input Enable 7" "0,1"
|
|
bitfld.long 0x0 6. "FSTT6,Fast Startup Input Enable 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "FSTT5,Fast Startup Input Enable 5" "0,1"
|
|
bitfld.long 0x0 4. "FSTT4,Fast Startup Input Enable 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "FSTT3,Fast Startup Input Enable 3" "0,1"
|
|
bitfld.long 0x0 2. "FSTT2,Fast Startup Input Enable 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "FSTT1,Fast Startup Input Enable 1" "0,1"
|
|
bitfld.long 0x0 0. "FSTT0,Fast Startup Input Enable 0" "0,1"
|
|
line.long 0x4 "FSPR,Fast Startup Polarity Register"
|
|
bitfld.long 0x4 15. "FSTP15,Fast Startup Input Polarity 15" "0,1"
|
|
bitfld.long 0x4 14. "FSTP14,Fast Startup Input Polarity 14" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "FSTP13,Fast Startup Input Polarity 13" "0,1"
|
|
bitfld.long 0x4 12. "FSTP12,Fast Startup Input Polarity 12" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "FSTP11,Fast Startup Input Polarity 11" "0,1"
|
|
bitfld.long 0x4 10. "FSTP10,Fast Startup Input Polarity 10" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "FSTP9,Fast Startup Input Polarity 9" "0,1"
|
|
bitfld.long 0x4 8. "FSTP8,Fast Startup Input Polarity 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "FSTP7,Fast Startup Input Polarity 7" "0,1"
|
|
bitfld.long 0x4 6. "FSTP6,Fast Startup Input Polarity 6" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "FSTP5,Fast Startup Input Polarity 5" "0,1"
|
|
bitfld.long 0x4 4. "FSTP4,Fast Startup Input Polarity 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "FSTP3,Fast Startup Input Polarity 3" "0,1"
|
|
bitfld.long 0x4 2. "FSTP2,Fast Startup Input Polarity 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "FSTP1,Fast Startup Input Polarity 1" "0,1"
|
|
bitfld.long 0x4 0. "FSTP0,Fast Startup Input Polarity 0" "0,1"
|
|
wgroup.long 0x78++0x3
|
|
line.long 0x0 "FOCR,Fault Output Clear Register"
|
|
bitfld.long 0x0 0. "FOCLR,Fault Output Clear" "0,1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
wgroup.long 0x100++0x7
|
|
line.long 0x0 "PCER1,Peripheral Clock Enable Register 1"
|
|
bitfld.long 0x0 28. "PID60,Peripheral Clock 60 Enable" "0,1"
|
|
bitfld.long 0x0 27. "PID59,Peripheral Clock 59 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "PID58,Peripheral Clock 58 Enable" "0,1"
|
|
bitfld.long 0x0 25. "PID57,Peripheral Clock 57 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "PID56,Peripheral Clock 56 Enable" "0,1"
|
|
bitfld.long 0x0 21. "PID53,Peripheral Clock 53 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "PID52,Peripheral Clock 52 Enable" "0,1"
|
|
bitfld.long 0x0 19. "PID51,Peripheral Clock 51 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "PID50,Peripheral Clock 50 Enable" "0,1"
|
|
bitfld.long 0x0 17. "PID49,Peripheral Clock 49 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PID48,Peripheral Clock 48 Enable" "0,1"
|
|
bitfld.long 0x0 15. "PID47,Peripheral Clock 47 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "PID46,Peripheral Clock 46 Enable" "0,1"
|
|
bitfld.long 0x0 13. "PID45,Peripheral Clock 45 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "PID44,Peripheral Clock 44 Enable" "0,1"
|
|
bitfld.long 0x0 11. "PID43,Peripheral Clock 43 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "PID42,Peripheral Clock 42 Enable" "0,1"
|
|
bitfld.long 0x0 9. "PID41,Peripheral Clock 41 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "PID40,Peripheral Clock 40 Enable" "0,1"
|
|
bitfld.long 0x0 7. "PID39,Peripheral Clock 39 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PID37,Peripheral Clock 37 Enable" "0,1"
|
|
bitfld.long 0x0 3. "PID35,Peripheral Clock 35 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "PID34,Peripheral Clock 34 Enable" "0,1"
|
|
bitfld.long 0x0 1. "PID33,Peripheral Clock 33 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "PID32,Peripheral Clock 32 Enable" "0,1"
|
|
line.long 0x4 "PCDR1,Peripheral Clock Disable Register 1"
|
|
bitfld.long 0x4 28. "PID60,Peripheral Clock 60 Disable" "0,1"
|
|
bitfld.long 0x4 27. "PID59,Peripheral Clock 59 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 26. "PID58,Peripheral Clock 58 Disable" "0,1"
|
|
bitfld.long 0x4 25. "PID57,Peripheral Clock 57 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "PID56,Peripheral Clock 56 Disable" "0,1"
|
|
bitfld.long 0x4 21. "PID53,Peripheral Clock 53 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "PID52,Peripheral Clock 52 Disable" "0,1"
|
|
bitfld.long 0x4 19. "PID51,Peripheral Clock 51 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "PID50,Peripheral Clock 50 Disable" "0,1"
|
|
bitfld.long 0x4 17. "PID49,Peripheral Clock 49 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "PID48,Peripheral Clock 48 Disable" "0,1"
|
|
bitfld.long 0x4 15. "PID47,Peripheral Clock 47 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "PID46,Peripheral Clock 46 Disable" "0,1"
|
|
bitfld.long 0x4 13. "PID45,Peripheral Clock 45 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "PID44,Peripheral Clock 44 Disable" "0,1"
|
|
bitfld.long 0x4 11. "PID43,Peripheral Clock 43 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "PID42,Peripheral Clock 42 Disable" "0,1"
|
|
bitfld.long 0x4 9. "PID41,Peripheral Clock 41 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "PID40,Peripheral Clock 40 Disable" "0,1"
|
|
bitfld.long 0x4 7. "PID39,Peripheral Clock 39 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "PID37,Peripheral Clock 37 Disable" "0,1"
|
|
bitfld.long 0x4 3. "PID35,Peripheral Clock 35 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "PID34,Peripheral Clock 34 Disable" "0,1"
|
|
bitfld.long 0x4 1. "PID33,Peripheral Clock 33 Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "PID32,Peripheral Clock 32 Disable" "0,1"
|
|
rgroup.long 0x108++0x3
|
|
line.long 0x0 "PCSR1,Peripheral Clock Status Register 1"
|
|
bitfld.long 0x0 28. "PID60,Peripheral Clock 60 Status" "0,1"
|
|
bitfld.long 0x0 27. "PID59,Peripheral Clock 59 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "PID58,Peripheral Clock 58 Status" "0,1"
|
|
bitfld.long 0x0 25. "PID57,Peripheral Clock 57 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "PID56,Peripheral Clock 56 Status" "0,1"
|
|
bitfld.long 0x0 21. "PID53,Peripheral Clock 53 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "PID52,Peripheral Clock 52 Status" "0,1"
|
|
bitfld.long 0x0 19. "PID51,Peripheral Clock 51 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "PID50,Peripheral Clock 50 Status" "0,1"
|
|
bitfld.long 0x0 17. "PID49,Peripheral Clock 49 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PID48,Peripheral Clock 48 Status" "0,1"
|
|
bitfld.long 0x0 15. "PID47,Peripheral Clock 47 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "PID46,Peripheral Clock 46 Status" "0,1"
|
|
bitfld.long 0x0 13. "PID45,Peripheral Clock 45 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "PID44,Peripheral Clock 44 Status" "0,1"
|
|
bitfld.long 0x0 11. "PID43,Peripheral Clock 43 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "PID42,Peripheral Clock 42 Status" "0,1"
|
|
bitfld.long 0x0 9. "PID41,Peripheral Clock 41 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "PID40,Peripheral Clock 40 Status" "0,1"
|
|
bitfld.long 0x0 7. "PID39,Peripheral Clock 39 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PID37,Peripheral Clock 37 Status" "0,1"
|
|
bitfld.long 0x0 3. "PID35,Peripheral Clock 35 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "PID34,Peripheral Clock 34 Status" "0,1"
|
|
bitfld.long 0x0 1. "PID33,Peripheral Clock 33 Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "PID32,Peripheral Clock 32 Status" "0,1"
|
|
group.long 0x10C++0x7
|
|
line.long 0x0 "PCR,Peripheral Control Register"
|
|
bitfld.long 0x0 29. "GCLKEN,Generic Clock Enable" "0,1"
|
|
bitfld.long 0x0 28. "EN,Enable" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 20.--27. 1. "GCLKDIV,Generic Clock Division Ratio"
|
|
bitfld.long 0x0 12. "CMD,Command" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "GCLKCSS,Generic Clock Source Selection" "0: Slow clock is selected,1: Main clock is selected,2: PLLACK is selected,3: UPLL Clock is selected,4: Master Clock is selected,?,?,?"
|
|
hexmask.long.byte 0x0 0.--6. 1. "PID,Peripheral ID"
|
|
line.long 0x4 "OCR,Oscillator Calibration Register"
|
|
bitfld.long 0x4 23. "SEL12,Selection of Main RC Oscillator Calibration Bits for 12 MHz" "0,1"
|
|
hexmask.long.byte 0x4 16.--22. 1. "CAL12,Main RC Oscillator Calibration Bits for 12 MHz"
|
|
newline
|
|
bitfld.long 0x4 15. "SEL8,Selection of Main RC Oscillator Calibration Bits for 8 MHz" "0,1"
|
|
hexmask.long.byte 0x4 8.--14. 1. "CAL8,Main RC Oscillator Calibration Bits for 8 MHz"
|
|
newline
|
|
bitfld.long 0x4 7. "SEL4,Selection of Main RC Oscillator Calibration Bits for 4 MHz" "0,1"
|
|
hexmask.long.byte 0x4 0.--6. 1. "CAL4,Main RC Oscillator Calibration Bits for 4 MHz"
|
|
wgroup.long 0x114++0x7
|
|
line.long 0x0 "SLPWK_ER0,SleepWalking Enable Register 0"
|
|
bitfld.long 0x0 31. "PID31,Peripheral 31 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 30. "PID30,Peripheral 30 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "PID29,Peripheral 29 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 28. "PID28,Peripheral 28 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "PID27,Peripheral 27 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 26. "PID26,Peripheral 26 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "PID25,Peripheral 25 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 24. "PID24,Peripheral 24 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "PID23,Peripheral 23 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 22. "PID22,Peripheral 22 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "PID21,Peripheral 21 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 20. "PID20,Peripheral 20 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "PID19,Peripheral 19 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 18. "PID18,Peripheral 18 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "PID17,Peripheral 17 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 16. "PID16,Peripheral 16 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "PID15,Peripheral 15 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 14. "PID14,Peripheral 14 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "PID13,Peripheral 13 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 12. "PID12,Peripheral 12 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "PID11,Peripheral 11 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 10. "PID10,Peripheral 10 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "PID9,Peripheral 9 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 8. "PID8,Peripheral 8 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PID7,Peripheral 7 SleepWalking Enable" "0,1"
|
|
line.long 0x4 "SLPWK_DR0,SleepWalking Disable Register 0"
|
|
bitfld.long 0x4 31. "PID31,Peripheral 31 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 30. "PID30,Peripheral 30 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "PID29,Peripheral 29 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 28. "PID28,Peripheral 28 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "PID27,Peripheral 27 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 26. "PID26,Peripheral 26 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "PID25,Peripheral 25 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 24. "PID24,Peripheral 24 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "PID23,Peripheral 23 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 22. "PID22,Peripheral 22 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "PID21,Peripheral 21 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 20. "PID20,Peripheral 20 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "PID19,Peripheral 19 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 18. "PID18,Peripheral 18 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "PID17,Peripheral 17 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 16. "PID16,Peripheral 16 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "PID15,Peripheral 15 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 14. "PID14,Peripheral 14 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "PID13,Peripheral 13 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 12. "PID12,Peripheral 12 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "PID11,Peripheral 11 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 10. "PID10,Peripheral 10 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "PID9,Peripheral 9 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 8. "PID8,Peripheral 8 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PID7,Peripheral 7 SleepWalking Disable" "0,1"
|
|
rgroup.long 0x11C++0x7
|
|
line.long 0x0 "SLPWK_SR0,SleepWalking Status Register 0"
|
|
bitfld.long 0x0 31. "PID31,Peripheral 31 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 30. "PID30,Peripheral 30 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "PID29,Peripheral 29 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 28. "PID28,Peripheral 28 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "PID27,Peripheral 27 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 26. "PID26,Peripheral 26 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "PID25,Peripheral 25 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 24. "PID24,Peripheral 24 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "PID23,Peripheral 23 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 22. "PID22,Peripheral 22 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "PID21,Peripheral 21 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 20. "PID20,Peripheral 20 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "PID19,Peripheral 19 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 18. "PID18,Peripheral 18 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "PID17,Peripheral 17 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 16. "PID16,Peripheral 16 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "PID15,Peripheral 15 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 14. "PID14,Peripheral 14 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "PID13,Peripheral 13 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 12. "PID12,Peripheral 12 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "PID11,Peripheral 11 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 10. "PID10,Peripheral 10 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "PID9,Peripheral 9 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 8. "PID8,Peripheral 8 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PID7,Peripheral 7 SleepWalking Status" "0,1"
|
|
line.long 0x4 "SLPWK_ASR0,SleepWalking Activity Status Register 0"
|
|
bitfld.long 0x4 31. "PID31,Peripheral 31 Activity Status" "0,1"
|
|
bitfld.long 0x4 30. "PID30,Peripheral 30 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "PID29,Peripheral 29 Activity Status" "0,1"
|
|
bitfld.long 0x4 28. "PID28,Peripheral 28 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "PID27,Peripheral 27 Activity Status" "0,1"
|
|
bitfld.long 0x4 26. "PID26,Peripheral 26 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "PID25,Peripheral 25 Activity Status" "0,1"
|
|
bitfld.long 0x4 24. "PID24,Peripheral 24 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "PID23,Peripheral 23 Activity Status" "0,1"
|
|
bitfld.long 0x4 22. "PID22,Peripheral 22 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "PID21,Peripheral 21 Activity Status" "0,1"
|
|
bitfld.long 0x4 20. "PID20,Peripheral 20 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "PID19,Peripheral 19 Activity Status" "0,1"
|
|
bitfld.long 0x4 18. "PID18,Peripheral 18 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "PID17,Peripheral 17 Activity Status" "0,1"
|
|
bitfld.long 0x4 16. "PID16,Peripheral 16 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "PID15,Peripheral 15 Activity Status" "0,1"
|
|
bitfld.long 0x4 14. "PID14,Peripheral 14 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "PID13,Peripheral 13 Activity Status" "0,1"
|
|
bitfld.long 0x4 12. "PID12,Peripheral 12 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "PID11,Peripheral 11 Activity Status" "0,1"
|
|
bitfld.long 0x4 10. "PID10,Peripheral 10 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "PID9,Peripheral 9 Activity Status" "0,1"
|
|
bitfld.long 0x4 8. "PID8,Peripheral 8 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PID7,Peripheral 7 Activity Status" "0,1"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "PMMR,PLL Maximum Multiplier Value Register"
|
|
hexmask.long.word 0x0 0.--10. 1. "PLLA_MMAX,PLLA Maximum Allowed Multiplier Value"
|
|
wgroup.long 0x134++0x7
|
|
line.long 0x0 "SLPWK_ER1,SleepWalking Enable Register 1"
|
|
bitfld.long 0x0 28. "PID60,Peripheral 60 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 27. "PID59,Peripheral 59 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "PID58,Peripheral 58 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 25. "PID57,Peripheral 57 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "PID56,Peripheral 56 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 21. "PID53,Peripheral 53 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "PID52,Peripheral 52 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 19. "PID51,Peripheral 51 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "PID50,Peripheral 50 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 17. "PID49,Peripheral 49 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PID48,Peripheral 48 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 15. "PID47,Peripheral 47 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "PID46,Peripheral 46 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 13. "PID45,Peripheral 45 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "PID44,Peripheral 44 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 11. "PID43,Peripheral 43 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "PID42,Peripheral 42 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 9. "PID41,Peripheral 41 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "PID40,Peripheral 40 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 7. "PID39,Peripheral 39 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PID37,Peripheral 37 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 3. "PID35,Peripheral 35 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "PID34,Peripheral 34 SleepWalking Enable" "0,1"
|
|
bitfld.long 0x0 1. "PID33,Peripheral 33 SleepWalking Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "PID32,Peripheral 32 SleepWalking Enable" "0,1"
|
|
line.long 0x4 "SLPWK_DR1,SleepWalking Disable Register 1"
|
|
bitfld.long 0x4 28. "PID60,Peripheral 60 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 27. "PID59,Peripheral 59 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 26. "PID58,Peripheral 58 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 25. "PID57,Peripheral 57 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "PID56,Peripheral 56 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 21. "PID53,Peripheral 53 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "PID52,Peripheral 52 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 19. "PID51,Peripheral 51 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "PID50,Peripheral 50 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 17. "PID49,Peripheral 49 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "PID48,Peripheral 48 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 15. "PID47,Peripheral 47 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "PID46,Peripheral 46 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 13. "PID45,Peripheral 45 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "PID44,Peripheral 44 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 11. "PID43,Peripheral 43 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "PID42,Peripheral 42 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 9. "PID41,Peripheral 41 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "PID40,Peripheral 40 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 7. "PID39,Peripheral 39 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "PID37,Peripheral 37 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 3. "PID35,Peripheral 35 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "PID34,Peripheral 34 SleepWalking Disable" "0,1"
|
|
bitfld.long 0x4 1. "PID33,Peripheral 33 SleepWalking Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "PID32,Peripheral 32 SleepWalking Disable" "0,1"
|
|
rgroup.long 0x13C++0xB
|
|
line.long 0x0 "SLPWK_SR1,SleepWalking Status Register 1"
|
|
bitfld.long 0x0 28. "PID60,Peripheral 60 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 27. "PID59,Peripheral 59 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "PID58,Peripheral 58 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 25. "PID57,Peripheral 57 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "PID56,Peripheral 56 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 21. "PID53,Peripheral 53 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "PID52,Peripheral 52 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 19. "PID51,Peripheral 51 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "PID50,Peripheral 50 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 17. "PID49,Peripheral 49 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PID48,Peripheral 48 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 15. "PID47,Peripheral 47 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "PID46,Peripheral 46 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 13. "PID45,Peripheral 45 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "PID44,Peripheral 44 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 11. "PID43,Peripheral 43 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "PID42,Peripheral 42 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 9. "PID41,Peripheral 41 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "PID40,Peripheral 40 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 7. "PID39,Peripheral 39 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PID37,Peripheral 37 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 3. "PID35,Peripheral 35 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "PID34,Peripheral 34 SleepWalking Status" "0,1"
|
|
bitfld.long 0x0 1. "PID33,Peripheral 33 SleepWalking Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "PID32,Peripheral 32 SleepWalking Status" "0,1"
|
|
line.long 0x4 "SLPWK_ASR1,SleepWalking Activity Status Register 1"
|
|
bitfld.long 0x4 28. "PID60,Peripheral 60 Activity Status" "0,1"
|
|
bitfld.long 0x4 27. "PID59,Peripheral 59 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 26. "PID58,Peripheral 58 Activity Status" "0,1"
|
|
bitfld.long 0x4 25. "PID57,Peripheral 57 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "PID56,Peripheral 56 Activity Status" "0,1"
|
|
bitfld.long 0x4 21. "PID53,Peripheral 53 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "PID52,Peripheral 52 Activity Status" "0,1"
|
|
bitfld.long 0x4 19. "PID51,Peripheral 51 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "PID50,Peripheral 50 Activity Status" "0,1"
|
|
bitfld.long 0x4 17. "PID49,Peripheral 49 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "PID48,Peripheral 48 Activity Status" "0,1"
|
|
bitfld.long 0x4 15. "PID47,Peripheral 47 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "PID46,Peripheral 46 Activity Status" "0,1"
|
|
bitfld.long 0x4 13. "PID45,Peripheral 45 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "PID44,Peripheral 44 Activity Status" "0,1"
|
|
bitfld.long 0x4 11. "PID43,Peripheral 43 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "PID42,Peripheral 42 Activity Status" "0,1"
|
|
bitfld.long 0x4 9. "PID41,Peripheral 41 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "PID40,Peripheral 40 Activity Status" "0,1"
|
|
bitfld.long 0x4 7. "PID39,Peripheral 39 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "PID37,Peripheral 37 Activity Status" "0,1"
|
|
bitfld.long 0x4 3. "PID35,Peripheral 35 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "PID34,Peripheral 34 Activity Status" "0,1"
|
|
bitfld.long 0x4 1. "PID33,Peripheral 33 Activity Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "PID32,Peripheral 32 Activity Status" "0,1"
|
|
line.long 0x8 "SLPWK_AIPR,SleepWalking Activity In Progress Register"
|
|
bitfld.long 0x8 0. "AIP,Activity In Progress" "0,1"
|
|
tree.end
|
|
tree "PWM (Pulse Width Modulation)"
|
|
base ad:0x0
|
|
tree "PWM0"
|
|
base ad:0x40020000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CLK,PWM Clock Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "PREB,CLKB Source Clock Selection"
|
|
hexmask.long.byte 0x0 16.--23. 1. "DIVB,CLKB Divide Factor"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "PREA,CLKA Source Clock Selection"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DIVA,CLKA Divide Factor"
|
|
wgroup.long 0x4++0x7
|
|
line.long 0x0 "ENA,PWM Enable Register"
|
|
bitfld.long 0x0 3. "CHID3,Channel ID" "0,1"
|
|
bitfld.long 0x0 2. "CHID2,Channel ID" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHID1,Channel ID" "0,1"
|
|
bitfld.long 0x0 0. "CHID0,Channel ID" "0,1"
|
|
line.long 0x4 "DIS,PWM Disable Register"
|
|
bitfld.long 0x4 3. "CHID3,Channel ID" "0,1"
|
|
bitfld.long 0x4 2. "CHID2,Channel ID" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CHID1,Channel ID" "0,1"
|
|
bitfld.long 0x4 0. "CHID0,Channel ID" "0,1"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "SR,PWM Status Register"
|
|
bitfld.long 0x0 3. "CHID3,Channel ID" "0,1"
|
|
bitfld.long 0x0 2. "CHID2,Channel ID" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHID1,Channel ID" "0,1"
|
|
bitfld.long 0x0 0. "CHID0,Channel ID" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "IER1,PWM Interrupt Enable Register 1"
|
|
bitfld.long 0x0 19. "FCHID3,Fault Protection Trigger on Channel 3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 18. "FCHID2,Fault Protection Trigger on Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "FCHID1,Fault Protection Trigger on Channel 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 16. "FCHID0,Fault Protection Trigger on Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CHID3,Counter Event on Channel 3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "CHID2,Counter Event on Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHID1,Counter Event on Channel 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "CHID0,Counter Event on Channel 0 Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR1,PWM Interrupt Disable Register 1"
|
|
bitfld.long 0x4 19. "FCHID3,Fault Protection Trigger on Channel 3 Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 18. "FCHID2,Fault Protection Trigger on Channel 2 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "FCHID1,Fault Protection Trigger on Channel 1 Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 16. "FCHID0,Fault Protection Trigger on Channel 0 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CHID3,Counter Event on Channel 3 Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "CHID2,Counter Event on Channel 2 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CHID1,Counter Event on Channel 1 Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 0. "CHID0,Counter Event on Channel 0 Interrupt Disable" "0,1"
|
|
rgroup.long 0x18++0x7
|
|
line.long 0x0 "IMR1,PWM Interrupt Mask Register 1"
|
|
bitfld.long 0x0 19. "FCHID3,Fault Protection Trigger on Channel 3 Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 18. "FCHID2,Fault Protection Trigger on Channel 2 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "FCHID1,Fault Protection Trigger on Channel 1 Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 16. "FCHID0,Fault Protection Trigger on Channel 0 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CHID3,Counter Event on Channel 3 Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "CHID2,Counter Event on Channel 2 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHID1,Counter Event on Channel 1 Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 0. "CHID0,Counter Event on Channel 0 Interrupt Mask" "0,1"
|
|
line.long 0x4 "ISR1,PWM Interrupt Status Register 1"
|
|
bitfld.long 0x4 19. "FCHID3,Fault Protection Trigger on Channel 3" "0,1"
|
|
bitfld.long 0x4 18. "FCHID2,Fault Protection Trigger on Channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "FCHID1,Fault Protection Trigger on Channel 1" "0,1"
|
|
bitfld.long 0x4 16. "FCHID0,Fault Protection Trigger on Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CHID3,Counter Event on Channel 3" "0,1"
|
|
bitfld.long 0x4 2. "CHID2,Counter Event on Channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CHID1,Counter Event on Channel 1" "0,1"
|
|
bitfld.long 0x4 0. "CHID0,Counter Event on Channel 0" "0,1"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "SCM,PWM Sync Channels Mode Register"
|
|
bitfld.long 0x0 21.--23. "PTRCS,DMA Controller Transfer Request Comparison Selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20. "PTRM,DMA Controller Transfer Request Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "UPDM,Synchronous Channels Update Mode" "0: Manual write of double buffer registers and..,1: Manual write of double buffer registers and..,2: Automatic write of duty-cycle update registers..,?"
|
|
bitfld.long 0x0 3. "SYNC3,Synchronous Channel 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "SYNC2,Synchronous Channel 2" "0,1"
|
|
bitfld.long 0x0 1. "SYNC1,Synchronous Channel 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SYNC0,Synchronous Channel 0" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "DMAR,PWM DMA Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "DMADUTY,Duty-Cycle Holding Register for DMA Access"
|
|
group.long 0x28++0x7
|
|
line.long 0x0 "SCUC,PWM Sync Channels Update Control Register"
|
|
bitfld.long 0x0 0. "UPDULOCK,Synchronous Channels Update Unlock" "0,1"
|
|
line.long 0x4 "SCUP,PWM Sync Channels Update Period Register"
|
|
hexmask.long.byte 0x4 4.--7. 1. "UPRCNT,Update Period Counter"
|
|
hexmask.long.byte 0x4 0.--3. 1. "UPR,Update Period"
|
|
wgroup.long 0x30++0xB
|
|
line.long 0x0 "SCUPUPD,PWM Sync Channels Update Period Update Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "UPRUPD,Update Period Update"
|
|
line.long 0x4 "IER2,PWM Interrupt Enable Register 2"
|
|
bitfld.long 0x4 23. "CMPU7,Comparison 7 Update Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 22. "CMPU6,Comparison 6 Update Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "CMPU5,Comparison 5 Update Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 20. "CMPU4,Comparison 4 Update Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CMPU3,Comparison 3 Update Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 18. "CMPU2,Comparison 2 Update Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CMPU1,Comparison 1 Update Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 16. "CMPU0,Comparison 0 Update Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CMPM7,Comparison 7 Match Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 14. "CMPM6,Comparison 6 Match Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "CMPM5,Comparison 5 Match Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 12. "CMPM4,Comparison 4 Match Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "CMPM3,Comparison 3 Match Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 10. "CMPM2,Comparison 2 Match Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "CMPM1,Comparison 1 Match Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 8. "CMPM0,Comparison 0 Match Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "UNRE,Synchronous Channels Update Underrun Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "WRDY,Write Ready for Synchronous Channels Update Interrupt Enable" "0,1"
|
|
line.long 0x8 "IDR2,PWM Interrupt Disable Register 2"
|
|
bitfld.long 0x8 23. "CMPU7,Comparison 7 Update Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 22. "CMPU6,Comparison 6 Update Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 21. "CMPU5,Comparison 5 Update Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 20. "CMPU4,Comparison 4 Update Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 19. "CMPU3,Comparison 3 Update Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 18. "CMPU2,Comparison 2 Update Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 17. "CMPU1,Comparison 1 Update Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 16. "CMPU0,Comparison 0 Update Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 15. "CMPM7,Comparison 7 Match Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 14. "CMPM6,Comparison 6 Match Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "CMPM5,Comparison 5 Match Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 12. "CMPM4,Comparison 4 Match Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "CMPM3,Comparison 3 Match Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 10. "CMPM2,Comparison 2 Match Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "CMPM1,Comparison 1 Match Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 8. "CMPM0,Comparison 0 Match Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "UNRE,Synchronous Channels Update Underrun Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 0. "WRDY,Write Ready for Synchronous Channels Update Interrupt Disable" "0,1"
|
|
rgroup.long 0x3C++0x7
|
|
line.long 0x0 "IMR2,PWM Interrupt Mask Register 2"
|
|
bitfld.long 0x0 23. "CMPU7,Comparison 7 Update Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 22. "CMPU6,Comparison 6 Update Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "CMPU5,Comparison 5 Update Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 20. "CMPU4,Comparison 4 Update Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "CMPU3,Comparison 3 Update Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 18. "CMPU2,Comparison 2 Update Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CMPU1,Comparison 1 Update Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 16. "CMPU0,Comparison 0 Update Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "CMPM7,Comparison 7 Match Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 14. "CMPM6,Comparison 6 Match Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "CMPM5,Comparison 5 Match Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 12. "CMPM4,Comparison 4 Match Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "CMPM3,Comparison 3 Match Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 10. "CMPM2,Comparison 2 Match Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CMPM1,Comparison 1 Match Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 8. "CMPM0,Comparison 0 Match Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "UNRE,Synchronous Channels Update Underrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 0. "WRDY,Write Ready for Synchronous Channels Update Interrupt Mask" "0,1"
|
|
line.long 0x4 "ISR2,PWM Interrupt Status Register 2"
|
|
bitfld.long 0x4 23. "CMPU7,Comparison 7 Update" "0,1"
|
|
bitfld.long 0x4 22. "CMPU6,Comparison 6 Update" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "CMPU5,Comparison 5 Update" "0,1"
|
|
bitfld.long 0x4 20. "CMPU4,Comparison 4 Update" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CMPU3,Comparison 3 Update" "0,1"
|
|
bitfld.long 0x4 18. "CMPU2,Comparison 2 Update" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CMPU1,Comparison 1 Update" "0,1"
|
|
bitfld.long 0x4 16. "CMPU0,Comparison 0 Update" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CMPM7,Comparison 7 Match" "0,1"
|
|
bitfld.long 0x4 14. "CMPM6,Comparison 6 Match" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "CMPM5,Comparison 5 Match" "0,1"
|
|
bitfld.long 0x4 12. "CMPM4,Comparison 4 Match" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "CMPM3,Comparison 3 Match" "0,1"
|
|
bitfld.long 0x4 10. "CMPM2,Comparison 2 Match" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "CMPM1,Comparison 1 Match" "0,1"
|
|
bitfld.long 0x4 8. "CMPM0,Comparison 0 Match" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "UNRE,Synchronous Channels Update Underrun Error" "0,1"
|
|
bitfld.long 0x4 0. "WRDY,Write Ready for Synchronous Channels Update" "0,1"
|
|
group.long 0x44++0x7
|
|
line.long 0x0 "OOV,PWM Output Override Value Register"
|
|
bitfld.long 0x0 19. "OOVL3,Output Override Value for PWML output of the channel 3" "0,1"
|
|
bitfld.long 0x0 18. "OOVL2,Output Override Value for PWML output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "OOVL1,Output Override Value for PWML output of the channel 1" "0,1"
|
|
bitfld.long 0x0 16. "OOVL0,Output Override Value for PWML output of the channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "OOVH3,Output Override Value for PWMH output of the channel 3" "0,1"
|
|
bitfld.long 0x0 2. "OOVH2,Output Override Value for PWMH output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "OOVH1,Output Override Value for PWMH output of the channel 1" "0,1"
|
|
bitfld.long 0x0 0. "OOVH0,Output Override Value for PWMH output of the channel 0" "0,1"
|
|
line.long 0x4 "OS,PWM Output Selection Register"
|
|
bitfld.long 0x4 19. "OSL3,Output Selection for PWML output of the channel 3" "0,1"
|
|
bitfld.long 0x4 18. "OSL2,Output Selection for PWML output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "OSL1,Output Selection for PWML output of the channel 1" "0,1"
|
|
bitfld.long 0x4 16. "OSL0,Output Selection for PWML output of the channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "OSH3,Output Selection for PWMH output of the channel 3" "0,1"
|
|
bitfld.long 0x4 2. "OSH2,Output Selection for PWMH output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "OSH1,Output Selection for PWMH output of the channel 1" "0,1"
|
|
bitfld.long 0x4 0. "OSH0,Output Selection for PWMH output of the channel 0" "0,1"
|
|
wgroup.long 0x4C++0xF
|
|
line.long 0x0 "OSS,PWM Output Selection Set Register"
|
|
bitfld.long 0x0 19. "OSSL3,Output Selection Set for PWML output of the channel 3" "0,1"
|
|
bitfld.long 0x0 18. "OSSL2,Output Selection Set for PWML output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "OSSL1,Output Selection Set for PWML output of the channel 1" "0,1"
|
|
bitfld.long 0x0 16. "OSSL0,Output Selection Set for PWML output of the channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "OSSH3,Output Selection Set for PWMH output of the channel 3" "0,1"
|
|
bitfld.long 0x0 2. "OSSH2,Output Selection Set for PWMH output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "OSSH1,Output Selection Set for PWMH output of the channel 1" "0,1"
|
|
bitfld.long 0x0 0. "OSSH0,Output Selection Set for PWMH output of the channel 0" "0,1"
|
|
line.long 0x4 "OSC,PWM Output Selection Clear Register"
|
|
bitfld.long 0x4 19. "OSCL3,Output Selection Clear for PWML output of the channel 3" "0,1"
|
|
bitfld.long 0x4 18. "OSCL2,Output Selection Clear for PWML output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "OSCL1,Output Selection Clear for PWML output of the channel 1" "0,1"
|
|
bitfld.long 0x4 16. "OSCL0,Output Selection Clear for PWML output of the channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "OSCH3,Output Selection Clear for PWMH output of the channel 3" "0,1"
|
|
bitfld.long 0x4 2. "OSCH2,Output Selection Clear for PWMH output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "OSCH1,Output Selection Clear for PWMH output of the channel 1" "0,1"
|
|
bitfld.long 0x4 0. "OSCH0,Output Selection Clear for PWMH output of the channel 0" "0,1"
|
|
line.long 0x8 "OSSUPD,PWM Output Selection Set Update Register"
|
|
bitfld.long 0x8 19. "OSSUPL3,Output Selection Set for PWML output of the channel 3" "0,1"
|
|
bitfld.long 0x8 18. "OSSUPL2,Output Selection Set for PWML output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x8 17. "OSSUPL1,Output Selection Set for PWML output of the channel 1" "0,1"
|
|
bitfld.long 0x8 16. "OSSUPL0,Output Selection Set for PWML output of the channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "OSSUPH3,Output Selection Set for PWMH output of the channel 3" "0,1"
|
|
bitfld.long 0x8 2. "OSSUPH2,Output Selection Set for PWMH output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "OSSUPH1,Output Selection Set for PWMH output of the channel 1" "0,1"
|
|
bitfld.long 0x8 0. "OSSUPH0,Output Selection Set for PWMH output of the channel 0" "0,1"
|
|
line.long 0xC "OSCUPD,PWM Output Selection Clear Update Register"
|
|
bitfld.long 0xC 19. "OSCUPL3,Output Selection Clear for PWML output of the channel 3" "0,1"
|
|
bitfld.long 0xC 18. "OSCUPL2,Output Selection Clear for PWML output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0xC 17. "OSCUPL1,Output Selection Clear for PWML output of the channel 1" "0,1"
|
|
bitfld.long 0xC 16. "OSCUPL0,Output Selection Clear for PWML output of the channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "OSCUPH3,Output Selection Clear for PWMH output of the channel 3" "0,1"
|
|
bitfld.long 0xC 2. "OSCUPH2,Output Selection Clear for PWMH output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "OSCUPH1,Output Selection Clear for PWMH output of the channel 1" "0,1"
|
|
bitfld.long 0xC 0. "OSCUPH0,Output Selection Clear for PWMH output of the channel 0" "0,1"
|
|
group.long 0x5C++0x3
|
|
line.long 0x0 "FMR,PWM Fault Mode Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "FFIL,Fault Filtering"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FMOD,Fault Activation Mode"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "FPOL,Fault Polarity"
|
|
rgroup.long 0x60++0x3
|
|
line.long 0x0 "FSR,PWM Fault Status Register"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FS,Fault Status"
|
|
hexmask.long.byte 0x0 0.--7. 1. "FIV,Fault Input Value"
|
|
wgroup.long 0x64++0x3
|
|
line.long 0x0 "FCR,PWM Fault Clear Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "FCLR,Fault Clear"
|
|
group.long 0x68++0x7
|
|
line.long 0x0 "FPV1,PWM Fault Protection Value Register 1"
|
|
bitfld.long 0x0 19. "FPVL3,Fault Protection Value for PWML output on channel 3" "0,1"
|
|
bitfld.long 0x0 18. "FPVL2,Fault Protection Value for PWML output on channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "FPVL1,Fault Protection Value for PWML output on channel 1" "0,1"
|
|
bitfld.long 0x0 16. "FPVL0,Fault Protection Value for PWML output on channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "FPVH3,Fault Protection Value for PWMH output on channel 3" "0,1"
|
|
bitfld.long 0x0 2. "FPVH2,Fault Protection Value for PWMH output on channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "FPVH1,Fault Protection Value for PWMH output on channel 1" "0,1"
|
|
bitfld.long 0x0 0. "FPVH0,Fault Protection Value for PWMH output on channel 0" "0,1"
|
|
line.long 0x4 "FPE,PWM Fault Protection Enable Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "FPE3,Fault Protection Enable for channel 3"
|
|
hexmask.long.byte 0x4 16.--23. 1. "FPE2,Fault Protection Enable for channel 2"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "FPE1,Fault Protection Enable for channel 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "FPE0,Fault Protection Enable for channel 0"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x7C)++0x3
|
|
line.long 0x0 "ELMR[$1],PWM Event Line 0 Mode Register 0"
|
|
bitfld.long 0x0 7. "CSEL7,Comparison 7 Selection" "0,1"
|
|
bitfld.long 0x0 6. "CSEL6,Comparison 6 Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CSEL5,Comparison 5 Selection" "0,1"
|
|
bitfld.long 0x0 4. "CSEL4,Comparison 4 Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CSEL3,Comparison 3 Selection" "0,1"
|
|
bitfld.long 0x0 2. "CSEL2,Comparison 2 Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CSEL1,Comparison 1 Selection" "0,1"
|
|
bitfld.long 0x0 0. "CSEL0,Comparison 0 Selection" "0,1"
|
|
repeat.end
|
|
group.long 0xA0++0x3
|
|
line.long 0x0 "SSPR,PWM Spread Spectrum Register"
|
|
bitfld.long 0x0 24. "SPRDM,Spread Spectrum Counter Mode" "0,1"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "SPRD,Spread Spectrum Limit Value"
|
|
wgroup.long 0xA4++0x3
|
|
line.long 0x0 "SSPUP,PWM Spread Spectrum Update Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "SPRDUP,Spread Spectrum Limit Value Update"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "SMMR,PWM Stepper Motor Mode Register"
|
|
bitfld.long 0x0 17. "DOWN1,DOWN Count" "0,1"
|
|
bitfld.long 0x0 16. "DOWN0,DOWN Count" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "GCEN1,Gray Count ENable" "0,1"
|
|
bitfld.long 0x0 0. "GCEN0,Gray Count ENable" "0,1"
|
|
group.long 0xC0++0x3
|
|
line.long 0x0 "FPV2,PWM Fault Protection Value 2 Register"
|
|
bitfld.long 0x0 19. "FPZL3,Fault Protection to Hi-Z for PWML output on channel 3" "0,1"
|
|
bitfld.long 0x0 18. "FPZL2,Fault Protection to Hi-Z for PWML output on channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "FPZL1,Fault Protection to Hi-Z for PWML output on channel 1" "0,1"
|
|
bitfld.long 0x0 16. "FPZL0,Fault Protection to Hi-Z for PWML output on channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "FPZH3,Fault Protection to Hi-Z for PWMH output on channel 3" "0,1"
|
|
bitfld.long 0x0 2. "FPZH2,Fault Protection to Hi-Z for PWMH output on channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "FPZH1,Fault Protection to Hi-Z for PWMH output on channel 1" "0,1"
|
|
bitfld.long 0x0 0. "FPZH0,Fault Protection to Hi-Z for PWMH output on channel 0" "0,1"
|
|
wgroup.long 0xE4++0x3
|
|
line.long 0x0 "WPCR,PWM Write Protection Control Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 7. "WPRG5,Write Protection Register Group 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "WPRG4,Write Protection Register Group 4" "0,1"
|
|
bitfld.long 0x0 5. "WPRG3,Write Protection Register Group 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "WPRG2,Write Protection Register Group 2" "0,1"
|
|
bitfld.long 0x0 3. "WPRG1,Write Protection Register Group 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "WPRG0,Write Protection Register Group 0" "0,1"
|
|
bitfld.long 0x0 0.--1. "WPCMD,Write Protection Command" "0: Disables the software write protection of the..,1: Enables the software write protection of the..,2: Enables the hardware write protection of the..,?"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,PWM Write Protection Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "WPVSRC,Write Protect Violation Source"
|
|
bitfld.long 0x0 13. "WPHWS5,Write Protect HW Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "WPHWS4,Write Protect HW Status" "0,1"
|
|
bitfld.long 0x0 11. "WPHWS3,Write Protect HW Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "WPHWS2,Write Protect HW Status" "0,1"
|
|
bitfld.long 0x0 9. "WPHWS1,Write Protect HW Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "WPHWS0,Write Protect HW Status" "0,1"
|
|
bitfld.long 0x0 7. "WPVS,Write Protect Violation Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "WPSWS5,Write Protect SW Status" "0,1"
|
|
bitfld.long 0x0 4. "WPSWS4,Write Protect SW Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "WPSWS3,Write Protect SW Status" "0,1"
|
|
bitfld.long 0x0 2. "WPSWS2,Write Protect SW Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "WPSWS1,Write Protect SW Status" "0,1"
|
|
bitfld.long 0x0 0. "WPSWS0,Write Protect SW Status" "0,1"
|
|
repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x40020130 ad:0x40020140 ad:0x40020150 ad:0x40020160 ad:0x40020170 ad:0x40020180 ad:0x40020190 ad:0x400201A0)
|
|
tree "PWM_CMP[$1]"
|
|
base $2
|
|
group.long ($2)++0x3
|
|
line.long 0x0 "CMPV,PWM Comparison 0 Value Register"
|
|
bitfld.long 0x0 24. "CVM,Comparison x Value Mode" "0: Compare when counter is incrementing,1: Compare when counter is decrementing"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CV,Comparison x Value"
|
|
wgroup.long ($2+0x4)++0x3
|
|
line.long 0x0 "CMPVUPD,PWM Comparison 0 Value Update Register"
|
|
bitfld.long 0x0 24. "CVMUPD,Comparison x Value Mode Update" "0,1"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CVUPD,Comparison x Value Update"
|
|
group.long ($2+0x8)++0x3
|
|
line.long 0x0 "CMPM,PWM Comparison 0 Mode Register"
|
|
hexmask.long.byte 0x0 20.--23. 1. "CUPRCNT,Comparison x Update Period Counter"
|
|
hexmask.long.byte 0x0 16.--19. 1. "CUPR,Comparison x Update Period"
|
|
hexmask.long.byte 0x0 12.--15. 1. "CPRCNT,Comparison x Period Counter"
|
|
hexmask.long.byte 0x0 8.--11. 1. "CPR,Comparison x Period"
|
|
hexmask.long.byte 0x0 4.--7. 1. "CTR,Comparison x Trigger"
|
|
bitfld.long 0x0 0. "CEN,Comparison x Enable" "0,1"
|
|
wgroup.long ($2+0xC)++0x3
|
|
line.long 0x0 "CMPMUPD,PWM Comparison 0 Mode Update Register"
|
|
hexmask.long.byte 0x0 16.--19. 1. "CUPRUPD,Comparison x Update Period Update"
|
|
hexmask.long.byte 0x0 8.--11. 1. "CPRUPD,Comparison x Period Update"
|
|
hexmask.long.byte 0x0 4.--7. 1. "CTRUPD,Comparison x Trigger Update"
|
|
bitfld.long 0x0 0. "CENUPD,Comparison x Enable Update" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x40020200 ad:0x40020220 ad:0x40020240 ad:0x40020260)
|
|
tree "PWM_CH_NUM[$1]"
|
|
base $2
|
|
group.long ($2)++0x7
|
|
line.long 0x0 "CMR,PWM Channel Mode Register"
|
|
bitfld.long 0x0 19. "PPM,Push-Pull Mode" "0,1"
|
|
bitfld.long 0x0 18. "DTLI,Dead-Time PWMLx Output Inverted" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "DTHI,Dead-Time PWMHx Output Inverted" "0,1"
|
|
bitfld.long 0x0 16. "DTE,Dead-Time Generator Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TCTS,Timer Counter Trigger Selection" "0,1"
|
|
bitfld.long 0x0 12. "DPOLI,Disabled Polarity Inverted" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "UPDS,Update Selection" "0: At the next end of PWM period,1: At the next end of Half PWM period"
|
|
bitfld.long 0x0 10. "CES,Counter Event Selection" "0: At the end of PWM period,1: At half of PWM period AND at the end of PWM period"
|
|
newline
|
|
bitfld.long 0x0 9. "CPOL,Channel Polarity" "0: Waveform starts at low level,1: Waveform starts at high level"
|
|
bitfld.long 0x0 8. "CALG,Channel Alignment" "0: Left aligned,1: Center aligned"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "CPRE,Channel Pre-scaler"
|
|
line.long 0x4 "CDTY,PWM Channel Duty Cycle Register"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "CDTY,Channel Duty-Cycle"
|
|
wgroup.long ($2+0x8)++0x3
|
|
line.long 0x0 "CDTYUPD,PWM Channel Duty Cycle Update Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CDTYUPD,Channel Duty-Cycle Update"
|
|
group.long ($2+0xC)++0x3
|
|
line.long 0x0 "CPRD,PWM Channel Period Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CPRD,Channel Period"
|
|
wgroup.long ($2+0x10)++0x3
|
|
line.long 0x0 "CPRDUPD,PWM Channel Period Update Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CPRDUPD,Channel Period Update"
|
|
rgroup.long ($2+0x14)++0x3
|
|
line.long 0x0 "CCNT,PWM Channel Counter Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CNT,Channel Counter Register"
|
|
group.long ($2+0x18)++0x3
|
|
line.long 0x0 "DT,PWM Channel Dead Time Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "DTL,Dead-Time Value for PWMLx Output"
|
|
hexmask.long.word 0x0 0.--15. 1. "DTH,Dead-Time Value for PWMHx Output"
|
|
wgroup.long ($2+0x1C)++0x3
|
|
line.long 0x0 "DTUPD,PWM Channel Dead Time Update Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "DTLUPD,Dead-Time Value Update for PWMLx Output"
|
|
hexmask.long.word 0x0 0.--15. 1. "DTHUPD,Dead-Time Value Update for PWMHx Output"
|
|
tree.end
|
|
repeat.end
|
|
base ad:0x40020000
|
|
newline
|
|
wgroup.long 0x400++0x3
|
|
line.long 0x0 "CMUPD0,PWM Channel Mode Update Register (ch_num = 0)"
|
|
bitfld.long 0x0 13. "CPOLINVUP,Channel Polarity Inversion Update" "0,1"
|
|
bitfld.long 0x0 9. "CPOLUP,Channel Polarity Update" "0,1"
|
|
wgroup.long 0x420++0x3
|
|
line.long 0x0 "CMUPD1,PWM Channel Mode Update Register (ch_num = 1)"
|
|
bitfld.long 0x0 13. "CPOLINVUP,Channel Polarity Inversion Update" "0,1"
|
|
bitfld.long 0x0 9. "CPOLUP,Channel Polarity Update" "0,1"
|
|
group.long 0x42C++0x7
|
|
line.long 0x0 "ETRG1,PWM External Trigger Register (trg_num = 1)"
|
|
bitfld.long 0x0 31. "RFEN,Recoverable Fault Enable" "0,1"
|
|
bitfld.long 0x0 30. "TRGSRC,Trigger Source" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TRGFILT,Filtered input" "0,1"
|
|
bitfld.long 0x0 28. "TRGEDGE,Edge Selection" "0: TRGMODE = 1: TRGINx event detection on falling..,1: TRGMODE = 1: TRGINx event detection on rising.."
|
|
newline
|
|
bitfld.long 0x0 24.--25. "TRGMODE,External Trigger Mode" "0: External trigger is not enabled.,1: External PWM Reset Mode,2: External PWM Start Mode,3: Cycle-by-cycle Duty Mode"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "MAXCNT,Maximum Counter value"
|
|
line.long 0x4 "LEBR1,PWM Leading-Edge Blanking Register (trg_num = 1)"
|
|
bitfld.long 0x4 19. "PWMHREN,PWMH Rising Edge Enable" "0,1"
|
|
bitfld.long 0x4 18. "PWMHFEN,PWMH Falling Edge Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "PWMLREN,PWML Rising Edge Enable" "0,1"
|
|
bitfld.long 0x4 16. "PWMLFEN,PWML Falling Edge Enable" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--6. 1. "LEBDELAY,Leading-Edge Blanking Delay for TRGINx"
|
|
wgroup.long 0x440++0x3
|
|
line.long 0x0 "CMUPD2,PWM Channel Mode Update Register (ch_num = 2)"
|
|
bitfld.long 0x0 13. "CPOLINVUP,Channel Polarity Inversion Update" "0,1"
|
|
bitfld.long 0x0 9. "CPOLUP,Channel Polarity Update" "0,1"
|
|
group.long 0x44C++0x7
|
|
line.long 0x0 "ETRG2,PWM External Trigger Register (trg_num = 2)"
|
|
bitfld.long 0x0 31. "RFEN,Recoverable Fault Enable" "0,1"
|
|
bitfld.long 0x0 30. "TRGSRC,Trigger Source" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TRGFILT,Filtered input" "0,1"
|
|
bitfld.long 0x0 28. "TRGEDGE,Edge Selection" "0: TRGMODE = 1: TRGINx event detection on falling..,1: TRGMODE = 1: TRGINx event detection on rising.."
|
|
newline
|
|
bitfld.long 0x0 24.--25. "TRGMODE,External Trigger Mode" "0: External trigger is not enabled.,1: External PWM Reset Mode,2: External PWM Start Mode,3: Cycle-by-cycle Duty Mode"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "MAXCNT,Maximum Counter value"
|
|
line.long 0x4 "LEBR2,PWM Leading-Edge Blanking Register (trg_num = 2)"
|
|
bitfld.long 0x4 19. "PWMHREN,PWMH Rising Edge Enable" "0,1"
|
|
bitfld.long 0x4 18. "PWMHFEN,PWMH Falling Edge Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "PWMLREN,PWML Rising Edge Enable" "0,1"
|
|
bitfld.long 0x4 16. "PWMLFEN,PWML Falling Edge Enable" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--6. 1. "LEBDELAY,Leading-Edge Blanking Delay for TRGINx"
|
|
wgroup.long 0x460++0x3
|
|
line.long 0x0 "CMUPD3,PWM Channel Mode Update Register (ch_num = 3)"
|
|
bitfld.long 0x0 13. "CPOLINVUP,Channel Polarity Inversion Update" "0,1"
|
|
bitfld.long 0x0 9. "CPOLUP,Channel Polarity Update" "0,1"
|
|
tree.end
|
|
tree "PWM1"
|
|
base ad:0x4005C000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CLK,PWM Clock Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "PREB,CLKB Source Clock Selection"
|
|
hexmask.long.byte 0x0 16.--23. 1. "DIVB,CLKB Divide Factor"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "PREA,CLKA Source Clock Selection"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DIVA,CLKA Divide Factor"
|
|
wgroup.long 0x4++0x7
|
|
line.long 0x0 "ENA,PWM Enable Register"
|
|
bitfld.long 0x0 3. "CHID3,Channel ID" "0,1"
|
|
bitfld.long 0x0 2. "CHID2,Channel ID" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHID1,Channel ID" "0,1"
|
|
bitfld.long 0x0 0. "CHID0,Channel ID" "0,1"
|
|
line.long 0x4 "DIS,PWM Disable Register"
|
|
bitfld.long 0x4 3. "CHID3,Channel ID" "0,1"
|
|
bitfld.long 0x4 2. "CHID2,Channel ID" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CHID1,Channel ID" "0,1"
|
|
bitfld.long 0x4 0. "CHID0,Channel ID" "0,1"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "SR,PWM Status Register"
|
|
bitfld.long 0x0 3. "CHID3,Channel ID" "0,1"
|
|
bitfld.long 0x0 2. "CHID2,Channel ID" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHID1,Channel ID" "0,1"
|
|
bitfld.long 0x0 0. "CHID0,Channel ID" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "IER1,PWM Interrupt Enable Register 1"
|
|
bitfld.long 0x0 19. "FCHID3,Fault Protection Trigger on Channel 3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 18. "FCHID2,Fault Protection Trigger on Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "FCHID1,Fault Protection Trigger on Channel 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 16. "FCHID0,Fault Protection Trigger on Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CHID3,Counter Event on Channel 3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "CHID2,Counter Event on Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHID1,Counter Event on Channel 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "CHID0,Counter Event on Channel 0 Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR1,PWM Interrupt Disable Register 1"
|
|
bitfld.long 0x4 19. "FCHID3,Fault Protection Trigger on Channel 3 Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 18. "FCHID2,Fault Protection Trigger on Channel 2 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "FCHID1,Fault Protection Trigger on Channel 1 Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 16. "FCHID0,Fault Protection Trigger on Channel 0 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CHID3,Counter Event on Channel 3 Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "CHID2,Counter Event on Channel 2 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CHID1,Counter Event on Channel 1 Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 0. "CHID0,Counter Event on Channel 0 Interrupt Disable" "0,1"
|
|
rgroup.long 0x18++0x7
|
|
line.long 0x0 "IMR1,PWM Interrupt Mask Register 1"
|
|
bitfld.long 0x0 19. "FCHID3,Fault Protection Trigger on Channel 3 Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 18. "FCHID2,Fault Protection Trigger on Channel 2 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "FCHID1,Fault Protection Trigger on Channel 1 Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 16. "FCHID0,Fault Protection Trigger on Channel 0 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CHID3,Counter Event on Channel 3 Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "CHID2,Counter Event on Channel 2 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHID1,Counter Event on Channel 1 Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 0. "CHID0,Counter Event on Channel 0 Interrupt Mask" "0,1"
|
|
line.long 0x4 "ISR1,PWM Interrupt Status Register 1"
|
|
bitfld.long 0x4 19. "FCHID3,Fault Protection Trigger on Channel 3" "0,1"
|
|
bitfld.long 0x4 18. "FCHID2,Fault Protection Trigger on Channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "FCHID1,Fault Protection Trigger on Channel 1" "0,1"
|
|
bitfld.long 0x4 16. "FCHID0,Fault Protection Trigger on Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CHID3,Counter Event on Channel 3" "0,1"
|
|
bitfld.long 0x4 2. "CHID2,Counter Event on Channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "CHID1,Counter Event on Channel 1" "0,1"
|
|
bitfld.long 0x4 0. "CHID0,Counter Event on Channel 0" "0,1"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "SCM,PWM Sync Channels Mode Register"
|
|
bitfld.long 0x0 21.--23. "PTRCS,DMA Controller Transfer Request Comparison Selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20. "PTRM,DMA Controller Transfer Request Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "UPDM,Synchronous Channels Update Mode" "0: Manual write of double buffer registers and..,1: Manual write of double buffer registers and..,2: Automatic write of duty-cycle update registers..,?"
|
|
bitfld.long 0x0 3. "SYNC3,Synchronous Channel 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "SYNC2,Synchronous Channel 2" "0,1"
|
|
bitfld.long 0x0 1. "SYNC1,Synchronous Channel 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SYNC0,Synchronous Channel 0" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "DMAR,PWM DMA Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "DMADUTY,Duty-Cycle Holding Register for DMA Access"
|
|
group.long 0x28++0x7
|
|
line.long 0x0 "SCUC,PWM Sync Channels Update Control Register"
|
|
bitfld.long 0x0 0. "UPDULOCK,Synchronous Channels Update Unlock" "0,1"
|
|
line.long 0x4 "SCUP,PWM Sync Channels Update Period Register"
|
|
hexmask.long.byte 0x4 4.--7. 1. "UPRCNT,Update Period Counter"
|
|
hexmask.long.byte 0x4 0.--3. 1. "UPR,Update Period"
|
|
wgroup.long 0x30++0xB
|
|
line.long 0x0 "SCUPUPD,PWM Sync Channels Update Period Update Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "UPRUPD,Update Period Update"
|
|
line.long 0x4 "IER2,PWM Interrupt Enable Register 2"
|
|
bitfld.long 0x4 23. "CMPU7,Comparison 7 Update Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 22. "CMPU6,Comparison 6 Update Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "CMPU5,Comparison 5 Update Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 20. "CMPU4,Comparison 4 Update Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CMPU3,Comparison 3 Update Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 18. "CMPU2,Comparison 2 Update Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CMPU1,Comparison 1 Update Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 16. "CMPU0,Comparison 0 Update Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CMPM7,Comparison 7 Match Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 14. "CMPM6,Comparison 6 Match Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "CMPM5,Comparison 5 Match Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 12. "CMPM4,Comparison 4 Match Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "CMPM3,Comparison 3 Match Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 10. "CMPM2,Comparison 2 Match Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "CMPM1,Comparison 1 Match Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 8. "CMPM0,Comparison 0 Match Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "UNRE,Synchronous Channels Update Underrun Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "WRDY,Write Ready for Synchronous Channels Update Interrupt Enable" "0,1"
|
|
line.long 0x8 "IDR2,PWM Interrupt Disable Register 2"
|
|
bitfld.long 0x8 23. "CMPU7,Comparison 7 Update Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 22. "CMPU6,Comparison 6 Update Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 21. "CMPU5,Comparison 5 Update Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 20. "CMPU4,Comparison 4 Update Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 19. "CMPU3,Comparison 3 Update Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 18. "CMPU2,Comparison 2 Update Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 17. "CMPU1,Comparison 1 Update Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 16. "CMPU0,Comparison 0 Update Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 15. "CMPM7,Comparison 7 Match Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 14. "CMPM6,Comparison 6 Match Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "CMPM5,Comparison 5 Match Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 12. "CMPM4,Comparison 4 Match Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "CMPM3,Comparison 3 Match Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 10. "CMPM2,Comparison 2 Match Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "CMPM1,Comparison 1 Match Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 8. "CMPM0,Comparison 0 Match Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "UNRE,Synchronous Channels Update Underrun Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 0. "WRDY,Write Ready for Synchronous Channels Update Interrupt Disable" "0,1"
|
|
rgroup.long 0x3C++0x7
|
|
line.long 0x0 "IMR2,PWM Interrupt Mask Register 2"
|
|
bitfld.long 0x0 23. "CMPU7,Comparison 7 Update Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 22. "CMPU6,Comparison 6 Update Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "CMPU5,Comparison 5 Update Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 20. "CMPU4,Comparison 4 Update Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "CMPU3,Comparison 3 Update Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 18. "CMPU2,Comparison 2 Update Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CMPU1,Comparison 1 Update Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 16. "CMPU0,Comparison 0 Update Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "CMPM7,Comparison 7 Match Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 14. "CMPM6,Comparison 6 Match Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "CMPM5,Comparison 5 Match Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 12. "CMPM4,Comparison 4 Match Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "CMPM3,Comparison 3 Match Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 10. "CMPM2,Comparison 2 Match Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CMPM1,Comparison 1 Match Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 8. "CMPM0,Comparison 0 Match Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "UNRE,Synchronous Channels Update Underrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 0. "WRDY,Write Ready for Synchronous Channels Update Interrupt Mask" "0,1"
|
|
line.long 0x4 "ISR2,PWM Interrupt Status Register 2"
|
|
bitfld.long 0x4 23. "CMPU7,Comparison 7 Update" "0,1"
|
|
bitfld.long 0x4 22. "CMPU6,Comparison 6 Update" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "CMPU5,Comparison 5 Update" "0,1"
|
|
bitfld.long 0x4 20. "CMPU4,Comparison 4 Update" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CMPU3,Comparison 3 Update" "0,1"
|
|
bitfld.long 0x4 18. "CMPU2,Comparison 2 Update" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CMPU1,Comparison 1 Update" "0,1"
|
|
bitfld.long 0x4 16. "CMPU0,Comparison 0 Update" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CMPM7,Comparison 7 Match" "0,1"
|
|
bitfld.long 0x4 14. "CMPM6,Comparison 6 Match" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "CMPM5,Comparison 5 Match" "0,1"
|
|
bitfld.long 0x4 12. "CMPM4,Comparison 4 Match" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "CMPM3,Comparison 3 Match" "0,1"
|
|
bitfld.long 0x4 10. "CMPM2,Comparison 2 Match" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "CMPM1,Comparison 1 Match" "0,1"
|
|
bitfld.long 0x4 8. "CMPM0,Comparison 0 Match" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "UNRE,Synchronous Channels Update Underrun Error" "0,1"
|
|
bitfld.long 0x4 0. "WRDY,Write Ready for Synchronous Channels Update" "0,1"
|
|
group.long 0x44++0x7
|
|
line.long 0x0 "OOV,PWM Output Override Value Register"
|
|
bitfld.long 0x0 19. "OOVL3,Output Override Value for PWML output of the channel 3" "0,1"
|
|
bitfld.long 0x0 18. "OOVL2,Output Override Value for PWML output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "OOVL1,Output Override Value for PWML output of the channel 1" "0,1"
|
|
bitfld.long 0x0 16. "OOVL0,Output Override Value for PWML output of the channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "OOVH3,Output Override Value for PWMH output of the channel 3" "0,1"
|
|
bitfld.long 0x0 2. "OOVH2,Output Override Value for PWMH output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "OOVH1,Output Override Value for PWMH output of the channel 1" "0,1"
|
|
bitfld.long 0x0 0. "OOVH0,Output Override Value for PWMH output of the channel 0" "0,1"
|
|
line.long 0x4 "OS,PWM Output Selection Register"
|
|
bitfld.long 0x4 19. "OSL3,Output Selection for PWML output of the channel 3" "0,1"
|
|
bitfld.long 0x4 18. "OSL2,Output Selection for PWML output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "OSL1,Output Selection for PWML output of the channel 1" "0,1"
|
|
bitfld.long 0x4 16. "OSL0,Output Selection for PWML output of the channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "OSH3,Output Selection for PWMH output of the channel 3" "0,1"
|
|
bitfld.long 0x4 2. "OSH2,Output Selection for PWMH output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "OSH1,Output Selection for PWMH output of the channel 1" "0,1"
|
|
bitfld.long 0x4 0. "OSH0,Output Selection for PWMH output of the channel 0" "0,1"
|
|
wgroup.long 0x4C++0xF
|
|
line.long 0x0 "OSS,PWM Output Selection Set Register"
|
|
bitfld.long 0x0 19. "OSSL3,Output Selection Set for PWML output of the channel 3" "0,1"
|
|
bitfld.long 0x0 18. "OSSL2,Output Selection Set for PWML output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "OSSL1,Output Selection Set for PWML output of the channel 1" "0,1"
|
|
bitfld.long 0x0 16. "OSSL0,Output Selection Set for PWML output of the channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "OSSH3,Output Selection Set for PWMH output of the channel 3" "0,1"
|
|
bitfld.long 0x0 2. "OSSH2,Output Selection Set for PWMH output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "OSSH1,Output Selection Set for PWMH output of the channel 1" "0,1"
|
|
bitfld.long 0x0 0. "OSSH0,Output Selection Set for PWMH output of the channel 0" "0,1"
|
|
line.long 0x4 "OSC,PWM Output Selection Clear Register"
|
|
bitfld.long 0x4 19. "OSCL3,Output Selection Clear for PWML output of the channel 3" "0,1"
|
|
bitfld.long 0x4 18. "OSCL2,Output Selection Clear for PWML output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "OSCL1,Output Selection Clear for PWML output of the channel 1" "0,1"
|
|
bitfld.long 0x4 16. "OSCL0,Output Selection Clear for PWML output of the channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "OSCH3,Output Selection Clear for PWMH output of the channel 3" "0,1"
|
|
bitfld.long 0x4 2. "OSCH2,Output Selection Clear for PWMH output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "OSCH1,Output Selection Clear for PWMH output of the channel 1" "0,1"
|
|
bitfld.long 0x4 0. "OSCH0,Output Selection Clear for PWMH output of the channel 0" "0,1"
|
|
line.long 0x8 "OSSUPD,PWM Output Selection Set Update Register"
|
|
bitfld.long 0x8 19. "OSSUPL3,Output Selection Set for PWML output of the channel 3" "0,1"
|
|
bitfld.long 0x8 18. "OSSUPL2,Output Selection Set for PWML output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x8 17. "OSSUPL1,Output Selection Set for PWML output of the channel 1" "0,1"
|
|
bitfld.long 0x8 16. "OSSUPL0,Output Selection Set for PWML output of the channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "OSSUPH3,Output Selection Set for PWMH output of the channel 3" "0,1"
|
|
bitfld.long 0x8 2. "OSSUPH2,Output Selection Set for PWMH output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "OSSUPH1,Output Selection Set for PWMH output of the channel 1" "0,1"
|
|
bitfld.long 0x8 0. "OSSUPH0,Output Selection Set for PWMH output of the channel 0" "0,1"
|
|
line.long 0xC "OSCUPD,PWM Output Selection Clear Update Register"
|
|
bitfld.long 0xC 19. "OSCUPL3,Output Selection Clear for PWML output of the channel 3" "0,1"
|
|
bitfld.long 0xC 18. "OSCUPL2,Output Selection Clear for PWML output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0xC 17. "OSCUPL1,Output Selection Clear for PWML output of the channel 1" "0,1"
|
|
bitfld.long 0xC 16. "OSCUPL0,Output Selection Clear for PWML output of the channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "OSCUPH3,Output Selection Clear for PWMH output of the channel 3" "0,1"
|
|
bitfld.long 0xC 2. "OSCUPH2,Output Selection Clear for PWMH output of the channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "OSCUPH1,Output Selection Clear for PWMH output of the channel 1" "0,1"
|
|
bitfld.long 0xC 0. "OSCUPH0,Output Selection Clear for PWMH output of the channel 0" "0,1"
|
|
group.long 0x5C++0x3
|
|
line.long 0x0 "FMR,PWM Fault Mode Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "FFIL,Fault Filtering"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FMOD,Fault Activation Mode"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "FPOL,Fault Polarity"
|
|
rgroup.long 0x60++0x3
|
|
line.long 0x0 "FSR,PWM Fault Status Register"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FS,Fault Status"
|
|
hexmask.long.byte 0x0 0.--7. 1. "FIV,Fault Input Value"
|
|
wgroup.long 0x64++0x3
|
|
line.long 0x0 "FCR,PWM Fault Clear Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "FCLR,Fault Clear"
|
|
group.long 0x68++0x7
|
|
line.long 0x0 "FPV1,PWM Fault Protection Value Register 1"
|
|
bitfld.long 0x0 19. "FPVL3,Fault Protection Value for PWML output on channel 3" "0,1"
|
|
bitfld.long 0x0 18. "FPVL2,Fault Protection Value for PWML output on channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "FPVL1,Fault Protection Value for PWML output on channel 1" "0,1"
|
|
bitfld.long 0x0 16. "FPVL0,Fault Protection Value for PWML output on channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "FPVH3,Fault Protection Value for PWMH output on channel 3" "0,1"
|
|
bitfld.long 0x0 2. "FPVH2,Fault Protection Value for PWMH output on channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "FPVH1,Fault Protection Value for PWMH output on channel 1" "0,1"
|
|
bitfld.long 0x0 0. "FPVH0,Fault Protection Value for PWMH output on channel 0" "0,1"
|
|
line.long 0x4 "FPE,PWM Fault Protection Enable Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "FPE3,Fault Protection Enable for channel 3"
|
|
hexmask.long.byte 0x4 16.--23. 1. "FPE2,Fault Protection Enable for channel 2"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "FPE1,Fault Protection Enable for channel 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "FPE0,Fault Protection Enable for channel 0"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x7C)++0x3
|
|
line.long 0x0 "ELMR[$1],PWM Event Line 0 Mode Register 0"
|
|
bitfld.long 0x0 7. "CSEL7,Comparison 7 Selection" "0,1"
|
|
bitfld.long 0x0 6. "CSEL6,Comparison 6 Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CSEL5,Comparison 5 Selection" "0,1"
|
|
bitfld.long 0x0 4. "CSEL4,Comparison 4 Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CSEL3,Comparison 3 Selection" "0,1"
|
|
bitfld.long 0x0 2. "CSEL2,Comparison 2 Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CSEL1,Comparison 1 Selection" "0,1"
|
|
bitfld.long 0x0 0. "CSEL0,Comparison 0 Selection" "0,1"
|
|
repeat.end
|
|
group.long 0xA0++0x3
|
|
line.long 0x0 "SSPR,PWM Spread Spectrum Register"
|
|
bitfld.long 0x0 24. "SPRDM,Spread Spectrum Counter Mode" "0,1"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "SPRD,Spread Spectrum Limit Value"
|
|
wgroup.long 0xA4++0x3
|
|
line.long 0x0 "SSPUP,PWM Spread Spectrum Update Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "SPRDUP,Spread Spectrum Limit Value Update"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "SMMR,PWM Stepper Motor Mode Register"
|
|
bitfld.long 0x0 17. "DOWN1,DOWN Count" "0,1"
|
|
bitfld.long 0x0 16. "DOWN0,DOWN Count" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "GCEN1,Gray Count ENable" "0,1"
|
|
bitfld.long 0x0 0. "GCEN0,Gray Count ENable" "0,1"
|
|
group.long 0xC0++0x3
|
|
line.long 0x0 "FPV2,PWM Fault Protection Value 2 Register"
|
|
bitfld.long 0x0 19. "FPZL3,Fault Protection to Hi-Z for PWML output on channel 3" "0,1"
|
|
bitfld.long 0x0 18. "FPZL2,Fault Protection to Hi-Z for PWML output on channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "FPZL1,Fault Protection to Hi-Z for PWML output on channel 1" "0,1"
|
|
bitfld.long 0x0 16. "FPZL0,Fault Protection to Hi-Z for PWML output on channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "FPZH3,Fault Protection to Hi-Z for PWMH output on channel 3" "0,1"
|
|
bitfld.long 0x0 2. "FPZH2,Fault Protection to Hi-Z for PWMH output on channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "FPZH1,Fault Protection to Hi-Z for PWMH output on channel 1" "0,1"
|
|
bitfld.long 0x0 0. "FPZH0,Fault Protection to Hi-Z for PWMH output on channel 0" "0,1"
|
|
wgroup.long 0xE4++0x3
|
|
line.long 0x0 "WPCR,PWM Write Protection Control Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 7. "WPRG5,Write Protection Register Group 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "WPRG4,Write Protection Register Group 4" "0,1"
|
|
bitfld.long 0x0 5. "WPRG3,Write Protection Register Group 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "WPRG2,Write Protection Register Group 2" "0,1"
|
|
bitfld.long 0x0 3. "WPRG1,Write Protection Register Group 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "WPRG0,Write Protection Register Group 0" "0,1"
|
|
bitfld.long 0x0 0.--1. "WPCMD,Write Protection Command" "0: Disables the software write protection of the..,1: Enables the software write protection of the..,2: Enables the hardware write protection of the..,?"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,PWM Write Protection Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "WPVSRC,Write Protect Violation Source"
|
|
bitfld.long 0x0 13. "WPHWS5,Write Protect HW Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "WPHWS4,Write Protect HW Status" "0,1"
|
|
bitfld.long 0x0 11. "WPHWS3,Write Protect HW Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "WPHWS2,Write Protect HW Status" "0,1"
|
|
bitfld.long 0x0 9. "WPHWS1,Write Protect HW Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "WPHWS0,Write Protect HW Status" "0,1"
|
|
bitfld.long 0x0 7. "WPVS,Write Protect Violation Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "WPSWS5,Write Protect SW Status" "0,1"
|
|
bitfld.long 0x0 4. "WPSWS4,Write Protect SW Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "WPSWS3,Write Protect SW Status" "0,1"
|
|
bitfld.long 0x0 2. "WPSWS2,Write Protect SW Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "WPSWS1,Write Protect SW Status" "0,1"
|
|
bitfld.long 0x0 0. "WPSWS0,Write Protect SW Status" "0,1"
|
|
repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x4005C130 ad:0x4005C140 ad:0x4005C150 ad:0x4005C160 ad:0x4005C170 ad:0x4005C180 ad:0x4005C190 ad:0x4005C1A0)
|
|
tree "PWM_CMP[$1]"
|
|
base $2
|
|
group.long ($2)++0x3
|
|
line.long 0x0 "CMPV,PWM Comparison 0 Value Register"
|
|
bitfld.long 0x0 24. "CVM,Comparison x Value Mode" "0: Compare when counter is incrementing,1: Compare when counter is decrementing"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CV,Comparison x Value"
|
|
wgroup.long ($2+0x4)++0x3
|
|
line.long 0x0 "CMPVUPD,PWM Comparison 0 Value Update Register"
|
|
bitfld.long 0x0 24. "CVMUPD,Comparison x Value Mode Update" "0,1"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CVUPD,Comparison x Value Update"
|
|
group.long ($2+0x8)++0x3
|
|
line.long 0x0 "CMPM,PWM Comparison 0 Mode Register"
|
|
hexmask.long.byte 0x0 20.--23. 1. "CUPRCNT,Comparison x Update Period Counter"
|
|
hexmask.long.byte 0x0 16.--19. 1. "CUPR,Comparison x Update Period"
|
|
hexmask.long.byte 0x0 12.--15. 1. "CPRCNT,Comparison x Period Counter"
|
|
hexmask.long.byte 0x0 8.--11. 1. "CPR,Comparison x Period"
|
|
hexmask.long.byte 0x0 4.--7. 1. "CTR,Comparison x Trigger"
|
|
bitfld.long 0x0 0. "CEN,Comparison x Enable" "0,1"
|
|
wgroup.long ($2+0xC)++0x3
|
|
line.long 0x0 "CMPMUPD,PWM Comparison 0 Mode Update Register"
|
|
hexmask.long.byte 0x0 16.--19. 1. "CUPRUPD,Comparison x Update Period Update"
|
|
hexmask.long.byte 0x0 8.--11. 1. "CPRUPD,Comparison x Period Update"
|
|
hexmask.long.byte 0x0 4.--7. 1. "CTRUPD,Comparison x Trigger Update"
|
|
bitfld.long 0x0 0. "CENUPD,Comparison x Enable Update" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x4005C200 ad:0x4005C220 ad:0x4005C240 ad:0x4005C260)
|
|
tree "PWM_CH_NUM[$1]"
|
|
base $2
|
|
group.long ($2)++0x7
|
|
line.long 0x0 "CMR,PWM Channel Mode Register"
|
|
bitfld.long 0x0 19. "PPM,Push-Pull Mode" "0,1"
|
|
bitfld.long 0x0 18. "DTLI,Dead-Time PWMLx Output Inverted" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "DTHI,Dead-Time PWMHx Output Inverted" "0,1"
|
|
bitfld.long 0x0 16. "DTE,Dead-Time Generator Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TCTS,Timer Counter Trigger Selection" "0,1"
|
|
bitfld.long 0x0 12. "DPOLI,Disabled Polarity Inverted" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "UPDS,Update Selection" "0: At the next end of PWM period,1: At the next end of Half PWM period"
|
|
bitfld.long 0x0 10. "CES,Counter Event Selection" "0: At the end of PWM period,1: At half of PWM period AND at the end of PWM period"
|
|
newline
|
|
bitfld.long 0x0 9. "CPOL,Channel Polarity" "0: Waveform starts at low level,1: Waveform starts at high level"
|
|
bitfld.long 0x0 8. "CALG,Channel Alignment" "0: Left aligned,1: Center aligned"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "CPRE,Channel Pre-scaler"
|
|
line.long 0x4 "CDTY,PWM Channel Duty Cycle Register"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "CDTY,Channel Duty-Cycle"
|
|
wgroup.long ($2+0x8)++0x3
|
|
line.long 0x0 "CDTYUPD,PWM Channel Duty Cycle Update Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CDTYUPD,Channel Duty-Cycle Update"
|
|
group.long ($2+0xC)++0x3
|
|
line.long 0x0 "CPRD,PWM Channel Period Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CPRD,Channel Period"
|
|
wgroup.long ($2+0x10)++0x3
|
|
line.long 0x0 "CPRDUPD,PWM Channel Period Update Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CPRDUPD,Channel Period Update"
|
|
rgroup.long ($2+0x14)++0x3
|
|
line.long 0x0 "CCNT,PWM Channel Counter Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "CNT,Channel Counter Register"
|
|
group.long ($2+0x18)++0x3
|
|
line.long 0x0 "DT,PWM Channel Dead Time Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "DTL,Dead-Time Value for PWMLx Output"
|
|
hexmask.long.word 0x0 0.--15. 1. "DTH,Dead-Time Value for PWMHx Output"
|
|
wgroup.long ($2+0x1C)++0x3
|
|
line.long 0x0 "DTUPD,PWM Channel Dead Time Update Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "DTLUPD,Dead-Time Value Update for PWMLx Output"
|
|
hexmask.long.word 0x0 0.--15. 1. "DTHUPD,Dead-Time Value Update for PWMHx Output"
|
|
tree.end
|
|
repeat.end
|
|
base ad:0x4005C000
|
|
newline
|
|
wgroup.long 0x400++0x3
|
|
line.long 0x0 "CMUPD0,PWM Channel Mode Update Register (ch_num = 0)"
|
|
bitfld.long 0x0 13. "CPOLINVUP,Channel Polarity Inversion Update" "0,1"
|
|
bitfld.long 0x0 9. "CPOLUP,Channel Polarity Update" "0,1"
|
|
wgroup.long 0x420++0x3
|
|
line.long 0x0 "CMUPD1,PWM Channel Mode Update Register (ch_num = 1)"
|
|
bitfld.long 0x0 13. "CPOLINVUP,Channel Polarity Inversion Update" "0,1"
|
|
bitfld.long 0x0 9. "CPOLUP,Channel Polarity Update" "0,1"
|
|
group.long 0x42C++0x7
|
|
line.long 0x0 "ETRG1,PWM External Trigger Register (trg_num = 1)"
|
|
bitfld.long 0x0 31. "RFEN,Recoverable Fault Enable" "0,1"
|
|
bitfld.long 0x0 30. "TRGSRC,Trigger Source" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TRGFILT,Filtered input" "0,1"
|
|
bitfld.long 0x0 28. "TRGEDGE,Edge Selection" "0: TRGMODE = 1: TRGINx event detection on falling..,1: TRGMODE = 1: TRGINx event detection on rising.."
|
|
newline
|
|
bitfld.long 0x0 24.--25. "TRGMODE,External Trigger Mode" "0: External trigger is not enabled.,1: External PWM Reset Mode,2: External PWM Start Mode,3: Cycle-by-cycle Duty Mode"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "MAXCNT,Maximum Counter value"
|
|
line.long 0x4 "LEBR1,PWM Leading-Edge Blanking Register (trg_num = 1)"
|
|
bitfld.long 0x4 19. "PWMHREN,PWMH Rising Edge Enable" "0,1"
|
|
bitfld.long 0x4 18. "PWMHFEN,PWMH Falling Edge Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "PWMLREN,PWML Rising Edge Enable" "0,1"
|
|
bitfld.long 0x4 16. "PWMLFEN,PWML Falling Edge Enable" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--6. 1. "LEBDELAY,Leading-Edge Blanking Delay for TRGINx"
|
|
wgroup.long 0x440++0x3
|
|
line.long 0x0 "CMUPD2,PWM Channel Mode Update Register (ch_num = 2)"
|
|
bitfld.long 0x0 13. "CPOLINVUP,Channel Polarity Inversion Update" "0,1"
|
|
bitfld.long 0x0 9. "CPOLUP,Channel Polarity Update" "0,1"
|
|
group.long 0x44C++0x7
|
|
line.long 0x0 "ETRG2,PWM External Trigger Register (trg_num = 2)"
|
|
bitfld.long 0x0 31. "RFEN,Recoverable Fault Enable" "0,1"
|
|
bitfld.long 0x0 30. "TRGSRC,Trigger Source" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TRGFILT,Filtered input" "0,1"
|
|
bitfld.long 0x0 28. "TRGEDGE,Edge Selection" "0: TRGMODE = 1: TRGINx event detection on falling..,1: TRGMODE = 1: TRGINx event detection on rising.."
|
|
newline
|
|
bitfld.long 0x0 24.--25. "TRGMODE,External Trigger Mode" "0: External trigger is not enabled.,1: External PWM Reset Mode,2: External PWM Start Mode,3: Cycle-by-cycle Duty Mode"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "MAXCNT,Maximum Counter value"
|
|
line.long 0x4 "LEBR2,PWM Leading-Edge Blanking Register (trg_num = 2)"
|
|
bitfld.long 0x4 19. "PWMHREN,PWMH Rising Edge Enable" "0,1"
|
|
bitfld.long 0x4 18. "PWMHFEN,PWMH Falling Edge Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "PWMLREN,PWML Rising Edge Enable" "0,1"
|
|
bitfld.long 0x4 16. "PWMLFEN,PWML Falling Edge Enable" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--6. 1. "LEBDELAY,Leading-Edge Blanking Delay for TRGINx"
|
|
wgroup.long 0x460++0x3
|
|
line.long 0x0 "CMUPD3,PWM Channel Mode Update Register (ch_num = 3)"
|
|
bitfld.long 0x0 13. "CPOLINVUP,Channel Polarity Inversion Update" "0,1"
|
|
bitfld.long 0x0 9. "CPOLUP,Channel Polarity Update" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "QSPI (Quad Serial Peripheral Interface)"
|
|
base ad:0x4007C000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0,1"
|
|
bitfld.long 0x0 7. "SWRST,QSPI Software Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "QSPIDIS,QSPI Disable" "0,1"
|
|
bitfld.long 0x0 0. "QSPIEN,QSPI Enable" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "MR,Mode Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "DLYCS,Minimum Inactive QCS Delay"
|
|
hexmask.long.byte 0x0 16.--23. 1. "DLYBCT,Delay Between Consecutive Transfers"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "NBBITS,Number Of Bits Per Transfer"
|
|
bitfld.long 0x0 4.--5. "CSMODE,Chip Select Mode" "0: The chip select is deasserted if QSPI_TDR.TD has..,1: The chip select is deasserted when the bit..,2: The chip select is deasserted systematically..,?"
|
|
newline
|
|
bitfld.long 0x0 2. "WDRBT,Wait Data Read Before Transfer" "0: No effect. In SPI mode a transfer can be..,1: In SPI mode a transfer can start only if the.."
|
|
bitfld.long 0x0 1. "LLB,Local Loopback Enable" "0: Local loopback path disabled.,1: Local loopback path enabled."
|
|
newline
|
|
bitfld.long 0x0 0. "SMM,Serial Memory Mode" "0: The QSPI is in SPI mode.,1: The QSPI is in Serial Memory mode."
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "RDR,Receive Data Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RD,Receive Data"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "TDR,Transmit Data Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "TD,Transmit Data"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 24. "QSPIENS,QSPI Enable Status" "0,1"
|
|
bitfld.long 0x0 10. "INSTRE,Instruction End Status (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CSS,Chip Select Status" "0,1"
|
|
bitfld.long 0x0 8. "CSR,Chip Select Rise (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "OVRES,Overrun Error Status (cleared on read)" "0,1"
|
|
bitfld.long 0x0 2. "TXEMPTY,Transmission Registers Empty (cleared by writing SPI_TDR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty (cleared by writing SPI_TDR)" "0,1"
|
|
bitfld.long 0x0 0. "RDRF,Receive Data Register Full (cleared by reading SPI_RDR)" "0,1"
|
|
wgroup.long 0x14++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 10. "INSTRE,Instruction End Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 9. "CSS,Chip Select Status Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "CSR,Chip Select Rise Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TXEMPTY,Transmission Registers Empty Enable" "0,1"
|
|
bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 10. "INSTRE,Instruction End Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 9. "CSS,Chip Select Status Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "CSR,Chip Select Rise Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 3. "OVRES,Overrun Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "TXEMPTY,Transmission Registers Empty Disable" "0,1"
|
|
bitfld.long 0x4 1. "TDRE,Transmit Data Register Empty Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RDRF,Receive Data Register Full Interrupt Disable" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 10. "INSTRE,Instruction End Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 9. "CSS,Chip Select Status Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "CSR,Chip Select Rise Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TXEMPTY,Transmission Registers Empty Mask" "0,1"
|
|
bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Mask" "0,1"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "SCR,Serial Clock Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "DLYBS,Delay Before QSCK"
|
|
hexmask.long.byte 0x0 8.--15. 1. "SCBR,Serial Clock Baud Rate"
|
|
newline
|
|
bitfld.long 0x0 1. "CPHA,Clock Phase" "0,1"
|
|
bitfld.long 0x0 0. "CPOL,Clock Polarity" "0,1"
|
|
group.long 0x30++0xB
|
|
line.long 0x0 "IAR,Instruction Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "ADDR,Address"
|
|
line.long 0x4 "ICR,Instruction Code Register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "OPT,Option Code"
|
|
hexmask.long.byte 0x4 0.--7. 1. "INST,Instruction Code"
|
|
line.long 0x8 "IFR,Instruction Frame Register"
|
|
hexmask.long.byte 0x8 16.--20. 1. "NBDUM,Number Of Dummy Cycles"
|
|
bitfld.long 0x8 14. "CRM,Continuous Read Mode" "0: The Continuous Read mode is disabled.,1: The Continuous Read mode is enabled."
|
|
newline
|
|
bitfld.long 0x8 12.--13. "TFRTYP,Data Transfer Type" "0: Read transfer from the serial memory.Scrambling..,1: Read data transfer from the serial memory.If..,2: Write transfer into the serial memory.Scrambling..,3: Write data transfer into the serial memory.If.."
|
|
bitfld.long 0x8 10. "ADDRL,Address Length" "0: The address is 24 bits long.,1: The address is 32 bits long."
|
|
newline
|
|
bitfld.long 0x8 8.--9. "OPTL,Option Code Length" "0: The option code is 1 bit long.,1: The option code is 2 bits long.,2: The option code is 4 bits long.,3: The option code is 8 bits long."
|
|
bitfld.long 0x8 7. "DATAEN,Data Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 6. "OPTEN,Option Enable" "0,1"
|
|
bitfld.long 0x8 5. "ADDREN,Address Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 4. "INSTEN,Instruction Enable" "0,1"
|
|
bitfld.long 0x8 0.--2. "WIDTH,Width of Instruction Code Address Option Code and Data" "0: Instruction: Single-bit SPI / Address-Option:..,1: Instruction: Single-bit SPI / Address-Option:..,2: Instruction: Single-bit SPI / Address-Option:..,3: Instruction: Single-bit SPI / Address-Option:..,4: Instruction: Single-bit SPI / Address-Option:..,5: Instruction: Dual SPI / Address-Option: Dual SPI..,6: Instruction: Quad SPI / Address-Option: Quad SPI..,?"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "SMR,Scrambling Mode Register"
|
|
bitfld.long 0x0 1. "RVDIS,Scrambling/Unscrambling Random Value Disable" "0,1"
|
|
bitfld.long 0x0 0. "SCREN,Scrambling/Unscrambling Enable" "0: The scrambling/unscrambling is disabled.,1: The scrambling/unscrambling is enabled."
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x0 "SKR,Scrambling Key Register"
|
|
hexmask.long 0x0 0.--31. 1. "USRK,User Scrambling Key"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.byte 0x0 8.--15. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
tree.end
|
|
tree "RSTC (Reset Controller)"
|
|
base ad:0x400E1800
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "KEY,System Reset Key"
|
|
bitfld.long 0x0 3. "EXTRST,External Reset" "0,1"
|
|
bitfld.long 0x0 0. "PROCRST,Processor Reset" "0,1"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 17. "SRCMP,Software Reset Command in Progress" "0,1"
|
|
bitfld.long 0x0 16. "NRSTL,NRST Pin Level" "0,1"
|
|
bitfld.long 0x0 8.--10. "RSTTYP,Reset Type" "0: First power-up reset,1: Return from Backup Mode,2: Watchdog fault occurred,3: Processor reset required by the software,4: NRST pin detected low,?,?,?"
|
|
bitfld.long 0x0 0. "URSTS,User Reset Status" "0,1"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "MR,Mode Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "KEY,Write Access Password"
|
|
hexmask.long.byte 0x0 8.--11. 1. "ERSTL,External Reset Length"
|
|
bitfld.long 0x0 4. "URSTIEN,User Reset Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "URSTEN,User Reset Enable" "0,1"
|
|
tree.end
|
|
tree "RSWDT (Reinforced Safety Watchdog Timer)"
|
|
base ad:0x400E1900
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "KEY,Password"
|
|
bitfld.long 0x0 0. "WDRSTT,Watchdog Restart" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "MR,Mode Register"
|
|
bitfld.long 0x0 29. "WDIDLEHLT,Watchdog Idle Halt" "0,1"
|
|
bitfld.long 0x0 28. "WDDBGHLT,Watchdog Debug Halt" "0,1"
|
|
hexmask.long.word 0x0 16.--27. 1. "ALLONES,Must Always Be Written with 0xFFF"
|
|
bitfld.long 0x0 15. "WDDIS,Watchdog Disable" "0,1"
|
|
bitfld.long 0x0 13. "WDRSTEN,Watchdog Reset Enable" "0,1"
|
|
bitfld.long 0x0 12. "WDFIEN,Watchdog Fault Interrupt Enable" "0,1"
|
|
hexmask.long.word 0x0 0.--11. 1. "WDV,Watchdog Counter Value"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 0. "WDUNF,Watchdog Underflow" "0,1"
|
|
tree.end
|
|
tree "RTC (Real-time Clock)"
|
|
base ad:0x400E1860
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 16.--17. "CALEVSEL,Calendar Event Selection" "0: Week change (every Monday at time 00:00:00),1: Month change (every 01 of each month at time..,2: Year change (every January 1 at time 00:00:00),?"
|
|
bitfld.long 0x0 8.--9. "TIMEVSEL,Time Event Selection" "0: Minute change,1: Hour change,2: Every day at midnight,3: Every day at noon"
|
|
newline
|
|
bitfld.long 0x0 1. "UPDCAL,Update Request Calendar Register" "0,1"
|
|
bitfld.long 0x0 0. "UPDTIM,Update Request Time Register" "0,1"
|
|
line.long 0x4 "MR,Mode Register"
|
|
bitfld.long 0x4 28.--29. "TPERIOD,Period of the Output Pulse" "0: 1 second,1: 500 ms,2: 250 ms,3: 125 ms"
|
|
bitfld.long 0x4 24.--26. "THIGH,High Duration of the Output Pulse" "0: 31.2 ms,1: 15.6 ms,2: 3.91 ms,3: 976 us,4: 488 us,5: 122 us,6: 30.5 us,7: 15.2 us"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "OUT1,RTCOUT1 Output Source Selection" "0: No waveform stuck at '0',1: 1 Hz square wave,2: 32 Hz square wave,3: 64 Hz square wave,4: 512 Hz square wave,5: Output toggles when alarm flag rises,6: Output is a copy of the alarm flag,7: Duty cycle programmable pulse"
|
|
bitfld.long 0x4 16.--18. "OUT0,RTCOUT0 OutputSource Selection" "0: No waveform stuck at '0',1: 1 Hz square wave,2: 32 Hz square wave,3: 64 Hz square wave,4: 512 Hz square wave,5: Output toggles when alarm flag rises,6: Output is a copy of the alarm flag,7: Duty cycle programmable pulse"
|
|
newline
|
|
bitfld.long 0x4 15. "HIGHPPM,HIGH PPM Correction" "0,1"
|
|
hexmask.long.byte 0x4 8.--14. 1. "CORRECTION,Slow Clock Correction"
|
|
newline
|
|
bitfld.long 0x4 4. "NEGPPM,NEGative PPM Correction" "0,1"
|
|
bitfld.long 0x4 1. "PERSIAN,PERSIAN Calendar" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "HRMOD,12-/24-hour Mode" "0,1"
|
|
line.long 0x8 "TIMR,Time Register"
|
|
bitfld.long 0x8 22. "AMPM,Ante Meridiem Post Meridiem Indicator" "0,1"
|
|
hexmask.long.byte 0x8 16.--21. 1. "HOUR,Current Hour"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--14. 1. "MIN,Current Minute"
|
|
hexmask.long.byte 0x8 0.--6. 1. "SEC,Current Second"
|
|
line.long 0xC "CALR,Calendar Register"
|
|
hexmask.long.byte 0xC 24.--29. 1. "DATE,Current Day in Current Month"
|
|
bitfld.long 0xC 21.--23. "DAY,Current Day in Current Week" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--20. 1. "MONTH,Current Month"
|
|
hexmask.long.byte 0xC 8.--15. 1. "YEAR,Current Year"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "CENT,Current Century"
|
|
line.long 0x10 "TIMALR,Time Alarm Register"
|
|
bitfld.long 0x10 23. "HOUREN,Hour Alarm Enable" "0,1"
|
|
bitfld.long 0x10 22. "AMPM,AM/PM Indicator" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x10 16.--21. 1. "HOUR,Hour Alarm"
|
|
bitfld.long 0x10 15. "MINEN,Minute Alarm Enable" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--14. 1. "MIN,Minute Alarm"
|
|
bitfld.long 0x10 7. "SECEN,Second Alarm Enable" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x10 0.--6. 1. "SEC,Second Alarm"
|
|
line.long 0x14 "CALALR,Calendar Alarm Register"
|
|
bitfld.long 0x14 31. "DATEEN,Date Alarm Enable" "0,1"
|
|
hexmask.long.byte 0x14 24.--29. 1. "DATE,Date Alarm"
|
|
newline
|
|
bitfld.long 0x14 23. "MTHEN,Month Alarm Enable" "0,1"
|
|
hexmask.long.byte 0x14 16.--20. 1. "MONTH,Month Alarm"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 5. "TDERR,Time and/or Date Free Running Error" "0: The internal free running counters are carrying..,1: The internal free running counters have been.."
|
|
bitfld.long 0x0 4. "CALEV,Calendar Event" "0: No calendar event has occurred since the last..,1: At least one calendar event has occurred since.."
|
|
newline
|
|
bitfld.long 0x0 3. "TIMEV,Time Event" "0: No time event has occurred since the last clear.,1: At least one time event has occurred since the.."
|
|
bitfld.long 0x0 2. "SEC,Second Event" "0: No second event has occurred since the last clear.,1: At least one second event has occurred since the.."
|
|
newline
|
|
bitfld.long 0x0 1. "ALARM,Alarm Flag" "0: No alarm matching condition occurred.,1: An alarm matching condition has occurred."
|
|
bitfld.long 0x0 0. "ACKUPD,Acknowledge for Update" "0: Time and calendar registers cannot be updated.,1: Time and calendar registers can be updated."
|
|
wgroup.long 0x1C++0xB
|
|
line.long 0x0 "SCCR,Status Clear Command Register"
|
|
bitfld.long 0x0 5. "TDERRCLR,Time and/or Date Free Running Error Clear" "0,1"
|
|
bitfld.long 0x0 4. "CALCLR,Calendar Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TIMCLR,Time Clear" "0,1"
|
|
bitfld.long 0x0 2. "SECCLR,Second Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ALRCLR,Alarm Clear" "0,1"
|
|
bitfld.long 0x0 0. "ACKCLR,Acknowledge Clear" "0,1"
|
|
line.long 0x4 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x4 5. "TDERREN,Time and/or Date Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 4. "CALEN,Calendar Event Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "TIMEN,Time Event Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 2. "SECEN,Second Event Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "ALREN,Alarm Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "ACKEN,Acknowledge Update Interrupt Enable" "0,1"
|
|
line.long 0x8 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x8 5. "TDERRDIS,Time and/or Date Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 4. "CALDIS,Calendar Event Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "TIMDIS,Time Event Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 2. "SECDIS,Second Event Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "ALRDIS,Alarm Interrupt Disable" "0,1"
|
|
bitfld.long 0x8 0. "ACKDIS,Acknowledge Update Interrupt Disable" "0,1"
|
|
rgroup.long 0x28++0x7
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 5. "TDERR,Time and/or Date Error Mask" "0,1"
|
|
bitfld.long 0x0 4. "CAL,Calendar Event Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TIM,Time Event Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "SEC,Second Event Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ALR,Alarm Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 0. "ACK,Acknowledge Update Interrupt Mask" "0,1"
|
|
line.long 0x4 "VER,Valid Entry Register"
|
|
bitfld.long 0x4 3. "NVCALALR,Non-valid Calendar Alarm" "0,1"
|
|
bitfld.long 0x4 2. "NVTIMALR,Non-valid Time Alarm" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "NVCAL,Non-valid Calendar" "0,1"
|
|
bitfld.long 0x4 0. "NVTIM,Non-valid Time" "0,1"
|
|
tree.end
|
|
tree "RTT (Real-time Timer)"
|
|
base ad:0x400E1830
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "MR,Mode Register"
|
|
bitfld.long 0x0 24. "RTC1HZ,Real-Time Clock 1Hz Clock Selection" "0,1"
|
|
bitfld.long 0x0 20. "RTTDIS,Real-time Timer Disable" "0,1"
|
|
bitfld.long 0x0 18. "RTTRST,Real-time Timer Restart" "0,1"
|
|
bitfld.long 0x0 17. "RTTINCIEN,Real-time Timer Increment Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 16. "ALMIEN,Alarm Interrupt Enable" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "RTPRES,Real-time Timer Prescaler Value"
|
|
line.long 0x4 "AR,Alarm Register"
|
|
hexmask.long 0x4 0.--31. 1. "ALMV,Alarm Value"
|
|
rgroup.long 0x8++0x7
|
|
line.long 0x0 "VR,Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "CRTV,Current Real-time Value"
|
|
line.long 0x4 "SR,Status Register"
|
|
bitfld.long 0x4 1. "RTTINC,Prescaler Roll-over Status (cleared on read)" "0,1"
|
|
bitfld.long 0x4 0. "ALMS,Real-time Alarm Status (cleared on read)" "0,1"
|
|
tree.end
|
|
sif (cpuis("PIC32CZ2051CA70144"))
|
|
tree "SMC (Static Memory Controller)"
|
|
base ad:0x40080000
|
|
repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x40080000 ad:0x40080010 ad:0x40080020 ad:0x40080030)
|
|
tree "SMC_CS_NUMBER[$1]"
|
|
base $2
|
|
group.long ($2)++0xF
|
|
line.long 0x0 "SETUP,SMC Setup Register"
|
|
hexmask.long.byte 0x0 24.--29. 1. "NCS_RD_SETUP,NCS Setup Length in READ Access"
|
|
hexmask.long.byte 0x0 16.--21. 1. "NRD_SETUP,NRD Setup Length"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "NCS_WR_SETUP,NCS Setup Length in WRITE Access"
|
|
hexmask.long.byte 0x0 0.--5. 1. "NWE_SETUP,NWE Setup Length"
|
|
line.long 0x4 "PULSE,SMC Pulse Register"
|
|
hexmask.long.byte 0x4 24.--30. 1. "NCS_RD_PULSE,NCS Pulse Length in READ Access"
|
|
hexmask.long.byte 0x4 16.--22. 1. "NRD_PULSE,NRD Pulse Length"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--14. 1. "NCS_WR_PULSE,NCS Pulse Length in WRITE Access"
|
|
hexmask.long.byte 0x4 0.--6. 1. "NWE_PULSE,NWE Pulse Length"
|
|
line.long 0x8 "CYCLE,SMC Cycle Register"
|
|
hexmask.long.word 0x8 16.--24. 1. "NRD_CYCLE,Total Read Cycle Length"
|
|
hexmask.long.word 0x8 0.--8. 1. "NWE_CYCLE,Total Write Cycle Length"
|
|
line.long 0xC "MODE,SMC Mode Register"
|
|
bitfld.long 0xC 28.--29. "PS,Page Size" "0: 4-byte page,1: 8-byte page,2: 16-byte page,3: 32-byte page"
|
|
bitfld.long 0xC 24. "PMEN,Page Mode Enabled" "0,1"
|
|
newline
|
|
bitfld.long 0xC 20. "TDF_MODE,TDF Optimization" "0,1"
|
|
hexmask.long.byte 0xC 16.--19. 1. "TDF_CYCLES,Data Float Time"
|
|
newline
|
|
bitfld.long 0xC 12. "DBW,Data Bus Width" "0: 8-bit Data Bus,1: 16-bit Data Bus"
|
|
bitfld.long 0xC 8. "BAT,Byte Access Type" "0: Byte select access type:- Write operation is..,1: Byte write access type:- Write operation is.."
|
|
newline
|
|
bitfld.long 0xC 4.--5. "EXNW_MODE,NWAIT Mode" "0: Disabled-The NWAIT input signal is ignored on..,?,2: Frozen Mode-If asserted the NWAIT signal freezes..,3: Ready Mode-The NWAIT signal indicates the.."
|
|
bitfld.long 0xC 1. "WRITE_MODE,Write Mode" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "READ_MODE,Read Mode" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
base ad:0x40080000
|
|
newline
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "OCMS,SMC Off-Chip Memory Scrambling Register"
|
|
bitfld.long 0x0 11. "CS3SE,Chip Select (x = 0 to 3) Scrambling Enable" "0,1"
|
|
bitfld.long 0x0 10. "CS2SE,Chip Select (x = 0 to 3) Scrambling Enable" "0,1"
|
|
bitfld.long 0x0 9. "CS1SE,Chip Select (x = 0 to 3) Scrambling Enable" "0,1"
|
|
bitfld.long 0x0 8. "CS0SE,Chip Select (x = 0 to 3) Scrambling Enable" "0,1"
|
|
bitfld.long 0x0 0. "SMSE,Static Memory Controller Scrambling Enable" "0,1"
|
|
wgroup.long 0x84++0x7
|
|
line.long 0x0 "KEY1,SMC Off-Chip Memory Scrambling KEY1 Register"
|
|
hexmask.long 0x0 0.--31. 1. "KEY1,Off-Chip Memory Scrambling (OCMS) Key Part 1"
|
|
line.long 0x4 "KEY2,SMC Off-Chip Memory Scrambling KEY2 Register"
|
|
hexmask.long 0x4 0.--31. 1. "KEY2,Off-Chip Memory Scrambling (OCMS) Key Part 2"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,SMC Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protect Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,SMC Write Protection Status Register"
|
|
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("PIC32CZ2051CA70100")||cpuis("PIC32CZ2051CA70144")||cpuis("PIC32CZ2051MC70100")||cpuis("PIC32CZ2051MC70144"))
|
|
tree "SPI (Serial Peripheral Interface)"
|
|
base ad:0x0
|
|
tree "SPI0"
|
|
base ad:0x40008000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0,1"
|
|
bitfld.long 0x0 12. "REQCLR,Request to Clear the Comparison Trigger" "0,1"
|
|
bitfld.long 0x0 7. "SWRST,SPI Software Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SPIDIS,SPI Disable" "0,1"
|
|
bitfld.long 0x0 0. "SPIEN,SPI Enable" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "MR,Mode Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "DLYBCS,Delay Between Chip Selects"
|
|
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
|
|
bitfld.long 0x0 7. "LLB,Local Loopback Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "WDRBT,Wait Data Read Before Transfer" "0,1"
|
|
bitfld.long 0x0 4. "MODFDIS,Mode Fault Detection" "0,1"
|
|
bitfld.long 0x0 2. "PCSDEC,Chip Select Decode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "PS,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 0. "MSTR,Master/Slave Mode" "0: Slave,1: Master"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "RDR,Receive Data Register"
|
|
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
|
|
hexmask.long.word 0x0 0.--15. 1. "RD,Receive Data"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "TDR,Transmit Data Register"
|
|
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0,1"
|
|
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
|
|
hexmask.long.word 0x0 0.--15. 1. "TD,Transmit Data"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 16. "SPIENS,SPI Enable Status" "0,1"
|
|
bitfld.long 0x0 10. "UNDES,Underrun Error Status (Slave mode only) (cleared on read)" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty (cleared by writing SPI_TDR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "NSSR,NSS Rising (cleared on read)" "0,1"
|
|
bitfld.long 0x0 3. "OVRES,Overrun Error Status (cleared on read)" "0,1"
|
|
bitfld.long 0x0 2. "MODF,Mode Fault Error (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty (cleared by writing SPI_TDR)" "0,1"
|
|
bitfld.long 0x0 0. "RDRF,Receive Data Register Full (cleared by reading SPI_RDR)" "0,1"
|
|
wgroup.long 0x14++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Enable" "0,1"
|
|
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 10. "UNDES,Underrun Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 9. "TXEMPTY,Transmission Registers Empty Disable" "0,1"
|
|
bitfld.long 0x4 8. "NSSR,NSS Rising Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "OVRES,Overrun Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "MODF,Mode Fault Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 1. "TDRE,SPI Transmit Data Register Empty Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RDRF,Receive Data Register Full Interrupt Disable" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Mask" "0,1"
|
|
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Mask" "0,1"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x30)++0x3
|
|
line.long 0x0 "CSR[$1],Chip Select Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "DLYBCT,Delay Between Consecutive Transfers"
|
|
hexmask.long.byte 0x0 16.--23. 1. "DLYBS,Delay Before SPCK"
|
|
hexmask.long.byte 0x0 8.--15. 1. "SCBR,Serial Clock Bit Rate"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "BITS,Bits Per Transfer"
|
|
bitfld.long 0x0 3. "CSAAT,Chip Select Active After Transfer" "0,1"
|
|
bitfld.long 0x0 2. "CSNAAT,Chip Select Not Active After Transfer (Ignored if CSAAT = 1)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "NCPHA,Clock Phase" "0: Data is valid on clock trailing edge (NCPHA=0),1: Data is valid on clock leading edge (NCPHA=1)"
|
|
bitfld.long 0x0 0. "CPOL,Clock Polarity" "0: Clock is low when inactive (CPOL=0),1: Clock is high when inactive (CPOL=1)"
|
|
repeat.end
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.byte 0x0 8.--15. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
tree.end
|
|
sif (cpuis("PIC32CZ2051CA70144"))
|
|
tree "SPI1"
|
|
base ad:0x40058000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0,1"
|
|
bitfld.long 0x0 12. "REQCLR,Request to Clear the Comparison Trigger" "0,1"
|
|
bitfld.long 0x0 7. "SWRST,SPI Software Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SPIDIS,SPI Disable" "0,1"
|
|
bitfld.long 0x0 0. "SPIEN,SPI Enable" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "MR,Mode Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "DLYBCS,Delay Between Chip Selects"
|
|
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
|
|
bitfld.long 0x0 7. "LLB,Local Loopback Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "WDRBT,Wait Data Read Before Transfer" "0,1"
|
|
bitfld.long 0x0 4. "MODFDIS,Mode Fault Detection" "0,1"
|
|
bitfld.long 0x0 2. "PCSDEC,Chip Select Decode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "PS,Peripheral Select" "0,1"
|
|
bitfld.long 0x0 0. "MSTR,Master/Slave Mode" "0: Slave,1: Master"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "RDR,Receive Data Register"
|
|
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
|
|
hexmask.long.word 0x0 0.--15. 1. "RD,Receive Data"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "TDR,Transmit Data Register"
|
|
bitfld.long 0x0 24. "LASTXFER,Last Transfer" "0,1"
|
|
hexmask.long.byte 0x0 16.--19. 1. "PCS,Peripheral Chip Select"
|
|
hexmask.long.word 0x0 0.--15. 1. "TD,Transmit Data"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 16. "SPIENS,SPI Enable Status" "0,1"
|
|
bitfld.long 0x0 10. "UNDES,Underrun Error Status (Slave mode only) (cleared on read)" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty (cleared by writing SPI_TDR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "NSSR,NSS Rising (cleared on read)" "0,1"
|
|
bitfld.long 0x0 3. "OVRES,Overrun Error Status (cleared on read)" "0,1"
|
|
bitfld.long 0x0 2. "MODF,Mode Fault Error (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TDRE,Transmit Data Register Empty (cleared by writing SPI_TDR)" "0,1"
|
|
bitfld.long 0x0 0. "RDRF,Receive Data Register Full (cleared by reading SPI_RDR)" "0,1"
|
|
wgroup.long 0x14++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Enable" "0,1"
|
|
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 10. "UNDES,Underrun Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 9. "TXEMPTY,Transmission Registers Empty Disable" "0,1"
|
|
bitfld.long 0x4 8. "NSSR,NSS Rising Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "OVRES,Overrun Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "MODF,Mode Fault Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 1. "TDRE,SPI Transmit Data Register Empty Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RDRF,Receive Data Register Full Interrupt Disable" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 10. "UNDES,Underrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Transmission Registers Empty Mask" "0,1"
|
|
bitfld.long 0x0 8. "NSSR,NSS Rising Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "OVRES,Overrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "MODF,Mode Fault Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 1. "TDRE,SPI Transmit Data Register Empty Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RDRF,Receive Data Register Full Interrupt Mask" "0,1"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x30)++0x3
|
|
line.long 0x0 "CSR[$1],Chip Select Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "DLYBCT,Delay Between Consecutive Transfers"
|
|
hexmask.long.byte 0x0 16.--23. 1. "DLYBS,Delay Before SPCK"
|
|
hexmask.long.byte 0x0 8.--15. 1. "SCBR,Serial Clock Bit Rate"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "BITS,Bits Per Transfer"
|
|
bitfld.long 0x0 3. "CSAAT,Chip Select Active After Transfer" "0,1"
|
|
bitfld.long 0x0 2. "CSNAAT,Chip Select Not Active After Transfer (Ignored if CSAAT = 1)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "NCPHA,Clock Phase" "0: Data is valid on clock trailing edge (NCPHA=0),1: Data is valid on clock leading edge (NCPHA=1)"
|
|
bitfld.long 0x0 0. "CPOL,Clock Polarity" "0: Clock is low when inactive (CPOL=0),1: Clock is high when inactive (CPOL=1)"
|
|
repeat.end
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.byte 0x0 8.--15. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "SSC (Synchronous Serial Controller)"
|
|
base ad:0x40004000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 15. "SWRST,Software Reset" "0,1"
|
|
bitfld.long 0x0 9. "TXDIS,Transmit Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "TXEN,Transmit Enable" "0,1"
|
|
bitfld.long 0x0 1. "RXDIS,Receive Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXEN,Receive Enable" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "CMR,Clock Mode Register"
|
|
hexmask.long.word 0x0 0.--11. 1. "DIV,Clock Divider"
|
|
group.long 0x10++0xF
|
|
line.long 0x0 "RCMR,Receive Clock Mode Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "PERIOD,Receive Period Divider Selection"
|
|
hexmask.long.byte 0x0 16.--23. 1. "STTDLY,Receive Start Delay"
|
|
newline
|
|
bitfld.long 0x0 12. "STOP,Receive Stop Selection" "0,1"
|
|
hexmask.long.byte 0x0 8.--11. 1. "START,Receive Start Selection"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "CKG,Receive Clock Gating Selection" "0: None,1: Receive Clock enabled only if RF Low,2: Receive Clock enabled only if RF High,?"
|
|
bitfld.long 0x0 5. "CKI,Receive Clock Inversion" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2.--4. "CKO,Receive Clock Output Mode Selection" "0: None RK pin is an input,1: Continuous Receive Clock RK pin is an output,2: Receive Clock only during data transfers RK pin..,?,?,?,?,?"
|
|
bitfld.long 0x0 0.--1. "CKS,Receive Clock Selection" "0: Divided Clock,1: TK Clock signal,2: RK pin,?"
|
|
line.long 0x4 "RFMR,Receive Frame Mode Register"
|
|
hexmask.long.byte 0x4 28.--31. 1. "FSLEN_EXT,FSLEN Field Extension"
|
|
bitfld.long 0x4 24. "FSEDGE,Frame Sync Edge Detection" "0: Positive Edge Detection,1: Negative Edge Detection"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "FSOS,Receive Frame Sync Output Selection" "0: None RF pin is an input,1: Negative Pulse RF pin is an output,2: Positive Pulse RF pin is an output,3: Driven Low during data transfer RF pin is an..,4: Driven High during data transfer RF pin is an..,5: Toggling at each start of data transfer RF pin..,?,?"
|
|
hexmask.long.byte 0x4 16.--19. 1. "FSLEN,Receive Frame Sync Length"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "DATNB,Data Number per Frame"
|
|
bitfld.long 0x4 7. "MSBF,Most Significant Bit First" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "LOOP,Loop Mode" "0,1"
|
|
hexmask.long.byte 0x4 0.--4. 1. "DATLEN,Data Length"
|
|
line.long 0x8 "TCMR,Transmit Clock Mode Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "PERIOD,Transmit Period Divider Selection"
|
|
hexmask.long.byte 0x8 16.--23. 1. "STTDLY,Transmit Start Delay"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--11. 1. "START,Transmit Start Selection"
|
|
bitfld.long 0x8 6.--7. "CKG,Transmit Clock Gating Selection" "0: None,1: Transmit Clock enabled only if TF Low,2: Transmit Clock enabled only if TF High,?"
|
|
newline
|
|
bitfld.long 0x8 5. "CKI,Transmit Clock Inversion" "0,1"
|
|
bitfld.long 0x8 2.--4. "CKO,Transmit Clock Output Mode Selection" "0: None TK pin is an input,1: Continuous Transmit Clock TK pin is an output,2: Transmit Clock only during data transfers TK pin..,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x8 0.--1. "CKS,Transmit Clock Selection" "0: Divided Clock,1: RK Clock signal,2: TK pin,?"
|
|
line.long 0xC "TFMR,Transmit Frame Mode Register"
|
|
hexmask.long.byte 0xC 28.--31. 1. "FSLEN_EXT,FSLEN Field Extension"
|
|
bitfld.long 0xC 24. "FSEDGE,Frame Sync Edge Detection" "0: Positive Edge Detection,1: Negative Edge Detection"
|
|
newline
|
|
bitfld.long 0xC 23. "FSDEN,Frame Sync Data Enable" "0,1"
|
|
bitfld.long 0xC 20.--22. "FSOS,Transmit Frame Sync Output Selection" "0: None TF pin is an input,1: Negative Pulse TF pin is an output,2: Positive Pulse TF pin is an output,3: Driven Low during data transfer,4: Driven High during data transfer,5: Toggling at each start of data transfer,?,?"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--19. 1. "FSLEN,Transmit Frame Sync Length"
|
|
hexmask.long.byte 0xC 8.--11. 1. "DATNB,Data Number per Frame"
|
|
newline
|
|
bitfld.long 0xC 7. "MSBF,Most Significant Bit First" "0,1"
|
|
bitfld.long 0xC 5. "DATDEF,Data Default Value" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "DATLEN,Data Length"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "RHR,Receive Holding Register"
|
|
hexmask.long 0x0 0.--31. 1. "RDAT,Receive Data"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "THR,Transmit Holding Register"
|
|
hexmask.long 0x0 0.--31. 1. "TDAT,Transmit Data"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x0 "RSHR,Receive Sync. Holding Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RSDAT,Receive Synchronization Data"
|
|
group.long 0x34++0xB
|
|
line.long 0x0 "TSHR,Transmit Sync. Holding Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "TSDAT,Transmit Synchronization Data"
|
|
line.long 0x4 "RC0R,Receive Compare 0 Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "CP0,Receive Compare Data 0"
|
|
line.long 0x8 "RC1R,Receive Compare 1 Register"
|
|
hexmask.long.word 0x8 0.--15. 1. "CP1,Receive Compare Data 1"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 17. "RXEN,Receive Enable" "0,1"
|
|
bitfld.long 0x0 16. "TXEN,Transmit Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "RXSYN,Receive Sync" "0,1"
|
|
bitfld.long 0x0 10. "TXSYN,Transmit Sync" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CP1,Compare 1" "0,1"
|
|
bitfld.long 0x0 8. "CP0,Compare 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRUN,Receive Overrun" "0,1"
|
|
bitfld.long 0x0 4. "RXRDY,Receive Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXEMPTY,Transmit Empty" "0,1"
|
|
bitfld.long 0x0 0. "TXRDY,Transmit Ready" "0,1"
|
|
wgroup.long 0x44++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 11. "RXSYN,Rx Sync Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 10. "TXSYN,Tx Sync Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CP1,Compare 1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 8. "CP0,Compare 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRUN,Receive Overrun Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 4. "RXRDY,Receive Ready Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXEMPTY,Transmit Empty Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "TXRDY,Transmit Ready Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 11. "RXSYN,Rx Sync Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 10. "TXSYN,Tx Sync Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "CP1,Compare 1 Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 8. "CP0,Compare 0 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRUN,Receive Overrun Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 4. "RXRDY,Receive Ready Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "TXEMPTY,Transmit Empty Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 0. "TXRDY,Transmit Ready Interrupt Disable" "0,1"
|
|
rgroup.long 0x4C++0x3
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 11. "RXSYN,Rx Sync Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 10. "TXSYN,Tx Sync Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CP1,Compare 1 Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 8. "CP0,Compare 0 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRUN,Receive Overrun Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 4. "RXRDY,Receive Ready Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXEMPTY,Transmit Empty Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 0. "TXRDY,Transmit Ready Interrupt Mask" "0,1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protect Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
tree.end
|
|
tree "SUPC (Supply Controller)"
|
|
base ad:0x400E1810
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Supply Controller Control Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "KEY,Password"
|
|
bitfld.long 0x0 3. "XTALSEL,Crystal Oscillator Select" "0: No effect.,1: If KEY is correct XTALSEL switches the slow.."
|
|
newline
|
|
bitfld.long 0x0 2. "VROFF,Voltage Regulator Off" "0: No effect.,1: If KEY is correct VROFF asserts the.."
|
|
group.long 0x4++0xF
|
|
line.long 0x0 "SMMR,Supply Controller Supply Monitor Mode Register"
|
|
bitfld.long 0x0 13. "SMIEN,Supply Monitor Interrupt Enable" "0: The SUPC interrupt signal is not affected when a..,1: The SUPC interrupt signal is asserted when a.."
|
|
bitfld.long 0x0 12. "SMRSTEN,Supply Monitor Reset Enable" "0: The core reset signal vddcore_nreset is not..,1: The core reset signal vddcore_nreset is asserted.."
|
|
newline
|
|
bitfld.long 0x0 8.--10. "SMSMPL,Supply Monitor Sampling Period" "0: Supply Monitor disabled,1: Continuous Supply Monitor,2: Supply Monitor enabled one SLCK period every 32..,3: Supply Monitor enabled one SLCK period every 256..,4: Supply Monitor enabled one SLCK period every 2..,?,?,?"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SMTH,Supply Monitor Threshold"
|
|
line.long 0x4 "MR,Supply Controller Mode Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "KEY,Password Key"
|
|
bitfld.long 0x4 20. "OSCBYPASS,Oscillator Bypass" "0: No effect. Clock selection depends on the value..,1: The 32 kHz crystal oscillator is bypassed if.."
|
|
newline
|
|
bitfld.long 0x4 17. "BKUPRETON,SRAM On In Backup Mode" "0,1"
|
|
bitfld.long 0x4 14. "ONREG,Voltage Regulator Enable" "0: Internal voltage regulator is not used (external..,1: Internal voltage regulator is used."
|
|
newline
|
|
bitfld.long 0x4 13. "BODDIS,Brownout Detector Disable" "0: The core brownout detector is enabled.,1: The core brownout detector is disabled."
|
|
bitfld.long 0x4 12. "BODRSTEN,Brownout Detector Reset Enable" "0: The core reset signal vddcore_nreset is not..,1: The core reset signal vddcore_nreset is asserted.."
|
|
line.long 0x8 "WUMR,Supply Controller Wake-up Mode Register"
|
|
bitfld.long 0x8 16.--18. "LPDBC,Low-power Debouncer Period" "0: Disable the low-power debouncers.,1: WKUP0/1 in active state for at least 2 RTCOUTx..,2: WKUP0/1 in active state for at least 3 RTCOUTx..,3: WKUP0/1 in active state for at least 4 RTCOUTx..,4: WKUP0/1 in active state for at least 5 RTCOUTx..,5: WKUP0/1 in active state for at least 6 RTCOUTx..,6: WKUP0/1 in active state for at least 7 RTCOUTx..,7: WKUP0/1 in active state for at least 8 RTCOUTx.."
|
|
bitfld.long 0x8 12.--14. "WKUPDBC,Wake-up Inputs Debouncer Period" "0: Immediate no debouncing detected active at least..,1: WKUPx shall be in its active state for at least..,2: WKUPx shall be in its active state for at least..,3: WKUPx shall be in its active state for at least..,4: WKUPx shall be in its active state for at least..,5: WKUPx shall be in its active state for at least..,?,?"
|
|
newline
|
|
bitfld.long 0x8 7. "LPDBCCLR,Low-power Debouncer Clear" "0: A low-power debounce event does not create an..,1: A low-power debounce event on WKUP0 or WKUP1.."
|
|
bitfld.long 0x8 6. "LPDBCEN1,Low-power Debouncer Enable WKUP1" "0: The WKUP1 input pin is not connected to the..,1: The WKUP1 input pin is connected to the.."
|
|
newline
|
|
bitfld.long 0x8 5. "LPDBCEN0,Low-power Debouncer Enable WKUP0" "0: The WKUP0 input pin is not connected to the..,1: The WKUP0 input pin is connected to the.."
|
|
bitfld.long 0x8 3. "RTCEN,Real-time Clock Wake-up Enable" "0: The RTC alarm signal has no wake-up effect.,1: The RTC alarm signal forces the wake-up of the.."
|
|
newline
|
|
bitfld.long 0x8 2. "RTTEN,Real-time Timer Wake-up Enable" "0: The RTT alarm signal has no wake-up effect.,1: The RTT alarm signal forces the wake-up of the.."
|
|
bitfld.long 0x8 1. "SMEN,Supply Monitor Wake-up Enable" "0: The supply monitor detection has no wake-up..,1: The supply monitor detection forces the wake-up.."
|
|
line.long 0xC "WUIR,Supply Controller Wake-up Inputs Register"
|
|
bitfld.long 0xC 29. "WKUPT13,Wake-up Input Type 0 to 13" "0: A falling edge followed by a low level for a..,1: A rising edge followed by a high level for a.."
|
|
bitfld.long 0xC 28. "WKUPT12,Wake-up Input Type 0 to 12" "0: A falling edge followed by a low level for a..,1: A rising edge followed by a high level for a.."
|
|
newline
|
|
bitfld.long 0xC 27. "WKUPT11,Wake-up Input Type 0 to 11" "0: A falling edge followed by a low level for a..,1: A rising edge followed by a high level for a.."
|
|
bitfld.long 0xC 26. "WKUPT10,Wake-up Input Type 0 to 10" "0: A falling edge followed by a low level for a..,1: A rising edge followed by a high level for a.."
|
|
newline
|
|
bitfld.long 0xC 25. "WKUPT9,Wake-up Input Type 0 to 9" "0: A falling edge followed by a low level for a..,1: A rising edge followed by a high level for a.."
|
|
bitfld.long 0xC 24. "WKUPT8,Wake-up Input Type 0 to 8" "0: A falling edge followed by a low level for a..,1: A rising edge followed by a high level for a.."
|
|
newline
|
|
bitfld.long 0xC 23. "WKUPT7,Wake-up Input Type 0 to 7" "0: A falling edge followed by a low level for a..,1: A rising edge followed by a high level for a.."
|
|
bitfld.long 0xC 22. "WKUPT6,Wake-up Input Type 0 to 6" "0: A falling edge followed by a low level for a..,1: A rising edge followed by a high level for a.."
|
|
newline
|
|
bitfld.long 0xC 21. "WKUPT5,Wake-up Input Type 0 to 5" "0: A falling edge followed by a low level for a..,1: A rising edge followed by a high level for a.."
|
|
bitfld.long 0xC 20. "WKUPT4,Wake-up Input Type 0 to 4" "0: A falling edge followed by a low level for a..,1: A rising edge followed by a high level for a.."
|
|
newline
|
|
bitfld.long 0xC 19. "WKUPT3,Wake-up Input Type 0 to 3" "0: A falling edge followed by a low level for a..,1: A rising edge followed by a high level for a.."
|
|
bitfld.long 0xC 18. "WKUPT2,Wake-up Input Type 0 to 2" "0: A falling edge followed by a low level for a..,1: A rising edge followed by a high level for a.."
|
|
newline
|
|
bitfld.long 0xC 17. "WKUPT1,Wake-up Input Type 0 to 1" "0: A falling edge followed by a low level for a..,1: A rising edge followed by a high level for a.."
|
|
bitfld.long 0xC 16. "WKUPT0,Wake-up Input Type 0 to 0" "0: A falling edge followed by a low level for a..,1: A rising edge followed by a high level for a.."
|
|
newline
|
|
bitfld.long 0xC 13. "WKUPEN13,Wake-up Input Enable 0 to 13" "0: The corresponding wake-up input has no wake-up..,1: The corresponding wake-up input is enabled for a.."
|
|
bitfld.long 0xC 12. "WKUPEN12,Wake-up Input Enable 0 to 12" "0: The corresponding wake-up input has no wake-up..,1: The corresponding wake-up input is enabled for a.."
|
|
newline
|
|
bitfld.long 0xC 11. "WKUPEN11,Wake-up Input Enable 0 to 11" "0: The corresponding wake-up input has no wake-up..,1: The corresponding wake-up input is enabled for a.."
|
|
bitfld.long 0xC 10. "WKUPEN10,Wake-up Input Enable 0 to 10" "0: The corresponding wake-up input has no wake-up..,1: The corresponding wake-up input is enabled for a.."
|
|
newline
|
|
bitfld.long 0xC 9. "WKUPEN9,Wake-up Input Enable 0 to 9" "0: The corresponding wake-up input has no wake-up..,1: The corresponding wake-up input is enabled for a.."
|
|
bitfld.long 0xC 8. "WKUPEN8,Wake-up Input Enable 0 to 8" "0: The corresponding wake-up input has no wake-up..,1: The corresponding wake-up input is enabled for a.."
|
|
newline
|
|
bitfld.long 0xC 7. "WKUPEN7,Wake-up Input Enable 0 to 7" "0: The corresponding wake-up input has no wake-up..,1: The corresponding wake-up input is enabled for a.."
|
|
bitfld.long 0xC 6. "WKUPEN6,Wake-up Input Enable 0 to 6" "0: The corresponding wake-up input has no wake-up..,1: The corresponding wake-up input is enabled for a.."
|
|
newline
|
|
bitfld.long 0xC 5. "WKUPEN5,Wake-up Input Enable 0 to 5" "0: The corresponding wake-up input has no wake-up..,1: The corresponding wake-up input is enabled for a.."
|
|
bitfld.long 0xC 4. "WKUPEN4,Wake-up Input Enable 0 to 4" "0: The corresponding wake-up input has no wake-up..,1: The corresponding wake-up input is enabled for a.."
|
|
newline
|
|
bitfld.long 0xC 3. "WKUPEN3,Wake-up Input Enable 0 to 3" "0: The corresponding wake-up input has no wake-up..,1: The corresponding wake-up input is enabled for a.."
|
|
bitfld.long 0xC 2. "WKUPEN2,Wake-up Input Enable 0 to 2" "0: The corresponding wake-up input has no wake-up..,1: The corresponding wake-up input is enabled for a.."
|
|
newline
|
|
bitfld.long 0xC 1. "WKUPEN1,Wake-up Input Enable 0 to 1" "0: The corresponding wake-up input has no wake-up..,1: The corresponding wake-up input is enabled for a.."
|
|
bitfld.long 0xC 0. "WKUPEN0,Wake-up Input Enable 0 to 0" "0: The corresponding wake-up input has no wake-up..,1: The corresponding wake-up input is enabled for a.."
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "SR,Supply Controller Status Register"
|
|
bitfld.long 0x0 29. "WKUPIS13,WKUPx Input Status (cleared on read)" "0: The corresponding wake-up input is disabled or..,1: The corresponding wake-up input was active at.."
|
|
bitfld.long 0x0 28. "WKUPIS12,WKUPx Input Status (cleared on read)" "0: The corresponding wake-up input is disabled or..,1: The corresponding wake-up input was active at.."
|
|
newline
|
|
bitfld.long 0x0 27. "WKUPIS11,WKUPx Input Status (cleared on read)" "0: The corresponding wake-up input is disabled or..,1: The corresponding wake-up input was active at.."
|
|
bitfld.long 0x0 26. "WKUPIS10,WKUPx Input Status (cleared on read)" "0: The corresponding wake-up input is disabled or..,1: The corresponding wake-up input was active at.."
|
|
newline
|
|
bitfld.long 0x0 25. "WKUPIS9,WKUPx Input Status (cleared on read)" "0: The corresponding wake-up input is disabled or..,1: The corresponding wake-up input was active at.."
|
|
bitfld.long 0x0 24. "WKUPIS8,WKUPx Input Status (cleared on read)" "0: The corresponding wake-up input is disabled or..,1: The corresponding wake-up input was active at.."
|
|
newline
|
|
bitfld.long 0x0 23. "WKUPIS7,WKUPx Input Status (cleared on read)" "0: The corresponding wake-up input is disabled or..,1: The corresponding wake-up input was active at.."
|
|
bitfld.long 0x0 22. "WKUPIS6,WKUPx Input Status (cleared on read)" "0: The corresponding wake-up input is disabled or..,1: The corresponding wake-up input was active at.."
|
|
newline
|
|
bitfld.long 0x0 21. "WKUPIS5,WKUPx Input Status (cleared on read)" "0: The corresponding wake-up input is disabled or..,1: The corresponding wake-up input was active at.."
|
|
bitfld.long 0x0 20. "WKUPIS4,WKUPx Input Status (cleared on read)" "0: The corresponding wake-up input is disabled or..,1: The corresponding wake-up input was active at.."
|
|
newline
|
|
bitfld.long 0x0 19. "WKUPIS3,WKUPx Input Status (cleared on read)" "0: The corresponding wake-up input is disabled or..,1: The corresponding wake-up input was active at.."
|
|
bitfld.long 0x0 18. "WKUPIS2,WKUPx Input Status (cleared on read)" "0: The corresponding wake-up input is disabled or..,1: The corresponding wake-up input was active at.."
|
|
newline
|
|
bitfld.long 0x0 17. "WKUPIS1,WKUPx Input Status (cleared on read)" "0: The corresponding wake-up input is disabled or..,1: The corresponding wake-up input was active at.."
|
|
bitfld.long 0x0 16. "WKUPIS0,WKUPx Input Status (cleared on read)" "0: The corresponding wake-up input is disabled or..,1: The corresponding wake-up input was active at.."
|
|
newline
|
|
bitfld.long 0x0 14. "LPDBCS1,Low-power Debouncer Wake-up Status on WKUP1 (cleared on read)" "0: No wake-up due to the assertion of the WKUP1 pin..,1: At least one wake-up due to the assertion of the.."
|
|
bitfld.long 0x0 13. "LPDBCS0,Low-power Debouncer Wake-up Status on WKUP0 (cleared on read)" "0: No wake-up due to the assertion of the WKUP0 pin..,1: At least one wake-up due to the assertion of the.."
|
|
newline
|
|
bitfld.long 0x0 7. "OSCSEL,32-kHz Oscillator Selection Status" "0: The slow clock SLCK is generated by the embedded..,1: The slow clock SLCK is generated by the 32 kHz.."
|
|
bitfld.long 0x0 6. "SMOS,Supply Monitor Output Status" "0: The supply monitor detected VDDIO higher than..,1: The supply monitor detected VDDIO lower than its.."
|
|
newline
|
|
bitfld.long 0x0 5. "SMS,Supply Monitor Status (cleared on read)" "0: No supply monitor detection since the last read..,1: At least one supply monitor detection since the.."
|
|
bitfld.long 0x0 4. "SMRSTS,Supply Monitor Reset Status (cleared on read)" "0: No supply monitor detection has generated a core..,1: At least one supply monitor detection has.."
|
|
newline
|
|
bitfld.long 0x0 3. "BODRSTS,Brownout Detector Reset Status (cleared on read)" "0: No core brownout rising edge event has been..,1: At least one brownout output rising edge event.."
|
|
bitfld.long 0x0 2. "SMWS,Supply Monitor Detection Wake-up Status (cleared on read)" "0: No wake-up due to a supply monitor detection has..,1: At least one wake-up due to a supply monitor.."
|
|
newline
|
|
bitfld.long 0x0 1. "WKUPS,WKUP Wake-up Status (cleared on read)" "0: No wake-up due to the assertion of the WKUP pins..,1: At least one wake-up due to the assertion of the.."
|
|
group.long 0xD4++0x3
|
|
line.long 0x0 "SYSC_WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
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|
tree.end
|
|
tree "TC (Timer Counter)"
|
|
base ad:0x0
|
|
tree "TC0"
|
|
base ad:0x4000C000
|
|
repeat 3. (list 0x0 0x1 0x2)(list ad:0x4000C000 ad:0x4000C040 ad:0x4000C080)
|
|
tree "TC_CHANNEL[$1]"
|
|
base $2
|
|
wgroup.long ($2)++0x3
|
|
line.long 0x0 "CCR,Channel Control Register (channel = 0)"
|
|
bitfld.long 0x0 2. "SWTRG,Software Trigger Command" "0,1"
|
|
bitfld.long 0x0 1. "CLKDIS,Counter Clock Disable Command" "0,1"
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|
newline
|
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bitfld.long 0x0 0. "CLKEN,Counter Clock Enable Command" "0,1"
|
|
group.long ($2+0x4)++0x3
|
|
line.long 0x0 "CMR_CAPTURE_MODE,Channel Mode Register (channel = 0)"
|
|
bitfld.long 0x0 20.--22. "SBSMPLR,Loading Edge Subsampling Ratio" "0: Load a Capture Register each selected edge,1: Load a Capture Register every 2 selected edges,2: Load a Capture Register every 4 selected edges,3: Load a Capture Register every 8 selected edges,4: Load a Capture Register every 16 selected edges,?,?,?"
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|
bitfld.long 0x0 18.--19. "LDRB,RB Loading Edge Selection" "0: None,1: Rising edge of TIOAx,2: Falling edge of TIOAx,3: Each edge of TIOAx"
|
|
newline
|
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bitfld.long 0x0 16.--17. "LDRA,RA Loading Edge Selection" "0: None,1: Rising edge of TIOAx,2: Falling edge of TIOAx,3: Each edge of TIOAx"
|
|
bitfld.long 0x0 15. "WAVE,Waveform Mode" "0,1"
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|
newline
|
|
bitfld.long 0x0 14. "CPCTRG,RC Compare Trigger Enable" "0,1"
|
|
bitfld.long 0x0 10. "ABETRG,TIOAx or TIOBx External Trigger Selection" "0,1"
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|
newline
|
|
bitfld.long 0x0 8.--9. "ETRGEDG,External Trigger Edge Selection" "0: The clock is not gated by an external signal.,1: Rising edge,2: Falling edge,3: Each edge"
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|
bitfld.long 0x0 7. "LDBDIS,Counter Clock Disable with RB Loading" "0,1"
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|
newline
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bitfld.long 0x0 6. "LDBSTOP,Counter Clock Stopped with RB Loading" "0,1"
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|
bitfld.long 0x0 4.--5. "BURST,Burst Signal Selection" "0: The clock is not gated by an external signal.,1: XC0 is ANDed with the selected clock.,2: XC1 is ANDed with the selected clock.,3: XC2 is ANDed with the selected clock."
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newline
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bitfld.long 0x0 3. "CLKI,Clock Invert" "0,1"
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|
bitfld.long 0x0 0.--2. "TCCLKS,Clock Selection" "0: Clock selected: internal PCK6 clock signal (from..,1: Clock selected: internal MCK/8 clock signal..,2: Clock selected: internal MCK/32 clock signal..,3: Clock selected: internal MCK/128 clock signal..,4: Clock selected: internal SLCK clock signal (from..,5: Clock selected: XC0,6: Clock selected: XC1,7: Clock selected: XC2"
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|
group.long ($2+0x4)++0x7
|
|
line.long 0x0 "CMR_WAVEFORM_MODE,Channel Mode Register (channel = 0)"
|
|
bitfld.long 0x0 30.--31. "BSWTRG,Software Trigger Effect on TIOBx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
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|
bitfld.long 0x0 28.--29. "BEEVT,External Event Effect on TIOBx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
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newline
|
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bitfld.long 0x0 26.--27. "BCPC,RC Compare Effect on TIOBx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
bitfld.long 0x0 24.--25. "BCPB,RB Compare Effect on TIOBx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
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|
newline
|
|
bitfld.long 0x0 22.--23. "ASWTRG,Software Trigger Effect on TIOAx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
bitfld.long 0x0 20.--21. "AEEVT,External Event Effect on TIOAx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
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|
newline
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bitfld.long 0x0 18.--19. "ACPC,RC Compare Effect on TIOAx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
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|
bitfld.long 0x0 16.--17. "ACPA,RA Compare Effect on TIOAx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
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|
newline
|
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bitfld.long 0x0 15. "WAVE,Waveform Mode" "0,1"
|
|
bitfld.long 0x0 13.--14. "WAVSEL,Waveform Selection" "0: UP mode without automatic trigger on RC Compare,1: UPDOWN mode without automatic trigger on RC..,2: UP mode with automatic trigger on RC Compare,3: UPDOWN mode with automatic trigger on RC Compare"
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|
newline
|
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bitfld.long 0x0 12. "ENETRG,External Event Trigger Enable" "0,1"
|
|
bitfld.long 0x0 10.--11. "EEVT,External Event Selection" "0: TIOB,1: XC0,2: XC1,3: XC2"
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|
newline
|
|
bitfld.long 0x0 8.--9. "EEVTEDG,External Event Edge Selection" "0: None,1: Rising edge,2: Falling edge,3: Each edges"
|
|
bitfld.long 0x0 7. "CPCDIS,Counter Clock Disable with RC Loading" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "CPCSTOP,Counter Clock Stopped with RC Compare" "0,1"
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|
bitfld.long 0x0 4.--5. "BURST,Burst Signal Selection" "0: The clock is not gated by an external signal.,1: XC0 is ANDed with the selected clock.,2: XC1 is ANDed with the selected clock.,3: XC2 is ANDed with the selected clock."
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|
newline
|
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bitfld.long 0x0 3. "CLKI,Clock Invert" "0,1"
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|
bitfld.long 0x0 0.--2. "TCCLKS,Clock Selection" "0: Clock selected: internal PCK6 clock signal (from..,1: Clock selected: internal MCK/8 clock signal..,2: Clock selected: internal MCK/32 clock signal..,3: Clock selected: internal MCK/128 clock signal..,4: Clock selected: internal SLCK clock signal (from..,5: Clock selected: XC0,6: Clock selected: XC1,7: Clock selected: XC2"
|
|
line.long 0x4 "SMMR,Stepper Motor Mode Register (channel = 0)"
|
|
bitfld.long 0x4 1. "DOWN,Down Count" "0,1"
|
|
bitfld.long 0x4 0. "GCEN,Gray Count Enable" "0,1"
|
|
rgroup.long ($2+0xC)++0x7
|
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line.long 0x0 "RAB,Register AB (channel = 0)"
|
|
hexmask.long 0x0 0.--31. 1. "RAB,Register A or Register B"
|
|
line.long 0x4 "CV,Counter Value (channel = 0)"
|
|
hexmask.long 0x4 0.--31. 1. "CV,Counter Value"
|
|
group.long ($2+0x14)++0xB
|
|
line.long 0x0 "RA,Register A (channel = 0)"
|
|
hexmask.long 0x0 0.--31. 1. "RA,Register A"
|
|
line.long 0x4 "RB,Register B (channel = 0)"
|
|
hexmask.long 0x4 0.--31. 1. "RB,Register B"
|
|
line.long 0x8 "RC,Register C (channel = 0)"
|
|
hexmask.long 0x8 0.--31. 1. "RC,Register C"
|
|
rgroup.long ($2+0x20)++0x3
|
|
line.long 0x0 "SR,Status Register (channel = 0)"
|
|
bitfld.long 0x0 18. "MTIOB,TIOBx Mirror" "0,1"
|
|
bitfld.long 0x0 17. "MTIOA,TIOAx Mirror" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "CLKSTA,Clock Enabling Status" "0,1"
|
|
bitfld.long 0x0 7. "ETRGS,External Trigger Status (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LDRBS,RB Loading Status (cleared on read)" "0,1"
|
|
bitfld.long 0x0 5. "LDRAS,RA Loading Status (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "CPCS,RC Compare Status (cleared on read)" "0,1"
|
|
bitfld.long 0x0 3. "CPBS,RB Compare Status (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CPAS,RA Compare Status (cleared on read)" "0,1"
|
|
bitfld.long 0x0 1. "LOVRS,Load Overrun Status (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "COVFS,Counter Overflow Status (cleared on read)" "0,1"
|
|
wgroup.long ($2+0x24)++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register (channel = 0)"
|
|
bitfld.long 0x0 7. "ETRGS,External Trigger" "0,1"
|
|
bitfld.long 0x0 6. "LDRBS,RB Loading" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "LDRAS,RA Loading" "0,1"
|
|
bitfld.long 0x0 4. "CPCS,RC Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CPBS,RB Compare" "0,1"
|
|
bitfld.long 0x0 2. "CPAS,RA Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "LOVRS,Load Overrun" "0,1"
|
|
bitfld.long 0x0 0. "COVFS,Counter Overflow" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register (channel = 0)"
|
|
bitfld.long 0x4 7. "ETRGS,External Trigger" "0,1"
|
|
bitfld.long 0x4 6. "LDRBS,RB Loading" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "LDRAS,RA Loading" "0,1"
|
|
bitfld.long 0x4 4. "CPCS,RC Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CPBS,RB Compare" "0,1"
|
|
bitfld.long 0x4 2. "CPAS,RA Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "LOVRS,Load Overrun" "0,1"
|
|
bitfld.long 0x4 0. "COVFS,Counter Overflow" "0,1"
|
|
rgroup.long ($2+0x2C)++0x3
|
|
line.long 0x0 "IMR,Interrupt Mask Register (channel = 0)"
|
|
bitfld.long 0x0 7. "ETRGS,External Trigger" "0,1"
|
|
bitfld.long 0x0 6. "LDRBS,RB Loading" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "LDRAS,RA Loading" "0,1"
|
|
bitfld.long 0x0 4. "CPCS,RC Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CPBS,RB Compare" "0,1"
|
|
bitfld.long 0x0 2. "CPAS,RA Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "LOVRS,Load Overrun" "0,1"
|
|
bitfld.long 0x0 0. "COVFS,Counter Overflow" "0,1"
|
|
group.long ($2+0x30)++0x3
|
|
line.long 0x0 "EMR,Extended Mode Register (channel = 0)"
|
|
bitfld.long 0x0 8. "NODIVCLK,No Divided Clock" "0,1"
|
|
bitfld.long 0x0 4.--5. "TRIGSRCB,Trigger Source for Input B" "0: The trigger/capture input B is driven by..,1: For TC0 to TC10: The trigger/capture input B is..,?,?"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "TRIGSRCA,Trigger Source for Input A" "0: The trigger/capture input A is driven by..,1: The trigger/capture input A is driven internally..,?,?"
|
|
tree.end
|
|
repeat.end
|
|
base ad:0x4000C000
|
|
newline
|
|
wgroup.long 0xC0++0x3
|
|
line.long 0x0 "BCR,Block Control Register"
|
|
bitfld.long 0x0 0. "SYNC,Synchro Command" "0,1"
|
|
group.long 0xC4++0x3
|
|
line.long 0x0 "BMR,Block Mode Register"
|
|
hexmask.long.byte 0x0 26.--29. 1. "MAXCMP,Maximum Consecutive Missing Pulses"
|
|
hexmask.long.byte 0x0 20.--25. 1. "MAXFILT,Maximum Filter"
|
|
bitfld.long 0x0 18. "AUTOC,AutoCorrection of missing pulses" "0,1"
|
|
bitfld.long 0x0 17. "IDXPHB,Index Pin is PHB Pin" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "SWAP,Swap PHA and PHB" "0,1"
|
|
bitfld.long 0x0 15. "INVIDX,Inverted Index" "0,1"
|
|
bitfld.long 0x0 14. "INVB,Inverted PHB" "0,1"
|
|
bitfld.long 0x0 13. "INVA,Inverted PHA" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "EDGPHA,Edge on PHA Count Mode" "0,1"
|
|
bitfld.long 0x0 11. "QDTRANS,Quadrature Decoding Transparent" "0,1"
|
|
bitfld.long 0x0 10. "SPEEDEN,Speed Enabled" "0,1"
|
|
bitfld.long 0x0 9. "POSEN,Position Enabled" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "QDEN,Quadrature Decoder Enabled" "0,1"
|
|
bitfld.long 0x0 4.--5. "TC2XC2S,External Clock Signal 2 Selection" "0: Signal connected to XC2: TCLK2,?,2: Signal connected to XC2: TIOA0,3: Signal connected to XC2: TIOA1"
|
|
bitfld.long 0x0 2.--3. "TC1XC1S,External Clock Signal 1 Selection" "0: Signal connected to XC1: TCLK1,?,2: Signal connected to XC1: TIOA0,3: Signal connected to XC1: TIOA2"
|
|
bitfld.long 0x0 0.--1. "TC0XC0S,External Clock Signal 0 Selection" "0: Signal connected to XC0: TCLK0,?,2: Signal connected to XC0: TIOA1,3: Signal connected to XC0: TIOA2"
|
|
wgroup.long 0xC8++0x7
|
|
line.long 0x0 "QIER,QDEC Interrupt Enable Register"
|
|
bitfld.long 0x0 3. "MPE,Consecutive Missing Pulse Error" "0,1"
|
|
bitfld.long 0x0 2. "QERR,Quadrature Error" "0,1"
|
|
bitfld.long 0x0 1. "DIRCHG,Direction Change" "0,1"
|
|
bitfld.long 0x0 0. "IDX,Index" "0,1"
|
|
line.long 0x4 "QIDR,QDEC Interrupt Disable Register"
|
|
bitfld.long 0x4 3. "MPE,Consecutive Missing Pulse Error" "0,1"
|
|
bitfld.long 0x4 2. "QERR,Quadrature Error" "0,1"
|
|
bitfld.long 0x4 1. "DIRCHG,Direction Change" "0,1"
|
|
bitfld.long 0x4 0. "IDX,Index" "0,1"
|
|
rgroup.long 0xD0++0x7
|
|
line.long 0x0 "QIMR,QDEC Interrupt Mask Register"
|
|
bitfld.long 0x0 3. "MPE,Consecutive Missing Pulse Error" "0,1"
|
|
bitfld.long 0x0 2. "QERR,Quadrature Error" "0,1"
|
|
bitfld.long 0x0 1. "DIRCHG,Direction Change" "0,1"
|
|
bitfld.long 0x0 0. "IDX,Index" "0,1"
|
|
line.long 0x4 "QISR,QDEC Interrupt Status Register"
|
|
bitfld.long 0x4 8. "DIR,Direction" "0,1"
|
|
bitfld.long 0x4 3. "MPE,Consecutive Missing Pulse Error" "0,1"
|
|
bitfld.long 0x4 2. "QERR,Quadrature Error" "0,1"
|
|
bitfld.long 0x4 1. "DIRCHG,Direction Change" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "IDX,Index" "0,1"
|
|
group.long 0xD8++0x3
|
|
line.long 0x0 "FMR,Fault Mode Register"
|
|
bitfld.long 0x0 1. "ENCF1,Enable Compare Fault Channel 1" "0,1"
|
|
bitfld.long 0x0 0. "ENCF0,Enable Compare Fault Channel 0" "0,1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
tree.end
|
|
tree "TC1"
|
|
base ad:0x40010000
|
|
repeat 3. (list 0x0 0x1 0x2)(list ad:0x40010000 ad:0x40010040 ad:0x40010080)
|
|
tree "TC_CHANNEL[$1]"
|
|
base $2
|
|
wgroup.long ($2)++0x3
|
|
line.long 0x0 "CCR,Channel Control Register (channel = 0)"
|
|
bitfld.long 0x0 2. "SWTRG,Software Trigger Command" "0,1"
|
|
bitfld.long 0x0 1. "CLKDIS,Counter Clock Disable Command" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "CLKEN,Counter Clock Enable Command" "0,1"
|
|
group.long ($2+0x4)++0x3
|
|
line.long 0x0 "CMR_CAPTURE_MODE,Channel Mode Register (channel = 0)"
|
|
bitfld.long 0x0 20.--22. "SBSMPLR,Loading Edge Subsampling Ratio" "0: Load a Capture Register each selected edge,1: Load a Capture Register every 2 selected edges,2: Load a Capture Register every 4 selected edges,3: Load a Capture Register every 8 selected edges,4: Load a Capture Register every 16 selected edges,?,?,?"
|
|
bitfld.long 0x0 18.--19. "LDRB,RB Loading Edge Selection" "0: None,1: Rising edge of TIOAx,2: Falling edge of TIOAx,3: Each edge of TIOAx"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "LDRA,RA Loading Edge Selection" "0: None,1: Rising edge of TIOAx,2: Falling edge of TIOAx,3: Each edge of TIOAx"
|
|
bitfld.long 0x0 15. "WAVE,Waveform Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "CPCTRG,RC Compare Trigger Enable" "0,1"
|
|
bitfld.long 0x0 10. "ABETRG,TIOAx or TIOBx External Trigger Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "ETRGEDG,External Trigger Edge Selection" "0: The clock is not gated by an external signal.,1: Rising edge,2: Falling edge,3: Each edge"
|
|
bitfld.long 0x0 7. "LDBDIS,Counter Clock Disable with RB Loading" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LDBSTOP,Counter Clock Stopped with RB Loading" "0,1"
|
|
bitfld.long 0x0 4.--5. "BURST,Burst Signal Selection" "0: The clock is not gated by an external signal.,1: XC0 is ANDed with the selected clock.,2: XC1 is ANDed with the selected clock.,3: XC2 is ANDed with the selected clock."
|
|
newline
|
|
bitfld.long 0x0 3. "CLKI,Clock Invert" "0,1"
|
|
bitfld.long 0x0 0.--2. "TCCLKS,Clock Selection" "0: Clock selected: internal PCK6 clock signal (from..,1: Clock selected: internal MCK/8 clock signal..,2: Clock selected: internal MCK/32 clock signal..,3: Clock selected: internal MCK/128 clock signal..,4: Clock selected: internal SLCK clock signal (from..,5: Clock selected: XC0,6: Clock selected: XC1,7: Clock selected: XC2"
|
|
group.long ($2+0x4)++0x7
|
|
line.long 0x0 "CMR_WAVEFORM_MODE,Channel Mode Register (channel = 0)"
|
|
bitfld.long 0x0 30.--31. "BSWTRG,Software Trigger Effect on TIOBx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
bitfld.long 0x0 28.--29. "BEEVT,External Event Effect on TIOBx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
newline
|
|
bitfld.long 0x0 26.--27. "BCPC,RC Compare Effect on TIOBx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
bitfld.long 0x0 24.--25. "BCPB,RB Compare Effect on TIOBx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
newline
|
|
bitfld.long 0x0 22.--23. "ASWTRG,Software Trigger Effect on TIOAx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
bitfld.long 0x0 20.--21. "AEEVT,External Event Effect on TIOAx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
newline
|
|
bitfld.long 0x0 18.--19. "ACPC,RC Compare Effect on TIOAx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
bitfld.long 0x0 16.--17. "ACPA,RA Compare Effect on TIOAx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
newline
|
|
bitfld.long 0x0 15. "WAVE,Waveform Mode" "0,1"
|
|
bitfld.long 0x0 13.--14. "WAVSEL,Waveform Selection" "0: UP mode without automatic trigger on RC Compare,1: UPDOWN mode without automatic trigger on RC..,2: UP mode with automatic trigger on RC Compare,3: UPDOWN mode with automatic trigger on RC Compare"
|
|
newline
|
|
bitfld.long 0x0 12. "ENETRG,External Event Trigger Enable" "0,1"
|
|
bitfld.long 0x0 10.--11. "EEVT,External Event Selection" "0: TIOB,1: XC0,2: XC1,3: XC2"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "EEVTEDG,External Event Edge Selection" "0: None,1: Rising edge,2: Falling edge,3: Each edges"
|
|
bitfld.long 0x0 7. "CPCDIS,Counter Clock Disable with RC Loading" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "CPCSTOP,Counter Clock Stopped with RC Compare" "0,1"
|
|
bitfld.long 0x0 4.--5. "BURST,Burst Signal Selection" "0: The clock is not gated by an external signal.,1: XC0 is ANDed with the selected clock.,2: XC1 is ANDed with the selected clock.,3: XC2 is ANDed with the selected clock."
|
|
newline
|
|
bitfld.long 0x0 3. "CLKI,Clock Invert" "0,1"
|
|
bitfld.long 0x0 0.--2. "TCCLKS,Clock Selection" "0: Clock selected: internal PCK6 clock signal (from..,1: Clock selected: internal MCK/8 clock signal..,2: Clock selected: internal MCK/32 clock signal..,3: Clock selected: internal MCK/128 clock signal..,4: Clock selected: internal SLCK clock signal (from..,5: Clock selected: XC0,6: Clock selected: XC1,7: Clock selected: XC2"
|
|
line.long 0x4 "SMMR,Stepper Motor Mode Register (channel = 0)"
|
|
bitfld.long 0x4 1. "DOWN,Down Count" "0,1"
|
|
bitfld.long 0x4 0. "GCEN,Gray Count Enable" "0,1"
|
|
rgroup.long ($2+0xC)++0x7
|
|
line.long 0x0 "RAB,Register AB (channel = 0)"
|
|
hexmask.long 0x0 0.--31. 1. "RAB,Register A or Register B"
|
|
line.long 0x4 "CV,Counter Value (channel = 0)"
|
|
hexmask.long 0x4 0.--31. 1. "CV,Counter Value"
|
|
group.long ($2+0x14)++0xB
|
|
line.long 0x0 "RA,Register A (channel = 0)"
|
|
hexmask.long 0x0 0.--31. 1. "RA,Register A"
|
|
line.long 0x4 "RB,Register B (channel = 0)"
|
|
hexmask.long 0x4 0.--31. 1. "RB,Register B"
|
|
line.long 0x8 "RC,Register C (channel = 0)"
|
|
hexmask.long 0x8 0.--31. 1. "RC,Register C"
|
|
rgroup.long ($2+0x20)++0x3
|
|
line.long 0x0 "SR,Status Register (channel = 0)"
|
|
bitfld.long 0x0 18. "MTIOB,TIOBx Mirror" "0,1"
|
|
bitfld.long 0x0 17. "MTIOA,TIOAx Mirror" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "CLKSTA,Clock Enabling Status" "0,1"
|
|
bitfld.long 0x0 7. "ETRGS,External Trigger Status (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LDRBS,RB Loading Status (cleared on read)" "0,1"
|
|
bitfld.long 0x0 5. "LDRAS,RA Loading Status (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "CPCS,RC Compare Status (cleared on read)" "0,1"
|
|
bitfld.long 0x0 3. "CPBS,RB Compare Status (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CPAS,RA Compare Status (cleared on read)" "0,1"
|
|
bitfld.long 0x0 1. "LOVRS,Load Overrun Status (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "COVFS,Counter Overflow Status (cleared on read)" "0,1"
|
|
wgroup.long ($2+0x24)++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register (channel = 0)"
|
|
bitfld.long 0x0 7. "ETRGS,External Trigger" "0,1"
|
|
bitfld.long 0x0 6. "LDRBS,RB Loading" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "LDRAS,RA Loading" "0,1"
|
|
bitfld.long 0x0 4. "CPCS,RC Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CPBS,RB Compare" "0,1"
|
|
bitfld.long 0x0 2. "CPAS,RA Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "LOVRS,Load Overrun" "0,1"
|
|
bitfld.long 0x0 0. "COVFS,Counter Overflow" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register (channel = 0)"
|
|
bitfld.long 0x4 7. "ETRGS,External Trigger" "0,1"
|
|
bitfld.long 0x4 6. "LDRBS,RB Loading" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "LDRAS,RA Loading" "0,1"
|
|
bitfld.long 0x4 4. "CPCS,RC Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CPBS,RB Compare" "0,1"
|
|
bitfld.long 0x4 2. "CPAS,RA Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "LOVRS,Load Overrun" "0,1"
|
|
bitfld.long 0x4 0. "COVFS,Counter Overflow" "0,1"
|
|
rgroup.long ($2+0x2C)++0x3
|
|
line.long 0x0 "IMR,Interrupt Mask Register (channel = 0)"
|
|
bitfld.long 0x0 7. "ETRGS,External Trigger" "0,1"
|
|
bitfld.long 0x0 6. "LDRBS,RB Loading" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "LDRAS,RA Loading" "0,1"
|
|
bitfld.long 0x0 4. "CPCS,RC Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CPBS,RB Compare" "0,1"
|
|
bitfld.long 0x0 2. "CPAS,RA Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "LOVRS,Load Overrun" "0,1"
|
|
bitfld.long 0x0 0. "COVFS,Counter Overflow" "0,1"
|
|
group.long ($2+0x30)++0x3
|
|
line.long 0x0 "EMR,Extended Mode Register (channel = 0)"
|
|
bitfld.long 0x0 8. "NODIVCLK,No Divided Clock" "0,1"
|
|
bitfld.long 0x0 4.--5. "TRIGSRCB,Trigger Source for Input B" "0: The trigger/capture input B is driven by..,1: For TC0 to TC10: The trigger/capture input B is..,?,?"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "TRIGSRCA,Trigger Source for Input A" "0: The trigger/capture input A is driven by..,1: The trigger/capture input A is driven internally..,?,?"
|
|
tree.end
|
|
repeat.end
|
|
base ad:0x40010000
|
|
newline
|
|
wgroup.long 0xC0++0x3
|
|
line.long 0x0 "BCR,Block Control Register"
|
|
bitfld.long 0x0 0. "SYNC,Synchro Command" "0,1"
|
|
group.long 0xC4++0x3
|
|
line.long 0x0 "BMR,Block Mode Register"
|
|
hexmask.long.byte 0x0 26.--29. 1. "MAXCMP,Maximum Consecutive Missing Pulses"
|
|
hexmask.long.byte 0x0 20.--25. 1. "MAXFILT,Maximum Filter"
|
|
bitfld.long 0x0 18. "AUTOC,AutoCorrection of missing pulses" "0,1"
|
|
bitfld.long 0x0 17. "IDXPHB,Index Pin is PHB Pin" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "SWAP,Swap PHA and PHB" "0,1"
|
|
bitfld.long 0x0 15. "INVIDX,Inverted Index" "0,1"
|
|
bitfld.long 0x0 14. "INVB,Inverted PHB" "0,1"
|
|
bitfld.long 0x0 13. "INVA,Inverted PHA" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "EDGPHA,Edge on PHA Count Mode" "0,1"
|
|
bitfld.long 0x0 11. "QDTRANS,Quadrature Decoding Transparent" "0,1"
|
|
bitfld.long 0x0 10. "SPEEDEN,Speed Enabled" "0,1"
|
|
bitfld.long 0x0 9. "POSEN,Position Enabled" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "QDEN,Quadrature Decoder Enabled" "0,1"
|
|
bitfld.long 0x0 4.--5. "TC2XC2S,External Clock Signal 2 Selection" "0: Signal connected to XC2: TCLK2,?,2: Signal connected to XC2: TIOA0,3: Signal connected to XC2: TIOA1"
|
|
bitfld.long 0x0 2.--3. "TC1XC1S,External Clock Signal 1 Selection" "0: Signal connected to XC1: TCLK1,?,2: Signal connected to XC1: TIOA0,3: Signal connected to XC1: TIOA2"
|
|
bitfld.long 0x0 0.--1. "TC0XC0S,External Clock Signal 0 Selection" "0: Signal connected to XC0: TCLK0,?,2: Signal connected to XC0: TIOA1,3: Signal connected to XC0: TIOA2"
|
|
wgroup.long 0xC8++0x7
|
|
line.long 0x0 "QIER,QDEC Interrupt Enable Register"
|
|
bitfld.long 0x0 3. "MPE,Consecutive Missing Pulse Error" "0,1"
|
|
bitfld.long 0x0 2. "QERR,Quadrature Error" "0,1"
|
|
bitfld.long 0x0 1. "DIRCHG,Direction Change" "0,1"
|
|
bitfld.long 0x0 0. "IDX,Index" "0,1"
|
|
line.long 0x4 "QIDR,QDEC Interrupt Disable Register"
|
|
bitfld.long 0x4 3. "MPE,Consecutive Missing Pulse Error" "0,1"
|
|
bitfld.long 0x4 2. "QERR,Quadrature Error" "0,1"
|
|
bitfld.long 0x4 1. "DIRCHG,Direction Change" "0,1"
|
|
bitfld.long 0x4 0. "IDX,Index" "0,1"
|
|
rgroup.long 0xD0++0x7
|
|
line.long 0x0 "QIMR,QDEC Interrupt Mask Register"
|
|
bitfld.long 0x0 3. "MPE,Consecutive Missing Pulse Error" "0,1"
|
|
bitfld.long 0x0 2. "QERR,Quadrature Error" "0,1"
|
|
bitfld.long 0x0 1. "DIRCHG,Direction Change" "0,1"
|
|
bitfld.long 0x0 0. "IDX,Index" "0,1"
|
|
line.long 0x4 "QISR,QDEC Interrupt Status Register"
|
|
bitfld.long 0x4 8. "DIR,Direction" "0,1"
|
|
bitfld.long 0x4 3. "MPE,Consecutive Missing Pulse Error" "0,1"
|
|
bitfld.long 0x4 2. "QERR,Quadrature Error" "0,1"
|
|
bitfld.long 0x4 1. "DIRCHG,Direction Change" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "IDX,Index" "0,1"
|
|
group.long 0xD8++0x3
|
|
line.long 0x0 "FMR,Fault Mode Register"
|
|
bitfld.long 0x0 1. "ENCF1,Enable Compare Fault Channel 1" "0,1"
|
|
bitfld.long 0x0 0. "ENCF0,Enable Compare Fault Channel 0" "0,1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
tree.end
|
|
tree "TC2"
|
|
base ad:0x40014000
|
|
repeat 3. (list 0x0 0x1 0x2)(list ad:0x40014000 ad:0x40014040 ad:0x40014080)
|
|
tree "TC_CHANNEL[$1]"
|
|
base $2
|
|
wgroup.long ($2)++0x3
|
|
line.long 0x0 "CCR,Channel Control Register (channel = 0)"
|
|
bitfld.long 0x0 2. "SWTRG,Software Trigger Command" "0,1"
|
|
bitfld.long 0x0 1. "CLKDIS,Counter Clock Disable Command" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "CLKEN,Counter Clock Enable Command" "0,1"
|
|
group.long ($2+0x4)++0x3
|
|
line.long 0x0 "CMR_CAPTURE_MODE,Channel Mode Register (channel = 0)"
|
|
bitfld.long 0x0 20.--22. "SBSMPLR,Loading Edge Subsampling Ratio" "0: Load a Capture Register each selected edge,1: Load a Capture Register every 2 selected edges,2: Load a Capture Register every 4 selected edges,3: Load a Capture Register every 8 selected edges,4: Load a Capture Register every 16 selected edges,?,?,?"
|
|
bitfld.long 0x0 18.--19. "LDRB,RB Loading Edge Selection" "0: None,1: Rising edge of TIOAx,2: Falling edge of TIOAx,3: Each edge of TIOAx"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "LDRA,RA Loading Edge Selection" "0: None,1: Rising edge of TIOAx,2: Falling edge of TIOAx,3: Each edge of TIOAx"
|
|
bitfld.long 0x0 15. "WAVE,Waveform Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "CPCTRG,RC Compare Trigger Enable" "0,1"
|
|
bitfld.long 0x0 10. "ABETRG,TIOAx or TIOBx External Trigger Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "ETRGEDG,External Trigger Edge Selection" "0: The clock is not gated by an external signal.,1: Rising edge,2: Falling edge,3: Each edge"
|
|
bitfld.long 0x0 7. "LDBDIS,Counter Clock Disable with RB Loading" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LDBSTOP,Counter Clock Stopped with RB Loading" "0,1"
|
|
bitfld.long 0x0 4.--5. "BURST,Burst Signal Selection" "0: The clock is not gated by an external signal.,1: XC0 is ANDed with the selected clock.,2: XC1 is ANDed with the selected clock.,3: XC2 is ANDed with the selected clock."
|
|
newline
|
|
bitfld.long 0x0 3. "CLKI,Clock Invert" "0,1"
|
|
bitfld.long 0x0 0.--2. "TCCLKS,Clock Selection" "0: Clock selected: internal PCK6 clock signal (from..,1: Clock selected: internal MCK/8 clock signal..,2: Clock selected: internal MCK/32 clock signal..,3: Clock selected: internal MCK/128 clock signal..,4: Clock selected: internal SLCK clock signal (from..,5: Clock selected: XC0,6: Clock selected: XC1,7: Clock selected: XC2"
|
|
group.long ($2+0x4)++0x7
|
|
line.long 0x0 "CMR_WAVEFORM_MODE,Channel Mode Register (channel = 0)"
|
|
bitfld.long 0x0 30.--31. "BSWTRG,Software Trigger Effect on TIOBx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
bitfld.long 0x0 28.--29. "BEEVT,External Event Effect on TIOBx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
newline
|
|
bitfld.long 0x0 26.--27. "BCPC,RC Compare Effect on TIOBx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
bitfld.long 0x0 24.--25. "BCPB,RB Compare Effect on TIOBx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
newline
|
|
bitfld.long 0x0 22.--23. "ASWTRG,Software Trigger Effect on TIOAx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
bitfld.long 0x0 20.--21. "AEEVT,External Event Effect on TIOAx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
newline
|
|
bitfld.long 0x0 18.--19. "ACPC,RC Compare Effect on TIOAx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
bitfld.long 0x0 16.--17. "ACPA,RA Compare Effect on TIOAx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
newline
|
|
bitfld.long 0x0 15. "WAVE,Waveform Mode" "0,1"
|
|
bitfld.long 0x0 13.--14. "WAVSEL,Waveform Selection" "0: UP mode without automatic trigger on RC Compare,1: UPDOWN mode without automatic trigger on RC..,2: UP mode with automatic trigger on RC Compare,3: UPDOWN mode with automatic trigger on RC Compare"
|
|
newline
|
|
bitfld.long 0x0 12. "ENETRG,External Event Trigger Enable" "0,1"
|
|
bitfld.long 0x0 10.--11. "EEVT,External Event Selection" "0: TIOB,1: XC0,2: XC1,3: XC2"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "EEVTEDG,External Event Edge Selection" "0: None,1: Rising edge,2: Falling edge,3: Each edges"
|
|
bitfld.long 0x0 7. "CPCDIS,Counter Clock Disable with RC Loading" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "CPCSTOP,Counter Clock Stopped with RC Compare" "0,1"
|
|
bitfld.long 0x0 4.--5. "BURST,Burst Signal Selection" "0: The clock is not gated by an external signal.,1: XC0 is ANDed with the selected clock.,2: XC1 is ANDed with the selected clock.,3: XC2 is ANDed with the selected clock."
|
|
newline
|
|
bitfld.long 0x0 3. "CLKI,Clock Invert" "0,1"
|
|
bitfld.long 0x0 0.--2. "TCCLKS,Clock Selection" "0: Clock selected: internal PCK6 clock signal (from..,1: Clock selected: internal MCK/8 clock signal..,2: Clock selected: internal MCK/32 clock signal..,3: Clock selected: internal MCK/128 clock signal..,4: Clock selected: internal SLCK clock signal (from..,5: Clock selected: XC0,6: Clock selected: XC1,7: Clock selected: XC2"
|
|
line.long 0x4 "SMMR,Stepper Motor Mode Register (channel = 0)"
|
|
bitfld.long 0x4 1. "DOWN,Down Count" "0,1"
|
|
bitfld.long 0x4 0. "GCEN,Gray Count Enable" "0,1"
|
|
rgroup.long ($2+0xC)++0x7
|
|
line.long 0x0 "RAB,Register AB (channel = 0)"
|
|
hexmask.long 0x0 0.--31. 1. "RAB,Register A or Register B"
|
|
line.long 0x4 "CV,Counter Value (channel = 0)"
|
|
hexmask.long 0x4 0.--31. 1. "CV,Counter Value"
|
|
group.long ($2+0x14)++0xB
|
|
line.long 0x0 "RA,Register A (channel = 0)"
|
|
hexmask.long 0x0 0.--31. 1. "RA,Register A"
|
|
line.long 0x4 "RB,Register B (channel = 0)"
|
|
hexmask.long 0x4 0.--31. 1. "RB,Register B"
|
|
line.long 0x8 "RC,Register C (channel = 0)"
|
|
hexmask.long 0x8 0.--31. 1. "RC,Register C"
|
|
rgroup.long ($2+0x20)++0x3
|
|
line.long 0x0 "SR,Status Register (channel = 0)"
|
|
bitfld.long 0x0 18. "MTIOB,TIOBx Mirror" "0,1"
|
|
bitfld.long 0x0 17. "MTIOA,TIOAx Mirror" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "CLKSTA,Clock Enabling Status" "0,1"
|
|
bitfld.long 0x0 7. "ETRGS,External Trigger Status (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LDRBS,RB Loading Status (cleared on read)" "0,1"
|
|
bitfld.long 0x0 5. "LDRAS,RA Loading Status (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "CPCS,RC Compare Status (cleared on read)" "0,1"
|
|
bitfld.long 0x0 3. "CPBS,RB Compare Status (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CPAS,RA Compare Status (cleared on read)" "0,1"
|
|
bitfld.long 0x0 1. "LOVRS,Load Overrun Status (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "COVFS,Counter Overflow Status (cleared on read)" "0,1"
|
|
wgroup.long ($2+0x24)++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register (channel = 0)"
|
|
bitfld.long 0x0 7. "ETRGS,External Trigger" "0,1"
|
|
bitfld.long 0x0 6. "LDRBS,RB Loading" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "LDRAS,RA Loading" "0,1"
|
|
bitfld.long 0x0 4. "CPCS,RC Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CPBS,RB Compare" "0,1"
|
|
bitfld.long 0x0 2. "CPAS,RA Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "LOVRS,Load Overrun" "0,1"
|
|
bitfld.long 0x0 0. "COVFS,Counter Overflow" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register (channel = 0)"
|
|
bitfld.long 0x4 7. "ETRGS,External Trigger" "0,1"
|
|
bitfld.long 0x4 6. "LDRBS,RB Loading" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "LDRAS,RA Loading" "0,1"
|
|
bitfld.long 0x4 4. "CPCS,RC Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CPBS,RB Compare" "0,1"
|
|
bitfld.long 0x4 2. "CPAS,RA Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "LOVRS,Load Overrun" "0,1"
|
|
bitfld.long 0x4 0. "COVFS,Counter Overflow" "0,1"
|
|
rgroup.long ($2+0x2C)++0x3
|
|
line.long 0x0 "IMR,Interrupt Mask Register (channel = 0)"
|
|
bitfld.long 0x0 7. "ETRGS,External Trigger" "0,1"
|
|
bitfld.long 0x0 6. "LDRBS,RB Loading" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "LDRAS,RA Loading" "0,1"
|
|
bitfld.long 0x0 4. "CPCS,RC Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CPBS,RB Compare" "0,1"
|
|
bitfld.long 0x0 2. "CPAS,RA Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "LOVRS,Load Overrun" "0,1"
|
|
bitfld.long 0x0 0. "COVFS,Counter Overflow" "0,1"
|
|
group.long ($2+0x30)++0x3
|
|
line.long 0x0 "EMR,Extended Mode Register (channel = 0)"
|
|
bitfld.long 0x0 8. "NODIVCLK,No Divided Clock" "0,1"
|
|
bitfld.long 0x0 4.--5. "TRIGSRCB,Trigger Source for Input B" "0: The trigger/capture input B is driven by..,1: For TC0 to TC10: The trigger/capture input B is..,?,?"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "TRIGSRCA,Trigger Source for Input A" "0: The trigger/capture input A is driven by..,1: The trigger/capture input A is driven internally..,?,?"
|
|
tree.end
|
|
repeat.end
|
|
base ad:0x40014000
|
|
newline
|
|
wgroup.long 0xC0++0x3
|
|
line.long 0x0 "BCR,Block Control Register"
|
|
bitfld.long 0x0 0. "SYNC,Synchro Command" "0,1"
|
|
group.long 0xC4++0x3
|
|
line.long 0x0 "BMR,Block Mode Register"
|
|
hexmask.long.byte 0x0 26.--29. 1. "MAXCMP,Maximum Consecutive Missing Pulses"
|
|
hexmask.long.byte 0x0 20.--25. 1. "MAXFILT,Maximum Filter"
|
|
bitfld.long 0x0 18. "AUTOC,AutoCorrection of missing pulses" "0,1"
|
|
bitfld.long 0x0 17. "IDXPHB,Index Pin is PHB Pin" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "SWAP,Swap PHA and PHB" "0,1"
|
|
bitfld.long 0x0 15. "INVIDX,Inverted Index" "0,1"
|
|
bitfld.long 0x0 14. "INVB,Inverted PHB" "0,1"
|
|
bitfld.long 0x0 13. "INVA,Inverted PHA" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "EDGPHA,Edge on PHA Count Mode" "0,1"
|
|
bitfld.long 0x0 11. "QDTRANS,Quadrature Decoding Transparent" "0,1"
|
|
bitfld.long 0x0 10. "SPEEDEN,Speed Enabled" "0,1"
|
|
bitfld.long 0x0 9. "POSEN,Position Enabled" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "QDEN,Quadrature Decoder Enabled" "0,1"
|
|
bitfld.long 0x0 4.--5. "TC2XC2S,External Clock Signal 2 Selection" "0: Signal connected to XC2: TCLK2,?,2: Signal connected to XC2: TIOA0,3: Signal connected to XC2: TIOA1"
|
|
bitfld.long 0x0 2.--3. "TC1XC1S,External Clock Signal 1 Selection" "0: Signal connected to XC1: TCLK1,?,2: Signal connected to XC1: TIOA0,3: Signal connected to XC1: TIOA2"
|
|
bitfld.long 0x0 0.--1. "TC0XC0S,External Clock Signal 0 Selection" "0: Signal connected to XC0: TCLK0,?,2: Signal connected to XC0: TIOA1,3: Signal connected to XC0: TIOA2"
|
|
wgroup.long 0xC8++0x7
|
|
line.long 0x0 "QIER,QDEC Interrupt Enable Register"
|
|
bitfld.long 0x0 3. "MPE,Consecutive Missing Pulse Error" "0,1"
|
|
bitfld.long 0x0 2. "QERR,Quadrature Error" "0,1"
|
|
bitfld.long 0x0 1. "DIRCHG,Direction Change" "0,1"
|
|
bitfld.long 0x0 0. "IDX,Index" "0,1"
|
|
line.long 0x4 "QIDR,QDEC Interrupt Disable Register"
|
|
bitfld.long 0x4 3. "MPE,Consecutive Missing Pulse Error" "0,1"
|
|
bitfld.long 0x4 2. "QERR,Quadrature Error" "0,1"
|
|
bitfld.long 0x4 1. "DIRCHG,Direction Change" "0,1"
|
|
bitfld.long 0x4 0. "IDX,Index" "0,1"
|
|
rgroup.long 0xD0++0x7
|
|
line.long 0x0 "QIMR,QDEC Interrupt Mask Register"
|
|
bitfld.long 0x0 3. "MPE,Consecutive Missing Pulse Error" "0,1"
|
|
bitfld.long 0x0 2. "QERR,Quadrature Error" "0,1"
|
|
bitfld.long 0x0 1. "DIRCHG,Direction Change" "0,1"
|
|
bitfld.long 0x0 0. "IDX,Index" "0,1"
|
|
line.long 0x4 "QISR,QDEC Interrupt Status Register"
|
|
bitfld.long 0x4 8. "DIR,Direction" "0,1"
|
|
bitfld.long 0x4 3. "MPE,Consecutive Missing Pulse Error" "0,1"
|
|
bitfld.long 0x4 2. "QERR,Quadrature Error" "0,1"
|
|
bitfld.long 0x4 1. "DIRCHG,Direction Change" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "IDX,Index" "0,1"
|
|
group.long 0xD8++0x3
|
|
line.long 0x0 "FMR,Fault Mode Register"
|
|
bitfld.long 0x0 1. "ENCF1,Enable Compare Fault Channel 1" "0,1"
|
|
bitfld.long 0x0 0. "ENCF0,Enable Compare Fault Channel 0" "0,1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
tree.end
|
|
tree "TC3"
|
|
base ad:0x40054000
|
|
repeat 3. (list 0x0 0x1 0x2)(list ad:0x40054000 ad:0x40054040 ad:0x40054080)
|
|
tree "TC_CHANNEL[$1]"
|
|
base $2
|
|
wgroup.long ($2)++0x3
|
|
line.long 0x0 "CCR,Channel Control Register (channel = 0)"
|
|
bitfld.long 0x0 2. "SWTRG,Software Trigger Command" "0,1"
|
|
bitfld.long 0x0 1. "CLKDIS,Counter Clock Disable Command" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "CLKEN,Counter Clock Enable Command" "0,1"
|
|
group.long ($2+0x4)++0x3
|
|
line.long 0x0 "CMR_CAPTURE_MODE,Channel Mode Register (channel = 0)"
|
|
bitfld.long 0x0 20.--22. "SBSMPLR,Loading Edge Subsampling Ratio" "0: Load a Capture Register each selected edge,1: Load a Capture Register every 2 selected edges,2: Load a Capture Register every 4 selected edges,3: Load a Capture Register every 8 selected edges,4: Load a Capture Register every 16 selected edges,?,?,?"
|
|
bitfld.long 0x0 18.--19. "LDRB,RB Loading Edge Selection" "0: None,1: Rising edge of TIOAx,2: Falling edge of TIOAx,3: Each edge of TIOAx"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "LDRA,RA Loading Edge Selection" "0: None,1: Rising edge of TIOAx,2: Falling edge of TIOAx,3: Each edge of TIOAx"
|
|
bitfld.long 0x0 15. "WAVE,Waveform Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "CPCTRG,RC Compare Trigger Enable" "0,1"
|
|
bitfld.long 0x0 10. "ABETRG,TIOAx or TIOBx External Trigger Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "ETRGEDG,External Trigger Edge Selection" "0: The clock is not gated by an external signal.,1: Rising edge,2: Falling edge,3: Each edge"
|
|
bitfld.long 0x0 7. "LDBDIS,Counter Clock Disable with RB Loading" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LDBSTOP,Counter Clock Stopped with RB Loading" "0,1"
|
|
bitfld.long 0x0 4.--5. "BURST,Burst Signal Selection" "0: The clock is not gated by an external signal.,1: XC0 is ANDed with the selected clock.,2: XC1 is ANDed with the selected clock.,3: XC2 is ANDed with the selected clock."
|
|
newline
|
|
bitfld.long 0x0 3. "CLKI,Clock Invert" "0,1"
|
|
bitfld.long 0x0 0.--2. "TCCLKS,Clock Selection" "0: Clock selected: internal PCK6 clock signal (from..,1: Clock selected: internal MCK/8 clock signal..,2: Clock selected: internal MCK/32 clock signal..,3: Clock selected: internal MCK/128 clock signal..,4: Clock selected: internal SLCK clock signal (from..,5: Clock selected: XC0,6: Clock selected: XC1,7: Clock selected: XC2"
|
|
group.long ($2+0x4)++0x7
|
|
line.long 0x0 "CMR_WAVEFORM_MODE,Channel Mode Register (channel = 0)"
|
|
bitfld.long 0x0 30.--31. "BSWTRG,Software Trigger Effect on TIOBx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
bitfld.long 0x0 28.--29. "BEEVT,External Event Effect on TIOBx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
newline
|
|
bitfld.long 0x0 26.--27. "BCPC,RC Compare Effect on TIOBx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
bitfld.long 0x0 24.--25. "BCPB,RB Compare Effect on TIOBx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
newline
|
|
bitfld.long 0x0 22.--23. "ASWTRG,Software Trigger Effect on TIOAx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
bitfld.long 0x0 20.--21. "AEEVT,External Event Effect on TIOAx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
newline
|
|
bitfld.long 0x0 18.--19. "ACPC,RC Compare Effect on TIOAx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
bitfld.long 0x0 16.--17. "ACPA,RA Compare Effect on TIOAx" "0: NONE,1: SET,2: CLEAR,3: TOGGLE"
|
|
newline
|
|
bitfld.long 0x0 15. "WAVE,Waveform Mode" "0,1"
|
|
bitfld.long 0x0 13.--14. "WAVSEL,Waveform Selection" "0: UP mode without automatic trigger on RC Compare,1: UPDOWN mode without automatic trigger on RC..,2: UP mode with automatic trigger on RC Compare,3: UPDOWN mode with automatic trigger on RC Compare"
|
|
newline
|
|
bitfld.long 0x0 12. "ENETRG,External Event Trigger Enable" "0,1"
|
|
bitfld.long 0x0 10.--11. "EEVT,External Event Selection" "0: TIOB,1: XC0,2: XC1,3: XC2"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "EEVTEDG,External Event Edge Selection" "0: None,1: Rising edge,2: Falling edge,3: Each edges"
|
|
bitfld.long 0x0 7. "CPCDIS,Counter Clock Disable with RC Loading" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "CPCSTOP,Counter Clock Stopped with RC Compare" "0,1"
|
|
bitfld.long 0x0 4.--5. "BURST,Burst Signal Selection" "0: The clock is not gated by an external signal.,1: XC0 is ANDed with the selected clock.,2: XC1 is ANDed with the selected clock.,3: XC2 is ANDed with the selected clock."
|
|
newline
|
|
bitfld.long 0x0 3. "CLKI,Clock Invert" "0,1"
|
|
bitfld.long 0x0 0.--2. "TCCLKS,Clock Selection" "0: Clock selected: internal PCK6 clock signal (from..,1: Clock selected: internal MCK/8 clock signal..,2: Clock selected: internal MCK/32 clock signal..,3: Clock selected: internal MCK/128 clock signal..,4: Clock selected: internal SLCK clock signal (from..,5: Clock selected: XC0,6: Clock selected: XC1,7: Clock selected: XC2"
|
|
line.long 0x4 "SMMR,Stepper Motor Mode Register (channel = 0)"
|
|
bitfld.long 0x4 1. "DOWN,Down Count" "0,1"
|
|
bitfld.long 0x4 0. "GCEN,Gray Count Enable" "0,1"
|
|
rgroup.long ($2+0xC)++0x7
|
|
line.long 0x0 "RAB,Register AB (channel = 0)"
|
|
hexmask.long 0x0 0.--31. 1. "RAB,Register A or Register B"
|
|
line.long 0x4 "CV,Counter Value (channel = 0)"
|
|
hexmask.long 0x4 0.--31. 1. "CV,Counter Value"
|
|
group.long ($2+0x14)++0xB
|
|
line.long 0x0 "RA,Register A (channel = 0)"
|
|
hexmask.long 0x0 0.--31. 1. "RA,Register A"
|
|
line.long 0x4 "RB,Register B (channel = 0)"
|
|
hexmask.long 0x4 0.--31. 1. "RB,Register B"
|
|
line.long 0x8 "RC,Register C (channel = 0)"
|
|
hexmask.long 0x8 0.--31. 1. "RC,Register C"
|
|
rgroup.long ($2+0x20)++0x3
|
|
line.long 0x0 "SR,Status Register (channel = 0)"
|
|
bitfld.long 0x0 18. "MTIOB,TIOBx Mirror" "0,1"
|
|
bitfld.long 0x0 17. "MTIOA,TIOAx Mirror" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "CLKSTA,Clock Enabling Status" "0,1"
|
|
bitfld.long 0x0 7. "ETRGS,External Trigger Status (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LDRBS,RB Loading Status (cleared on read)" "0,1"
|
|
bitfld.long 0x0 5. "LDRAS,RA Loading Status (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "CPCS,RC Compare Status (cleared on read)" "0,1"
|
|
bitfld.long 0x0 3. "CPBS,RB Compare Status (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CPAS,RA Compare Status (cleared on read)" "0,1"
|
|
bitfld.long 0x0 1. "LOVRS,Load Overrun Status (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "COVFS,Counter Overflow Status (cleared on read)" "0,1"
|
|
wgroup.long ($2+0x24)++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register (channel = 0)"
|
|
bitfld.long 0x0 7. "ETRGS,External Trigger" "0,1"
|
|
bitfld.long 0x0 6. "LDRBS,RB Loading" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "LDRAS,RA Loading" "0,1"
|
|
bitfld.long 0x0 4. "CPCS,RC Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CPBS,RB Compare" "0,1"
|
|
bitfld.long 0x0 2. "CPAS,RA Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "LOVRS,Load Overrun" "0,1"
|
|
bitfld.long 0x0 0. "COVFS,Counter Overflow" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register (channel = 0)"
|
|
bitfld.long 0x4 7. "ETRGS,External Trigger" "0,1"
|
|
bitfld.long 0x4 6. "LDRBS,RB Loading" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "LDRAS,RA Loading" "0,1"
|
|
bitfld.long 0x4 4. "CPCS,RC Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CPBS,RB Compare" "0,1"
|
|
bitfld.long 0x4 2. "CPAS,RA Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "LOVRS,Load Overrun" "0,1"
|
|
bitfld.long 0x4 0. "COVFS,Counter Overflow" "0,1"
|
|
rgroup.long ($2+0x2C)++0x3
|
|
line.long 0x0 "IMR,Interrupt Mask Register (channel = 0)"
|
|
bitfld.long 0x0 7. "ETRGS,External Trigger" "0,1"
|
|
bitfld.long 0x0 6. "LDRBS,RB Loading" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "LDRAS,RA Loading" "0,1"
|
|
bitfld.long 0x0 4. "CPCS,RC Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CPBS,RB Compare" "0,1"
|
|
bitfld.long 0x0 2. "CPAS,RA Compare" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "LOVRS,Load Overrun" "0,1"
|
|
bitfld.long 0x0 0. "COVFS,Counter Overflow" "0,1"
|
|
group.long ($2+0x30)++0x3
|
|
line.long 0x0 "EMR,Extended Mode Register (channel = 0)"
|
|
bitfld.long 0x0 8. "NODIVCLK,No Divided Clock" "0,1"
|
|
bitfld.long 0x0 4.--5. "TRIGSRCB,Trigger Source for Input B" "0: The trigger/capture input B is driven by..,1: For TC0 to TC10: The trigger/capture input B is..,?,?"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "TRIGSRCA,Trigger Source for Input A" "0: The trigger/capture input A is driven by..,1: The trigger/capture input A is driven internally..,?,?"
|
|
tree.end
|
|
repeat.end
|
|
base ad:0x40054000
|
|
newline
|
|
wgroup.long 0xC0++0x3
|
|
line.long 0x0 "BCR,Block Control Register"
|
|
bitfld.long 0x0 0. "SYNC,Synchro Command" "0,1"
|
|
group.long 0xC4++0x3
|
|
line.long 0x0 "BMR,Block Mode Register"
|
|
hexmask.long.byte 0x0 26.--29. 1. "MAXCMP,Maximum Consecutive Missing Pulses"
|
|
hexmask.long.byte 0x0 20.--25. 1. "MAXFILT,Maximum Filter"
|
|
bitfld.long 0x0 18. "AUTOC,AutoCorrection of missing pulses" "0,1"
|
|
bitfld.long 0x0 17. "IDXPHB,Index Pin is PHB Pin" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "SWAP,Swap PHA and PHB" "0,1"
|
|
bitfld.long 0x0 15. "INVIDX,Inverted Index" "0,1"
|
|
bitfld.long 0x0 14. "INVB,Inverted PHB" "0,1"
|
|
bitfld.long 0x0 13. "INVA,Inverted PHA" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "EDGPHA,Edge on PHA Count Mode" "0,1"
|
|
bitfld.long 0x0 11. "QDTRANS,Quadrature Decoding Transparent" "0,1"
|
|
bitfld.long 0x0 10. "SPEEDEN,Speed Enabled" "0,1"
|
|
bitfld.long 0x0 9. "POSEN,Position Enabled" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "QDEN,Quadrature Decoder Enabled" "0,1"
|
|
bitfld.long 0x0 4.--5. "TC2XC2S,External Clock Signal 2 Selection" "0: Signal connected to XC2: TCLK2,?,2: Signal connected to XC2: TIOA0,3: Signal connected to XC2: TIOA1"
|
|
bitfld.long 0x0 2.--3. "TC1XC1S,External Clock Signal 1 Selection" "0: Signal connected to XC1: TCLK1,?,2: Signal connected to XC1: TIOA0,3: Signal connected to XC1: TIOA2"
|
|
bitfld.long 0x0 0.--1. "TC0XC0S,External Clock Signal 0 Selection" "0: Signal connected to XC0: TCLK0,?,2: Signal connected to XC0: TIOA1,3: Signal connected to XC0: TIOA2"
|
|
wgroup.long 0xC8++0x7
|
|
line.long 0x0 "QIER,QDEC Interrupt Enable Register"
|
|
bitfld.long 0x0 3. "MPE,Consecutive Missing Pulse Error" "0,1"
|
|
bitfld.long 0x0 2. "QERR,Quadrature Error" "0,1"
|
|
bitfld.long 0x0 1. "DIRCHG,Direction Change" "0,1"
|
|
bitfld.long 0x0 0. "IDX,Index" "0,1"
|
|
line.long 0x4 "QIDR,QDEC Interrupt Disable Register"
|
|
bitfld.long 0x4 3. "MPE,Consecutive Missing Pulse Error" "0,1"
|
|
bitfld.long 0x4 2. "QERR,Quadrature Error" "0,1"
|
|
bitfld.long 0x4 1. "DIRCHG,Direction Change" "0,1"
|
|
bitfld.long 0x4 0. "IDX,Index" "0,1"
|
|
rgroup.long 0xD0++0x7
|
|
line.long 0x0 "QIMR,QDEC Interrupt Mask Register"
|
|
bitfld.long 0x0 3. "MPE,Consecutive Missing Pulse Error" "0,1"
|
|
bitfld.long 0x0 2. "QERR,Quadrature Error" "0,1"
|
|
bitfld.long 0x0 1. "DIRCHG,Direction Change" "0,1"
|
|
bitfld.long 0x0 0. "IDX,Index" "0,1"
|
|
line.long 0x4 "QISR,QDEC Interrupt Status Register"
|
|
bitfld.long 0x4 8. "DIR,Direction" "0,1"
|
|
bitfld.long 0x4 3. "MPE,Consecutive Missing Pulse Error" "0,1"
|
|
bitfld.long 0x4 2. "QERR,Quadrature Error" "0,1"
|
|
bitfld.long 0x4 1. "DIRCHG,Direction Change" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "IDX,Index" "0,1"
|
|
group.long 0xD8++0x3
|
|
line.long 0x0 "FMR,Fault Mode Register"
|
|
bitfld.long 0x0 1. "ENCF1,Enable Compare Fault Channel 1" "0,1"
|
|
bitfld.long 0x0 0. "ENCF0,Enable Compare Fault Channel 0" "0,1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "TRNG (True Random Number Generator)"
|
|
base ad:0x40070000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "KEY,Security Key"
|
|
bitfld.long 0x0 0. "ENABLE,Enables the TRNG to Provide Random Values" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 0. "DATRDY,Data Ready Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 0. "DATRDY,Data Ready Interrupt Disable" "0,1"
|
|
rgroup.long 0x18++0x7
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 0. "DATRDY,Data Ready Interrupt Mask" "0,1"
|
|
line.long 0x4 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x4 0. "DATRDY,Data Ready" "0,1"
|
|
rgroup.long 0x50++0x3
|
|
line.long 0x0 "ODATA,Output Data Register"
|
|
hexmask.long 0x0 0.--31. 1. "ODATA,Output Data"
|
|
tree.end
|
|
tree "TWIHS (Two-Wire Interface)"
|
|
base ad:0x0
|
|
tree "TWIHS0"
|
|
base ad:0x40018000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0,1"
|
|
bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0,1"
|
|
bitfld.long 0x0 26. "LOCKCLR,Lock Clear" "0,1"
|
|
bitfld.long 0x0 24. "THRCLR,Transmit Holding Register Clear" "0,1"
|
|
bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0,1"
|
|
bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0,1"
|
|
bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "PECRQ,PEC Request" "0,1"
|
|
bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0,1"
|
|
bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0,1"
|
|
bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0,1"
|
|
bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0,1"
|
|
bitfld.long 0x0 9. "HSDIS,TWIHS High-Speed Mode Disabled" "0,1"
|
|
bitfld.long 0x0 8. "HSEN,TWIHS High-Speed Mode Enabled" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SWRST,Software Reset" "0,1"
|
|
bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0,1"
|
|
bitfld.long 0x0 5. "SVDIS,TWIHS Slave Mode Disabled" "0,1"
|
|
bitfld.long 0x0 4. "SVEN,TWIHS Slave Mode Enabled" "0,1"
|
|
bitfld.long 0x0 3. "MSDIS,TWIHS Master Mode Disabled" "0,1"
|
|
bitfld.long 0x0 2. "MSEN,TWIHS Master Mode Enabled" "0,1"
|
|
bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "START,Send a START Condition" "0,1"
|
|
group.long 0x4++0xF
|
|
line.long 0x0 "MMR,Master Mode Register"
|
|
hexmask.long.byte 0x0 16.--22. 1. "DADR,Device Address"
|
|
bitfld.long 0x0 12. "MREAD,Master Read Direction" "0,1"
|
|
bitfld.long 0x0 8.--9. "IADRSZ,Internal Device Address Size" "0: No internal device address,1: One-byte internal device address,2: Two-byte internal device address,3: Three-byte internal device address"
|
|
line.long 0x4 "SMR,Slave Mode Register"
|
|
bitfld.long 0x4 31. "DATAMEN,Data Matching Enable" "0,1"
|
|
bitfld.long 0x4 30. "SADR3EN,Slave Address 3 Enable" "0,1"
|
|
bitfld.long 0x4 29. "SADR2EN,Slave Address 2 Enable" "0,1"
|
|
bitfld.long 0x4 28. "SADR1EN,Slave Address 1 Enable" "0,1"
|
|
hexmask.long.byte 0x4 16.--22. 1. "SADR,Slave Address"
|
|
hexmask.long.byte 0x4 8.--14. 1. "MASK,Slave Address Mask"
|
|
bitfld.long 0x4 6. "SCLWSDIS,Clock Wait State Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "SMHH,SMBus Host Header" "0,1"
|
|
bitfld.long 0x4 2. "SMDA,SMBus Default Address" "0,1"
|
|
bitfld.long 0x4 0. "NACKEN,Slave Receiver Data Phase NACK enable" "0,1"
|
|
line.long 0x8 "IADR,Internal Address Register"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. "IADR,Internal Address"
|
|
line.long 0xC "CWGR,Clock Waveform Generator Register"
|
|
hexmask.long.byte 0xC 24.--29. 1. "HOLD,TWD Hold Time Versus TWCK Falling"
|
|
bitfld.long 0xC 16.--18. "CKDIV,Clock Divider" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0xC 8.--15. 1. "CHDIV,Clock High Divider"
|
|
hexmask.long.byte 0xC 0.--7. 1. "CLDIV,Clock Low Divider"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 25. "SDA,SDA Line Value" "0,1"
|
|
bitfld.long 0x0 24. "SCL,SCL Line Value" "0,1"
|
|
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0,1"
|
|
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0,1"
|
|
bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 16. "MCACK,Master Code Acknowledge (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "EOSACC,End Of Slave Access (cleared on read)" "0,1"
|
|
bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0,1"
|
|
bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0,1"
|
|
bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0,1"
|
|
bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "SVACC,Slave Access" "0,1"
|
|
bitfld.long 0x0 3. "SVREAD,Slave Read" "0,1"
|
|
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing TWIHS_THR)" "0,1"
|
|
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared by reading TWIHS_RHR)" "0,1"
|
|
bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing TWIHS_THR)" "0,1"
|
|
wgroup.long 0x24++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 16. "MCACK,Master Code Acknowledge Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 11. "EOSACC,End Of Slave Access Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 5. "GACC,General Call Access Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 4. "SVACC,Slave Access Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 21. "SMBHHM,SMBus Host Header Address Match Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 20. "SMBDAM,SMBus Default Address Match Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 19. "PECERR,PEC Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 18. "TOUT,Timeout Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 16. "MCACK,Master Code Acknowledge Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 11. "EOSACC,End Of Slave Access Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 10. "SCL_WS,Clock Wait State Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "ARBLST,Arbitration Lost Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 8. "NACK,Not Acknowledge Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 7. "UNRE,Underrun Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 6. "OVRE,Overrun Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 5. "GACC,General Call Access Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 4. "SVACC,Slave Access Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "TXRDY,Transmit Holding Register Ready Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "RXRDY,Receive Holding Register Ready Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 0. "TXCOMP,Transmission Completed Interrupt Disable" "0,1"
|
|
rgroup.long 0x2C++0x7
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 16. "MCACK,Master Code Acknowledge Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 11. "EOSACC,End Of Slave Access Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 5. "GACC,General Call Access Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 4. "SVACC,Slave Access Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Mask" "0,1"
|
|
line.long 0x4 "RHR,Receive Holding Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,Master or Slave Receive Holding Data"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x0 "THR,Transmit Holding Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,Master or Slave Transmit Holding Data"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "SMBTR,SMBus Timing Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "THMAX,Clock High Maximum Cycles"
|
|
hexmask.long.byte 0x0 16.--23. 1. "TLOWM,Master Clock Stretch Maximum Cycles"
|
|
hexmask.long.byte 0x0 8.--15. 1. "TLOWS,Slave Clock Stretch Maximum Cycles"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PRESC,SMBus Clock Prescaler"
|
|
group.long 0x44++0x3
|
|
line.long 0x0 "FILTR,Filter Register"
|
|
bitfld.long 0x0 8.--10. "THRES,Digital Filter Threshold" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 2. "PADFCFG,PAD Filter Config" "0,1"
|
|
bitfld.long 0x0 1. "PADFEN,PAD Filter Enable" "0,1"
|
|
bitfld.long 0x0 0. "FILT,RX Digital Filter" "0,1"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "SWMR,SleepWalking Matching Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "DATAM,Data Match"
|
|
hexmask.long.byte 0x0 16.--22. 1. "SADR3,Slave Address 3"
|
|
hexmask.long.byte 0x0 8.--14. 1. "SADR2,Slave Address 2"
|
|
hexmask.long.byte 0x0 0.--6. 1. "SADR1,Slave Address 1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
tree.end
|
|
tree "TWIHS1"
|
|
base ad:0x4001C000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0,1"
|
|
bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0,1"
|
|
bitfld.long 0x0 26. "LOCKCLR,Lock Clear" "0,1"
|
|
bitfld.long 0x0 24. "THRCLR,Transmit Holding Register Clear" "0,1"
|
|
bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0,1"
|
|
bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0,1"
|
|
bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "PECRQ,PEC Request" "0,1"
|
|
bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0,1"
|
|
bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0,1"
|
|
bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0,1"
|
|
bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0,1"
|
|
bitfld.long 0x0 9. "HSDIS,TWIHS High-Speed Mode Disabled" "0,1"
|
|
bitfld.long 0x0 8. "HSEN,TWIHS High-Speed Mode Enabled" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SWRST,Software Reset" "0,1"
|
|
bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0,1"
|
|
bitfld.long 0x0 5. "SVDIS,TWIHS Slave Mode Disabled" "0,1"
|
|
bitfld.long 0x0 4. "SVEN,TWIHS Slave Mode Enabled" "0,1"
|
|
bitfld.long 0x0 3. "MSDIS,TWIHS Master Mode Disabled" "0,1"
|
|
bitfld.long 0x0 2. "MSEN,TWIHS Master Mode Enabled" "0,1"
|
|
bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "START,Send a START Condition" "0,1"
|
|
group.long 0x4++0xF
|
|
line.long 0x0 "MMR,Master Mode Register"
|
|
hexmask.long.byte 0x0 16.--22. 1. "DADR,Device Address"
|
|
bitfld.long 0x0 12. "MREAD,Master Read Direction" "0,1"
|
|
bitfld.long 0x0 8.--9. "IADRSZ,Internal Device Address Size" "0: No internal device address,1: One-byte internal device address,2: Two-byte internal device address,3: Three-byte internal device address"
|
|
line.long 0x4 "SMR,Slave Mode Register"
|
|
bitfld.long 0x4 31. "DATAMEN,Data Matching Enable" "0,1"
|
|
bitfld.long 0x4 30. "SADR3EN,Slave Address 3 Enable" "0,1"
|
|
bitfld.long 0x4 29. "SADR2EN,Slave Address 2 Enable" "0,1"
|
|
bitfld.long 0x4 28. "SADR1EN,Slave Address 1 Enable" "0,1"
|
|
hexmask.long.byte 0x4 16.--22. 1. "SADR,Slave Address"
|
|
hexmask.long.byte 0x4 8.--14. 1. "MASK,Slave Address Mask"
|
|
bitfld.long 0x4 6. "SCLWSDIS,Clock Wait State Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "SMHH,SMBus Host Header" "0,1"
|
|
bitfld.long 0x4 2. "SMDA,SMBus Default Address" "0,1"
|
|
bitfld.long 0x4 0. "NACKEN,Slave Receiver Data Phase NACK enable" "0,1"
|
|
line.long 0x8 "IADR,Internal Address Register"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. "IADR,Internal Address"
|
|
line.long 0xC "CWGR,Clock Waveform Generator Register"
|
|
hexmask.long.byte 0xC 24.--29. 1. "HOLD,TWD Hold Time Versus TWCK Falling"
|
|
bitfld.long 0xC 16.--18. "CKDIV,Clock Divider" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0xC 8.--15. 1. "CHDIV,Clock High Divider"
|
|
hexmask.long.byte 0xC 0.--7. 1. "CLDIV,Clock Low Divider"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 25. "SDA,SDA Line Value" "0,1"
|
|
bitfld.long 0x0 24. "SCL,SCL Line Value" "0,1"
|
|
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0,1"
|
|
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0,1"
|
|
bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 16. "MCACK,Master Code Acknowledge (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "EOSACC,End Of Slave Access (cleared on read)" "0,1"
|
|
bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0,1"
|
|
bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0,1"
|
|
bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0,1"
|
|
bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "SVACC,Slave Access" "0,1"
|
|
bitfld.long 0x0 3. "SVREAD,Slave Read" "0,1"
|
|
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing TWIHS_THR)" "0,1"
|
|
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared by reading TWIHS_RHR)" "0,1"
|
|
bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing TWIHS_THR)" "0,1"
|
|
wgroup.long 0x24++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 16. "MCACK,Master Code Acknowledge Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 11. "EOSACC,End Of Slave Access Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 5. "GACC,General Call Access Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 4. "SVACC,Slave Access Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 21. "SMBHHM,SMBus Host Header Address Match Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 20. "SMBDAM,SMBus Default Address Match Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 19. "PECERR,PEC Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 18. "TOUT,Timeout Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 16. "MCACK,Master Code Acknowledge Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 11. "EOSACC,End Of Slave Access Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 10. "SCL_WS,Clock Wait State Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "ARBLST,Arbitration Lost Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 8. "NACK,Not Acknowledge Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 7. "UNRE,Underrun Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 6. "OVRE,Overrun Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 5. "GACC,General Call Access Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 4. "SVACC,Slave Access Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "TXRDY,Transmit Holding Register Ready Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "RXRDY,Receive Holding Register Ready Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 0. "TXCOMP,Transmission Completed Interrupt Disable" "0,1"
|
|
rgroup.long 0x2C++0x7
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 16. "MCACK,Master Code Acknowledge Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 11. "EOSACC,End Of Slave Access Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 5. "GACC,General Call Access Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 4. "SVACC,Slave Access Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Mask" "0,1"
|
|
line.long 0x4 "RHR,Receive Holding Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,Master or Slave Receive Holding Data"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x0 "THR,Transmit Holding Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,Master or Slave Transmit Holding Data"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "SMBTR,SMBus Timing Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "THMAX,Clock High Maximum Cycles"
|
|
hexmask.long.byte 0x0 16.--23. 1. "TLOWM,Master Clock Stretch Maximum Cycles"
|
|
hexmask.long.byte 0x0 8.--15. 1. "TLOWS,Slave Clock Stretch Maximum Cycles"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PRESC,SMBus Clock Prescaler"
|
|
group.long 0x44++0x3
|
|
line.long 0x0 "FILTR,Filter Register"
|
|
bitfld.long 0x0 8.--10. "THRES,Digital Filter Threshold" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 2. "PADFCFG,PAD Filter Config" "0,1"
|
|
bitfld.long 0x0 1. "PADFEN,PAD Filter Enable" "0,1"
|
|
bitfld.long 0x0 0. "FILT,RX Digital Filter" "0,1"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "SWMR,SleepWalking Matching Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "DATAM,Data Match"
|
|
hexmask.long.byte 0x0 16.--22. 1. "SADR3,Slave Address 3"
|
|
hexmask.long.byte 0x0 8.--14. 1. "SADR2,Slave Address 2"
|
|
hexmask.long.byte 0x0 0.--6. 1. "SADR1,Slave Address 1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
tree.end
|
|
sif (cpuis("PIC32CZ2051CA70100"))
|
|
tree "TWIHS2"
|
|
base ad:0x40060000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0,1"
|
|
bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0,1"
|
|
bitfld.long 0x0 26. "LOCKCLR,Lock Clear" "0,1"
|
|
bitfld.long 0x0 24. "THRCLR,Transmit Holding Register Clear" "0,1"
|
|
bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0,1"
|
|
bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0,1"
|
|
bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "PECRQ,PEC Request" "0,1"
|
|
bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0,1"
|
|
bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0,1"
|
|
bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0,1"
|
|
bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0,1"
|
|
bitfld.long 0x0 9. "HSDIS,TWIHS High-Speed Mode Disabled" "0,1"
|
|
bitfld.long 0x0 8. "HSEN,TWIHS High-Speed Mode Enabled" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SWRST,Software Reset" "0,1"
|
|
bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0,1"
|
|
bitfld.long 0x0 5. "SVDIS,TWIHS Slave Mode Disabled" "0,1"
|
|
bitfld.long 0x0 4. "SVEN,TWIHS Slave Mode Enabled" "0,1"
|
|
bitfld.long 0x0 3. "MSDIS,TWIHS Master Mode Disabled" "0,1"
|
|
bitfld.long 0x0 2. "MSEN,TWIHS Master Mode Enabled" "0,1"
|
|
bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "START,Send a START Condition" "0,1"
|
|
group.long 0x4++0xF
|
|
line.long 0x0 "MMR,Master Mode Register"
|
|
hexmask.long.byte 0x0 16.--22. 1. "DADR,Device Address"
|
|
bitfld.long 0x0 12. "MREAD,Master Read Direction" "0,1"
|
|
bitfld.long 0x0 8.--9. "IADRSZ,Internal Device Address Size" "0: No internal device address,1: One-byte internal device address,2: Two-byte internal device address,3: Three-byte internal device address"
|
|
line.long 0x4 "SMR,Slave Mode Register"
|
|
bitfld.long 0x4 31. "DATAMEN,Data Matching Enable" "0,1"
|
|
bitfld.long 0x4 30. "SADR3EN,Slave Address 3 Enable" "0,1"
|
|
bitfld.long 0x4 29. "SADR2EN,Slave Address 2 Enable" "0,1"
|
|
bitfld.long 0x4 28. "SADR1EN,Slave Address 1 Enable" "0,1"
|
|
hexmask.long.byte 0x4 16.--22. 1. "SADR,Slave Address"
|
|
hexmask.long.byte 0x4 8.--14. 1. "MASK,Slave Address Mask"
|
|
bitfld.long 0x4 6. "SCLWSDIS,Clock Wait State Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "SMHH,SMBus Host Header" "0,1"
|
|
bitfld.long 0x4 2. "SMDA,SMBus Default Address" "0,1"
|
|
bitfld.long 0x4 0. "NACKEN,Slave Receiver Data Phase NACK enable" "0,1"
|
|
line.long 0x8 "IADR,Internal Address Register"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. "IADR,Internal Address"
|
|
line.long 0xC "CWGR,Clock Waveform Generator Register"
|
|
hexmask.long.byte 0xC 24.--29. 1. "HOLD,TWD Hold Time Versus TWCK Falling"
|
|
bitfld.long 0xC 16.--18. "CKDIV,Clock Divider" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0xC 8.--15. 1. "CHDIV,Clock High Divider"
|
|
hexmask.long.byte 0xC 0.--7. 1. "CLDIV,Clock Low Divider"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 25. "SDA,SDA Line Value" "0,1"
|
|
bitfld.long 0x0 24. "SCL,SCL Line Value" "0,1"
|
|
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0,1"
|
|
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0,1"
|
|
bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 16. "MCACK,Master Code Acknowledge (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "EOSACC,End Of Slave Access (cleared on read)" "0,1"
|
|
bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0,1"
|
|
bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0,1"
|
|
bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0,1"
|
|
bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "SVACC,Slave Access" "0,1"
|
|
bitfld.long 0x0 3. "SVREAD,Slave Read" "0,1"
|
|
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing TWIHS_THR)" "0,1"
|
|
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared by reading TWIHS_RHR)" "0,1"
|
|
bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing TWIHS_THR)" "0,1"
|
|
wgroup.long 0x24++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 16. "MCACK,Master Code Acknowledge Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 11. "EOSACC,End Of Slave Access Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 5. "GACC,General Call Access Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 4. "SVACC,Slave Access Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 21. "SMBHHM,SMBus Host Header Address Match Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 20. "SMBDAM,SMBus Default Address Match Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 19. "PECERR,PEC Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 18. "TOUT,Timeout Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 16. "MCACK,Master Code Acknowledge Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 11. "EOSACC,End Of Slave Access Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 10. "SCL_WS,Clock Wait State Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "ARBLST,Arbitration Lost Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 8. "NACK,Not Acknowledge Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 7. "UNRE,Underrun Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 6. "OVRE,Overrun Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 5. "GACC,General Call Access Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 4. "SVACC,Slave Access Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "TXRDY,Transmit Holding Register Ready Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "RXRDY,Receive Holding Register Ready Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 0. "TXCOMP,Transmission Completed Interrupt Disable" "0,1"
|
|
rgroup.long 0x2C++0x7
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 16. "MCACK,Master Code Acknowledge Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 11. "EOSACC,End Of Slave Access Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 5. "GACC,General Call Access Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 4. "SVACC,Slave Access Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Mask" "0,1"
|
|
line.long 0x4 "RHR,Receive Holding Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,Master or Slave Receive Holding Data"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x0 "THR,Transmit Holding Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,Master or Slave Transmit Holding Data"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "SMBTR,SMBus Timing Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "THMAX,Clock High Maximum Cycles"
|
|
hexmask.long.byte 0x0 16.--23. 1. "TLOWM,Master Clock Stretch Maximum Cycles"
|
|
hexmask.long.byte 0x0 8.--15. 1. "TLOWS,Slave Clock Stretch Maximum Cycles"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PRESC,SMBus Clock Prescaler"
|
|
group.long 0x44++0x3
|
|
line.long 0x0 "FILTR,Filter Register"
|
|
bitfld.long 0x0 8.--10. "THRES,Digital Filter Threshold" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 2. "PADFCFG,PAD Filter Config" "0,1"
|
|
bitfld.long 0x0 1. "PADFEN,PAD Filter Enable" "0,1"
|
|
bitfld.long 0x0 0. "FILT,RX Digital Filter" "0,1"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "SWMR,SleepWalking Matching Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "DATAM,Data Match"
|
|
hexmask.long.byte 0x0 16.--22. 1. "SADR3,Slave Address 3"
|
|
hexmask.long.byte 0x0 8.--14. 1. "SADR2,Slave Address 2"
|
|
hexmask.long.byte 0x0 0.--6. 1. "SADR1,Slave Address 1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("PIC32CZ2051CA70144"))
|
|
tree "TWIHS2"
|
|
base ad:0x40060000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0,1"
|
|
bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0,1"
|
|
bitfld.long 0x0 26. "LOCKCLR,Lock Clear" "0,1"
|
|
bitfld.long 0x0 24. "THRCLR,Transmit Holding Register Clear" "0,1"
|
|
bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0,1"
|
|
bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0,1"
|
|
bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "PECRQ,PEC Request" "0,1"
|
|
bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0,1"
|
|
bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0,1"
|
|
bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0,1"
|
|
bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0,1"
|
|
bitfld.long 0x0 9. "HSDIS,TWIHS High-Speed Mode Disabled" "0,1"
|
|
bitfld.long 0x0 8. "HSEN,TWIHS High-Speed Mode Enabled" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SWRST,Software Reset" "0,1"
|
|
bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0,1"
|
|
bitfld.long 0x0 5. "SVDIS,TWIHS Slave Mode Disabled" "0,1"
|
|
bitfld.long 0x0 4. "SVEN,TWIHS Slave Mode Enabled" "0,1"
|
|
bitfld.long 0x0 3. "MSDIS,TWIHS Master Mode Disabled" "0,1"
|
|
bitfld.long 0x0 2. "MSEN,TWIHS Master Mode Enabled" "0,1"
|
|
bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "START,Send a START Condition" "0,1"
|
|
group.long 0x4++0xF
|
|
line.long 0x0 "MMR,Master Mode Register"
|
|
hexmask.long.byte 0x0 16.--22. 1. "DADR,Device Address"
|
|
bitfld.long 0x0 12. "MREAD,Master Read Direction" "0,1"
|
|
bitfld.long 0x0 8.--9. "IADRSZ,Internal Device Address Size" "0: No internal device address,1: One-byte internal device address,2: Two-byte internal device address,3: Three-byte internal device address"
|
|
line.long 0x4 "SMR,Slave Mode Register"
|
|
bitfld.long 0x4 31. "DATAMEN,Data Matching Enable" "0,1"
|
|
bitfld.long 0x4 30. "SADR3EN,Slave Address 3 Enable" "0,1"
|
|
bitfld.long 0x4 29. "SADR2EN,Slave Address 2 Enable" "0,1"
|
|
bitfld.long 0x4 28. "SADR1EN,Slave Address 1 Enable" "0,1"
|
|
hexmask.long.byte 0x4 16.--22. 1. "SADR,Slave Address"
|
|
hexmask.long.byte 0x4 8.--14. 1. "MASK,Slave Address Mask"
|
|
bitfld.long 0x4 6. "SCLWSDIS,Clock Wait State Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "SMHH,SMBus Host Header" "0,1"
|
|
bitfld.long 0x4 2. "SMDA,SMBus Default Address" "0,1"
|
|
bitfld.long 0x4 0. "NACKEN,Slave Receiver Data Phase NACK enable" "0,1"
|
|
line.long 0x8 "IADR,Internal Address Register"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. "IADR,Internal Address"
|
|
line.long 0xC "CWGR,Clock Waveform Generator Register"
|
|
hexmask.long.byte 0xC 24.--29. 1. "HOLD,TWD Hold Time Versus TWCK Falling"
|
|
bitfld.long 0xC 16.--18. "CKDIV,Clock Divider" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0xC 8.--15. 1. "CHDIV,Clock High Divider"
|
|
hexmask.long.byte 0xC 0.--7. 1. "CLDIV,Clock Low Divider"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 25. "SDA,SDA Line Value" "0,1"
|
|
bitfld.long 0x0 24. "SCL,SCL Line Value" "0,1"
|
|
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0,1"
|
|
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0,1"
|
|
bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 16. "MCACK,Master Code Acknowledge (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "EOSACC,End Of Slave Access (cleared on read)" "0,1"
|
|
bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0,1"
|
|
bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0,1"
|
|
bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0,1"
|
|
bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "SVACC,Slave Access" "0,1"
|
|
bitfld.long 0x0 3. "SVREAD,Slave Read" "0,1"
|
|
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing TWIHS_THR)" "0,1"
|
|
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared by reading TWIHS_RHR)" "0,1"
|
|
bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing TWIHS_THR)" "0,1"
|
|
wgroup.long 0x24++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 16. "MCACK,Master Code Acknowledge Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 11. "EOSACC,End Of Slave Access Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 5. "GACC,General Call Access Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 4. "SVACC,Slave Access Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 21. "SMBHHM,SMBus Host Header Address Match Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 20. "SMBDAM,SMBus Default Address Match Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 19. "PECERR,PEC Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 18. "TOUT,Timeout Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 16. "MCACK,Master Code Acknowledge Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 11. "EOSACC,End Of Slave Access Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 10. "SCL_WS,Clock Wait State Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "ARBLST,Arbitration Lost Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 8. "NACK,Not Acknowledge Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 7. "UNRE,Underrun Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 6. "OVRE,Overrun Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 5. "GACC,General Call Access Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 4. "SVACC,Slave Access Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "TXRDY,Transmit Holding Register Ready Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "RXRDY,Receive Holding Register Ready Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 0. "TXCOMP,Transmission Completed Interrupt Disable" "0,1"
|
|
rgroup.long 0x2C++0x7
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 16. "MCACK,Master Code Acknowledge Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 11. "EOSACC,End Of Slave Access Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 5. "GACC,General Call Access Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 4. "SVACC,Slave Access Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Mask" "0,1"
|
|
line.long 0x4 "RHR,Receive Holding Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,Master or Slave Receive Holding Data"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x0 "THR,Transmit Holding Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,Master or Slave Transmit Holding Data"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "SMBTR,SMBus Timing Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "THMAX,Clock High Maximum Cycles"
|
|
hexmask.long.byte 0x0 16.--23. 1. "TLOWM,Master Clock Stretch Maximum Cycles"
|
|
hexmask.long.byte 0x0 8.--15. 1. "TLOWS,Slave Clock Stretch Maximum Cycles"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PRESC,SMBus Clock Prescaler"
|
|
group.long 0x44++0x3
|
|
line.long 0x0 "FILTR,Filter Register"
|
|
bitfld.long 0x0 8.--10. "THRES,Digital Filter Threshold" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 2. "PADFCFG,PAD Filter Config" "0,1"
|
|
bitfld.long 0x0 1. "PADFEN,PAD Filter Enable" "0,1"
|
|
bitfld.long 0x0 0. "FILT,RX Digital Filter" "0,1"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "SWMR,SleepWalking Matching Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "DATAM,Data Match"
|
|
hexmask.long.byte 0x0 16.--22. 1. "SADR3,Slave Address 3"
|
|
hexmask.long.byte 0x0 8.--14. 1. "SADR2,Slave Address 2"
|
|
hexmask.long.byte 0x0 0.--6. 1. "SADR1,Slave Address 1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("PIC32CZ2051MC70100")||cpuis("PIC32CZ2051MC70144"))
|
|
tree "TWIHS2"
|
|
base ad:0x40060000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 29. "FIFODIS,FIFO Disable" "0,1"
|
|
bitfld.long 0x0 28. "FIFOEN,FIFO Enable" "0,1"
|
|
bitfld.long 0x0 26. "LOCKCLR,Lock Clear" "0,1"
|
|
bitfld.long 0x0 24. "THRCLR,Transmit Holding Register Clear" "0,1"
|
|
bitfld.long 0x0 17. "ACMDIS,Alternative Command Mode Disable" "0,1"
|
|
bitfld.long 0x0 16. "ACMEN,Alternative Command Mode Enable" "0,1"
|
|
bitfld.long 0x0 15. "CLEAR,Bus CLEAR Command" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "PECRQ,PEC Request" "0,1"
|
|
bitfld.long 0x0 13. "PECDIS,Packet Error Checking Disable" "0,1"
|
|
bitfld.long 0x0 12. "PECEN,Packet Error Checking Enable" "0,1"
|
|
bitfld.long 0x0 11. "SMBDIS,SMBus Mode Disabled" "0,1"
|
|
bitfld.long 0x0 10. "SMBEN,SMBus Mode Enabled" "0,1"
|
|
bitfld.long 0x0 9. "HSDIS,TWIHS High-Speed Mode Disabled" "0,1"
|
|
bitfld.long 0x0 8. "HSEN,TWIHS High-Speed Mode Enabled" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SWRST,Software Reset" "0,1"
|
|
bitfld.long 0x0 6. "QUICK,SMBus Quick Command" "0,1"
|
|
bitfld.long 0x0 5. "SVDIS,TWIHS Slave Mode Disabled" "0,1"
|
|
bitfld.long 0x0 4. "SVEN,TWIHS Slave Mode Enabled" "0,1"
|
|
bitfld.long 0x0 3. "MSDIS,TWIHS Master Mode Disabled" "0,1"
|
|
bitfld.long 0x0 2. "MSEN,TWIHS Master Mode Enabled" "0,1"
|
|
bitfld.long 0x0 1. "STOP,Send a STOP Condition" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "START,Send a START Condition" "0,1"
|
|
group.long 0x4++0xF
|
|
line.long 0x0 "MMR,Master Mode Register"
|
|
hexmask.long.byte 0x0 16.--22. 1. "DADR,Device Address"
|
|
bitfld.long 0x0 12. "MREAD,Master Read Direction" "0,1"
|
|
bitfld.long 0x0 8.--9. "IADRSZ,Internal Device Address Size" "0: No internal device address,1: One-byte internal device address,2: Two-byte internal device address,3: Three-byte internal device address"
|
|
line.long 0x4 "SMR,Slave Mode Register"
|
|
bitfld.long 0x4 31. "DATAMEN,Data Matching Enable" "0,1"
|
|
bitfld.long 0x4 30. "SADR3EN,Slave Address 3 Enable" "0,1"
|
|
bitfld.long 0x4 29. "SADR2EN,Slave Address 2 Enable" "0,1"
|
|
bitfld.long 0x4 28. "SADR1EN,Slave Address 1 Enable" "0,1"
|
|
hexmask.long.byte 0x4 16.--22. 1. "SADR,Slave Address"
|
|
hexmask.long.byte 0x4 8.--14. 1. "MASK,Slave Address Mask"
|
|
bitfld.long 0x4 6. "SCLWSDIS,Clock Wait State Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "SMHH,SMBus Host Header" "0,1"
|
|
bitfld.long 0x4 2. "SMDA,SMBus Default Address" "0,1"
|
|
bitfld.long 0x4 0. "NACKEN,Slave Receiver Data Phase NACK enable" "0,1"
|
|
line.long 0x8 "IADR,Internal Address Register"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. "IADR,Internal Address"
|
|
line.long 0xC "CWGR,Clock Waveform Generator Register"
|
|
hexmask.long.byte 0xC 24.--29. 1. "HOLD,TWD Hold Time Versus TWCK Falling"
|
|
bitfld.long 0xC 16.--18. "CKDIV,Clock Divider" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0xC 8.--15. 1. "CHDIV,Clock High Divider"
|
|
hexmask.long.byte 0xC 0.--7. 1. "CLDIV,Clock Low Divider"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 25. "SDA,SDA Line Value" "0,1"
|
|
bitfld.long 0x0 24. "SCL,SCL Line Value" "0,1"
|
|
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match (cleared on read)" "0,1"
|
|
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match (cleared on read)" "0,1"
|
|
bitfld.long 0x0 19. "PECERR,PEC Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 18. "TOUT,Timeout Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 16. "MCACK,Master Code Acknowledge (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "EOSACC,End Of Slave Access (cleared on read)" "0,1"
|
|
bitfld.long 0x0 10. "SCLWS,Clock Wait State" "0,1"
|
|
bitfld.long 0x0 9. "ARBLST,Arbitration Lost (cleared on read)" "0,1"
|
|
bitfld.long 0x0 8. "NACK,Not Acknowledged (cleared on read)" "0,1"
|
|
bitfld.long 0x0 7. "UNRE,Underrun Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 6. "OVRE,Overrun Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 5. "GACC,General Call Access (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "SVACC,Slave Access" "0,1"
|
|
bitfld.long 0x0 3. "SVREAD,Slave Read" "0,1"
|
|
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready (cleared by writing TWIHS_THR)" "0,1"
|
|
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready (cleared by reading TWIHS_RHR)" "0,1"
|
|
bitfld.long 0x0 0. "TXCOMP,Transmission Completed (cleared by writing TWIHS_THR)" "0,1"
|
|
wgroup.long 0x24++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 16. "MCACK,Master Code Acknowledge Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 11. "EOSACC,End Of Slave Access Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 5. "GACC,General Call Access Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 4. "SVACC,Slave Access Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Enable" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 21. "SMBHHM,SMBus Host Header Address Match Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 20. "SMBDAM,SMBus Default Address Match Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 19. "PECERR,PEC Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 18. "TOUT,Timeout Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 16. "MCACK,Master Code Acknowledge Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 11. "EOSACC,End Of Slave Access Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 10. "SCL_WS,Clock Wait State Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "ARBLST,Arbitration Lost Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 8. "NACK,Not Acknowledge Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 7. "UNRE,Underrun Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 6. "OVRE,Overrun Error Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 5. "GACC,General Call Access Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 4. "SVACC,Slave Access Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 2. "TXRDY,Transmit Holding Register Ready Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "RXRDY,Receive Holding Register Ready Interrupt Disable" "0,1"
|
|
bitfld.long 0x4 0. "TXCOMP,Transmission Completed Interrupt Disable" "0,1"
|
|
rgroup.long 0x2C++0x7
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 21. "SMBHHM,SMBus Host Header Address Match Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 20. "SMBDAM,SMBus Default Address Match Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 19. "PECERR,PEC Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 18. "TOUT,Timeout Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 16. "MCACK,Master Code Acknowledge Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 11. "EOSACC,End Of Slave Access Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 10. "SCL_WS,Clock Wait State Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ARBLST,Arbitration Lost Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 8. "NACK,Not Acknowledge Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 7. "UNRE,Underrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 6. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 5. "GACC,General Call Access Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 4. "SVACC,Slave Access Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 2. "TXRDY,Transmit Holding Register Ready Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXRDY,Receive Holding Register Ready Interrupt Mask" "0,1"
|
|
bitfld.long 0x0 0. "TXCOMP,Transmission Completed Interrupt Mask" "0,1"
|
|
line.long 0x4 "RHR,Receive Holding Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,Master or Slave Receive Holding Data"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x0 "THR,Transmit Holding Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,Master or Slave Transmit Holding Data"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "SMBTR,SMBus Timing Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "THMAX,Clock High Maximum Cycles"
|
|
hexmask.long.byte 0x0 16.--23. 1. "TLOWM,Master Clock Stretch Maximum Cycles"
|
|
hexmask.long.byte 0x0 8.--15. 1. "TLOWS,Slave Clock Stretch Maximum Cycles"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PRESC,SMBus Clock Prescaler"
|
|
group.long 0x44++0x3
|
|
line.long 0x0 "FILTR,Filter Register"
|
|
bitfld.long 0x0 8.--10. "THRES,Digital Filter Threshold" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 2. "PADFCFG,PAD Filter Config" "0,1"
|
|
bitfld.long 0x0 1. "PADFEN,PAD Filter Enable" "0,1"
|
|
bitfld.long 0x0 0. "FILT,RX Digital Filter" "0,1"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "SWMR,SleepWalking Matching Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "DATAM,Data Match"
|
|
hexmask.long.byte 0x0 16.--22. 1. "SADR3,Slave Address 3"
|
|
hexmask.long.byte 0x0 8.--14. 1. "SADR2,Slave Address 2"
|
|
hexmask.long.byte 0x0 0.--6. 1. "SADR1,Slave Address 1"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "WPSR,Write Protection Status Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPVSRC,Write Protection Violation Source"
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "UART (Universal Asynchronous Receiver Transmitter)"
|
|
base ad:0x0
|
|
tree "UART0"
|
|
base ad:0x400E0800
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 12. "REQCLR,Request Clear" "0,1"
|
|
bitfld.long 0x0 8. "RSTSTA,Reset Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
|
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
|
|
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
|
|
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "MR,Mode Register"
|
|
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic echo,2: Local loopback,3: Remote loopback"
|
|
bitfld.long 0x0 12. "BRSRCCK,Baud Rate Source Clock" "0: The baud rate is driven by the peripheral clock,1: The baud rate is driven by a PMC-programmable.."
|
|
newline
|
|
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even Parity,1: Odd Parity,2: Space: parity forced to 0,3: Mark: parity forced to 1,4: No parity,?,?,?"
|
|
bitfld.long 0x0 4. "FILTER,Receiver Digital Filter" "0: UART does not filter the receive line.,1: UART filters the receive line using a.."
|
|
wgroup.long 0x8++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 15. "CMP,Enable Comparison Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Enable TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Enable Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x0 6. "FRAME,Enable Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Enable Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TXRDY,Enable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Enable RXRDY Interrupt" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 15. "CMP,Disable Comparison Interrupt" "0,1"
|
|
bitfld.long 0x4 9. "TXEMPTY,Disable TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Disable Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x4 6. "FRAME,Disable Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Disable Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x4 1. "TXRDY,Disable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Disable RXRDY Interrupt" "0,1"
|
|
rgroup.long 0x10++0xB
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 15. "CMP,Mask Comparison Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Mask TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Mask Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x0 6. "FRAME,Mask Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Mask Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TXRDY,Disable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Mask RXRDY Interrupt" "0,1"
|
|
line.long 0x4 "SR,Status Register"
|
|
bitfld.long 0x4 15. "CMP,Comparison Match" "0,1"
|
|
bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Parity Error" "0,1"
|
|
bitfld.long 0x4 6. "FRAME,Framing Error" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Overrun Error" "0,1"
|
|
bitfld.long 0x4 1. "TXRDY,Transmitter Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Receiver Ready" "0,1"
|
|
line.long 0x8 "RHR,Receive Holding Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "RXCHR,Received Character"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "THR,Transmit Holding Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXCHR,Character to be Transmitted"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "BRGR,Baud Rate Generator Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divisor"
|
|
line.long 0x4 "CMPR,Comparison Register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "VAL2,Second Comparison Value for Received Character"
|
|
bitfld.long 0x4 14. "CMPPAR,Compare Parity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
|
|
hexmask.long.byte 0x4 0.--7. 1. "VAL1,First Comparison Value for Received Character"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
tree.end
|
|
tree "UART1"
|
|
base ad:0x400E0A00
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 12. "REQCLR,Request Clear" "0,1"
|
|
bitfld.long 0x0 8. "RSTSTA,Reset Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
|
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
|
|
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
|
|
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "MR,Mode Register"
|
|
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic echo,2: Local loopback,3: Remote loopback"
|
|
bitfld.long 0x0 12. "BRSRCCK,Baud Rate Source Clock" "0: The baud rate is driven by the peripheral clock,1: The baud rate is driven by a PMC-programmable.."
|
|
newline
|
|
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even Parity,1: Odd Parity,2: Space: parity forced to 0,3: Mark: parity forced to 1,4: No parity,?,?,?"
|
|
bitfld.long 0x0 4. "FILTER,Receiver Digital Filter" "0: UART does not filter the receive line.,1: UART filters the receive line using a.."
|
|
wgroup.long 0x8++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 15. "CMP,Enable Comparison Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Enable TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Enable Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x0 6. "FRAME,Enable Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Enable Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TXRDY,Enable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Enable RXRDY Interrupt" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 15. "CMP,Disable Comparison Interrupt" "0,1"
|
|
bitfld.long 0x4 9. "TXEMPTY,Disable TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Disable Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x4 6. "FRAME,Disable Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Disable Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x4 1. "TXRDY,Disable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Disable RXRDY Interrupt" "0,1"
|
|
rgroup.long 0x10++0xB
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 15. "CMP,Mask Comparison Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Mask TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Mask Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x0 6. "FRAME,Mask Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Mask Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TXRDY,Disable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Mask RXRDY Interrupt" "0,1"
|
|
line.long 0x4 "SR,Status Register"
|
|
bitfld.long 0x4 15. "CMP,Comparison Match" "0,1"
|
|
bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Parity Error" "0,1"
|
|
bitfld.long 0x4 6. "FRAME,Framing Error" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Overrun Error" "0,1"
|
|
bitfld.long 0x4 1. "TXRDY,Transmitter Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Receiver Ready" "0,1"
|
|
line.long 0x8 "RHR,Receive Holding Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "RXCHR,Received Character"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "THR,Transmit Holding Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXCHR,Character to be Transmitted"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "BRGR,Baud Rate Generator Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divisor"
|
|
line.long 0x4 "CMPR,Comparison Register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "VAL2,Second Comparison Value for Received Character"
|
|
bitfld.long 0x4 14. "CMPPAR,Compare Parity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
|
|
hexmask.long.byte 0x4 0.--7. 1. "VAL1,First Comparison Value for Received Character"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
tree.end
|
|
tree "UART2"
|
|
base ad:0x400E1A00
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 12. "REQCLR,Request Clear" "0,1"
|
|
bitfld.long 0x0 8. "RSTSTA,Reset Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
|
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
|
|
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
|
|
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "MR,Mode Register"
|
|
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic echo,2: Local loopback,3: Remote loopback"
|
|
bitfld.long 0x0 12. "BRSRCCK,Baud Rate Source Clock" "0: The baud rate is driven by the peripheral clock,1: The baud rate is driven by a PMC-programmable.."
|
|
newline
|
|
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even Parity,1: Odd Parity,2: Space: parity forced to 0,3: Mark: parity forced to 1,4: No parity,?,?,?"
|
|
bitfld.long 0x0 4. "FILTER,Receiver Digital Filter" "0: UART does not filter the receive line.,1: UART filters the receive line using a.."
|
|
wgroup.long 0x8++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 15. "CMP,Enable Comparison Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Enable TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Enable Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x0 6. "FRAME,Enable Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Enable Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TXRDY,Enable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Enable RXRDY Interrupt" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 15. "CMP,Disable Comparison Interrupt" "0,1"
|
|
bitfld.long 0x4 9. "TXEMPTY,Disable TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Disable Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x4 6. "FRAME,Disable Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Disable Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x4 1. "TXRDY,Disable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Disable RXRDY Interrupt" "0,1"
|
|
rgroup.long 0x10++0xB
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 15. "CMP,Mask Comparison Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Mask TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Mask Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x0 6. "FRAME,Mask Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Mask Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TXRDY,Disable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Mask RXRDY Interrupt" "0,1"
|
|
line.long 0x4 "SR,Status Register"
|
|
bitfld.long 0x4 15. "CMP,Comparison Match" "0,1"
|
|
bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Parity Error" "0,1"
|
|
bitfld.long 0x4 6. "FRAME,Framing Error" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Overrun Error" "0,1"
|
|
bitfld.long 0x4 1. "TXRDY,Transmitter Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Receiver Ready" "0,1"
|
|
line.long 0x8 "RHR,Receive Holding Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "RXCHR,Received Character"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "THR,Transmit Holding Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXCHR,Character to be Transmitted"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "BRGR,Baud Rate Generator Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divisor"
|
|
line.long 0x4 "CMPR,Comparison Register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "VAL2,Second Comparison Value for Received Character"
|
|
bitfld.long 0x4 14. "CMPPAR,Compare Parity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
|
|
hexmask.long.byte 0x4 0.--7. 1. "VAL1,First Comparison Value for Received Character"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
tree.end
|
|
sif (cpuis("PIC32CZ2051CA70100"))
|
|
tree "UART3"
|
|
base ad:0x400E1C00
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 12. "REQCLR,Request Clear" "0,1"
|
|
bitfld.long 0x0 8. "RSTSTA,Reset Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
|
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
|
|
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
|
|
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "MR,Mode Register"
|
|
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic echo,2: Local loopback,3: Remote loopback"
|
|
bitfld.long 0x0 12. "BRSRCCK,Baud Rate Source Clock" "0: The baud rate is driven by the peripheral clock,1: The baud rate is driven by a PMC-programmable.."
|
|
newline
|
|
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even Parity,1: Odd Parity,2: Space: parity forced to 0,3: Mark: parity forced to 1,4: No parity,?,?,?"
|
|
bitfld.long 0x0 4. "FILTER,Receiver Digital Filter" "0: UART does not filter the receive line.,1: UART filters the receive line using a.."
|
|
wgroup.long 0x8++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 15. "CMP,Enable Comparison Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Enable TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Enable Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x0 6. "FRAME,Enable Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Enable Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TXRDY,Enable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Enable RXRDY Interrupt" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 15. "CMP,Disable Comparison Interrupt" "0,1"
|
|
bitfld.long 0x4 9. "TXEMPTY,Disable TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Disable Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x4 6. "FRAME,Disable Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Disable Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x4 1. "TXRDY,Disable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Disable RXRDY Interrupt" "0,1"
|
|
rgroup.long 0x10++0xB
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 15. "CMP,Mask Comparison Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Mask TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Mask Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x0 6. "FRAME,Mask Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Mask Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TXRDY,Disable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Mask RXRDY Interrupt" "0,1"
|
|
line.long 0x4 "SR,Status Register"
|
|
bitfld.long 0x4 15. "CMP,Comparison Match" "0,1"
|
|
bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Parity Error" "0,1"
|
|
bitfld.long 0x4 6. "FRAME,Framing Error" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Overrun Error" "0,1"
|
|
bitfld.long 0x4 1. "TXRDY,Transmitter Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Receiver Ready" "0,1"
|
|
line.long 0x8 "RHR,Receive Holding Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "RXCHR,Received Character"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "THR,Transmit Holding Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXCHR,Character to be Transmitted"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "BRGR,Baud Rate Generator Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divisor"
|
|
line.long 0x4 "CMPR,Comparison Register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "VAL2,Second Comparison Value for Received Character"
|
|
bitfld.long 0x4 14. "CMPPAR,Compare Parity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
|
|
hexmask.long.byte 0x4 0.--7. 1. "VAL1,First Comparison Value for Received Character"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
tree.end
|
|
tree "UART4"
|
|
base ad:0x400E1E00
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 12. "REQCLR,Request Clear" "0,1"
|
|
bitfld.long 0x0 8. "RSTSTA,Reset Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
|
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
|
|
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
|
|
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "MR,Mode Register"
|
|
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic echo,2: Local loopback,3: Remote loopback"
|
|
bitfld.long 0x0 12. "BRSRCCK,Baud Rate Source Clock" "0: The baud rate is driven by the peripheral clock,1: The baud rate is driven by a PMC-programmable.."
|
|
newline
|
|
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even Parity,1: Odd Parity,2: Space: parity forced to 0,3: Mark: parity forced to 1,4: No parity,?,?,?"
|
|
bitfld.long 0x0 4. "FILTER,Receiver Digital Filter" "0: UART does not filter the receive line.,1: UART filters the receive line using a.."
|
|
wgroup.long 0x8++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 15. "CMP,Enable Comparison Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Enable TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Enable Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x0 6. "FRAME,Enable Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Enable Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TXRDY,Enable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Enable RXRDY Interrupt" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 15. "CMP,Disable Comparison Interrupt" "0,1"
|
|
bitfld.long 0x4 9. "TXEMPTY,Disable TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Disable Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x4 6. "FRAME,Disable Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Disable Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x4 1. "TXRDY,Disable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Disable RXRDY Interrupt" "0,1"
|
|
rgroup.long 0x10++0xB
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 15. "CMP,Mask Comparison Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Mask TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Mask Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x0 6. "FRAME,Mask Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Mask Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TXRDY,Disable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Mask RXRDY Interrupt" "0,1"
|
|
line.long 0x4 "SR,Status Register"
|
|
bitfld.long 0x4 15. "CMP,Comparison Match" "0,1"
|
|
bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Parity Error" "0,1"
|
|
bitfld.long 0x4 6. "FRAME,Framing Error" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Overrun Error" "0,1"
|
|
bitfld.long 0x4 1. "TXRDY,Transmitter Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Receiver Ready" "0,1"
|
|
line.long 0x8 "RHR,Receive Holding Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "RXCHR,Received Character"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "THR,Transmit Holding Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXCHR,Character to be Transmitted"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "BRGR,Baud Rate Generator Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divisor"
|
|
line.long 0x4 "CMPR,Comparison Register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "VAL2,Second Comparison Value for Received Character"
|
|
bitfld.long 0x4 14. "CMPPAR,Compare Parity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
|
|
hexmask.long.byte 0x4 0.--7. 1. "VAL1,First Comparison Value for Received Character"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("PIC32CZ2051CA70144"))
|
|
tree "UART3"
|
|
base ad:0x400E1C00
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 12. "REQCLR,Request Clear" "0,1"
|
|
bitfld.long 0x0 8. "RSTSTA,Reset Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
|
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
|
|
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
|
|
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "MR,Mode Register"
|
|
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic echo,2: Local loopback,3: Remote loopback"
|
|
bitfld.long 0x0 12. "BRSRCCK,Baud Rate Source Clock" "0: The baud rate is driven by the peripheral clock,1: The baud rate is driven by a PMC-programmable.."
|
|
newline
|
|
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even Parity,1: Odd Parity,2: Space: parity forced to 0,3: Mark: parity forced to 1,4: No parity,?,?,?"
|
|
bitfld.long 0x0 4. "FILTER,Receiver Digital Filter" "0: UART does not filter the receive line.,1: UART filters the receive line using a.."
|
|
wgroup.long 0x8++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 15. "CMP,Enable Comparison Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Enable TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Enable Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x0 6. "FRAME,Enable Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Enable Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TXRDY,Enable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Enable RXRDY Interrupt" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 15. "CMP,Disable Comparison Interrupt" "0,1"
|
|
bitfld.long 0x4 9. "TXEMPTY,Disable TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Disable Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x4 6. "FRAME,Disable Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Disable Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x4 1. "TXRDY,Disable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Disable RXRDY Interrupt" "0,1"
|
|
rgroup.long 0x10++0xB
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 15. "CMP,Mask Comparison Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Mask TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Mask Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x0 6. "FRAME,Mask Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Mask Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TXRDY,Disable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Mask RXRDY Interrupt" "0,1"
|
|
line.long 0x4 "SR,Status Register"
|
|
bitfld.long 0x4 15. "CMP,Comparison Match" "0,1"
|
|
bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Parity Error" "0,1"
|
|
bitfld.long 0x4 6. "FRAME,Framing Error" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Overrun Error" "0,1"
|
|
bitfld.long 0x4 1. "TXRDY,Transmitter Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Receiver Ready" "0,1"
|
|
line.long 0x8 "RHR,Receive Holding Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "RXCHR,Received Character"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "THR,Transmit Holding Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXCHR,Character to be Transmitted"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "BRGR,Baud Rate Generator Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divisor"
|
|
line.long 0x4 "CMPR,Comparison Register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "VAL2,Second Comparison Value for Received Character"
|
|
bitfld.long 0x4 14. "CMPPAR,Compare Parity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
|
|
hexmask.long.byte 0x4 0.--7. 1. "VAL1,First Comparison Value for Received Character"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
tree.end
|
|
tree "UART4"
|
|
base ad:0x400E1E00
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 12. "REQCLR,Request Clear" "0,1"
|
|
bitfld.long 0x0 8. "RSTSTA,Reset Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
|
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
|
|
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
|
|
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "MR,Mode Register"
|
|
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic echo,2: Local loopback,3: Remote loopback"
|
|
bitfld.long 0x0 12. "BRSRCCK,Baud Rate Source Clock" "0: The baud rate is driven by the peripheral clock,1: The baud rate is driven by a PMC-programmable.."
|
|
newline
|
|
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even Parity,1: Odd Parity,2: Space: parity forced to 0,3: Mark: parity forced to 1,4: No parity,?,?,?"
|
|
bitfld.long 0x0 4. "FILTER,Receiver Digital Filter" "0: UART does not filter the receive line.,1: UART filters the receive line using a.."
|
|
wgroup.long 0x8++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 15. "CMP,Enable Comparison Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Enable TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Enable Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x0 6. "FRAME,Enable Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Enable Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TXRDY,Enable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Enable RXRDY Interrupt" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 15. "CMP,Disable Comparison Interrupt" "0,1"
|
|
bitfld.long 0x4 9. "TXEMPTY,Disable TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Disable Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x4 6. "FRAME,Disable Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Disable Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x4 1. "TXRDY,Disable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Disable RXRDY Interrupt" "0,1"
|
|
rgroup.long 0x10++0xB
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 15. "CMP,Mask Comparison Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Mask TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Mask Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x0 6. "FRAME,Mask Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Mask Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TXRDY,Disable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Mask RXRDY Interrupt" "0,1"
|
|
line.long 0x4 "SR,Status Register"
|
|
bitfld.long 0x4 15. "CMP,Comparison Match" "0,1"
|
|
bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Parity Error" "0,1"
|
|
bitfld.long 0x4 6. "FRAME,Framing Error" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Overrun Error" "0,1"
|
|
bitfld.long 0x4 1. "TXRDY,Transmitter Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Receiver Ready" "0,1"
|
|
line.long 0x8 "RHR,Receive Holding Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "RXCHR,Received Character"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "THR,Transmit Holding Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXCHR,Character to be Transmitted"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "BRGR,Baud Rate Generator Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divisor"
|
|
line.long 0x4 "CMPR,Comparison Register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "VAL2,Second Comparison Value for Received Character"
|
|
bitfld.long 0x4 14. "CMPPAR,Compare Parity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
|
|
hexmask.long.byte 0x4 0.--7. 1. "VAL1,First Comparison Value for Received Character"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("PIC32CZ2051MC70100")||cpuis("PIC32CZ2051MC70144"))
|
|
tree "UART3"
|
|
base ad:0x400E1C00
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 12. "REQCLR,Request Clear" "0,1"
|
|
bitfld.long 0x0 8. "RSTSTA,Reset Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
|
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
|
|
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
|
|
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "MR,Mode Register"
|
|
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic echo,2: Local loopback,3: Remote loopback"
|
|
bitfld.long 0x0 12. "BRSRCCK,Baud Rate Source Clock" "0: The baud rate is driven by the peripheral clock,1: The baud rate is driven by a PMC-programmable.."
|
|
newline
|
|
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even Parity,1: Odd Parity,2: Space: parity forced to 0,3: Mark: parity forced to 1,4: No parity,?,?,?"
|
|
bitfld.long 0x0 4. "FILTER,Receiver Digital Filter" "0: UART does not filter the receive line.,1: UART filters the receive line using a.."
|
|
wgroup.long 0x8++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 15. "CMP,Enable Comparison Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Enable TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Enable Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x0 6. "FRAME,Enable Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Enable Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TXRDY,Enable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Enable RXRDY Interrupt" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 15. "CMP,Disable Comparison Interrupt" "0,1"
|
|
bitfld.long 0x4 9. "TXEMPTY,Disable TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Disable Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x4 6. "FRAME,Disable Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Disable Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x4 1. "TXRDY,Disable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Disable RXRDY Interrupt" "0,1"
|
|
rgroup.long 0x10++0xB
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 15. "CMP,Mask Comparison Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Mask TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Mask Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x0 6. "FRAME,Mask Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Mask Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TXRDY,Disable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Mask RXRDY Interrupt" "0,1"
|
|
line.long 0x4 "SR,Status Register"
|
|
bitfld.long 0x4 15. "CMP,Comparison Match" "0,1"
|
|
bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Parity Error" "0,1"
|
|
bitfld.long 0x4 6. "FRAME,Framing Error" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Overrun Error" "0,1"
|
|
bitfld.long 0x4 1. "TXRDY,Transmitter Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Receiver Ready" "0,1"
|
|
line.long 0x8 "RHR,Receive Holding Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "RXCHR,Received Character"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "THR,Transmit Holding Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXCHR,Character to be Transmitted"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "BRGR,Baud Rate Generator Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divisor"
|
|
line.long 0x4 "CMPR,Comparison Register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "VAL2,Second Comparison Value for Received Character"
|
|
bitfld.long 0x4 14. "CMPPAR,Compare Parity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
|
|
hexmask.long.byte 0x4 0.--7. 1. "VAL1,First Comparison Value for Received Character"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
tree.end
|
|
tree "UART4"
|
|
base ad:0x400E1E00
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 12. "REQCLR,Request Clear" "0,1"
|
|
bitfld.long 0x0 8. "RSTSTA,Reset Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
|
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
|
|
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
|
|
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "MR,Mode Register"
|
|
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic echo,2: Local loopback,3: Remote loopback"
|
|
bitfld.long 0x0 12. "BRSRCCK,Baud Rate Source Clock" "0: The baud rate is driven by the peripheral clock,1: The baud rate is driven by a PMC-programmable.."
|
|
newline
|
|
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even Parity,1: Odd Parity,2: Space: parity forced to 0,3: Mark: parity forced to 1,4: No parity,?,?,?"
|
|
bitfld.long 0x0 4. "FILTER,Receiver Digital Filter" "0: UART does not filter the receive line.,1: UART filters the receive line using a.."
|
|
wgroup.long 0x8++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 15. "CMP,Enable Comparison Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Enable TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Enable Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x0 6. "FRAME,Enable Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Enable Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TXRDY,Enable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Enable RXRDY Interrupt" "0,1"
|
|
line.long 0x4 "IDR,Interrupt Disable Register"
|
|
bitfld.long 0x4 15. "CMP,Disable Comparison Interrupt" "0,1"
|
|
bitfld.long 0x4 9. "TXEMPTY,Disable TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Disable Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x4 6. "FRAME,Disable Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Disable Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x4 1. "TXRDY,Disable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Disable RXRDY Interrupt" "0,1"
|
|
rgroup.long 0x10++0xB
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 15. "CMP,Mask Comparison Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "TXEMPTY,Mask TXEMPTY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Mask Parity Error Interrupt" "0,1"
|
|
bitfld.long 0x0 6. "FRAME,Mask Framing Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Mask Overrun Error Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TXRDY,Disable TXRDY Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Mask RXRDY Interrupt" "0,1"
|
|
line.long 0x4 "SR,Status Register"
|
|
bitfld.long 0x4 15. "CMP,Comparison Match" "0,1"
|
|
bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Parity Error" "0,1"
|
|
bitfld.long 0x4 6. "FRAME,Framing Error" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Overrun Error" "0,1"
|
|
bitfld.long 0x4 1. "TXRDY,Transmitter Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Receiver Ready" "0,1"
|
|
line.long 0x8 "RHR,Receive Holding Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "RXCHR,Received Character"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "THR,Transmit Holding Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXCHR,Character to be Transmitted"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "BRGR,Baud Rate Generator Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divisor"
|
|
line.long 0x4 "CMPR,Comparison Register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "VAL2,Second Comparison Value for Received Character"
|
|
bitfld.long 0x4 14. "CMPPAR,Compare Parity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "CMPMODE,Comparison Mode" "0: Any character is received and comparison..,1: Comparison condition must be met to start.."
|
|
hexmask.long.byte 0x4 0.--7. 1. "VAL1,First Comparison Value for Received Character"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "USART (Universal Synchronous Asynchronous Receiver Transceiver)"
|
|
base ad:0x0
|
|
tree "USART0"
|
|
base ad:0x40024000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "US_CR_USART_MODE,Control Register"
|
|
bitfld.long 0x0 19. "RTSDIS,Request to Send Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "RTSEN,Request to Send Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "DTRDIS,Data Terminal Ready Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "DTREN,Data Terminal Ready Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "RETTO,Start Timeout Immediately" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "RSTNACK,Reset Non Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "RSTIT,Reset Iterations" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "SENDA,Send Address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "STTTO,Clear TIMEOUT Flag and Start Timeout After Next Character Received" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "STPBRK,Stop Break" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "STTBRK,Start Break" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "US_CR_SPI_MODE,Control Register"
|
|
bitfld.long 0x0 19. "RCS,Release SPI Chip Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "FCS,Force SPI Chip Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "US_CR_LIN_MODE,Control Register"
|
|
bitfld.long 0x0 21. "LINWKUP,Send LIN Wakeup Signal" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "LINABT,Abort LIN Transmission" "0,1"
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newline
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bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0,1"
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newline
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bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
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newline
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bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
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newline
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bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
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newline
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bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
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newline
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bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
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newline
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bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
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group.long 0x4++0x3
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line.long 0x0 "US_MR_USART_MODE,Mode Register"
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bitfld.long 0x0 31. "ONEBIT,Start Frame Delimiter Selector" "0,1"
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newline
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bitfld.long 0x0 30. "MODSYNC,Manchester Synchronization Mode" "0,1"
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newline
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bitfld.long 0x0 29. "MAN,Manchester Encoder/Decoder Enable" "0,1"
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newline
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bitfld.long 0x0 28. "FILTER,Receive Line Filter" "0,1"
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newline
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bitfld.long 0x0 24.--26. "MAX_ITERATION,Maximum Number of Automatic Iteration" "0,1,2,3,4,5,6,7"
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newline
|
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bitfld.long 0x0 23. "INVDATA,Inverted Data" "0,1"
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newline
|
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bitfld.long 0x0 22. "VAR_SYNC,Variable Synchronization of Command/Data Sync Start Frame Delimiter" "0,1"
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newline
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bitfld.long 0x0 21. "DSNACK,Disable Successive NACK" "0,1"
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newline
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bitfld.long 0x0 20. "INACK,Inhibit Non Acknowledge" "0,1"
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newline
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bitfld.long 0x0 19. "OVER,Oversampling Mode" "0,1"
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newline
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bitfld.long 0x0 18. "CLKO,Clock Output Select" "0,1"
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newline
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bitfld.long 0x0 17. "MODE9,9-bit Character Length" "0,1"
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newline
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bitfld.long 0x0 16. "MSBF,Bit Order" "0,1"
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newline
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bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic Echo. Receiver input is connected to..,2: Local Loopback. Transmitter output is connected..,3: Remote Loopback. RXD pin is internally connected.."
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newline
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bitfld.long 0x0 12.--13. "NBSTOP,Number of Stop Bits" "0: 1 stop bit,1: 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1),2: 2 stop bits,?"
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newline
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bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even parity,1: Odd parity,2: Parity forced to 0 (Space),3: Parity forced to 1 (Mark),4: No parity,?,6: Multidrop mode,?"
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newline
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bitfld.long 0x0 8. "SYNC,Synchronous Mode Select" "0,1"
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newline
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bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
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newline
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bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC programmable clock (PCK) is selected. If the..,3: Serial clock (SCK) is selected"
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newline
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hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
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group.long 0x4++0x3
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line.long 0x0 "US_MR_SPI_MODE,Mode Register"
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bitfld.long 0x0 20. "WRDBT,Wait Read Data Before Transfer" "0,1"
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newline
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bitfld.long 0x0 18. "CLKO,Clock Output Select" "0,1"
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newline
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bitfld.long 0x0 16. "CPOL,SPI Clock Polarity" "0,1"
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newline
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bitfld.long 0x0 8. "CPHA,SPI Clock Phase" "0,1"
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newline
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bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
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newline
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bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC programmable clock (PCK) is selected. If the..,3: Serial clock (SCK) is selected"
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newline
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hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
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wgroup.long 0x8++0x3
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line.long 0x0 "US_IER_USART_MODE,Interrupt Enable Register"
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bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Enable" "0,1"
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newline
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bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Enable" "0,1"
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newline
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bitfld.long 0x0 18. "DCDIC,Data Carrier Detect Input Change Interrupt Enable" "0,1"
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newline
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bitfld.long 0x0 17. "DSRIC,Data Set Ready Input Change Enable" "0,1"
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newline
|
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bitfld.long 0x0 16. "RIIC,Ring Indicator Input Change Enable" "0,1"
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newline
|
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bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 10. "ITER,Max number of Repetitions Reached Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
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wgroup.long 0x8++0x3
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line.long 0x0 "US_IER_SPI_MODE,Interrupt Enable Register"
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bitfld.long 0x0 19. "NSSE,NSS Line (Driving CTS Pin) Rising or Falling Edge Event" "0,1"
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newline
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bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
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newline
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
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newline
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
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newline
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
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newline
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
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wgroup.long 0x8++0x3
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line.long 0x0 "US_IER_LIN_MODE,Interrupt Enable Register"
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bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 29. "LINSNRE,LIN Slave Not Responding Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
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newline
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
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wgroup.long 0x8++0x7
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line.long 0x0 "US_IER_LON_MODE,Interrupt Enable Register"
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bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Enable" "0,1"
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newline
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bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Enable" "0,1"
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newline
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Enable" "0,1"
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newline
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bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Enable" "0,1"
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newline
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bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Enable" "0,1"
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newline
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bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
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newline
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
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line.long 0x4 "US_IDR_USART_MODE,Interrupt Disable Register"
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bitfld.long 0x4 24. "MANE,Manchester Error Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 18. "DCDIC,Data Carrier Detect Input Change Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 17. "DSRIC,Data Set Ready Input Change Disable" "0,1"
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newline
|
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bitfld.long 0x4 16. "RIIC,Ring Indicator Input Change Disable" "0,1"
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newline
|
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bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 7. "PARE,Parity Error Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 6. "FRAME,Framing Error Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x4 2. "RXBRK,Receiver Break Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
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newline
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bitfld.long 0x4 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
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wgroup.long 0xC++0x3
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line.long 0x0 "US_IDR_SPI_MODE,Interrupt Disable Register"
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bitfld.long 0x0 19. "NSSE,NSS Line (Driving CTS Pin) Rising or Falling Edge Event" "0,1"
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newline
|
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bitfld.long 0x0 10. "UNRE,SPI Underrun Error Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
|
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wgroup.long 0xC++0x3
|
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line.long 0x0 "US_IDR_LIN_MODE,Interrupt Disable Register"
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bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 29. "LINSNRE,LIN Slave Not Responding Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
|
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wgroup.long 0xC++0x3
|
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line.long 0x0 "US_IDR_LON_MODE,Interrupt Disable Register"
|
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bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 10. "UNRE,SPI Underrun Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
|
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rgroup.long 0x10++0x3
|
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line.long 0x0 "US_IMR_USART_MODE,Interrupt Mask Register"
|
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bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 18. "DCDIC,Data Carrier Detect Input Change Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 17. "DSRIC,Data Set Ready Input Change Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 16. "RIIC,Ring Indicator Input Change Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 10. "ITER,Max Number of Repetitions Reached Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
|
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rgroup.long 0x10++0x3
|
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line.long 0x0 "US_IMR_SPI_MODE,Interrupt Mask Register"
|
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bitfld.long 0x0 19. "NSSE,NSS Line (Driving CTS Pin) Rising or Falling Edge Event" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,SPI Underrun Error Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
|
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rgroup.long 0x10++0x3
|
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line.long 0x0 "US_IMR_LIN_MODE,Interrupt Mask Register"
|
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bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Mask" "0,1"
|
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newline
|
|
bitfld.long 0x0 29. "LINSNRE,LIN Slave Not Responding Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Mask" "0,1"
|
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newline
|
|
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Mask" "0,1"
|
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newline
|
|
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
|
|
newline
|
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "US_IMR_LON_MODE,Interrupt Mask Register"
|
|
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,SPI Underrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
|
|
newline
|
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bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
|
|
newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
|
|
line.long 0x4 "US_CSR_USART_MODE,Channel Status Register"
|
|
bitfld.long 0x4 24. "MANERR,Manchester Error (cleared by writing a one to the bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
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bitfld.long 0x4 23. "CTS,Image of CTS Input" "0,1"
|
|
newline
|
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bitfld.long 0x4 22. "DCD,Image of DCD Input" "0,1"
|
|
newline
|
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bitfld.long 0x4 21. "DSR,Image of DSR Input" "0,1"
|
|
newline
|
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bitfld.long 0x4 20. "RI,Image of RI Input" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Flag (cleared on read)" "0,1"
|
|
newline
|
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bitfld.long 0x4 18. "DCDIC,Data Carrier Detect Input Change Flag (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "DSRIC,Data Set Ready Input Change Flag (cleared on read)" "0,1"
|
|
newline
|
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bitfld.long 0x4 16. "RIIC,Ring Indicator Input Change Flag (cleared on read)" "0,1"
|
|
newline
|
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bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt (cleared by writing a one to bit US_CR.RSTNACK)" "0,1"
|
|
newline
|
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bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached (cleared by writing a one to bit US_CR.RSTIT)" "0,1"
|
|
newline
|
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bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty (cleared by writing US_THR)" "0,1"
|
|
newline
|
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bitfld.long 0x4 8. "TIMEOUT,Receiver Timeout (cleared by writing a one to bit US_CR.STTTO)" "0,1"
|
|
newline
|
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bitfld.long 0x4 7. "PARE,Parity Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
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bitfld.long 0x4 6. "FRAME,Framing Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
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bitfld.long 0x4 5. "OVRE,Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
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bitfld.long 0x4 2. "RXBRK,Break Received/End of Break (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
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bitfld.long 0x4 1. "TXRDY,Transmitter Ready (cleared by writing US_THR)" "0,1"
|
|
newline
|
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bitfld.long 0x4 0. "RXRDY,Receiver Ready (cleared by reading US_RHR)" "0,1"
|
|
rgroup.long 0x14++0x3
|
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line.long 0x0 "US_CSR_SPI_MODE,Channel Status Register"
|
|
bitfld.long 0x0 23. "NSS,Image of NSS Line" "0,1"
|
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newline
|
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bitfld.long 0x0 19. "NSSE,NSS Line (Driving CTS Pin) Rising or Falling Edge Event" "0,1"
|
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newline
|
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bitfld.long 0x0 10. "UNRE,SPI Underrun Error" "0,1"
|
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing US_THR)" "0,1"
|
|
newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing US_THR)" "0,1"
|
|
newline
|
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading US_RHR)" "0,1"
|
|
rgroup.long 0x14++0x3
|
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line.long 0x0 "US_CSR_LIN_MODE,Channel Status Register"
|
|
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error" "0,1"
|
|
newline
|
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bitfld.long 0x0 29. "LINSNRE,LIN Slave Not Responding Error Interrupt Mask" "0,1"
|
|
newline
|
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error" "0,1"
|
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newline
|
|
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Error" "0,1"
|
|
newline
|
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error" "0,1"
|
|
newline
|
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bitfld.long 0x0 25. "LINBE,LIN Bus Error" "0,1"
|
|
newline
|
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bitfld.long 0x0 23. "LINBLS,LIN Bus Line Status" "0,1"
|
|
newline
|
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed" "0,1"
|
|
newline
|
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received" "0,1"
|
|
newline
|
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "TIMEOUT,Receiver Timeout (cleared by writing a one to bit US_CR.STTTO)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FRAME,Framing Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading US_RHR)" "0,1"
|
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rgroup.long 0x14++0x7
|
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line.long 0x0 "US_CSR_LON_MODE,Channel Status Register"
|
|
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LRXD,LON Reception End Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LFET,LON Frame Early Termination" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LCOL,LON Collision Detected Flag" "0,1"
|
|
newline
|
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bitfld.long 0x0 24. "LTXD,LON Transmission End Flag" "0,1"
|
|
newline
|
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bitfld.long 0x0 10. "UNRE,Underrun Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing US_THR)" "0,1"
|
|
newline
|
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bitfld.long 0x0 7. "LCRCE,LON CRC Error" "0,1"
|
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newline
|
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error" "0,1"
|
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing US_THR)" "0,1"
|
|
newline
|
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading US_RHR)" "0,1"
|
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line.long 0x4 "US_RHR,Receive Holding Register"
|
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bitfld.long 0x4 15. "RXSYNH,Received Sync" "0,1"
|
|
newline
|
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hexmask.long.word 0x4 0.--8. 1. "RXCHR,Received Character"
|
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wgroup.long 0x1C++0x3
|
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line.long 0x0 "US_THR,Transmit Holding Register"
|
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bitfld.long 0x0 15. "TXSYNH,Sync Field to be Transmitted" "0,1"
|
|
newline
|
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hexmask.long.word 0x0 0.--8. 1. "TXCHR,Character to be Transmitted"
|
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group.long 0x20++0xB
|
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line.long 0x0 "US_BRGR,Baud Rate Generator Register"
|
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bitfld.long 0x0 16.--18. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
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newline
|
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hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divider"
|
|
line.long 0x4 "US_RTOR,Receiver Timeout Register"
|
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hexmask.long.tbyte 0x4 0.--16. 1. "TO,Timeout Value"
|
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line.long 0x8 "US_TTGR_USART_MODE,Transmitter Timeguard Register"
|
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hexmask.long.byte 0x8 0.--7. 1. "TG,Timeguard Value"
|
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group.long 0x28++0x3
|
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line.long 0x0 "US_TTGR_LON_MODE,Transmitter Timeguard Register"
|
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hexmask.long.tbyte 0x0 0.--23. 1. "PCYCLE,LON PCYCLE Length"
|
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group.long 0x40++0x3
|
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line.long 0x0 "US_FIDI_USART_MODE,FI DI Ratio Register"
|
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hexmask.long.word 0x0 0.--15. 1. "FI_DI_RATIO,FI Over DI Ratio Value"
|
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group.long 0x40++0x3
|
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line.long 0x0 "US_FIDI_LON_MODE,FI DI Ratio Register"
|
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hexmask.long.tbyte 0x0 0.--23. 1. "BETA2,LON BETA2 Length"
|
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rgroup.long 0x44++0x3
|
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line.long 0x0 "US_NER,Number of Errors Register"
|
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hexmask.long.byte 0x0 0.--7. 1. "NB_ERRORS,Number of Errors"
|
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group.long 0x4C++0xF
|
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line.long 0x0 "US_IF,IrDA Filter Register"
|
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hexmask.long.byte 0x0 0.--7. 1. "IRDA_FILTER,IrDA Filter"
|
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line.long 0x4 "US_MAN,Manchester Configuration Register"
|
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bitfld.long 0x4 31. "RXIDLEV,Receiver Idle Value" "0,1"
|
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newline
|
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bitfld.long 0x4 30. "DRIFT,Drift Compensation" "0,1"
|
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newline
|
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bitfld.long 0x4 29. "ONE,Must Be Set to 1" "0,1"
|
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newline
|
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bitfld.long 0x4 28. "RX_MPOL,Receiver Manchester Polarity" "0,1"
|
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newline
|
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bitfld.long 0x4 24.--25. "RX_PP,Receiver Preamble Pattern detected" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
|
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newline
|
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hexmask.long.byte 0x4 16.--19. 1. "RX_PL,Receiver Preamble Length"
|
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newline
|
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bitfld.long 0x4 12. "TX_MPOL,Transmitter Manchester Polarity" "0,1"
|
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newline
|
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bitfld.long 0x4 8.--9. "TX_PP,Transmitter Preamble Pattern" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
|
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newline
|
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hexmask.long.byte 0x4 0.--3. 1. "TX_PL,Transmitter Preamble Length"
|
|
line.long 0x8 "US_LINMR,LIN Mode Register"
|
|
bitfld.long 0x8 17. "SYNCDIS,Synchronization Disable" "0,1"
|
|
newline
|
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bitfld.long 0x8 16. "PDCM,DMAC Mode" "0,1"
|
|
newline
|
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hexmask.long.byte 0x8 8.--15. 1. "DLC,Data Length Control"
|
|
newline
|
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bitfld.long 0x8 7. "WKUPTYP,Wakeup Signal Type" "0,1"
|
|
newline
|
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bitfld.long 0x8 6. "FSDIS,Frame Slot Mode Disable" "0,1"
|
|
newline
|
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bitfld.long 0x8 5. "DLM,Data Length Mode" "0,1"
|
|
newline
|
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bitfld.long 0x8 4. "CHKTYP,Checksum Type" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "CHKDIS,Checksum Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "PARDIS,Parity Disable" "0,1"
|
|
newline
|
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bitfld.long 0x8 0.--1. "NACT,LIN Node Action" "0: The USART transmits the response.,1: The USART receives the response.,2: The USART does not transmit and does not receive..,?"
|
|
line.long 0xC "US_LINIR,LIN Identifier Register"
|
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hexmask.long.byte 0xC 0.--7. 1. "IDCHR,Identifier Character"
|
|
rgroup.long 0x5C++0x3
|
|
line.long 0x0 "US_LINBRR,LIN Baud Rate Register"
|
|
bitfld.long 0x0 16.--18. "LINFP,Fractional Part after Synchronization" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "LINCD,Clock Divider after Synchronization"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "US_LONMR,LON Mode Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "EOFS,End of Frame Condition Size"
|
|
newline
|
|
bitfld.long 0x0 5. "LCDS,LON Collision Detection Source" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "DMAM,LON DMA Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CDTAIL,LON Collision Detection on Frame Tail" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TCOL,Terminate Frame upon Collision Notification" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "COLDET,LON Collision Detection Feature" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "COMMT,LON comm_type Parameter Value" "0,1"
|
|
line.long 0x4 "US_LONPR,LON Preamble Register"
|
|
hexmask.long.word 0x4 0.--13. 1. "LONPL,LON Preamble Length"
|
|
line.long 0x8 "US_LONDL,LON Data Length Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "LONDL,LON Data Length"
|
|
line.long 0xC "US_LONL2HDR,LON L2HDR Register"
|
|
bitfld.long 0xC 7. "PB,LON Priority Bit" "0,1"
|
|
newline
|
|
bitfld.long 0xC 6. "ALTP,LON Alternate Path Bit" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--5. 1. "BLI,LON Backlog Increment"
|
|
rgroup.long 0x70++0x3
|
|
line.long 0x0 "US_LONBL,LON Backlog Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "LONBL,LON Node Backlog Value"
|
|
group.long 0x74++0x17
|
|
line.long 0x0 "US_LONB1TX,LON Beta1 Tx Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "BETA1TX,LON Beta1 Length after Transmission"
|
|
line.long 0x4 "US_LONB1RX,LON Beta1 Rx Register"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "BETA1RX,LON Beta1 Length after Reception"
|
|
line.long 0x8 "US_LONPRIO,LON Priority Register"
|
|
hexmask.long.byte 0x8 8.--14. 1. "NPS,LON Node Priority Slot"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "PSNB,LON Priority Slot Number"
|
|
line.long 0xC "US_IDTTX,LON IDT Tx Register"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. "IDTTX,LON Indeterminate Time after Transmission (comm_type = 1 mode only)"
|
|
line.long 0x10 "US_IDTRX,LON IDT Rx Register"
|
|
hexmask.long.tbyte 0x10 0.--23. 1. "IDTRX,LON Indeterminate Time after Reception (comm_type = 1 mode only)"
|
|
line.long 0x14 "US_ICDIFF,IC DIFF Register"
|
|
hexmask.long.byte 0x14 0.--3. 1. "ICDIFF,IC Differentiator Number"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "US_WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
newline
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "US_WPSR,Write Protection Status Register"
|
|
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
|
|
newline
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
tree.end
|
|
tree "USART1"
|
|
base ad:0x40028000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "US_CR_USART_MODE,Control Register"
|
|
bitfld.long 0x0 19. "RTSDIS,Request to Send Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "RTSEN,Request to Send Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "DTRDIS,Data Terminal Ready Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "DTREN,Data Terminal Ready Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "RETTO,Start Timeout Immediately" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "RSTNACK,Reset Non Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "RSTIT,Reset Iterations" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "SENDA,Send Address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "STTTO,Clear TIMEOUT Flag and Start Timeout After Next Character Received" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "STPBRK,Stop Break" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "STTBRK,Start Break" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "US_CR_SPI_MODE,Control Register"
|
|
bitfld.long 0x0 19. "RCS,Release SPI Chip Select" "0,1"
|
|
newline
|
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bitfld.long 0x0 18. "FCS,Force SPI Chip Select" "0,1"
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newline
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bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0,1"
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newline
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bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
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newline
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bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
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newline
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bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
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newline
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bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
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newline
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bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
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newline
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bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
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wgroup.long 0x0++0x3
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line.long 0x0 "US_CR_LIN_MODE,Control Register"
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bitfld.long 0x0 21. "LINWKUP,Send LIN Wakeup Signal" "0,1"
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newline
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bitfld.long 0x0 20. "LINABT,Abort LIN Transmission" "0,1"
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newline
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bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0,1"
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newline
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bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
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newline
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bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
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newline
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bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
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newline
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bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
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newline
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bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
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newline
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bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
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group.long 0x4++0x3
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line.long 0x0 "US_MR_USART_MODE,Mode Register"
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bitfld.long 0x0 31. "ONEBIT,Start Frame Delimiter Selector" "0,1"
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newline
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bitfld.long 0x0 30. "MODSYNC,Manchester Synchronization Mode" "0,1"
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newline
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bitfld.long 0x0 29. "MAN,Manchester Encoder/Decoder Enable" "0,1"
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newline
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bitfld.long 0x0 28. "FILTER,Receive Line Filter" "0,1"
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newline
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bitfld.long 0x0 24.--26. "MAX_ITERATION,Maximum Number of Automatic Iteration" "0,1,2,3,4,5,6,7"
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newline
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bitfld.long 0x0 23. "INVDATA,Inverted Data" "0,1"
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newline
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bitfld.long 0x0 22. "VAR_SYNC,Variable Synchronization of Command/Data Sync Start Frame Delimiter" "0,1"
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newline
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bitfld.long 0x0 21. "DSNACK,Disable Successive NACK" "0,1"
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newline
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bitfld.long 0x0 20. "INACK,Inhibit Non Acknowledge" "0,1"
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newline
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bitfld.long 0x0 19. "OVER,Oversampling Mode" "0,1"
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newline
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bitfld.long 0x0 18. "CLKO,Clock Output Select" "0,1"
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newline
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bitfld.long 0x0 17. "MODE9,9-bit Character Length" "0,1"
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newline
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bitfld.long 0x0 16. "MSBF,Bit Order" "0,1"
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newline
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bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic Echo. Receiver input is connected to..,2: Local Loopback. Transmitter output is connected..,3: Remote Loopback. RXD pin is internally connected.."
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newline
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bitfld.long 0x0 12.--13. "NBSTOP,Number of Stop Bits" "0: 1 stop bit,1: 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1),2: 2 stop bits,?"
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newline
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bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even parity,1: Odd parity,2: Parity forced to 0 (Space),3: Parity forced to 1 (Mark),4: No parity,?,6: Multidrop mode,?"
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newline
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bitfld.long 0x0 8. "SYNC,Synchronous Mode Select" "0,1"
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newline
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bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
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newline
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bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC programmable clock (PCK) is selected. If the..,3: Serial clock (SCK) is selected"
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newline
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hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
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group.long 0x4++0x3
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line.long 0x0 "US_MR_SPI_MODE,Mode Register"
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bitfld.long 0x0 20. "WRDBT,Wait Read Data Before Transfer" "0,1"
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newline
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bitfld.long 0x0 18. "CLKO,Clock Output Select" "0,1"
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newline
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bitfld.long 0x0 16. "CPOL,SPI Clock Polarity" "0,1"
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newline
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bitfld.long 0x0 8. "CPHA,SPI Clock Phase" "0,1"
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newline
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bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
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newline
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bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC programmable clock (PCK) is selected. If the..,3: Serial clock (SCK) is selected"
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newline
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hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
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wgroup.long 0x8++0x3
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line.long 0x0 "US_IER_USART_MODE,Interrupt Enable Register"
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bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Enable" "0,1"
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newline
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bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Enable" "0,1"
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newline
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bitfld.long 0x0 18. "DCDIC,Data Carrier Detect Input Change Interrupt Enable" "0,1"
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newline
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bitfld.long 0x0 17. "DSRIC,Data Set Ready Input Change Enable" "0,1"
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newline
|
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bitfld.long 0x0 16. "RIIC,Ring Indicator Input Change Enable" "0,1"
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newline
|
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bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 10. "ITER,Max number of Repetitions Reached Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
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wgroup.long 0x8++0x3
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line.long 0x0 "US_IER_SPI_MODE,Interrupt Enable Register"
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bitfld.long 0x0 19. "NSSE,NSS Line (Driving CTS Pin) Rising or Falling Edge Event" "0,1"
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newline
|
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bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
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wgroup.long 0x8++0x3
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line.long 0x0 "US_IER_LIN_MODE,Interrupt Enable Register"
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bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 29. "LINSNRE,LIN Slave Not Responding Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
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wgroup.long 0x8++0x7
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line.long 0x0 "US_IER_LON_MODE,Interrupt Enable Register"
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bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
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line.long 0x4 "US_IDR_USART_MODE,Interrupt Disable Register"
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bitfld.long 0x4 24. "MANE,Manchester Error Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 18. "DCDIC,Data Carrier Detect Input Change Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 17. "DSRIC,Data Set Ready Input Change Disable" "0,1"
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newline
|
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bitfld.long 0x4 16. "RIIC,Ring Indicator Input Change Disable" "0,1"
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newline
|
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bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 7. "PARE,Parity Error Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 6. "FRAME,Framing Error Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x4 2. "RXBRK,Receiver Break Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x4 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
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wgroup.long 0xC++0x3
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line.long 0x0 "US_IDR_SPI_MODE,Interrupt Disable Register"
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bitfld.long 0x0 19. "NSSE,NSS Line (Driving CTS Pin) Rising or Falling Edge Event" "0,1"
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newline
|
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bitfld.long 0x0 10. "UNRE,SPI Underrun Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
|
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wgroup.long 0xC++0x3
|
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line.long 0x0 "US_IDR_LIN_MODE,Interrupt Disable Register"
|
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bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Disable" "0,1"
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newline
|
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bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 29. "LINSNRE,LIN Slave Not Responding Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
|
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wgroup.long 0xC++0x3
|
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line.long 0x0 "US_IDR_LON_MODE,Interrupt Disable Register"
|
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bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 10. "UNRE,SPI Underrun Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
|
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rgroup.long 0x10++0x3
|
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line.long 0x0 "US_IMR_USART_MODE,Interrupt Mask Register"
|
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bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 18. "DCDIC,Data Carrier Detect Input Change Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 17. "DSRIC,Data Set Ready Input Change Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 16. "RIIC,Ring Indicator Input Change Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 10. "ITER,Max Number of Repetitions Reached Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
|
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rgroup.long 0x10++0x3
|
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line.long 0x0 "US_IMR_SPI_MODE,Interrupt Mask Register"
|
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bitfld.long 0x0 19. "NSSE,NSS Line (Driving CTS Pin) Rising or Falling Edge Event" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,SPI Underrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
|
|
newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
|
|
rgroup.long 0x10++0x3
|
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line.long 0x0 "US_IMR_LIN_MODE,Interrupt Mask Register"
|
|
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "LINSNRE,LIN Slave Not Responding Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "US_IMR_LON_MODE,Interrupt Mask Register"
|
|
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,SPI Underrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
|
|
line.long 0x4 "US_CSR_USART_MODE,Channel Status Register"
|
|
bitfld.long 0x4 24. "MANERR,Manchester Error (cleared by writing a one to the bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "CTS,Image of CTS Input" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "DCD,Image of DCD Input" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "DSR,Image of DSR Input" "0,1"
|
|
newline
|
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bitfld.long 0x4 20. "RI,Image of RI Input" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Flag (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "DCDIC,Data Carrier Detect Input Change Flag (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "DSRIC,Data Set Ready Input Change Flag (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "RIIC,Ring Indicator Input Change Flag (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt (cleared by writing a one to bit US_CR.RSTNACK)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached (cleared by writing a one to bit US_CR.RSTIT)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "TIMEOUT,Receiver Timeout (cleared by writing a one to bit US_CR.STTTO)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Parity Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
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bitfld.long 0x4 6. "FRAME,Framing Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
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bitfld.long 0x4 5. "OVRE,Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "RXBRK,Break Received/End of Break (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "TXRDY,Transmitter Ready (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Receiver Ready (cleared by reading US_RHR)" "0,1"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "US_CSR_SPI_MODE,Channel Status Register"
|
|
bitfld.long 0x0 23. "NSS,Image of NSS Line" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "NSSE,NSS Line (Driving CTS Pin) Rising or Falling Edge Event" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,SPI Underrun Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading US_RHR)" "0,1"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "US_CSR_LIN_MODE,Channel Status Register"
|
|
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "LINSNRE,LIN Slave Not Responding Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "LINCE,LIN Checksum Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LINBE,LIN Bus Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "LINBLS,LIN Bus Line Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "TIMEOUT,Receiver Timeout (cleared by writing a one to bit US_CR.STTTO)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FRAME,Framing Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading US_RHR)" "0,1"
|
|
rgroup.long 0x14++0x7
|
|
line.long 0x0 "US_CSR_LON_MODE,Channel Status Register"
|
|
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LRXD,LON Reception End Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LFET,LON Frame Early Termination" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LCOL,LON Collision Detected Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "LTXD,LON Transmission End Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,Underrun Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "LCRCE,LON CRC Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LSFE,LON Short Frame Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading US_RHR)" "0,1"
|
|
line.long 0x4 "US_RHR,Receive Holding Register"
|
|
bitfld.long 0x4 15. "RXSYNH,Received Sync" "0,1"
|
|
newline
|
|
hexmask.long.word 0x4 0.--8. 1. "RXCHR,Received Character"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "US_THR,Transmit Holding Register"
|
|
bitfld.long 0x0 15. "TXSYNH,Sync Field to be Transmitted" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--8. 1. "TXCHR,Character to be Transmitted"
|
|
group.long 0x20++0xB
|
|
line.long 0x0 "US_BRGR,Baud Rate Generator Register"
|
|
bitfld.long 0x0 16.--18. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divider"
|
|
line.long 0x4 "US_RTOR,Receiver Timeout Register"
|
|
hexmask.long.tbyte 0x4 0.--16. 1. "TO,Timeout Value"
|
|
line.long 0x8 "US_TTGR_USART_MODE,Transmitter Timeguard Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "TG,Timeguard Value"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "US_TTGR_LON_MODE,Transmitter Timeguard Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "PCYCLE,LON PCYCLE Length"
|
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group.long 0x40++0x3
|
|
line.long 0x0 "US_FIDI_USART_MODE,FI DI Ratio Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "FI_DI_RATIO,FI Over DI Ratio Value"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "US_FIDI_LON_MODE,FI DI Ratio Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "BETA2,LON BETA2 Length"
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "US_NER,Number of Errors Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "NB_ERRORS,Number of Errors"
|
|
group.long 0x4C++0xF
|
|
line.long 0x0 "US_IF,IrDA Filter Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "IRDA_FILTER,IrDA Filter"
|
|
line.long 0x4 "US_MAN,Manchester Configuration Register"
|
|
bitfld.long 0x4 31. "RXIDLEV,Receiver Idle Value" "0,1"
|
|
newline
|
|
bitfld.long 0x4 30. "DRIFT,Drift Compensation" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "ONE,Must Be Set to 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "RX_MPOL,Receiver Manchester Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24.--25. "RX_PP,Receiver Preamble Pattern detected" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
|
|
newline
|
|
hexmask.long.byte 0x4 16.--19. 1. "RX_PL,Receiver Preamble Length"
|
|
newline
|
|
bitfld.long 0x4 12. "TX_MPOL,Transmitter Manchester Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "TX_PP,Transmitter Preamble Pattern" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--3. 1. "TX_PL,Transmitter Preamble Length"
|
|
line.long 0x8 "US_LINMR,LIN Mode Register"
|
|
bitfld.long 0x8 17. "SYNCDIS,Synchronization Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 16. "PDCM,DMAC Mode" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--15. 1. "DLC,Data Length Control"
|
|
newline
|
|
bitfld.long 0x8 7. "WKUPTYP,Wakeup Signal Type" "0,1"
|
|
newline
|
|
bitfld.long 0x8 6. "FSDIS,Frame Slot Mode Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "DLM,Data Length Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x8 4. "CHKTYP,Checksum Type" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "CHKDIS,Checksum Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "PARDIS,Parity Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0.--1. "NACT,LIN Node Action" "0: The USART transmits the response.,1: The USART receives the response.,2: The USART does not transmit and does not receive..,?"
|
|
line.long 0xC "US_LINIR,LIN Identifier Register"
|
|
hexmask.long.byte 0xC 0.--7. 1. "IDCHR,Identifier Character"
|
|
rgroup.long 0x5C++0x3
|
|
line.long 0x0 "US_LINBRR,LIN Baud Rate Register"
|
|
bitfld.long 0x0 16.--18. "LINFP,Fractional Part after Synchronization" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "LINCD,Clock Divider after Synchronization"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "US_LONMR,LON Mode Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "EOFS,End of Frame Condition Size"
|
|
newline
|
|
bitfld.long 0x0 5. "LCDS,LON Collision Detection Source" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "DMAM,LON DMA Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CDTAIL,LON Collision Detection on Frame Tail" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TCOL,Terminate Frame upon Collision Notification" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "COLDET,LON Collision Detection Feature" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "COMMT,LON comm_type Parameter Value" "0,1"
|
|
line.long 0x4 "US_LONPR,LON Preamble Register"
|
|
hexmask.long.word 0x4 0.--13. 1. "LONPL,LON Preamble Length"
|
|
line.long 0x8 "US_LONDL,LON Data Length Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "LONDL,LON Data Length"
|
|
line.long 0xC "US_LONL2HDR,LON L2HDR Register"
|
|
bitfld.long 0xC 7. "PB,LON Priority Bit" "0,1"
|
|
newline
|
|
bitfld.long 0xC 6. "ALTP,LON Alternate Path Bit" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--5. 1. "BLI,LON Backlog Increment"
|
|
rgroup.long 0x70++0x3
|
|
line.long 0x0 "US_LONBL,LON Backlog Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "LONBL,LON Node Backlog Value"
|
|
group.long 0x74++0x17
|
|
line.long 0x0 "US_LONB1TX,LON Beta1 Tx Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "BETA1TX,LON Beta1 Length after Transmission"
|
|
line.long 0x4 "US_LONB1RX,LON Beta1 Rx Register"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "BETA1RX,LON Beta1 Length after Reception"
|
|
line.long 0x8 "US_LONPRIO,LON Priority Register"
|
|
hexmask.long.byte 0x8 8.--14. 1. "NPS,LON Node Priority Slot"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "PSNB,LON Priority Slot Number"
|
|
line.long 0xC "US_IDTTX,LON IDT Tx Register"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. "IDTTX,LON Indeterminate Time after Transmission (comm_type = 1 mode only)"
|
|
line.long 0x10 "US_IDTRX,LON IDT Rx Register"
|
|
hexmask.long.tbyte 0x10 0.--23. 1. "IDTRX,LON Indeterminate Time after Reception (comm_type = 1 mode only)"
|
|
line.long 0x14 "US_ICDIFF,IC DIFF Register"
|
|
hexmask.long.byte 0x14 0.--3. 1. "ICDIFF,IC Differentiator Number"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "US_WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
newline
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "US_WPSR,Write Protection Status Register"
|
|
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
|
|
newline
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
tree.end
|
|
sif (cpuis("PIC32CZ2051CA70100"))
|
|
tree "USART2"
|
|
base ad:0x4002C000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "US_CR_USART_MODE,Control Register"
|
|
bitfld.long 0x0 19. "RTSDIS,Request to Send Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "RTSEN,Request to Send Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "DTRDIS,Data Terminal Ready Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "DTREN,Data Terminal Ready Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "RETTO,Start Timeout Immediately" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "RSTNACK,Reset Non Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "RSTIT,Reset Iterations" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "SENDA,Send Address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "STTTO,Clear TIMEOUT Flag and Start Timeout After Next Character Received" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "STPBRK,Stop Break" "0,1"
|
|
newline
|
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bitfld.long 0x0 9. "STTBRK,Start Break" "0,1"
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newline
|
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bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0,1"
|
|
newline
|
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bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
|
newline
|
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bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
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bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
|
|
newline
|
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bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "US_CR_SPI_MODE,Control Register"
|
|
bitfld.long 0x0 19. "RCS,Release SPI Chip Select" "0,1"
|
|
newline
|
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bitfld.long 0x0 18. "FCS,Force SPI Chip Select" "0,1"
|
|
newline
|
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bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0,1"
|
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newline
|
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bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
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bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
|
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newline
|
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bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
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wgroup.long 0x0++0x3
|
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line.long 0x0 "US_CR_LIN_MODE,Control Register"
|
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bitfld.long 0x0 21. "LINWKUP,Send LIN Wakeup Signal" "0,1"
|
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newline
|
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bitfld.long 0x0 20. "LINABT,Abort LIN Transmission" "0,1"
|
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newline
|
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bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0,1"
|
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newline
|
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bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
|
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newline
|
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bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
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group.long 0x4++0x3
|
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line.long 0x0 "US_MR_USART_MODE,Mode Register"
|
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bitfld.long 0x0 31. "ONEBIT,Start Frame Delimiter Selector" "0,1"
|
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newline
|
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bitfld.long 0x0 30. "MODSYNC,Manchester Synchronization Mode" "0,1"
|
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newline
|
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bitfld.long 0x0 29. "MAN,Manchester Encoder/Decoder Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 28. "FILTER,Receive Line Filter" "0,1"
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newline
|
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bitfld.long 0x0 24.--26. "MAX_ITERATION,Maximum Number of Automatic Iteration" "0,1,2,3,4,5,6,7"
|
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newline
|
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bitfld.long 0x0 23. "INVDATA,Inverted Data" "0,1"
|
|
newline
|
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bitfld.long 0x0 22. "VAR_SYNC,Variable Synchronization of Command/Data Sync Start Frame Delimiter" "0,1"
|
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newline
|
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bitfld.long 0x0 21. "DSNACK,Disable Successive NACK" "0,1"
|
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newline
|
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bitfld.long 0x0 20. "INACK,Inhibit Non Acknowledge" "0,1"
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newline
|
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bitfld.long 0x0 19. "OVER,Oversampling Mode" "0,1"
|
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newline
|
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bitfld.long 0x0 18. "CLKO,Clock Output Select" "0,1"
|
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newline
|
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bitfld.long 0x0 17. "MODE9,9-bit Character Length" "0,1"
|
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newline
|
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bitfld.long 0x0 16. "MSBF,Bit Order" "0,1"
|
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newline
|
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bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic Echo. Receiver input is connected to..,2: Local Loopback. Transmitter output is connected..,3: Remote Loopback. RXD pin is internally connected.."
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newline
|
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bitfld.long 0x0 12.--13. "NBSTOP,Number of Stop Bits" "0: 1 stop bit,1: 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1),2: 2 stop bits,?"
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newline
|
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bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even parity,1: Odd parity,2: Parity forced to 0 (Space),3: Parity forced to 1 (Mark),4: No parity,?,6: Multidrop mode,?"
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newline
|
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bitfld.long 0x0 8. "SYNC,Synchronous Mode Select" "0,1"
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newline
|
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bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
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newline
|
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bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC programmable clock (PCK) is selected. If the..,3: Serial clock (SCK) is selected"
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newline
|
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hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
|
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group.long 0x4++0x3
|
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line.long 0x0 "US_MR_SPI_MODE,Mode Register"
|
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bitfld.long 0x0 20. "WRDBT,Wait Read Data Before Transfer" "0,1"
|
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newline
|
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bitfld.long 0x0 18. "CLKO,Clock Output Select" "0,1"
|
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newline
|
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bitfld.long 0x0 16. "CPOL,SPI Clock Polarity" "0,1"
|
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newline
|
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bitfld.long 0x0 8. "CPHA,SPI Clock Phase" "0,1"
|
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newline
|
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bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
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newline
|
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bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC programmable clock (PCK) is selected. If the..,3: Serial clock (SCK) is selected"
|
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newline
|
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hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
|
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wgroup.long 0x8++0x3
|
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line.long 0x0 "US_IER_USART_MODE,Interrupt Enable Register"
|
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bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 18. "DCDIC,Data Carrier Detect Input Change Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 17. "DSRIC,Data Set Ready Input Change Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 16. "RIIC,Ring Indicator Input Change Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 10. "ITER,Max number of Repetitions Reached Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
|
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wgroup.long 0x8++0x3
|
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line.long 0x0 "US_IER_SPI_MODE,Interrupt Enable Register"
|
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bitfld.long 0x0 19. "NSSE,NSS Line (Driving CTS Pin) Rising or Falling Edge Event" "0,1"
|
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newline
|
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bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
|
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wgroup.long 0x8++0x3
|
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line.long 0x0 "US_IER_LIN_MODE,Interrupt Enable Register"
|
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bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "LINSNRE,LIN Slave Not Responding Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
|
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wgroup.long 0x8++0x7
|
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line.long 0x0 "US_IER_LON_MODE,Interrupt Enable Register"
|
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bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
|
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line.long 0x4 "US_IDR_USART_MODE,Interrupt Disable Register"
|
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bitfld.long 0x4 24. "MANE,Manchester Error Interrupt Disable" "0,1"
|
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newline
|
|
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x4 18. "DCDIC,Data Carrier Detect Input Change Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x4 17. "DSRIC,Data Set Ready Input Change Disable" "0,1"
|
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newline
|
|
bitfld.long 0x4 16. "RIIC,Ring Indicator Input Change Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt Disable" "0,1"
|
|
newline
|
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bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x4 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x4 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
|
|
newline
|
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bitfld.long 0x4 7. "PARE,Parity Error Interrupt Disable" "0,1"
|
|
newline
|
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bitfld.long 0x4 6. "FRAME,Framing Error Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x4 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x4 2. "RXBRK,Receiver Break Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x4 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
|
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newline
|
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bitfld.long 0x4 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
|
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wgroup.long 0xC++0x3
|
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line.long 0x0 "US_IDR_SPI_MODE,Interrupt Disable Register"
|
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bitfld.long 0x0 19. "NSSE,NSS Line (Driving CTS Pin) Rising or Falling Edge Event" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,SPI Underrun Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
|
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wgroup.long 0xC++0x3
|
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line.long 0x0 "US_IDR_LIN_MODE,Interrupt Disable Register"
|
|
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "LINSNRE,LIN Slave Not Responding Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
|
|
wgroup.long 0xC++0x3
|
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line.long 0x0 "US_IDR_LON_MODE,Interrupt Disable Register"
|
|
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,SPI Underrun Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "US_IMR_USART_MODE,Interrupt Mask Register"
|
|
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "DCDIC,Data Carrier Detect Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "DSRIC,Data Set Ready Input Change Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "RIIC,Ring Indicator Input Change Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "ITER,Max Number of Repetitions Reached Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "US_IMR_SPI_MODE,Interrupt Mask Register"
|
|
bitfld.long 0x0 19. "NSSE,NSS Line (Driving CTS Pin) Rising or Falling Edge Event" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,SPI Underrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "US_IMR_LIN_MODE,Interrupt Mask Register"
|
|
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "LINSNRE,LIN Slave Not Responding Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "US_IMR_LON_MODE,Interrupt Mask Register"
|
|
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,SPI Underrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
|
|
line.long 0x4 "US_CSR_USART_MODE,Channel Status Register"
|
|
bitfld.long 0x4 24. "MANERR,Manchester Error (cleared by writing a one to the bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "CTS,Image of CTS Input" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "DCD,Image of DCD Input" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "DSR,Image of DSR Input" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "RI,Image of RI Input" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Flag (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "DCDIC,Data Carrier Detect Input Change Flag (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "DSRIC,Data Set Ready Input Change Flag (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "RIIC,Ring Indicator Input Change Flag (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt (cleared by writing a one to bit US_CR.RSTNACK)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached (cleared by writing a one to bit US_CR.RSTIT)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "TIMEOUT,Receiver Timeout (cleared by writing a one to bit US_CR.STTTO)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Parity Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "FRAME,Framing Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "RXBRK,Break Received/End of Break (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "TXRDY,Transmitter Ready (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Receiver Ready (cleared by reading US_RHR)" "0,1"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "US_CSR_SPI_MODE,Channel Status Register"
|
|
bitfld.long 0x0 23. "NSS,Image of NSS Line" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "NSSE,NSS Line (Driving CTS Pin) Rising or Falling Edge Event" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,SPI Underrun Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading US_RHR)" "0,1"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "US_CSR_LIN_MODE,Channel Status Register"
|
|
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "LINSNRE,LIN Slave Not Responding Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "LINCE,LIN Checksum Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LINBE,LIN Bus Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "LINBLS,LIN Bus Line Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "TIMEOUT,Receiver Timeout (cleared by writing a one to bit US_CR.STTTO)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FRAME,Framing Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading US_RHR)" "0,1"
|
|
rgroup.long 0x14++0x7
|
|
line.long 0x0 "US_CSR_LON_MODE,Channel Status Register"
|
|
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LRXD,LON Reception End Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LFET,LON Frame Early Termination" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LCOL,LON Collision Detected Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "LTXD,LON Transmission End Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,Underrun Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "LCRCE,LON CRC Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LSFE,LON Short Frame Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading US_RHR)" "0,1"
|
|
line.long 0x4 "US_RHR,Receive Holding Register"
|
|
bitfld.long 0x4 15. "RXSYNH,Received Sync" "0,1"
|
|
newline
|
|
hexmask.long.word 0x4 0.--8. 1. "RXCHR,Received Character"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "US_THR,Transmit Holding Register"
|
|
bitfld.long 0x0 15. "TXSYNH,Sync Field to be Transmitted" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--8. 1. "TXCHR,Character to be Transmitted"
|
|
group.long 0x20++0xB
|
|
line.long 0x0 "US_BRGR,Baud Rate Generator Register"
|
|
bitfld.long 0x0 16.--18. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divider"
|
|
line.long 0x4 "US_RTOR,Receiver Timeout Register"
|
|
hexmask.long.tbyte 0x4 0.--16. 1. "TO,Timeout Value"
|
|
line.long 0x8 "US_TTGR_USART_MODE,Transmitter Timeguard Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "TG,Timeguard Value"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "US_TTGR_LON_MODE,Transmitter Timeguard Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "PCYCLE,LON PCYCLE Length"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "US_FIDI_USART_MODE,FI DI Ratio Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "FI_DI_RATIO,FI Over DI Ratio Value"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "US_FIDI_LON_MODE,FI DI Ratio Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "BETA2,LON BETA2 Length"
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "US_NER,Number of Errors Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "NB_ERRORS,Number of Errors"
|
|
group.long 0x4C++0xF
|
|
line.long 0x0 "US_IF,IrDA Filter Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "IRDA_FILTER,IrDA Filter"
|
|
line.long 0x4 "US_MAN,Manchester Configuration Register"
|
|
bitfld.long 0x4 31. "RXIDLEV,Receiver Idle Value" "0,1"
|
|
newline
|
|
bitfld.long 0x4 30. "DRIFT,Drift Compensation" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "ONE,Must Be Set to 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "RX_MPOL,Receiver Manchester Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24.--25. "RX_PP,Receiver Preamble Pattern detected" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
|
|
newline
|
|
hexmask.long.byte 0x4 16.--19. 1. "RX_PL,Receiver Preamble Length"
|
|
newline
|
|
bitfld.long 0x4 12. "TX_MPOL,Transmitter Manchester Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "TX_PP,Transmitter Preamble Pattern" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--3. 1. "TX_PL,Transmitter Preamble Length"
|
|
line.long 0x8 "US_LINMR,LIN Mode Register"
|
|
bitfld.long 0x8 17. "SYNCDIS,Synchronization Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 16. "PDCM,DMAC Mode" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--15. 1. "DLC,Data Length Control"
|
|
newline
|
|
bitfld.long 0x8 7. "WKUPTYP,Wakeup Signal Type" "0,1"
|
|
newline
|
|
bitfld.long 0x8 6. "FSDIS,Frame Slot Mode Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "DLM,Data Length Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x8 4. "CHKTYP,Checksum Type" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "CHKDIS,Checksum Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "PARDIS,Parity Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0.--1. "NACT,LIN Node Action" "0: The USART transmits the response.,1: The USART receives the response.,2: The USART does not transmit and does not receive..,?"
|
|
line.long 0xC "US_LINIR,LIN Identifier Register"
|
|
hexmask.long.byte 0xC 0.--7. 1. "IDCHR,Identifier Character"
|
|
rgroup.long 0x5C++0x3
|
|
line.long 0x0 "US_LINBRR,LIN Baud Rate Register"
|
|
bitfld.long 0x0 16.--18. "LINFP,Fractional Part after Synchronization" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "LINCD,Clock Divider after Synchronization"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "US_LONMR,LON Mode Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "EOFS,End of Frame Condition Size"
|
|
newline
|
|
bitfld.long 0x0 5. "LCDS,LON Collision Detection Source" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "DMAM,LON DMA Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CDTAIL,LON Collision Detection on Frame Tail" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TCOL,Terminate Frame upon Collision Notification" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "COLDET,LON Collision Detection Feature" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "COMMT,LON comm_type Parameter Value" "0,1"
|
|
line.long 0x4 "US_LONPR,LON Preamble Register"
|
|
hexmask.long.word 0x4 0.--13. 1. "LONPL,LON Preamble Length"
|
|
line.long 0x8 "US_LONDL,LON Data Length Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "LONDL,LON Data Length"
|
|
line.long 0xC "US_LONL2HDR,LON L2HDR Register"
|
|
bitfld.long 0xC 7. "PB,LON Priority Bit" "0,1"
|
|
newline
|
|
bitfld.long 0xC 6. "ALTP,LON Alternate Path Bit" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--5. 1. "BLI,LON Backlog Increment"
|
|
rgroup.long 0x70++0x3
|
|
line.long 0x0 "US_LONBL,LON Backlog Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "LONBL,LON Node Backlog Value"
|
|
group.long 0x74++0x17
|
|
line.long 0x0 "US_LONB1TX,LON Beta1 Tx Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "BETA1TX,LON Beta1 Length after Transmission"
|
|
line.long 0x4 "US_LONB1RX,LON Beta1 Rx Register"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "BETA1RX,LON Beta1 Length after Reception"
|
|
line.long 0x8 "US_LONPRIO,LON Priority Register"
|
|
hexmask.long.byte 0x8 8.--14. 1. "NPS,LON Node Priority Slot"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "PSNB,LON Priority Slot Number"
|
|
line.long 0xC "US_IDTTX,LON IDT Tx Register"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. "IDTTX,LON Indeterminate Time after Transmission (comm_type = 1 mode only)"
|
|
line.long 0x10 "US_IDTRX,LON IDT Rx Register"
|
|
hexmask.long.tbyte 0x10 0.--23. 1. "IDTRX,LON Indeterminate Time after Reception (comm_type = 1 mode only)"
|
|
line.long 0x14 "US_ICDIFF,IC DIFF Register"
|
|
hexmask.long.byte 0x14 0.--3. 1. "ICDIFF,IC Differentiator Number"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "US_WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
newline
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "US_WPSR,Write Protection Status Register"
|
|
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
|
|
newline
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("PIC32CZ2051CA70144"))
|
|
tree "USART2"
|
|
base ad:0x4002C000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "US_CR_USART_MODE,Control Register"
|
|
bitfld.long 0x0 19. "RTSDIS,Request to Send Disable" "0,1"
|
|
newline
|
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bitfld.long 0x0 18. "RTSEN,Request to Send Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 17. "DTRDIS,Data Terminal Ready Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 16. "DTREN,Data Terminal Ready Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 15. "RETTO,Start Timeout Immediately" "0,1"
|
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newline
|
|
bitfld.long 0x0 14. "RSTNACK,Reset Non Acknowledge" "0,1"
|
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newline
|
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bitfld.long 0x0 13. "RSTIT,Reset Iterations" "0,1"
|
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newline
|
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bitfld.long 0x0 12. "SENDA,Send Address" "0,1"
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newline
|
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bitfld.long 0x0 11. "STTTO,Clear TIMEOUT Flag and Start Timeout After Next Character Received" "0,1"
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newline
|
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bitfld.long 0x0 10. "STPBRK,Stop Break" "0,1"
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newline
|
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bitfld.long 0x0 9. "STTBRK,Start Break" "0,1"
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newline
|
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bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0,1"
|
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newline
|
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bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
|
|
newline
|
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bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
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wgroup.long 0x0++0x3
|
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line.long 0x0 "US_CR_SPI_MODE,Control Register"
|
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bitfld.long 0x0 19. "RCS,Release SPI Chip Select" "0,1"
|
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newline
|
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bitfld.long 0x0 18. "FCS,Force SPI Chip Select" "0,1"
|
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newline
|
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bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0,1"
|
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newline
|
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bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
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newline
|
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bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
|
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newline
|
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bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
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wgroup.long 0x0++0x3
|
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line.long 0x0 "US_CR_LIN_MODE,Control Register"
|
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bitfld.long 0x0 21. "LINWKUP,Send LIN Wakeup Signal" "0,1"
|
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newline
|
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bitfld.long 0x0 20. "LINABT,Abort LIN Transmission" "0,1"
|
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newline
|
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bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0,1"
|
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newline
|
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bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
|
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newline
|
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bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
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newline
|
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bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
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group.long 0x4++0x3
|
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line.long 0x0 "US_MR_USART_MODE,Mode Register"
|
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bitfld.long 0x0 31. "ONEBIT,Start Frame Delimiter Selector" "0,1"
|
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newline
|
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bitfld.long 0x0 30. "MODSYNC,Manchester Synchronization Mode" "0,1"
|
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newline
|
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bitfld.long 0x0 29. "MAN,Manchester Encoder/Decoder Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 28. "FILTER,Receive Line Filter" "0,1"
|
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newline
|
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bitfld.long 0x0 24.--26. "MAX_ITERATION,Maximum Number of Automatic Iteration" "0,1,2,3,4,5,6,7"
|
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newline
|
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bitfld.long 0x0 23. "INVDATA,Inverted Data" "0,1"
|
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newline
|
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bitfld.long 0x0 22. "VAR_SYNC,Variable Synchronization of Command/Data Sync Start Frame Delimiter" "0,1"
|
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newline
|
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bitfld.long 0x0 21. "DSNACK,Disable Successive NACK" "0,1"
|
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newline
|
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bitfld.long 0x0 20. "INACK,Inhibit Non Acknowledge" "0,1"
|
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newline
|
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bitfld.long 0x0 19. "OVER,Oversampling Mode" "0,1"
|
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newline
|
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bitfld.long 0x0 18. "CLKO,Clock Output Select" "0,1"
|
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newline
|
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bitfld.long 0x0 17. "MODE9,9-bit Character Length" "0,1"
|
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newline
|
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bitfld.long 0x0 16. "MSBF,Bit Order" "0,1"
|
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newline
|
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bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic Echo. Receiver input is connected to..,2: Local Loopback. Transmitter output is connected..,3: Remote Loopback. RXD pin is internally connected.."
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newline
|
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bitfld.long 0x0 12.--13. "NBSTOP,Number of Stop Bits" "0: 1 stop bit,1: 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1),2: 2 stop bits,?"
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newline
|
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bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even parity,1: Odd parity,2: Parity forced to 0 (Space),3: Parity forced to 1 (Mark),4: No parity,?,6: Multidrop mode,?"
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newline
|
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bitfld.long 0x0 8. "SYNC,Synchronous Mode Select" "0,1"
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newline
|
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bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
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newline
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bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC programmable clock (PCK) is selected. If the..,3: Serial clock (SCK) is selected"
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newline
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hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
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group.long 0x4++0x3
|
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line.long 0x0 "US_MR_SPI_MODE,Mode Register"
|
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bitfld.long 0x0 20. "WRDBT,Wait Read Data Before Transfer" "0,1"
|
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newline
|
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bitfld.long 0x0 18. "CLKO,Clock Output Select" "0,1"
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newline
|
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bitfld.long 0x0 16. "CPOL,SPI Clock Polarity" "0,1"
|
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newline
|
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bitfld.long 0x0 8. "CPHA,SPI Clock Phase" "0,1"
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newline
|
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bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
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newline
|
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bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC programmable clock (PCK) is selected. If the..,3: Serial clock (SCK) is selected"
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newline
|
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hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
|
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wgroup.long 0x8++0x3
|
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line.long 0x0 "US_IER_USART_MODE,Interrupt Enable Register"
|
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bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Enable" "0,1"
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newline
|
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bitfld.long 0x0 18. "DCDIC,Data Carrier Detect Input Change Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 17. "DSRIC,Data Set Ready Input Change Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 16. "RIIC,Ring Indicator Input Change Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 10. "ITER,Max number of Repetitions Reached Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
|
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wgroup.long 0x8++0x3
|
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line.long 0x0 "US_IER_SPI_MODE,Interrupt Enable Register"
|
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bitfld.long 0x0 19. "NSSE,NSS Line (Driving CTS Pin) Rising or Falling Edge Event" "0,1"
|
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newline
|
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bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
|
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wgroup.long 0x8++0x3
|
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line.long 0x0 "US_IER_LIN_MODE,Interrupt Enable Register"
|
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bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "LINSNRE,LIN Slave Not Responding Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
|
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wgroup.long 0x8++0x7
|
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line.long 0x0 "US_IER_LON_MODE,Interrupt Enable Register"
|
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bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Enable" "0,1"
|
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newline
|
|
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
|
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newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
|
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line.long 0x4 "US_IDR_USART_MODE,Interrupt Disable Register"
|
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bitfld.long 0x4 24. "MANE,Manchester Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "DCDIC,Data Carrier Detect Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "DSRIC,Data Set Ready Input Change Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "RIIC,Ring Indicator Input Change Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached Interrupt Disable" "0,1"
|
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newline
|
|
bitfld.long 0x4 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Parity Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "FRAME,Framing Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "RXBRK,Receiver Break Interrupt Disable" "0,1"
|
|
newline
|
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bitfld.long 0x4 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
|
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wgroup.long 0xC++0x3
|
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line.long 0x0 "US_IDR_SPI_MODE,Interrupt Disable Register"
|
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bitfld.long 0x0 19. "NSSE,NSS Line (Driving CTS Pin) Rising or Falling Edge Event" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,SPI Underrun Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
|
|
wgroup.long 0xC++0x3
|
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line.long 0x0 "US_IDR_LIN_MODE,Interrupt Disable Register"
|
|
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "LINSNRE,LIN Slave Not Responding Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "US_IDR_LON_MODE,Interrupt Disable Register"
|
|
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,SPI Underrun Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "US_IMR_USART_MODE,Interrupt Mask Register"
|
|
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "DCDIC,Data Carrier Detect Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "DSRIC,Data Set Ready Input Change Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "RIIC,Ring Indicator Input Change Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "ITER,Max Number of Repetitions Reached Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
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bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
|
|
newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "US_IMR_SPI_MODE,Interrupt Mask Register"
|
|
bitfld.long 0x0 19. "NSSE,NSS Line (Driving CTS Pin) Rising or Falling Edge Event" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,SPI Underrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "US_IMR_LIN_MODE,Interrupt Mask Register"
|
|
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "LINSNRE,LIN Slave Not Responding Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
|
|
newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "US_IMR_LON_MODE,Interrupt Mask Register"
|
|
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,SPI Underrun Error Interrupt Mask" "0,1"
|
|
newline
|
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bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
|
|
newline
|
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bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Mask" "0,1"
|
|
newline
|
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bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Mask" "0,1"
|
|
newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
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newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
|
|
newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
|
|
line.long 0x4 "US_CSR_USART_MODE,Channel Status Register"
|
|
bitfld.long 0x4 24. "MANERR,Manchester Error (cleared by writing a one to the bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "CTS,Image of CTS Input" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "DCD,Image of DCD Input" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "DSR,Image of DSR Input" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "RI,Image of RI Input" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Flag (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "DCDIC,Data Carrier Detect Input Change Flag (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "DSRIC,Data Set Ready Input Change Flag (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "RIIC,Ring Indicator Input Change Flag (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt (cleared by writing a one to bit US_CR.RSTNACK)" "0,1"
|
|
newline
|
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bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached (cleared by writing a one to bit US_CR.RSTIT)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "TIMEOUT,Receiver Timeout (cleared by writing a one to bit US_CR.STTTO)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Parity Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "FRAME,Framing Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "RXBRK,Break Received/End of Break (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "TXRDY,Transmitter Ready (cleared by writing US_THR)" "0,1"
|
|
newline
|
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bitfld.long 0x4 0. "RXRDY,Receiver Ready (cleared by reading US_RHR)" "0,1"
|
|
rgroup.long 0x14++0x3
|
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line.long 0x0 "US_CSR_SPI_MODE,Channel Status Register"
|
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bitfld.long 0x0 23. "NSS,Image of NSS Line" "0,1"
|
|
newline
|
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bitfld.long 0x0 19. "NSSE,NSS Line (Driving CTS Pin) Rising or Falling Edge Event" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,SPI Underrun Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading US_RHR)" "0,1"
|
|
rgroup.long 0x14++0x3
|
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line.long 0x0 "US_CSR_LIN_MODE,Channel Status Register"
|
|
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "LINSNRE,LIN Slave Not Responding Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "LINCE,LIN Checksum Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error" "0,1"
|
|
newline
|
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bitfld.long 0x0 25. "LINBE,LIN Bus Error" "0,1"
|
|
newline
|
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bitfld.long 0x0 23. "LINBLS,LIN Bus Line Status" "0,1"
|
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newline
|
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bitfld.long 0x0 15. "LINTC,LIN Transfer Completed" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing US_THR)" "0,1"
|
|
newline
|
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bitfld.long 0x0 8. "TIMEOUT,Receiver Timeout (cleared by writing a one to bit US_CR.STTTO)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FRAME,Framing Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading US_RHR)" "0,1"
|
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rgroup.long 0x14++0x7
|
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line.long 0x0 "US_CSR_LON_MODE,Channel Status Register"
|
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bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error" "0,1"
|
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newline
|
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bitfld.long 0x0 27. "LRXD,LON Reception End Flag" "0,1"
|
|
newline
|
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bitfld.long 0x0 26. "LFET,LON Frame Early Termination" "0,1"
|
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newline
|
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bitfld.long 0x0 25. "LCOL,LON Collision Detected Flag" "0,1"
|
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newline
|
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bitfld.long 0x0 24. "LTXD,LON Transmission End Flag" "0,1"
|
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newline
|
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bitfld.long 0x0 10. "UNRE,Underrun Error" "0,1"
|
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newline
|
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bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing US_THR)" "0,1"
|
|
newline
|
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bitfld.long 0x0 7. "LCRCE,LON CRC Error" "0,1"
|
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newline
|
|
bitfld.long 0x0 6. "LSFE,LON Short Frame Error" "0,1"
|
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newline
|
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bitfld.long 0x0 5. "OVRE,Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
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bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing US_THR)" "0,1"
|
|
newline
|
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bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading US_RHR)" "0,1"
|
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line.long 0x4 "US_RHR,Receive Holding Register"
|
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bitfld.long 0x4 15. "RXSYNH,Received Sync" "0,1"
|
|
newline
|
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hexmask.long.word 0x4 0.--8. 1. "RXCHR,Received Character"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "US_THR,Transmit Holding Register"
|
|
bitfld.long 0x0 15. "TXSYNH,Sync Field to be Transmitted" "0,1"
|
|
newline
|
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hexmask.long.word 0x0 0.--8. 1. "TXCHR,Character to be Transmitted"
|
|
group.long 0x20++0xB
|
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line.long 0x0 "US_BRGR,Baud Rate Generator Register"
|
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bitfld.long 0x0 16.--18. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
newline
|
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hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divider"
|
|
line.long 0x4 "US_RTOR,Receiver Timeout Register"
|
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hexmask.long.tbyte 0x4 0.--16. 1. "TO,Timeout Value"
|
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line.long 0x8 "US_TTGR_USART_MODE,Transmitter Timeguard Register"
|
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hexmask.long.byte 0x8 0.--7. 1. "TG,Timeguard Value"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "US_TTGR_LON_MODE,Transmitter Timeguard Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "PCYCLE,LON PCYCLE Length"
|
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group.long 0x40++0x3
|
|
line.long 0x0 "US_FIDI_USART_MODE,FI DI Ratio Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "FI_DI_RATIO,FI Over DI Ratio Value"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "US_FIDI_LON_MODE,FI DI Ratio Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "BETA2,LON BETA2 Length"
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "US_NER,Number of Errors Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "NB_ERRORS,Number of Errors"
|
|
group.long 0x4C++0xF
|
|
line.long 0x0 "US_IF,IrDA Filter Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "IRDA_FILTER,IrDA Filter"
|
|
line.long 0x4 "US_MAN,Manchester Configuration Register"
|
|
bitfld.long 0x4 31. "RXIDLEV,Receiver Idle Value" "0,1"
|
|
newline
|
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bitfld.long 0x4 30. "DRIFT,Drift Compensation" "0,1"
|
|
newline
|
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bitfld.long 0x4 29. "ONE,Must Be Set to 1" "0,1"
|
|
newline
|
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bitfld.long 0x4 28. "RX_MPOL,Receiver Manchester Polarity" "0,1"
|
|
newline
|
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bitfld.long 0x4 24.--25. "RX_PP,Receiver Preamble Pattern detected" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
|
|
newline
|
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hexmask.long.byte 0x4 16.--19. 1. "RX_PL,Receiver Preamble Length"
|
|
newline
|
|
bitfld.long 0x4 12. "TX_MPOL,Transmitter Manchester Polarity" "0,1"
|
|
newline
|
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bitfld.long 0x4 8.--9. "TX_PP,Transmitter Preamble Pattern" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
|
|
newline
|
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hexmask.long.byte 0x4 0.--3. 1. "TX_PL,Transmitter Preamble Length"
|
|
line.long 0x8 "US_LINMR,LIN Mode Register"
|
|
bitfld.long 0x8 17. "SYNCDIS,Synchronization Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 16. "PDCM,DMAC Mode" "0,1"
|
|
newline
|
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hexmask.long.byte 0x8 8.--15. 1. "DLC,Data Length Control"
|
|
newline
|
|
bitfld.long 0x8 7. "WKUPTYP,Wakeup Signal Type" "0,1"
|
|
newline
|
|
bitfld.long 0x8 6. "FSDIS,Frame Slot Mode Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "DLM,Data Length Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x8 4. "CHKTYP,Checksum Type" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "CHKDIS,Checksum Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "PARDIS,Parity Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0.--1. "NACT,LIN Node Action" "0: The USART transmits the response.,1: The USART receives the response.,2: The USART does not transmit and does not receive..,?"
|
|
line.long 0xC "US_LINIR,LIN Identifier Register"
|
|
hexmask.long.byte 0xC 0.--7. 1. "IDCHR,Identifier Character"
|
|
rgroup.long 0x5C++0x3
|
|
line.long 0x0 "US_LINBRR,LIN Baud Rate Register"
|
|
bitfld.long 0x0 16.--18. "LINFP,Fractional Part after Synchronization" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "LINCD,Clock Divider after Synchronization"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "US_LONMR,LON Mode Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "EOFS,End of Frame Condition Size"
|
|
newline
|
|
bitfld.long 0x0 5. "LCDS,LON Collision Detection Source" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "DMAM,LON DMA Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CDTAIL,LON Collision Detection on Frame Tail" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TCOL,Terminate Frame upon Collision Notification" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "COLDET,LON Collision Detection Feature" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "COMMT,LON comm_type Parameter Value" "0,1"
|
|
line.long 0x4 "US_LONPR,LON Preamble Register"
|
|
hexmask.long.word 0x4 0.--13. 1. "LONPL,LON Preamble Length"
|
|
line.long 0x8 "US_LONDL,LON Data Length Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "LONDL,LON Data Length"
|
|
line.long 0xC "US_LONL2HDR,LON L2HDR Register"
|
|
bitfld.long 0xC 7. "PB,LON Priority Bit" "0,1"
|
|
newline
|
|
bitfld.long 0xC 6. "ALTP,LON Alternate Path Bit" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--5. 1. "BLI,LON Backlog Increment"
|
|
rgroup.long 0x70++0x3
|
|
line.long 0x0 "US_LONBL,LON Backlog Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "LONBL,LON Node Backlog Value"
|
|
group.long 0x74++0x17
|
|
line.long 0x0 "US_LONB1TX,LON Beta1 Tx Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "BETA1TX,LON Beta1 Length after Transmission"
|
|
line.long 0x4 "US_LONB1RX,LON Beta1 Rx Register"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "BETA1RX,LON Beta1 Length after Reception"
|
|
line.long 0x8 "US_LONPRIO,LON Priority Register"
|
|
hexmask.long.byte 0x8 8.--14. 1. "NPS,LON Node Priority Slot"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "PSNB,LON Priority Slot Number"
|
|
line.long 0xC "US_IDTTX,LON IDT Tx Register"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. "IDTTX,LON Indeterminate Time after Transmission (comm_type = 1 mode only)"
|
|
line.long 0x10 "US_IDTRX,LON IDT Rx Register"
|
|
hexmask.long.tbyte 0x10 0.--23. 1. "IDTRX,LON Indeterminate Time after Reception (comm_type = 1 mode only)"
|
|
line.long 0x14 "US_ICDIFF,IC DIFF Register"
|
|
hexmask.long.byte 0x14 0.--3. 1. "ICDIFF,IC Differentiator Number"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "US_WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
newline
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "US_WPSR,Write Protection Status Register"
|
|
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
|
|
newline
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("PIC32CZ2051MC70100")||cpuis("PIC32CZ2051MC70144"))
|
|
tree "USART2"
|
|
base ad:0x4002C000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "US_CR_USART_MODE,Control Register"
|
|
bitfld.long 0x0 19. "RTSDIS,Request to Send Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "RTSEN,Request to Send Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "DTRDIS,Data Terminal Ready Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "DTREN,Data Terminal Ready Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "RETTO,Start Timeout Immediately" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "RSTNACK,Reset Non Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "RSTIT,Reset Iterations" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "SENDA,Send Address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "STTTO,Clear TIMEOUT Flag and Start Timeout After Next Character Received" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "STPBRK,Stop Break" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "STTBRK,Start Break" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "US_CR_SPI_MODE,Control Register"
|
|
bitfld.long 0x0 19. "RCS,Release SPI Chip Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "FCS,Force SPI Chip Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "US_CR_LIN_MODE,Control Register"
|
|
bitfld.long 0x0 21. "LINWKUP,Send LIN Wakeup Signal" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "LINABT,Abort LIN Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "RSTSTA,Reset Status Bits" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TXDIS,Transmitter Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXDIS,Receiver Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXEN,Receiver Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RSTTX,Reset Transmitter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RSTRX,Reset Receiver" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "US_MR_USART_MODE,Mode Register"
|
|
bitfld.long 0x0 31. "ONEBIT,Start Frame Delimiter Selector" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "MODSYNC,Manchester Synchronization Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "MAN,Manchester Encoder/Decoder Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "FILTER,Receive Line Filter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24.--26. "MAX_ITERATION,Maximum Number of Automatic Iteration" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 23. "INVDATA,Inverted Data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "VAR_SYNC,Variable Synchronization of Command/Data Sync Start Frame Delimiter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "DSNACK,Disable Successive NACK" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "INACK,Inhibit Non Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "OVER,Oversampling Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "CLKO,Clock Output Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "MODE9,9-bit Character Length" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "MSBF,Bit Order" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "CHMODE,Channel Mode" "0: Normal mode,1: Automatic Echo. Receiver input is connected to..,2: Local Loopback. Transmitter output is connected..,3: Remote Loopback. RXD pin is internally connected.."
|
|
newline
|
|
bitfld.long 0x0 12.--13. "NBSTOP,Number of Stop Bits" "0: 1 stop bit,1: 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1),2: 2 stop bits,?"
|
|
newline
|
|
bitfld.long 0x0 9.--11. "PAR,Parity Type" "0: Even parity,1: Odd parity,2: Parity forced to 0 (Space),3: Parity forced to 1 (Mark),4: No parity,?,6: Multidrop mode,?"
|
|
newline
|
|
bitfld.long 0x0 8. "SYNC,Synchronous Mode Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC programmable clock (PCK) is selected. If the..,3: Serial clock (SCK) is selected"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "US_MR_SPI_MODE,Mode Register"
|
|
bitfld.long 0x0 20. "WRDBT,Wait Read Data Before Transfer" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "CLKO,Clock Output Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "CPOL,SPI Clock Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "CPHA,SPI Clock Phase" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "CHRL,Character Length" "0: Character length is 5 bits,1: Character length is 6 bits,2: Character length is 7 bits,3: Character length is 8 bits"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "USCLKS,Clock Selection" "0: Peripheral clock is selected,1: Peripheral clock divided (DIV = 8) is selected,2: PMC programmable clock (PCK) is selected. If the..,3: Serial clock (SCK) is selected"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "USART_MODE,USART Mode of Operation"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "US_IER_USART_MODE,Interrupt Enable Register"
|
|
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "DCDIC,Data Carrier Detect Input Change Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "DSRIC,Data Set Ready Input Change Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "RIIC,Ring Indicator Input Change Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "ITER,Max number of Repetitions Reached Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "US_IER_SPI_MODE,Interrupt Enable Register"
|
|
bitfld.long 0x0 19. "NSSE,NSS Line (Driving CTS Pin) Rising or Falling Edge Event" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "US_IER_LIN_MODE,Interrupt Enable Register"
|
|
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "LINSNRE,LIN Slave Not Responding Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
|
|
wgroup.long 0x8++0x7
|
|
line.long 0x0 "US_IER_LON_MODE,Interrupt Enable Register"
|
|
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,Underrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Enable" "0,1"
|
|
line.long 0x4 "US_IDR_USART_MODE,Interrupt Disable Register"
|
|
bitfld.long 0x4 24. "MANE,Manchester Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "DCDIC,Data Carrier Detect Input Change Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "DSRIC,Data Set Ready Input Change Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "RIIC,Ring Indicator Input Change Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Parity Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "FRAME,Framing Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "RXBRK,Receiver Break Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "US_IDR_SPI_MODE,Interrupt Disable Register"
|
|
bitfld.long 0x0 19. "NSSE,NSS Line (Driving CTS Pin) Rising or Falling Edge Event" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,SPI Underrun Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "US_IDR_LIN_MODE,Interrupt Disable Register"
|
|
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "LINSNRE,LIN Slave Not Responding Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x0 "US_IDR_LON_MODE,Interrupt Disable Register"
|
|
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,SPI Underrun Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Disable" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "US_IMR_USART_MODE,Interrupt Mask Register"
|
|
bitfld.long 0x0 24. "MANE,Manchester Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "CTSIC,Clear to Send Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "DCDIC,Data Carrier Detect Input Change Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "DSRIC,Data Set Ready Input Change Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "RIIC,Ring Indicator Input Change Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "NACK,Non Acknowledge Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "ITER,Max Number of Repetitions Reached Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXBRK,Receiver Break Interrupt Mask" "0,1"
|
|
newline
|
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bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
|
|
newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "US_IMR_SPI_MODE,Interrupt Mask Register"
|
|
bitfld.long 0x0 19. "NSSE,NSS Line (Driving CTS Pin) Rising or Falling Edge Event" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,SPI Underrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "US_IMR_LIN_MODE,Interrupt Mask Register"
|
|
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "LINSNRE,LIN Slave Not Responding Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "LINCE,LIN Checksum Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LINBE,LIN Bus Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "TIMEOUT,Timeout Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FRAME,Framing Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
|
|
newline
|
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bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "US_IMR_LON_MODE,Interrupt Mask Register"
|
|
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LRXD,LON Reception Done Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LFET,LON Frame Early Termination Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LCOL,LON Collision Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "LTXD,LON Transmission Done Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,SPI Underrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,TXEMPTY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "LCRCE,LON CRC Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LSFE,LON Short Frame Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,TXRDY Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,RXRDY Interrupt Mask" "0,1"
|
|
line.long 0x4 "US_CSR_USART_MODE,Channel Status Register"
|
|
bitfld.long 0x4 24. "MANERR,Manchester Error (cleared by writing a one to the bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "CTS,Image of CTS Input" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "DCD,Image of DCD Input" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "DSR,Image of DSR Input" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "RI,Image of RI Input" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CTSIC,Clear to Send Input Change Flag (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "DCDIC,Data Carrier Detect Input Change Flag (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "DSRIC,Data Set Ready Input Change Flag (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "RIIC,Ring Indicator Input Change Flag (cleared on read)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "NACK,Non Acknowledge Interrupt (cleared by writing a one to bit US_CR.RSTNACK)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "ITER,Max Number of Repetitions Reached (cleared by writing a one to bit US_CR.RSTIT)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "TXEMPTY,Transmitter Empty (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "TIMEOUT,Receiver Timeout (cleared by writing a one to bit US_CR.STTTO)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PARE,Parity Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "FRAME,Framing Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OVRE,Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "RXBRK,Break Received/End of Break (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "TXRDY,Transmitter Ready (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXRDY,Receiver Ready (cleared by reading US_RHR)" "0,1"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "US_CSR_SPI_MODE,Channel Status Register"
|
|
bitfld.long 0x0 23. "NSS,Image of NSS Line" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "NSSE,NSS Line (Driving CTS Pin) Rising or Falling Edge Event" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,SPI Underrun Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading US_RHR)" "0,1"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "US_CSR_LIN_MODE,Channel Status Register"
|
|
bitfld.long 0x0 31. "LINHTE,LIN Header Timeout Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "LINSTE,LIN Synch Tolerance Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "LINSNRE,LIN Slave Not Responding Error Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "LINCE,LIN Checksum Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LINIPE,LIN Identifier Parity Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LINISFE,LIN Inconsistent Synch Field Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LINBE,LIN Bus Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "LINBLS,LIN Bus Line Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "LINTC,LIN Transfer Completed" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "LINID,LIN Identifier Sent or LIN Identifier Received" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "LINBK,LIN Break Sent or LIN Break Received" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "TIMEOUT,Receiver Timeout (cleared by writing a one to bit US_CR.STTTO)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PARE,Parity Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FRAME,Framing Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading US_RHR)" "0,1"
|
|
rgroup.long 0x14++0x7
|
|
line.long 0x0 "US_CSR_LON_MODE,Channel Status Register"
|
|
bitfld.long 0x0 28. "LBLOVFE,LON Backlog Overflow Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "LRXD,LON Reception End Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "LFET,LON Frame Early Termination" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "LCOL,LON Collision Detected Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "LTXD,LON Transmission End Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "UNRE,Underrun Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TXEMPTY,Transmitter Empty (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "LCRCE,LON CRC Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LSFE,LON Short Frame Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVRE,Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXRDY,Transmitter Ready (cleared by writing US_THR)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXRDY,Receiver Ready (cleared by reading US_RHR)" "0,1"
|
|
line.long 0x4 "US_RHR,Receive Holding Register"
|
|
bitfld.long 0x4 15. "RXSYNH,Received Sync" "0,1"
|
|
newline
|
|
hexmask.long.word 0x4 0.--8. 1. "RXCHR,Received Character"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "US_THR,Transmit Holding Register"
|
|
bitfld.long 0x0 15. "TXSYNH,Sync Field to be Transmitted" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--8. 1. "TXCHR,Character to be Transmitted"
|
|
group.long 0x20++0xB
|
|
line.long 0x0 "US_BRGR,Baud Rate Generator Register"
|
|
bitfld.long 0x0 16.--18. "FP,Fractional Part" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "CD,Clock Divider"
|
|
line.long 0x4 "US_RTOR,Receiver Timeout Register"
|
|
hexmask.long.tbyte 0x4 0.--16. 1. "TO,Timeout Value"
|
|
line.long 0x8 "US_TTGR_USART_MODE,Transmitter Timeguard Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "TG,Timeguard Value"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "US_TTGR_LON_MODE,Transmitter Timeguard Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "PCYCLE,LON PCYCLE Length"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "US_FIDI_USART_MODE,FI DI Ratio Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "FI_DI_RATIO,FI Over DI Ratio Value"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "US_FIDI_LON_MODE,FI DI Ratio Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "BETA2,LON BETA2 Length"
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "US_NER,Number of Errors Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "NB_ERRORS,Number of Errors"
|
|
group.long 0x4C++0xF
|
|
line.long 0x0 "US_IF,IrDA Filter Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "IRDA_FILTER,IrDA Filter"
|
|
line.long 0x4 "US_MAN,Manchester Configuration Register"
|
|
bitfld.long 0x4 31. "RXIDLEV,Receiver Idle Value" "0,1"
|
|
newline
|
|
bitfld.long 0x4 30. "DRIFT,Drift Compensation" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "ONE,Must Be Set to 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "RX_MPOL,Receiver Manchester Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24.--25. "RX_PP,Receiver Preamble Pattern detected" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
|
|
newline
|
|
hexmask.long.byte 0x4 16.--19. 1. "RX_PL,Receiver Preamble Length"
|
|
newline
|
|
bitfld.long 0x4 12. "TX_MPOL,Transmitter Manchester Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "TX_PP,Transmitter Preamble Pattern" "0: The preamble is composed of '1's,1: The preamble is composed of '0's,2: The preamble is composed of '01's,3: The preamble is composed of '10's"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--3. 1. "TX_PL,Transmitter Preamble Length"
|
|
line.long 0x8 "US_LINMR,LIN Mode Register"
|
|
bitfld.long 0x8 17. "SYNCDIS,Synchronization Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 16. "PDCM,DMAC Mode" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--15. 1. "DLC,Data Length Control"
|
|
newline
|
|
bitfld.long 0x8 7. "WKUPTYP,Wakeup Signal Type" "0,1"
|
|
newline
|
|
bitfld.long 0x8 6. "FSDIS,Frame Slot Mode Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "DLM,Data Length Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x8 4. "CHKTYP,Checksum Type" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "CHKDIS,Checksum Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "PARDIS,Parity Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0.--1. "NACT,LIN Node Action" "0: The USART transmits the response.,1: The USART receives the response.,2: The USART does not transmit and does not receive..,?"
|
|
line.long 0xC "US_LINIR,LIN Identifier Register"
|
|
hexmask.long.byte 0xC 0.--7. 1. "IDCHR,Identifier Character"
|
|
rgroup.long 0x5C++0x3
|
|
line.long 0x0 "US_LINBRR,LIN Baud Rate Register"
|
|
bitfld.long 0x0 16.--18. "LINFP,Fractional Part after Synchronization" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "LINCD,Clock Divider after Synchronization"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "US_LONMR,LON Mode Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "EOFS,End of Frame Condition Size"
|
|
newline
|
|
bitfld.long 0x0 5. "LCDS,LON Collision Detection Source" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "DMAM,LON DMA Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CDTAIL,LON Collision Detection on Frame Tail" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TCOL,Terminate Frame upon Collision Notification" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "COLDET,LON Collision Detection Feature" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "COMMT,LON comm_type Parameter Value" "0,1"
|
|
line.long 0x4 "US_LONPR,LON Preamble Register"
|
|
hexmask.long.word 0x4 0.--13. 1. "LONPL,LON Preamble Length"
|
|
line.long 0x8 "US_LONDL,LON Data Length Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "LONDL,LON Data Length"
|
|
line.long 0xC "US_LONL2HDR,LON L2HDR Register"
|
|
bitfld.long 0xC 7. "PB,LON Priority Bit" "0,1"
|
|
newline
|
|
bitfld.long 0xC 6. "ALTP,LON Alternate Path Bit" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--5. 1. "BLI,LON Backlog Increment"
|
|
rgroup.long 0x70++0x3
|
|
line.long 0x0 "US_LONBL,LON Backlog Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "LONBL,LON Node Backlog Value"
|
|
group.long 0x74++0x17
|
|
line.long 0x0 "US_LONB1TX,LON Beta1 Tx Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "BETA1TX,LON Beta1 Length after Transmission"
|
|
line.long 0x4 "US_LONB1RX,LON Beta1 Rx Register"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "BETA1RX,LON Beta1 Length after Reception"
|
|
line.long 0x8 "US_LONPRIO,LON Priority Register"
|
|
hexmask.long.byte 0x8 8.--14. 1. "NPS,LON Node Priority Slot"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "PSNB,LON Priority Slot Number"
|
|
line.long 0xC "US_IDTTX,LON IDT Tx Register"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. "IDTTX,LON Indeterminate Time after Transmission (comm_type = 1 mode only)"
|
|
line.long 0x10 "US_IDTRX,LON IDT Rx Register"
|
|
hexmask.long.tbyte 0x10 0.--23. 1. "IDTRX,LON Indeterminate Time after Reception (comm_type = 1 mode only)"
|
|
line.long 0x14 "US_ICDIFF,IC DIFF Register"
|
|
hexmask.long.byte 0x14 0.--3. 1. "ICDIFF,IC Differentiator Number"
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "US_WPMR,Write Protection Mode Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key"
|
|
newline
|
|
bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1"
|
|
rgroup.long 0xE8++0x3
|
|
line.long 0x0 "US_WPSR,Write Protection Status Register"
|
|
hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source"
|
|
newline
|
|
bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1"
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "USBHS (USB High-Speed Interface)"
|
|
base ad:0x40038000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "DEVCTRL,Device General Control Register"
|
|
bitfld.long 0x0 16. "OPMODE2,Specific Operational mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TSTPCKT,Test packet mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "TSTK,Test mode K" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "TSTJ,Test mode J" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "LS,Low-Speed Mode Force" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "SPDCONF,Mode Configuration" "0: The peripheral starts in Full-speed mode and..,1: For a better consumption if high speed is not..,2: Forced high speed.,3: The peripheral remains in Full-speed mode.."
|
|
newline
|
|
bitfld.long 0x0 9. "RMWKUP,Remote Wake-Up" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "DETACH,Detach" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "ADDEN,Address Enable" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "UADD,USB Address"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "DEVISR,Device Global Interrupt Status Register"
|
|
bitfld.long 0x0 31. "DMA_7,DMA Channel 7 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "DMA_6,DMA Channel 6 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "DMA_5,DMA Channel 5 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "DMA_4,DMA Channel 4 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "DMA_3,DMA Channel 3 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "DMA_2,DMA Channel 2 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "DMA_1,DMA Channel 1 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "PEP_9,Endpoint 9 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "PEP_8,Endpoint 8 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "PEP_7,Endpoint 7 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "PEP_6,Endpoint 6 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "PEP_5,Endpoint 5 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PEP_4,Endpoint 4 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "PEP_3,Endpoint 3 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "PEP_2,Endpoint 2 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "PEP_1,Endpoint 1 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "PEP_0,Endpoint 0 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "UPRSM,Upstream Resume Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "EORSM,End of Resume Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "WAKEUP,Wake-Up Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EORST,End of Reset Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "SOF,Start of Frame Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "MSOF,Micro Start of Frame Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SUSP,Suspend Interrupt" "0,1"
|
|
wgroup.long 0x8++0x7
|
|
line.long 0x0 "DEVICR,Device Global Interrupt Clear Register"
|
|
bitfld.long 0x0 6. "UPRSMC,Upstream Resume Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "EORSMC,End of Resume Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "WAKEUPC,Wake-Up Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EORSTC,End of Reset Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "SOFC,Start of Frame Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "MSOFC,Micro Start of Frame Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SUSPC,Suspend Interrupt Clear" "0,1"
|
|
line.long 0x4 "DEVIFR,Device Global Interrupt Set Register"
|
|
bitfld.long 0x4 31. "DMA_7,DMA Channel 7 Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 30. "DMA_6,DMA Channel 6 Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "DMA_5,DMA Channel 5 Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "DMA_4,DMA Channel 4 Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "DMA_3,DMA Channel 3 Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 26. "DMA_2,DMA Channel 2 Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "DMA_1,DMA Channel 1 Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "UPRSMS,Upstream Resume Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "EORSMS,End of Resume Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "WAKEUPS,Wake-Up Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "EORSTS,End of Reset Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SOFS,Start of Frame Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "MSOFS,Micro Start of Frame Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SUSPS,Suspend Interrupt Set" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "DEVIMR,Device Global Interrupt Mask Register"
|
|
bitfld.long 0x0 31. "DMA_7,DMA Channel 7 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "DMA_6,DMA Channel 6 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "DMA_5,DMA Channel 5 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "DMA_4,DMA Channel 4 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "DMA_3,DMA Channel 3 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "DMA_2,DMA Channel 2 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "DMA_1,DMA Channel 1 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "PEP_9,Endpoint 9 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "PEP_8,Endpoint 8 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "PEP_7,Endpoint 7 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "PEP_6,Endpoint 6 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "PEP_5,Endpoint 5 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PEP_4,Endpoint 4 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "PEP_3,Endpoint 3 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "PEP_2,Endpoint 2 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "PEP_1,Endpoint 1 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "PEP_0,Endpoint 0 Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "UPRSME,Upstream Resume Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "EORSME,End of Resume Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "WAKEUPE,Wake-Up Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EORSTE,End of Reset Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "SOFE,Start of Frame Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "MSOFE,Micro Start of Frame Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SUSPE,Suspend Interrupt Mask" "0,1"
|
|
wgroup.long 0x14++0x7
|
|
line.long 0x0 "DEVIDR,Device Global Interrupt Disable Register"
|
|
bitfld.long 0x0 31. "DMA_7,DMA Channel 7 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "DMA_6,DMA Channel 6 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "DMA_5,DMA Channel 5 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "DMA_4,DMA Channel 4 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "DMA_3,DMA Channel 3 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "DMA_2,DMA Channel 2 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "DMA_1,DMA Channel 1 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "PEP_9,Endpoint 9 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "PEP_8,Endpoint 8 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "PEP_7,Endpoint 7 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "PEP_6,Endpoint 6 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "PEP_5,Endpoint 5 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PEP_4,Endpoint 4 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "PEP_3,Endpoint 3 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "PEP_2,Endpoint 2 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "PEP_1,Endpoint 1 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "PEP_0,Endpoint 0 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "UPRSMEC,Upstream Resume Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "EORSMEC,End of Resume Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "WAKEUPEC,Wake-Up Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EORSTEC,End of Reset Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "SOFEC,Start of Frame Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "MSOFEC,Micro Start of Frame Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SUSPEC,Suspend Interrupt Disable" "0,1"
|
|
line.long 0x4 "DEVIER,Device Global Interrupt Enable Register"
|
|
bitfld.long 0x4 31. "DMA_7,DMA Channel 7 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 30. "DMA_6,DMA Channel 6 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "DMA_5,DMA Channel 5 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "DMA_4,DMA Channel 4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "DMA_3,DMA Channel 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 26. "DMA_2,DMA Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "DMA_1,DMA Channel 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "PEP_9,Endpoint 9 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "PEP_8,Endpoint 8 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "PEP_7,Endpoint 7 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "PEP_6,Endpoint 6 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "PEP_5,Endpoint 5 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "PEP_4,Endpoint 4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "PEP_3,Endpoint 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "PEP_2,Endpoint 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "PEP_1,Endpoint 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "PEP_0,Endpoint 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "UPRSMES,Upstream Resume Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "EORSMES,End of Resume Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "WAKEUPES,Wake-Up Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "EORSTES,End of Reset Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SOFES,Start of Frame Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "MSOFES,Micro Start of Frame Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SUSPES,Suspend Interrupt Enable" "0,1"
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "DEVEPT,Device Endpoint Register"
|
|
bitfld.long 0x0 25. "EPRST9,Endpoint 9 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "EPRST8,Endpoint 8 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "EPRST7,Endpoint 7 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "EPRST6,Endpoint 6 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "EPRST5,Endpoint 5 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "EPRST4,Endpoint 4 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "EPRST3,Endpoint 3 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "EPRST2,Endpoint 2 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "EPRST1,Endpoint 1 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "EPRST0,Endpoint 0 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "EPEN9,Endpoint 9 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "EPEN8,Endpoint 8 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "EPEN7,Endpoint 7 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "EPEN6,Endpoint 6 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "EPEN5,Endpoint 5 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "EPEN4,Endpoint 4 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EPEN3,Endpoint 3 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "EPEN2,Endpoint 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "EPEN1,Endpoint 1 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EPEN0,Endpoint 0 Enable" "0,1"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "DEVFNUM,Device Frame Number Register"
|
|
bitfld.long 0x0 15. "FNCERR,Frame Number CRC Error" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 3.--13. 1. "FNUM,Frame Number"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "MFNUM,Micro Frame Number" "0,1,2,3,4,5,6,7"
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x100)++0x3
|
|
line.long 0x0 "DEVEPTCFG[$1],Device Endpoint Configuration Register"
|
|
bitfld.long 0x0 13.--14. "NBTRANS,Number of transactions per microframe for isochronous endpoint" "0: Reserved to endpoint that does not have the..,1: Default value: one transaction per microframe.,2: Two transactions per microframe. This endpoint..,3: Three transactions per microframe. This endpoint.."
|
|
newline
|
|
bitfld.long 0x0 11.--12. "EPTYPE,Endpoint Type" "0: Control,1: Isochronous,2: Bulk,3: Interrupt"
|
|
newline
|
|
bitfld.long 0x0 9. "AUTOSW,Automatic Switch" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "EPDIR,Endpoint Direction" "0: The endpoint direction is OUT.,1: The endpoint direction is IN (nor for control.."
|
|
newline
|
|
bitfld.long 0x0 4.--6. "EPSIZE,Endpoint Size" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes,4: 128 bytes,5: 256 bytes,6: 512 bytes,7: 1024 bytes"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "EPBK,Endpoint Banks" "0: Single-bank endpoint,1: Double-bank endpoint,2: Triple-bank endpoint,?"
|
|
newline
|
|
bitfld.long 0x0 1. "ALLOC,Endpoint Memory Allocate" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x130)++0x3
|
|
line.long 0x0 "DEVEPTISR_CTRL_MODE[$1],Device Endpoint Interrupt Status Register"
|
|
hexmask.long.word 0x0 20.--30. 1. "BYCT,Byte Count"
|
|
newline
|
|
bitfld.long 0x0 18. "CFGOK,Configuration OK Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CTRLDIR,Control Direction" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "RWALL,Read/Write Allowed" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "CURRBK,Current Bank" "0: Current bank is bank0,1: Current bank is bank1,2: Current bank is bank2,?"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "NBUSYBK,Number of Busy Banks" "0: 0 busy bank (all banks free),1: 1 busy bank,2: 2 busy banks,3: 3 busy banks"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "DTSEQ,Data Toggle Sequence" "0: Data0 toggle sequence,1: Data1 toggle sequence,2: Reserved for high-bandwidth isochronous endpoint,3: Reserved for high-bandwidth isochronous endpoint"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKET,Short Packet Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "STALLEDI,STALLed Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFI,Overflow Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKINI,NAKed IN Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NAKOUTI,NAKed OUT Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXSTPI,Received SETUP Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTI,Received OUT Data Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINI,Transmitted IN Data Interrupt" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x130)++0x3
|
|
line.long 0x0 "DEVEPTISR_ISO_MODE[$1],Device Endpoint Interrupt Status Register"
|
|
hexmask.long.word 0x0 20.--30. 1. "BYCT,Byte Count"
|
|
newline
|
|
bitfld.long 0x0 18. "CFGOK,Configuration OK Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "RWALL,Read/Write Allowed" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "CURRBK,Current Bank" "0: Current bank is bank0,1: Current bank is bank1,2: Current bank is bank2,?"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "NBUSYBK,Number of Busy Banks" "0: 0 busy bank (all banks free),1: 1 busy bank,2: 2 busy banks,3: 3 busy banks"
|
|
newline
|
|
bitfld.long 0x0 10. "ERRORTRANS,High-bandwidth Isochronous OUT Endpoint Transaction Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "DTSEQ,Data Toggle Sequence" "0: Data0 toggle sequence,1: Data1 toggle sequence,2: Reserved for high-bandwidth isochronous endpoint,3: Reserved for high-bandwidth isochronous endpoint"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKET,Short Packet Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "CRCERRI,CRC Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFI,Overflow Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "HBISOFLUSHI,High Bandwidth Isochronous IN Flush Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "HBISOINERRI,High Bandwidth Isochronous IN Underflow Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "UNDERFI,Underflow Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTI,Received OUT Data Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINI,Transmitted IN Data Interrupt" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x130)++0x3
|
|
line.long 0x0 "DEVEPTISR_BLK_MODE[$1],Device Endpoint Interrupt Status Register"
|
|
hexmask.long.word 0x0 20.--30. 1. "BYCT,Byte Count"
|
|
newline
|
|
bitfld.long 0x0 18. "CFGOK,Configuration OK Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CTRLDIR,Control Direction" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "RWALL,Read/Write Allowed" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "CURRBK,Current Bank" "0: Current bank is bank0,1: Current bank is bank1,2: Current bank is bank2,?"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "NBUSYBK,Number of Busy Banks" "0: 0 busy bank (all banks free),1: 1 busy bank,2: 2 busy banks,3: 3 busy banks"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "DTSEQ,Data Toggle Sequence" "0: Data0 toggle sequence,1: Data1 toggle sequence,2: Reserved for high-bandwidth isochronous endpoint,3: Reserved for high-bandwidth isochronous endpoint"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKET,Short Packet Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "STALLEDI,STALLed Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFI,Overflow Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKINI,NAKed IN Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NAKOUTI,NAKed OUT Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXSTPI,Received SETUP Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTI,Received OUT Data Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINI,Transmitted IN Data Interrupt" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x130)++0x3
|
|
line.long 0x0 "DEVEPTISR_INTRPT_MODE[$1],Device Endpoint Interrupt Status Register"
|
|
hexmask.long.word 0x0 20.--30. 1. "BYCT,Byte Count"
|
|
newline
|
|
bitfld.long 0x0 18. "CFGOK,Configuration OK Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "CTRLDIR,Control Direction" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "RWALL,Read/Write Allowed" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "CURRBK,Current Bank" "0: Current bank is bank0,1: Current bank is bank1,2: Current bank is bank2,?"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "NBUSYBK,Number of Busy Banks" "0: 0 busy bank (all banks free),1: 1 busy bank,2: 2 busy banks,3: 3 busy banks"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "DTSEQ,Data Toggle Sequence" "0: Data0 toggle sequence,1: Data1 toggle sequence,2: Reserved for high-bandwidth isochronous endpoint,3: Reserved for high-bandwidth isochronous endpoint"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKET,Short Packet Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "STALLEDI,STALLed Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFI,Overflow Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKINI,NAKed IN Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NAKOUTI,NAKed OUT Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXSTPI,Received SETUP Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTI,Received OUT Data Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINI,Transmitted IN Data Interrupt" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x160)++0x3
|
|
line.long 0x0 "DEVEPTICR_CTRL_MODE[$1],Device Endpoint Interrupt Clear Register"
|
|
bitfld.long 0x0 7. "SHORTPACKETC,Short Packet Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "STALLEDIC,STALLed Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIC,Overflow Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKINIC,NAKed IN Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NAKOUTIC,NAKed OUT Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXSTPIC,Received SETUP Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTIC,Received OUT Data Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINIC,Transmitted IN Data Interrupt Clear" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x160)++0x3
|
|
line.long 0x0 "DEVEPTICR_ISO_MODE[$1],Device Endpoint Interrupt Clear Register"
|
|
bitfld.long 0x0 7. "SHORTPACKETC,Short Packet Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "CRCERRIC,CRC Error Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIC,Overflow Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "HBISOFLUSHIC,High Bandwidth Isochronous IN Flush Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "HBISOINERRIC,High Bandwidth Isochronous IN Underflow Error Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "UNDERFIC,Underflow Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTIC,Received OUT Data Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINIC,Transmitted IN Data Interrupt Clear" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x160)++0x3
|
|
line.long 0x0 "DEVEPTICR_BLK_MODE[$1],Device Endpoint Interrupt Clear Register"
|
|
bitfld.long 0x0 7. "SHORTPACKETC,Short Packet Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "STALLEDIC,STALLed Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIC,Overflow Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKINIC,NAKed IN Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NAKOUTIC,NAKed OUT Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXSTPIC,Received SETUP Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTIC,Received OUT Data Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINIC,Transmitted IN Data Interrupt Clear" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x160)++0x3
|
|
line.long 0x0 "DEVEPTICR_INTRPT_MODE[$1],Device Endpoint Interrupt Clear Register"
|
|
bitfld.long 0x0 7. "SHORTPACKETC,Short Packet Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "STALLEDIC,STALLed Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIC,Overflow Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKINIC,NAKed IN Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NAKOUTIC,NAKed OUT Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXSTPIC,Received SETUP Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTIC,Received OUT Data Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINIC,Transmitted IN Data Interrupt Clear" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x190)++0x3
|
|
line.long 0x0 "DEVEPTIFR_CTRL_MODE[$1],Device Endpoint Interrupt Set Register"
|
|
bitfld.long 0x0 12. "NBUSYBKS,Number of Busy Banks Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETS,Short Packet Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "STALLEDIS,STALLed Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIS,Overflow Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKINIS,NAKed IN Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NAKOUTIS,NAKed OUT Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXSTPIS,Received SETUP Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTIS,Received OUT Data Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINIS,Transmitted IN Data Interrupt Set" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x190)++0x3
|
|
line.long 0x0 "DEVEPTIFR_ISO_MODE[$1],Device Endpoint Interrupt Set Register"
|
|
bitfld.long 0x0 12. "NBUSYBKS,Number of Busy Banks Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETS,Short Packet Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "CRCERRIS,CRC Error Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIS,Overflow Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "HBISOFLUSHIS,High Bandwidth Isochronous IN Flush Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "HBISOINERRIS,High Bandwidth Isochronous IN Underflow Error Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "UNDERFIS,Underflow Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTIS,Received OUT Data Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINIS,Transmitted IN Data Interrupt Set" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x190)++0x3
|
|
line.long 0x0 "DEVEPTIFR_BLK_MODE[$1],Device Endpoint Interrupt Set Register"
|
|
bitfld.long 0x0 12. "NBUSYBKS,Number of Busy Banks Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETS,Short Packet Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "STALLEDIS,STALLed Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIS,Overflow Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKINIS,NAKed IN Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NAKOUTIS,NAKed OUT Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXSTPIS,Received SETUP Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTIS,Received OUT Data Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINIS,Transmitted IN Data Interrupt Set" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x190)++0x3
|
|
line.long 0x0 "DEVEPTIFR_INTRPT_MODE[$1],Device Endpoint Interrupt Set Register"
|
|
bitfld.long 0x0 12. "NBUSYBKS,Number of Busy Banks Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETS,Short Packet Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "STALLEDIS,STALLed Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIS,Overflow Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKINIS,NAKed IN Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NAKOUTIS,NAKed OUT Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXSTPIS,Received SETUP Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTIS,Received OUT Data Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINIS,Transmitted IN Data Interrupt Set" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x1C0)++0x3
|
|
line.long 0x0 "DEVEPTIMR_CTRL_MODE[$1],Device Endpoint Interrupt Mask Register"
|
|
bitfld.long 0x0 19. "STALLRQ,STALL Request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "RSTDT,Reset Data Toggle" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "NYETDIS,NYET Token Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "EPDISHDMA,Endpoint Interrupts Disable HDMA Request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FIFOCON,FIFO Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "KILLBK,Kill IN Bank" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKE,Number of Busy Banks Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETE,Short Packet Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "STALLEDE,STALLed Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFE,Overflow Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKINE,NAKed IN Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NAKOUTE,NAKed OUT Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXSTPE,Received SETUP Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTE,Received OUT Data Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINE,Transmitted IN Data Interrupt" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x1C0)++0x3
|
|
line.long 0x0 "DEVEPTIMR_ISO_MODE[$1],Device Endpoint Interrupt Mask Register"
|
|
bitfld.long 0x0 18. "RSTDT,Reset Data Toggle" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "EPDISHDMA,Endpoint Interrupts Disable HDMA Request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FIFOCON,FIFO Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "KILLBK,Kill IN Bank" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKE,Number of Busy Banks Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "ERRORTRANSE,Transaction Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "DATAXE,DataX Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "MDATAE,MData Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETE,Short Packet Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "CRCERRE,CRC Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFE,Overflow Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "HBISOFLUSHE,High Bandwidth Isochronous IN Flush Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "HBISOINERRE,High Bandwidth Isochronous IN Underflow Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "UNDERFE,Underflow Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTE,Received OUT Data Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINE,Transmitted IN Data Interrupt" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x1C0)++0x3
|
|
line.long 0x0 "DEVEPTIMR_BLK_MODE[$1],Device Endpoint Interrupt Mask Register"
|
|
bitfld.long 0x0 19. "STALLRQ,STALL Request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "RSTDT,Reset Data Toggle" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "NYETDIS,NYET Token Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "EPDISHDMA,Endpoint Interrupts Disable HDMA Request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FIFOCON,FIFO Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "KILLBK,Kill IN Bank" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKE,Number of Busy Banks Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETE,Short Packet Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "STALLEDE,STALLed Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFE,Overflow Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKINE,NAKed IN Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NAKOUTE,NAKed OUT Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXSTPE,Received SETUP Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTE,Received OUT Data Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINE,Transmitted IN Data Interrupt" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x1C0)++0x3
|
|
line.long 0x0 "DEVEPTIMR_INTRPT_MODE[$1],Device Endpoint Interrupt Mask Register"
|
|
bitfld.long 0x0 19. "STALLRQ,STALL Request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "RSTDT,Reset Data Toggle" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "NYETDIS,NYET Token Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "EPDISHDMA,Endpoint Interrupts Disable HDMA Request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FIFOCON,FIFO Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "KILLBK,Kill IN Bank" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKE,Number of Busy Banks Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETE,Short Packet Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "STALLEDE,STALLed Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFE,Overflow Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKINE,NAKed IN Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NAKOUTE,NAKed OUT Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXSTPE,Received SETUP Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTE,Received OUT Data Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINE,Transmitted IN Data Interrupt" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x1F0)++0x3
|
|
line.long 0x0 "DEVEPTIER_CTRL_MODE[$1],Device Endpoint Interrupt Enable Register"
|
|
bitfld.long 0x0 19. "STALLRQS,STALL Request Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "RSTDTS,Reset Data Toggle Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "NYETDISS,NYET Token Disable Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "EPDISHDMAS,Endpoint Interrupts Disable HDMA Request Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FIFOCONS,FIFO Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "KILLBKS,Kill IN Bank" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKES,Number of Busy Banks Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETES,Short Packet Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "STALLEDES,STALLed Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFES,Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKINES,NAKed IN Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NAKOUTES,NAKed OUT Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXSTPES,Received SETUP Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTES,Received OUT Data Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINES,Transmitted IN Data Interrupt Enable" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x1F0)++0x3
|
|
line.long 0x0 "DEVEPTIER_ISO_MODE[$1],Device Endpoint Interrupt Enable Register"
|
|
bitfld.long 0x0 18. "RSTDTS,Reset Data Toggle Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "EPDISHDMAS,Endpoint Interrupts Disable HDMA Request Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FIFOCONS,FIFO Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "KILLBKS,Kill IN Bank" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKES,Number of Busy Banks Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "ERRORTRANSES,Transaction Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "DATAXES,DataX Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "MDATAES,MData Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETES,Short Packet Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "CRCERRES,CRC Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFES,Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "HBISOFLUSHES,High Bandwidth Isochronous IN Flush Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "HBISOINERRES,High Bandwidth Isochronous IN Underflow Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "UNDERFES,Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTES,Received OUT Data Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINES,Transmitted IN Data Interrupt Enable" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x1F0)++0x3
|
|
line.long 0x0 "DEVEPTIER_BLK_MODE[$1],Device Endpoint Interrupt Enable Register"
|
|
bitfld.long 0x0 19. "STALLRQS,STALL Request Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "RSTDTS,Reset Data Toggle Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "NYETDISS,NYET Token Disable Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "EPDISHDMAS,Endpoint Interrupts Disable HDMA Request Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FIFOCONS,FIFO Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "KILLBKS,Kill IN Bank" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKES,Number of Busy Banks Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETES,Short Packet Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "STALLEDES,STALLed Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFES,Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKINES,NAKed IN Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NAKOUTES,NAKed OUT Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXSTPES,Received SETUP Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTES,Received OUT Data Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINES,Transmitted IN Data Interrupt Enable" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x1F0)++0x3
|
|
line.long 0x0 "DEVEPTIER_INTRPT_MODE[$1],Device Endpoint Interrupt Enable Register"
|
|
bitfld.long 0x0 19. "STALLRQS,STALL Request Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "RSTDTS,Reset Data Toggle Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "NYETDISS,NYET Token Disable Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "EPDISHDMAS,Endpoint Interrupts Disable HDMA Request Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FIFOCONS,FIFO Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "KILLBKS,Kill IN Bank" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKES,Number of Busy Banks Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETES,Short Packet Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "STALLEDES,STALLed Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFES,Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKINES,NAKed IN Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NAKOUTES,NAKed OUT Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXSTPES,Received SETUP Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTES,Received OUT Data Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINES,Transmitted IN Data Interrupt Enable" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x220)++0x3
|
|
line.long 0x0 "DEVEPTIDR_CTRL_MODE[$1],Device Endpoint Interrupt Disable Register"
|
|
bitfld.long 0x0 19. "STALLRQC,STALL Request Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "NYETDISC,NYET Token Disable Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "EPDISHDMAC,Endpoint Interrupts Disable HDMA Request Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FIFOCONC,FIFO Control Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKEC,Number of Busy Banks Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETEC,Shortpacket Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "STALLEDEC,STALLed Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFEC,Overflow Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKINEC,NAKed IN Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NAKOUTEC,NAKed OUT Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXSTPEC,Received SETUP Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTEC,Received OUT Data Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINEC,Transmitted IN Interrupt Clear" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x220)++0x3
|
|
line.long 0x0 "DEVEPTIDR_ISO_MODE[$1],Device Endpoint Interrupt Disable Register"
|
|
bitfld.long 0x0 16. "EPDISHDMAC,Endpoint Interrupts Disable HDMA Request Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FIFOCONC,FIFO Control Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKEC,Number of Busy Banks Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "ERRORTRANSEC,Transaction Error Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "DATAXEC,DataX Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "MDATAEC,MData Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETEC,Shortpacket Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFEC,Overflow Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "HBISOFLUSHEC,High Bandwidth Isochronous IN Flush Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "HBISOINERREC,High Bandwidth Isochronous IN Underflow Error Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "UNDERFEC,Underflow Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTEC,Received OUT Data Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINEC,Transmitted IN Interrupt Clear" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x220)++0x3
|
|
line.long 0x0 "DEVEPTIDR_BLK_MODE[$1],Device Endpoint Interrupt Disable Register"
|
|
bitfld.long 0x0 19. "STALLRQC,STALL Request Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "NYETDISC,NYET Token Disable Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "EPDISHDMAC,Endpoint Interrupts Disable HDMA Request Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FIFOCONC,FIFO Control Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKEC,Number of Busy Banks Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETEC,Shortpacket Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "STALLEDEC,STALLed Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFEC,Overflow Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKINEC,NAKed IN Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NAKOUTEC,NAKed OUT Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXSTPEC,Received SETUP Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTEC,Received OUT Data Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINEC,Transmitted IN Interrupt Clear" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x220)++0x3
|
|
line.long 0x0 "DEVEPTIDR_INTRPT_MODE[$1],Device Endpoint Interrupt Disable Register"
|
|
bitfld.long 0x0 19. "STALLRQC,STALL Request Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "NYETDISC,NYET Token Disable Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "EPDISHDMAC,Endpoint Interrupts Disable HDMA Request Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FIFOCONC,FIFO Control Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKEC,Number of Busy Banks Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETEC,Shortpacket Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "STALLEDEC,STALLed Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFEC,Overflow Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKINEC,NAKed IN Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "NAKOUTEC,NAKed OUT Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RXSTPEC,Received SETUP Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXOUTEC,Received OUT Data Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TXINEC,Transmitted IN Interrupt Clear" "0,1"
|
|
repeat.end
|
|
repeat 7. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6)(list ad:0x40038310 ad:0x40038320 ad:0x40038330 ad:0x40038340 ad:0x40038350 ad:0x40038360 ad:0x40038370)
|
|
tree "USBHS_DEVDMA[$1]"
|
|
base $2
|
|
group.long ($2)++0xF
|
|
line.long 0x0 "DEVDMANXTDSC,Device DMA Channel Next Descriptor Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "NXT_DSC_ADD,Next Descriptor Address"
|
|
line.long 0x4 "DEVDMAADDRESS,Device DMA Channel Address Register"
|
|
hexmask.long 0x4 0.--31. 1. "BUFF_ADD,Buffer Address"
|
|
line.long 0x8 "DEVDMACONTROL,Device DMA Channel Control Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "BUFF_LENGTH,Buffer Byte Length (Write-only)"
|
|
bitfld.long 0x8 7. "BURST_LCK,Burst Lock Enable" "0,1"
|
|
bitfld.long 0x8 6. "DESC_LD_IT,Descriptor Loaded Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 5. "END_BUFFIT,End of Buffer Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 4. "END_TR_IT,End of Transfer Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 3. "END_B_EN,End of Buffer Enable Control" "0,1"
|
|
bitfld.long 0x8 2. "END_TR_EN,End of Transfer Enable Control (OUT transfers only)" "0,1"
|
|
bitfld.long 0x8 1. "LDNXT_DSC,Load Next Channel Transfer Descriptor Enable Command" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "CHANN_ENB,Channel Enable Command" "0,1"
|
|
line.long 0xC "DEVDMASTATUS,Device DMA Channel Status Register"
|
|
hexmask.long.word 0xC 16.--31. 1. "BUFF_COUNT,Buffer Byte Count"
|
|
bitfld.long 0xC 6. "DESC_LDST,Descriptor Loaded Status" "0,1"
|
|
bitfld.long 0xC 5. "END_BF_ST,End of Channel Buffer Status" "0,1"
|
|
bitfld.long 0xC 4. "END_TR_ST,End of Channel Transfer Status" "0,1"
|
|
bitfld.long 0xC 1. "CHANN_ACT,Channel Active Status" "0,1"
|
|
bitfld.long 0xC 0. "CHANN_ENB,Channel Enable Status" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
base ad:0x40038000
|
|
newline
|
|
group.long 0x400++0x3
|
|
line.long 0x0 "HSTCTRL,Host General Control Register"
|
|
bitfld.long 0x0 12.--13. "SPDCONF,Mode Configuration" "0: The host starts in Full-speed mode and performs..,1: For a better consumption if high speed is not..,2: Forced high speed.,3: The host remains in Full-speed mode whatever the.."
|
|
newline
|
|
bitfld.long 0x0 10. "RESUME,Send USB Resume" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "RESET,Send USB Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "SOFE,Start of Frame Generation Enable" "0,1"
|
|
rgroup.long 0x404++0x3
|
|
line.long 0x0 "HSTISR,Host Global Interrupt Status Register"
|
|
bitfld.long 0x0 31. "DMA_7,DMA Channel 6 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "DMA_6,DMA Channel 5 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "DMA_5,DMA Channel 4 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "DMA_4,DMA Channel 3 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "DMA_3,DMA Channel 2 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "DMA_2,DMA Channel 1 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "DMA_1,DMA Channel 0 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "PEP_9,Pipe 9 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PEP_8,Pipe 8 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "PEP_7,Pipe 7 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "PEP_6,Pipe 6 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "PEP_5,Pipe 5 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "PEP_4,Pipe 4 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "PEP_3,Pipe 3 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "PEP_2,Pipe 2 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "PEP_1,Pipe 1 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "PEP_0,Pipe 0 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "HWUPI,Host Wake-Up Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "HSOFI,Host Start of Frame Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXRSMI,Upstream Resume Received Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RSMEDI,Downstream Resume Sent Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RSTI,USB Reset Sent Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "DDISCI,Device Disconnection Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DCONNI,Device Connection Interrupt" "0,1"
|
|
wgroup.long 0x408++0x7
|
|
line.long 0x0 "HSTICR,Host Global Interrupt Clear Register"
|
|
bitfld.long 0x0 6. "HWUPIC,Host Wake-Up Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "HSOFIC,Host Start of Frame Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXRSMIC,Upstream Resume Received Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RSMEDIC,Downstream Resume Sent Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RSTIC,USB Reset Sent Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "DDISCIC,Device Disconnection Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DCONNIC,Device Connection Interrupt Clear" "0,1"
|
|
line.long 0x4 "HSTIFR,Host Global Interrupt Set Register"
|
|
bitfld.long 0x4 31. "DMA_7,DMA Channel 6 Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 30. "DMA_6,DMA Channel 5 Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "DMA_5,DMA Channel 4 Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "DMA_4,DMA Channel 3 Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "DMA_3,DMA Channel 2 Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 26. "DMA_2,DMA Channel 1 Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "DMA_1,DMA Channel 0 Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "HWUPIS,Host Wake-Up Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "HSOFIS,Host Start of Frame Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "RXRSMIS,Upstream Resume Received Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "RSMEDIS,Downstream Resume Sent Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "RSTIS,USB Reset Sent Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "DDISCIS,Device Disconnection Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "DCONNIS,Device Connection Interrupt Set" "0,1"
|
|
rgroup.long 0x410++0x3
|
|
line.long 0x0 "HSTIMR,Host Global Interrupt Mask Register"
|
|
bitfld.long 0x0 31. "DMA_7,DMA Channel 6 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "DMA_6,DMA Channel 5 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "DMA_5,DMA Channel 4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "DMA_4,DMA Channel 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "DMA_3,DMA Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "DMA_2,DMA Channel 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "DMA_1,DMA Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "PEP_9,Pipe 9 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PEP_8,Pipe 8 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "PEP_7,Pipe 7 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "PEP_6,Pipe 6 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "PEP_5,Pipe 5 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "PEP_4,Pipe 4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "PEP_3,Pipe 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "PEP_2,Pipe 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "PEP_1,Pipe 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "PEP_0,Pipe 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "HWUPIE,Host Wake-Up Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "HSOFIE,Host Start of Frame Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXRSMIE,Upstream Resume Received Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RSMEDIE,Downstream Resume Sent Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RSTIE,USB Reset Sent Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "DDISCIE,Device Disconnection Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DCONNIE,Device Connection Interrupt Enable" "0,1"
|
|
wgroup.long 0x414++0x7
|
|
line.long 0x0 "HSTIDR,Host Global Interrupt Disable Register"
|
|
bitfld.long 0x0 31. "DMA_7,DMA Channel 6 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "DMA_6,DMA Channel 5 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "DMA_5,DMA Channel 4 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "DMA_4,DMA Channel 3 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "DMA_3,DMA Channel 2 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "DMA_2,DMA Channel 1 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "DMA_1,DMA Channel 0 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "PEP_9,Pipe 9 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PEP_8,Pipe 8 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "PEP_7,Pipe 7 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "PEP_6,Pipe 6 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "PEP_5,Pipe 5 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "PEP_4,Pipe 4 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "PEP_3,Pipe 3 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "PEP_2,Pipe 2 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "PEP_1,Pipe 1 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "PEP_0,Pipe 0 Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "HWUPIEC,Host Wake-Up Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "HSOFIEC,Host Start of Frame Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXRSMIEC,Upstream Resume Received Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RSMEDIEC,Downstream Resume Sent Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "RSTIEC,USB Reset Sent Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "DDISCIEC,Device Disconnection Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DCONNIEC,Device Connection Interrupt Disable" "0,1"
|
|
line.long 0x4 "HSTIER,Host Global Interrupt Enable Register"
|
|
bitfld.long 0x4 31. "DMA_7,DMA Channel 6 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 30. "DMA_6,DMA Channel 5 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "DMA_5,DMA Channel 4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "DMA_4,DMA Channel 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "DMA_3,DMA Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 26. "DMA_2,DMA Channel 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "DMA_1,DMA Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "PEP_9,Pipe 9 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "PEP_8,Pipe 8 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "PEP_7,Pipe 7 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "PEP_6,Pipe 6 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "PEP_5,Pipe 5 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "PEP_4,Pipe 4 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "PEP_3,Pipe 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "PEP_2,Pipe 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "PEP_1,Pipe 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "PEP_0,Pipe 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "HWUPIES,Host Wake-Up Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "HSOFIES,Host Start of Frame Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "RXRSMIES,Upstream Resume Received Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "RSMEDIES,Downstream Resume Sent Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "RSTIES,USB Reset Sent Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "DDISCIES,Device Disconnection Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "DCONNIES,Device Connection Interrupt Enable" "0,1"
|
|
group.long 0x41C++0x13
|
|
line.long 0x0 "HSTPIP,Host Pipe Register"
|
|
bitfld.long 0x0 24. "PRST8,Pipe 8 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "PRST7,Pipe 7 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "PRST6,Pipe 6 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "PRST5,Pipe 5 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "PRST4,Pipe 4 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "PRST3,Pipe 3 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "PRST2,Pipe 2 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "PRST1,Pipe 1 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PRST0,Pipe 0 Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "PEN8,Pipe 8 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PEN7,Pipe 7 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "PEN6,Pipe 6 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PEN5,Pipe 5 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "PEN4,Pipe 4 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PEN3,Pipe 3 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "PEN2,Pipe 2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "PEN1,Pipe 1 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "PEN0,Pipe 0 Enable" "0,1"
|
|
line.long 0x4 "HSTFNUM,Host Frame Number Register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "FLENHIGH,Frame Length"
|
|
newline
|
|
hexmask.long.word 0x4 3.--13. 1. "FNUM,Frame Number"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "MFNUM,Micro Frame Number" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "HSTADDR1,Host Address 1 Register"
|
|
hexmask.long.byte 0x8 24.--30. 1. "HSTADDRP3,USB Host Address"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--22. 1. "HSTADDRP2,USB Host Address"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--14. 1. "HSTADDRP1,USB Host Address"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "HSTADDRP0,USB Host Address"
|
|
line.long 0xC "HSTADDR2,Host Address 2 Register"
|
|
hexmask.long.byte 0xC 24.--30. 1. "HSTADDRP7,USB Host Address"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--22. 1. "HSTADDRP6,USB Host Address"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--14. 1. "HSTADDRP5,USB Host Address"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "HSTADDRP4,USB Host Address"
|
|
line.long 0x10 "HSTADDR3,Host Address 3 Register"
|
|
hexmask.long.byte 0x10 8.--14. 1. "HSTADDRP9,USB Host Address"
|
|
newline
|
|
hexmask.long.byte 0x10 0.--6. 1. "HSTADDRP8,USB Host Address"
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x500)++0x3
|
|
line.long 0x0 "HSTPIPCFG[$1],Host Pipe Configuration Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "INTFRQ,Pipe Interrupt Request Frequency"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "PEPNUM,Pipe Endpoint Number"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "PTYPE,Pipe Type" "0: Control,1: Isochronous,2: Bulk,3: Interrupt"
|
|
newline
|
|
bitfld.long 0x0 10. "AUTOSW,Automatic Switch" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "PTOKEN,Pipe Token" "0: SETUP,1: IN,2: OUT,?"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "PSIZE,Pipe Size" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes,4: 128 bytes,5: 256 bytes,6: 512 bytes,7: 1024 bytes"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "PBK,Pipe Banks" "0: Single-bank pipe,1: Double-bank pipe,2: Triple-bank pipe,?"
|
|
newline
|
|
bitfld.long 0x0 1. "ALLOC,Pipe Memory Allocate" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x500)++0x3
|
|
line.long 0x0 "HSTPIPCFG_CTRL_BULK_MODE[$1],Host Pipe Configuration Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "BINTERVAL,bInterval Parameter for the Bulk-Out/Ping Transaction"
|
|
newline
|
|
bitfld.long 0x0 20. "PINGEN,Ping Enable" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "PEPNUM,Pipe Endpoint Number"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "PTYPE,Pipe Type" "0: Control,1: Isochronous,2: Bulk,3: Interrupt"
|
|
newline
|
|
bitfld.long 0x0 10. "AUTOSW,Automatic Switch" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "PTOKEN,Pipe Token" "0: SETUP,1: IN,2: OUT,?"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "PSIZE,Pipe Size" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes,4: 128 bytes,5: 256 bytes,6: 512 bytes,7: 1024 bytes"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "PBK,Pipe Banks" "0: Single-bank pipe,1: Double-bank pipe,2: Triple-bank pipe,?"
|
|
newline
|
|
bitfld.long 0x0 1. "ALLOC,Pipe Memory Allocate" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x530)++0x3
|
|
line.long 0x0 "HSTPIPISR_CTRL_MODE[$1],Host Pipe Status Register"
|
|
hexmask.long.word 0x0 20.--30. 1. "PBYCT,Pipe Byte Count"
|
|
newline
|
|
bitfld.long 0x0 18. "CFGOK,Configuration OK Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "RWALL,Read/Write Allowed" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "CURRBK,Current Bank" "0: Current bank is bank0,1: Current bank is bank1,2: Current bank is bank2,?"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "NBUSYBK,Number of Busy Banks" "0: 0 busy bank (all banks free),1: 1 busy bank,2: 2 busy banks,3: 3 busy banks"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "DTSEQ,Data Toggle Sequence" "0: Data0 toggle sequence,1: Data1 toggle sequence,?,?"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETI,Short Packet Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RXSTALLDI,Received STALLed Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFI,Overflow Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDI,NAKed Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PERRI,Pipe Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TXSTPI,Transmitted SETUP Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTI,Transmitted OUT Data Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINI,Received IN Data Interrupt" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x530)++0x3
|
|
line.long 0x0 "HSTPIPISR_ISO_MODE[$1],Host Pipe Status Register"
|
|
hexmask.long.word 0x0 20.--30. 1. "PBYCT,Pipe Byte Count"
|
|
newline
|
|
bitfld.long 0x0 18. "CFGOK,Configuration OK Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "RWALL,Read/Write Allowed" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "CURRBK,Current Bank" "0: Current bank is bank0,1: Current bank is bank1,2: Current bank is bank2,?"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "NBUSYBK,Number of Busy Banks" "0: 0 busy bank (all banks free),1: 1 busy bank,2: 2 busy banks,3: 3 busy banks"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "DTSEQ,Data Toggle Sequence" "0: Data0 toggle sequence,1: Data1 toggle sequence,?,?"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETI,Short Packet Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "CRCERRI,CRC Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFI,Overflow Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDI,NAKed Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PERRI,Pipe Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "UNDERFI,Underflow Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTI,Transmitted OUT Data Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINI,Received IN Data Interrupt" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x530)++0x3
|
|
line.long 0x0 "HSTPIPISR_BLK_MODE[$1],Host Pipe Status Register"
|
|
hexmask.long.word 0x0 20.--30. 1. "PBYCT,Pipe Byte Count"
|
|
newline
|
|
bitfld.long 0x0 18. "CFGOK,Configuration OK Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "RWALL,Read/Write Allowed" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "CURRBK,Current Bank" "0: Current bank is bank0,1: Current bank is bank1,2: Current bank is bank2,?"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "NBUSYBK,Number of Busy Banks" "0: 0 busy bank (all banks free),1: 1 busy bank,2: 2 busy banks,3: 3 busy banks"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "DTSEQ,Data Toggle Sequence" "0: Data0 toggle sequence,1: Data1 toggle sequence,?,?"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETI,Short Packet Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RXSTALLDI,Received STALLed Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFI,Overflow Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDI,NAKed Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PERRI,Pipe Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TXSTPI,Transmitted SETUP Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTI,Transmitted OUT Data Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINI,Received IN Data Interrupt" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x530)++0x3
|
|
line.long 0x0 "HSTPIPISR_INTRPT_MODE[$1],Host Pipe Status Register"
|
|
hexmask.long.word 0x0 20.--30. 1. "PBYCT,Pipe Byte Count"
|
|
newline
|
|
bitfld.long 0x0 18. "CFGOK,Configuration OK Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "RWALL,Read/Write Allowed" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "CURRBK,Current Bank" "0: Current bank is bank0,1: Current bank is bank1,2: Current bank is bank2,?"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "NBUSYBK,Number of Busy Banks" "0: 0 busy bank (all banks free),1: 1 busy bank,2: 2 busy banks,3: 3 busy banks"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "DTSEQ,Data Toggle Sequence" "0: Data0 toggle sequence,1: Data1 toggle sequence,?,?"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETI,Short Packet Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RXSTALLDI,Received STALLed Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFI,Overflow Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDI,NAKed Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PERRI,Pipe Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "UNDERFI,Underflow Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTI,Transmitted OUT Data Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINI,Received IN Data Interrupt" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x560)++0x3
|
|
line.long 0x0 "HSTPIPICR_CTRL_MODE[$1],Host Pipe Clear Register"
|
|
bitfld.long 0x0 7. "SHORTPACKETIC,Short Packet Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RXSTALLDIC,Received STALLed Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIC,Overflow Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDIC,NAKed Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TXSTPIC,Transmitted SETUP Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTIC,Transmitted OUT Data Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINIC,Received IN Data Interrupt Clear" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x560)++0x3
|
|
line.long 0x0 "HSTPIPICR_ISO_MODE[$1],Host Pipe Clear Register"
|
|
bitfld.long 0x0 7. "SHORTPACKETIC,Short Packet Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "CRCERRIC,CRC Error Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIC,Overflow Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDIC,NAKed Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "UNDERFIC,Underflow Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTIC,Transmitted OUT Data Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINIC,Received IN Data Interrupt Clear" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x560)++0x3
|
|
line.long 0x0 "HSTPIPICR_BLK_MODE[$1],Host Pipe Clear Register"
|
|
bitfld.long 0x0 7. "SHORTPACKETIC,Short Packet Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RXSTALLDIC,Received STALLed Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIC,Overflow Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDIC,NAKed Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TXSTPIC,Transmitted SETUP Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTIC,Transmitted OUT Data Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINIC,Received IN Data Interrupt Clear" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x560)++0x3
|
|
line.long 0x0 "HSTPIPICR_INTRPT_MODE[$1],Host Pipe Clear Register"
|
|
bitfld.long 0x0 7. "SHORTPACKETIC,Short Packet Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RXSTALLDIC,Received STALLed Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIC,Overflow Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDIC,NAKed Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "UNDERFIC,Underflow Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTIC,Transmitted OUT Data Interrupt Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINIC,Received IN Data Interrupt Clear" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x590)++0x3
|
|
line.long 0x0 "HSTPIPIFR_CTRL_MODE[$1],Host Pipe Set Register"
|
|
bitfld.long 0x0 12. "NBUSYBKS,Number of Busy Banks Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETIS,Short Packet Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RXSTALLDIS,Received STALLed Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIS,Overflow Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDIS,NAKed Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PERRIS,Pipe Error Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TXSTPIS,Transmitted SETUP Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTIS,Transmitted OUT Data Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINIS,Received IN Data Interrupt Set" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x590)++0x3
|
|
line.long 0x0 "HSTPIPIFR_ISO_MODE[$1],Host Pipe Set Register"
|
|
bitfld.long 0x0 12. "NBUSYBKS,Number of Busy Banks Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETIS,Short Packet Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "CRCERRIS,CRC Error Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIS,Overflow Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDIS,NAKed Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PERRIS,Pipe Error Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "UNDERFIS,Underflow Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTIS,Transmitted OUT Data Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINIS,Received IN Data Interrupt Set" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x590)++0x3
|
|
line.long 0x0 "HSTPIPIFR_BLK_MODE[$1],Host Pipe Set Register"
|
|
bitfld.long 0x0 12. "NBUSYBKS,Number of Busy Banks Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETIS,Short Packet Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RXSTALLDIS,Received STALLed Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIS,Overflow Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDIS,NAKed Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PERRIS,Pipe Error Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TXSTPIS,Transmitted SETUP Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTIS,Transmitted OUT Data Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINIS,Received IN Data Interrupt Set" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x590)++0x3
|
|
line.long 0x0 "HSTPIPIFR_INTRPT_MODE[$1],Host Pipe Set Register"
|
|
bitfld.long 0x0 12. "NBUSYBKS,Number of Busy Banks Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETIS,Short Packet Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RXSTALLDIS,Received STALLed Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIS,Overflow Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDIS,NAKed Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PERRIS,Pipe Error Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "UNDERFIS,Underflow Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTIS,Transmitted OUT Data Interrupt Set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINIS,Received IN Data Interrupt Set" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x5C0)++0x3
|
|
line.long 0x0 "HSTPIPIMR_CTRL_MODE[$1],Host Pipe Mask Register"
|
|
bitfld.long 0x0 18. "RSTDT,Reset Data Toggle" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "PFREEZE,Pipe Freeze" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PDISHDMA,Pipe Interrupts Disable HDMA Request Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FIFOCON,FIFO Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKE,Number of Busy Banks Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETIE,Short Packet Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RXSTALLDE,Received STALLed Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIE,Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDE,NAKed Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PERRE,Pipe Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TXSTPE,Transmitted SETUP Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTE,Transmitted OUT Data Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINE,Received IN Data Interrupt Enable" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x5C0)++0x3
|
|
line.long 0x0 "HSTPIPIMR_ISO_MODE[$1],Host Pipe Mask Register"
|
|
bitfld.long 0x0 18. "RSTDT,Reset Data Toggle" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "PFREEZE,Pipe Freeze" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PDISHDMA,Pipe Interrupts Disable HDMA Request Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FIFOCON,FIFO Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKE,Number of Busy Banks Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETIE,Short Packet Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "CRCERRE,CRC Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIE,Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDE,NAKed Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PERRE,Pipe Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "UNDERFIE,Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTE,Transmitted OUT Data Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINE,Received IN Data Interrupt Enable" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x5C0)++0x3
|
|
line.long 0x0 "HSTPIPIMR_BLK_MODE[$1],Host Pipe Mask Register"
|
|
bitfld.long 0x0 18. "RSTDT,Reset Data Toggle" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "PFREEZE,Pipe Freeze" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PDISHDMA,Pipe Interrupts Disable HDMA Request Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FIFOCON,FIFO Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKE,Number of Busy Banks Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETIE,Short Packet Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RXSTALLDE,Received STALLed Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIE,Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDE,NAKed Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PERRE,Pipe Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TXSTPE,Transmitted SETUP Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTE,Transmitted OUT Data Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINE,Received IN Data Interrupt Enable" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x5C0)++0x3
|
|
line.long 0x0 "HSTPIPIMR_INTRPT_MODE[$1],Host Pipe Mask Register"
|
|
bitfld.long 0x0 18. "RSTDT,Reset Data Toggle" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "PFREEZE,Pipe Freeze" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PDISHDMA,Pipe Interrupts Disable HDMA Request Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FIFOCON,FIFO Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKE,Number of Busy Banks Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETIE,Short Packet Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RXSTALLDE,Received STALLed Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIE,Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDE,NAKed Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PERRE,Pipe Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "UNDERFIE,Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTE,Transmitted OUT Data Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINE,Received IN Data Interrupt Enable" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x5F0)++0x3
|
|
line.long 0x0 "HSTPIPIER_CTRL_MODE[$1],Host Pipe Enable Register"
|
|
bitfld.long 0x0 18. "RSTDTS,Reset Data Toggle Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "PFREEZES,Pipe Freeze Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PDISHDMAS,Pipe Interrupts Disable HDMA Request Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKES,Number of Busy Banks Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETIES,Short Packet Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RXSTALLDES,Received STALLed Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIES,Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDES,NAKed Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PERRES,Pipe Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TXSTPES,Transmitted SETUP Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTES,Transmitted OUT Data Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINES,Received IN Data Interrupt Enable" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x5F0)++0x3
|
|
line.long 0x0 "HSTPIPIER_ISO_MODE[$1],Host Pipe Enable Register"
|
|
bitfld.long 0x0 18. "RSTDTS,Reset Data Toggle Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "PFREEZES,Pipe Freeze Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PDISHDMAS,Pipe Interrupts Disable HDMA Request Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKES,Number of Busy Banks Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETIES,Short Packet Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "CRCERRES,CRC Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIES,Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDES,NAKed Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PERRES,Pipe Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "UNDERFIES,Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTES,Transmitted OUT Data Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINES,Received IN Data Interrupt Enable" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x5F0)++0x3
|
|
line.long 0x0 "HSTPIPIER_BLK_MODE[$1],Host Pipe Enable Register"
|
|
bitfld.long 0x0 18. "RSTDTS,Reset Data Toggle Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "PFREEZES,Pipe Freeze Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PDISHDMAS,Pipe Interrupts Disable HDMA Request Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKES,Number of Busy Banks Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETIES,Short Packet Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RXSTALLDES,Received STALLed Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIES,Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDES,NAKed Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PERRES,Pipe Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TXSTPES,Transmitted SETUP Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTES,Transmitted OUT Data Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINES,Received IN Data Interrupt Enable" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x5F0)++0x3
|
|
line.long 0x0 "HSTPIPIER_INTRPT_MODE[$1],Host Pipe Enable Register"
|
|
bitfld.long 0x0 18. "RSTDTS,Reset Data Toggle Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "PFREEZES,Pipe Freeze Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PDISHDMAS,Pipe Interrupts Disable HDMA Request Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKES,Number of Busy Banks Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETIES,Short Packet Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RXSTALLDES,Received STALLed Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIES,Overflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDES,NAKed Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PERRES,Pipe Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "UNDERFIES,Underflow Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTES,Transmitted OUT Data Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINES,Received IN Data Interrupt Enable" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x620)++0x3
|
|
line.long 0x0 "HSTPIPIDR_CTRL_MODE[$1],Host Pipe Disable Register"
|
|
bitfld.long 0x0 17. "PFREEZEC,Pipe Freeze Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PDISHDMAC,Pipe Interrupts Disable HDMA Request Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FIFOCONC,FIFO Control Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKEC,Number of Busy Banks Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETIEC,Short Packet Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RXSTALLDEC,Received STALLed Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIEC,Overflow Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDEC,NAKed Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PERREC,Pipe Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TXSTPEC,Transmitted SETUP Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTEC,Transmitted OUT Data Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINEC,Received IN Data Interrupt Disable" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x620)++0x3
|
|
line.long 0x0 "HSTPIPIDR_ISO_MODE[$1],Host Pipe Disable Register"
|
|
bitfld.long 0x0 17. "PFREEZEC,Pipe Freeze Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PDISHDMAC,Pipe Interrupts Disable HDMA Request Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FIFOCONC,FIFO Control Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKEC,Number of Busy Banks Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETIEC,Short Packet Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "CRCERREC,CRC Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIEC,Overflow Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDEC,NAKed Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PERREC,Pipe Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "UNDERFIEC,Underflow Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTEC,Transmitted OUT Data Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINEC,Received IN Data Interrupt Disable" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x620)++0x3
|
|
line.long 0x0 "HSTPIPIDR_BLK_MODE[$1],Host Pipe Disable Register"
|
|
bitfld.long 0x0 17. "PFREEZEC,Pipe Freeze Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PDISHDMAC,Pipe Interrupts Disable HDMA Request Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FIFOCONC,FIFO Control Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKEC,Number of Busy Banks Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETIEC,Short Packet Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RXSTALLDEC,Received STALLed Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIEC,Overflow Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDEC,NAKed Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PERREC,Pipe Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TXSTPEC,Transmitted SETUP Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTEC,Transmitted OUT Data Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINEC,Received IN Data Interrupt Disable" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x620)++0x3
|
|
line.long 0x0 "HSTPIPIDR_INTRPT_MODE[$1],Host Pipe Disable Register"
|
|
bitfld.long 0x0 17. "PFREEZEC,Pipe Freeze Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PDISHDMAC,Pipe Interrupts Disable HDMA Request Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FIFOCONC,FIFO Control Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "NBUSYBKEC,Number of Busy Banks Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "SHORTPACKETIEC,Short Packet Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "RXSTALLDEC,Received STALLed Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "OVERFIEC,Overflow Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "NAKEDEC,NAKed Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PERREC,Pipe Error Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "UNDERFIEC,Underflow Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXOUTEC,Transmitted OUT Data Interrupt Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXINEC,Received IN Data Interrupt Disable" "0,1"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x650)++0x3
|
|
line.long 0x0 "HSTPIPINRQ[$1],Host Pipe IN Request Register"
|
|
bitfld.long 0x0 8. "INMODE,IN Request Mode" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "INRQ,IN Request Number before Freeze"
|
|
repeat.end
|
|
repeat 10. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x680)++0x3
|
|
line.long 0x0 "HSTPIPERR[$1],Host Pipe Error Register"
|
|
bitfld.long 0x0 5.--6. "COUNTER,Error Counter" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 4. "CRC16,CRC16 Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TIMEOUT,Time-Out Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "PID,Data PID Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "DATAPID,Data PID Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DATATGL,Data Toggle Error" "0,1"
|
|
repeat.end
|
|
repeat 7. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6)(list ad:0x40038710 ad:0x40038720 ad:0x40038730 ad:0x40038740 ad:0x40038750 ad:0x40038760 ad:0x40038770)
|
|
tree "USBHS_HSTDMA[$1]"
|
|
base $2
|
|
group.long ($2)++0xF
|
|
line.long 0x0 "HSTDMANXTDSC,Host DMA Channel Next Descriptor Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "NXT_DSC_ADD,Next Descriptor Address"
|
|
line.long 0x4 "HSTDMAADDRESS,Host DMA Channel Address Register"
|
|
hexmask.long 0x4 0.--31. 1. "BUFF_ADD,Buffer Address"
|
|
line.long 0x8 "HSTDMACONTROL,Host DMA Channel Control Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "BUFF_LENGTH,Buffer Byte Length (Write-only)"
|
|
bitfld.long 0x8 7. "BURST_LCK,Burst Lock Enable" "0,1"
|
|
bitfld.long 0x8 6. "DESC_LD_IT,Descriptor Loaded Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 5. "END_BUFFIT,End of Buffer Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 4. "END_TR_IT,End of Transfer Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 3. "END_B_EN,End of Buffer Enable Control" "0,1"
|
|
bitfld.long 0x8 2. "END_TR_EN,End of Transfer Enable Control (OUT transfers only)" "0,1"
|
|
bitfld.long 0x8 1. "LDNXT_DSC,Load Next Channel Transfer Descriptor Enable Command" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "CHANN_ENB,Channel Enable Command" "0,1"
|
|
line.long 0xC "HSTDMASTATUS,Host DMA Channel Status Register"
|
|
hexmask.long.word 0xC 16.--31. 1. "BUFF_COUNT,Buffer Byte Count"
|
|
bitfld.long 0xC 6. "DESC_LDST,Descriptor Loaded Status" "0,1"
|
|
bitfld.long 0xC 5. "END_BF_ST,End of Channel Buffer Status" "0,1"
|
|
bitfld.long 0xC 4. "END_TR_ST,End of Channel Transfer Status" "0,1"
|
|
bitfld.long 0xC 1. "CHANN_ACT,Channel Active Status" "0,1"
|
|
bitfld.long 0xC 0. "CHANN_ENB,Channel Enable Status" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
base ad:0x40038000
|
|
newline
|
|
group.long 0x800++0x3
|
|
line.long 0x0 "CTRL,General Control Register"
|
|
bitfld.long 0x0 25. "UIMOD,USBHS Mode" "0: The module is in USB Host mode.,1: The module is in USB Device mode."
|
|
newline
|
|
bitfld.long 0x0 24. "UID,UID Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "USBE,USBHS Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "FRZCLK,Freeze USB Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "VBUSHWC,VBUS Hardware Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RDERRE,Remote Device Connection Error Interrupt Enable" "0,1"
|
|
rgroup.long 0x804++0x3
|
|
line.long 0x0 "SR,General Status Register"
|
|
bitfld.long 0x0 14. "CLKUSABLE,UTMI Clock Usable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "SPEED,Speed Status (Device mode only)" "0: Full-Speed mode,1: High-Speed mode,2: Low-Speed mode,?"
|
|
newline
|
|
bitfld.long 0x0 4. "RDERRI,Remote Device Connection Error Interrupt (Host mode only)" "0,1"
|
|
wgroup.long 0x808++0x7
|
|
line.long 0x0 "SCR,General Status Clear Register"
|
|
bitfld.long 0x0 4. "RDERRIC,Remote Device Connection Error Interrupt Clear" "0,1"
|
|
line.long 0x4 "SFR,General Status Set Register"
|
|
bitfld.long 0x4 9. "VBUSRQS,VBUS Request Set" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "RDERRIS,Remote Device Connection Error Interrupt Set" "0,1"
|
|
tree.end
|
|
tree "UTMI (USB Transmitter Interface Macrocell)"
|
|
base ad:0x400E0400
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "OHCIICR,OHCI Interrupt Configuration Register"
|
|
bitfld.long 0x0 23. "UDPPUDIS,USB Device Pull-up Disable" "0,1"
|
|
bitfld.long 0x0 5. "APPSTART" "0,1"
|
|
bitfld.long 0x0 4. "ARIE,OHCI Asynchronous Resume Interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "RES0,USB PORTx Reset" "0,1"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "CKTRIM,UTMI Clock Trimming Register"
|
|
bitfld.long 0x0 0.--1. "FREQ,UTMI Reference Clock Frequency" "0: 12 MHz reference clock,1: 16 MHz reference clock,?,?"
|
|
tree.end
|
|
tree "WDT (Watchdog Timer)"
|
|
base ad:0x400E1850
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "KEY,Password"
|
|
bitfld.long 0x0 0. "WDRSTT,Watchdog Restart" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "MR,Mode Register"
|
|
bitfld.long 0x0 29. "WDIDLEHLT,Watchdog Idle Halt" "0,1"
|
|
bitfld.long 0x0 28. "WDDBGHLT,Watchdog Debug Halt" "0,1"
|
|
hexmask.long.word 0x0 16.--27. 1. "WDD,Watchdog Delta Value"
|
|
bitfld.long 0x0 15. "WDDIS,Watchdog Disable" "0,1"
|
|
bitfld.long 0x0 13. "WDRSTEN,Watchdog Reset Enable" "0,1"
|
|
bitfld.long 0x0 12. "WDFIEN,Watchdog Fault Interrupt Enable" "0,1"
|
|
hexmask.long.word 0x0 0.--11. 1. "WDV,Watchdog Counter Value"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 1. "WDERR,Watchdog Error (cleared on read)" "0,1"
|
|
bitfld.long 0x0 0. "WDUNF,Watchdog Underflow (cleared on read)" "0,1"
|
|
tree.end
|
|
tree "XDMAC (Extensible DMA Controller)"
|
|
base ad:0x40078000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "GTYPE,Global Type Register"
|
|
hexmask.long.byte 0x0 16.--22. 1. "NB_REQ,Number of Peripheral Requests Minus One"
|
|
hexmask.long.word 0x0 5.--15. 1. "FIFO_SZ,Number of Bytes"
|
|
hexmask.long.byte 0x0 0.--4. 1. "NB_CH,Number of Channels Minus One"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "GCFG,Global Configuration Register"
|
|
bitfld.long 0x0 8. "BXKBEN,Boundary X Kilobyte Enable" "0,1"
|
|
bitfld.long 0x0 3. "CGDISIF,Bus Interface Clock Gating Disable" "0,1"
|
|
bitfld.long 0x0 2. "CGDISFIFO,FIFO Clock Gating Disable" "0,1"
|
|
bitfld.long 0x0 1. "CGDISPIPE,Pipeline Clock Gating Disable" "0,1"
|
|
bitfld.long 0x0 0. "CGDISREG,Configuration Registers Clock Gating Disable" "0,1"
|
|
line.long 0x4 "GWAC,Global Weighted Arbiter Configuration Register"
|
|
hexmask.long.byte 0x4 12.--15. 1. "PW3,Pool Weight 3"
|
|
hexmask.long.byte 0x4 8.--11. 1. "PW2,Pool Weight 2"
|
|
hexmask.long.byte 0x4 4.--7. 1. "PW1,Pool Weight 1"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PW0,Pool Weight 0"
|
|
wgroup.long 0xC++0x7
|
|
line.long 0x0 "GIE,Global Interrupt Enable Register"
|
|
bitfld.long 0x0 23. "IE23,XDMAC Channel 23 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 22. "IE22,XDMAC Channel 22 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 21. "IE21,XDMAC Channel 21 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 20. "IE20,XDMAC Channel 20 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 19. "IE19,XDMAC Channel 19 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 18. "IE18,XDMAC Channel 18 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 17. "IE17,XDMAC Channel 17 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 16. "IE16,XDMAC Channel 16 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 15. "IE15,XDMAC Channel 15 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 14. "IE14,XDMAC Channel 14 Interrupt Enable Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "IE13,XDMAC Channel 13 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 12. "IE12,XDMAC Channel 12 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 11. "IE11,XDMAC Channel 11 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 10. "IE10,XDMAC Channel 10 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 9. "IE9,XDMAC Channel 9 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 8. "IE8,XDMAC Channel 8 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 7. "IE7,XDMAC Channel 7 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 6. "IE6,XDMAC Channel 6 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 5. "IE5,XDMAC Channel 5 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 4. "IE4,XDMAC Channel 4 Interrupt Enable Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "IE3,XDMAC Channel 3 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 2. "IE2,XDMAC Channel 2 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 1. "IE1,XDMAC Channel 1 Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 0. "IE0,XDMAC Channel 0 Interrupt Enable Bit" "0,1"
|
|
line.long 0x4 "GID,Global Interrupt Disable Register"
|
|
bitfld.long 0x4 23. "ID23,XDMAC Channel 23 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 22. "ID22,XDMAC Channel 22 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 21. "ID21,XDMAC Channel 21 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 20. "ID20,XDMAC Channel 20 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 19. "ID19,XDMAC Channel 19 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 18. "ID18,XDMAC Channel 18 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 17. "ID17,XDMAC Channel 17 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 16. "ID16,XDMAC Channel 16 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 15. "ID15,XDMAC Channel 15 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 14. "ID14,XDMAC Channel 14 Interrupt Disable Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "ID13,XDMAC Channel 13 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 12. "ID12,XDMAC Channel 12 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 11. "ID11,XDMAC Channel 11 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 10. "ID10,XDMAC Channel 10 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 9. "ID9,XDMAC Channel 9 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 8. "ID8,XDMAC Channel 8 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 7. "ID7,XDMAC Channel 7 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 6. "ID6,XDMAC Channel 6 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 5. "ID5,XDMAC Channel 5 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 4. "ID4,XDMAC Channel 4 Interrupt Disable Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "ID3,XDMAC Channel 3 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 2. "ID2,XDMAC Channel 2 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 1. "ID1,XDMAC Channel 1 Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 0. "ID0,XDMAC Channel 0 Interrupt Disable Bit" "0,1"
|
|
rgroup.long 0x14++0x7
|
|
line.long 0x0 "GIM,Global Interrupt Mask Register"
|
|
bitfld.long 0x0 23. "IM23,XDMAC Channel 23 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 22. "IM22,XDMAC Channel 22 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 21. "IM21,XDMAC Channel 21 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 20. "IM20,XDMAC Channel 20 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 19. "IM19,XDMAC Channel 19 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 18. "IM18,XDMAC Channel 18 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 17. "IM17,XDMAC Channel 17 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 16. "IM16,XDMAC Channel 16 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 15. "IM15,XDMAC Channel 15 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 14. "IM14,XDMAC Channel 14 Interrupt Mask Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "IM13,XDMAC Channel 13 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 12. "IM12,XDMAC Channel 12 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 11. "IM11,XDMAC Channel 11 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 10. "IM10,XDMAC Channel 10 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 9. "IM9,XDMAC Channel 9 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 8. "IM8,XDMAC Channel 8 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 7. "IM7,XDMAC Channel 7 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 6. "IM6,XDMAC Channel 6 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 5. "IM5,XDMAC Channel 5 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 4. "IM4,XDMAC Channel 4 Interrupt Mask Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "IM3,XDMAC Channel 3 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 2. "IM2,XDMAC Channel 2 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 1. "IM1,XDMAC Channel 1 Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 0. "IM0,XDMAC Channel 0 Interrupt Mask Bit" "0,1"
|
|
line.long 0x4 "GIS,Global Interrupt Status Register"
|
|
bitfld.long 0x4 23. "IS23,XDMAC Channel 23 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 22. "IS22,XDMAC Channel 22 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 21. "IS21,XDMAC Channel 21 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 20. "IS20,XDMAC Channel 20 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 19. "IS19,XDMAC Channel 19 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 18. "IS18,XDMAC Channel 18 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 17. "IS17,XDMAC Channel 17 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 16. "IS16,XDMAC Channel 16 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 15. "IS15,XDMAC Channel 15 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 14. "IS14,XDMAC Channel 14 Interrupt Status Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "IS13,XDMAC Channel 13 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 12. "IS12,XDMAC Channel 12 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 11. "IS11,XDMAC Channel 11 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 10. "IS10,XDMAC Channel 10 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 9. "IS9,XDMAC Channel 9 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 8. "IS8,XDMAC Channel 8 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 7. "IS7,XDMAC Channel 7 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 6. "IS6,XDMAC Channel 6 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 5. "IS5,XDMAC Channel 5 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 4. "IS4,XDMAC Channel 4 Interrupt Status Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "IS3,XDMAC Channel 3 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 2. "IS2,XDMAC Channel 2 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 1. "IS1,XDMAC Channel 1 Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 0. "IS0,XDMAC Channel 0 Interrupt Status Bit" "0,1"
|
|
wgroup.long 0x1C++0x7
|
|
line.long 0x0 "GE,Global Channel Enable Register"
|
|
bitfld.long 0x0 23. "EN23,XDMAC Channel 23 Enable Bit" "0,1"
|
|
bitfld.long 0x0 22. "EN22,XDMAC Channel 22 Enable Bit" "0,1"
|
|
bitfld.long 0x0 21. "EN21,XDMAC Channel 21 Enable Bit" "0,1"
|
|
bitfld.long 0x0 20. "EN20,XDMAC Channel 20 Enable Bit" "0,1"
|
|
bitfld.long 0x0 19. "EN19,XDMAC Channel 19 Enable Bit" "0,1"
|
|
bitfld.long 0x0 18. "EN18,XDMAC Channel 18 Enable Bit" "0,1"
|
|
bitfld.long 0x0 17. "EN17,XDMAC Channel 17 Enable Bit" "0,1"
|
|
bitfld.long 0x0 16. "EN16,XDMAC Channel 16 Enable Bit" "0,1"
|
|
bitfld.long 0x0 15. "EN15,XDMAC Channel 15 Enable Bit" "0,1"
|
|
bitfld.long 0x0 14. "EN14,XDMAC Channel 14 Enable Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "EN13,XDMAC Channel 13 Enable Bit" "0,1"
|
|
bitfld.long 0x0 12. "EN12,XDMAC Channel 12 Enable Bit" "0,1"
|
|
bitfld.long 0x0 11. "EN11,XDMAC Channel 11 Enable Bit" "0,1"
|
|
bitfld.long 0x0 10. "EN10,XDMAC Channel 10 Enable Bit" "0,1"
|
|
bitfld.long 0x0 9. "EN9,XDMAC Channel 9 Enable Bit" "0,1"
|
|
bitfld.long 0x0 8. "EN8,XDMAC Channel 8 Enable Bit" "0,1"
|
|
bitfld.long 0x0 7. "EN7,XDMAC Channel 7 Enable Bit" "0,1"
|
|
bitfld.long 0x0 6. "EN6,XDMAC Channel 6 Enable Bit" "0,1"
|
|
bitfld.long 0x0 5. "EN5,XDMAC Channel 5 Enable Bit" "0,1"
|
|
bitfld.long 0x0 4. "EN4,XDMAC Channel 4 Enable Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EN3,XDMAC Channel 3 Enable Bit" "0,1"
|
|
bitfld.long 0x0 2. "EN2,XDMAC Channel 2 Enable Bit" "0,1"
|
|
bitfld.long 0x0 1. "EN1,XDMAC Channel 1 Enable Bit" "0,1"
|
|
bitfld.long 0x0 0. "EN0,XDMAC Channel 0 Enable Bit" "0,1"
|
|
line.long 0x4 "GD,Global Channel Disable Register"
|
|
bitfld.long 0x4 23. "DI23,XDMAC Channel 23 Disable Bit" "0,1"
|
|
bitfld.long 0x4 22. "DI22,XDMAC Channel 22 Disable Bit" "0,1"
|
|
bitfld.long 0x4 21. "DI21,XDMAC Channel 21 Disable Bit" "0,1"
|
|
bitfld.long 0x4 20. "DI20,XDMAC Channel 20 Disable Bit" "0,1"
|
|
bitfld.long 0x4 19. "DI19,XDMAC Channel 19 Disable Bit" "0,1"
|
|
bitfld.long 0x4 18. "DI18,XDMAC Channel 18 Disable Bit" "0,1"
|
|
bitfld.long 0x4 17. "DI17,XDMAC Channel 17 Disable Bit" "0,1"
|
|
bitfld.long 0x4 16. "DI16,XDMAC Channel 16 Disable Bit" "0,1"
|
|
bitfld.long 0x4 15. "DI15,XDMAC Channel 15 Disable Bit" "0,1"
|
|
bitfld.long 0x4 14. "DI14,XDMAC Channel 14 Disable Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "DI13,XDMAC Channel 13 Disable Bit" "0,1"
|
|
bitfld.long 0x4 12. "DI12,XDMAC Channel 12 Disable Bit" "0,1"
|
|
bitfld.long 0x4 11. "DI11,XDMAC Channel 11 Disable Bit" "0,1"
|
|
bitfld.long 0x4 10. "DI10,XDMAC Channel 10 Disable Bit" "0,1"
|
|
bitfld.long 0x4 9. "DI9,XDMAC Channel 9 Disable Bit" "0,1"
|
|
bitfld.long 0x4 8. "DI8,XDMAC Channel 8 Disable Bit" "0,1"
|
|
bitfld.long 0x4 7. "DI7,XDMAC Channel 7 Disable Bit" "0,1"
|
|
bitfld.long 0x4 6. "DI6,XDMAC Channel 6 Disable Bit" "0,1"
|
|
bitfld.long 0x4 5. "DI5,XDMAC Channel 5 Disable Bit" "0,1"
|
|
bitfld.long 0x4 4. "DI4,XDMAC Channel 4 Disable Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "DI3,XDMAC Channel 3 Disable Bit" "0,1"
|
|
bitfld.long 0x4 2. "DI2,XDMAC Channel 2 Disable Bit" "0,1"
|
|
bitfld.long 0x4 1. "DI1,XDMAC Channel 1 Disable Bit" "0,1"
|
|
bitfld.long 0x4 0. "DI0,XDMAC Channel 0 Disable Bit" "0,1"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x0 "GS,Global Channel Status Register"
|
|
bitfld.long 0x0 23. "ST23,XDMAC Channel 23 Status Bit" "0,1"
|
|
bitfld.long 0x0 22. "ST22,XDMAC Channel 22 Status Bit" "0,1"
|
|
bitfld.long 0x0 21. "ST21,XDMAC Channel 21 Status Bit" "0,1"
|
|
bitfld.long 0x0 20. "ST20,XDMAC Channel 20 Status Bit" "0,1"
|
|
bitfld.long 0x0 19. "ST19,XDMAC Channel 19 Status Bit" "0,1"
|
|
bitfld.long 0x0 18. "ST18,XDMAC Channel 18 Status Bit" "0,1"
|
|
bitfld.long 0x0 17. "ST17,XDMAC Channel 17 Status Bit" "0,1"
|
|
bitfld.long 0x0 16. "ST16,XDMAC Channel 16 Status Bit" "0,1"
|
|
bitfld.long 0x0 15. "ST15,XDMAC Channel 15 Status Bit" "0,1"
|
|
bitfld.long 0x0 14. "ST14,XDMAC Channel 14 Status Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "ST13,XDMAC Channel 13 Status Bit" "0,1"
|
|
bitfld.long 0x0 12. "ST12,XDMAC Channel 12 Status Bit" "0,1"
|
|
bitfld.long 0x0 11. "ST11,XDMAC Channel 11 Status Bit" "0,1"
|
|
bitfld.long 0x0 10. "ST10,XDMAC Channel 10 Status Bit" "0,1"
|
|
bitfld.long 0x0 9. "ST9,XDMAC Channel 9 Status Bit" "0,1"
|
|
bitfld.long 0x0 8. "ST8,XDMAC Channel 8 Status Bit" "0,1"
|
|
bitfld.long 0x0 7. "ST7,XDMAC Channel 7 Status Bit" "0,1"
|
|
bitfld.long 0x0 6. "ST6,XDMAC Channel 6 Status Bit" "0,1"
|
|
bitfld.long 0x0 5. "ST5,XDMAC Channel 5 Status Bit" "0,1"
|
|
bitfld.long 0x0 4. "ST4,XDMAC Channel 4 Status Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ST3,XDMAC Channel 3 Status Bit" "0,1"
|
|
bitfld.long 0x0 2. "ST2,XDMAC Channel 2 Status Bit" "0,1"
|
|
bitfld.long 0x0 1. "ST1,XDMAC Channel 1 Status Bit" "0,1"
|
|
bitfld.long 0x0 0. "ST0,XDMAC Channel 0 Status Bit" "0,1"
|
|
group.long 0x28++0x7
|
|
line.long 0x0 "GRS,Global Channel Read Suspend Register"
|
|
bitfld.long 0x0 23. "RS23,XDMAC Channel 23 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 22. "RS22,XDMAC Channel 22 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 21. "RS21,XDMAC Channel 21 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 20. "RS20,XDMAC Channel 20 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 19. "RS19,XDMAC Channel 19 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 18. "RS18,XDMAC Channel 18 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 17. "RS17,XDMAC Channel 17 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 16. "RS16,XDMAC Channel 16 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 15. "RS15,XDMAC Channel 15 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 14. "RS14,XDMAC Channel 14 Read Suspend Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "RS13,XDMAC Channel 13 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 12. "RS12,XDMAC Channel 12 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 11. "RS11,XDMAC Channel 11 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 10. "RS10,XDMAC Channel 10 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 9. "RS9,XDMAC Channel 9 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 8. "RS8,XDMAC Channel 8 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 7. "RS7,XDMAC Channel 7 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 6. "RS6,XDMAC Channel 6 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 5. "RS5,XDMAC Channel 5 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 4. "RS4,XDMAC Channel 4 Read Suspend Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RS3,XDMAC Channel 3 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 2. "RS2,XDMAC Channel 2 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 1. "RS1,XDMAC Channel 1 Read Suspend Bit" "0,1"
|
|
bitfld.long 0x0 0. "RS0,XDMAC Channel 0 Read Suspend Bit" "0,1"
|
|
line.long 0x4 "GWS,Global Channel Write Suspend Register"
|
|
bitfld.long 0x4 23. "WS23,XDMAC Channel 23 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 22. "WS22,XDMAC Channel 22 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 21. "WS21,XDMAC Channel 21 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 20. "WS20,XDMAC Channel 20 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 19. "WS19,XDMAC Channel 19 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 18. "WS18,XDMAC Channel 18 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 17. "WS17,XDMAC Channel 17 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 16. "WS16,XDMAC Channel 16 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 15. "WS15,XDMAC Channel 15 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 14. "WS14,XDMAC Channel 14 Write Suspend Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "WS13,XDMAC Channel 13 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 12. "WS12,XDMAC Channel 12 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 11. "WS11,XDMAC Channel 11 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 10. "WS10,XDMAC Channel 10 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 9. "WS9,XDMAC Channel 9 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 8. "WS8,XDMAC Channel 8 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 7. "WS7,XDMAC Channel 7 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 6. "WS6,XDMAC Channel 6 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 5. "WS5,XDMAC Channel 5 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 4. "WS4,XDMAC Channel 4 Write Suspend Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "WS3,XDMAC Channel 3 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 2. "WS2,XDMAC Channel 2 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 1. "WS1,XDMAC Channel 1 Write Suspend Bit" "0,1"
|
|
bitfld.long 0x4 0. "WS0,XDMAC Channel 0 Write Suspend Bit" "0,1"
|
|
wgroup.long 0x30++0xB
|
|
line.long 0x0 "GRWS,Global Channel Read Write Suspend Register"
|
|
bitfld.long 0x0 23. "RWS23,XDMAC Channel 23 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 22. "RWS22,XDMAC Channel 22 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 21. "RWS21,XDMAC Channel 21 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 20. "RWS20,XDMAC Channel 20 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 19. "RWS19,XDMAC Channel 19 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 18. "RWS18,XDMAC Channel 18 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 17. "RWS17,XDMAC Channel 17 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 16. "RWS16,XDMAC Channel 16 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 15. "RWS15,XDMAC Channel 15 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 14. "RWS14,XDMAC Channel 14 Read Write Suspend Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "RWS13,XDMAC Channel 13 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 12. "RWS12,XDMAC Channel 12 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 11. "RWS11,XDMAC Channel 11 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 10. "RWS10,XDMAC Channel 10 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 9. "RWS9,XDMAC Channel 9 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 8. "RWS8,XDMAC Channel 8 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 7. "RWS7,XDMAC Channel 7 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 6. "RWS6,XDMAC Channel 6 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 5. "RWS5,XDMAC Channel 5 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 4. "RWS4,XDMAC Channel 4 Read Write Suspend Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "RWS3,XDMAC Channel 3 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 2. "RWS2,XDMAC Channel 2 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 1. "RWS1,XDMAC Channel 1 Read Write Suspend Bit" "0,1"
|
|
bitfld.long 0x0 0. "RWS0,XDMAC Channel 0 Read Write Suspend Bit" "0,1"
|
|
line.long 0x4 "GRWR,Global Channel Read Write Resume Register"
|
|
bitfld.long 0x4 23. "RWR23,XDMAC Channel 23 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 22. "RWR22,XDMAC Channel 22 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 21. "RWR21,XDMAC Channel 21 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 20. "RWR20,XDMAC Channel 20 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 19. "RWR19,XDMAC Channel 19 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 18. "RWR18,XDMAC Channel 18 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 17. "RWR17,XDMAC Channel 17 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 16. "RWR16,XDMAC Channel 16 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 15. "RWR15,XDMAC Channel 15 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 14. "RWR14,XDMAC Channel 14 Read Write Resume Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "RWR13,XDMAC Channel 13 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 12. "RWR12,XDMAC Channel 12 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 11. "RWR11,XDMAC Channel 11 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 10. "RWR10,XDMAC Channel 10 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 9. "RWR9,XDMAC Channel 9 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 8. "RWR8,XDMAC Channel 8 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 7. "RWR7,XDMAC Channel 7 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 6. "RWR6,XDMAC Channel 6 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 5. "RWR5,XDMAC Channel 5 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 4. "RWR4,XDMAC Channel 4 Read Write Resume Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "RWR3,XDMAC Channel 3 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 2. "RWR2,XDMAC Channel 2 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 1. "RWR1,XDMAC Channel 1 Read Write Resume Bit" "0,1"
|
|
bitfld.long 0x4 0. "RWR0,XDMAC Channel 0 Read Write Resume Bit" "0,1"
|
|
line.long 0x8 "GSWR,Global Channel Software Request Register"
|
|
bitfld.long 0x8 23. "SWREQ23,XDMAC Channel 23 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 22. "SWREQ22,XDMAC Channel 22 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 21. "SWREQ21,XDMAC Channel 21 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 20. "SWREQ20,XDMAC Channel 20 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 19. "SWREQ19,XDMAC Channel 19 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 18. "SWREQ18,XDMAC Channel 18 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 17. "SWREQ17,XDMAC Channel 17 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 16. "SWREQ16,XDMAC Channel 16 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 15. "SWREQ15,XDMAC Channel 15 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 14. "SWREQ14,XDMAC Channel 14 Software Request Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "SWREQ13,XDMAC Channel 13 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 12. "SWREQ12,XDMAC Channel 12 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 11. "SWREQ11,XDMAC Channel 11 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 10. "SWREQ10,XDMAC Channel 10 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 9. "SWREQ9,XDMAC Channel 9 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 8. "SWREQ8,XDMAC Channel 8 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 7. "SWREQ7,XDMAC Channel 7 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 6. "SWREQ6,XDMAC Channel 6 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 5. "SWREQ5,XDMAC Channel 5 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 4. "SWREQ4,XDMAC Channel 4 Software Request Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "SWREQ3,XDMAC Channel 3 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 2. "SWREQ2,XDMAC Channel 2 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 1. "SWREQ1,XDMAC Channel 1 Software Request Bit" "0,1"
|
|
bitfld.long 0x8 0. "SWREQ0,XDMAC Channel 0 Software Request Bit" "0,1"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x0 "GSWS,Global Channel Software Request Status Register"
|
|
bitfld.long 0x0 23. "SWRS23,XDMAC Channel 23 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 22. "SWRS22,XDMAC Channel 22 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 21. "SWRS21,XDMAC Channel 21 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 20. "SWRS20,XDMAC Channel 20 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 19. "SWRS19,XDMAC Channel 19 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 18. "SWRS18,XDMAC Channel 18 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 17. "SWRS17,XDMAC Channel 17 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 16. "SWRS16,XDMAC Channel 16 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 15. "SWRS15,XDMAC Channel 15 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 14. "SWRS14,XDMAC Channel 14 Software Request Status Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "SWRS13,XDMAC Channel 13 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 12. "SWRS12,XDMAC Channel 12 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 11. "SWRS11,XDMAC Channel 11 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 10. "SWRS10,XDMAC Channel 10 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 9. "SWRS9,XDMAC Channel 9 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 8. "SWRS8,XDMAC Channel 8 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 7. "SWRS7,XDMAC Channel 7 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 6. "SWRS6,XDMAC Channel 6 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 5. "SWRS5,XDMAC Channel 5 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 4. "SWRS4,XDMAC Channel 4 Software Request Status Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "SWRS3,XDMAC Channel 3 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 2. "SWRS2,XDMAC Channel 2 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 1. "SWRS1,XDMAC Channel 1 Software Request Status Bit" "0,1"
|
|
bitfld.long 0x0 0. "SWRS0,XDMAC Channel 0 Software Request Status Bit" "0,1"
|
|
wgroup.long 0x40++0x3
|
|
line.long 0x0 "GSWF,Global Channel Software Flush Request Register"
|
|
bitfld.long 0x0 23. "SWF23,XDMAC Channel 23 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 22. "SWF22,XDMAC Channel 22 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 21. "SWF21,XDMAC Channel 21 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 20. "SWF20,XDMAC Channel 20 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 19. "SWF19,XDMAC Channel 19 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 18. "SWF18,XDMAC Channel 18 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 17. "SWF17,XDMAC Channel 17 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 16. "SWF16,XDMAC Channel 16 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 15. "SWF15,XDMAC Channel 15 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 14. "SWF14,XDMAC Channel 14 Software Flush Request Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "SWF13,XDMAC Channel 13 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 12. "SWF12,XDMAC Channel 12 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 11. "SWF11,XDMAC Channel 11 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 10. "SWF10,XDMAC Channel 10 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 9. "SWF9,XDMAC Channel 9 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 8. "SWF8,XDMAC Channel 8 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 7. "SWF7,XDMAC Channel 7 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 6. "SWF6,XDMAC Channel 6 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 5. "SWF5,XDMAC Channel 5 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 4. "SWF4,XDMAC Channel 4 Software Flush Request Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "SWF3,XDMAC Channel 3 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 2. "SWF2,XDMAC Channel 2 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 1. "SWF1,XDMAC Channel 1 Software Flush Request Bit" "0,1"
|
|
bitfld.long 0x0 0. "SWF0,XDMAC Channel 0 Software Flush Request Bit" "0,1"
|
|
repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0x40078050 ad:0x40078090 ad:0x400780D0 ad:0x40078110 ad:0x40078150 ad:0x40078190 ad:0x400781D0 ad:0x40078210 ad:0x40078250 ad:0x40078290 ad:0x400782D0 ad:0x40078310 ad:0x40078350 ad:0x40078390 ad:0x400783D0 ad:0x40078410)
|
|
tree "XDMAC_CHID[$1]"
|
|
base $2
|
|
wgroup.long ($2)++0x7
|
|
line.long 0x0 "CIE,Channel Interrupt Enable Register"
|
|
bitfld.long 0x0 6. "ROIE,Request Overflow Error Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 5. "WBIE,Write Bus Error Interrupt Enable Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RBIE,Read Bus Error Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 3. "FIE,End of Flush Interrupt Enable Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DIE,End of Disable Interrupt Enable Bit" "0,1"
|
|
bitfld.long 0x0 1. "LIE,End of Linked List Interrupt Enable Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "BIE,End of Block Interrupt Enable Bit" "0,1"
|
|
line.long 0x4 "CID,Channel Interrupt Disable Register"
|
|
bitfld.long 0x4 6. "ROID,Request Overflow Error Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 5. "WBEID,Write Bus Error Interrupt Disable Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "RBEID,Read Bus Error Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 3. "FID,End of Flush Interrupt Disable Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "DID,End of Disable Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 1. "LID,End of Linked List Interrupt Disable Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "BID,End of Block Interrupt Disable Bit" "0,1"
|
|
rgroup.long ($2+0x8)++0x7
|
|
line.long 0x0 "CIM,Channel Interrupt Mask Register"
|
|
bitfld.long 0x0 6. "ROIM,Request Overflow Error Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 5. "WBEIM,Write Bus Error Interrupt Mask Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RBEIM,Read Bus Error Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 3. "FIM,End of Flush Interrupt Mask Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DIM,End of Disable Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 1. "LIM,End of Linked List Interrupt Mask Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "BIM,End of Block Interrupt Mask Bit" "0,1"
|
|
line.long 0x4 "CIS,Channel Interrupt Status Register"
|
|
bitfld.long 0x4 6. "ROIS,Request Overflow Error Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 5. "WBEIS,Write Bus Error Interrupt Status Bit" "0,1"
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newline
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bitfld.long 0x4 4. "RBEIS,Read Bus Error Interrupt Status Bit" "0,1"
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|
bitfld.long 0x4 3. "FIS,End of Flush Interrupt Status Bit" "0,1"
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newline
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bitfld.long 0x4 2. "DIS,End of Disable Interrupt Status Bit" "0,1"
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|
bitfld.long 0x4 1. "LIS,End of Linked List Interrupt Status Bit" "0,1"
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newline
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bitfld.long 0x4 0. "BIS,End of Block Interrupt Status Bit" "0,1"
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|
group.long ($2+0x10)++0x27
|
|
line.long 0x0 "CSA,Channel Source Address Register"
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|
hexmask.long 0x0 0.--31. 1. "SA,Channel x Source Address"
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line.long 0x4 "CDA,Channel Destination Address Register"
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hexmask.long 0x4 0.--31. 1. "DA,Channel x Destination Address"
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line.long 0x8 "CNDA,Channel Next Descriptor Address Register"
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hexmask.long 0x8 2.--31. 1. "NDA,Channel x Next Descriptor Address"
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bitfld.long 0x8 0. "NDAIF,Channel x Next Descriptor Interface" "0,1"
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line.long 0xC "CNDC,Channel Next Descriptor Control Register"
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bitfld.long 0xC 3.--4. "NDVIEW,Channel x Next Descriptor View" "0: Next Descriptor View 0,1: Next Descriptor View 1,2: Next Descriptor View 2,3: Next Descriptor View 3"
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bitfld.long 0xC 2. "NDDUP,Channel x Next Descriptor Destination Update" "0: Destination parameters remain unchanged.,1: Destination parameters are updated when the.."
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newline
|
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bitfld.long 0xC 1. "NDSUP,Channel x Next Descriptor Source Update" "0: Source parameters remain unchanged.,1: Source parameters are updated when the.."
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bitfld.long 0xC 0. "NDE,Channel x Next Descriptor Enable" "0: Descriptor fetch is disabled.,1: Descriptor fetch is enabled."
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line.long 0x10 "CUBC,Channel Microblock Control Register"
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hexmask.long.tbyte 0x10 0.--23. 1. "UBLEN,Channel x Microblock Length"
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line.long 0x14 "CBC,Channel Block Control Register"
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hexmask.long.word 0x14 0.--11. 1. "BLEN,Channel x Block Length"
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line.long 0x18 "CC,Channel Configuration Register"
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hexmask.long.byte 0x18 24.--30. 1. "PERID,Channel x Peripheral Hardware Request Line Identifier"
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bitfld.long 0x18 23. "WRIP,Write in Progress (this bit is read-only)" "0: No active write transaction on the bus.,1: A write transaction is in progress."
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|
newline
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bitfld.long 0x18 22. "RDIP,Read in Progress (this bit is read-only)" "0: No active read transaction on the bus.,1: A read transaction is in progress."
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bitfld.long 0x18 21. "INITD,Channel Initialization Terminated (this bit is read-only)" "0: Channel initialization is in progress.,1: Channel initialization is completed."
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newline
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bitfld.long 0x18 18.--19. "DAM,Channel x Destination Addressing Mode" "0: The address remains unchanged.,1: The addressing mode is incremented (the..,2: The microblock stride is added at the microblock..,3: The microblock stride is added at the microblock.."
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bitfld.long 0x18 16.--17. "SAM,Channel x Source Addressing Mode" "0: The address remains unchanged.,1: The addressing mode is incremented (the..,2: The microblock stride is added at the microblock..,3: The microblock stride is added at the microblock.."
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newline
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bitfld.long 0x18 14. "DIF,Channel x Destination Interface Identifier" "0: The data is written through the system bus..,1: The data is written though the system bus.."
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bitfld.long 0x18 13. "SIF,Channel x Source Interface Identifier" "0: The data is read through the system bus..,1: The data is read through the system bus.."
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newline
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bitfld.long 0x18 11.--12. "DWIDTH,Channel x Data Width" "0: The data size is set to 8 bits,1: The data size is set to 16 bits,2: The data size is set to 32 bits,?"
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bitfld.long 0x18 8.--10. "CSIZE,Channel x Chunk Size" "0: 1 data transferred,1: 2 data transferred,2: 4 data transferred,3: 8 data transferred,4: 16 data transferred,?,?,?"
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newline
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bitfld.long 0x18 7. "MEMSET,Channel x Fill Block of memory" "0: Memset is not activated.,1: Sets the block of memory pointed by DA field to.."
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bitfld.long 0x18 6. "SWREQ,Channel x Software Request Trigger" "0: Hardware request line is connected to the..,1: Software request is connected to the peripheral.."
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|
newline
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bitfld.long 0x18 4. "DSYNC,Channel x Synchronization" "0: Peripheral-to-memory transfer.,1: Memory-to-peripheral transfer."
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|
bitfld.long 0x18 1.--2. "MBSIZE,Channel x Memory Burst Size" "0: The memory burst size is set to one.,1: The memory burst size is set to four.,2: The memory burst size is set to eight.,3: The memory burst size is set to sixteen."
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newline
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bitfld.long 0x18 0. "TYPE,Channel x Transfer Type" "0: Self-triggered mode (memory-to-memory transfer).,1: Synchronized mode (peripheral-to-memory or.."
|
|
line.long 0x1C "CDS_MSP,Channel Data Stride Memory Set Pattern"
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|
hexmask.long.word 0x1C 16.--31. 1. "DDS_MSP,Channel x Destination Data Stride or Memory Set Pattern"
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|
hexmask.long.word 0x1C 0.--15. 1. "SDS_MSP,Channel x Source Data stride or Memory Set Pattern"
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|
line.long 0x20 "CSUS,Channel Source Microblock Stride"
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hexmask.long.tbyte 0x20 0.--23. 1. "SUBS,Channel x Source Microblock Stride"
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line.long 0x24 "CDUS,Channel Destination Microblock Stride"
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|
hexmask.long.tbyte 0x24 0.--23. 1. "DUBS,Channel x Destination Microblock Stride"
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tree.end
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repeat.end
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repeat 8. (list 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17)(list ad:0x40078450 ad:0x40078490 ad:0x400784D0 ad:0x40078510 ad:0x40078550 ad:0x40078590 ad:0x400785D0 ad:0x40078610)
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tree "XDMAC_CHID[$1]"
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base $2
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wgroup.long ($2)++0x7
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line.long 0x0 "CIE,Channel Interrupt Enable Register"
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bitfld.long 0x0 6. "ROIE,Request Overflow Error Interrupt Enable Bit" "0,1"
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bitfld.long 0x0 5. "WBIE,Write Bus Error Interrupt Enable Bit" "0,1"
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newline
|
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bitfld.long 0x0 4. "RBIE,Read Bus Error Interrupt Enable Bit" "0,1"
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|
bitfld.long 0x0 3. "FIE,End of Flush Interrupt Enable Bit" "0,1"
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|
newline
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bitfld.long 0x0 2. "DIE,End of Disable Interrupt Enable Bit" "0,1"
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bitfld.long 0x0 1. "LIE,End of Linked List Interrupt Enable Bit" "0,1"
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newline
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bitfld.long 0x0 0. "BIE,End of Block Interrupt Enable Bit" "0,1"
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line.long 0x4 "CID,Channel Interrupt Disable Register"
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|
bitfld.long 0x4 6. "ROID,Request Overflow Error Interrupt Disable Bit" "0,1"
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|
bitfld.long 0x4 5. "WBEID,Write Bus Error Interrupt Disable Bit" "0,1"
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|
newline
|
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bitfld.long 0x4 4. "RBEID,Read Bus Error Interrupt Disable Bit" "0,1"
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|
bitfld.long 0x4 3. "FID,End of Flush Interrupt Disable Bit" "0,1"
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|
newline
|
|
bitfld.long 0x4 2. "DID,End of Disable Interrupt Disable Bit" "0,1"
|
|
bitfld.long 0x4 1. "LID,End of Linked List Interrupt Disable Bit" "0,1"
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|
newline
|
|
bitfld.long 0x4 0. "BID,End of Block Interrupt Disable Bit" "0,1"
|
|
rgroup.long ($2+0x8)++0x7
|
|
line.long 0x0 "CIM,Channel Interrupt Mask Register"
|
|
bitfld.long 0x0 6. "ROIM,Request Overflow Error Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 5. "WBEIM,Write Bus Error Interrupt Mask Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RBEIM,Read Bus Error Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 3. "FIM,End of Flush Interrupt Mask Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DIM,End of Disable Interrupt Mask Bit" "0,1"
|
|
bitfld.long 0x0 1. "LIM,End of Linked List Interrupt Mask Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "BIM,End of Block Interrupt Mask Bit" "0,1"
|
|
line.long 0x4 "CIS,Channel Interrupt Status Register"
|
|
bitfld.long 0x4 6. "ROIS,Request Overflow Error Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 5. "WBEIS,Write Bus Error Interrupt Status Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "RBEIS,Read Bus Error Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 3. "FIS,End of Flush Interrupt Status Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "DIS,End of Disable Interrupt Status Bit" "0,1"
|
|
bitfld.long 0x4 1. "LIS,End of Linked List Interrupt Status Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "BIS,End of Block Interrupt Status Bit" "0,1"
|
|
group.long ($2+0x10)++0x27
|
|
line.long 0x0 "CSA,Channel Source Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "SA,Channel x Source Address"
|
|
line.long 0x4 "CDA,Channel Destination Address Register"
|
|
hexmask.long 0x4 0.--31. 1. "DA,Channel x Destination Address"
|
|
line.long 0x8 "CNDA,Channel Next Descriptor Address Register"
|
|
hexmask.long 0x8 2.--31. 1. "NDA,Channel x Next Descriptor Address"
|
|
bitfld.long 0x8 0. "NDAIF,Channel x Next Descriptor Interface" "0,1"
|
|
line.long 0xC "CNDC,Channel Next Descriptor Control Register"
|
|
bitfld.long 0xC 3.--4. "NDVIEW,Channel x Next Descriptor View" "0: Next Descriptor View 0,1: Next Descriptor View 1,2: Next Descriptor View 2,3: Next Descriptor View 3"
|
|
bitfld.long 0xC 2. "NDDUP,Channel x Next Descriptor Destination Update" "0: Destination parameters remain unchanged.,1: Destination parameters are updated when the.."
|
|
newline
|
|
bitfld.long 0xC 1. "NDSUP,Channel x Next Descriptor Source Update" "0: Source parameters remain unchanged.,1: Source parameters are updated when the.."
|
|
bitfld.long 0xC 0. "NDE,Channel x Next Descriptor Enable" "0: Descriptor fetch is disabled.,1: Descriptor fetch is enabled."
|
|
line.long 0x10 "CUBC,Channel Microblock Control Register"
|
|
hexmask.long.tbyte 0x10 0.--23. 1. "UBLEN,Channel x Microblock Length"
|
|
line.long 0x14 "CBC,Channel Block Control Register"
|
|
hexmask.long.word 0x14 0.--11. 1. "BLEN,Channel x Block Length"
|
|
line.long 0x18 "CC,Channel Configuration Register"
|
|
hexmask.long.byte 0x18 24.--30. 1. "PERID,Channel x Peripheral Hardware Request Line Identifier"
|
|
bitfld.long 0x18 23. "WRIP,Write in Progress (this bit is read-only)" "0: No active write transaction on the bus.,1: A write transaction is in progress."
|
|
newline
|
|
bitfld.long 0x18 22. "RDIP,Read in Progress (this bit is read-only)" "0: No active read transaction on the bus.,1: A read transaction is in progress."
|
|
bitfld.long 0x18 21. "INITD,Channel Initialization Terminated (this bit is read-only)" "0: Channel initialization is in progress.,1: Channel initialization is completed."
|
|
newline
|
|
bitfld.long 0x18 18.--19. "DAM,Channel x Destination Addressing Mode" "0: The address remains unchanged.,1: The addressing mode is incremented (the..,2: The microblock stride is added at the microblock..,3: The microblock stride is added at the microblock.."
|
|
bitfld.long 0x18 16.--17. "SAM,Channel x Source Addressing Mode" "0: The address remains unchanged.,1: The addressing mode is incremented (the..,2: The microblock stride is added at the microblock..,3: The microblock stride is added at the microblock.."
|
|
newline
|
|
bitfld.long 0x18 14. "DIF,Channel x Destination Interface Identifier" "0: The data is written through the system bus..,1: The data is written though the system bus.."
|
|
bitfld.long 0x18 13. "SIF,Channel x Source Interface Identifier" "0: The data is read through the system bus..,1: The data is read through the system bus.."
|
|
newline
|
|
bitfld.long 0x18 11.--12. "DWIDTH,Channel x Data Width" "0: The data size is set to 8 bits,1: The data size is set to 16 bits,2: The data size is set to 32 bits,?"
|
|
bitfld.long 0x18 8.--10. "CSIZE,Channel x Chunk Size" "0: 1 data transferred,1: 2 data transferred,2: 4 data transferred,3: 8 data transferred,4: 16 data transferred,?,?,?"
|
|
newline
|
|
bitfld.long 0x18 7. "MEMSET,Channel x Fill Block of memory" "0: Memset is not activated.,1: Sets the block of memory pointed by DA field to.."
|
|
bitfld.long 0x18 6. "SWREQ,Channel x Software Request Trigger" "0: Hardware request line is connected to the..,1: Software request is connected to the peripheral.."
|
|
newline
|
|
bitfld.long 0x18 4. "DSYNC,Channel x Synchronization" "0: Peripheral-to-memory transfer.,1: Memory-to-peripheral transfer."
|
|
bitfld.long 0x18 1.--2. "MBSIZE,Channel x Memory Burst Size" "0: The memory burst size is set to one.,1: The memory burst size is set to four.,2: The memory burst size is set to eight.,3: The memory burst size is set to sixteen."
|
|
newline
|
|
bitfld.long 0x18 0. "TYPE,Channel x Transfer Type" "0: Self-triggered mode (memory-to-memory transfer).,1: Synchronized mode (peripheral-to-memory or.."
|
|
line.long 0x1C "CDS_MSP,Channel Data Stride Memory Set Pattern"
|
|
hexmask.long.word 0x1C 16.--31. 1. "DDS_MSP,Channel x Destination Data Stride or Memory Set Pattern"
|
|
hexmask.long.word 0x1C 0.--15. 1. "SDS_MSP,Channel x Source Data stride or Memory Set Pattern"
|
|
line.long 0x20 "CSUS,Channel Source Microblock Stride"
|
|
hexmask.long.tbyte 0x20 0.--23. 1. "SUBS,Channel x Source Microblock Stride"
|
|
line.long 0x24 "CDUS,Channel Destination Microblock Stride"
|
|
hexmask.long.tbyte 0x24 0.--23. 1. "DUBS,Channel x Destination Microblock Stride"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
newline
|
|
AUTOINDENT.OFF
|